Re: [Intel-gfx] [PATCH v2 4/9] drm/i915/display/phys: use intel_de_rmw if possible

2023-01-06 Thread Rodrigo Vivi 
On Thu, Jan 05, 2023 at 02:10:41PM +0100, Andrzej Hajda wrote:
> The helper makes the code more compact and readable.
> 
> Signed-off-by: Andrzej Hajda 

Reviewed-by: Rodrigo Vivi 
> ---
>  .../gpu/drm/i915/display/intel_combo_phy.c| 43 +---
>  drivers/gpu/drm/i915/display/intel_dpio_phy.c | 51 ++-
>  2 files changed, 29 insertions(+), 65 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c 
> b/drivers/gpu/drm/i915/display/intel_combo_phy.c
> index 8b870b2dd4f9d9..27e98eabb0060a 100644
> --- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
> @@ -78,14 +78,11 @@ static void icl_set_procmon_ref_values(struct 
> drm_i915_private *dev_priv,
>  enum phy phy)
>  {
>   const struct icl_procmon *procmon;
> - u32 val;
>  
>   procmon = icl_get_procmon_ref_values(dev_priv, phy);
>  
> - val = intel_de_read(dev_priv, ICL_PORT_COMP_DW1(phy));
> - val &= ~((0xff << 16) | 0xff);
> - val |= procmon->dw1;
> - intel_de_write(dev_priv, ICL_PORT_COMP_DW1(phy), val);
> + intel_de_rmw(dev_priv, ICL_PORT_COMP_DW1(phy),
> +  (0xff << 16) | 0xff, procmon->dw1);
>  
>   intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9);
>   intel_de_write(dev_priv, ICL_PORT_COMP_DW10(phy), procmon->dw10);
> @@ -267,7 +264,6 @@ void intel_combo_phy_power_up_lanes(struct 
> drm_i915_private *dev_priv,
>   int lane_count, bool lane_reversal)
>  {
>   u8 lane_mask;
> - u32 val;
>  
>   if (is_dsi) {
>   drm_WARN_ON(_priv->drm, lane_reversal);
> @@ -308,10 +304,8 @@ void intel_combo_phy_power_up_lanes(struct 
> drm_i915_private *dev_priv,
>   }
>   }
>  
> - val = intel_de_read(dev_priv, ICL_PORT_CL_DW10(phy));
> - val &= ~PWR_DOWN_LN_MASK;
> - val |= lane_mask;
> - intel_de_write(dev_priv, ICL_PORT_CL_DW10(phy), val);
> + intel_de_rmw(dev_priv, ICL_PORT_CL_DW10(phy),
> +  PWR_DOWN_LN_MASK, lane_mask);
>  }
>  
>  static void icl_combo_phys_init(struct drm_i915_private *dev_priv)
> @@ -366,19 +360,13 @@ static void icl_combo_phys_init(struct drm_i915_private 
> *dev_priv)
>  
>   icl_set_procmon_ref_values(dev_priv, phy);
>  
> - if (phy_is_master(dev_priv, phy)) {
> - val = intel_de_read(dev_priv, ICL_PORT_COMP_DW8(phy));
> - val |= IREFGEN;
> - intel_de_write(dev_priv, ICL_PORT_COMP_DW8(phy), val);
> - }
> -
> - val = intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy));
> - val |= COMP_INIT;
> - intel_de_write(dev_priv, ICL_PORT_COMP_DW0(phy), val);
> + if (phy_is_master(dev_priv, phy))
> + intel_de_rmw(dev_priv, ICL_PORT_COMP_DW8(phy),
> +  0, IREFGEN);
>  
> - val = intel_de_read(dev_priv, ICL_PORT_CL_DW5(phy));
> - val |= CL_POWER_DOWN_ENABLE;
> - intel_de_write(dev_priv, ICL_PORT_CL_DW5(phy), val);
> + intel_de_rmw(dev_priv, ICL_PORT_COMP_DW0(phy), 0, COMP_INIT);
> + intel_de_rmw(dev_priv, ICL_PORT_CL_DW5(phy),
> +  0, CL_POWER_DOWN_ENABLE);
>   }
>  }
>  
> @@ -387,8 +375,6 @@ static void icl_combo_phys_uninit(struct drm_i915_private 
> *dev_priv)
>   enum phy phy;
>  
>   for_each_combo_phy_reverse(dev_priv, phy) {
> - u32 val;
> -
>   if (phy == PHY_A &&
>   !icl_combo_phy_verify_state(dev_priv, phy)) {
>   if (IS_TIGERLAKE(dev_priv) || IS_DG1(dev_priv)) {
> @@ -410,14 +396,11 @@ static void icl_combo_phys_uninit(struct 
> drm_i915_private *dev_priv)
>   if (!has_phy_misc(dev_priv, phy))
>   goto skip_phy_misc;
>  
> - val = intel_de_read(dev_priv, ICL_PHY_MISC(phy));
> - val |= ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN;
> - intel_de_write(dev_priv, ICL_PHY_MISC(phy), val);
> + intel_de_rmw(dev_priv, ICL_PHY_MISC(phy), 0,
> +  ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN);
>  
>  skip_phy_misc:
> - val = intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy));
> - val &= ~COMP_INIT;
> - intel_de_write(dev_priv, ICL_PORT_COMP_DW0(phy), val);
> + intel_de_rmw(dev_priv, ICL_PORT_COMP_DW0(phy), COMP_INIT, 0);
>   }
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c 
> b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
> index 7eb7440b31803f..9d825fdaa29055 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
> @@ -389,9 +389,7 @@ static void _bxt_ddi_phy_init(struct drm_i915_private 
> *dev_priv,
>   "force reprogramming it\n", phy);
>   }
>  
> - val =

[Intel-gfx] [PATCH v2 4/9] drm/i915/display/phys: use intel_de_rmw if possible

2023-01-05 Thread Andrzej Hajda 
The helper makes the code more compact and readable.

Signed-off-by: Andrzej Hajda 
---
 .../gpu/drm/i915/display/intel_combo_phy.c| 43 +---
 drivers/gpu/drm/i915/display/intel_dpio_phy.c | 51 ++-
 2 files changed, 29 insertions(+), 65 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c 
b/drivers/gpu/drm/i915/display/intel_combo_phy.c
index 8b870b2dd4f9d9..27e98eabb0060a 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
@@ -78,14 +78,11 @@ static void icl_set_procmon_ref_values(struct 
drm_i915_private *dev_priv,
   enum phy phy)
 {
const struct icl_procmon *procmon;
-   u32 val;
 
procmon = icl_get_procmon_ref_values(dev_priv, phy);
 
-   val = intel_de_read(dev_priv, ICL_PORT_COMP_DW1(phy));
-   val &= ~((0xff << 16) | 0xff);
-   val |= procmon->dw1;
-   intel_de_write(dev_priv, ICL_PORT_COMP_DW1(phy), val);
+   intel_de_rmw(dev_priv, ICL_PORT_COMP_DW1(phy),
+(0xff << 16) | 0xff, procmon->dw1);
 
intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9);
intel_de_write(dev_priv, ICL_PORT_COMP_DW10(phy), procmon->dw10);
@@ -267,7 +264,6 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private 
*dev_priv,
int lane_count, bool lane_reversal)
 {
u8 lane_mask;
-   u32 val;
 
if (is_dsi) {
drm_WARN_ON(_priv->drm, lane_reversal);
@@ -308,10 +304,8 @@ void intel_combo_phy_power_up_lanes(struct 
drm_i915_private *dev_priv,
}
}
 
-   val = intel_de_read(dev_priv, ICL_PORT_CL_DW10(phy));
-   val &= ~PWR_DOWN_LN_MASK;
-   val |= lane_mask;
-   intel_de_write(dev_priv, ICL_PORT_CL_DW10(phy), val);
+   intel_de_rmw(dev_priv, ICL_PORT_CL_DW10(phy),
+PWR_DOWN_LN_MASK, lane_mask);
 }
 
 static void icl_combo_phys_init(struct drm_i915_private *dev_priv)
@@ -366,19 +360,13 @@ static void icl_combo_phys_init(struct drm_i915_private 
*dev_priv)
 
icl_set_procmon_ref_values(dev_priv, phy);
 
-   if (phy_is_master(dev_priv, phy)) {
-   val = intel_de_read(dev_priv, ICL_PORT_COMP_DW8(phy));
-   val |= IREFGEN;
-   intel_de_write(dev_priv, ICL_PORT_COMP_DW8(phy), val);
-   }
-
-   val = intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy));
-   val |= COMP_INIT;
-   intel_de_write(dev_priv, ICL_PORT_COMP_DW0(phy), val);
+   if (phy_is_master(dev_priv, phy))
+   intel_de_rmw(dev_priv, ICL_PORT_COMP_DW8(phy),
+0, IREFGEN);
 
-   val = intel_de_read(dev_priv, ICL_PORT_CL_DW5(phy));
-   val |= CL_POWER_DOWN_ENABLE;
-   intel_de_write(dev_priv, ICL_PORT_CL_DW5(phy), val);
+   intel_de_rmw(dev_priv, ICL_PORT_COMP_DW0(phy), 0, COMP_INIT);
+   intel_de_rmw(dev_priv, ICL_PORT_CL_DW5(phy),
+0, CL_POWER_DOWN_ENABLE);
}
 }
 
@@ -387,8 +375,6 @@ static void icl_combo_phys_uninit(struct drm_i915_private 
*dev_priv)
enum phy phy;
 
for_each_combo_phy_reverse(dev_priv, phy) {
-   u32 val;
-
if (phy == PHY_A &&
!icl_combo_phy_verify_state(dev_priv, phy)) {
if (IS_TIGERLAKE(dev_priv) || IS_DG1(dev_priv)) {
@@ -410,14 +396,11 @@ static void icl_combo_phys_uninit(struct drm_i915_private 
*dev_priv)
if (!has_phy_misc(dev_priv, phy))
goto skip_phy_misc;
 
-   val = intel_de_read(dev_priv, ICL_PHY_MISC(phy));
-   val |= ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN;
-   intel_de_write(dev_priv, ICL_PHY_MISC(phy), val);
+   intel_de_rmw(dev_priv, ICL_PHY_MISC(phy), 0,
+ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN);
 
 skip_phy_misc:
-   val = intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy));
-   val &= ~COMP_INIT;
-   intel_de_write(dev_priv, ICL_PORT_COMP_DW0(phy), val);
+   intel_de_rmw(dev_priv, ICL_PORT_COMP_DW0(phy), COMP_INIT, 0);
}
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c 
b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
index 7eb7440b31803f..9d825fdaa29055 100644
--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
@@ -389,9 +389,7 @@ static void _bxt_ddi_phy_init(struct drm_i915_private 
*dev_priv,
"force reprogramming it\n", phy);
}
 
-   val = intel_de_read(dev_priv, BXT_P_CR_GT_DISP_PWRON);
-   val |= phy_info->pwron_mask;
-   intel_de_write(dev_priv, BXT_P_CR_GT_DISP_PWRON, val);
+   intel_de_rmw(dev_priv, BXT_P_CR_GT_DISP_PWRON, 0,