Re: [Intel-gfx] [PATCH v2 7/7] drm/i915/bxt: WaGsvDisableTurbo

[Kamble, Sagar A]

Hi Alex,

Could you review and provide r-b tag for 3rd rev: 
http://lists.freedesktop.org/archives/intel-gfx/2015-September/076223.html


Thanks
Sagar


On 9/22/2015 12:20 AM, Yu Dai wrote:

Looks good to me.
Reviewed-by: Alex Dai 

On 09/11/2015 09:47 PM, Sagar Arun Kamble wrote:
Disable Turbo on steppings prior to B0 on BXT due to hangs seen 
during GT CPD exit.


Change-Id: I50c5c03f59f5ba092db19e17234951d89db42c6c
Signed-off-by: Sagar Arun Kamble 
---
  drivers/gpu/drm/i915/intel_pm.c | 10 ++
  1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pm.c 
b/drivers/gpu/drm/i915/intel_pm.c

index 6843a48..90d8834 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4473,6 +4473,10 @@ static void gen6_set_rps(struct drm_device 
*dev, u8 val)

  {
  struct drm_i915_private *dev_priv = dev->dev_private;
  +/* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */
+if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0))
+return;
+
  WARN_ON(!mutex_is_locked(_priv->rps.hw_lock));
  WARN_ON(val > dev_priv->rps.max_freq);
  WARN_ON(val < dev_priv->rps.min_freq);
@@ -4793,6 +4797,12 @@ static void gen9_enable_rps(struct drm_device 
*dev)

gen6_init_rps_frequencies(dev);
  +/* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */
+if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) {
+intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+return;
+}
+
  /* Program defaults and thresholds for RPS*/
  I915_WRITE(GEN6_RC_VIDEO_FREQ,
  GEN9_FREQUENCY(dev_priv->rps.rp1_freq));




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Re: [Intel-gfx] [PATCH v2 7/7] drm/i915/bxt: WaGsvDisableTurbo

[Daniel Vetter]

On Mon, Sep 21, 2015 at 11:50:53AM -0700, Yu Dai wrote:
> Looks good to me.
> Reviewed-by: Alex Dai 
> 
> On 09/11/2015 09:47 PM, Sagar Arun Kamble wrote:
> >Disable Turbo on steppings prior to B0 on BXT due to hangs seen during GT 
> >CPD exit.
> >
> >Change-Id: I50c5c03f59f5ba092db19e17234951d89db42c6c
> >Signed-off-by: Sagar Arun Kamble 

I didn't pick up this one since there's a newer revision. Merged the other
patches from this series with an r-b tag.

Thanks, Daniel
> >---
> >  drivers/gpu/drm/i915/intel_pm.c | 10 ++
> >  1 file changed, 10 insertions(+)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_pm.c 
> >b/drivers/gpu/drm/i915/intel_pm.c
> >index 6843a48..90d8834 100644
> >--- a/drivers/gpu/drm/i915/intel_pm.c
> >+++ b/drivers/gpu/drm/i915/intel_pm.c
> >@@ -4473,6 +4473,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 
> >val)
> >  {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> >+/* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */
> >+if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0))
> >+return;
> >+
> > WARN_ON(!mutex_is_locked(_priv->rps.hw_lock));
> > WARN_ON(val > dev_priv->rps.max_freq);
> > WARN_ON(val < dev_priv->rps.min_freq);
> >@@ -4793,6 +4797,12 @@ static void gen9_enable_rps(struct drm_device *dev)
> > gen6_init_rps_frequencies(dev);
> >+/* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */
> >+if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) {
> >+intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
> >+return;
> >+}
> >+
> > /* Program defaults and thresholds for RPS*/
> > I915_WRITE(GEN6_RC_VIDEO_FREQ,
> > GEN9_FREQUENCY(dev_priv->rps.rp1_freq));
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH v2 7/7] drm/i915/bxt: WaGsvDisableTurbo

[Yu Dai]

Looks good to me.
Reviewed-by: Alex Dai 

On 09/11/2015 09:47 PM, Sagar Arun Kamble wrote:

Disable Turbo on steppings prior to B0 on BXT due to hangs seen during GT CPD 
exit.

Change-Id: I50c5c03f59f5ba092db19e17234951d89db42c6c
Signed-off-by: Sagar Arun Kamble 
---
  drivers/gpu/drm/i915/intel_pm.c | 10 ++
  1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6843a48..90d8834 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4473,6 +4473,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val)
  {
struct drm_i915_private *dev_priv = dev->dev_private;
  
+	/* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */

+   if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0))
+   return;
+
WARN_ON(!mutex_is_locked(_priv->rps.hw_lock));
WARN_ON(val > dev_priv->rps.max_freq);
WARN_ON(val < dev_priv->rps.min_freq);
@@ -4793,6 +4797,12 @@ static void gen9_enable_rps(struct drm_device *dev)
  
  	gen6_init_rps_frequencies(dev);
  
+	/* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */

+   if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) {
+   intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+   return;
+   }
+
/* Program defaults and thresholds for RPS*/
I915_WRITE(GEN6_RC_VIDEO_FREQ,
GEN9_FREQUENCY(dev_priv->rps.rp1_freq));


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[Intel-gfx] [PATCH v2 7/7] drm/i915/bxt: WaGsvDisableTurbo

[Sagar Arun Kamble]

Disable Turbo on steppings prior to B0 on BXT due to hangs seen during GT CPD 
exit.

Change-Id: I50c5c03f59f5ba092db19e17234951d89db42c6c
Signed-off-by: Sagar Arun Kamble 
---
 drivers/gpu/drm/i915/intel_pm.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6843a48..90d8834 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4473,6 +4473,10 @@ static void gen6_set_rps(struct drm_device *dev, u8 val)
 {
struct drm_i915_private *dev_priv = dev->dev_private;
 
+   /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */
+   if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0))
+   return;
+
WARN_ON(!mutex_is_locked(_priv->rps.hw_lock));
WARN_ON(val > dev_priv->rps.max_freq);
WARN_ON(val < dev_priv->rps.min_freq);
@@ -4793,6 +4797,12 @@ static void gen9_enable_rps(struct drm_device *dev)
 
gen6_init_rps_frequencies(dev);
 
+   /* WaGsvDisableTurbo: Workaround to disable turbo on BXT A* */
+   if (IS_BROXTON(dev) && (INTEL_REVID(dev) < BXT_REVID_B0)) {
+   intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
+   return;
+   }
+
/* Program defaults and thresholds for RPS*/
I915_WRITE(GEN6_RC_VIDEO_FREQ,
GEN9_FREQUENCY(dev_priv->rps.rp1_freq));
-- 
1.9.1

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