Re: [Intel-gfx] [PATCH v2 7/9] drm/i915: Refactor LUT read functions

2020-03-06 Thread Sharma, Swati2 



On 03-Mar-20 11:03 PM, Ville Syrjala wrote:

From: Ville Syrjälä 

Extract all the 'hw value -> LUT entry' stuff into small helpers
to make the main 'read out the entire LUT' loop less bogged down
by such mundane details.


Wow!


Signed-off-by: Ville Syrjälä 


Reviewed-by: Swati Sharma 


---
  drivers/gpu/drm/i915/display/intel_color.c | 122 +++--
  1 file changed, 62 insertions(+), 60 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 934f00817c5c..8796f04e23a8 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -387,6 +387,19 @@ static void chv_load_cgm_csc(struct intel_crtc *crtc,
   coeffs[8]);
  }
  
+/* convert hw value with given bit_precision to lut property val */

+static u32 intel_color_lut_pack(u32 val, int bit_precision)
+{
+   u32 max = 0x >> (16 - bit_precision);
+
+   val = clamp_val(val, 0, max);
+
+   if (bit_precision < 16)
+   val <<= 16 - bit_precision;
+
+   return val;
+}
+
  static u32 i9xx_lut_8(const struct drm_color_lut *color)
  {
return drm_color_lut_extract(color->red, 8) << 16 |
@@ -394,6 +407,13 @@ static u32 i9xx_lut_8(const struct drm_color_lut *color)
drm_color_lut_extract(color->blue, 8);
  }
  
+static void i9xx_lut_8_pack(struct drm_color_lut *entry, u32 val)

+{
+   entry->red = intel_color_lut_pack(REG_FIELD_GET(LGC_PALETTE_RED_MASK, 
val), 8);
+   entry->green = 
intel_color_lut_pack(REG_FIELD_GET(LGC_PALETTE_GREEN_MASK, val), 8);
+   entry->blue = intel_color_lut_pack(REG_FIELD_GET(LGC_PALETTE_BLUE_MASK, 
val), 8);
+}
+
  /* i965+ "10.6" bit interpolated format "even DW" (low 8 bits) */
  static u32 i965_lut_10p6_ldw(const struct drm_color_lut *color)
  {
@@ -410,6 +430,21 @@ static u32 i965_lut_10p6_udw(const struct drm_color_lut 
*color)
(color->blue >> 8);
  }
  
+static void i965_lut_10p6_pack(struct drm_color_lut *entry, u32 ldw, u32 udw)

+{
+   entry->red = REG_FIELD_GET(PALETTE_RED_MASK, udw) << 8 |
+   REG_FIELD_GET(PALETTE_RED_MASK, ldw);
+   entry->green = REG_FIELD_GET(PALETTE_GREEN_MASK, udw) << 8 |
+   REG_FIELD_GET(PALETTE_GREEN_MASK, ldw);
+   entry->blue = REG_FIELD_GET(PALETTE_BLUE_MASK, udw) << 8 |
+   REG_FIELD_GET(PALETTE_BLUE_MASK, ldw);
+}
+
+static u16 i965_lut_11p6_max_pack(u32 val)
+{
+   return REG_FIELD_GET(PIPEGCMAX_RGB_MASK, val);
+}
+
  static u32 ilk_lut_10(const struct drm_color_lut *color)
  {
return drm_color_lut_extract(color->red, 10) << 20 |
@@ -417,6 +452,13 @@ static u32 ilk_lut_10(const struct drm_color_lut *color)
drm_color_lut_extract(color->blue, 10);
  }
  
+static void ilk_lut_10_pack(struct drm_color_lut *entry, u32 val)

+{
+   entry->red = intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_RED_MASK, 
val), 10);
+   entry->green = 
intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_GREEN_MASK, val), 10);
+   entry->blue = 
intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_BLUE_MASK, val), 10);
+}
+
  static void i9xx_color_commit(const struct intel_crtc_state *crtc_state)
  {
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -983,6 +1025,13 @@ static u32 chv_cgm_degamma_udw(const struct drm_color_lut 
*color)
return drm_color_lut_extract(color->red, 14);
  }
  
+static void chv_cgm_gamma_pack(struct drm_color_lut *entry, u32 ldw, u32 udw)

+{
+   entry->green = 
intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_GAMMA_GREEN_MASK, ldw), 10);
+   entry->blue = 
intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_GAMMA_BLUE_MASK, ldw), 10);
+   entry->red = 
intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_GAMMA_RED_MASK, udw), 10);
+}
+
  static void chv_load_cgm_degamma(struct intel_crtc *crtc,
 const struct drm_property_blob *blob)
  {
@@ -1672,19 +1721,6 @@ bool intel_color_lut_equal(struct drm_property_blob 
*blob1,
return true;
  }
  
-/* convert hw value with given bit_precision to lut property val */

-static u32 intel_color_lut_pack(u32 val, int bit_precision)
-{
-   u32 max = 0x >> (16 - bit_precision);
-
-   val = clamp_val(val, 0, max);
-
-   if (bit_precision < 16)
-   val <<= 16 - bit_precision;
-
-   return val;
-}
-
  static struct drm_property_blob *
  i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
  {
@@ -1706,12 +1742,7 @@ i9xx_read_lut_8(const struct intel_crtc_state 
*crtc_state)
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
u32 val = intel_de_read(dev_priv, PALETTE(pipe, i));
  
-		lut[i].red = intel_color_lut_pack(REG_FIELD_GET(

-   LGC_PALETTE_RED_MASK, 
val), 8);
-   lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
- 
LGC_

[Intel-gfx] [PATCH v2 7/9] drm/i915: Refactor LUT read functions

2020-03-03 Thread Ville Syrjala 
From: Ville Syrjälä 

Extract all the 'hw value -> LUT entry' stuff into small helpers
to make the main 'read out the entire LUT' loop less bogged down
by such mundane details.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_color.c | 122 +++--
 1 file changed, 62 insertions(+), 60 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c 
b/drivers/gpu/drm/i915/display/intel_color.c
index 934f00817c5c..8796f04e23a8 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -387,6 +387,19 @@ static void chv_load_cgm_csc(struct intel_crtc *crtc,
   coeffs[8]);
 }
 
+/* convert hw value with given bit_precision to lut property val */
+static u32 intel_color_lut_pack(u32 val, int bit_precision)
+{
+   u32 max = 0x >> (16 - bit_precision);
+
+   val = clamp_val(val, 0, max);
+
+   if (bit_precision < 16)
+   val <<= 16 - bit_precision;
+
+   return val;
+}
+
 static u32 i9xx_lut_8(const struct drm_color_lut *color)
 {
return drm_color_lut_extract(color->red, 8) << 16 |
@@ -394,6 +407,13 @@ static u32 i9xx_lut_8(const struct drm_color_lut *color)
drm_color_lut_extract(color->blue, 8);
 }
 
+static void i9xx_lut_8_pack(struct drm_color_lut *entry, u32 val)
+{
+   entry->red = intel_color_lut_pack(REG_FIELD_GET(LGC_PALETTE_RED_MASK, 
val), 8);
+   entry->green = 
intel_color_lut_pack(REG_FIELD_GET(LGC_PALETTE_GREEN_MASK, val), 8);
+   entry->blue = intel_color_lut_pack(REG_FIELD_GET(LGC_PALETTE_BLUE_MASK, 
val), 8);
+}
+
 /* i965+ "10.6" bit interpolated format "even DW" (low 8 bits) */
 static u32 i965_lut_10p6_ldw(const struct drm_color_lut *color)
 {
@@ -410,6 +430,21 @@ static u32 i965_lut_10p6_udw(const struct drm_color_lut 
*color)
(color->blue >> 8);
 }
 
+static void i965_lut_10p6_pack(struct drm_color_lut *entry, u32 ldw, u32 udw)
+{
+   entry->red = REG_FIELD_GET(PALETTE_RED_MASK, udw) << 8 |
+   REG_FIELD_GET(PALETTE_RED_MASK, ldw);
+   entry->green = REG_FIELD_GET(PALETTE_GREEN_MASK, udw) << 8 |
+   REG_FIELD_GET(PALETTE_GREEN_MASK, ldw);
+   entry->blue = REG_FIELD_GET(PALETTE_BLUE_MASK, udw) << 8 |
+   REG_FIELD_GET(PALETTE_BLUE_MASK, ldw);
+}
+
+static u16 i965_lut_11p6_max_pack(u32 val)
+{
+   return REG_FIELD_GET(PIPEGCMAX_RGB_MASK, val);
+}
+
 static u32 ilk_lut_10(const struct drm_color_lut *color)
 {
return drm_color_lut_extract(color->red, 10) << 20 |
@@ -417,6 +452,13 @@ static u32 ilk_lut_10(const struct drm_color_lut *color)
drm_color_lut_extract(color->blue, 10);
 }
 
+static void ilk_lut_10_pack(struct drm_color_lut *entry, u32 val)
+{
+   entry->red = intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_RED_MASK, 
val), 10);
+   entry->green = 
intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_GREEN_MASK, val), 10);
+   entry->blue = 
intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_BLUE_MASK, val), 10);
+}
+
 static void i9xx_color_commit(const struct intel_crtc_state *crtc_state)
 {
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -983,6 +1025,13 @@ static u32 chv_cgm_degamma_udw(const struct drm_color_lut 
*color)
return drm_color_lut_extract(color->red, 14);
 }
 
+static void chv_cgm_gamma_pack(struct drm_color_lut *entry, u32 ldw, u32 udw)
+{
+   entry->green = 
intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_GAMMA_GREEN_MASK, ldw), 10);
+   entry->blue = 
intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_GAMMA_BLUE_MASK, ldw), 10);
+   entry->red = 
intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_GAMMA_RED_MASK, udw), 10);
+}
+
 static void chv_load_cgm_degamma(struct intel_crtc *crtc,
 const struct drm_property_blob *blob)
 {
@@ -1672,19 +1721,6 @@ bool intel_color_lut_equal(struct drm_property_blob 
*blob1,
return true;
 }
 
-/* convert hw value with given bit_precision to lut property val */
-static u32 intel_color_lut_pack(u32 val, int bit_precision)
-{
-   u32 max = 0x >> (16 - bit_precision);
-
-   val = clamp_val(val, 0, max);
-
-   if (bit_precision < 16)
-   val <<= 16 - bit_precision;
-
-   return val;
-}
-
 static struct drm_property_blob *
 i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
 {
@@ -1706,12 +1742,7 @@ i9xx_read_lut_8(const struct intel_crtc_state 
*crtc_state)
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
u32 val = intel_de_read(dev_priv, PALETTE(pipe, i));
 
-   lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
-   LGC_PALETTE_RED_MASK, 
val), 8);
-   lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
- 
LGC_PALETTE_GREEN_MASK, val), 8);
-   lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
-