Re: [Intel-gfx] [PATCH v2 9/9] drm/i915/bxt: add bxt dsi gpio element support

2016-04-04 Thread Ville Syrjälä 
On Fri, Mar 18, 2016 at 01:11:17PM +0200, Jani Nikula wrote:
> Use a table similar to vlv to check for accepted gpio indexes. For now,
> add all, but this list should be trimmed down. Use managed gpio request,
> which will be automatically released when the driver is detached.
> 
> Signed-off-by: Jani Nikula 
> ---
>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 667 
> -
>  1 file changed, 666 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c 
> b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index f8d3f608e9c8..6b8dc15f3656 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -29,6 +29,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -114,6 +115,636 @@ static struct vlv_gpio_map vlv_gpio_table[] = {
>  #define CHV_GPIO_CFG_HIZ 0x8100
>  #define CHV_GPIO_CFG_TX_STATE_SHIFT  1
>  
> +#define BXT_HV_DDI0_DDC_SDA_PIN  187
> +#define BXT_HV_DDI0_DDC_SCL_PIN  188
> +#define BXT_HV_DDI1_DDC_SDA_PIN  189
> +#define BXT_HV_DDI1_DDC_SCL_PIN  190

More magic numbers without explanation. This also suffers from the same
problem that the i2c seq patch has, as in requesting/frobbing random
gpios. We should really use the consumer gpio consumer API I think to
make sure we get the right thing.

> +#define BXT_DBI_SDA_PIN  191
> +#define BXT_DBI_SCL_PIN  192
> +#define BXT_PANEL0_VDDEN_PIN 193
> +#define BXT_PANEL0_BKLTEN_PIN194
> +#define BXT_PANEL0_BKLTCTL_PIN   195
> +#define BXT_PANEL1_VDDEN_PIN 196
> +#define BXT_PANEL1_BKLTEN_PIN197
> +#define BXT_PANEL1_BKLTCTL_PIN   198
> +#define BXT_DBI_CSX_PIN  199
> +#define BXT_DBI_RESX_PIN 200
> +#define BXT_GP_INTD_DSI_TE1_PIN  201
> +#define BXT_GP_INTD_DSI_TE2_PIN  202
> +#define BXT_USB_OC0_B_PIN203
> +#define BXT_USB_OC1_B_PIN204
> +#define BXT_MEX_WAKE0_B_PIN  205
> +#define BXT_MEX_WAKE1_B_PIN  206
> +#define BXT_EMMC0_CLK_PIN156
> +#define BXT_EMMC0_D0_PIN 157
> +#define BXT_EMMC0_D1_PIN 158
> +#define BXT_EMMC0_D2_PIN 159
> +#define BXT_EMMC0_D3_PIN 160
> +#define BXT_EMMC0_D4_PIN 161
> +#define BXT_EMMC0_D5_PIN 162
> +#define BXT_EMMC0_D6_PIN 163
> +#define BXT_EMMC0_D7_PIN 164
> +#define BXT_EMMC0_CMD_PIN165
> +#define BXT_SDIO_CLK_PIN 166
> +#define BXT_SDIO_D0_PIN  167
> +#define BXT_SDIO_D1_PIN  168
> +#define BXT_SDIO_D2_PIN  169
> +#define BXT_SDIO_D3_PIN  170
> +#define BXT_SDIO_CMD_PIN 171
> +#define BXT_SDCARD_CLK_PIN   172
> +#define BXT_SDCARD_D0_PIN173
> +#define BXT_SDCARD_D1_PIN174
> +#define BXT_SDCARD_D2_PIN175
> +#define BXT_SDCARD_D3_PIN176
> +#define BXT_SDCARD_CD_B_PIN  177
> +#define BXT_SDCARD_CMD_PIN   178
> +#define BXT_SDCARD_LVL_CLK_FB_PIN179
> +#define BXT_SDCARD_LVL_CMD_DIR_PIN   180
> +#define BXT_SDCARD_LVL_DAT_DIR_PIN   181
> +#define BXT_EMMC0_STROBE_PIN 182
> +#define BXT_SDIO_PWR_DOWN_B_PIN  183
> +#define BXT_SDCARD_PWR_DOWN_B_PIN184
> +#define BXT_SDCARD_LVL_SEL_PIN   185
> +#define BXT_SDCARD_LVL_WP_PIN186
> +#define BXT_LPSS_I2C0_SDA_PIN124
> +#define BXT_LPSS_I2C0_SCL_PIN125
> +#define BXT_LPSS_I2C1_SDA_PIN126
> +#define BXT_LPSS_I2C1_SCL_PIN127
> +#define BXT_LPSS_I2C2_SDA_PIN128
> +#define BXT_LPSS_I2C2_SCL_PIN129
> +#define BXT_LPSS_I2C3_SDA_PIN130
> +#define BXT_LPSS_I2C3_SCL_PIN131
> +#define BXT_LPSS_I2C4_SDA_PIN132
> +#define BXT_LPSS_I2C4_SCL_PIN133
> +#define BXT_LPSS_I2C5_SDA_PIN134
> +#define BXT_LPSS_I2C5_SCL_PIN135
> +#define BXT_LPSS_I2C6_SDA_PIN136
> +#define BXT_LPSS_I2C6_SCL_PIN137
> +#define BXT_LPSS_I2C7_SDA_PIN138
> +#define BXT_LPSS_I2C7_SCL_PIN139
> +#define BXT_ISH_I2C0_SDA_PIN 140
> +#define BXT_ISH_I2C0_SCL_PIN 141
> +#define BXT_ISH_I2C1_SDA_PIN 142
> +#define BXT_ISH_I2C1_SCL_PIN 143
> +#define BXT_ISH_I2C2_SDA_PIN 144
> +#define BXT_ISH_I2C2_SCL_PIN 145
> +#define BXT_ISH_GPIO_0_PIN   146
> +#define BXT_ISH_GPIO_1_PIN   147
> +#define BXT_ISH_GPIO_2_PIN   148
> +#define BXT_ISH_GPIO_3_PIN   149
> +#define BXT_ISH_GPIO_4_PIN   150
> +#define

Re: [Intel-gfx] [PATCH v2 9/9] drm/i915/bxt: add bxt dsi gpio element support

2016-03-23 Thread Jani Nikula 
On Wed, 23 Mar 2016, Mika Kahola  wrote:
> On Fri, 2016-03-18 at 13:11 +0200, Jani Nikula wrote:
>> Use a table similar to vlv to check for accepted gpio indexes. For now,
>> add all, but this list should be trimmed down. Use managed gpio request,
>> which will be automatically released when the driver is detached.
>> 
>> Signed-off-by: Jani Nikula 
>> ---
>>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 667 
>> -
>>  1 file changed, 666 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c 
>> b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
>> index f8d3f608e9c8..6b8dc15f3656 100644
>> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
>> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
>> @@ -29,6 +29,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>> @@ -114,6 +115,636 @@ static struct vlv_gpio_map vlv_gpio_table[] = {
>>  #define CHV_GPIO_CFG_HIZ0x8100
>>  #define CHV_GPIO_CFG_TX_STATE_SHIFT 1
>>  
>> +#define BXT_HV_DDI0_DDC_SDA_PIN 187
>> +#define BXT_HV_DDI0_DDC_SCL_PIN 188
>> +#define BXT_HV_DDI1_DDC_SDA_PIN 189
>> +#define BXT_HV_DDI1_DDC_SCL_PIN 190
>> +#define BXT_DBI_SDA_PIN 191
>> +#define BXT_DBI_SCL_PIN 192
>> +#define BXT_PANEL0_VDDEN_PIN193
>> +#define BXT_PANEL0_BKLTEN_PIN   194
>> +#define BXT_PANEL0_BKLTCTL_PIN  195
>> +#define BXT_PANEL1_VDDEN_PIN196
>> +#define BXT_PANEL1_BKLTEN_PIN   197
>> +#define BXT_PANEL1_BKLTCTL_PIN  198
>> +#define BXT_DBI_CSX_PIN 199
>> +#define BXT_DBI_RESX_PIN200
>> +#define BXT_GP_INTD_DSI_TE1_PIN 201
>> +#define BXT_GP_INTD_DSI_TE2_PIN 202
>> +#define BXT_USB_OC0_B_PIN   203
>> +#define BXT_USB_OC1_B_PIN   204
>> +#define BXT_MEX_WAKE0_B_PIN 205
>> +#define BXT_MEX_WAKE1_B_PIN 206
>> +#define BXT_EMMC0_CLK_PIN   156
>> +#define BXT_EMMC0_D0_PIN157
>> +#define BXT_EMMC0_D1_PIN158
>> +#define BXT_EMMC0_D2_PIN159
>> +#define BXT_EMMC0_D3_PIN160
>> +#define BXT_EMMC0_D4_PIN161
>> +#define BXT_EMMC0_D5_PIN162
>> +#define BXT_EMMC0_D6_PIN163
>> +#define BXT_EMMC0_D7_PIN164
>> +#define BXT_EMMC0_CMD_PIN   165
>> +#define BXT_SDIO_CLK_PIN166
>> +#define BXT_SDIO_D0_PIN 167
>> +#define BXT_SDIO_D1_PIN 168
>> +#define BXT_SDIO_D2_PIN 169
>> +#define BXT_SDIO_D3_PIN 170
>> +#define BXT_SDIO_CMD_PIN171
>> +#define BXT_SDCARD_CLK_PIN  172
>> +#define BXT_SDCARD_D0_PIN   173
>> +#define BXT_SDCARD_D1_PIN   174
>> +#define BXT_SDCARD_D2_PIN   175
>> +#define BXT_SDCARD_D3_PIN   176
>> +#define BXT_SDCARD_CD_B_PIN 177
>> +#define BXT_SDCARD_CMD_PIN  178
>> +#define BXT_SDCARD_LVL_CLK_FB_PIN   179
>> +#define BXT_SDCARD_LVL_CMD_DIR_PIN  180
>> +#define BXT_SDCARD_LVL_DAT_DIR_PIN  181
>> +#define BXT_EMMC0_STROBE_PIN182
>> +#define BXT_SDIO_PWR_DOWN_B_PIN 183
>> +#define BXT_SDCARD_PWR_DOWN_B_PIN   184
>> +#define BXT_SDCARD_LVL_SEL_PIN  185
>> +#define BXT_SDCARD_LVL_WP_PIN   186
>> +#define BXT_LPSS_I2C0_SDA_PIN   124
>> +#define BXT_LPSS_I2C0_SCL_PIN   125
>> +#define BXT_LPSS_I2C1_SDA_PIN   126
>> +#define BXT_LPSS_I2C1_SCL_PIN   127
>> +#define BXT_LPSS_I2C2_SDA_PIN   128
>> +#define BXT_LPSS_I2C2_SCL_PIN   129
>> +#define BXT_LPSS_I2C3_SDA_PIN   130
>> +#define BXT_LPSS_I2C3_SCL_PIN   131
>> +#define BXT_LPSS_I2C4_SDA_PIN   132
>> +#define BXT_LPSS_I2C4_SCL_PIN   133
>> +#define BXT_LPSS_I2C5_SDA_PIN   134
>> +#define BXT_LPSS_I2C5_SCL_PIN   135
>> +#define BXT_LPSS_I2C6_SDA_PIN   136
>> +#define BXT_LPSS_I2C6_SCL_PIN   137
>> +#define BXT_LPSS_I2C7_SDA_PIN   138
>> +#define BXT_LPSS_I2C7_SCL_PIN   139
>> +#define BXT_ISH_I2C0_SDA_PIN140
>> +#define BXT_ISH_I2C0_SCL_PIN141
>> +#define BXT_ISH_I2C1_SDA_PIN142
>> +#define BXT_ISH_I2C1_SCL_PIN143
>> +#define BXT_ISH_I2C2_SDA_PIN144
>> +#define BXT_ISH_I2C2_SCL_PIN145
>> +#define BXT_ISH_GPIO_0_PIN  146
>> +#define BXT_ISH_GPIO_1_PIN  147
>> +#define BXT_ISH_GPIO_2_PIN  148
>> +#define BXT_ISH_GPIO_3_PIN  149
>> +#define BXT_ISH_GPIO_4_PIN  150
>> +#define BXT_ISH_GPIO_5_PIN  151
>> +#define BXT_ISH_GPIO_6_PIN  152
>> +#define

Re: [Intel-gfx] [PATCH v2 9/9] drm/i915/bxt: add bxt dsi gpio element support

2016-03-23 Thread Mika Kahola 
On Fri, 2016-03-18 at 13:11 +0200, Jani Nikula wrote:
> Use a table similar to vlv to check for accepted gpio indexes. For now,
> add all, but this list should be trimmed down. Use managed gpio request,
> which will be automatically released when the driver is detached.
> 
> Signed-off-by: Jani Nikula 
> ---
>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 667 
> -
>  1 file changed, 666 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c 
> b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index f8d3f608e9c8..6b8dc15f3656 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -29,6 +29,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -114,6 +115,636 @@ static struct vlv_gpio_map vlv_gpio_table[] = {
>  #define CHV_GPIO_CFG_HIZ 0x8100
>  #define CHV_GPIO_CFG_TX_STATE_SHIFT  1
>  
> +#define BXT_HV_DDI0_DDC_SDA_PIN  187
> +#define BXT_HV_DDI0_DDC_SCL_PIN  188
> +#define BXT_HV_DDI1_DDC_SDA_PIN  189
> +#define BXT_HV_DDI1_DDC_SCL_PIN  190
> +#define BXT_DBI_SDA_PIN  191
> +#define BXT_DBI_SCL_PIN  192
> +#define BXT_PANEL0_VDDEN_PIN 193
> +#define BXT_PANEL0_BKLTEN_PIN194
> +#define BXT_PANEL0_BKLTCTL_PIN   195
> +#define BXT_PANEL1_VDDEN_PIN 196
> +#define BXT_PANEL1_BKLTEN_PIN197
> +#define BXT_PANEL1_BKLTCTL_PIN   198
> +#define BXT_DBI_CSX_PIN  199
> +#define BXT_DBI_RESX_PIN 200
> +#define BXT_GP_INTD_DSI_TE1_PIN  201
> +#define BXT_GP_INTD_DSI_TE2_PIN  202
> +#define BXT_USB_OC0_B_PIN203
> +#define BXT_USB_OC1_B_PIN204
> +#define BXT_MEX_WAKE0_B_PIN  205
> +#define BXT_MEX_WAKE1_B_PIN  206
> +#define BXT_EMMC0_CLK_PIN156
> +#define BXT_EMMC0_D0_PIN 157
> +#define BXT_EMMC0_D1_PIN 158
> +#define BXT_EMMC0_D2_PIN 159
> +#define BXT_EMMC0_D3_PIN 160
> +#define BXT_EMMC0_D4_PIN 161
> +#define BXT_EMMC0_D5_PIN 162
> +#define BXT_EMMC0_D6_PIN 163
> +#define BXT_EMMC0_D7_PIN 164
> +#define BXT_EMMC0_CMD_PIN165
> +#define BXT_SDIO_CLK_PIN 166
> +#define BXT_SDIO_D0_PIN  167
> +#define BXT_SDIO_D1_PIN  168
> +#define BXT_SDIO_D2_PIN  169
> +#define BXT_SDIO_D3_PIN  170
> +#define BXT_SDIO_CMD_PIN 171
> +#define BXT_SDCARD_CLK_PIN   172
> +#define BXT_SDCARD_D0_PIN173
> +#define BXT_SDCARD_D1_PIN174
> +#define BXT_SDCARD_D2_PIN175
> +#define BXT_SDCARD_D3_PIN176
> +#define BXT_SDCARD_CD_B_PIN  177
> +#define BXT_SDCARD_CMD_PIN   178
> +#define BXT_SDCARD_LVL_CLK_FB_PIN179
> +#define BXT_SDCARD_LVL_CMD_DIR_PIN   180
> +#define BXT_SDCARD_LVL_DAT_DIR_PIN   181
> +#define BXT_EMMC0_STROBE_PIN 182
> +#define BXT_SDIO_PWR_DOWN_B_PIN  183
> +#define BXT_SDCARD_PWR_DOWN_B_PIN184
> +#define BXT_SDCARD_LVL_SEL_PIN   185
> +#define BXT_SDCARD_LVL_WP_PIN186
> +#define BXT_LPSS_I2C0_SDA_PIN124
> +#define BXT_LPSS_I2C0_SCL_PIN125
> +#define BXT_LPSS_I2C1_SDA_PIN126
> +#define BXT_LPSS_I2C1_SCL_PIN127
> +#define BXT_LPSS_I2C2_SDA_PIN128
> +#define BXT_LPSS_I2C2_SCL_PIN129
> +#define BXT_LPSS_I2C3_SDA_PIN130
> +#define BXT_LPSS_I2C3_SCL_PIN131
> +#define BXT_LPSS_I2C4_SDA_PIN132
> +#define BXT_LPSS_I2C4_SCL_PIN133
> +#define BXT_LPSS_I2C5_SDA_PIN134
> +#define BXT_LPSS_I2C5_SCL_PIN135
> +#define BXT_LPSS_I2C6_SDA_PIN136
> +#define BXT_LPSS_I2C6_SCL_PIN137
> +#define BXT_LPSS_I2C7_SDA_PIN138
> +#define BXT_LPSS_I2C7_SCL_PIN139
> +#define BXT_ISH_I2C0_SDA_PIN 140
> +#define BXT_ISH_I2C0_SCL_PIN 141
> +#define BXT_ISH_I2C1_SDA_PIN 142
> +#define BXT_ISH_I2C1_SCL_PIN 143
> +#define BXT_ISH_I2C2_SDA_PIN 144
> +#define BXT_ISH_I2C2_SCL_PIN 145
> +#define BXT_ISH_GPIO_0_PIN   146
> +#define BXT_ISH_GPIO_1_PIN   147
> +#define BXT_ISH_GPIO_2_PIN   148
> +#define BXT_ISH_GPIO_3_PIN   149
> +#define BXT_ISH_GPIO_4_PIN   150
> +#define BXT_ISH_GPIO_5_PIN   151
> +#define BXT_ISH_GPIO_6_PIN   152
> +#define BXT_ISH_GPIO_7_PIN   153
> +#define BXT_ISH_GPIO_8_PIN   154
> +#define BXT_ISH_GPIO_9_PIN   155
> +#define BXT_AVS_I2S1_MCLK_PIN74
>

[Intel-gfx] [PATCH v2 9/9] drm/i915/bxt: add bxt dsi gpio element support

2016-03-19 Thread Jani Nikula 
Use a table similar to vlv to check for accepted gpio indexes. For now,
add all, but this list should be trimmed down. Use managed gpio request,
which will be automatically released when the driver is detached.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 667 -
 1 file changed, 666 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c 
b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index f8d3f608e9c8..6b8dc15f3656 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -114,6 +115,636 @@ static struct vlv_gpio_map vlv_gpio_table[] = {
 #define CHV_GPIO_CFG_HIZ   0x8100
 #define CHV_GPIO_CFG_TX_STATE_SHIFT1
 
+#define BXT_HV_DDI0_DDC_SDA_PIN187
+#define BXT_HV_DDI0_DDC_SCL_PIN188
+#define BXT_HV_DDI1_DDC_SDA_PIN189
+#define BXT_HV_DDI1_DDC_SCL_PIN190
+#define BXT_DBI_SDA_PIN191
+#define BXT_DBI_SCL_PIN192
+#define BXT_PANEL0_VDDEN_PIN   193
+#define BXT_PANEL0_BKLTEN_PIN  194
+#define BXT_PANEL0_BKLTCTL_PIN 195
+#define BXT_PANEL1_VDDEN_PIN   196
+#define BXT_PANEL1_BKLTEN_PIN  197
+#define BXT_PANEL1_BKLTCTL_PIN 198
+#define BXT_DBI_CSX_PIN199
+#define BXT_DBI_RESX_PIN   200
+#define BXT_GP_INTD_DSI_TE1_PIN201
+#define BXT_GP_INTD_DSI_TE2_PIN202
+#define BXT_USB_OC0_B_PIN  203
+#define BXT_USB_OC1_B_PIN  204
+#define BXT_MEX_WAKE0_B_PIN205
+#define BXT_MEX_WAKE1_B_PIN206
+#define BXT_EMMC0_CLK_PIN  156
+#define BXT_EMMC0_D0_PIN   157
+#define BXT_EMMC0_D1_PIN   158
+#define BXT_EMMC0_D2_PIN   159
+#define BXT_EMMC0_D3_PIN   160
+#define BXT_EMMC0_D4_PIN   161
+#define BXT_EMMC0_D5_PIN   162
+#define BXT_EMMC0_D6_PIN   163
+#define BXT_EMMC0_D7_PIN   164
+#define BXT_EMMC0_CMD_PIN  165
+#define BXT_SDIO_CLK_PIN   166
+#define BXT_SDIO_D0_PIN167
+#define BXT_SDIO_D1_PIN168
+#define BXT_SDIO_D2_PIN169
+#define BXT_SDIO_D3_PIN170
+#define BXT_SDIO_CMD_PIN   171
+#define BXT_SDCARD_CLK_PIN 172
+#define BXT_SDCARD_D0_PIN  173
+#define BXT_SDCARD_D1_PIN  174
+#define BXT_SDCARD_D2_PIN  175
+#define BXT_SDCARD_D3_PIN  176
+#define BXT_SDCARD_CD_B_PIN177
+#define BXT_SDCARD_CMD_PIN 178
+#define BXT_SDCARD_LVL_CLK_FB_PIN  179
+#define BXT_SDCARD_LVL_CMD_DIR_PIN 180
+#define BXT_SDCARD_LVL_DAT_DIR_PIN 181
+#define BXT_EMMC0_STROBE_PIN   182
+#define BXT_SDIO_PWR_DOWN_B_PIN183
+#define BXT_SDCARD_PWR_DOWN_B_PIN  184
+#define BXT_SDCARD_LVL_SEL_PIN 185
+#define BXT_SDCARD_LVL_WP_PIN  186
+#define BXT_LPSS_I2C0_SDA_PIN  124
+#define BXT_LPSS_I2C0_SCL_PIN  125
+#define BXT_LPSS_I2C1_SDA_PIN  126
+#define BXT_LPSS_I2C1_SCL_PIN  127
+#define BXT_LPSS_I2C2_SDA_PIN  128
+#define BXT_LPSS_I2C2_SCL_PIN  129
+#define BXT_LPSS_I2C3_SDA_PIN  130
+#define BXT_LPSS_I2C3_SCL_PIN  131
+#define BXT_LPSS_I2C4_SDA_PIN  132
+#define BXT_LPSS_I2C4_SCL_PIN  133
+#define BXT_LPSS_I2C5_SDA_PIN  134
+#define BXT_LPSS_I2C5_SCL_PIN  135
+#define BXT_LPSS_I2C6_SDA_PIN  136
+#define BXT_LPSS_I2C6_SCL_PIN  137
+#define BXT_LPSS_I2C7_SDA_PIN  138
+#define BXT_LPSS_I2C7_SCL_PIN  139
+#define BXT_ISH_I2C0_SDA_PIN   140
+#define BXT_ISH_I2C0_SCL_PIN   141
+#define BXT_ISH_I2C1_SDA_PIN   142
+#define BXT_ISH_I2C1_SCL_PIN   143
+#define BXT_ISH_I2C2_SDA_PIN   144
+#define BXT_ISH_I2C2_SCL_PIN   145
+#define BXT_ISH_GPIO_0_PIN 146
+#define BXT_ISH_GPIO_1_PIN 147
+#define BXT_ISH_GPIO_2_PIN 148
+#define BXT_ISH_GPIO_3_PIN 149
+#define BXT_ISH_GPIO_4_PIN 150
+#define BXT_ISH_GPIO_5_PIN 151
+#define BXT_ISH_GPIO_6_PIN 152
+#define BXT_ISH_GPIO_7_PIN 153
+#define BXT_ISH_GPIO_8_PIN 154
+#define BXT_ISH_GPIO_9_PIN 155
+#define BXT_AVS_I2S1_MCLK_PIN  74
+#define BXT_AVS_I2S1_BCLK_PIN  75
+#define BXT_AVS_I2S1_WS_SYNC_PIN   76
+#define BXT_AVS_I2S1_SDI_PIN   77
+#define BXT_AVS_I2S1_SDO_PIN   78
+#define BXT_AVS_M_CLK_A1_PIN   79
+#define BXT_AVS_M_CLK_B1_PIN   80
+#define BXT_AVS_M_DATA_1_PIN