Re: [Intel-gfx] [PATCH v3] Support for ns2501 DVO.
Am Sonntag, den 17.06.2012, 21:42 +0200 schrieb Daniel Vetter: > On Sun, Jun 17, 2012 at 09:18:56PM +0200, Paul Menzel wrote: > > you put Daniel address twice into the CC field. > > > > > > Am Sonntag, den 17.06.2012, 20:59 +0200 schrieb Thomas Richter: > > > Includes now proper DPMS support. > > > Includes switching between resolutions - from 640x480 to 1024x768. > > > Currently assumes that the native display resolution is 1024x768. > > > > Please put that after the next paragraph. > > > > > The ns2501 seems to be rather critical - if the output PLL is not > > > running, the chip doesn't seem to be clocked and then doesn't react > > > on i2c messages. Thus, a quick'n-dirty trick ensures that the DVO > > > is active before submitting any i2c messages to it. This is > > > probably to be reviewed. > > > > Such for the commit message unnecessary information goes below the first > > `---` below. > > Fully disagree, this explains why the patch exports a function from > intel_display.c and hence _must_ be part of the commit message. Of course I meant »This is probably to be reviewed.«. > While you resend, can you also please add bug links to the s-o-b section > of your patch? > > > > Signed-Off-by: Thomas Richter > > > --- > > > > Here goes email message information. > > > > > drivers/gpu/drm/i915/Makefile|1 + > > > drivers/gpu/drm/i915/dvo.h |1 + > > > drivers/gpu/drm/i915/dvo_ns2501.c| 566 > > > ++ > > > > Unfortunately you have to resend as v4 since your mailer line wrapped > > this line and others. > > Yeah, patch is corrupted, I guess the easiest thing is to simply append > the file generated with format-patch - I can also slurp that one in. But inline patches are preferred though. Thanks, Paul signature.asc Description: This is a digitally signed message part ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3] Support for ns2501 DVO.
On Sun, Jun 17, 2012 at 09:18:56PM +0200, Paul Menzel wrote: > Dear Thomas, > > > you put Daniel address twice into the CC field. > > > Am Sonntag, den 17.06.2012, 20:59 +0200 schrieb Thomas Richter: > > Includes now proper DPMS support. > > Includes switching between resolutions - from 640x480 to 1024x768. > > Currently assumes that the native display resolution is 1024x768. > > Please put that after the next paragraph. > > > The ns2501 seems to be rather critical - if the output PLL is not > > running, the chip doesn't seem to be clocked and then doesn't react > > on i2c messages. Thus, a quick'n-dirty trick ensures that the DVO > > is active before submitting any i2c messages to it. This is > > probably to be reviewed. > > Such for the commit message unnecessary information goes below the first > `---` below. Fully disagree, this explains why the patch exports a function from intel_display.c and hence _must_ be part of the commit message. While you resend, can you also please add bug links to the s-o-b section of your patch? > > Signed-Off-by: Thomas Richter > > --- > > Here goes email message information. > > > drivers/gpu/drm/i915/Makefile|1 + > > drivers/gpu/drm/i915/dvo.h |1 + > > drivers/gpu/drm/i915/dvo_ns2501.c| 566 > > ++ > > Unfortunately you have to resend as v4 since your mailer line wrapped > this line and others. Yeah, patch is corrupted, I guess the easiest thing is to simply append the file generated with format-patch - I can also slurp that one in. Thanks, Daniel -- Daniel Vetter Mail: dan...@ffwll.ch Mobile: +41 (0)79 365 57 48 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3] Support for ns2501 DVO.
Dear Thomas, you put Daniel address twice into the CC field. Am Sonntag, den 17.06.2012, 20:59 +0200 schrieb Thomas Richter: > Includes now proper DPMS support. > Includes switching between resolutions - from 640x480 to 1024x768. > Currently assumes that the native display resolution is 1024x768. Please put that after the next paragraph. > The ns2501 seems to be rather critical - if the output PLL is not > running, the chip doesn't seem to be clocked and then doesn't react > on i2c messages. Thus, a quick'n-dirty trick ensures that the DVO > is active before submitting any i2c messages to it. This is > probably to be reviewed. Such for the commit message unnecessary information goes below the first `---` below. > Signed-Off-by: Thomas Richter > --- Here goes email message information. > drivers/gpu/drm/i915/Makefile|1 + > drivers/gpu/drm/i915/dvo.h |1 + > drivers/gpu/drm/i915/dvo_ns2501.c| 566 > ++ Unfortunately you have to resend as v4 since your mailer line wrapped this line and others. […] Thanks, Paul signature.asc Description: This is a digitally signed message part ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3] Support for ns2501 DVO.
Includes now proper DPMS support.
Includes switching between resolutions - from 640x480 to 1024x768.
Currently assumes that the native display resolution is 1024x768.
The ns2501 seems to be rather critical - if the output PLL is not
running, the chip doesn't seem to be clocked and then doesn't react
on i2c messages. Thus, a quick'n-dirty trick ensures that the DVO
is active before submitting any i2c messages to it. This is
probably to be reviewed.
Signed-Off-by: Thomas Richter
---
drivers/gpu/drm/i915/Makefile|1 +
drivers/gpu/drm/i915/dvo.h |1 +
drivers/gpu/drm/i915/dvo_ns2501.c| 566
++
drivers/gpu/drm/i915/intel_display.c |4 +-
drivers/gpu/drm/i915/intel_dvo.c | 10 +-
5 files changed, 580 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/i915/dvo_ns2501.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 2e9268d..8e8e41f 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -39,6 +39,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \
dvo_ivch.o \
dvo_tfp410.o \
dvo_sil164.o \
+ dvo_ns2501.o \
i915_gem_dmabuf.o
i915-$(CONFIG_COMPAT) += i915_ioc32.o
diff --git a/drivers/gpu/drm/i915/dvo.h b/drivers/gpu/drm/i915/dvo.h
index 8c2ad01..a2af75c 100644
--- a/drivers/gpu/drm/i915/dvo.h
+++ b/drivers/gpu/drm/i915/dvo.h
@@ -140,5 +140,6 @@ extern struct intel_dvo_dev_ops ch7xxx_ops;
extern struct intel_dvo_dev_ops ivch_ops;
extern struct intel_dvo_dev_ops tfp410_ops;
extern struct intel_dvo_dev_ops ch7017_ops;
+extern struct intel_dvo_dev_ops ns2501_ops;
#endif /* _INTEL_DVO_H */
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c
b/drivers/gpu/drm/i915/dvo_ns2501.c
new file mode 100644
index 000..1b15a23
--- /dev/null
+++ b/drivers/gpu/drm/i915/dvo_ns2501.c
@@ -0,0 +1,566 @@
+/**
+
+Copyright © 2012 Gilles Dartiguelongue, Thomas Richter
+
+All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the
+"Software"), to deal in the Software without restriction, including
+without limitation the rights to use, copy, modify, merge, publish,
+distribute, sub license, and/or sell copies of the Software, and to
+permit persons to whom the Software is furnished to do so, subject to
+the following conditions:
+
+The above copyright notice and this permission notice (including the
+next paragraph) shall be included in all copies or substantial portions
+of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+**/
+
+#include "dvo.h"
+#include "i915_reg.h"
+#include "i915_drv.h"
+
+#define NS2501_VID 0x1305
+#define NS2501_DID 0x6726
+
+#define NS2501_VID_LO 0x00
+#define NS2501_VID_HI 0x01
+#define NS2501_DID_LO 0x02
+#define NS2501_DID_HI 0x03
+#define NS2501_REV 0x04
+#define NS2501_RSVD 0x05
+#define NS2501_FREQ_LO 0x06
+#define NS2501_FREQ_HI 0x07
+
+#define NS2501_REG8 0x08
+#define NS2501_8_VEN (1<<5)
+#define NS2501_8_HEN (1<<4)
+#define NS2501_8_DSEL (1<<3)
+#define NS2501_8_BPAS (1<<2)
+#define NS2501_8_RSVD (1<<1)
+#define NS2501_8_PD (1<<0)
+
+#define NS2501_REG9 0x09
+#define NS2501_9_VLOW (1<<7)
+#define NS2501_9_MSEL_MASK (0x7<<4)
+#define NS2501_9_TSEL (1<<3)
+#define NS2501_9_RSEN (1<<2)
+#define NS2501_9_RSVD (1<<1)
+#define NS2501_9_MDI (1<<0)
+
+#define NS2501_REGC 0x0c
+
+struct ns2501_priv {
+ //I2CDevRec d;
+ bool quiet;
+ int reg_8_shadow;
+ int reg_8_set;
+ // Shadow registers for i915
+ int dvoc;
+ int pll_a;
+ int srcdim;
+ int fw_blc;
+};
+
+#define NSPTR(d) ((NS2501Ptr)(d->DriverPrivate.ptr))
+
+/*
+** Include the PLL launcher prototype
+*/
+extern void intel_enable_pll(struct drm_i915_private *dev_priv, enum
pipe pipe);
+
+/*
+** For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens
+** laptops does not react on the i2c bus unless
+** both the PLL is running and the display is configured in its native
+** resolution.
+** This function forces the DVO on, and stores the registers it touches.
+** Afterwards, registers are restored to regular values.
+**
+** This is pretty much a hack, though it works.
+** Without that, ns2501_readb and ns2501_writeb fail
+** when switching the resolution.
+*/
+
+static void enable_dvo(struct intel_dvo_device *dvo)
+{
+ struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv);
