Re: [Intel-gfx] [PATCH v5 2/8] drm/i915: update the QGV point frequency calculations

2023-05-22 Thread Lisovskiy, Stanislav
On Fri, May 12, 2023 at 02:17:44AM +0300, Vinod Govindapillai wrote:
> From MTL onwwards, pcode locks the QGV point based on peak BW of
> the intended QGV point passed by the driver. So the peak BW
> calculation must match the value expected by the pcode. Update
> the calculations as per the Bspec.
> 
> v2: use DIV_ROUND_* macro for the calculations (Ville)
> 
> Bspec: 64636
> 
> Signed-off-by: Vinod Govindapillai 

Reviewed-by: Stanislav Lisovskiy 

> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
> b/drivers/gpu/drm/i915/display/intel_bw.c
> index ab405c48ca3a..c8075a37c3ab 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -182,7 +182,7 @@ static int mtl_read_qgv_point_info(struct 
> drm_i915_private *dev_priv,
>   val2 = intel_uncore_read(&dev_priv->uncore,
>MTL_MEM_SS_INFO_QGV_POINT_HIGH(point));
>   dclk = REG_FIELD_GET(MTL_DCLK_MASK, val);
> - sp->dclk = DIV_ROUND_UP((16667 * dclk), 1000);
> + sp->dclk = DIV_ROUND_CLOSEST(16667 * dclk + 500, 1000);
>   sp->t_rp = REG_FIELD_GET(MTL_TRP_MASK, val);
>   sp->t_rcd = REG_FIELD_GET(MTL_TRCD_MASK, val);
>  
> -- 
> 2.34.1
> 


[Intel-gfx] [PATCH v5 2/8] drm/i915: update the QGV point frequency calculations

2023-05-11 Thread Vinod Govindapillai
>From MTL onwwards, pcode locks the QGV point based on peak BW of
the intended QGV point passed by the driver. So the peak BW
calculation must match the value expected by the pcode. Update
the calculations as per the Bspec.

v2: use DIV_ROUND_* macro for the calculations (Ville)

Bspec: 64636

Signed-off-by: Vinod Govindapillai 
---
 drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
b/drivers/gpu/drm/i915/display/intel_bw.c
index ab405c48ca3a..c8075a37c3ab 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -182,7 +182,7 @@ static int mtl_read_qgv_point_info(struct drm_i915_private 
*dev_priv,
val2 = intel_uncore_read(&dev_priv->uncore,
 MTL_MEM_SS_INFO_QGV_POINT_HIGH(point));
dclk = REG_FIELD_GET(MTL_DCLK_MASK, val);
-   sp->dclk = DIV_ROUND_UP((16667 * dclk), 1000);
+   sp->dclk = DIV_ROUND_CLOSEST(16667 * dclk + 500, 1000);
sp->t_rp = REG_FIELD_GET(MTL_TRP_MASK, val);
sp->t_rcd = REG_FIELD_GET(MTL_TRCD_MASK, val);
 
-- 
2.34.1