Re: [Intel-gfx] [PATCH v5 7/7] drm/i915/gt: Adding new sysfs frequency attributes
On 3/13/2022 5:38 PM, Andi Shyti wrote:
Hi Michal,
[...]
+static ssize_t punit_req_freq_mhz_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ u32 preq = intel_rps_read_punit_req_frequency(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%d\n", preq);
%u since preq is u32
and use sysfs_emit (also in below show functions)
sure! I'll change them.
[...]
static int intel_sysfs_rps_init(struct intel_gt *gt, struct kobject *kobj,
const struct attribute * const *attrs)
{
@@ -493,4 +628,11 @@ void intel_gt_sysfs_pm_init(struct intel_gt *gt, struct
kobject *kobj)
if (ret)
drm_warn(>i915->drm,
"failed to create gt%u RPS sysfs files", gt->info.id);
+
+ ret = sysfs_create_files(kobj, freq_attrs);
+ if (ret)
+ drm_warn(>i915->drm,
+"failed to create gt%u throttle sysfs files",
+gt->info.id);
nit: would be nice to see %pe why it failed
[...]
I will add it to the other cases as well.
+static u32 __rps_read_mmio(struct intel_gt *gt, i915_reg_t reg32)
this doesn't look like "rps" helper, rather like "gt" so it should have
different prefix and maybe even be exported by the gt or uncore ?
unless you wanted:
static u32 __rps_read_mmio(struct intel_rps *rps, i915_reg_t reg32)
{
struct intel_gt *gt = rps_to_gt(rps);
+{
+ intel_wakeref_t wakeref;
+ u32 val;
+
+ with_intel_runtime_pm(gt->uncore->rpm, wakeref)
+ val = intel_uncore_read(gt->uncore, reg32);
+
+ return val;
+}
Yes, you are right!
@Sujaritha: shall I move "__rps_read_mmio()" in intel_gt.c and
call it intel_gt_read_mmio()?
[...]
Sure since it is kind of a gt helper, makes sense to have gt prefix.
+u32 intel_rps_read_throttle_reason_vr_thermalert(struct intel_rps *rps)
+{
+ struct intel_gt *gt = rps_to_gt(rps);
+ u32 thermalert = __rps_read_mmio(gt, GT0_PERF_LIMIT_REASONS) &
VR_THERMALERT_MASK;
+
+ return thermalert;
+}
shouldn't we return bool by all of these functions as used/expected in
show() counterparts ?
Suja?
[...]
Yes we can make this bool as well.
+#define GT0_PERF_LIMIT_REASONS _MMIO(0x1381A8)
+#define GT0_PERF_LIMIT_REASONS_MASK 0x0de3
this mask is different that other (FIELD_PREP/GET wont work) so maybe we
should name it in special way ?
As far as I understood this is still a mask and used as such.
This mask is actually telling that there is some throttling going
on.
It looks weird because there are some unwanted bits in between
the interesting bits.
+#define PROCHOT_MASK BIT(1)
+#define THERMAL_LIMIT_MASK BIT(2)
+#define RATL_MASKBIT(6)
+#define VR_THERMALERT_MASK BIT(7)
+#define VR_TDC_MASK BIT(8)
+#define POWER_LIMIT_4_MASK BIT(9)
+#define POWER_LIMIT_1_MASK BIT(11)
+#define POWER_LIMIT_2_MASK BIT(12)
REG_BIT ?
yes!
Thanks, Michal!
Andi
Re: [Intel-gfx] [PATCH v5 7/7] drm/i915/gt: Adding new sysfs frequency attributes
Hi Michal,
[...]
> > +static ssize_t punit_req_freq_mhz_show(struct device *dev,
> > + struct device_attribute *attr,
> > + char *buff)
> > +{
> > + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
> > + struct intel_rps *rps = >rps;
> > + u32 preq = intel_rps_read_punit_req_frequency(rps);
> > +
> > + return scnprintf(buff, PAGE_SIZE, "%d\n", preq);
>
> %u since preq is u32
>
> and use sysfs_emit (also in below show functions)
sure! I'll change them.
[...]
> > static int intel_sysfs_rps_init(struct intel_gt *gt, struct kobject *kobj,
> > const struct attribute * const *attrs)
> > {
> > @@ -493,4 +628,11 @@ void intel_gt_sysfs_pm_init(struct intel_gt *gt,
> > struct kobject *kobj)
> > if (ret)
> > drm_warn(>i915->drm,
> > "failed to create gt%u RPS sysfs files", gt->info.id);
> > +
> > + ret = sysfs_create_files(kobj, freq_attrs);
> > + if (ret)
> > + drm_warn(>i915->drm,
> > +"failed to create gt%u throttle sysfs files",
> > +gt->info.id);
>
> nit: would be nice to see %pe why it failed
[...]
I will add it to the other cases as well.
> > +static u32 __rps_read_mmio(struct intel_gt *gt, i915_reg_t reg32)
>
> this doesn't look like "rps" helper, rather like "gt" so it should have
> different prefix and maybe even be exported by the gt or uncore ?
>
> unless you wanted:
>
> static u32 __rps_read_mmio(struct intel_rps *rps, i915_reg_t reg32)
> {
> struct intel_gt *gt = rps_to_gt(rps);
>
> > +{
> > + intel_wakeref_t wakeref;
> > + u32 val;
> > +
> > + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> > + val = intel_uncore_read(gt->uncore, reg32);
> > +
> > + return val;
> > +}
Yes, you are right!
@Sujaritha: shall I move "__rps_read_mmio()" in intel_gt.c and
call it intel_gt_read_mmio()?
[...]
> > +u32 intel_rps_read_throttle_reason_vr_thermalert(struct intel_rps *rps)
> > +{
> > + struct intel_gt *gt = rps_to_gt(rps);
> > + u32 thermalert = __rps_read_mmio(gt, GT0_PERF_LIMIT_REASONS) &
> > VR_THERMALERT_MASK;
> > +
> > + return thermalert;
> > +}
>
> shouldn't we return bool by all of these functions as used/expected in
> show() counterparts ?
Suja?
[...]
> > +#define GT0_PERF_LIMIT_REASONS _MMIO(0x1381A8)
> > +#define GT0_PERF_LIMIT_REASONS_MASK 0x0de3
>
> this mask is different that other (FIELD_PREP/GET wont work) so maybe we
> should name it in special way ?
As far as I understood this is still a mask and used as such.
This mask is actually telling that there is some throttling going
on.
It looks weird because there are some unwanted bits in between
the interesting bits.
> > +#define PROCHOT_MASK BIT(1)
> > +#define THERMAL_LIMIT_MASK BIT(2)
> > +#define RATL_MASKBIT(6)
> > +#define VR_THERMALERT_MASK BIT(7)
> > +#define VR_TDC_MASK BIT(8)
> > +#define POWER_LIMIT_4_MASK BIT(9)
> > +#define POWER_LIMIT_1_MASK BIT(11)
> > +#define POWER_LIMIT_2_MASK BIT(12)
>
> REG_BIT ?
yes!
Thanks, Michal!
Andi
Re: [Intel-gfx] [PATCH v5 7/7] drm/i915/gt: Adding new sysfs frequency attributes
On 17.02.2022 15:41, Andi Shyti wrote:
From: Sujaritha Sundaresan
This patch adds the following new sysfs frequency attributes;
- punit_req_freq_mhz
- throttle_reason_status
- throttle_reason_pl1
- throttle_reason_pl2
- throttle_reason_pl4
- throttle_reason_thermal
- throttle_reason_prochot
- throttle_reason_ratl
- throttle_reason_vr_thermalert
- throttle_reason_vr_tdc
Signed-off-by: Sujaritha Sundaresan
Signed-off-by: Andi Shyti
Cc: Dale B Stimson
---
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 142
drivers/gpu/drm/i915/gt/intel_rps.c | 83
drivers/gpu/drm/i915/gt/intel_rps.h | 10 ++
drivers/gpu/drm/i915/i915_reg.h | 11 ++
4 files changed, 246 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
index 8e86b8f675f1..8be676cd1607 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
@@ -463,6 +463,141 @@ static ssize_t rps_rp_mhz_show(struct device *dev,
static const struct attribute * const gen6_rps_attrs[] = GEN6_RPS_ATTR;
static const struct attribute * const gen6_gt_attrs[] = GEN6_GT_ATTR;
+static ssize_t punit_req_freq_mhz_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ u32 preq = intel_rps_read_punit_req_frequency(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%d\n", preq);
+}
+
+static ssize_t throttle_reason_status_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool status = !!intel_rps_read_throttle_reason_status(rps);
!! is not necessary if you assign to bool variable, here and below.
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", status);
+}
+
+static ssize_t throttle_reason_pl1_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool pl1 = !!intel_rps_read_throttle_reason_pl1(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", pl1);
+}
+
+static ssize_t throttle_reason_pl2_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool pl2 = !!intel_rps_read_throttle_reason_pl2(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", pl2);
+}
+
+static ssize_t throttle_reason_pl4_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool pl4 = !!intel_rps_read_throttle_reason_pl4(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", pl4);
+}
+
+static ssize_t throttle_reason_thermal_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool thermal = !!intel_rps_read_throttle_reason_thermal(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", thermal);
+}
+
+static ssize_t throttle_reason_prochot_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool prochot = !!intel_rps_read_throttle_reason_prochot(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", prochot);
+}
+
+static ssize_t throttle_reason_ratl_show(struct device *dev,
+struct device_attribute *attr,
+char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool ratl = !!intel_rps_read_throttle_reason_ratl(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", ratl);
+}
+
+static ssize_t throttle_reason_vr_thermalert_show(struct device *dev,
+
Re: [Intel-gfx] [PATCH v5 7/7] drm/i915/gt: Adding new sysfs frequency attributes
On 17.02.2022 15:41, Andi Shyti wrote:
> From: Sujaritha Sundaresan
>
> This patch adds the following new sysfs frequency attributes;
> - punit_req_freq_mhz
> - throttle_reason_status
> - throttle_reason_pl1
> - throttle_reason_pl2
> - throttle_reason_pl4
> - throttle_reason_thermal
> - throttle_reason_prochot
> - throttle_reason_ratl
> - throttle_reason_vr_thermalert
> - throttle_reason_vr_tdc
>
> Signed-off-by: Sujaritha Sundaresan
> Signed-off-by: Andi Shyti
> Cc: Dale B Stimson
> ---
> drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 142
> drivers/gpu/drm/i915/gt/intel_rps.c | 83
> drivers/gpu/drm/i915/gt/intel_rps.h | 10 ++
> drivers/gpu/drm/i915/i915_reg.h | 11 ++
> 4 files changed, 246 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> index 8e86b8f675f1..8be676cd1607 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
> @@ -463,6 +463,141 @@ static ssize_t rps_rp_mhz_show(struct device *dev,
> static const struct attribute * const gen6_rps_attrs[] = GEN6_RPS_ATTR;
> static const struct attribute * const gen6_gt_attrs[] = GEN6_GT_ATTR;
>
> +static ssize_t punit_req_freq_mhz_show(struct device *dev,
> +struct device_attribute *attr,
> +char *buff)
> +{
> + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
> + struct intel_rps *rps = >rps;
> + u32 preq = intel_rps_read_punit_req_frequency(rps);
> +
> + return scnprintf(buff, PAGE_SIZE, "%d\n", preq);
%u since preq is u32
and use sysfs_emit (also in below show functions)
> +}
> +
> +static ssize_t throttle_reason_status_show(struct device *dev,
> +struct device_attribute *attr,
> +char *buff)
> +{
> + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
> + struct intel_rps *rps = >rps;
> + bool status = !!intel_rps_read_throttle_reason_status(rps);
> +
> + return scnprintf(buff, PAGE_SIZE, "%u\n", status);
> +}
> +
> +static ssize_t throttle_reason_pl1_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buff)
> +{
> + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
> + struct intel_rps *rps = >rps;
> + bool pl1 = !!intel_rps_read_throttle_reason_pl1(rps);
> +
> + return scnprintf(buff, PAGE_SIZE, "%u\n", pl1);
> +}
> +
> +static ssize_t throttle_reason_pl2_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buff)
> +{
> + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
> + struct intel_rps *rps = >rps;
> + bool pl2 = !!intel_rps_read_throttle_reason_pl2(rps);
> +
> + return scnprintf(buff, PAGE_SIZE, "%u\n", pl2);
> +}
> +
> +static ssize_t throttle_reason_pl4_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buff)
> +{
> + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
> + struct intel_rps *rps = >rps;
> + bool pl4 = !!intel_rps_read_throttle_reason_pl4(rps);
> +
> + return scnprintf(buff, PAGE_SIZE, "%u\n", pl4);
> +}
> +
> +static ssize_t throttle_reason_thermal_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buff)
> +{
> + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
> + struct intel_rps *rps = >rps;
> + bool thermal = !!intel_rps_read_throttle_reason_thermal(rps);
> +
> + return scnprintf(buff, PAGE_SIZE, "%u\n", thermal);
> +}
> +
> +static ssize_t throttle_reason_prochot_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buff)
> +{
> + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
> + struct intel_rps *rps = >rps;
> + bool prochot = !!intel_rps_read_throttle_reason_prochot(rps);
> +
> + return scnprintf(buff, PAGE_SIZE, "%u\n", prochot);
> +}
> +
> +static ssize_t throttle_reason_ratl_show(struct device *dev,
> + struct device_attribute *attr,
> + char *buff)
> +{
> + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
> + struct intel_rps *rps = >rps;
> + bool ratl = !!intel_rps_read_throttle_reason_ratl(rps);
> +
> + return scnprintf(buff, PAGE_SIZE, "%u\n", ratl);
> +}
> +
Re: [Intel-gfx] [PATCH v5 7/7] drm/i915/gt: Adding new sysfs frequency attributes
On 2/17/2022 7:45 AM, Andi Shyti wrote:
Hi,
I forgot to add some note to this patch...
[...]
+static ssize_t throttle_reason_status_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool status = !!intel_rps_read_throttle_reason_status(rps);
why are these boolean? Can't we send whatever we read from the
register?
Didn't want to report out the register mask value since the sysfs is
supposed to a 0/1 status.
[...]
+#define GT0_PERF_LIMIT_REASONS _MMIO(0x1381A8)
+#define GT0_PERF_LIMIT_REASONS_MASK 0x0de3
This mask is really weird! Sujaritha, can you please explain it?
It looks something like this,
REG_GENMASK(11, 6) | REG_GENMASK(2, 0)
But I don't know if it improves any readability, in any case, the
mask is not clear.
This is meant to be an overall status flag as a one stop shop check for
any kind of throttling.
+#define PROCHOT_MASK BIT(1)
+#define THERMAL_LIMIT_MASK BIT(2)
+#define RATL_MASKBIT(6)
+#define VR_THERMALERT_MASK BIT(7)
+#define VR_TDC_MASK BIT(8)
+#define POWER_LIMIT_4_MASK BIT(9)
+#define POWER_LIMIT_1_MASK BIT(11)
+#define POWER_LIMIT_2_MASK BIT(12)
I hope I got these right. Sujaritha, can you please check?
Andi
Yes these are correct.
Thanks,
Suja
Re: [Intel-gfx] [PATCH v5 7/7] drm/i915/gt: Adding new sysfs frequency attributes
Hi,
I forgot to add some note to this patch...
[...]
> +static ssize_t throttle_reason_status_show(struct device *dev,
> +struct device_attribute *attr,
> +char *buff)
> +{
> + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
> + struct intel_rps *rps = >rps;
> + bool status = !!intel_rps_read_throttle_reason_status(rps);
why are these boolean? Can't we send whatever we read from the
register?
[...]
> +#define GT0_PERF_LIMIT_REASONS _MMIO(0x1381A8)
> +#define GT0_PERF_LIMIT_REASONS_MASK0x0de3
This mask is really weird! Sujaritha, can you please explain it?
It looks something like this,
REG_GENMASK(11, 6) | REG_GENMASK(2, 0)
But I don't know if it improves any readability, in any case, the
mask is not clear.
> +#define PROCHOT_MASK BIT(1)
> +#define THERMAL_LIMIT_MASK BIT(2)
> +#define RATL_MASK BIT(6)
> +#define VR_THERMALERT_MASK BIT(7)
> +#define VR_TDC_MASKBIT(8)
> +#define POWER_LIMIT_4_MASK BIT(9)
> +#define POWER_LIMIT_1_MASK BIT(11)
> +#define POWER_LIMIT_2_MASK BIT(12)
I hope I got these right. Sujaritha, can you please check?
Andi
[Intel-gfx] [PATCH v5 7/7] drm/i915/gt: Adding new sysfs frequency attributes
From: Sujaritha Sundaresan
This patch adds the following new sysfs frequency attributes;
- punit_req_freq_mhz
- throttle_reason_status
- throttle_reason_pl1
- throttle_reason_pl2
- throttle_reason_pl4
- throttle_reason_thermal
- throttle_reason_prochot
- throttle_reason_ratl
- throttle_reason_vr_thermalert
- throttle_reason_vr_tdc
Signed-off-by: Sujaritha Sundaresan
Signed-off-by: Andi Shyti
Cc: Dale B Stimson
---
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 142
drivers/gpu/drm/i915/gt/intel_rps.c | 83
drivers/gpu/drm/i915/gt/intel_rps.h | 10 ++
drivers/gpu/drm/i915/i915_reg.h | 11 ++
4 files changed, 246 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
index 8e86b8f675f1..8be676cd1607 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
@@ -463,6 +463,141 @@ static ssize_t rps_rp_mhz_show(struct device *dev,
static const struct attribute * const gen6_rps_attrs[] = GEN6_RPS_ATTR;
static const struct attribute * const gen6_gt_attrs[] = GEN6_GT_ATTR;
+static ssize_t punit_req_freq_mhz_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ u32 preq = intel_rps_read_punit_req_frequency(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%d\n", preq);
+}
+
+static ssize_t throttle_reason_status_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool status = !!intel_rps_read_throttle_reason_status(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", status);
+}
+
+static ssize_t throttle_reason_pl1_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool pl1 = !!intel_rps_read_throttle_reason_pl1(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", pl1);
+}
+
+static ssize_t throttle_reason_pl2_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool pl2 = !!intel_rps_read_throttle_reason_pl2(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", pl2);
+}
+
+static ssize_t throttle_reason_pl4_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool pl4 = !!intel_rps_read_throttle_reason_pl4(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", pl4);
+}
+
+static ssize_t throttle_reason_thermal_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool thermal = !!intel_rps_read_throttle_reason_thermal(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", thermal);
+}
+
+static ssize_t throttle_reason_prochot_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool prochot = !!intel_rps_read_throttle_reason_prochot(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", prochot);
+}
+
+static ssize_t throttle_reason_ratl_show(struct device *dev,
+struct device_attribute *attr,
+char *buff)
+{
+ struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name);
+ struct intel_rps *rps = >rps;
+ bool ratl = !!intel_rps_read_throttle_reason_ratl(rps);
+
+ return scnprintf(buff, PAGE_SIZE, "%u\n", ratl);
+}
+
+static ssize_t throttle_reason_vr_thermalert_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buff)
+{
+ struct intel_gt
