Re: [Intel-gfx] [PATCH v6 05/10] drm/i915/dsb: Check DSB engine status.

[Sharma, Shashank]

On 9/12/2019 12:41 AM, Animesh Manna wrote:

As per bspec check for DSB status before programming any
of its register. Inline function added to check the dsb status.

Cc: Michel Thierry 
Cc: Jani Nikula 
Cc: Rodrigo Vivi 
Cc: Shashank Sharma 
Signed-off-by: Animesh Manna 
---
  drivers/gpu/drm/i915/display/intel_dsb.c | 9 +
  drivers/gpu/drm/i915/i915_reg.h  | 7 +++
  2 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c 
b/drivers/gpu/drm/i915/display/intel_dsb.c
index 9e2927f869b9..b1da2b06263a 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -17,6 +17,15 @@
  #define DSB_BYTE_EN_SHIFT 20
  #define DSB_REG_VALUE_MASK0xf
  
+static inline bool is_dsb_busy(struct intel_dsb *dsb)

+{
+   struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
+   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+   enum pipe pipe = crtc->pipe;
+
+   return DSB_STATUS & I915_READ(DSB_CTRL(pipe, dsb->id));
+}
+
  struct intel_dsb *
  intel_dsb_get(struct intel_crtc *crtc)
  {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bf37ecebc82f..9188a0b53538 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -11683,4 +11683,11 @@ enum skl_power_gate {
  #define PORT_TX_DFLEXDPCSSS(fia)  _MMIO_FIA((fia), 0x00894)
  #define   DP_PHY_MODE_STATUS_NOT_SAFE(tc_port)(1 << (tc_port))
  
+/* This register controls the Display State Buffer (DSB) engines. */

+#define _DSBSL_INSTANCE_BASE   0x70B00
+#define DSBSL_INSTANCE(pipe, id)   (_DSBSL_INSTANCE_BASE + \
+(pipe) * 0x1000 + (id) * 100)
+#define DSB_CTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x8)
+#define   DSB_STATUS   (1 << 0)
+
  #endif /* _I915_REG_H_ */


Looks good to me,

Please feel free to use Reviewed-by: Shashank Sharma 



- Shashank

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[Intel-gfx] [PATCH v6 05/10] drm/i915/dsb: Check DSB engine status.

[Animesh Manna]

As per bspec check for DSB status before programming any
of its register. Inline function added to check the dsb status.

Cc: Michel Thierry 
Cc: Jani Nikula 
Cc: Rodrigo Vivi 
Cc: Shashank Sharma 
Signed-off-by: Animesh Manna 
---
 drivers/gpu/drm/i915/display/intel_dsb.c | 9 +
 drivers/gpu/drm/i915/i915_reg.h  | 7 +++
 2 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c 
b/drivers/gpu/drm/i915/display/intel_dsb.c
index 9e2927f869b9..b1da2b06263a 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -17,6 +17,15 @@
 #define DSB_BYTE_EN_SHIFT  20
 #define DSB_REG_VALUE_MASK 0xf
 
+static inline bool is_dsb_busy(struct intel_dsb *dsb)
+{
+   struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
+   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+   enum pipe pipe = crtc->pipe;
+
+   return DSB_STATUS & I915_READ(DSB_CTRL(pipe, dsb->id));
+}
+
 struct intel_dsb *
 intel_dsb_get(struct intel_crtc *crtc)
 {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bf37ecebc82f..9188a0b53538 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -11683,4 +11683,11 @@ enum skl_power_gate {
 #define PORT_TX_DFLEXDPCSSS(fia)   _MMIO_FIA((fia), 0x00894)
 #define   DP_PHY_MODE_STATUS_NOT_SAFE(tc_port) (1 << (tc_port))
 
+/* This register controls the Display State Buffer (DSB) engines. */
+#define _DSBSL_INSTANCE_BASE   0x70B00
+#define DSBSL_INSTANCE(pipe, id)   (_DSBSL_INSTANCE_BASE + \
+(pipe) * 0x1000 + (id) * 100)
+#define DSB_CTRL(pipe, id) _MMIO(DSBSL_INSTANCE(pipe, id) + 0x8)
+#define   DSB_STATUS   (1 << 0)
+
 #endif /* _I915_REG_H_ */
-- 
2.22.0

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