[Intel-gfx] [PATCH v6 3/9] drm/i915/gt: Ensure memory quiesced before invalidation

2023-07-20 Thread Andi Shyti
From: Jonathan Cavitt 

All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.

Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Jonathan Cavitt 
Signed-off-by: Andi Shyti 
Cc:  # v5.8+
Reviewed-by: Nirmoy Das 
Reviewed-by: Andrzej Hajda 
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c 
b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 0d4d5e0407a2d..5fbc3f630f32b 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -202,7 +202,11 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
 {
struct intel_engine_cs *engine = rq->engine;
 
-   if (mode & EMIT_FLUSH) {
+   /*
+* On Aux CCS platforms the invalidation of the Aux
+* table requires quiescing memory traffic beforehand
+*/
+   if (mode & EMIT_FLUSH || HAS_AUX_CCS(engine->i915)) {
u32 flags = 0;
int err;
u32 *cs;
-- 
2.40.1



[Intel-gfx] [PATCH v6 3/9] drm/i915/gt: Ensure memory quiesced before invalidation

2023-07-19 Thread Andi Shyti
From: Jonathan Cavitt 

All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.

Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Jonathan Cavitt 
Signed-off-by: Andi Shyti 
Cc:  # v5.8+
Reviewed-by: Nirmoy Das 
Reviewed-by: Andrzej Hajda 
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c 
b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 0d4d5e0407a2d..5fbc3f630f32b 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -202,7 +202,11 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
 {
struct intel_engine_cs *engine = rq->engine;
 
-   if (mode & EMIT_FLUSH) {
+   /*
+* On Aux CCS platforms the invalidation of the Aux
+* table requires quiescing memory traffic beforehand
+*/
+   if (mode & EMIT_FLUSH || HAS_AUX_CCS(engine->i915)) {
u32 flags = 0;
int err;
u32 *cs;
-- 
2.40.1