[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Refactor Gen11+ SAGV support (rev2)
== Series Details == Series: Refactor Gen11+ SAGV support (rev2) URL : https://patchwork.freedesktop.org/series/73703/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Start passing latency as parameter Okay! Commit: drm/i915: Introduce skl_plane_wm_level accessor. Okay! Commit: drm/i915: Init obj state in intel_atomic_get_old/new_global_obj_state Okay! Commit: drm/i915: Refactor intel_can_enable_sagv +drivers/gpu/drm/i915/intel_pm.c:3851:6: warning: symbol 'intel_compute_sagv_mask' was not declared. Should it be static? +drivers/gpu/drm/i915/intel_pm.c:3905:6: warning: symbol 'intel_calculate_sagv_result' was not declared. Should it be static? Commit: drm/i915: Added required new PCode commands Okay! Commit: drm/i915: Restrict qgv points which don't have enough bandwidth. Okay! Commit: drm/i915: Enable SAGV support for Gen12 Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Refactor Gen11+ SAGV support (rev2)
== Series Details == Series: Refactor Gen11+ SAGV support (rev2) URL : https://patchwork.freedesktop.org/series/72923/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Start passing latency as parameter Okay! Commit: drm/i915: Introduce skl_plane_wm_level accessor. Okay! Commit: drm/i915: Init obj state in intel_atomic_get_old/new_global_obj_state Okay! Commit: drm/i915: Refactor intel_can_enable_sagv +drivers/gpu/drm/i915/intel_pm.c:3859:6: warning: symbol 'intel_compute_sagv_mask' was not declared. Should it be static? Commit: drm/i915: Added required new PCode commands Okay! Commit: drm/i915: Restrict qgv points which don't have enough bandwidth. Okay! Commit: drm/i915: Enable SAGV support for Gen12 Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
