Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add GuC Error Capture Support (rev2)
I shall fix the length line warnings.
However i shall not fix the " WARNING:OOM_MESSAGE: Possible unnecessary
'out of memory' message" warnings for reasons as stated because the
caller function is not reporting the OOM error and because if such an
error occurs, the ADS function that populates the offsets for the
error-capture register list will default to the null list. And even if
the null list had failed to allocate, the ADS routine would have been
able to use the initial empty error-capture region that would have been
interpreted as a null list. The reason why i still DO want the drm_dbg
(as opposed to a drm_warn) is because I am assuming the the definition
of "i915s normal operation" does not include guaranteeing a valid
error-capture dump since this would be a driver error-handling-condition..
...alan
On 3/15/2022 11:24 AM, Patchwork wrote:
== Series Details ==
Series: Add GuC Error Capture Support (rev2)
URL : https://patchwork.freedesktop.org/series/101348/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
41d2f067e825 drm/i915/guc: Update GuC ADS size for error capture lists
-:40: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#40:
new file mode 100644
-:324: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#324: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:653:
+ ads_blob_write(guc, ads.capture_class[i][j],
ads_ggtt + capture_offset);
-:345: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#345: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:674:
+ ads_blob_write(guc, ads.capture_instance[i][j],
ads_ggtt + capture_offset);
-:469: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'regslist' - possible
side-effects?
#469: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:63:
+#define MAKE_REGLIST(regslist, regsowner, regstype, class) \
+ { \
+ regslist, \
+ ARRAY_SIZE(regslist), \
+ TO_GCAP_DEF_OWNER(regsowner), \
+ TO_GCAP_DEF_TYPE(regstype), \
+ class, \
+ }
-:513: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional
statements (16, 16)
#513: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:107:
+ if (reglists[i].owner == owner && reglists[i].type == type &&
[...]
+ return [i];
-:689: WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
#689: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:283:
+ if (!caplist) {
+ drm_dbg(>drm, "GuC-capture: failed to alloc cached
caplist");
-:731: WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
#731: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:325:
+ if (!null_header) {
+ drm_dbg(>drm, "GuC-capture: failed to alloc cached
nulllist");
total: 0 errors, 6 warnings, 1 checks, 749 lines checked
7b2eb12974e1 drm/i915/guc: Add XE_LP static registers for GuC error capture.
-:26: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in
parentheses
#26: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:25:
+#define COMMON_GEN12BASE_GLOBAL() \
+ {GEN12_FAULT_TLB_DATA0,0, 0, "GEN12_FAULT_TLB_DATA0"}, \
+ {GEN12_FAULT_TLB_DATA1,0, 0, "GEN12_FAULT_TLB_DATA1"}, \
+ {FORCEWAKE_MT, 0, 0, "FORCEWAKE"}, \
+ {GEN12_AUX_ERR_DBG,0, 0, "AUX_ERR_DBG"}, \
+ {GEN12_GAM_DONE, 0, 0, "GAM_DONE"}, \
+ {GEN12_RING_FAULT_REG, 0, 0, "FAULT_REG"}
-:34: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in
parentheses
#34: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:33:
+#define COMMON_GEN12BASE_ENGINE_INSTANCE() \
+ {RING_PSMI_CTL(0), 0, 0, "RC PSMI"}, \
+ {RING_ESR(0), 0, 0, "ESR"}, \
+ {RING_DMA_FADD(0), 0, 0, "RING_DMA_FADD_LDW"}, \
+ {RING_DMA_FADD_UDW(0), 0, 0, "RING_DMA_FADD_UDW"}, \
+ {RING_IPEIR(0),0, 0, "IPEIR"}, \
+ {RING_IPEHR(0),0, 0, "IPEHR"}, \
+ {RING_INSTPS(0), 0, 0, "INSTPS"}, \
+ {RING_BBADDR(0), 0, 0, "RING_BBADDR_LOW32"}, \
+ {RING_BBADDR_UDW(0), 0, 0, "RING_BBADDR_UP32"}, \
+ {RING_BBSTATE(0), 0, 0, "BB_STATE"}, \
+ {CCID(0), 0, 0, "CCID"}, \
+ {RING_ACTHD(0),0, 0, "ACTHD_LDW"}, \
+ {RING_ACTHD_UDW(0),0, 0, "ACTHD_UDW"}, \
+ {RING_INSTPM(0), 0, 0, "INSTPM"}, \
+ {RING_INSTDONE(0), 0, 0, "INSTDONE"}, \
+ {RING_NOPID(0),0, 0, "RING_NOPID"}, \
+ {RING_START(0),0, 0, "START"}, \
+ {RING_HEAD(0), 0, 0, "HEAD"}, \
+ {RING_TAIL(0), 0, 0, "TAIL"}, \
+
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add GuC Error Capture Support (rev2)
== Series Details ==
Series: Add GuC Error Capture Support (rev2)
URL : https://patchwork.freedesktop.org/series/101348/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
41d2f067e825 drm/i915/guc: Update GuC ADS size for error capture lists
-:40: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#40:
new file mode 100644
-:324: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#324: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:653:
+ ads_blob_write(guc, ads.capture_class[i][j],
ads_ggtt + capture_offset);
-:345: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#345: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:674:
+ ads_blob_write(guc, ads.capture_instance[i][j],
ads_ggtt + capture_offset);
-:469: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'regslist' - possible
side-effects?
#469: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:63:
+#define MAKE_REGLIST(regslist, regsowner, regstype, class) \
+ { \
+ regslist, \
+ ARRAY_SIZE(regslist), \
+ TO_GCAP_DEF_OWNER(regsowner), \
+ TO_GCAP_DEF_TYPE(regstype), \
+ class, \
+ }
-:513: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional
statements (16, 16)
#513: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:107:
+ if (reglists[i].owner == owner && reglists[i].type == type &&
[...]
+ return [i];
-:689: WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
#689: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:283:
+ if (!caplist) {
+ drm_dbg(>drm, "GuC-capture: failed to alloc cached
caplist");
-:731: WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
#731: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:325:
+ if (!null_header) {
+ drm_dbg(>drm, "GuC-capture: failed to alloc cached
nulllist");
total: 0 errors, 6 warnings, 1 checks, 749 lines checked
7b2eb12974e1 drm/i915/guc: Add XE_LP static registers for GuC error capture.
-:26: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in
parentheses
#26: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:25:
+#define COMMON_GEN12BASE_GLOBAL() \
+ {GEN12_FAULT_TLB_DATA0,0, 0, "GEN12_FAULT_TLB_DATA0"}, \
+ {GEN12_FAULT_TLB_DATA1,0, 0, "GEN12_FAULT_TLB_DATA1"}, \
+ {FORCEWAKE_MT, 0, 0, "FORCEWAKE"}, \
+ {GEN12_AUX_ERR_DBG,0, 0, "AUX_ERR_DBG"}, \
+ {GEN12_GAM_DONE, 0, 0, "GAM_DONE"}, \
+ {GEN12_RING_FAULT_REG, 0, 0, "FAULT_REG"}
-:34: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in
parentheses
#34: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:33:
+#define COMMON_GEN12BASE_ENGINE_INSTANCE() \
+ {RING_PSMI_CTL(0), 0, 0, "RC PSMI"}, \
+ {RING_ESR(0), 0, 0, "ESR"}, \
+ {RING_DMA_FADD(0), 0, 0, "RING_DMA_FADD_LDW"}, \
+ {RING_DMA_FADD_UDW(0), 0, 0, "RING_DMA_FADD_UDW"}, \
+ {RING_IPEIR(0),0, 0, "IPEIR"}, \
+ {RING_IPEHR(0),0, 0, "IPEHR"}, \
+ {RING_INSTPS(0), 0, 0, "INSTPS"}, \
+ {RING_BBADDR(0), 0, 0, "RING_BBADDR_LOW32"}, \
+ {RING_BBADDR_UDW(0), 0, 0, "RING_BBADDR_UP32"}, \
+ {RING_BBSTATE(0), 0, 0, "BB_STATE"}, \
+ {CCID(0), 0, 0, "CCID"}, \
+ {RING_ACTHD(0),0, 0, "ACTHD_LDW"}, \
+ {RING_ACTHD_UDW(0),0, 0, "ACTHD_UDW"}, \
+ {RING_INSTPM(0), 0, 0, "INSTPM"}, \
+ {RING_INSTDONE(0), 0, 0, "INSTDONE"}, \
+ {RING_NOPID(0),0, 0, "RING_NOPID"}, \
+ {RING_START(0),0, 0, "START"}, \
+ {RING_HEAD(0), 0, 0, "HEAD"}, \
+ {RING_TAIL(0), 0, 0, "TAIL"}, \
+ {RING_CTL(0), 0, 0, "CTL"}, \
+ {RING_MI_MODE(0), 0, 0, "MODE"}, \
+ {RING_CONTEXT_CONTROL(0), 0, 0, "RING_CONTEXT_CONTROL"}, \
+ {RING_HWS_PGA(0), 0, 0, "HWS"}, \
+ {RING_MODE_GEN7(0),0, 0, "GFX_MODE"}, \
+ {GEN8_RING_PDP_LDW(0, 0), 0, 0, "PDP0_LDW"}, \
+ {GEN8_RING_PDP_UDW(0, 0), 0, 0, "PDP0_UDW"}, \
+ {GEN8_RING_PDP_LDW(0, 1), 0, 0, "PDP1_LDW"}, \
+ {GEN8_RING_PDP_UDW(0, 1), 0, 0, "PDP1_UDW"}, \
+ {GEN8_RING_PDP_LDW(0, 2), 0, 0, "PDP2_LDW"}, \
+ {GEN8_RING_PDP_UDW(0, 2), 0, 0, "PDP2_UDW"}, \
+ {GEN8_RING_PDP_LDW(0, 3), 0, 0, "PDP3_LDW"}, \
+ {GEN8_RING_PDP_UDW(0, 3), 0, 0, "PDP3_UDW"}
-:71: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in
parentheses
#71:
