Re: [PATCH 03/16] drm/i915: Extract intel_cursor_regs.h
On Fri, 10 May 2024, Ville Syrjala wrote: > From: Ville Syrjälä > > Move most cursor register definitions into their own file. > Declutters i915_reg.h a bit more. > > Cc: Zhenyu Wang > CC: Zhi Wang > Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_cursor.c | 1 + > .../gpu/drm/i915/display/intel_cursor_regs.h | 78 +++ > drivers/gpu/drm/i915/display/intel_display.c | 1 + > drivers/gpu/drm/i915/display/intel_psr.c | 1 + > drivers/gpu/drm/i915/gvt/display.c| 1 + > drivers/gpu/drm/i915/gvt/fb_decoder.c | 1 + > drivers/gpu/drm/i915/i915_reg.h | 70 - > drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 1 + > 8 files changed, 84 insertions(+), 70 deletions(-) > create mode 100644 drivers/gpu/drm/i915/display/intel_cursor_regs.h > > diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c > b/drivers/gpu/drm/i915/display/intel_cursor.c > index 2118b87ccb10..d2b459634732 100644 > --- a/drivers/gpu/drm/i915/display/intel_cursor.c > +++ b/drivers/gpu/drm/i915/display/intel_cursor.c > @@ -14,6 +14,7 @@ > #include "intel_atomic.h" > #include "intel_atomic_plane.h" > #include "intel_cursor.h" > +#include "intel_cursor_regs.h" > #include "intel_de.h" > #include "intel_display.h" > #include "intel_display_types.h" > diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h > b/drivers/gpu/drm/i915/display/intel_cursor_regs.h > new file mode 100644 > index ..62f7fb5c3f10 > --- /dev/null > +++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h > @@ -0,0 +1,78 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Copyright © 2024 Intel Corporation > + */ > + > +#ifndef __INTEL_CURSOR_REGS_H__ > +#define __INTEL_CURSOR_REGS_H__ > + > +#include "intel_display_reg_defs.h" > + > +#define _CURACNTR0x70080 > +/* Old style CUR*CNTR flags (desktop 8xx) */ > +#define CURSOR_ENABLE REG_BIT(31) > +#define CURSOR_PIPE_GAMMA_ENABLE REG_BIT(30) > +#define CURSOR_STRIDE_MASK REG_GENMASK(29, 28) > +#define CURSOR_STRIDE(stride) REG_FIELD_PREP(CURSOR_STRIDE_MASK, > ffs(stride) - 9) /* 256,512,1k,2k */ > +#define CURSOR_FORMAT_MASK REG_GENMASK(26, 24) > +#define CURSOR_FORMAT_2C REG_FIELD_PREP(CURSOR_FORMAT_MASK, 0) > +#define CURSOR_FORMAT_3C REG_FIELD_PREP(CURSOR_FORMAT_MASK, 1) > +#define CURSOR_FORMAT_4C REG_FIELD_PREP(CURSOR_FORMAT_MASK, 2) > +#define CURSOR_FORMAT_ARGB REG_FIELD_PREP(CURSOR_FORMAT_MASK, 4) > +#define CURSOR_FORMAT_XRGB REG_FIELD_PREP(CURSOR_FORMAT_MASK, 5) > +/* New style CUR*CNTR flags */ > +#define MCURSOR_ARB_SLOTS_MASK REG_GENMASK(30, 28) /* icl+ */ > +#define MCURSOR_ARB_SLOTS(x) > REG_FIELD_PREP(MCURSOR_ARB_SLOTS_MASK, (x)) /* icl+ */ > +#define MCURSOR_PIPE_SEL_MASK REG_GENMASK(29, 28) > +#define MCURSOR_PIPE_SEL(pipe) REG_FIELD_PREP(MCURSOR_PIPE_SEL_MASK, > (pipe)) > +#define MCURSOR_PIPE_GAMMA_ENABLE REG_BIT(26) > +#define MCURSOR_PIPE_CSC_ENABLEREG_BIT(24) /* ilk+ */ > +#define MCURSOR_ROTATE_180 REG_BIT(15) > +#define MCURSOR_TRICKLE_FEED_DISABLE REG_BIT(14) > +#define MCURSOR_MODE_MASK 0x27 > +#define MCURSOR_MODE_DISABLE 0x00 > +#define MCURSOR_MODE_128_32B_AX0x02 > +#define MCURSOR_MODE_256_32B_AX0x03 > +#define MCURSOR_MODE_64_2B 0x04 > +#define MCURSOR_MODE_64_32B_AX 0x07 > +#define MCURSOR_MODE_128_ARGB_AX (0x20 | MCURSOR_MODE_128_32B_AX) > +#define MCURSOR_MODE_256_ARGB_AX (0x20 | MCURSOR_MODE_256_32B_AX) > +#define MCURSOR_MODE_64_ARGB_AX(0x20 | MCURSOR_MODE_64_32B_AX) > +#define _CURABASE0x70084 > +#define _CURAPOS 0x70088 > +#define _CURAPOS_ERLY_TPT0x7008c > +#define CURSOR_POS_Y_SIGN REG_BIT(31) > +#define CURSOR_POS_Y_MASK REG_GENMASK(30, 16) > +#define CURSOR_POS_Y(y)REG_FIELD_PREP(CURSOR_POS_Y_MASK, (y)) > +#define CURSOR_POS_X_SIGN REG_BIT(15) > +#define CURSOR_POS_X_MASK REG_GENMASK(14, 0) > +#define CURSOR_POS_X(x)REG_FIELD_PREP(CURSOR_POS_X_MASK, (x)) > +#define _CURASIZE0x700a0 /* 845/865 */ > +#define CURSOR_HEIGHT_MASK REG_GENMASK(21, 12) > +#define CURSOR_HEIGHT(h) REG_FIELD_PREP(CURSOR_HEIGHT_MASK, (h)) > +#define CURSOR_WIDTH_MASK REG_GENMASK(9, 0) > +#define CURSOR_WIDTH(w)REG_FIELD_PREP(CURSOR_WIDTH_MASK, (w)) > +#define _CUR_FBC_CTL_A 0x700a0 /* ivb+ */ > +#define CUR_FBC_EN REG_BIT(31) > +#define CUR_FBC_HEIGHT_MASKREG_GENMASK(7, 0) > +#define CUR_FBC_HEIGHT(h) REG_FIELD_PREP(CUR_FBC_HEIGHT_MASK, (h)) > +#define _CUR_CHICKEN_A 0x700a4 /* mtl+ */ > +#define _CURASURFLIVE0x700ac /* g4x+ */ > +#define _CURBCNTR0x700c0 > +#define _CURBBASE0x700c4
[PATCH 03/16] drm/i915: Extract intel_cursor_regs.h
From: Ville Syrjälä Move most cursor register definitions into their own file. Declutters i915_reg.h a bit more. Cc: Zhenyu Wang CC: Zhi Wang Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_cursor.c | 1 + .../gpu/drm/i915/display/intel_cursor_regs.h | 78 +++ drivers/gpu/drm/i915/display/intel_display.c | 1 + drivers/gpu/drm/i915/display/intel_psr.c | 1 + drivers/gpu/drm/i915/gvt/display.c| 1 + drivers/gpu/drm/i915/gvt/fb_decoder.c | 1 + drivers/gpu/drm/i915/i915_reg.h | 70 - drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 1 + 8 files changed, 84 insertions(+), 70 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_cursor_regs.h diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c index 2118b87ccb10..d2b459634732 100644 --- a/drivers/gpu/drm/i915/display/intel_cursor.c +++ b/drivers/gpu/drm/i915/display/intel_cursor.c @@ -14,6 +14,7 @@ #include "intel_atomic.h" #include "intel_atomic_plane.h" #include "intel_cursor.h" +#include "intel_cursor_regs.h" #include "intel_de.h" #include "intel_display.h" #include "intel_display_types.h" diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h b/drivers/gpu/drm/i915/display/intel_cursor_regs.h new file mode 100644 index ..62f7fb5c3f10 --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2024 Intel Corporation + */ + +#ifndef __INTEL_CURSOR_REGS_H__ +#define __INTEL_CURSOR_REGS_H__ + +#include "intel_display_reg_defs.h" + +#define _CURACNTR 0x70080 +/* Old style CUR*CNTR flags (desktop 8xx) */ +#define CURSOR_ENABLEREG_BIT(31) +#define CURSOR_PIPE_GAMMA_ENABLE REG_BIT(30) +#define CURSOR_STRIDE_MASK REG_GENMASK(29, 28) +#define CURSOR_STRIDE(stride)REG_FIELD_PREP(CURSOR_STRIDE_MASK, ffs(stride) - 9) /* 256,512,1k,2k */ +#define CURSOR_FORMAT_MASK REG_GENMASK(26, 24) +#define CURSOR_FORMAT_2C REG_FIELD_PREP(CURSOR_FORMAT_MASK, 0) +#define CURSOR_FORMAT_3C REG_FIELD_PREP(CURSOR_FORMAT_MASK, 1) +#define CURSOR_FORMAT_4C REG_FIELD_PREP(CURSOR_FORMAT_MASK, 2) +#define CURSOR_FORMAT_ARGB REG_FIELD_PREP(CURSOR_FORMAT_MASK, 4) +#define CURSOR_FORMAT_XRGB REG_FIELD_PREP(CURSOR_FORMAT_MASK, 5) +/* New style CUR*CNTR flags */ +#define MCURSOR_ARB_SLOTS_MASK REG_GENMASK(30, 28) /* icl+ */ +#define MCURSOR_ARB_SLOTS(x) REG_FIELD_PREP(MCURSOR_ARB_SLOTS_MASK, (x)) /* icl+ */ +#define MCURSOR_PIPE_SEL_MASKREG_GENMASK(29, 28) +#define MCURSOR_PIPE_SEL(pipe) REG_FIELD_PREP(MCURSOR_PIPE_SEL_MASK, (pipe)) +#define MCURSOR_PIPE_GAMMA_ENABLEREG_BIT(26) +#define MCURSOR_PIPE_CSC_ENABLE REG_BIT(24) /* ilk+ */ +#define MCURSOR_ROTATE_180 REG_BIT(15) +#define MCURSOR_TRICKLE_FEED_DISABLE REG_BIT(14) +#define MCURSOR_MODE_MASK0x27 +#define MCURSOR_MODE_DISABLE 0x00 +#define MCURSOR_MODE_128_32B_AX 0x02 +#define MCURSOR_MODE_256_32B_AX 0x03 +#define MCURSOR_MODE_64_2B 0x04 +#define MCURSOR_MODE_64_32B_AX 0x07 +#define MCURSOR_MODE_128_ARGB_AX (0x20 | MCURSOR_MODE_128_32B_AX) +#define MCURSOR_MODE_256_ARGB_AX (0x20 | MCURSOR_MODE_256_32B_AX) +#define MCURSOR_MODE_64_ARGB_AX (0x20 | MCURSOR_MODE_64_32B_AX) +#define _CURABASE 0x70084 +#define _CURAPOS 0x70088 +#define _CURAPOS_ERLY_TPT 0x7008c +#define CURSOR_POS_Y_SIGNREG_BIT(31) +#define CURSOR_POS_Y_MASKREG_GENMASK(30, 16) +#define CURSOR_POS_Y(y) REG_FIELD_PREP(CURSOR_POS_Y_MASK, (y)) +#define CURSOR_POS_X_SIGNREG_BIT(15) +#define CURSOR_POS_X_MASKREG_GENMASK(14, 0) +#define CURSOR_POS_X(x) REG_FIELD_PREP(CURSOR_POS_X_MASK, (x)) +#define _CURASIZE 0x700a0 /* 845/865 */ +#define CURSOR_HEIGHT_MASK REG_GENMASK(21, 12) +#define CURSOR_HEIGHT(h) REG_FIELD_PREP(CURSOR_HEIGHT_MASK, (h)) +#define CURSOR_WIDTH_MASKREG_GENMASK(9, 0) +#define CURSOR_WIDTH(w) REG_FIELD_PREP(CURSOR_WIDTH_MASK, (w)) +#define _CUR_FBC_CTL_A 0x700a0 /* ivb+ */ +#define CUR_FBC_EN REG_BIT(31) +#define CUR_FBC_HEIGHT_MASK REG_GENMASK(7, 0) +#define CUR_FBC_HEIGHT(h)REG_FIELD_PREP(CUR_FBC_HEIGHT_MASK, (h)) +#define _CUR_CHICKEN_A 0x700a4 /* mtl+ */ +#define _CURASURFLIVE 0x700ac /* g4x+ */ +#define _CURBCNTR 0x700c0 +#define _CURBBASE 0x700c4 +#define _CURBPOS 0x700c8 + +#define _CURBCNTR_IVB 0x71080 +#define _CURBBASE_IVB 0x71084 +#define _CURBPOS_IVB 0x71088 + +#define CURCNTR(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)
