Re: [PATCH 07/16] drm/i915/gvt: Use the full PLANE_KEY*() defines

2024-05-13 Thread Jani Nikula
On Fri, 10 May 2024, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Stop hand rolling PLANE_KEY*() register defines and just
> use the real thing.
>
> Cc: Zhenyu Wang 
> CC: Zhi Wang 
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 18 +-
>  1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c 
> b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> index ad3bf60855bc..b53c98cd6d7f 100644
> --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> @@ -1075,15 +1075,15 @@ static int iterate_skl_plus_mmio(struct 
> intel_gvt_mmio_table_iter *iter)
>   MMIO_D(_MMIO(0x70034));
>   MMIO_D(_MMIO(0x71034));
>   MMIO_D(_MMIO(0x72034));
> - MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_A)));
> - MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_B)));
> - MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_C)));
> - MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_A)));
> - MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_B)));
> - MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_C)));
> - MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_A)));
> - MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_B)));
> - MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_C)));
> + MMIO_D(PLANE_KEYVAL(PIPE_A, 0));
> + MMIO_D(PLANE_KEYVAL(PIPE_B, 0));
> + MMIO_D(PLANE_KEYVAL(PIPE_C, 0));
> + MMIO_D(PLANE_KEYMAX(PIPE_A, 0));
> + MMIO_D(PLANE_KEYMAX(PIPE_B, 0));
> + MMIO_D(PLANE_KEYMAX(PIPE_C, 0));
> + MMIO_D(PLANE_KEYMSK(PIPE_A, 0));
> + MMIO_D(PLANE_KEYMSK(PIPE_B, 0));
> + MMIO_D(PLANE_KEYMSK(PIPE_C, 0));
>   MMIO_D(_MMIO(0x44500));
>  #define CSFE_CHICKEN1_REG(base) _MMIO((base) + 0xD4)
>   MMIO_RING_D(CSFE_CHICKEN1_REG);

-- 
Jani Nikula, Intel


[PATCH 07/16] drm/i915/gvt: Use the full PLANE_KEY*() defines

2024-05-10 Thread Ville Syrjala
From: Ville Syrjälä 

Stop hand rolling PLANE_KEY*() register defines and just
use the real thing.

Cc: Zhenyu Wang 
CC: Zhi Wang 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c 
b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
index ad3bf60855bc..b53c98cd6d7f 100644
--- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
+++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
@@ -1075,15 +1075,15 @@ static int iterate_skl_plus_mmio(struct 
intel_gvt_mmio_table_iter *iter)
MMIO_D(_MMIO(0x70034));
MMIO_D(_MMIO(0x71034));
MMIO_D(_MMIO(0x72034));
-   MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_A)));
-   MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_B)));
-   MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_C)));
-   MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_A)));
-   MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_B)));
-   MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_C)));
-   MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_A)));
-   MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_B)));
-   MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_C)));
+   MMIO_D(PLANE_KEYVAL(PIPE_A, 0));
+   MMIO_D(PLANE_KEYVAL(PIPE_B, 0));
+   MMIO_D(PLANE_KEYVAL(PIPE_C, 0));
+   MMIO_D(PLANE_KEYMAX(PIPE_A, 0));
+   MMIO_D(PLANE_KEYMAX(PIPE_B, 0));
+   MMIO_D(PLANE_KEYMAX(PIPE_C, 0));
+   MMIO_D(PLANE_KEYMSK(PIPE_A, 0));
+   MMIO_D(PLANE_KEYMSK(PIPE_B, 0));
+   MMIO_D(PLANE_KEYMSK(PIPE_C, 0));
MMIO_D(_MMIO(0x44500));
 #define CSFE_CHICKEN1_REG(base) _MMIO((base) + 0xD4)
MMIO_RING_D(CSFE_CHICKEN1_REG);
-- 
2.43.2