Re: [PATCH 08/13] drm/i915: Extract intel_dbuf_mdclk_min_tracker_update()
Quoting Ville Syrjala (2024-03-27 14:45:39-03:00)
>From: Ville Syrjälä
>
>Extact the stuff that writes the dbuf/mbus ration stuff
>into its own function. Will help with correctly sequencing
>the operations done during mbus programming.
>
>Signed-off-by: Ville Syrjälä
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/display/skl_watermark.c | 43
> 1 file changed, 25 insertions(+), 18 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
>b/drivers/gpu/drm/i915/display/skl_watermark.c
>index f7e03078bd43..7767c5eada36 100644
>--- a/drivers/gpu/drm/i915/display/skl_watermark.c
>+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
>@@ -3653,6 +3653,30 @@ void intel_dbuf_mdclk_cdclk_ratio_update(struct
>drm_i915_private *i915, u8 ratio
> DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));
> }
>
>+static void intel_dbuf_mdclk_min_tracker_update(struct intel_atomic_state
>*state)
>+{
>+struct drm_i915_private *i915 = to_i915(state->base.dev);
>+const struct intel_dbuf_state *old_dbuf_state =
>+intel_atomic_get_old_dbuf_state(state);
>+const struct intel_dbuf_state *new_dbuf_state =
>+intel_atomic_get_new_dbuf_state(state);
>+
>+if (DISPLAY_VER(i915) >= 20 &&
>+old_dbuf_state->mdclk_cdclk_ratio !=
>new_dbuf_state->mdclk_cdclk_ratio) {
>+/*
>+ * For Xe2LPD and beyond, when there is a change in the ratio
>+ * between MDCLK and CDCLK, updates to related registers need
>to
>+ * happen at a specific point in the CDCLK change sequence. In
>+ * that case, we defer to the call to
>+ * intel_dbuf_mdclk_cdclk_ratio_update() to the CDCLK logic.
>+ */
>+return;
>+}
>+
>+intel_dbuf_mdclk_cdclk_ratio_update(i915,
>new_dbuf_state->mdclk_cdclk_ratio,
>+new_dbuf_state->joined_mbus);
>+}
>+
> static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state)
> {
> struct drm_i915_private *i915 = to_i915(state->base.dev);
>@@ -3683,10 +3707,6 @@ static void intel_dbuf_mbus_join_update(struct
>intel_atomic_state *state)
> static void update_mbus_pre_enable(struct intel_atomic_state *state)
> {
> struct drm_i915_private *i915 = to_i915(state->base.dev);
>-const struct intel_dbuf_state *old_dbuf_state =
>-intel_atomic_get_old_dbuf_state(state);
>-const struct intel_dbuf_state *new_dbuf_state =
>-intel_atomic_get_new_dbuf_state(state);
>
> if (!HAS_MBUS_JOINING(i915))
> return;
>@@ -3697,20 +3717,7 @@ static void update_mbus_pre_enable(struct
>intel_atomic_state *state)
> */
> intel_dbuf_mbus_join_update(state);
>
>-if (DISPLAY_VER(i915) >= 20 &&
>-old_dbuf_state->mdclk_cdclk_ratio !=
>new_dbuf_state->mdclk_cdclk_ratio) {
>-/*
>- * For Xe2LPD and beyond, when there is a change in the ratio
>- * between MDCLK and CDCLK, updates to related registers need
>to
>- * happen at a specific point in the CDCLK change sequence. In
>- * that case, we defer to the call to
>- * intel_dbuf_mdclk_cdclk_ratio_update() to the CDCLK logic.
>- */
>-return;
>-}
>-
>-intel_dbuf_mdclk_cdclk_ratio_update(i915,
>new_dbuf_state->mdclk_cdclk_ratio,
>-new_dbuf_state->joined_mbus);
>+intel_dbuf_mdclk_min_tracker_update(state);
> }
>
> void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)
>--
>2.43.2
>
RE: [PATCH 08/13] drm/i915: Extract intel_dbuf_mdclk_min_tracker_update()
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, March 27, 2024 11:16 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 08/13] drm/i915: Extract
> intel_dbuf_mdclk_min_tracker_update()
>
> From: Ville Syrjälä
>
> Extact the stuff that writes the dbuf/mbus ration stuff into its own
> function. Will
Nit: Typo in extract and ratio
Looks Good to me.
Reviewed-by: Uma Shankar
> help with correctly sequencing the operations done during mbus programming.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/skl_watermark.c | 43
> 1 file changed, 25 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> b/drivers/gpu/drm/i915/display/skl_watermark.c
> index f7e03078bd43..7767c5eada36 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3653,6 +3653,30 @@ void intel_dbuf_mdclk_cdclk_ratio_update(struct
> drm_i915_private *i915, u8 ratio
>DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1)); }
>
> +static void intel_dbuf_mdclk_min_tracker_update(struct
> +intel_atomic_state *state) {
> + struct drm_i915_private *i915 = to_i915(state->base.dev);
> + const struct intel_dbuf_state *old_dbuf_state =
> + intel_atomic_get_old_dbuf_state(state);
> + const struct intel_dbuf_state *new_dbuf_state =
> + intel_atomic_get_new_dbuf_state(state);
> +
> + if (DISPLAY_VER(i915) >= 20 &&
> + old_dbuf_state->mdclk_cdclk_ratio != new_dbuf_state-
> >mdclk_cdclk_ratio) {
> + /*
> + * For Xe2LPD and beyond, when there is a change in the ratio
> + * between MDCLK and CDCLK, updates to related registers need
> to
> + * happen at a specific point in the CDCLK change sequence. In
> + * that case, we defer to the call to
> + * intel_dbuf_mdclk_cdclk_ratio_update() to the CDCLK logic.
> + */
> + return;
> + }
> +
> + intel_dbuf_mdclk_cdclk_ratio_update(i915, new_dbuf_state-
> >mdclk_cdclk_ratio,
> + new_dbuf_state->joined_mbus);
> +}
> +
> static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state) {
> struct drm_i915_private *i915 = to_i915(state->base.dev); @@ -3683,10
> +3707,6 @@ static void intel_dbuf_mbus_join_update(struct intel_atomic_state
> *state) static void update_mbus_pre_enable(struct intel_atomic_state *state)
> {
> struct drm_i915_private *i915 = to_i915(state->base.dev);
> - const struct intel_dbuf_state *old_dbuf_state =
> - intel_atomic_get_old_dbuf_state(state);
> - const struct intel_dbuf_state *new_dbuf_state =
> - intel_atomic_get_new_dbuf_state(state);
>
> if (!HAS_MBUS_JOINING(i915))
> return;
> @@ -3697,20 +3717,7 @@ static void update_mbus_pre_enable(struct
> intel_atomic_state *state)
>*/
> intel_dbuf_mbus_join_update(state);
>
> - if (DISPLAY_VER(i915) >= 20 &&
> - old_dbuf_state->mdclk_cdclk_ratio != new_dbuf_state-
> >mdclk_cdclk_ratio) {
> - /*
> - * For Xe2LPD and beyond, when there is a change in the ratio
> - * between MDCLK and CDCLK, updates to related registers need
> to
> - * happen at a specific point in the CDCLK change sequence. In
> - * that case, we defer to the call to
> - * intel_dbuf_mdclk_cdclk_ratio_update() to the CDCLK logic.
> - */
> - return;
> - }
> -
> - intel_dbuf_mdclk_cdclk_ratio_update(i915, new_dbuf_state-
> >mdclk_cdclk_ratio,
> - new_dbuf_state->joined_mbus);
> + intel_dbuf_mdclk_min_tracker_update(state);
> }
>
> void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)
> --
> 2.43.2
[PATCH 08/13] drm/i915: Extract intel_dbuf_mdclk_min_tracker_update()
From: Ville Syrjälä
Extact the stuff that writes the dbuf/mbus ration stuff
into its own function. Will help with correctly sequencing
the operations done during mbus programming.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/skl_watermark.c | 43
1 file changed, 25 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
b/drivers/gpu/drm/i915/display/skl_watermark.c
index f7e03078bd43..7767c5eada36 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3653,6 +3653,30 @@ void intel_dbuf_mdclk_cdclk_ratio_update(struct
drm_i915_private *i915, u8 ratio
DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));
}
+static void intel_dbuf_mdclk_min_tracker_update(struct intel_atomic_state
*state)
+{
+ struct drm_i915_private *i915 = to_i915(state->base.dev);
+ const struct intel_dbuf_state *old_dbuf_state =
+ intel_atomic_get_old_dbuf_state(state);
+ const struct intel_dbuf_state *new_dbuf_state =
+ intel_atomic_get_new_dbuf_state(state);
+
+ if (DISPLAY_VER(i915) >= 20 &&
+ old_dbuf_state->mdclk_cdclk_ratio !=
new_dbuf_state->mdclk_cdclk_ratio) {
+ /*
+* For Xe2LPD and beyond, when there is a change in the ratio
+* between MDCLK and CDCLK, updates to related registers need to
+* happen at a specific point in the CDCLK change sequence. In
+* that case, we defer to the call to
+* intel_dbuf_mdclk_cdclk_ratio_update() to the CDCLK logic.
+*/
+ return;
+ }
+
+ intel_dbuf_mdclk_cdclk_ratio_update(i915,
new_dbuf_state->mdclk_cdclk_ratio,
+ new_dbuf_state->joined_mbus);
+}
+
static void intel_dbuf_mbus_join_update(struct intel_atomic_state *state)
{
struct drm_i915_private *i915 = to_i915(state->base.dev);
@@ -3683,10 +3707,6 @@ static void intel_dbuf_mbus_join_update(struct
intel_atomic_state *state)
static void update_mbus_pre_enable(struct intel_atomic_state *state)
{
struct drm_i915_private *i915 = to_i915(state->base.dev);
- const struct intel_dbuf_state *old_dbuf_state =
- intel_atomic_get_old_dbuf_state(state);
- const struct intel_dbuf_state *new_dbuf_state =
- intel_atomic_get_new_dbuf_state(state);
if (!HAS_MBUS_JOINING(i915))
return;
@@ -3697,20 +3717,7 @@ static void update_mbus_pre_enable(struct
intel_atomic_state *state)
*/
intel_dbuf_mbus_join_update(state);
- if (DISPLAY_VER(i915) >= 20 &&
- old_dbuf_state->mdclk_cdclk_ratio !=
new_dbuf_state->mdclk_cdclk_ratio) {
- /*
-* For Xe2LPD and beyond, when there is a change in the ratio
-* between MDCLK and CDCLK, updates to related registers need to
-* happen at a specific point in the CDCLK change sequence. In
-* that case, we defer to the call to
-* intel_dbuf_mdclk_cdclk_ratio_update() to the CDCLK logic.
-*/
- return;
- }
-
- intel_dbuf_mdclk_cdclk_ratio_update(i915,
new_dbuf_state->mdclk_cdclk_ratio,
- new_dbuf_state->joined_mbus);
+ intel_dbuf_mdclk_min_tracker_update(state);
}
void intel_dbuf_pre_plane_update(struct intel_atomic_state *state)
--
2.43.2
