On Wed, Apr 03, 2024 at 04:52:34PM +0530, Balasubramani Vivekanandan wrote:
> From: Clint Taylor
>
> Add Xe2_HPD specific CDCLK table and use MTL Funcs.
>
> Bspec: 65243
> Cc: Matt Roper
> CC: Lucas De Marchi
> Signed-off-by: Clint Taylor
> Signed-off-by: Balasubramani Vivekanandan
>
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 31aaa9780dfc..da16c308670f 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1444,6 +1444,14 @@ static const struct intel_cdclk_vals
> xe2lpd_cdclk_table[] = {
> {}
> };
>
> +/*
> + * Xe2_HPD always uses the minimal cdclk table from Wa_15015413771
> + */
> +static const struct intel_cdclk_vals xe2hpd_cdclk_table[] = {
> + { .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0x },
> + {}
> +};
> +
> static const int cdclk_squash_len = 16;
>
> static int cdclk_squash_divider(u16 waveform)
> @@ -3768,6 +3776,9 @@ void intel_init_cdclk_hooks(struct drm_i915_private
> *dev_priv)
> if (DISPLAY_VER(dev_priv) >= 20) {
> dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
> dev_priv->display.cdclk.table = xe2lpd_cdclk_table;
> + } else if (DISPLAY_VER_FULL(dev_priv) >= IP_VER(14, 1)) {
> + dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
> + dev_priv->display.cdclk.table = xe2hpd_cdclk_table;
> } else if (DISPLAY_VER(dev_priv) >= 14) {
> dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
> dev_priv->display.cdclk.table = mtl_cdclk_table;
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
