Re: [Intel-gfx] [PATCH] drm/i915: Do not export RC6p and RC6pp if they don't exist
2014-10-07 11:06 GMT-03:00 Rodrigo Vivi rodrigo.v...@intel.com:
Avoid to expose RC6 and RC6pp to the platforms that doesn't support it.
So powertop can be changed to show RC6p and RC6pp only on the platforms
they are available.
v2: Simplify by merging RC6p and RC6pp groups and respect the spec that
mentions deep and deepest RC6 on SNB and IVB although they keep disabled
by default.
v3: Remove unecessary space.
v4: RC6p and RC6pp is only for SNB and IVB; unify debug msg and use
has_rc6p() on sanitize options instead of is gen 6 and ivb.
v5: yet another fix on has_rc6p macro. final is_gen6 or is_ivb! To make sure
we are excluding hsw and baytrail.
References: https://bugs.freedesktop.org/show_bug.cgi?id=84524
Cc: Josh Triplett josh.tripl...@intel.com
Cc: Paulo Zanoni paulo.r.zan...@intel.com
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
Reviewed-by: Paulo Zanoni paulo.r.zan...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_sysfs.c | 22 +++---
drivers/gpu/drm/i915/intel_pm.c | 15 ++-
3 files changed, 31 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5ba5524..21625f2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2185,6 +2185,8 @@ struct drm_i915_cmd_table {
#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev))
#define HAS_RUNTIME_PM(dev)(IS_GEN6(dev) || IS_HASWELL(dev) || \
IS_BROADWELL(dev) || IS_VALLEYVIEW(dev))
+#define HAS_RC6(dev) (INTEL_INFO(dev)-gen = 6)
+#define HAS_RC6p(dev) (INTEL_INFO(dev)-gen == 6 ||
IS_IVYBRIDGE(dev))
#define INTEL_PCH_DEVICE_ID_MASK 0xff00
#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/drivers/gpu/drm/i915/i915_sysfs.c
index 503847f..4a5af69 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -139,8 +139,6 @@ static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO,
show_rc6pp_ms, NULL);
static struct attribute *rc6_attrs[] = {
dev_attr_rc6_enable.attr,
dev_attr_rc6_residency_ms.attr,
- dev_attr_rc6p_residency_ms.attr,
- dev_attr_rc6pp_residency_ms.attr,
NULL
};
@@ -148,6 +146,17 @@ static struct attribute_group rc6_attr_group = {
.name = power_group_name,
.attrs = rc6_attrs
};
+
+static struct attribute *rc6p_attrs[] = {
+ dev_attr_rc6p_residency_ms.attr,
+ dev_attr_rc6pp_residency_ms.attr,
+ NULL
+};
+
+static struct attribute_group rc6p_attr_group = {
+ .name = power_group_name,
+ .attrs = rc6p_attrs
+};
#endif
static int l3_access_valid(struct drm_device *dev, loff_t offset)
@@ -595,12 +604,18 @@ void i915_setup_sysfs(struct drm_device *dev)
int ret;
#ifdef CONFIG_PM
- if (INTEL_INFO(dev)-gen = 6) {
+ if (HAS_RC6(dev)) {
ret = sysfs_merge_group(dev-primary-kdev-kobj,
rc6_attr_group);
if (ret)
DRM_ERROR(RC6 residency sysfs setup failed\n);
}
+ if (HAS_RC6p(dev)) {
+ ret = sysfs_merge_group(dev-primary-kdev-kobj,
+ rc6p_attr_group);
+ if (ret)
+ DRM_ERROR(RC6p residency sysfs setup failed\n);
+ }
#endif
if (HAS_L3_DPF(dev)) {
ret = device_create_bin_file(dev-primary-kdev, dpf_attrs);
@@ -640,5 +655,6 @@ void i915_teardown_sysfs(struct drm_device *dev)
device_remove_bin_file(dev-primary-kdev, dpf_attrs);
#ifdef CONFIG_PM
sysfs_unmerge_group(dev-primary-kdev-kobj, rc6_attr_group);
+ sysfs_unmerge_group(dev-primary-kdev-kobj, rc6p_attr_group);
#endif
}
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6a670ad..90eafa7 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3629,10 +3629,15 @@ static void intel_print_rc6_info(struct drm_device
*dev, u32 mode)
else
mode = 0;
}
- DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n,
- (mode GEN6_RC_CTL_RC6_ENABLE) ? on : off,
- (mode GEN6_RC_CTL_RC6p_ENABLE) ? on : off,
- (mode GEN6_RC_CTL_RC6pp_ENABLE) ? on : off);
+ if (HAS_RC6p(dev))
+ DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s RC6p %s RC6pp
%s\n,
+ (mode GEN6_RC_CTL_RC6_ENABLE) ? on : off,
+ (mode GEN6_RC_CTL_RC6p_ENABLE) ? on : off,
+ (mode GEN6_RC_CTL_RC6pp_ENABLE) ? on :
off);
+
+ else
+
Re: [Intel-gfx] [PATCH] drm/i915: Do not export RC6p and RC6pp if they don't exist
2014-10-01 11:47 GMT-03:00 Rodrigo Vivi rodrigo.v...@intel.com:
Avoid to expose RC6 and RC6pp to the platforms that doesn't support it.
So powertop can be changed to show RC6p and RC6pp only on the platforms
they are available.
v2: Simplify by merging RC6p and RC6pp groups and respect the spec that
mentions deep and deepest RC6 until HSW although they keep disabled
by default.
v3: Remove unecessary space.
References: https://bugs.freedesktop.org/show_bug.cgi?id=84524
Cc: Josh Triplett josh.tripl...@intel.com
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_sysfs.c | 22 +++---
drivers/gpu/drm/i915/intel_pm.c | 10 ++
3 files changed, 27 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5ba5524..e149f7b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2185,6 +2185,8 @@ struct drm_i915_cmd_table {
#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev))
#define HAS_RUNTIME_PM(dev)(IS_GEN6(dev) || IS_HASWELL(dev) || \
IS_BROADWELL(dev) || IS_VALLEYVIEW(dev))
+#define HAS_RC6(dev) (INTEL_INFO(dev)-gen = 6)
+#define HAS_RC6p(dev) (HAS_RC6(dev) INTEL_INFO(dev)-gen 8)
Required change:
I know you've already spotted this, but just to document it: HSW
doesn't have RC6p, so you have to replace this with 7.
#define INTEL_PCH_DEVICE_ID_MASK 0xff00
#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/drivers/gpu/drm/i915/i915_sysfs.c
index 503847f..4a5af69 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -139,8 +139,6 @@ static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO,
show_rc6pp_ms, NULL);
static struct attribute *rc6_attrs[] = {
dev_attr_rc6_enable.attr,
dev_attr_rc6_residency_ms.attr,
- dev_attr_rc6p_residency_ms.attr,
- dev_attr_rc6pp_residency_ms.attr,
NULL
};
@@ -148,6 +146,17 @@ static struct attribute_group rc6_attr_group = {
.name = power_group_name,
.attrs = rc6_attrs
};
+
+static struct attribute *rc6p_attrs[] = {
+ dev_attr_rc6p_residency_ms.attr,
+ dev_attr_rc6pp_residency_ms.attr,
+ NULL
+};
+
+static struct attribute_group rc6p_attr_group = {
+ .name = power_group_name,
+ .attrs = rc6p_attrs
+};
#endif
static int l3_access_valid(struct drm_device *dev, loff_t offset)
@@ -595,12 +604,18 @@ void i915_setup_sysfs(struct drm_device *dev)
int ret;
#ifdef CONFIG_PM
- if (INTEL_INFO(dev)-gen = 6) {
+ if (HAS_RC6(dev)) {
Suggestion for another patch:
While this is correct and keeps backwards compatibility, I have to
point out that RC6 is possible on Ironlake too, and we allow it if you
pass the enable_rc6 flag, but it is never displayed on sysfs. So even
if you pass the parameters to enable RC6 on ILK, powertop won't tell
you its residency.
So, as a separate patch, you could change HAS_RC6 to be gen = 5 and
HAS_RC6p to be is_snb || is_ivb. But please do this in a separate
patch since it's a different fix for a different problem.
ret = sysfs_merge_group(dev-primary-kdev-kobj,
rc6_attr_group);
if (ret)
DRM_ERROR(RC6 residency sysfs setup failed\n);
}
+ if (HAS_RC6p(dev)) {
+ ret = sysfs_merge_group(dev-primary-kdev-kobj,
+ rc6p_attr_group);
+ if (ret)
+ DRM_ERROR(RC6p residency sysfs setup failed\n);
+ }
#endif
if (HAS_L3_DPF(dev)) {
ret = device_create_bin_file(dev-primary-kdev, dpf_attrs);
@@ -640,5 +655,6 @@ void i915_teardown_sysfs(struct drm_device *dev)
device_remove_bin_file(dev-primary-kdev, dpf_attrs);
#ifdef CONFIG_PM
sysfs_unmerge_group(dev-primary-kdev-kobj, rc6_attr_group);
+ sysfs_unmerge_group(dev-primary-kdev-kobj, rc6p_attr_group);
#endif
}
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6a670ad..cfdc666 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3629,10 +3629,12 @@ static void intel_print_rc6_info(struct drm_device
*dev, u32 mode)
else
mode = 0;
}
- DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n,
- (mode GEN6_RC_CTL_RC6_ENABLE) ? on : off,
- (mode GEN6_RC_CTL_RC6p_ENABLE) ? on : off,
- (mode GEN6_RC_CTL_RC6pp_ENABLE) ? on : off);
+ DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s\n,
+
Re: [Intel-gfx] [PATCH] drm/i915: Do not export RC6p and RC6pp if they don't exist
2014-10-07 10:36 GMT-03:00 Rodrigo Vivi rodrigo.v...@intel.com:
Avoid to expose RC6 and RC6pp to the platforms that doesn't support it.
So powertop can be changed to show RC6p and RC6pp only on the platforms
they are available.
v2: Simplify by merging RC6p and RC6pp groups and respect the spec that
mentions deep and deepest RC6 until BDW although they keep disabled
by default.
v3: Remove unecessary space.
v4: RC6p and RC6pp is only for SNB and IVB; unify debug msg and use
has_rc6p() on sanitize options instead of is gen 6 and ivb.
References: https://bugs.freedesktop.org/show_bug.cgi?id=84524
Cc: Josh Triplett josh.tripl...@intel.com
Cc: Paulo Zanoni paulo.r.zan...@intel.com
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_sysfs.c | 22 +++---
drivers/gpu/drm/i915/intel_pm.c | 15 ++-
3 files changed, 31 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5ba5524..d5412af 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2185,6 +2185,8 @@ struct drm_i915_cmd_table {
#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev))
#define HAS_RUNTIME_PM(dev)(IS_GEN6(dev) || IS_HASWELL(dev) || \
IS_BROADWELL(dev) || IS_VALLEYVIEW(dev))
+#define HAS_RC6(dev) (INTEL_INFO(dev)-gen = 6)
+#define HAS_RC6p(dev) (HAS_RC6(dev) INTEL_INFO(dev)-gen 7)
I know I'm the one who asked you to use 7, but this is wrong since
IVB is gen7... I'm sorry for inducing the mistake here :(
#define INTEL_PCH_DEVICE_ID_MASK 0xff00
#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/drivers/gpu/drm/i915/i915_sysfs.c
index 503847f..4a5af69 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -139,8 +139,6 @@ static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO,
show_rc6pp_ms, NULL);
static struct attribute *rc6_attrs[] = {
dev_attr_rc6_enable.attr,
dev_attr_rc6_residency_ms.attr,
- dev_attr_rc6p_residency_ms.attr,
- dev_attr_rc6pp_residency_ms.attr,
NULL
};
@@ -148,6 +146,17 @@ static struct attribute_group rc6_attr_group = {
.name = power_group_name,
.attrs = rc6_attrs
};
+
+static struct attribute *rc6p_attrs[] = {
+ dev_attr_rc6p_residency_ms.attr,
+ dev_attr_rc6pp_residency_ms.attr,
+ NULL
+};
+
+static struct attribute_group rc6p_attr_group = {
+ .name = power_group_name,
+ .attrs = rc6p_attrs
+};
#endif
static int l3_access_valid(struct drm_device *dev, loff_t offset)
@@ -595,12 +604,18 @@ void i915_setup_sysfs(struct drm_device *dev)
int ret;
#ifdef CONFIG_PM
- if (INTEL_INFO(dev)-gen = 6) {
+ if (HAS_RC6(dev)) {
ret = sysfs_merge_group(dev-primary-kdev-kobj,
rc6_attr_group);
if (ret)
DRM_ERROR(RC6 residency sysfs setup failed\n);
}
+ if (HAS_RC6p(dev)) {
+ ret = sysfs_merge_group(dev-primary-kdev-kobj,
+ rc6p_attr_group);
+ if (ret)
+ DRM_ERROR(RC6p residency sysfs setup failed\n);
+ }
#endif
if (HAS_L3_DPF(dev)) {
ret = device_create_bin_file(dev-primary-kdev, dpf_attrs);
@@ -640,5 +655,6 @@ void i915_teardown_sysfs(struct drm_device *dev)
device_remove_bin_file(dev-primary-kdev, dpf_attrs);
#ifdef CONFIG_PM
sysfs_unmerge_group(dev-primary-kdev-kobj, rc6_attr_group);
+ sysfs_unmerge_group(dev-primary-kdev-kobj, rc6p_attr_group);
#endif
}
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6a670ad..90eafa7 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3629,10 +3629,15 @@ static void intel_print_rc6_info(struct drm_device
*dev, u32 mode)
else
mode = 0;
}
- DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n,
- (mode GEN6_RC_CTL_RC6_ENABLE) ? on : off,
- (mode GEN6_RC_CTL_RC6p_ENABLE) ? on : off,
- (mode GEN6_RC_CTL_RC6pp_ENABLE) ? on : off);
+ if (HAS_RC6p(dev))
+ DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s RC6p %s RC6pp
%s\n,
+ (mode GEN6_RC_CTL_RC6_ENABLE) ? on : off,
+ (mode GEN6_RC_CTL_RC6p_ENABLE) ? on : off,
+ (mode GEN6_RC_CTL_RC6pp_ENABLE) ? on :
off);
+
+ else
+ DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s\n,
+
Re: [Intel-gfx] [PATCH] drm/i915: Do not export RC6p and RC6pp if they don't exist
On Tue, Sep 30, 2014 at 08:00:33AM -0700, Rodrigo Vivi wrote:
Avoid to expose RC6 and RC6pp to the platforms that doesn't support it.
Although this doesn't really change powertop behaviour as described on the
request.
References: https://bugs.freedesktop.org/show_bug.cgi?id=84524
Cc: Josh Triplett josh.tripl...@intel.com
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 3 +++
drivers/gpu/drm/i915/i915_sysfs.c | 39
---
drivers/gpu/drm/i915/intel_pm.c | 12
3 files changed, 47 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d10b417..54b2aac 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2185,6 +2185,9 @@ struct drm_i915_cmd_table {
#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev))
#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \
IS_BROADWELL(dev) || IS_VALLEYVIEW(dev))
+#define HAS_RC6(dev) (INTEL_INFO(dev)-gen = 6)
+#define HAS_RC6p(dev)(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
+#define HAS_RC6pp(dev) IS_GEN6(dev)
#define INTEL_PCH_DEVICE_ID_MASK 0xff00
#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/drivers/gpu/drm/i915/i915_sysfs.c
index 503847f..879e889 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -139,8 +139,6 @@ static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO,
show_rc6pp_ms, NULL);
static struct attribute *rc6_attrs[] = {
dev_attr_rc6_enable.attr,
dev_attr_rc6_residency_ms.attr,
- dev_attr_rc6p_residency_ms.attr,
- dev_attr_rc6pp_residency_ms.attr,
NULL
};
@@ -148,6 +146,26 @@ static struct attribute_group rc6_attr_group = {
.name = power_group_name,
.attrs = rc6_attrs
};
+
+static struct attribute *rc6p_attrs[] = {
+ dev_attr_rc6p_residency_ms.attr,
+ NULL
+};
+
+static struct attribute_group rc6p_attr_group = {
+ .name = power_group_name,
+ .attrs = rc6p_attrs
+};
+
+static struct attribute *rc6pp_attrs[] = {
+ dev_attr_rc6pp_residency_ms.attr,
+ NULL
+};
+
+static struct attribute_group rc6pp_attr_group = {
+ .name = power_group_name,
+ .attrs = rc6pp_attrs
+};
#endif
static int l3_access_valid(struct drm_device *dev, loff_t offset)
@@ -595,12 +613,25 @@ void i915_setup_sysfs(struct drm_device *dev)
int ret;
#ifdef CONFIG_PM
- if (INTEL_INFO(dev)-gen = 6) {
+ if (HAS_RC6(dev)) {
ret = sysfs_merge_group(dev-primary-kdev-kobj,
rc6_attr_group);
if (ret)
DRM_ERROR(RC6 residency sysfs setup failed\n);
}
+ if (HAS_RC6p(dev)) {
+ ret = sysfs_merge_group(dev-primary-kdev-kobj,
+ rc6p_attr_group);
+ if (ret)
+ DRM_ERROR(RC6p residency sysfs setup failed\n);
+ }
+
+ if (HAS_RC6pp(dev)) {
+ ret = sysfs_merge_group(dev-primary-kdev-kobj,
+ rc6pp_attr_group);
+ if (ret)
+ DRM_ERROR(RC6pp residency sysfs setup failed\n);
+ }
#endif
if (HAS_L3_DPF(dev)) {
ret = device_create_bin_file(dev-primary-kdev, dpf_attrs);
@@ -640,5 +671,7 @@ void i915_teardown_sysfs(struct drm_device *dev)
device_remove_bin_file(dev-primary-kdev, dpf_attrs);
#ifdef CONFIG_PM
sysfs_unmerge_group(dev-primary-kdev-kobj, rc6_attr_group);
+ sysfs_unmerge_group(dev-primary-kdev-kobj, rc6p_attr_group);
+ sysfs_unmerge_group(dev-primary-kdev-kobj, rc6pp_attr_group);
I think we could do just one additional group here for both rc6p and
rc6pp, simplifies the code a bit.
-Daniel
#endif
}
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 7553e47..fa1227e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3632,10 +3632,14 @@ static void intel_print_rc6_info(struct drm_device
*dev, u32 mode)
else
mode = 0;
}
- DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n,
- (mode GEN6_RC_CTL_RC6_ENABLE) ? on : off,
- (mode GEN6_RC_CTL_RC6p_ENABLE) ? on : off,
- (mode GEN6_RC_CTL_RC6pp_ENABLE) ? on : off);
+ DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s\n,
+ (mode GEN6_RC_CTL_RC6_ENABLE) ? on : off);
+ if (HAS_RC6p(dev))
+ DRM_DEBUG_KMS(Enabling RC6 states: RC6p %s\n,
+ (mode GEN6_RC_CTL_RC6p_ENABLE) ? on : off);
+ if (HAS_RC6pp(dev))
+ DRM_DEBUG_KMS(Enabling
Re: [Intel-gfx] [PATCH] drm/i915: Do not export RC6p and RC6pp if they don't exist
On Wed, Oct 1, 2014 at 1:08 AM, Daniel Vetter dan...@ffwll.ch wrote:
On Tue, Sep 30, 2014 at 08:00:33AM -0700, Rodrigo Vivi wrote:
Avoid to expose RC6 and RC6pp to the platforms that doesn't support it.
Although this doesn't really change powertop behaviour as described on the
request.
References: https://bugs.freedesktop.org/show_bug.cgi?id=84524
Cc: Josh Triplett josh.tripl...@intel.com
Signed-off-by: Rodrigo Vivi rodrigo.v...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 3 +++
drivers/gpu/drm/i915/i915_sysfs.c | 39
---
drivers/gpu/drm/i915/intel_pm.c | 12
3 files changed, 47 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h
b/drivers/gpu/drm/i915/i915_drv.h
index d10b417..54b2aac 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2185,6 +2185,9 @@ struct drm_i915_cmd_table {
#define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev))
#define HAS_RUNTIME_PM(dev) (IS_GEN6(dev) || IS_HASWELL(dev) || \
IS_BROADWELL(dev) || IS_VALLEYVIEW(dev))
+#define HAS_RC6(dev) (INTEL_INFO(dev)-gen = 6)
+#define HAS_RC6p(dev)(IS_GEN6(dev) || IS_IVYBRIDGE(dev))
+#define HAS_RC6pp(dev) IS_GEN6(dev)
#define INTEL_PCH_DEVICE_ID_MASK 0xff00
#define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/drivers/gpu/drm/i915/i915_sysfs.c
index 503847f..879e889 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -139,8 +139,6 @@ static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO,
show_rc6pp_ms, NULL);
static struct attribute *rc6_attrs[] = {
dev_attr_rc6_enable.attr,
dev_attr_rc6_residency_ms.attr,
- dev_attr_rc6p_residency_ms.attr,
- dev_attr_rc6pp_residency_ms.attr,
NULL
};
@@ -148,6 +146,26 @@ static struct attribute_group rc6_attr_group = {
.name = power_group_name,
.attrs = rc6_attrs
};
+
+static struct attribute *rc6p_attrs[] = {
+ dev_attr_rc6p_residency_ms.attr,
+ NULL
+};
+
+static struct attribute_group rc6p_attr_group = {
+ .name = power_group_name,
+ .attrs = rc6p_attrs
+};
+
+static struct attribute *rc6pp_attrs[] = {
+ dev_attr_rc6pp_residency_ms.attr,
+ NULL
+};
+
+static struct attribute_group rc6pp_attr_group = {
+ .name = power_group_name,
+ .attrs = rc6pp_attrs
+};
#endif
static int l3_access_valid(struct drm_device *dev, loff_t offset)
@@ -595,12 +613,25 @@ void i915_setup_sysfs(struct drm_device *dev)
int ret;
#ifdef CONFIG_PM
- if (INTEL_INFO(dev)-gen = 6) {
+ if (HAS_RC6(dev)) {
ret = sysfs_merge_group(dev-primary-kdev-kobj,
rc6_attr_group);
if (ret)
DRM_ERROR(RC6 residency sysfs setup failed\n);
}
+ if (HAS_RC6p(dev)) {
+ ret = sysfs_merge_group(dev-primary-kdev-kobj,
+ rc6p_attr_group);
+ if (ret)
+ DRM_ERROR(RC6p residency sysfs setup failed\n);
+ }
+
+ if (HAS_RC6pp(dev)) {
+ ret = sysfs_merge_group(dev-primary-kdev-kobj,
+ rc6pp_attr_group);
+ if (ret)
+ DRM_ERROR(RC6pp residency sysfs setup failed\n);
+ }
#endif
if (HAS_L3_DPF(dev)) {
ret = device_create_bin_file(dev-primary-kdev, dpf_attrs);
@@ -640,5 +671,7 @@ void i915_teardown_sysfs(struct drm_device *dev)
device_remove_bin_file(dev-primary-kdev, dpf_attrs);
#ifdef CONFIG_PM
sysfs_unmerge_group(dev-primary-kdev-kobj, rc6_attr_group);
+ sysfs_unmerge_group(dev-primary-kdev-kobj, rc6p_attr_group);
+ sysfs_unmerge_group(dev-primary-kdev-kobj, rc6pp_attr_group);
I think we could do just one additional group here for both rc6p and
rc6pp, simplifies the code a bit.
if both snb and ivb have both deep and deepest I agree... But I
defined above rc6pp only on snb and rc6p on snb and ivb... am I wrong?
-Daniel
#endif
}
diff --git a/drivers/gpu/drm/i915/intel_pm.c
b/drivers/gpu/drm/i915/intel_pm.c
index 7553e47..fa1227e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3632,10 +3632,14 @@ static void intel_print_rc6_info(struct drm_device
*dev, u32 mode)
else
mode = 0;
}
- DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s, RC6p %s, RC6pp %s\n,
- (mode GEN6_RC_CTL_RC6_ENABLE) ? on : off,
- (mode GEN6_RC_CTL_RC6p_ENABLE) ? on : off,
- (mode GEN6_RC_CTL_RC6pp_ENABLE) ? on : off);
+ DRM_DEBUG_KMS(Enabling RC6 states: RC6 %s\n,
+ (mode GEN6_RC_CTL_RC6_ENABLE) ? on : off);
+ if
