Re: [Intel-gfx] [PATCH] drm/i915: Kill the active list spinlock

2010-08-06 Thread Eric Anholt
On Wed,  4 Aug 2010 14:09:45 +0100, Chris Wilson ch...@chris-wilson.co.uk 
wrote:
 This spinlock only served debugging purposes in a time when we could not
 be sure of the mutex ever being released upon a GPU hang. As we now
 should be able rely on hangcheck to do the job for us (and that error
 reporting should not itself require the struct mutex) we can kill the
 incomplete and misleading attempt at protection.
 
 Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk

So, when am I getting hangcheck resets on Ironlake?  Hmm?

But yeah, this was a hack during initial bringup of GEM and I'll be glad
to see it go away... once you rebase so it doesn't conflict.


pgpVq8hin3dS5.pgp
Description: PGP signature
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx


Re: [Intel-gfx] [PATCH] drm/i915: Kill the active list spinlock

2010-08-06 Thread Chris Wilson
On Fri, 06 Aug 2010 14:41:02 -0700, Eric Anholt e...@anholt.net wrote:
 On Wed,  4 Aug 2010 14:09:45 +0100, Chris Wilson ch...@chris-wilson.co.uk 
 wrote:
  This spinlock only served debugging purposes in a time when we could not
  be sure of the mutex ever being released upon a GPU hang. As we now
  should be able rely on hangcheck to do the job for us (and that error
  reporting should not itself require the struct mutex) we can kill the
  incomplete and misleading attempt at protection.
  
  Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
 
 So, when am I getting hangcheck resets on Ironlake?  Hmm?

I suppose you'll want a more sophisticated watchdog using GPU timers, as
well ;-)

Yes, we should sort out the reset bits for ILK and the rest.
-- 
Chris Wilson, Intel Open Source Technology Centre
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx