Re: [Intel-gfx] [PATCH 2/2] drm/i915: Prune gen8_gt_irq_handler

[Mika Kuoppala]

Chris Wilson  writes:

> Quoting Chris Wilson (2018-02-15 07:37:13)
>> if (master_ctl & (GEN8_GT_RCS_IRQ | GEN8_GT_BCS_IRQ)) {
>> -   gt_iir[0] = I915_READ_FW(GEN8_GT_IIR(0));
>> -   if (gt_iir[0])
>> -   I915_WRITE_FW(GEN8_GT_IIR(0), gt_iir[0]);
>> +   gt_iir[0] = readl(regs + 
>> i915_mmio_reg_offset(GEN8_GT_IIR(0)));
>> +   if (likely(gt_iir[0]))
>> +   writel(gt_iir[0], regs + 
>> i915_mmio_reg_offset(GEN8_GT_IIR(0)));
>
> What do we feel about
>
> #define raw_reg_read32(mmio, reg) readl(mmio + i915_mmio_reg_offset(reg))
> #define raw_reg_write32(mmio, reg, value) writel(value, mmio + 
> i915_mmio_reg_offset(reg))

I am in favour. Shorter versions would be even more pleasing.
reg_read and reg_write.
-Mika

>
> for transitioning away from the implicit argument in I915_READ?
> -Chris
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Re: [Intel-gfx] [PATCH 2/2] drm/i915: Prune gen8_gt_irq_handler

[Chris Wilson]

Quoting Chris Wilson (2018-02-15 07:37:13)
> if (master_ctl & (GEN8_GT_RCS_IRQ | GEN8_GT_BCS_IRQ)) {
> -   gt_iir[0] = I915_READ_FW(GEN8_GT_IIR(0));
> -   if (gt_iir[0])
> -   I915_WRITE_FW(GEN8_GT_IIR(0), gt_iir[0]);
> +   gt_iir[0] = readl(regs + 
> i915_mmio_reg_offset(GEN8_GT_IIR(0)));
> +   if (likely(gt_iir[0]))
> +   writel(gt_iir[0], regs + 
> i915_mmio_reg_offset(GEN8_GT_IIR(0)));

What do we feel about

#define raw_reg_read32(mmio, reg) readl(mmio + i915_mmio_reg_offset(reg))
#define raw_reg_write32(mmio, reg, value) writel(value, mmio + 
i915_mmio_reg_offset(reg))

for transitioning away from the implicit argument in I915_READ?
-Chris
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