Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Program SKL+ watermarks/ddb more carefully (rev7)

2018-11-15 Thread Ville Syrjälä
On Thu, Nov 15, 2018 at 04:23:46PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 15, 2018 at 05:21:46AM -, Patchwork wrote:
> > == Series Details ==
> > 
> > Series: drm/i915: Program SKL+ watermarks/ddb more carefully (rev7)
> > URL   : https://patchwork.freedesktop.org/series/51878/
> > State : failure
> > 
> > == Summary ==
> > 
> > = CI Bug Log - changes from CI_DRM_5140_full -> Patchwork_10827_full =
> > 
> > == Summary - FAILURE ==
> > 
> >   Serious unknown changes coming with Patchwork_10827_full absolutely need 
> > to be
> >   verified manually.
> >   
> >   If you think the reported changes have nothing to do with the changes
> >   introduced in Patchwork_10827_full, please notify your bug team to allow 
> > them
> >   to document this new failure mode, which will reduce false positives in 
> > CI.
> > 
> >   
> > 
> > == Possible new issues ==
> > 
> >   Here are the unknown changes that may have been introduced in 
> > Patchwork_10827_full:
> > 
> >   === IGT changes ===
> > 
> >  Possible regressions 
> > 
> > igt@prime_vgem@basic-fence-flip:
> >   shard-apl:  PASS -> DMESG-WARN
> >   shard-kbl:  PASS -> DMESG-WARN
> 
> 
> <3> [72.612353] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
> cursor level 0 (expected e=0 b=0 l=0, got e=1 b=3 l=1)
> <3> [72.612661] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
> cursor level 1 (expected e=0 b=0 l=0, got e=1 b=4 l=1)
> <3> [72.612784] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
> cursor level 2 (expected e=0 b=0 l=0, got e=1 b=4 l=1)
> <3> [72.612905] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
> cursor level 3 (expected e=0 b=0 l=0, got e=1 b=6 l=2)
> <3> [72.613026] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
> cursor level 4 (expected e=0 b=0 l=0, got e=1 b=6 l=2)
> <3> [72.613147] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
> cursor level 5 (expected e=0 b=0 l=0, got e=1 b=6 l=2)
> <3> [72.613267] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
> cursor level 6 (expected e=0 b=0 l=0, got e=1 b=6 l=2)
> <3> [72.613388] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
> cursor level 7 (expected e=0 b=0 l=0, got e=1 b=6 l=2)
> 
> I suspect this would be caused by the cursor becoming fully clipped 
> but still logically enabled (fb != NULL) during the  previous test
> (kms_chv_cursor_fail). And then when it comes time to turn off the
> pipe we won't reprogram the cursor because its visibility didn't
> change and thus we won't clear its watermarks either. I think I'm
> going to write a targeted test for that just to make sure my
> analysis is correct.

Actually that can't be it I think. There was no complaint about a
non-zero DDB allocation left behind, so somehow we've got non-zero
watermarks with no DDB allocated. That doesn't quite make sense.

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH 3/3] drm/i915/bios: make the aux channel macros private to the vbt parser

2018-11-15 Thread Imre Deak
On Thu, Nov 15, 2018 at 12:52:37PM +0200, Jani Nikula wrote:
> Hide the aux channel macros in intel_vbt_defs.h now that their use has
> been abstracted in intel_bios_port_aux_ch().
> 
> Cc: Imre Deak 
> Signed-off-by: Jani Nikula 
> ---
>  drivers/gpu/drm/i915/i915_drv.h   | 7 ---
>  drivers/gpu/drm/i915/intel_vbt_defs.h | 7 +++
>  2 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d100c38697ff..d69b71d368d3 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1053,13 +1053,6 @@ struct i915_gem_mm {
>  
>  #define I915_ENGINE_WEDGED_TIMEOUT  (60 * HZ)  /* Reset but no recovery? */
>  
> -#define DP_AUX_A 0x40
> -#define DP_AUX_B 0x10
> -#define DP_AUX_C 0x20
> -#define DP_AUX_D 0x30
> -#define DP_AUX_E 0x50
> -#define DP_AUX_F 0x60
> -
>  struct ddi_vbt_port_info {
>   int max_tmds_clock;
>  
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h 
> b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index bba98cf83cbd..bf3662ad5fed 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h

Unrelated, but this has:
"This information is private to VBT parsing in intel_bios.c."
while it's also included from gvt/opregion.c

On patches 1-3:
Reviewed-by: Imre Deak 


> @@ -326,6 +326,13 @@ enum vbt_gmbus_ddi {
>   ICL_DDC_BUS_PORT_4,
>  };
>  
> +#define DP_AUX_A 0x40
> +#define DP_AUX_B 0x10
> +#define DP_AUX_C 0x20
> +#define DP_AUX_D 0x30
> +#define DP_AUX_E 0x50
> +#define DP_AUX_F 0x60
> +
>  #define VBT_DP_MAX_LINK_RATE_HBR30
>  #define VBT_DP_MAX_LINK_RATE_HBR21
>  #define VBT_DP_MAX_LINK_RATE_HBR 2
> -- 
> 2.11.0
> 
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[Intel-gfx] [PATCH v17 2/4] tests/gem_ctx_sseu: Dynamic (sub)slice programming tests

2018-11-15 Thread Tvrtko Ursulin
From: Lionel Landwerlin 

Verify that the per-context dynamic SSEU uAPI works as expected.

v2: Add subslice tests (Lionel)
Use MI_SET_PREDICATE for further verification when available (Lionel)

v3: Rename to gem_ctx_rpcs (Lionel)

v4: Update kernel API (Lionel)
Add 0 value test (Lionel)
Exercise invalid values (Lionel)

v5: Add perf tests (Lionel)

v6: Add new sysfs entry tests (Lionel)

v7: Test rsvd fields
Update for kernel series changes

v8: Drop test_no_sseu_support() test (Kelvin)
Drop drm_intel_*() apis (Chris)

v9: by Chris:
Drop all do_ioctl/do_ioctl_err()
Use gem_context_[gs]et_param()
Use gem_read() instead of mapping memory
by Lionel:
Test dynamic sseu on/off more

Tvrtko Ursulin:

v10:
 * Various style tweaks and refactorings.
 * New test coverage.

v11:
 * Change platform support to just Gen11.
 * Simplify availability test. (Chris Wilson)
 * More invalid pointer tests. (Chris Wilson)

v12:
 * Fix MAP_FIXED use (doh!).
 * Fix get/set copy errors.
 * Drop supported platform test. (Chris Wilson)
 * Add mmap__gtt test. (Chris Wilson)

v13:
 * Commit message tweaks.
 * Added reset/hang/suspend tests. (Chris Wilson)
 * Assert spinner is busy. (Chris Wilson)
 * Remove some more ABI assumptions. (Chris Wilson)

v14:
 * Use default resume time. (Chris Wilson)
 * Trigger hang after rpcs read batch has been submitted. (Chris Wilson)

v15:
 * Adjust for uAPI restrictions.

v16:
 * Build system changes.

v17:
 * Remove all subtests which read the RPCS register. (Joonas Lahtinen)

Signed-off-by: Lionel Landwerlin 
Signed-off-by: Tvrtko Ursulin 
Reviewed-by: Chris Wilson  # v14
---
 tests/Makefile.am  |   1 +
 tests/Makefile.sources |   3 +
 tests/i915/gem_ctx_param.c |   4 +-
 tests/i915/gem_ctx_sseu.c  | 532 +
 tests/meson.build  |   8 +
 5 files changed, 547 insertions(+), 1 deletion(-)
 create mode 100644 tests/i915/gem_ctx_sseu.c

diff --git a/tests/Makefile.am b/tests/Makefile.am
index 3d1ce0bc1af8..79333ac7db26 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -109,6 +109,7 @@ gem_close_race_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
 gem_close_race_LDADD = $(LDADD) -lpthread
 gem_ctx_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
 gem_ctx_thrash_LDADD = $(LDADD) -lpthread
+gem_ctx_sseu_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
 gem_exec_parallel_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
 gem_exec_parallel_LDADD = $(LDADD) -lpthread
 gem_fence_thrash_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index c910210b992f..fd99bc15da67 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -159,6 +159,9 @@ gem_ctx_isolation_SOURCES = i915/gem_ctx_isolation.c
 TESTS_progs += gem_ctx_param
 gem_ctx_param_SOURCES = i915/gem_ctx_param.c
 
+TESTS_progs += gem_ctx_sseu
+gem_ctx_sseu_SOURCES = i915/gem_ctx_sseu.c
+
 TESTS_progs += gem_ctx_switch
 gem_ctx_switch_SOURCES = i915/gem_ctx_switch.c
 
diff --git a/tests/i915/gem_ctx_param.c b/tests/i915/gem_ctx_param.c
index c46fd709b0d7..af1afeaa2f2f 100644
--- a/tests/i915/gem_ctx_param.c
+++ b/tests/i915/gem_ctx_param.c
@@ -294,11 +294,13 @@ igt_main
set_priority(fd);
}
 
+   /* I915_CONTEXT_PARAM_SSEU tests are located in gem_ctx_sseu.c */
+
/* NOTE: This testcase intentionally tests for the next free parameter
 * to catch ABI extensions. Don't "fix" this testcase without adding all
 * the tests for the new param first.
 */
-   arg.param = I915_CONTEXT_PARAM_PRIORITY + 1;
+   arg.param = I915_CONTEXT_PARAM_SSEU + 1;
 
igt_subtest("invalid-param-get") {
arg.ctx_id = ctx;
diff --git a/tests/i915/gem_ctx_sseu.c b/tests/i915/gem_ctx_sseu.c
new file mode 100644
index ..e5d6030cc9b3
--- /dev/null
+++ b/tests/i915/gem_ctx_sseu.c
@@ -0,0 +1,532 @@
+/*
+ * Copyright © 2017-2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 

Re: [Intel-gfx] [PATCH 3/3] drm/i915/bios: make the aux channel macros private to the vbt parser

2018-11-15 Thread Jani Nikula
On Thu, 15 Nov 2018, Jani Nikula  wrote:
> On Thu, 15 Nov 2018, Imre Deak  wrote:
>> On Thu, Nov 15, 2018 at 12:52:37PM +0200, Jani Nikula wrote:
>>> Hide the aux channel macros in intel_vbt_defs.h now that their use has
>>> been abstracted in intel_bios_port_aux_ch().
>>> 
>>> Cc: Imre Deak 
>>> Signed-off-by: Jani Nikula 
>>> ---
>>>  drivers/gpu/drm/i915/i915_drv.h   | 7 ---
>>>  drivers/gpu/drm/i915/intel_vbt_defs.h | 7 +++
>>>  2 files changed, 7 insertions(+), 7 deletions(-)
>>> 
>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>>> b/drivers/gpu/drm/i915/i915_drv.h
>>> index d100c38697ff..d69b71d368d3 100644
>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>> @@ -1053,13 +1053,6 @@ struct i915_gem_mm {
>>>  
>>>  #define I915_ENGINE_WEDGED_TIMEOUT  (60 * HZ)  /* Reset but no recovery? */
>>>  
>>> -#define DP_AUX_A 0x40
>>> -#define DP_AUX_B 0x10
>>> -#define DP_AUX_C 0x20
>>> -#define DP_AUX_D 0x30
>>> -#define DP_AUX_E 0x50
>>> -#define DP_AUX_F 0x60
>>> -
>>>  struct ddi_vbt_port_info {
>>> int max_tmds_clock;
>>>  
>>> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h 
>>> b/drivers/gpu/drm/i915/intel_vbt_defs.h
>>> index bba98cf83cbd..bf3662ad5fed 100644
>>> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
>>> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
>>
>> Unrelated, but this has:
>> "This information is private to VBT parsing in intel_bios.c."
>> while it's also included from gvt/opregion.c
>
> Yeah, they wanted to use it for their VBT stuff as well, but should be
> isolated.
>
>> On patches 1-3:
>> Reviewed-by: Imre Deak 
>
> Thanks,

+pushed

> Jani.
>
>>
>>
>>> @@ -326,6 +326,13 @@ enum vbt_gmbus_ddi {
>>> ICL_DDC_BUS_PORT_4,
>>>  };
>>>  
>>> +#define DP_AUX_A 0x40
>>> +#define DP_AUX_B 0x10
>>> +#define DP_AUX_C 0x20
>>> +#define DP_AUX_D 0x30
>>> +#define DP_AUX_E 0x50
>>> +#define DP_AUX_F 0x60
>>> +
>>>  #define VBT_DP_MAX_LINK_RATE_HBR3  0
>>>  #define VBT_DP_MAX_LINK_RATE_HBR2  1
>>>  #define VBT_DP_MAX_LINK_RATE_HBR   2
>>> -- 
>>> 2.11.0
>>> 

-- 
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[Intel-gfx] [PULL] drm-intel-fixes

2018-11-15 Thread Joonas Lahtinen
Hi Dave,

Most importantly we have a fix for an incorrect EU count reported
from kernel, Gen9+ scaled output fix, and avoiding OOPS on MST
display systems.

So looking pretty stable.

Regards, Joonas

PS. Had some CI turbulence for this PR as we raised the bar
so that now a loss of lockdep coverage aborts the CI run.
That resulted in the unfortunate realization (again) that
the patches in topic/for-core-CI branch keep some daemons
away from drm-tip testing. But fear not, next week this
excercise should yield a better PR :)

***

drm-intel-fixes-2018-11-15:
- Fix Bugzilla #108712: Fix incorrect EU count report from kernel
- Fix to account for scale factor when calculating initial phase on scaled 
output
- Avoid too trigger-happy HPD storm detection and fix a race and an OOPS for 
MST systems.
- Relocation race fix for Gen4/5
- A couple ICL fixes and dependencies for above Fixes:.

The following changes since commit ccda4af0f4b92f7b4c308d3acc262f4a7e3affad:

  Linux 4.20-rc2 (2018-11-11 17:12:31 -0600)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2018-11-15

for you to fetch changes up to 6e8adf6f4a4fa57dd3bef6b70de96e2b7b311204:

  drm/i915: Account for scale factor when calculating initial phase (2018-11-15 
13:57:20 +0200)


- Fix Bugzilla #108712: Fix incorrect EU count report from kernel
- Fix to account for scale factor when calculating initial phase on scaled 
output
- Avoid too trigger-happy HPD storm detection and fix a race and an OOPS for 
MST systems.
- Relocation race fix for Gen4/5
- A couple ICL fixes and dependencies for above Fixes:.


Chris Wilson (2):
  drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5
  drm/i915/execlists: Force write serialisation into context image vs 
execution

Imre Deak (1):
  drm/i915/icl: Fix power well 2 wrt. DC-off toggling order

Lionel Landwerlin (1):
  drm/i915: fix broadwell EU computation

Lyude Paul (2):
  drm/i915: Fix possible race in intel_dp_add_mst_connector()
  drm/i915: Fix NULL deref when re-enabling HPD IRQs on systems with MST

Maarten Lankhorst (1):
  drm/i915: Move programming plane scaler to its own function.

Mika Kuoppala (1):
  drm/i915/icl: Drop spurious register read from icl_dbuf_slices_update

Ville Syrjälä (3):
  drm/i915: Fix hpd handling for pins with two encoders
  drm/i915: Clean up skl_program_scaler()
  drm/i915: Account for scale factor when calculating initial phase

 drivers/gpu/drm/i915/intel_device_info.c |  2 +-
 drivers/gpu/drm/i915/intel_display.c | 45 ++--
 drivers/gpu/drm/i915/intel_dp_mst.c  |  8 +--
 drivers/gpu/drm/i915/intel_drv.h |  2 +-
 drivers/gpu/drm/i915/intel_hotplug.c | 70 +---
 drivers/gpu/drm/i915/intel_lrc.c | 14 -
 drivers/gpu/drm/i915/intel_ringbuffer.c  | 38 -
 drivers/gpu/drm/i915/intel_runtime_pm.c  | 16 +++---
 drivers/gpu/drm/i915/intel_sprite.c  | 93 ++--
 9 files changed, 208 insertions(+), 80 deletions(-)
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Re: [Intel-gfx] [PATCH 3/3] drm/i915/bios: make the aux channel macros private to the vbt parser

2018-11-15 Thread Jani Nikula
On Thu, 15 Nov 2018, Imre Deak  wrote:
> On Thu, Nov 15, 2018 at 12:52:37PM +0200, Jani Nikula wrote:
>> Hide the aux channel macros in intel_vbt_defs.h now that their use has
>> been abstracted in intel_bios_port_aux_ch().
>> 
>> Cc: Imre Deak 
>> Signed-off-by: Jani Nikula 
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h   | 7 ---
>>  drivers/gpu/drm/i915/intel_vbt_defs.h | 7 +++
>>  2 files changed, 7 insertions(+), 7 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index d100c38697ff..d69b71d368d3 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1053,13 +1053,6 @@ struct i915_gem_mm {
>>  
>>  #define I915_ENGINE_WEDGED_TIMEOUT  (60 * HZ)  /* Reset but no recovery? */
>>  
>> -#define DP_AUX_A 0x40
>> -#define DP_AUX_B 0x10
>> -#define DP_AUX_C 0x20
>> -#define DP_AUX_D 0x30
>> -#define DP_AUX_E 0x50
>> -#define DP_AUX_F 0x60
>> -
>>  struct ddi_vbt_port_info {
>>  int max_tmds_clock;
>>  
>> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h 
>> b/drivers/gpu/drm/i915/intel_vbt_defs.h
>> index bba98cf83cbd..bf3662ad5fed 100644
>> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
>> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
>
> Unrelated, but this has:
> "This information is private to VBT parsing in intel_bios.c."
> while it's also included from gvt/opregion.c

Yeah, they wanted to use it for their VBT stuff as well, but should be
isolated.

> On patches 1-3:
> Reviewed-by: Imre Deak 

Thanks,
Jani.

>
>
>> @@ -326,6 +326,13 @@ enum vbt_gmbus_ddi {
>>  ICL_DDC_BUS_PORT_4,
>>  };
>>  
>> +#define DP_AUX_A 0x40
>> +#define DP_AUX_B 0x10
>> +#define DP_AUX_C 0x20
>> +#define DP_AUX_D 0x30
>> +#define DP_AUX_E 0x50
>> +#define DP_AUX_F 0x60
>> +
>>  #define VBT_DP_MAX_LINK_RATE_HBR3   0
>>  #define VBT_DP_MAX_LINK_RATE_HBR2   1
>>  #define VBT_DP_MAX_LINK_RATE_HBR2
>> -- 
>> 2.11.0
>> 

-- 
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915: extract fixed point math to i915_fixed.h

2018-11-15 Thread Patchwork
== Series Details ==

Series: series starting with [1/5] drm/i915: extract fixed point math to 
i915_fixed.h
URL   : https://patchwork.freedesktop.org/series/52528/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5142_full -> Patchwork_10829_full =

== Summary - SUCCESS ==

  No regressions found.

  

== Known issues ==

  Here are the changes found in Patchwork_10829_full that come from known 
issues:

  === IGT changes ===

 Issues hit 

igt@drv_suspend@shrink:
  shard-skl:  NOTRUN -> INCOMPLETE (fdo#106886)

igt@gem_cpu_reloc@full:
  shard-skl:  NOTRUN -> INCOMPLETE (fdo#108073)

igt@gem_exec_suspend@basic-s3:
  shard-skl:  PASS -> INCOMPLETE (fdo#107773, fdo#104108)

igt@gem_userptr_blits@readonly-unsync:
  shard-skl:  PASS -> INCOMPLETE (fdo#108074)

igt@kms_color@pipe-b-legacy-gamma:
  shard-apl:  PASS -> FAIL (fdo#104782)

igt@kms_cursor_crc@cursor-64x21-sliding:
  shard-apl:  PASS -> FAIL (fdo#103232) +3

igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
  shard-glk:  PASS -> DMESG-WARN (fdo#106538, fdo#105763)

igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
  shard-skl:  PASS -> FAIL (fdo#103184)

igt@kms_flip@flip-vs-expired-vblank-interruptible:
  shard-glk:  PASS -> FAIL (fdo#105363, fdo#102887)

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
  shard-glk:  PASS -> FAIL (fdo#103167) +1

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
  shard-apl:  PASS -> FAIL (fdo#103167)

igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
  shard-skl:  PASS -> FAIL (fdo#103167)

igt@kms_plane@plane-position-covered-pipe-c-planes:
  shard-apl:  PASS -> FAIL (fdo#103166) +2

igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
  shard-skl:  PASS -> FAIL (fdo#107815, fdo#108145)

igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
  shard-skl:  NOTRUN -> FAIL (fdo#107815, fdo#108145)

igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
  shard-skl:  NOTRUN -> FAIL (fdo#108145) +1

igt@kms_universal_plane@universal-plane-pipe-c-functional:
  shard-glk:  PASS -> FAIL (fdo#103166) +1


 Possible fixes 

igt@gem_ppgtt@blt-vs-render-ctx0:
  shard-kbl:  INCOMPLETE (fdo#106887, fdo#103665, fdo#106023) -> 
PASS

igt@kms_color@pipe-b-degamma:
  shard-apl:  FAIL (fdo#104782) -> PASS

igt@kms_cursor_crc@cursor-128x128-suspend:
  shard-kbl:  DMESG-WARN (fdo#108566) -> PASS

igt@kms_cursor_crc@cursor-64x64-dpms:
  shard-apl:  FAIL (fdo#103232) -> PASS +2

igt@kms_flip@flip-vs-expired-vblank:
  shard-skl:  FAIL (fdo#105363) -> PASS

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
  shard-apl:  FAIL (fdo#103167) -> PASS +1

igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
  shard-glk:  FAIL (fdo#103167) -> PASS +2

igt@kms_plane@pixel-format-pipe-c-planes:
  shard-apl:  FAIL (fdo#103166) -> PASS +1

igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
  shard-glk:  INCOMPLETE (k.org#198133, fdo#103359) -> PASS

igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
  shard-skl:  FAIL (fdo#107815) -> PASS

igt@kms_setmode@basic:
  shard-kbl:  FAIL (fdo#99912) -> PASS

igt@kms_vblank@pipe-b-ts-continuation-suspend:
  shard-hsw:  FAIL (fdo#104894) -> PASS

igt@perf@polling:
  shard-hsw:  FAIL (fdo#102252) -> PASS

igt@pm_rpm@modeset-lpsp-stress:
  shard-skl:  INCOMPLETE (fdo#107807) -> PASS

igt@pm_rpm@system-suspend-modeset:
  shard-skl:  INCOMPLETE (fdo#107807, fdo#104108) -> PASS


  fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184
  fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
  fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
  fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782
  fdo#104894 https://bugs.freedesktop.org/show_bug.cgi?id=104894
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
  fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
  fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
  fdo#106886 

Re: [Intel-gfx] [PATCH v3] drm/i915/hdmi: Reorder structure to match specification

2018-11-15 Thread Jani Nikula
On Wed, 31 Oct 2018, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor 
>
> reorder structure of 297, 594 N values to group Audio Sample Frequencies
> together to make updating from HDMI specification easier.
>
> V2: Match patch 1/2 version
> V3: Arrange by sample freq, then pixel clock.
>
> Cc: Jani Nikula 
> Signed-off-by: Clint Taylor 

Pushed, thanks for the patch.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/intel_audio.c | 32 
>  1 file changed, 16 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_audio.c 
> b/drivers/gpu/drm/i915/intel_audio.c
> index ccd88da..ae55a68 100644
> --- a/drivers/gpu/drm/i915/intel_audio.c
> +++ b/drivers/gpu/drm/i915/intel_audio.c
> @@ -153,32 +153,32 @@ struct dp_aud_n_m {
>   int n;
>   int cts;
>  } hdmi_aud_ncts[] = {
> - { 44100, TMDS_296M, 4459, 234375 },
> - { 44100, TMDS_297M, 4704, 247500 },
> - { 48000, TMDS_296M, 5824, 281250 },
> - { 48000, TMDS_297M, 5120, 247500 },
>   { 32000, TMDS_296M, 5824, 421875 },
>   { 32000, TMDS_297M, 3072, 222750 },
> + { 32000, TMDS_593M, 5824, 843750 },
> + { 32000, TMDS_594M, 3072, 445500 },
> + { 44100, TMDS_296M, 4459, 234375 },
> + { 44100, TMDS_297M, 4704, 247500 },
> + { 44100, TMDS_593M, 8918, 937500 },
> + { 44100, TMDS_594M, 9408, 99 },
>   { 88200, TMDS_296M, 8918, 234375 },
>   { 88200, TMDS_297M, 9408, 247500 },
> - { 96000, TMDS_296M, 11648, 281250 },
> - { 96000, TMDS_297M, 10240, 247500 },
> + { 88200, TMDS_593M, 17836, 937500 },
> + { 88200, TMDS_594M, 18816, 99 },
>   { 176400, TMDS_296M, 17836, 234375 },
>   { 176400, TMDS_297M, 18816, 247500 },
> - { 192000, TMDS_296M, 23296, 281250 },
> - { 192000, TMDS_297M, 20480, 247500 },
> - { 44100, TMDS_593M, 8918, 937500 },
> - { 44100, TMDS_594M, 9408, 99 },
> + { 176400, TMDS_593M, 35672, 937500 },
> + { 176400, TMDS_594M, 37632, 99 },
> + { 48000, TMDS_296M, 5824, 281250 },
> + { 48000, TMDS_297M, 5120, 247500 },
>   { 48000, TMDS_593M, 5824, 562500 },
>   { 48000, TMDS_594M, 6144, 594000 },
> - { 32000, TMDS_593M, 5824, 843750 },
> - { 32000, TMDS_594M, 3072, 445500 },
> - { 88200, TMDS_593M, 17836, 937500 },
> - { 88200, TMDS_594M, 18816, 99 },
> + { 96000, TMDS_296M, 11648, 281250 },
> + { 96000, TMDS_297M, 10240, 247500 },
>   { 96000, TMDS_593M, 11648, 562500 },
>   { 96000, TMDS_594M, 12288, 594000 },
> - { 176400, TMDS_593M, 35672, 937500 },
> - { 176400, TMDS_594M, 37632, 99 },
> + { 192000, TMDS_296M, 23296, 281250 },
> + { 192000, TMDS_297M, 20480, 247500 },
>   { 192000, TMDS_593M, 23296, 562500 },
>   { 192000, TMDS_594M, 24576, 594000 },
>  };

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Program SKL+ watermarks/ddb more carefully (rev7)

2018-11-15 Thread Ville Syrjälä
On Thu, Nov 15, 2018 at 05:21:46AM -, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Program SKL+ watermarks/ddb more carefully (rev7)
> URL   : https://patchwork.freedesktop.org/series/51878/
> State : failure
> 
> == Summary ==
> 
> = CI Bug Log - changes from CI_DRM_5140_full -> Patchwork_10827_full =
> 
> == Summary - FAILURE ==
> 
>   Serious unknown changes coming with Patchwork_10827_full absolutely need to 
> be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_10827_full, please notify your bug team to allow 
> them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> == Possible new issues ==
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_10827_full:
> 
>   === IGT changes ===
> 
>  Possible regressions 
> 
> igt@prime_vgem@basic-fence-flip:
>   shard-apl:  PASS -> DMESG-WARN
>   shard-kbl:  PASS -> DMESG-WARN


<3> [72.612353] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
cursor level 0 (expected e=0 b=0 l=0, got e=1 b=3 l=1)
<3> [72.612661] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
cursor level 1 (expected e=0 b=0 l=0, got e=1 b=4 l=1)
<3> [72.612784] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
cursor level 2 (expected e=0 b=0 l=0, got e=1 b=4 l=1)
<3> [72.612905] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
cursor level 3 (expected e=0 b=0 l=0, got e=1 b=6 l=2)
<3> [72.613026] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
cursor level 4 (expected e=0 b=0 l=0, got e=1 b=6 l=2)
<3> [72.613147] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
cursor level 5 (expected e=0 b=0 l=0, got e=1 b=6 l=2)
<3> [72.613267] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
cursor level 6 (expected e=0 b=0 l=0, got e=1 b=6 l=2)
<3> [72.613388] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A 
cursor level 7 (expected e=0 b=0 l=0, got e=1 b=6 l=2)

I suspect this would be caused by the cursor becoming fully clipped 
but still logically enabled (fb != NULL) during the  previous test
(kms_chv_cursor_fail). And then when it comes time to turn off the
pipe we won't reprogram the cursor because its visibility didn't
change and thus we won't clear its watermarks either. I think I'm
going to write a targeted test for that just to make sure my
analysis is correct.

-- 
Ville Syrjälä
Intel
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[Intel-gfx] [PATCH] drm/i915/selftests: Workaround an issue with unused lockdep subclass

2018-11-15 Thread Chris Wilson
lockdep insists that if we give a lock a subclass, it must be used.
Failure to do so triggers a self-consistency check when reading
lockdep_stats:

[   49.902002] DEBUG_LOCKS_WARN_ON(debug_atomic_read(nr_unused_locks) != 
nr_unused)
[   49.902009] WARNING: CPU: 3 PID: 383 at kernel/locking/lockdep_proc.c:249 
lockdep_stats_show+0x984/0xa10
[   49.902026] Modules linked in: nls_ascii nls_cp437 vfat fat crct10dif_pclmul 
crc32_pclmul crc32c_intel aesni_intel aes_x86_64 crypto_simd cryptd glue_helper 
intel_cstate intel_uncore intel_rapl_perf intel_gtt efivars prime_numbers ahci 
libahci i2c_i801 video button efivarfs [last unloaded: drm_kms_helper]
[   49.902059] CPU: 3 PID: 383 Comm: cat Tainted: G U
4.20.0-rc2+ #304
[   49.902068] Hardware name: Intel Corporation NUC7i5BNK/NUC7i5BNB, BIOS 
BNKBL357.86A.0052.2017.0918.1346 09/18/2017
[   49.902079] RIP: 0010:lockdep_stats_show+0x984/0xa10
[   49.902086] Code: 00 85 c0 0f 84 aa f8 ff ff 8b 05 77 37 e2 00 85 c0 0f 85 
9c f8 ff ff 48 c7 c6 e0 57 bc 81 48 c7 c7 28 30 bb 81 e8 6b 77 fa ff <0f> 0b e9 
82 f8 ff ff 48 c7 44 24 50 00 00 00 00 45 31 e4 31 db 31
[   49.902103] RSP: 0018:c9247d58 EFLAGS: 00010292
[   49.902110] RAX: 0044 RBX: 02f0 RCX: 
[   49.902118] RDX: 0002 RSI: 0001 RDI: 810b3464
[   49.902126] RBP: 0039 R08: 0002 R09: 
[   49.902133] R10:  R11:  R12: 7ead
[   49.902141] R13: 0001 R14: 4c021000 R15: 0097
[   49.902150] FS:  7fb347e66540() GS:5e60() 
knlGS:
[   49.902159] CS:  0010 DS:  ES:  CR0: 80050033
[   49.902165] CR2: 7fb347aeb000 CR3: 0008544bd005 CR4: 001606e0

Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
Cc: Michał Winiarski 
Cc: Matthew Auld 
---
 drivers/gpu/drm/i915/i915_timeline.h | 17 +
 drivers/gpu/drm/i915/intel_engine_cs.c   |  2 +-
 drivers/gpu/drm/i915/selftests/mock_engine.c |  2 +-
 3 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_timeline.h 
b/drivers/gpu/drm/i915/i915_timeline.h
index a2c2c3ab5fb0..73081e810959 100644
--- a/drivers/gpu/drm/i915/i915_timeline.h
+++ b/drivers/gpu/drm/i915/i915_timeline.h
@@ -83,6 +83,23 @@ void i915_timeline_init(struct drm_i915_private *i915,
const char *name);
 void i915_timeline_fini(struct i915_timeline *tl);
 
+static inline void
+i915_timeline_set_subclass(struct i915_timeline *timeline,
+  unsigned int subclass)
+{
+   lockdep_set_subclass(>lock, subclass);
+
+   /*
+* Due to an interesting quirk in lockdep's internal debug tracking,
+* after setting a subclass we must ensure the lock is used. Otherwise,
+* nr_unused_locks is incremented once too often.
+*/
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+   lock_map_acquire(>lock.dep_map);
+   lock_map_release(>lock.dep_map);
+#endif
+}
+
 struct i915_timeline *
 i915_timeline_create(struct drm_i915_private *i915, const char *name);
 
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
b/drivers/gpu/drm/i915/intel_engine_cs.c
index bc147d9e6c92..885a901b6e13 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -485,7 +485,7 @@ static void intel_engine_init_execlist(struct 
intel_engine_cs *engine)
 void intel_engine_setup_common(struct intel_engine_cs *engine)
 {
i915_timeline_init(engine->i915, >timeline, engine->name);
-   lockdep_set_subclass(>timeline.lock, TIMELINE_ENGINE);
+   i915_timeline_set_subclass(>timeline, TIMELINE_ENGINE);
 
intel_engine_init_execlist(engine);
intel_engine_init_hangcheck(engine);
diff --git a/drivers/gpu/drm/i915/selftests/mock_engine.c 
b/drivers/gpu/drm/i915/selftests/mock_engine.c
index 22a73da45ad5..d0c44c18db42 100644
--- a/drivers/gpu/drm/i915/selftests/mock_engine.c
+++ b/drivers/gpu/drm/i915/selftests/mock_engine.c
@@ -200,7 +200,7 @@ struct intel_engine_cs *mock_engine(struct drm_i915_private 
*i915,
engine->base.submit_request = mock_submit_request;
 
i915_timeline_init(i915, >base.timeline, engine->base.name);
-   lockdep_set_subclass(>base.timeline.lock, TIMELINE_ENGINE);
+   i915_timeline_set_subclass(>base.timeline, TIMELINE_ENGINE);
 
intel_engine_init_breadcrumbs(>base);
engine->base.breadcrumbs.mock = true; /* prevent touching HW for irqs */
-- 
2.19.1

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disable LP3 watermarks on all SNB machines (rev2)

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/i915: Disable LP3 watermarks on all SNB machines (rev2)
URL   : https://patchwork.freedesktop.org/series/52440/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5147 -> Patchwork_10832 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/52440/revisions/2/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10832 that come from known issues:

  === IGT changes ===

 Issues hit 

igt@gem_ctx_create@basic-files:
  fi-icl-u2:  PASS -> DMESG-WARN (fdo#107724)

igt@kms_chamelium@common-hpd-after-suspend:
  fi-skl-6700k2:  PASS -> FAIL (fdo#103841)

igt@kms_frontbuffer_tracking@basic:
  fi-byt-clapper: PASS -> FAIL (fdo#103167)

igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
  fi-blb-e6850:   PASS -> INCOMPLETE (fdo#107718)


 Possible fixes 

igt@gem_ctx_create@basic-files:
  fi-bsw-kefka:   FAIL (fdo#108656) -> PASS

igt@gem_exec_suspend@basic-s3:
  fi-icl-u2:  DMESG-WARN (fdo#107724) -> PASS

igt@kms_frontbuffer_tracking@basic:
  fi-hsw-peppy:   DMESG-WARN (fdo#102614) -> PASS

igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
  fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS +2

igt@pm_rpm@module-reload:
  fi-skl-6770hq:  DMESG-WARN (fdo#105541) -> PASS


  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
  fdo#105541 https://bugs.freedesktop.org/show_bug.cgi?id=105541
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
  fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656


== Participating hosts (51 -> 45) ==

  Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
fi-snb-2520m fi-ctg-p8600 


== Build changes ==

* Linux: CI_DRM_5147 -> Patchwork_10832

  CI_DRM_5147: 7d2b7a6073309f870689b91fa4c4a30120ccbe00 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4715: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10832: 865f8e7e66124a700d6d239f16753b5f52777a71 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

865f8e7e6612 drm/i915: Disable LP3 watermarks on all SNB machines

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10832/issues.html
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Re: [Intel-gfx] [PATCH i-g-t 1/4] kms_content_protection: Fix log bug on 32-bit platforms.

2018-11-15 Thread Eric Anholt
Ville Syrjälä  writes:

> On Wed, Nov 14, 2018 at 02:28:29PM -0800, Eric Anholt wrote:
>> long is different between 32 and 64 and should basically never be
>> used.  Fixes compiler warning about passing the wrong type.
>> 
>> Signed-off-by: Eric Anholt 
>> ---
>>  tests/kms_content_protection.c | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>> 
>> diff --git a/tests/kms_content_protection.c b/tests/kms_content_protection.c
>> index 801eff66c272..bb9ecd3f4cde 100644
>> --- a/tests/kms_content_protection.c
>> +++ b/tests/kms_content_protection.c
>> @@ -89,7 +89,8 @@ wait_for_prop_value(igt_output_t *output, uint64_t 
>> expected,
>>  return true;
>>  usleep(1000);
>>  }
>> -igt_info("prop_value mismatch %ld != %ld\n", val, expected);
>> +igt_info("prop_value mismatch %lld != %lld\n",
>> + (long long)val, (long long)expected);
>
> We use the ugly PRId64 & co. elsewhere for this.

My experience with those ugly macros is that people have a flinch when
trying to remember how they work and just ignore the issue instead,
leaving it for those that have to compile for 32.  I'll switch it,
though.

Hopefully i-g-t will get cross-compiling CI and merge requests at some
point so that these bugs can just never land in the first place.


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Re: [Intel-gfx] [PATCH i-g-t 1/4] kms_content_protection: Fix log bug on 32-bit platforms.

2018-11-15 Thread Ville Syrjälä
On Thu, Nov 15, 2018 at 10:51:51AM -0800, Eric Anholt wrote:
> Ville Syrjälä  writes:
> 
> > On Wed, Nov 14, 2018 at 02:28:29PM -0800, Eric Anholt wrote:
> >> long is different between 32 and 64 and should basically never be
> >> used.  Fixes compiler warning about passing the wrong type.
> >> 
> >> Signed-off-by: Eric Anholt 
> >> ---
> >>  tests/kms_content_protection.c | 3 ++-
> >>  1 file changed, 2 insertions(+), 1 deletion(-)
> >> 
> >> diff --git a/tests/kms_content_protection.c 
> >> b/tests/kms_content_protection.c
> >> index 801eff66c272..bb9ecd3f4cde 100644
> >> --- a/tests/kms_content_protection.c
> >> +++ b/tests/kms_content_protection.c
> >> @@ -89,7 +89,8 @@ wait_for_prop_value(igt_output_t *output, uint64_t 
> >> expected,
> >>return true;
> >>usleep(1000);
> >>}
> >> -  igt_info("prop_value mismatch %ld != %ld\n", val, expected);
> >> +  igt_info("prop_value mismatch %lld != %lld\n",
> >> +   (long long)val, (long long)expected);
> >
> > We use the ugly PRId64 & co. elsewhere for this.
> 
> My experience with those ugly macros is that people have a flinch when
> trying to remember how they work and just ignore the issue instead,
> leaving it for those that have to compile for 32.  I'll switch it,
> though.
> 
> Hopefully i-g-t will get cross-compiling CI and merge requests at some
> point so that these bugs can just never land in the first place.

I thought we already did 32bit builds. Hmm. I guess we enabled that
only for the kernel builds.

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH] drm/i915/selftests: Workaround an issue with unused lockdep subclass

2018-11-15 Thread Matthew Auld
On Thu, 15 Nov 2018 at 17:45, Chris Wilson  wrote:
>
> lockdep insists that if we give a lock a subclass, it must be used.
> Failure to do so triggers a self-consistency check when reading
> lockdep_stats:
>
> [   49.902002] DEBUG_LOCKS_WARN_ON(debug_atomic_read(nr_unused_locks) != 
> nr_unused)
> [   49.902009] WARNING: CPU: 3 PID: 383 at kernel/locking/lockdep_proc.c:249 
> lockdep_stats_show+0x984/0xa10
> [   49.902026] Modules linked in: nls_ascii nls_cp437 vfat fat 
> crct10dif_pclmul crc32_pclmul crc32c_intel aesni_intel aes_x86_64 crypto_simd 
> cryptd glue_helper intel_cstate intel_uncore intel_rapl_perf intel_gtt 
> efivars prime_numbers ahci libahci i2c_i801 video button efivarfs [last 
> unloaded: drm_kms_helper]
> [   49.902059] CPU: 3 PID: 383 Comm: cat Tainted: G U
> 4.20.0-rc2+ #304
> [   49.902068] Hardware name: Intel Corporation NUC7i5BNK/NUC7i5BNB, BIOS 
> BNKBL357.86A.0052.2017.0918.1346 09/18/2017
> [   49.902079] RIP: 0010:lockdep_stats_show+0x984/0xa10
> [   49.902086] Code: 00 85 c0 0f 84 aa f8 ff ff 8b 05 77 37 e2 00 85 c0 0f 85 
> 9c f8 ff ff 48 c7 c6 e0 57 bc 81 48 c7 c7 28 30 bb 81 e8 6b 77 fa ff <0f> 0b 
> e9 82 f8 ff ff 48 c7 44 24 50 00 00 00 00 45 31 e4 31 db 31
> [   49.902103] RSP: 0018:c9247d58 EFLAGS: 00010292
> [   49.902110] RAX: 0044 RBX: 02f0 RCX: 
> 
> [   49.902118] RDX: 0002 RSI: 0001 RDI: 
> 810b3464
> [   49.902126] RBP: 0039 R08: 0002 R09: 
> 
> [   49.902133] R10:  R11:  R12: 
> 7ead
> [   49.902141] R13: 0001 R14: 4c021000 R15: 
> 0097
> [   49.902150] FS:  7fb347e66540() GS:5e60() 
> knlGS:
> [   49.902159] CS:  0010 DS:  ES:  CR0: 80050033
> [   49.902165] CR2: 7fb347aeb000 CR3: 0008544bd005 CR4: 
> 001606e0
>
> Signed-off-by: Chris Wilson 
> Cc: Tvrtko Ursulin 
> Cc: Michał Winiarski 
> Cc: Matthew Auld 
Reviewed-by: Matthew Auld 
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
URL   : https://patchwork.freedesktop.org/series/52559/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5147 -> Patchwork_10831 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/52559/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10831 that come from known issues:

  === IGT changes ===

 Issues hit 

igt@drv_selftest@live_coherency:
  fi-gdg-551: PASS -> DMESG-FAIL (fdo#107164)

igt@gem_ctx_create@basic-files:
  fi-icl-u2:  PASS -> DMESG-WARN (fdo#107724)

igt@gem_exec_suspend@basic-s3:
  fi-blb-e6850:   PASS -> INCOMPLETE (fdo#107718)

igt@gem_exec_suspend@basic-s4-devices:
  fi-bsw-n3050:   PASS -> INCOMPLETE (fdo#105876)

igt@kms_chamelium@common-hpd-after-suspend:
  fi-skl-6700k2:  PASS -> WARN (fdo#108680)


 Possible fixes 

igt@gem_ctx_create@basic-files:
  fi-bsw-kefka:   FAIL (fdo#108656) -> PASS

igt@gem_exec_suspend@basic-s3:
  fi-icl-u2:  DMESG-WARN (fdo#107724) -> PASS

igt@kms_frontbuffer_tracking@basic:
  fi-hsw-peppy:   DMESG-WARN (fdo#102614) -> PASS

igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
  fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS +2

igt@pm_rpm@module-reload:
  fi-skl-6770hq:  DMESG-WARN (fdo#105541) -> PASS


  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#105541 https://bugs.freedesktop.org/show_bug.cgi?id=105541
  fdo#105876 https://bugs.freedesktop.org/show_bug.cgi?id=105876
  fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
  fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656
  fdo#108680 https://bugs.freedesktop.org/show_bug.cgi?id=108680


== Participating hosts (51 -> 45) ==

  Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
fi-snb-2520m fi-ctg-p8600 


== Build changes ==

* Linux: CI_DRM_5147 -> Patchwork_10831

  CI_DRM_5147: 7d2b7a6073309f870689b91fa4c4a30120ccbe00 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4715: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10831: e9cbd5053fbdb5ba186961a644ddc9843a04e245 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

e9cbd5053fbd drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10831/issues.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Workaround an issue with unused lockdep subclass (rev2)

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/i915/selftests: Workaround an issue with unused lockdep subclass 
(rev2)
URL   : https://patchwork.freedesktop.org/series/52551/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5147 -> Patchwork_10833 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/52551/revisions/2/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10833 that come from known issues:

  === IGT changes ===

 Issues hit 

igt@drv_selftest@live_hangcheck:
  fi-bwr-2160:PASS -> DMESG-FAIL (fdo#108735)

igt@kms_flip@basic-plain-flip:
  fi-ilk-650: PASS -> DMESG-WARN (fdo#106387)

igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
  fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362)


 Possible fixes 

igt@gem_exec_suspend@basic-s3:
  fi-icl-u2:  DMESG-WARN (fdo#107724) -> PASS

igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
  fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS +2

igt@pm_rpm@module-reload:
  fi-skl-6770hq:  DMESG-WARN (fdo#105541) -> PASS


  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#105541 https://bugs.freedesktop.org/show_bug.cgi?id=105541
  fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
  fdo#108735 https://bugs.freedesktop.org/show_bug.cgi?id=108735


== Participating hosts (51 -> 43) ==

  Missing(8): fi-ilk-m540 fi-icl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
fi-snb-2520m fi-ctg-p8600 fi-kbl-7560u 


== Build changes ==

* Linux: CI_DRM_5147 -> Patchwork_10833

  CI_DRM_5147: 7d2b7a6073309f870689b91fa4c4a30120ccbe00 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4715: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10833: 4a050d13fb0fd034e8f8c07aa82c7da14a81ecbc @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

4a050d13fb0f drm/i915/selftests: Workaround an issue with unused lockdep 
subclass

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10833/issues.html
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[Intel-gfx] [PATCH] drm/i915/selftests: Workaround an issue with unused lockdep subclass

2018-11-15 Thread Chris Wilson
lockdep insists that if we give a lock a subclass, it must be used.
Failure to do so triggers a self-consistency check when reading
lockdep_stats:

[   49.902002] DEBUG_LOCKS_WARN_ON(debug_atomic_read(nr_unused_locks) != 
nr_unused)
[   49.902009] WARNING: CPU: 3 PID: 383 at kernel/locking/lockdep_proc.c:249 
lockdep_stats_show+0x984/0xa10
[   49.902026] Modules linked in: nls_ascii nls_cp437 vfat fat crct10dif_pclmul 
crc32_pclmul crc32c_intel aesni_intel aes_x86_64 crypto_simd cryptd glue_helper 
intel_cstate intel_uncore intel_rapl_perf intel_gtt efivars prime_numbers ahci 
libahci i2c_i801 video button efivarfs [last unloaded: drm_kms_helper]
[   49.902059] CPU: 3 PID: 383 Comm: cat Tainted: G U
4.20.0-rc2+ #304
[   49.902068] Hardware name: Intel Corporation NUC7i5BNK/NUC7i5BNB, BIOS 
BNKBL357.86A.0052.2017.0918.1346 09/18/2017
[   49.902079] RIP: 0010:lockdep_stats_show+0x984/0xa10
[   49.902086] Code: 00 85 c0 0f 84 aa f8 ff ff 8b 05 77 37 e2 00 85 c0 0f 85 
9c f8 ff ff 48 c7 c6 e0 57 bc 81 48 c7 c7 28 30 bb 81 e8 6b 77 fa ff <0f> 0b e9 
82 f8 ff ff 48 c7 44 24 50 00 00 00 00 45 31 e4 31 db 31
[   49.902103] RSP: 0018:c9247d58 EFLAGS: 00010292
[   49.902110] RAX: 0044 RBX: 02f0 RCX: 
[   49.902118] RDX: 0002 RSI: 0001 RDI: 810b3464
[   49.902126] RBP: 0039 R08: 0002 R09: 
[   49.902133] R10:  R11:  R12: 7ead
[   49.902141] R13: 0001 R14: 4c021000 R15: 0097
[   49.902150] FS:  7fb347e66540() GS:5e60() 
knlGS:
[   49.902159] CS:  0010 DS:  ES:  CR0: 80050033
[   49.902165] CR2: 7fb347aeb000 CR3: 0008544bd005 CR4: 001606e0

Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
Cc: Michał Winiarski 
Cc: Matthew Auld 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/i915/i915_timeline.h | 19 +++
 drivers/gpu/drm/i915/intel_engine_cs.c   |  2 +-
 drivers/gpu/drm/i915/selftests/mock_engine.c |  2 +-
 3 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_timeline.h 
b/drivers/gpu/drm/i915/i915_timeline.h
index a2c2c3ab5fb0..ebd71b487220 100644
--- a/drivers/gpu/drm/i915/i915_timeline.h
+++ b/drivers/gpu/drm/i915/i915_timeline.h
@@ -83,6 +83,25 @@ void i915_timeline_init(struct drm_i915_private *i915,
const char *name);
 void i915_timeline_fini(struct i915_timeline *tl);
 
+static inline void
+i915_timeline_set_subclass(struct i915_timeline *timeline,
+  unsigned int subclass)
+{
+   lockdep_set_subclass(>lock, subclass);
+
+   /*
+* Due to an interesting quirk in lockdep's internal debug tracking,
+* after setting a subclass we must ensure the lock is used. Otherwise,
+* nr_unused_locks is incremented once too often.
+*/
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+   local_irq_disable();
+   lock_map_acquire(>lock.dep_map);
+   lock_map_release(>lock.dep_map);
+   local_irq_enable();
+#endif
+}
+
 struct i915_timeline *
 i915_timeline_create(struct drm_i915_private *i915, const char *name);
 
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
b/drivers/gpu/drm/i915/intel_engine_cs.c
index bc147d9e6c92..885a901b6e13 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -485,7 +485,7 @@ static void intel_engine_init_execlist(struct 
intel_engine_cs *engine)
 void intel_engine_setup_common(struct intel_engine_cs *engine)
 {
i915_timeline_init(engine->i915, >timeline, engine->name);
-   lockdep_set_subclass(>timeline.lock, TIMELINE_ENGINE);
+   i915_timeline_set_subclass(>timeline, TIMELINE_ENGINE);
 
intel_engine_init_execlist(engine);
intel_engine_init_hangcheck(engine);
diff --git a/drivers/gpu/drm/i915/selftests/mock_engine.c 
b/drivers/gpu/drm/i915/selftests/mock_engine.c
index 22a73da45ad5..d0c44c18db42 100644
--- a/drivers/gpu/drm/i915/selftests/mock_engine.c
+++ b/drivers/gpu/drm/i915/selftests/mock_engine.c
@@ -200,7 +200,7 @@ struct intel_engine_cs *mock_engine(struct drm_i915_private 
*i915,
engine->base.submit_request = mock_submit_request;
 
i915_timeline_init(i915, >base.timeline, engine->base.name);
-   lockdep_set_subclass(>base.timeline.lock, TIMELINE_ENGINE);
+   i915_timeline_set_subclass(>base.timeline, TIMELINE_ENGINE);
 
intel_engine_init_breadcrumbs(>base);
engine->base.breadcrumbs.mock = true; /* prevent touching HW for irqs */
-- 
2.19.1

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[Intel-gfx] [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy

2018-11-15 Thread clinton . a . taylor
From: Clint Taylor 

The calibration RCOMP value in PORT_TX_DW6 in stored in dev_priv during
driver init. Use this value instead of reading the register again as the
power well for PORTA RCOMP register may not be enabled and will return
0x instead of the computed value.

Cc: Ville Syrjälä 
Signed-off-by: Clint Taylor 
---
 drivers/gpu/drm/i915/intel_dpio_phy.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c 
b/drivers/gpu/drm/i915/intel_dpio_phy.c
index 3c7f10d..7cee57f 100644
--- a/drivers/gpu/drm/i915/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
@@ -422,8 +422,12 @@ static void _bxt_ddi_phy_init(struct drm_i915_private 
*dev_priv,
 * the corresponding calibrated value from PHY1, and disable
 * the automatic calibration on PHY0.
 */
-   val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
- phy_info->rcomp_phy);
+   if (!dev_priv->bxt_phy_grc)
+   val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
+ 
phy_info->rcomp_phy);
+   else
+   val = dev_priv->bxt_phy_grc;
+
grc_code = val << GRC_CODE_FAST_SHIFT |
   val << GRC_CODE_SLOW_SHIFT |
   val;
-- 
1.9.1

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Re: [Intel-gfx] [PATCH 7/7] drm/i915/psr: Disable DRRS if enabled when enabling PSR from debugfs

2018-11-15 Thread Souza, Jose
On Mon, 2018-11-12 at 11:17 +0100, Maarten Lankhorst wrote:
> Op 09-11-18 om 21:20 schreef José Roberto de Souza:
> > If panel supports DRRS and PSR and if driver is loaded without PSR
> > enabled, driver will enable DRRS as expected but if PSR is enabled
> > by
> > debugfs latter it will keep PSR and DRRS enabled causing possible
> > problems as DRRS will lower the refresh rate while PSR enabled.
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108341
> > Cc: Maarten Lankhorst 
> > Cc: Dhinakaran Pandiyan 
> > Signed-off-by: José Roberto de Souza 
> > ---
> >  drivers/gpu/drm/i915/intel_psr.c | 5 -
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 853e3f1370a0..bfc6a08b5cf4 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -904,8 +904,11 @@ int intel_psr_set_debugfs_mode(struct
> > drm_i915_private *dev_priv,
> >  
> > intel_psr_irq_control(dev_priv, dev_priv->psr.debug);
> >  
> > -   if (dev_priv->psr.prepared && enable)
> > +   if (dev_priv->psr.prepared && enable) {
> > +   if (crtc_state)
> > +   intel_edp_drrs_disable(dp, crtc_state);
> > intel_psr_enable_locked(dev_priv, crtc_state);
> > +   }
> >  
> > mutex_unlock(_priv->psr.lock);
> > return ret;
> 
> I've considered this, but I thought it was a feature, not a bug. It's
> a pain to track
> how we handle this as intended.
> 
> kms_frontbuffer_tracking is also controlling DRRS during the test, so
> perhaps simply
> fix the test?
> 
> It seems the no_drrs test simply checks that if PSR is enabled, we
> don't have drrs
> enabled. We probably care about the default configuration, so I would
> simply disable
> the pipe, update the PSR flag, and then start running the tests. Else
> the only thing
> we test is that debugfs disables DRRS. Not that the default modeset
> path prevents
> PSR and DRRS simultaneously.


Yeah, I think we should force a modeset from debugs to test the default
modeset path, fix the tests I think is a bad idea as it could leave
some test cases unhandled.

Also looking at DRRS it looks complete broken for page flips, it would
kept set to DRRS_LOW forever.


> 
> ~Maarten
> 
> Maybe something like below?
> 
> Perhaps move the drrs manipulation functions from
> kms_frontbuffer_tracking to lib/kms_psr.c
> 
> 8<---
> diff --git a/tests/kms_psr.c b/tests/kms_psr.c
> index 9767f475bf23..ffc356df06ce 100644
> --- a/tests/kms_psr.c
> +++ b/tests/kms_psr.c
> @@ -414,9 +414,6 @@ int main(int argc, char *argv[])
>   kmstest_set_vt_graphics_mode();
>   data.devid = intel_get_drm_devid(data.drm_fd);
>  
> - if (!data.with_psr_disabled)
> - psr_enable(data.debugfs_fd);
> -
>   igt_require_f(sink_support(),
> "Sink does not support PSR\n");
>  
> @@ -428,18 +425,25 @@ int main(int argc, char *argv[])
>   }
>  
>   igt_subtest("basic") {
> - setup_test_plane(, DRM_PLANE_TYPE_PRIMARY);
> - igt_assert(psr_wait_entry_if_enabled());
> - test_cleanup();
> - }
> + /* Disable display to get a default setup. */
> + igt_display_commit2(,
> data.display.is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY);
> +
> + if (!data.with_psr_disabled)
> + psr_enable(data.debugfs_fd);
>  
> - igt_subtest("no_drrs") {
>   setup_test_plane(, DRM_PLANE_TYPE_PRIMARY);
>   igt_assert(psr_wait_entry_if_enabled());
>   igt_assert(drrs_disabled());
>   test_cleanup();
>   }
>  
> + igt_fixture {
> + drrs_disable();
> +
> + if (!data.with_psr_disabled)
> + psr_enable(data.debugfs_fd);
> + }
> +
>   for (op = PAGE_FLIP; op <= RENDER; op++) {
>   igt_subtest_f("primary_%s", op_str(op)) {
>   data.op = op;
> 


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Re: [Intel-gfx] [PATCH] drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy

2018-11-15 Thread Atwood, Matthew S
On Thu, 2018-11-15 at 11:48 -0800, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor 
> 
> The calibration RCOMP value in PORT_TX_DW6 in stored in dev_priv
> during
> driver init. Use this value instead of reading the register again as
> the
> power well for PORTA RCOMP register may not be enabled and will
> return
> 0x instead of the computed value.
> 
Tested-by: Matt Atwood 
> Cc: Ville Syrjälä 
> Signed-off-by: Clint Taylor 
> ---
>  drivers/gpu/drm/i915/intel_dpio_phy.c | 8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c
> b/drivers/gpu/drm/i915/intel_dpio_phy.c
> index 3c7f10d..7cee57f 100644
> --- a/drivers/gpu/drm/i915/intel_dpio_phy.c
> +++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
> @@ -422,8 +422,12 @@ static void _bxt_ddi_phy_init(struct
> drm_i915_private *dev_priv,
>* the corresponding calibrated value from PHY1, and
> disable
>* the automatic calibration on PHY0.
>*/
> - val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,
> -   phy_info-
> >rcomp_phy);
> + if (!dev_priv->bxt_phy_grc)
> + val = dev_priv->bxt_phy_grc =
> bxt_get_grc(dev_priv,
> +   phy_i
> nfo->rcomp_phy);
> + else
> + val = dev_priv->bxt_phy_grc;
> +
>   grc_code = val << GRC_CODE_FAST_SHIFT |
>  val << GRC_CODE_SLOW_SHIFT |
>  val;
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[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Disable LP3 watermarks on all SNB machines (rev2)

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/i915: Disable LP3 watermarks on all SNB machines (rev2)
URL   : https://patchwork.freedesktop.org/series/52440/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_5147_full -> Patchwork_10832_full =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_10832_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10832_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in 
Patchwork_10832_full:

  === IGT changes ===

 Possible regressions 

igt@kms_flip_tiling@flip-changes-tiling:
  shard-skl:  PASS -> FAIL


== Known issues ==

  Here are the changes found in Patchwork_10832_full that come from known 
issues:

  === IGT changes ===

 Issues hit 

igt@drv_suspend@shrink:
  shard-skl:  NOTRUN -> INCOMPLETE (fdo#106886)

igt@gem_ppgtt@blt-vs-render-ctx0:
  shard-skl:  PASS -> TIMEOUT (fdo#108039)
  shard-kbl:  PASS -> INCOMPLETE (fdo#106023, fdo#106887, 
fdo#103665)

igt@gem_userptr_blits@readonly-unsync:
  shard-glk:  PASS -> INCOMPLETE (fdo#103359, k.org#198133)

igt@kms_color@pipe-b-legacy-gamma:
  shard-apl:  PASS -> FAIL (fdo#104782)

igt@kms_cursor_crc@cursor-64x21-sliding:
  shard-apl:  PASS -> FAIL (fdo#103232) +2

igt@kms_cursor_crc@cursor-64x64-offscreen:
  shard-skl:  NOTRUN -> FAIL (fdo#103232)

igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
  shard-glk:  PASS -> DMESG-WARN (fdo#106538, fdo#105763)

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
  shard-apl:  PASS -> FAIL (fdo#103167)

igt@kms_plane@pixel-format-pipe-c-planes:
  shard-apl:  PASS -> FAIL (fdo#103166) +1

igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
  shard-skl:  NOTRUN -> FAIL (fdo#108145)

igt@perf@polling:
  shard-hsw:  PASS -> FAIL (fdo#102252)

igt@pm_rpm@cursor-dpms:
  shard-skl:  PASS -> INCOMPLETE (fdo#107807) +1


 Possible fixes 

igt@gem_exec_nop@basic-series:
  shard-apl:  INCOMPLETE (fdo#103927) -> PASS

igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
  shard-skl:  DMESG-WARN (fdo#107956) -> PASS

igt@kms_color@pipe-b-degamma:
  shard-apl:  FAIL (fdo#104782) -> PASS

igt@kms_cursor_crc@cursor-128x128-suspend:
  shard-apl:  FAIL (fdo#103191, fdo#103232) -> PASS

igt@kms_cursor_crc@cursor-256x256-dpms:
  shard-apl:  FAIL (fdo#103232) -> PASS +3

igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
  shard-skl:  FAIL (fdo#103184) -> PASS

igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled:
  shard-skl:  FAIL (fdo#103184, fdo#103232) -> PASS

igt@kms_fbcon_fbt@fbc-suspend:
  shard-skl:  INCOMPLETE (fdo#107773, fdo#104108) -> PASS

igt@kms_flip@flip-vs-expired-vblank:
  shard-skl:  FAIL (fdo#105363) -> PASS
  shard-glk:  FAIL (fdo#102887, fdo#105363) -> PASS

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
  shard-apl:  FAIL (fdo#103167) -> PASS

igt@kms_frontbuffer_tracking@fbc-1p-rte:
  shard-apl:  DMESG-WARN (fdo#103558, fdo#105602) -> PASS

igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
  shard-skl:  FAIL (fdo#105682) -> PASS

igt@kms_plane@pixel-format-pipe-a-planes:
  shard-apl:  FAIL (fdo#103166) -> PASS

igt@kms_plane@plane-position-covered-pipe-c-planes:
  shard-glk:  FAIL (fdo#103166) -> PASS

igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
  shard-skl:  FAIL (fdo#107815, fdo#108145) -> PASS

igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
  shard-skl:  FAIL (fdo#107815) -> PASS

igt@kms_setmode@basic:
  shard-kbl:  FAIL (fdo#99912) -> PASS

igt@kms_vblank@pipe-c-ts-continuation-suspend:
  shard-hsw:  FAIL (fdo#104894) -> PASS

igt@pm_rpm@basic-rte:
  shard-skl:  INCOMPLETE (fdo#107807) -> PASS

igt@pm_rpm@system-suspend-modeset:
  shard-skl:  INCOMPLETE (fdo#107807, fdo#104108) -> PASS


 Warnings 

igt@kms_chv_cursor_fail@pipe-a-128x128-top-edge:
  shard-apl:  DMESG-WARN (fdo#103558, fdo#105602) -> DMESG-FAIL 
(fdo#103558, fdo#104671, fdo#105602)

igt@kms_fbcon_fbt@psr-suspend:
  shard-skl:  FAIL (fdo#107882) -> INCOMPLETE (fdo#107773, 
fdo#104108)


  fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
  fdo#102887 

[Intel-gfx] [PATCH v3 0/3] CRTC background color

2018-11-15 Thread Matt Roper
Third version of the series previously posted here:
  https://lists.freedesktop.org/archives/intel-gfx/2018-November/181777.html

This version incorporates review feedback from Ville and Sean Paul.

The first patch here can be merged whenever it receives review approval.
The second and third patches still need to wait for opensource userspace
to be ready before merging (there's ChromeOS work underway).

Cc: dri-de...@lists.freedesktop.org
Cc: Wei C Li 
Cc: Sean Paul 
Cc: Ville Syrjälä 

Matt Roper (3):
  drm/i915: Force background color to black for gen9+ (v2)
  drm: Add CRTC background color property (v2)
  drm/i915/gen9+: Add support for pipe background color (v3)

 drivers/gpu/drm/drm_atomic_state_helper.c |  1 +
 drivers/gpu/drm/drm_atomic_uapi.c |  5 
 drivers/gpu/drm/drm_blend.c   | 21 +---
 drivers/gpu/drm/drm_mode_config.c |  6 +
 drivers/gpu/drm/i915/i915_debugfs.c   |  9 +++
 drivers/gpu/drm/i915/i915_reg.h   |  6 +
 drivers/gpu/drm/i915/intel_display.c  | 40 +++
 include/drm/drm_blend.h   |  1 +
 include/drm/drm_crtc.h| 17 +
 include/drm/drm_mode_config.h |  5 
 include/uapi/drm/drm_mode.h   | 28 ++
 11 files changed, 136 insertions(+), 3 deletions(-)

-- 
2.14.4

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[Intel-gfx] [PATCH v3 2/3] drm: Add CRTC background color property (v2)

2018-11-15 Thread Matt Roper
Some display controllers can be programmed to present non-black colors
for pixels not covered by any plane (or pixels covered by the
transparent regions of higher planes).  Compositors that want a UI with
a solid color background can potentially save memory bandwidth by
setting the CRTC background property and using smaller planes to display
the rest of the content.

To avoid confusion between different ways of encoding RGB data, we
define a standard 64-bit format that should be used for this property's
value.  Helper functions and macros are provided to generate and dissect
values in this standard format with varying component precision values.

v2:
 - Swap internal representation's blue and red bits to make it easier
   to read if printed out.  (Ville)
 - Document bgcolor property in drm_blend.c.  (Sean Paul)
 - s/background_color/bgcolor/ for consistency between property name and
   value storage field.  (Sean Paul)
 - Add a convenience function to attach property to a given crtc.

v3:
 - Restructure ARGB component extraction macros to be easier to
   understand and enclose the parameters in () to avoid problems if
   expressions are passed.  (Sean Paul)
 - s/rgba/argb/ in helper function/macro names.  Even though the idea is
   to not worry about the internal representation of the u64, it can
   still be confusing to look at code that uses 'rgba' terminology, but
   stores values with argb ordering.  (Ville)

Cc: dri-de...@lists.freedesktop.org
Cc: wei.c...@intel.com
Cc: harish.krupo@intel.com
Cc: Ville Syrjälä 
Cc: Sean Paul 
Signed-off-by: Matt Roper 
Reviewed-by(v2): Sean Paul 
---
 drivers/gpu/drm/drm_atomic_state_helper.c |  1 +
 drivers/gpu/drm/drm_atomic_uapi.c |  5 +
 drivers/gpu/drm/drm_blend.c   | 21 ++---
 drivers/gpu/drm/drm_mode_config.c |  6 ++
 include/drm/drm_blend.h   |  1 +
 include/drm/drm_crtc.h| 17 +
 include/drm/drm_mode_config.h |  5 +
 include/uapi/drm/drm_mode.h   | 28 
 8 files changed, 81 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c 
b/drivers/gpu/drm/drm_atomic_state_helper.c
index 3ba996069d69..2f8c55668089 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -101,6 +101,7 @@ void __drm_atomic_helper_crtc_duplicate_state(struct 
drm_crtc *crtc,
state->planes_changed = false;
state->connectors_changed = false;
state->color_mgmt_changed = false;
+   state->bgcolor_changed = false;
state->zpos_changed = false;
state->commit = NULL;
state->event = NULL;
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index 86ac33922b09..b95a55a778e2 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -467,6 +467,9 @@ static int drm_atomic_crtc_set_property(struct drm_crtc 
*crtc,
return -EFAULT;
 
set_out_fence_for_crtc(state->state, crtc, fence_ptr);
+   } else if (property == config->bgcolor_property) {
+   state->bgcolor = val;
+   state->bgcolor_changed = true;
} else if (crtc->funcs->atomic_set_property) {
return crtc->funcs->atomic_set_property(crtc, state, property, 
val);
} else {
@@ -499,6 +502,8 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc,
*val = (state->gamma_lut) ? state->gamma_lut->base.id : 0;
else if (property == config->prop_out_fence_ptr)
*val = 0;
+   else if (property == config->bgcolor_property)
+   *val = state->bgcolor;
else if (crtc->funcs->atomic_get_property)
return crtc->funcs->atomic_get_property(crtc, state, property, 
val);
else
diff --git a/drivers/gpu/drm/drm_blend.c b/drivers/gpu/drm/drm_blend.c
index 0c78ca386cbe..7da28c0cb74d 100644
--- a/drivers/gpu/drm/drm_blend.c
+++ b/drivers/gpu/drm/drm_blend.c
@@ -175,9 +175,16 @@
  *  plane does not expose the "alpha" property, then this is
  *  assumed to be 1.0
  *
- * Note that all the property extensions described here apply either to the
- * plane or the CRTC (e.g. for the background color, which currently is not
- * exposed and assumed to be black).
+ * The property extensions described above all apply to the plane.  Drivers
+ * may also expose the following crtc property extension:
+ *
+ * bgcolor:
+ * Background color is setup with drm_crtc_add_bgcolor_property().  It
+ * controls the RGB color of a full-screen, fully-opaque layer that exists
+ * below all planes.  This color will be used for pixels not covered by
+ * any plane and may also be blended with plane contents as allowed by a
+ * plane's alpha values.  The background color defaults to black, and is
+ * assumed to be black for drivers 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for CRTC background color (rev3)

2018-11-15 Thread Patchwork
== Series Details ==

Series: CRTC background color (rev3)
URL   : https://patchwork.freedesktop.org/series/50834/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
8424c4b432e2 drm/i915: Force background color to black for gen9+ (v2)
05fa1ef11dab drm: Add CRTC background color property (v2)
-:156: WARNING:BOOL_BITFIELD: Avoid using bool as bitfield.  Prefer bool 
bitfields as unsigned int or u<8|16|32>
#156: FILE: include/drm/drm_crtc.h:175:
+   bool bgcolor_changed : 1;

-:224: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'shift' - possible 
side-effects?
#224: FILE: include/uapi/drm/drm_mode.h:912:
+#define DRM_ARGB_COMP(c, shift, numbits) \
+   (__u16)(((c) & 0xull << (shift)) >> ((shift) + 16 - (numbits)))

total: 0 errors, 1 warnings, 1 checks, 145 lines checked
8772f8932af9 drm/i915/gen9+: Add support for pipe background color (v3)

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[Intel-gfx] [PATCH v6 2/6] drm/dp_mst: Return kref_put() result from drm_dp_put_port()

2018-11-15 Thread Lyude Paul
This will let us warn if we end up freeing a port when we're not
expecting to, which will make reporting erroneous usage of the new MST
VCPI helpers a little easier.

Signed-off-by: Lyude Paul 
Cc: Daniel Vetter 
---
 drivers/gpu/drm/drm_dp_mst_topology.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c 
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 529414556962..00fbe7a2699d 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -45,7 +45,7 @@ static bool dump_dp_payload_table(struct 
drm_dp_mst_topology_mgr *mgr,
  char *buf);
 static int test_calc_pbn_mode(void);
 
-static void drm_dp_put_port(struct drm_dp_mst_port *port);
+static int drm_dp_put_port(struct drm_dp_mst_port *port);
 
 static int drm_dp_dpcd_write_payload(struct drm_dp_mst_topology_mgr *mgr,
 int id,
@@ -969,9 +969,9 @@ static void drm_dp_destroy_port(struct kref *kref)
kfree(port);
 }
 
-static void drm_dp_put_port(struct drm_dp_mst_port *port)
+static int drm_dp_put_port(struct drm_dp_mst_port *port)
 {
-   kref_put(>kref, drm_dp_destroy_port);
+   return kref_put(>kref, drm_dp_destroy_port);
 }
 
 static struct drm_dp_mst_branch 
*drm_dp_mst_get_validated_mstb_ref_locked(struct drm_dp_mst_branch *mstb, 
struct drm_dp_mst_branch *to_find)
-- 
2.19.1

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[Intel-gfx] [PATCH v6 1/6] drm/dp_mst: Add some atomic state iterator macros

2018-11-15 Thread Lyude Paul
Signed-off-by: Lyude Paul 
Reviewed-by: Daniel Vetter 
---
 include/drm/drm_dp_mst_helper.h | 77 +
 1 file changed, 77 insertions(+)

diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 59f005b419cf..3faceb66f5cb 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -628,4 +628,81 @@ int drm_dp_atomic_release_vcpi_slots(struct 
drm_atomic_state *state,
 int drm_dp_send_power_updown_phy(struct drm_dp_mst_topology_mgr *mgr,
 struct drm_dp_mst_port *port, bool power_up);
 
+extern const struct drm_private_state_funcs drm_dp_mst_topology_state_funcs;
+
+static inline bool
+__drm_dp_mst_state_iter_get(struct drm_atomic_state *state,
+   struct drm_dp_mst_topology_mgr **mgr,
+   struct drm_dp_mst_topology_state **old_state,
+   struct drm_dp_mst_topology_state **new_state,
+   int i)
+{
+   struct __drm_private_objs_state *objs_state = >private_objs[i];
+
+   if (objs_state->ptr->funcs != _dp_mst_topology_state_funcs)
+   return false;
+
+   *mgr = to_dp_mst_topology_mgr(objs_state->ptr);
+   if (old_state)
+   *old_state = to_dp_mst_topology_state(objs_state->old_state);
+   if (new_state)
+   *new_state = to_dp_mst_topology_state(objs_state->new_state);
+
+   return true;
+}
+
+/**
+ * for_each_oldnew_mst_mgr_in_state - iterate over all DP MST topology
+ * managers in an atomic update
+ * @__state:  drm_atomic_state pointer
+ * @mgr:  drm_dp_mst_topology_mgr iteration cursor
+ * @old_state:  drm_dp_mst_topology_state iteration cursor for the old
+ * state
+ * @new_state:  drm_dp_mst_topology_state iteration cursor for the new
+ * state
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all DRM DP MST topology managers in an atomic update,
+ * tracking both old and new state. This is useful in places where the state
+ * delta needs to be considered, for example in atomic check functions.
+ */
+#define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state, 
__i) \
+   for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
&(old_state), &(new_state), (__i)))
+
+/**
+ * for_each_old_mst_mgr_in_state - iterate over all DP MST topology managers
+ * in an atomic update
+ * @__state:  drm_atomic_state pointer
+ * @mgr:  drm_dp_mst_topology_mgr iteration cursor
+ * @old_state:  drm_dp_mst_topology_state iteration cursor for the old
+ * state
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all DRM DP MST topology managers in an atomic update,
+ * tracking only the old state. This is useful in disable functions, where we
+ * need the old state the hardware is still in.
+ */
+#define for_each_old_mst_mgr_in_state(__state, mgr, old_state, __i) \
+   for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
&(old_state), NULL, (__i)))
+
+/**
+ * for_each_new_mst_mgr_in_state - iterate over all DP MST topology managers
+ * in an atomic update
+ * @__state:  drm_atomic_state pointer
+ * @mgr:  drm_dp_mst_topology_mgr iteration cursor
+ * @new_state:  drm_dp_mst_topology_state iteration cursor for the new
+ * state
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all DRM DP MST topology managers in an atomic update,
+ * tracking only the new state. This is useful in enable functions, where we
+ * need the new state the hardware should be in when the atomic commit
+ * operation has completed.
+ */
+#define for_each_new_mst_mgr_in_state(__state, mgr, new_state, __i) \
+   for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
NULL, &(new_state), (__i)))
+
 #endif
-- 
2.19.1

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[Intel-gfx] [PATCH v6 3/6] drm/dp_mst: Start tracking per-port VCPI allocations

2018-11-15 Thread Lyude Paul
There has been a TODO waiting for quite a long time in
drm_dp_mst_topology.c:

/* We cannot rely on port->vcpi.num_slots to update
 * topology_state->avail_slots as the port may not exist if the parent
 * branch device was unplugged. This should be fixed by tracking
 * per-port slot allocation in drm_dp_mst_topology_state instead of
 * depending on the caller to tell us how many slots to release.
 */

That's not the only reason we should fix this: forcing the driver to
track the VCPI allocations throughout a state's atomic check is
error prone, because it means that extra care has to be taken with the
order that drm_dp_atomic_find_vcpi_slots() and
drm_dp_atomic_release_vcpi_slots() are called in in order to ensure
idempotency. Currently the only driver actually using these helpers,
i915, doesn't even do this correctly: multiple ->best_encoder() checks
with i915's current implementation would not be idempotent and would
over-allocate VCPI slots, something I learned trying to implement
fallback retraining in MST.

So: simplify this whole mess, and teach drm_dp_atomic_find_vcpi_slots()
and drm_dp_atomic_release_vcpi_slots() to track the VCPI allocations for
each port. This allows us to ensure idempotency without having to rely
on the driver as much. Additionally: the driver doesn't need to do any
kind of VCPI slot tracking anymore if it doesn't need it for it's own
internal state.

Additionally; this adds a new drm_dp_mst_atomic_check() helper which
must be used by atomic drivers to perform validity checks for the new
VCPI allocations incurred by a state.

Also: update the documentation and make it more obvious that these
/must/ be called by /all/ atomic drivers supporting MST.

Changes since v6:
 - Keep a kref to all of the ports we have allocations on. This required
   a good bit of changing to when we call drm_dp_find_vcpi_slots(),
   mainly that we need to ensure that we only redo VCPI allocations on
   actual mode or CRTC changes, not crtc_state->active changes.
   Additionally, we no longer take the registration of the DRM connector
   for each port into account because so long as we have a kref to the
   port in the new or previous atomic state, the connector will stay
   registered.
 - Use the small changes to drm_dp_put_port() to add even more error
   checking to make misusage of the helpers more obvious. I added this
   after having to chase down various use-after-free conditions that
   started popping up from the new helpers so no one else has to
   troubleshoot that.
 - Move some accidental DRM_DEBUG_KMS() calls to DRM_DEBUG_ATOMIC()
 - Update documentation again, note that find/release() should both not be
   called on the same port in a single atomic check phase (but multiple
   calls to one or the other is OK)

Changes since v4:
 - Don't skip the atomic checks for VCPI allocations if no new VCPI
   allocations happen in a state. This makes the next change I'm about
   to list here a lot easier to implement.
 - Don't ignore VCPI allocations on destroyed ports, instead ensure that
   when ports are destroyed and still have VCPI allocations in the
   topology state, the only state changes allowed are releasing said
   ports' VCPI. This prevents a state with a mix of VCPI allocations
   from destroyed ports, and allocations from valid ports.

Changes since v3:
 - Don't release VCPI allocations in the topology state immediately in
   drm_dp_atomic_release_vcpi_slots(), instead mark them as 0 and skip
   over them in drm_dp_mst_duplicate_state(). This makes it so
   drm_dp_atomic_release_vcpi_slots() is still idempotent while also
   throwing warnings if the driver messes up it's book keeping and tries
   to release VCPI slots on a port that doesn't have any pre-existing
   VCPI allocation - danvet
 - Change mst_state/state in some debugging messages to "mst state"

Changes since v2:
 - Use kmemdup() for duplicating MST state - danvet
 - Move port validation out of duplicate state callback - danvet
 - Handle looping through MST topology states in
   drm_dp_mst_atomic_check() so the driver doesn't have to do it
 - Fix documentation in drm_dp_atomic_find_vcpi_slots()
 - Move the atomic check for each individual topology state into it's
   own function, reduces indenting
 - Don't consider "stale" MST ports when calculating the bandwidth
   requirements. This is needed because originally we relied on the
   state duplication functions to prune any stale ports from the new
   state, which would prevent us from incorrectly considering their
   bandwidth requirements alongside legitimate new payloads.
 - Add function references in drm_dp_atomic_release_vcpi_slots() - danvet
 - Annotate atomic VCPI and atomic check functions with __must_check
   - danvet

Changes since v1:
 - Don't use the now-removed ->atomic_check() for private objects hook,
   just give drivers a function to call themselves

Signed-off-by: Lyude Paul 
Cc: Daniel Vetter 
---
 

[Intel-gfx] [PATCH v6 4/6] drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()

2018-11-15 Thread Lyude Paul
It occurred to me that we never actually check this! So let's start
doing that.

Signed-off-by: Lyude Paul 
Reviewed-by: Daniel Vetter 
---
 drivers/gpu/drm/drm_dp_mst_topology.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c 
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 183d0e832ced..38654a449b82 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3275,7 +3275,7 @@ drm_dp_mst_atomic_check_topology_state(struct 
drm_dp_mst_topology_mgr *mgr,
 {
struct drm_dp_vcpi_allocation *vcpi;
struct drm_dp_mst_port *port;
-   int avail_slots = 63, ret;
+   int avail_slots = 63, payload_count = 0, ret;
 
/* There's no possible scenario where releasing VCPI or keeping it the
 * same would make the state invalid
@@ -3313,6 +3313,13 @@ drm_dp_mst_atomic_check_topology_state(struct 
drm_dp_mst_topology_mgr *mgr,
goto port_fail;
}
 
+   if (++payload_count > mgr->max_payloads) {
+   DRM_DEBUG_ATOMIC("[MST MGR:%p] state %p has too many 
payloads (max=%d)\n",
+mgr, mst_state, mgr->max_payloads);
+   ret = -EINVAL;
+   goto port_fail;
+   }
+
drm_dp_put_port(port);
}
DRM_DEBUG_ATOMIC("[MST MGR:%p] mst state %p VCPI avail=%d used=%d\n",
-- 
2.19.1

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[Intel-gfx] [PATCH v6 5/6] drm/nouveau: Stop unsetting mstc->port, check connector registration

2018-11-15 Thread Lyude Paul
Same thing we did in i915, but for nouveau now.

Signed-off-by: Lyude Paul 
Cc: Daniel Vetter 
---
 drivers/gpu/drm/nouveau/dispnv50/disp.c | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c 
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 6cbbae3f438b..f216fd4207c9 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -698,8 +698,10 @@ nv50_msto_cleanup(struct nv50_msto *msto)
struct nv50_mstm *mstm = mstc->mstm;
 
NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name);
-   if (mstc->port && mstc->port->vcpi.vcpi > 0 && !nv50_msto_payload(msto))
+   if (!drm_connector_is_unregistered(>connector) &&
+   mstc->port->vcpi.vcpi > 0 && !nv50_msto_payload(msto))
drm_dp_mst_deallocate_vcpi(>mgr, mstc->port);
+
if (msto->disabled) {
msto->mstc = NULL;
msto->head = NULL;
@@ -725,7 +727,8 @@ nv50_msto_prepare(struct nv50_msto *msto)
};
 
NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name);
-   if (mstc->port && mstc->port->vcpi.vcpi > 0) {
+   if (!drm_connector_is_unregistered(>connector) &&
+   mstc->port->vcpi.vcpi > 0) {
struct drm_dp_payload *payload = nv50_msto_payload(msto);
if (payload) {
args.vcpi.start_slot = payload->start_slot;
@@ -822,7 +825,7 @@ nv50_msto_disable(struct drm_encoder *encoder)
struct nv50_mstc *mstc = msto->mstc;
struct nv50_mstm *mstm = mstc->mstm;
 
-   if (mstc->port)
+   if (!drm_connector_is_unregistered(>connector))
drm_dp_mst_reset_vcpi_slots(>mgr, mstc->port);
 
mstm->outp->update(mstm->outp, msto->head->base.index, NULL, 0, 0);
@@ -935,7 +938,7 @@ nv50_mstc_detect(struct drm_connector *connector, bool 
force)
enum drm_connector_status conn_status;
int ret;
 
-   if (!mstc->port)
+   if (drm_connector_is_unregistered(>connector))
return connector_status_disconnected;
 
ret = pm_runtime_get_sync(connector->dev->dev);
@@ -1073,10 +1076,6 @@ nv50_mstm_destroy_connector(struct 
drm_dp_mst_topology_mgr *mgr,
 
drm_fb_helper_remove_one_connector(>fbcon->helper, 
>connector);
 
-   drm_modeset_lock(>dev->mode_config.connection_mutex, NULL);
-   mstc->port = NULL;
-   drm_modeset_unlock(>dev->mode_config.connection_mutex);
-
drm_connector_put(>connector);
 }
 
-- 
2.19.1

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[Intel-gfx] [PATCH v6 6/6] drm/nouveau: Use atomic VCPI helpers for MST

2018-11-15 Thread Lyude Paul
Currently, nouveau uses the yolo method of setting up MST displays: it
uses the old VCPI helpers (drm_dp_find_vcpi_slots()) for computing the
display configuration. These helpers don't take care to make sure they
take a reference to the mstb port that they're checking, and
additionally don't actually check whether or not the topology still has
enough bandwidth to provide the VCPI tokens required.

So, drop usage of the old helpers and move entirely over to the atomic
helpers.

Changes since v5:
 - Update nv50_msto_atomic_check() and nv50_mstc_atomic_check() to the
   new requirements for drm_dp_atomic_find_vcpi_slots() and
   drm_dp_atomic_release_vcpi_slots()

Signed-off-by: Lyude Paul 
Cc: Daniel Vetter 
---
 drivers/gpu/drm/nouveau/dispnv50/disp.c | 52 ++---
 1 file changed, 46 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c 
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index f216fd4207c9..83cb1afb94ed 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -750,16 +750,22 @@ nv50_msto_atomic_check(struct drm_encoder *encoder,
   struct drm_crtc_state *crtc_state,
   struct drm_connector_state *conn_state)
 {
-   struct nv50_mstc *mstc = nv50_mstc(conn_state->connector);
+   struct drm_atomic_state *state = crtc_state->state;
+   struct drm_connector *connector = conn_state->connector;
+   struct nv50_mstc *mstc = nv50_mstc(connector);
struct nv50_mstm *mstm = mstc->mstm;
-   int bpp = conn_state->connector->display_info.bpc * 3;
+   int bpp = connector->display_info.bpc * 3;
int slots;
 
-   mstc->pbn = drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock, bpp);
+   mstc->pbn = drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock,
+bpp);
 
-   slots = drm_dp_find_vcpi_slots(>mgr, mstc->pbn);
-   if (slots < 0)
-   return slots;
+   if (crtc_state->connectors_changed || crtc_state->mode_changed) {
+   slots = drm_dp_atomic_find_vcpi_slots(state, >mgr,
+ mstc->port, mstc->pbn);
+   if (slots < 0)
+   return slots;
+   }
 
return nv50_outp_atomic_check_view(encoder, crtc_state, conn_state,
   mstc->native);
@@ -923,12 +929,42 @@ nv50_mstc_get_modes(struct drm_connector *connector)
return ret;
 }
 
+static int
+nv50_mstc_atomic_check(struct drm_connector *connector,
+  struct drm_connector_state *new_conn_state)
+{
+   struct drm_atomic_state *state = new_conn_state->state;
+   struct nv50_mstc *mstc = nv50_mstc(connector);
+   struct drm_dp_mst_topology_mgr *mgr = >mstm->mgr;
+   struct drm_connector_state *old_conn_state =
+   drm_atomic_get_old_connector_state(state, connector);
+   struct drm_crtc_state *old_crtc_state;
+   struct drm_crtc *new_crtc = new_conn_state->crtc,
+   *old_crtc = old_conn_state->crtc;
+
+   if (!old_crtc)
+   return 0;
+
+   old_crtc_state = drm_atomic_get_old_crtc_state(state, old_crtc);
+   if (!old_crtc_state || !old_crtc_state->enable)
+   return 0;
+
+   if (new_crtc)
+   return 0;
+
+   /* This connector will be left without an enabled CRTC, so its VCPI
+* must be released here
+*/
+   return drm_dp_atomic_release_vcpi_slots(state, mgr, mstc->port);
+}
+
 static const struct drm_connector_helper_funcs
 nv50_mstc_help = {
.get_modes = nv50_mstc_get_modes,
.mode_valid = nv50_mstc_mode_valid,
.best_encoder = nv50_mstc_best_encoder,
.atomic_best_encoder = nv50_mstc_atomic_best_encoder,
+   .atomic_check = nv50_mstc_atomic_check,
 };
 
 static enum drm_connector_status
@@ -2108,6 +2144,10 @@ nv50_disp_atomic_check(struct drm_device *dev, struct 
drm_atomic_state *state)
return ret;
}
 
+   ret = drm_dp_mst_atomic_check(state);
+   if (ret)
+   return ret;
+
return 0;
 }
 
-- 
2.19.1

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[Intel-gfx] [PATCH v6 0/6] drm/dp_mst: Improve VCPI helpers, use in nouveau

2018-11-15 Thread Lyude Paul
This patchset does some cleaning up of the atomic VCPI helpers for MST,
and converts nouveau over to using them. I would have included amdgpu in
this patch as well, but at the moment moving them over to the atomic
helpers is nontrivial.

[sorry for still not adding your R-Bs! I ended up needing to make a
lot of changes to make it so we do actually kref() each port in the
atomic state]
Cc: Daniel Vetter 

Lyude Paul (6):
  drm/dp_mst: Add some atomic state iterator macros
  drm/dp_mst: Return kref_put() result from drm_dp_put_port()
  drm/dp_mst: Start tracking per-port VCPI allocations
  drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()
  drm/nouveau: Stop unsetting mstc->port, check connector registration
  drm/nouveau: Use atomic VCPI helpers for MST

 drivers/gpu/drm/drm_dp_mst_topology.c   | 307 +---
 drivers/gpu/drm/i915/intel_display.c|   4 +
 drivers/gpu/drm/i915/intel_dp_mst.c |  64 +++--
 drivers/gpu/drm/nouveau/dispnv50/disp.c |  67 --
 include/drm/drm_dp_mst_helper.h | 101 +++-
 5 files changed, 459 insertions(+), 84 deletions(-)

-- 
2.19.1

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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/selftests: Workaround an issue with unused lockdep subclass (rev2)

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/i915/selftests: Workaround an issue with unused lockdep subclass 
(rev2)
URL   : https://patchwork.freedesktop.org/series/52551/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5147_full -> Patchwork_10833_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_10833_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10833_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in 
Patchwork_10833_full:

  === IGT changes ===

 Warnings 

igt@kms_busy@basic-modeset-b:
  shard-snb:  PASS -> SKIP +1

igt@pm_rc6_residency@rc6-accuracy:
  shard-snb:  SKIP -> PASS


== Known issues ==

  Here are the changes found in Patchwork_10833_full that come from known 
issues:

  === IGT changes ===

 Issues hit 

igt@gem_exec_schedule@out-order-blt:
  shard-apl:  PASS -> INCOMPLETE (fdo#103927)

igt@gem_ppgtt@blt-vs-render-ctx0:
  shard-skl:  PASS -> TIMEOUT (fdo#108039)
  shard-kbl:  PASS -> INCOMPLETE (fdo#106887, fdo#103665, 
fdo#106023)

igt@kms_color@pipe-b-legacy-gamma:
  shard-apl:  PASS -> FAIL (fdo#104782)

igt@kms_cursor_crc@cursor-64x21-sliding:
  shard-apl:  PASS -> FAIL (fdo#103232) +1

igt@kms_cursor_crc@cursor-64x64-offscreen:
  shard-skl:  NOTRUN -> FAIL (fdo#103232)

igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
  shard-glk:  PASS -> DMESG-WARN (fdo#105763, fdo#106538)

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
  shard-apl:  PASS -> FAIL (fdo#103167)

igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
  shard-skl:  NOTRUN -> FAIL (fdo#105683)

igt@kms_plane@pixel-format-pipe-b-planes:
  shard-skl:  NOTRUN -> DMESG-WARN (fdo#106885)

igt@kms_plane@pixel-format-pipe-c-planes:
  shard-apl:  PASS -> FAIL (fdo#103166) +2

igt@pm_rpm@gem-execbuf-stress-extra-wait:
  shard-skl:  PASS -> INCOMPLETE (fdo#107803, fdo#107807)

igt@pm_rpm@legacy-planes:
  shard-skl:  PASS -> INCOMPLETE (fdo#107807, fdo#105959)

igt@pm_rpm@modeset-stress-extra-wait:
  shard-skl:  PASS -> INCOMPLETE (fdo#107807) +3

igt@pm_rpm@system-suspend:
  shard-skl:  PASS -> INCOMPLETE (fdo#107807, fdo#104108)


 Possible fixes 

igt@gem_exec_nop@basic-series:
  shard-apl:  INCOMPLETE (fdo#103927) -> PASS

igt@kms_busy@extended-modeset-hang-newfb-render-c:
  shard-kbl:  DMESG-WARN (fdo#107956) -> PASS

igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
  shard-hsw:  DMESG-WARN (fdo#107956) -> PASS

igt@kms_chv_cursor_fail@pipe-a-128x128-top-edge:
  shard-apl:  DMESG-WARN (fdo#103558, fdo#105602) -> PASS +3

igt@kms_color@pipe-b-degamma:
  shard-apl:  FAIL (fdo#104782) -> PASS

igt@kms_cursor_crc@cursor-128x128-suspend:
  shard-apl:  FAIL (fdo#103191, fdo#103232) -> PASS

igt@kms_cursor_crc@cursor-256x256-dpms:
  shard-apl:  FAIL (fdo#103232) -> PASS +3

igt@kms_fbcon_fbt@fbc-suspend:
  shard-skl:  INCOMPLETE (fdo#107773, fdo#104108) -> PASS

igt@kms_flip@flip-vs-expired-vblank:
  shard-glk:  FAIL (fdo#105363, fdo#102887) -> PASS

igt@kms_plane@plane-position-covered-pipe-c-planes:
  shard-apl:  FAIL (fdo#103166) -> PASS +1

igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
  shard-skl:  FAIL (fdo#107815) -> PASS

igt@kms_setmode@basic:
  shard-kbl:  FAIL (fdo#99912) -> PASS

igt@kms_vblank@pipe-c-ts-continuation-suspend:
  shard-hsw:  FAIL (fdo#104894) -> PASS

igt@pm_rpm@basic-rte:
  shard-skl:  INCOMPLETE (fdo#107807) -> PASS

igt@pm_rpm@gem-execbuf-stress:
  shard-skl:  INCOMPLETE (fdo#107803, fdo#107807) -> PASS


  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
  fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782
  fdo#104894 https://bugs.freedesktop.org/show_bug.cgi?id=104894
  fdo#105363 

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v3,1/3] drm/i915/icl: replace check for combo phy

2018-11-15 Thread Souza, Jose
Pushed to drm-intel-next-queued.

On Wed, 2018-11-14 at 06:23 +, Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [v3,1/3] drm/i915/icl: replace check for
> combo phy
> URL   : https://patchwork.freedesktop.org/series/52459/
> State : success
> 
> == Summary ==
> 
> = CI Bug Log - changes from CI_DRM_5134_full -> Patchwork_10820_full
> =
> 
> == Summary - WARNING ==
> 
>   Minor unknown changes coming with Patchwork_10820_full need to be
> verified
>   manually.
>   
>   If you think the reported changes have nothing to do with the
> changes
>   introduced in Patchwork_10820_full, please notify your bug team to
> allow them
>   to document this new failure mode, which will reduce false
> positives in CI.
> 
>   
> 
> == Possible new issues ==
> 
>   Here are the unknown changes that may have been introduced in
> Patchwork_10820_full:
> 
>   === IGT changes ===
> 
>  Warnings 
> 
> igt@perf_pmu@rc6:
>   shard-kbl:  PASS -> SKIP
> 
> 
> == Known issues ==
> 
>   Here are the changes found in Patchwork_10820_full that come from
> known issues:
> 
>   === IGT changes ===
> 
>  Issues hit 
> 
> igt@gem_ppgtt@blt-vs-render-ctx0:
>   shard-skl:  NOTRUN -> TIMEOUT (fdo#108039)
>   shard-kbl:  PASS -> INCOMPLETE (fdo#106887, fdo#103665,
> fdo#106023)
> 
> igt@kms_available_modes_crc@available_mode_test_crc:
>   shard-skl:  NOTRUN -> FAIL (fdo#106641)
> 
> igt@kms_busy@extended-modeset-hang-newfb-render-a:
>   shard-skl:  NOTRUN -> DMESG-WARN (fdo#107956) +2
> 
> igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
>   shard-kbl:  PASS -> DMESG-WARN (fdo#107956)
> 
> igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
>   shard-glk:  PASS -> FAIL (fdo#108145)
> 
> igt@kms_cursor_crc@cursor-256x256-sliding:
>   shard-apl:  PASS -> FAIL (fdo#103232)
> 
> igt@kms_flip@flip-vs-expired-vblank:
>   shard-glk:  PASS -> FAIL (fdo#105363)
> 
> igt@kms
> _frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
>   shard-glk:  PASS -> FAIL (fdo#103167) +1
> 
> igt@kms
> _frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
>   shard-apl:  PASS -> FAIL (fdo#103167) +2
> 
> igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
>   shard-skl:  NOTRUN -> FAIL (fdo#105683)
> 
> igt@kms_plane@pixel-format-pipe-b-planes:
>   shard-skl:  NOTRUN -> DMESG-WARN (fdo#106885)
> 
> igt@kms_plane@plane-panning-bottom-right-pipe-b-planes:
>   shard-skl:  NOTRUN -> FAIL (fdo#103166)
> 
> igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
>   shard-skl:  NOTRUN -> FAIL (fdo#108145) +5
> 
> igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
>   shard-skl:  NOTRUN -> FAIL (fdo#108145, fdo#107815)
> 
> igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
>   shard-apl:  PASS -> FAIL (fdo#103166)
> 
> igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
>   shard-glk:  PASS -> FAIL (fdo#103166)
> 
> igt@kms_properties@connector-properties-legacy:
>   shard-kbl:  PASS -> DMESG-WARN (fdo#105345, fdo#103313)
> 
> igt@kms_setmode@basic:
>   shard-apl:  PASS -> FAIL (fdo#99912)
>   shard-kbl:  PASS -> FAIL (fdo#99912)
> 
> igt@pm_backlight@fade_with_suspend:
>   shard-skl:  NOTRUN -> FAIL (fdo#107847)
> 
> 
>  Possible fixes 
> 
> igt@kms_flip@2x-dpms-vs-vblank-race:
>   shard-hsw:  DMESG-WARN (fdo#102614) -> PASS
> 
> igt@kms
> _frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
>   shard-apl:  FAIL (fdo#103167) -> PASS +1
> 
> igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
>   shard-glk:  FAIL (fdo#108145) -> PASS
> 
> igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
>   shard-skl:  FAIL (fdo#107815) -> PASS
> 
> igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
>   shard-glk:  FAIL (fdo#103166) -> PASS +1
>   shard-apl:  FAIL (fdo#103166) -> PASS +2
> 
> igt@perf@polling:
>   shard-hsw:  FAIL (fdo#102252) -> PASS
> 
> igt@perf_pmu@busy-start-vcs0:
>   shard-kbl:  DMESG-WARN (fdo#103558, fdo#105602) -> PASS
> 
> igt@pm_rpm@debugfs-forcewake-user:
>   shard-skl:  INCOMPLETE (fdo#107807) -> PASS
> 
> igt@pm_rpm@dpms-mode-unset-non-lpsp:
>   shard-skl:  INCOMPLETE (fdo#107807) -> SKIP
> 
> 
>   fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
>   fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
>   fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
>   fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
>   fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
>   fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
> 

[Intel-gfx] [PATCH i-g-t v3] tests/kms_crtc_background_color: overhaul for latest ABI proposal (v3)

2018-11-15 Thread Matt Roper
CRTC background color kernel patches were written about 2.5 years ago
and floated on the upstream mailing list, but since no opensource
userspace materialized, we never actually merged them.  However the
corresponding IGT test did get merged and has basically been dead code
ever since.

A couple years later we may finally be getting closer to landing the
kernel patches (there's some interest in this functionality now from
both the ChromeOS and Weston camps), so lets update the IGT test to
match the latest proposed ABI, and to remove some of the cruft from the
original test that wouldn't actually work.

It's worth noting that we don't seem to be able to test this feature
with CRC's.  Originally we wanted to draw a color into a plane's FB
(with Cairo) and then compare the CRC to turning off all planes and just
setting the CRTC background to the same color.  However the precision
and rounding of the color components causes the CRC's to come out
differently, even though the end result is visually identical.  So at
the moment this test is mainly useful for visual inspection in
interactive mode.

v2:
 - Swap red and blue ordering in property value to reflect change
   in v2 of kernel series.

v3:
 - Minor updates to proposed uapi helpers (s/rgba/argb/).

Cc: igt-...@lists.freedesktop.org
Signed-off-by: Matt Roper 
---
 lib/igt_kms.c |   2 +-
 tests/kms_crtc_background_color.c | 223 +-
 2 files changed, 122 insertions(+), 103 deletions(-)

diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index d806ccc1..33d6a6fb 100644
--- a/lib/igt_kms.c
+++ b/lib/igt_kms.c
@@ -180,7 +180,7 @@ const char * const 
igt_plane_prop_names[IGT_NUM_PLANE_PROPS] = {
 };
 
 const char * const igt_crtc_prop_names[IGT_NUM_CRTC_PROPS] = {
-   [IGT_CRTC_BACKGROUND] = "background_color",
+   [IGT_CRTC_BACKGROUND] = "BACKGROUND_COLOR",
[IGT_CRTC_CTM] = "CTM",
[IGT_CRTC_GAMMA_LUT] = "GAMMA_LUT",
[IGT_CRTC_GAMMA_LUT_SIZE] = "GAMMA_LUT_SIZE",
diff --git a/tests/kms_crtc_background_color.c 
b/tests/kms_crtc_background_color.c
index 3df3401f..a9d99864 100644
--- a/tests/kms_crtc_background_color.c
+++ b/tests/kms_crtc_background_color.c
@@ -25,164 +25,183 @@
 #include "igt.h"
 #include 
 
-
 IGT_TEST_DESCRIPTION("Test crtc background color feature");
 
+/*
+ * The original idea was to paint a desired color into a full-screen primary
+ * plane and then compare that CRC with turning off all planes and setting the
+ * CRTC background to the same color.  Unforunately, the rounding and precision
+ * of color values as rendered by cairo vs created by the display controller
+ * are slightly different and give different CRC's, even though they're
+ * visually identical.
+ *
+ * Since we can't really use CRC's for testing, this test is mainly useful for
+ * visual inspection in interactive mode at the moment.
+ */
+
 typedef struct {
int gfx_fd;
-   igt_display_t display;
-   struct igt_fb fb;
-   igt_crc_t ref_crc;
-   igt_pipe_crc_t *pipe_crc;
+   igt_output_t *output;
+   drmModeModeInfo *mode;
 } data_t;
 
-#define BLACK  0x00   /* BGR 8bpc */
-#define CYAN   0x00   /* BGR 8bpc */
-#define PURPLE 0xFF00FF   /* BGR 8bpc */
-#define WHITE  0xFF   /* BGR 8bpc */
-
-#define BLACK640x /* BGR 16bpc */
-#define CYAN64 0x /* BGR 16bpc */
-#define PURPLE64   0x /* BGR 16bpc */
-#define YELLOW64   0x /* BGR 16bpc */
-#define WHITE640x /* BGR 16bpc */
-#define RED64  0x /* BGR 16bpc */
-#define GREEN640x /* BGR 16bpc */
-#define BLUE64 0x /* BGR 16bpc */
+/*
+ * Local copy of proposed kernel uapi
+ */
+static inline __u64
+local_argb(__u8 bpc, __u16 alpha, __u16 red, __u16 green, __u16 blue)
+{
+   int msb_shift = 16 - bpc;
 
+   return (__u64)alpha << msb_shift << 48 |
+  (__u64)red   << msb_shift << 32 |
+  (__u64)green << msb_shift << 16 |
+  (__u64)blue  << msb_shift;
+}
+#define LOCAL_ARGB_COMP(c, shift, numbits) \
+   (__u16)(((c) & 0xull << (shift)) >> ((shift) + 16 - (numbits)))
+#define LOCAL_ARGB_BLUE(c, numbits)  DRM_ARGB_COMP(c, 0, numbits)
+#define LOCAL_ARGB_GREEN(c, numbits) DRM_ARGB_COMP(c, 16, numbits)
+#define LOCAL_ARGB_RED(c, numbits)   DRM_ARGB_COMP(c, 32, numbits)
+#define LOCAL_ARGB_ALPHA(c, numbits) DRM_ARGB_COMP(c, 48, numbits)
+
+
+/* 8bpc values */
+#define BLACK  local_argb(8, 0xff,0,0,0)
+#define REDlocal_argb(8, 0xff, 0xff,0,0)
+#define GREEN  local_argb(8, 0xff,0, 0xff,0)
+#define BLUE   local_argb(8, 0xff,0,0, 0xff)
+#define YELLOW local_argb(8, 0xff, 0xff, 0xff,0)
+#define WHITE  local_argb(8, 0xff, 0xff, 0xff, 0xff)
+
+/* 16bpc values */
+#define BLACK64local_argb(16, 0x,  0,  

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
URL   : https://patchwork.freedesktop.org/series/52559/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5147_full -> Patchwork_10831_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_10831_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10831_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in 
Patchwork_10831_full:

  === IGT changes ===

 Warnings 

igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite:
  shard-hsw:  PASS -> SKIP

igt@tools_test@tools_test:
  shard-glk:  PASS -> SKIP


== Known issues ==

  Here are the changes found in Patchwork_10831_full that come from known 
issues:

  === IGT changes ===

 Issues hit 

igt@drv_suspend@shrink:
  shard-skl:  NOTRUN -> INCOMPLETE (fdo#106886)

igt@gem_ppgtt@blt-vs-render-ctx0:
  shard-skl:  PASS -> TIMEOUT (fdo#108039)

igt@gem_userptr_blits@readonly-unsync:
  shard-skl:  PASS -> INCOMPLETE (fdo#108074)

igt@kms_atomic_transition@1x-modeset-transitions-fencing:
  shard-skl:  PASS -> FAIL (fdo#107815, fdo#108470)

igt@kms_chv_cursor_fail@pipe-b-64x64-left-edge:
  shard-skl:  PASS -> FAIL (fdo#104671)

igt@kms_color@pipe-a-legacy-gamma:
  shard-kbl:  PASS -> DMESG-WARN (fdo#105602, fdo#103558) +2

igt@kms_color@pipe-b-legacy-gamma:
  shard-apl:  PASS -> FAIL (fdo#104782)

igt@kms_cursor_crc@cursor-256x256-random:
  shard-skl:  PASS -> FAIL (fdo#103232)

igt@kms_cursor_crc@cursor-256x256-suspend:
  shard-skl:  PASS -> INCOMPLETE (fdo#104108)

igt@kms_cursor_crc@cursor-64x21-sliding:
  shard-apl:  PASS -> FAIL (fdo#103232) +3

igt@kms_cursor_crc@cursor-64x64-offscreen:
  shard-skl:  NOTRUN -> FAIL (fdo#103232)

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
  shard-glk:  PASS -> FAIL (fdo#103167)

igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
  shard-skl:  NOTRUN -> FAIL (fdo#105683)

igt@kms_plane@pixel-format-pipe-b-planes:
  shard-skl:  NOTRUN -> DMESG-WARN (fdo#106885)

igt@kms_plane@pixel-format-pipe-c-planes:
  shard-apl:  PASS -> FAIL (fdo#103166)

igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
  shard-skl:  PASS -> FAIL (fdo#107815)

igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
  shard-skl:  NOTRUN -> FAIL (fdo#108145)

igt@kms_setmode@basic:
  shard-apl:  PASS -> FAIL (fdo#99912)

igt@perf_pmu@invalid-init:
  shard-glk:  PASS -> DMESG-WARN (fdo#106538, fdo#105763) +1

igt@pm_rpm@system-suspend-devices:
  shard-skl:  PASS -> INCOMPLETE (fdo#107807)


 Possible fixes 

igt@gem_exec_nop@basic-series:
  shard-apl:  INCOMPLETE (fdo#103927) -> PASS

igt@gem_ppgtt@blt-vs-render-ctxn:
  shard-skl:  TIMEOUT (fdo#108039) -> PASS

igt@kms_chv_cursor_fail@pipe-a-128x128-top-edge:
  shard-apl:  DMESG-WARN (fdo#105602, fdo#103558) -> PASS +3

igt@kms_color@pipe-b-degamma:
  shard-apl:  FAIL (fdo#104782) -> PASS

igt@kms_cursor_crc@cursor-128x128-suspend:
  shard-apl:  FAIL (fdo#103232, fdo#103191) -> PASS

igt@kms_cursor_crc@cursor-256x256-dpms:
  shard-apl:  FAIL (fdo#103232) -> PASS +3

igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
  shard-skl:  FAIL (fdo#103184) -> PASS

igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled:
  shard-skl:  FAIL (fdo#103232, fdo#103184) -> PASS

igt@kms_fbcon_fbt@fbc-suspend:
  shard-skl:  INCOMPLETE (fdo#104108, fdo#107773) -> PASS

igt@kms_flip@flip-vs-expired-vblank:
  shard-skl:  FAIL (fdo#105363) -> PASS
  shard-glk:  FAIL (fdo#102887, fdo#105363) -> PASS

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
  shard-apl:  FAIL (fdo#103167) -> PASS

igt@kms_frontbuffer_tracking@fbc-farfromfence:
  shard-skl:  FAIL (fdo#103167) -> PASS

igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
  shard-skl:  FAIL (fdo#105682) -> PASS

igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
  shard-skl:  FAIL (fdo#108145, fdo#107815) -> PASS

igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
  shard-skl:  FAIL (fdo#107815) -> PASS

igt@kms_setmode@basic:
  shard-hsw:  FAIL (fdo#99912) -> PASS


[Intel-gfx] [PATCH v3 3/3] drm/i915/gen9+: Add support for pipe background color (v3)

2018-11-15 Thread Matt Roper
Gen9+ platforms allow CRTC's to be programmed with a background/canvas
color below the programmable planes.  Let's expose this for use by
compositors.

v2:
 - Split out bgcolor sanitization and programming of csc/gamma bits to a
   separate patch that we can land before the ABI changes are ready to
   go in.  (Ville)
 - Change a temporary variable name to be more consistent with
   other similar functions.  (Ville)
 - Change register name to SKL_CANVAS for consistency with the
   CHV_CANVAS register.

v3:
 - Switch register name back to SKL_BOTTOM_COLOR.  (Ville)
 - Use non-_FW register write.  (Ville)
 - Minor parameter rename for consistency.  (Ville)

Cc: dri-de...@lists.freedesktop.org
Cc: wei.c...@intel.com
Cc: harish.krupo@intel.com
Cc: Ville Syrjälä 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/i915_debugfs.c  |  9 +
 drivers/gpu/drm/i915/intel_display.c | 37 
 2 files changed, 38 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 670db5073d70..05465f06e132 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3254,6 +3254,15 @@ static int i915_display_info(struct seq_file *m, void 
*unused)
intel_plane_info(m, crtc);
}
 
+   if (INTEL_GEN(dev_priv) >= 9 && pipe_config->base.active) {
+   uint64_t background = pipe_config->base.bgcolor;
+
+   seq_printf(m, "\tbackground color (10bpc): r=%x g=%x 
b=%x\n",
+  DRM_ARGB_RED(background, 10),
+  DRM_ARGB_GREEN(background, 10),
+  DRM_ARGB_BLUE(background, 10));
+   }
+
seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s \n",
   yesno(!crtc->cpu_fifo_underrun_disabled),
   yesno(!crtc->pch_fifo_underrun_disabled));
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 7fe11f9a0dbe..6763ad52d53e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3834,6 +3834,28 @@ void intel_finish_reset(struct drm_i915_private 
*dev_priv)
clear_bit(I915_RESET_MODESET, _priv->gpu_error.flags);
 }
 
+static void
+skl_update_background_color(const struct intel_crtc_state *crtc_state)
+{
+   struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+   uint64_t propval = crtc_state->base.bgcolor;
+   uint32_t tmp;
+
+   /* Hardware is programmed with 10 bits of precision */
+   tmp = DRM_ARGB_RED(propval, 10) << 20
+   | DRM_ARGB_GREEN(propval, 10) << 10
+   | DRM_ARGB_BLUE(propval, 10);
+
+   /*
+* Set CSC and gamma for bottom color to ensure background pixels
+* receive the same color transformations as plane content.
+*/
+   tmp |= SKL_BOTTOM_COLOR_CSC_ENABLE | SKL_BOTTOM_COLOR_GAMMA_ENABLE;
+
+   I915_WRITE(SKL_BOTTOM_COLOR(crtc->pipe), tmp);
+}
+
 static void intel_update_pipe_config(const struct intel_crtc_state 
*old_crtc_state,
 const struct intel_crtc_state 
*new_crtc_state)
 {
@@ -3869,15 +3891,8 @@ static void intel_update_pipe_config(const struct 
intel_crtc_state *old_crtc_sta
ironlake_pfit_disable(old_crtc_state);
}
 
-   /*
-* We don't (yet) allow userspace to control the pipe background color,
-* so force it to black, but apply pipe gamma and CSC so that its
-* handling will match how we program our planes.
-*/
if (INTEL_GEN(dev_priv) >= 9)
-   I915_WRITE(SKL_BOTTOM_COLOR(crtc->pipe),
-  SKL_BOTTOM_COLOR_GAMMA_ENABLE |
-  SKL_BOTTOM_COLOR_CSC_ENABLE);
+   skl_update_background_color(new_crtc_state);
 }
 
 static void intel_fdi_normal_train(struct intel_crtc *crtc)
@@ -10897,6 +10912,9 @@ static int intel_crtc_atomic_check(struct drm_crtc 
*crtc,
crtc_state->planes_changed = true;
}
 
+   if (crtc_state->bgcolor_changed)
+   pipe_config->update_pipe = true;
+
ret = 0;
if (dev_priv->display.compute_pipe_wm) {
ret = dev_priv->display.compute_pipe_wm(pipe_config);
@@ -14036,6 +14054,9 @@ static int intel_crtc_init(struct drm_i915_private 
*dev_priv, enum pipe pipe)
 
WARN_ON(drm_crtc_index(_crtc->base) != intel_crtc->pipe);
 
+   if (INTEL_GEN(dev_priv) >= 9)
+   drm_crtc_add_bgcolor_property(_crtc->base);
+
return 0;
 
 fail:
-- 
2.14.4

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[Intel-gfx] [PATCH v3 1/3] drm/i915: Force background color to black for gen9+ (v2)

2018-11-15 Thread Matt Roper
We don't yet allow userspace to control the CRTC background color, but
we should manually program the color to black to ensure the BIOS didn't
leave us with some other color.  We should also set the pipe gamma and
pipe CSC bits so that the background color goes through the same color
management transformations that a plane with black pixels would.

v2: Rename register to SKL_BOTTOM_COLOR to more closely follow
bspec naming.  (Ville)

Cc: Ville Syrjälä 
Signed-off-by: Matt Roper 
---
 drivers/gpu/drm/i915/i915_reg.h  |  6 ++
 drivers/gpu/drm/i915/intel_display.c | 19 +++
 2 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 94ba86018a4f..7cfae3425bc2 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5663,6 +5663,12 @@ enum {
 #define   PIPEMISC_DITHER_TYPE_SP  (0 << 2)
 #define PIPEMISC(pipe) _MMIO_PIPE2(pipe, _PIPE_MISC_A)
 
+/* Skylake+ pipe bottom (background) color */
+#define _SKL_BOTTOM_COLOR_A0x70034
+#define   SKL_BOTTOM_COLOR_GAMMA_ENABLE(1 << 31)
+#define   SKL_BOTTOM_COLOR_CSC_ENABLE  (1 << 30)
+#define SKL_BOTTOM_COLOR(pipe) _MMIO_PIPE2(pipe, _SKL_BOTTOM_COLOR_A)
+
 #define VLV_DPFLIPSTAT _MMIO(VLV_DISPLAY_BASE + 
0x70028)
 #define   PIPEB_LINE_COMPARE_INT_EN(1 << 29)
 #define   PIPEB_HLINE_INT_EN   (1 << 28)
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 132e978227fb..7fe11f9a0dbe 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3868,6 +3868,16 @@ static void intel_update_pipe_config(const struct 
intel_crtc_state *old_crtc_sta
else if (old_crtc_state->pch_pfit.enabled)
ironlake_pfit_disable(old_crtc_state);
}
+
+   /*
+* We don't (yet) allow userspace to control the pipe background color,
+* so force it to black, but apply pipe gamma and CSC so that its
+* handling will match how we program our planes.
+*/
+   if (INTEL_GEN(dev_priv) >= 9)
+   I915_WRITE(SKL_BOTTOM_COLOR(crtc->pipe),
+  SKL_BOTTOM_COLOR_GAMMA_ENABLE |
+  SKL_BOTTOM_COLOR_CSC_ENABLE);
 }
 
 static void intel_fdi_normal_train(struct intel_crtc *crtc)
@@ -15356,6 +15366,15 @@ static void intel_sanitize_crtc(struct intel_crtc 
*crtc,
plane->base.type != DRM_PLANE_TYPE_PRIMARY)
intel_plane_disable_noatomic(crtc, plane);
}
+
+   /*
+* Disable any background color set by the BIOS, but enable the
+* gamma and CSC to match how we program our planes.
+*/
+   if (INTEL_GEN(dev_priv) >= 9)
+   I915_WRITE(SKL_BOTTOM_COLOR(crtc->pipe),
+  SKL_BOTTOM_COLOR_GAMMA_ENABLE |
+  SKL_BOTTOM_COLOR_CSC_ENABLE);
}
 
/* Adjust the state of the output pipe according to whether we
-- 
2.14.4

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[Intel-gfx] [PATCH v3 2/3] drm: Add CRTC background color property (v3)

2018-11-15 Thread Matt Roper
Some display controllers can be programmed to present non-black colors
for pixels not covered by any plane (or pixels covered by the
transparent regions of higher planes).  Compositors that want a UI with
a solid color background can potentially save memory bandwidth by
setting the CRTC background property and using smaller planes to display
the rest of the content.

To avoid confusion between different ways of encoding RGB data, we
define a standard 64-bit format that should be used for this property's
value.  Helper functions and macros are provided to generate and dissect
values in this standard format with varying component precision values.

v2:
 - Swap internal representation's blue and red bits to make it easier
   to read if printed out.  (Ville)
 - Document bgcolor property in drm_blend.c.  (Sean Paul)
 - s/background_color/bgcolor/ for consistency between property name and
   value storage field.  (Sean Paul)
 - Add a convenience function to attach property to a given crtc.

v3:
 - Restructure ARGB component extraction macros to be easier to
   understand and enclose the parameters in () to avoid calculations
   if expressions are passed.  (Sean Paul)
 - s/rgba/argb/ in helper function/macro names.  Even though the idea is
   to not worry about the internal representation of the u64, it can
   still be confusing to look at code that uses 'rgba' terminology, but
   stores values with argb ordering.  (Ville)

Cc: dri-de...@lists.freedesktop.org
Cc: wei.c...@intel.com
Cc: harish.krupo@intel.com
Cc: Ville Syrjälä 
Cc: Sean Paul 
Signed-off-by: Matt Roper 
Reviewed-by(v2): Sean Paul 
---
 drivers/gpu/drm/drm_atomic_state_helper.c |  1 +
 drivers/gpu/drm/drm_atomic_uapi.c |  5 +
 drivers/gpu/drm/drm_blend.c   | 21 ++---
 drivers/gpu/drm/drm_mode_config.c |  6 ++
 include/drm/drm_blend.h   |  1 +
 include/drm/drm_crtc.h| 17 +
 include/drm/drm_mode_config.h |  5 +
 include/uapi/drm/drm_mode.h   | 28 
 8 files changed, 81 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c 
b/drivers/gpu/drm/drm_atomic_state_helper.c
index 3ba996069d69..2f8c55668089 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -101,6 +101,7 @@ void __drm_atomic_helper_crtc_duplicate_state(struct 
drm_crtc *crtc,
state->planes_changed = false;
state->connectors_changed = false;
state->color_mgmt_changed = false;
+   state->bgcolor_changed = false;
state->zpos_changed = false;
state->commit = NULL;
state->event = NULL;
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c 
b/drivers/gpu/drm/drm_atomic_uapi.c
index 86ac33922b09..b95a55a778e2 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -467,6 +467,9 @@ static int drm_atomic_crtc_set_property(struct drm_crtc 
*crtc,
return -EFAULT;
 
set_out_fence_for_crtc(state->state, crtc, fence_ptr);
+   } else if (property == config->bgcolor_property) {
+   state->bgcolor = val;
+   state->bgcolor_changed = true;
} else if (crtc->funcs->atomic_set_property) {
return crtc->funcs->atomic_set_property(crtc, state, property, 
val);
} else {
@@ -499,6 +502,8 @@ drm_atomic_crtc_get_property(struct drm_crtc *crtc,
*val = (state->gamma_lut) ? state->gamma_lut->base.id : 0;
else if (property == config->prop_out_fence_ptr)
*val = 0;
+   else if (property == config->bgcolor_property)
+   *val = state->bgcolor;
else if (crtc->funcs->atomic_get_property)
return crtc->funcs->atomic_get_property(crtc, state, property, 
val);
else
diff --git a/drivers/gpu/drm/drm_blend.c b/drivers/gpu/drm/drm_blend.c
index 0c78ca386cbe..7da28c0cb74d 100644
--- a/drivers/gpu/drm/drm_blend.c
+++ b/drivers/gpu/drm/drm_blend.c
@@ -175,9 +175,16 @@
  *  plane does not expose the "alpha" property, then this is
  *  assumed to be 1.0
  *
- * Note that all the property extensions described here apply either to the
- * plane or the CRTC (e.g. for the background color, which currently is not
- * exposed and assumed to be black).
+ * The property extensions described above all apply to the plane.  Drivers
+ * may also expose the following crtc property extension:
+ *
+ * bgcolor:
+ * Background color is setup with drm_crtc_add_bgcolor_property().  It
+ * controls the RGB color of a full-screen, fully-opaque layer that exists
+ * below all planes.  This color will be used for pixels not covered by
+ * any plane and may also be blended with plane contents as allowed by a
+ * plane's alpha values.  The background color defaults to black, and is
+ * assumed to be black for 

[Intel-gfx] ✓ Fi.CI.BAT: success for CRTC background color (rev3)

2018-11-15 Thread Patchwork
== Series Details ==

Series: CRTC background color (rev3)
URL   : https://patchwork.freedesktop.org/series/50834/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5147 -> Patchwork_10834 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/50834/revisions/3/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10834:

  === IGT changes ===

 Possible regressions 

{igt@runner@aborted}:
  fi-cfl-8109u:   NOTRUN -> FAIL


== Known issues ==

  Here are the changes found in Patchwork_10834 that come from known issues:

  === IGT changes ===

 Issues hit 

igt@drv_selftest@live_hangcheck:
  fi-skl-6700k2:  PASS -> INCOMPLETE (fdo#108744)

igt@kms_chamelium@common-hpd-after-suspend:
  fi-skl-6700k2:  PASS -> FAIL (fdo#103841)

igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
  fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362)


 Possible fixes 

igt@gem_ctx_create@basic-files:
  fi-bsw-kefka:   FAIL (fdo#108656) -> PASS

igt@kms_frontbuffer_tracking@basic:
  fi-hsw-peppy:   DMESG-WARN (fdo#102614) -> PASS

igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
  fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS +2

igt@pm_rpm@module-reload:
  fi-skl-6770hq:  DMESG-WARN (fdo#105541) -> PASS


 Warnings 

igt@drv_selftest@live_contexts:
  fi-icl-u:   DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315)


  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
  fdo#105541 https://bugs.freedesktop.org/show_bug.cgi?id=105541
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315
  fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569
  fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656
  fdo#108744 https://bugs.freedesktop.org/show_bug.cgi?id=108744


== Participating hosts (51 -> 44) ==

  Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
fi-apl-guc fi-snb-2520m fi-ctg-p8600 


== Build changes ==

* Linux: CI_DRM_5147 -> Patchwork_10834

  CI_DRM_5147: 7d2b7a6073309f870689b91fa4c4a30120ccbe00 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4715: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10834: 8772f8932af9341b06ac3082608e2629de3f4bef @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

8772f8932af9 drm/i915/gen9+: Add support for pipe background color (v3)
05fa1ef11dab drm: Add CRTC background color property (v2)
8424c4b432e2 drm/i915: Force background color to black for gen9+ (v2)

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10834/issues.html
___
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/dp_mst: Improve VCPI helpers, use in nouveau (rev6)

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/dp_mst: Improve VCPI helpers, use in nouveau (rev6)
URL   : https://patchwork.freedesktop.org/series/51412/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/dp_mst: Add some atomic state iterator macros
Okay!

Commit: drm/dp_mst: Return kref_put() result from drm_dp_put_port()
Okay!

Commit: drm/dp_mst: Start tracking per-port VCPI allocations
+./include/linux/slab.h:332:43: warning: dubious: x & !y

Commit: drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()
Okay!

Commit: drm/nouveau: Stop unsetting mstc->port, check connector registration
Okay!

Commit: drm/nouveau: Use atomic VCPI helpers for MST
Okay!

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Re: [Intel-gfx] [PATCH v9 20/24] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable

2018-11-15 Thread Manasi Navare
On Tue, Nov 13, 2018 at 05:52:28PM -0800, Manasi Navare wrote:
> DSC can be supported per DP connector. This patch adds a per connector
> debugfs node to expose DSC support capability by the kernel.
> The same node can be used from userspace to force DSC enable.
> 
> force_dsc_en written through this debugfs node is used to force
> DSC even for lower resolutions.
> 
> v4:
> * Add missed connector_status check (Manasi)
> * Create i915_dsc_support node only for Gen >=10 (manasi)
> * Access intel_dp->dsc_dpcd only if its not NULL (Manasi)
> v3:
> * Combine Force_dsc_en with this patch (Ville)
> v2:
> * Use kstrtobool_from_user to avoid explicit error checking (Lyude)
> * Rebase on drm-tip (Manasi)
> 
> Cc: Rodrigo Vivi 
> Cc: Ville Syrjala 
> Cc: Anusha Srivatsa 
> Cc: Lyude Paul 
> Signed-off-by: Manasi Navare 
> Reviewed-by: Lyude Paul 
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 77 +
>  drivers/gpu/drm/i915/intel_dp.c |  3 +-
>  drivers/gpu/drm/i915/intel_drv.h|  3 ++
>  3 files changed, 82 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 670db5073d70..3c112bb225d6 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -5074,6 +5074,76 @@ static int i915_hdcp_sink_capability_show(struct 
> seq_file *m, void *data)
>  }
>  DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
>  
> +static int i915_dsc_support_show(struct seq_file *m, void *data)
> +{
> + struct drm_connector *connector = m->private;
> + struct intel_encoder *encoder = intel_attached_encoder(connector);
> + struct intel_dp *intel_dp =
> + enc_to_intel_dp(>base);
> + struct intel_crtc *crtc;
> + struct intel_crtc_state *crtc_state;
> +
> + if (connector->status != connector_status_connected)
> + return -ENODEV;
> +
> + crtc = to_intel_crtc(encoder->base.crtc);
> + crtc_state = to_intel_crtc_state(crtc->base.state);
> + drm_modeset_lock(>base.mutex, NULL);
> + seq_printf(m, "Enabled: %s\n",
> +yesno(crtc_state->dsc_params.compression_enable));
> + if (intel_dp->dsc_dpcd)
> + seq_printf(m, "Supported: %s\n",
> +yesno(drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)));

I think this supported should also use the intel_dp_supports_dsc() helper so
it checks for sink support and platform support as well.

Ville, what do you think?

Manasi

> + drm_modeset_unlock(>base.mutex);
> +
> + return 0;
> +}
> +
> +static ssize_t i915_dsc_support_write(struct file *file,
> +   const char __user *ubuf,
> +   size_t len, loff_t *offp)
> +{
> + bool dsc_enable = false;
> + int ret;
> + struct drm_connector *connector =
> + ((struct seq_file *)file->private_data)->private;
> + struct intel_encoder *encoder = intel_attached_encoder(connector);
> + struct intel_dp *intel_dp = enc_to_intel_dp(>base);
> +
> + if (len == 0)
> + return 0;
> +
> + DRM_DEBUG_DRIVER("Copied %d bytes from user to force DSC\n",
> +  (unsigned int)len);
> +
> + ret = kstrtobool_from_user(ubuf, len, _enable);
> + if (ret < 0)
> + return ret;
> +
> + DRM_DEBUG_DRIVER("Got %s for DSC Enable\n",
> +  (dsc_enable) ? "true" : "false");
> + intel_dp->force_dsc_en = dsc_enable;
> +
> + *offp += len;
> + return len;
> +}
> +
> +static int i915_dsc_support_open(struct inode *inode,
> +  struct file *file)
> +{
> + return single_open(file, i915_dsc_support_show,
> +inode->i_private);
> +}
> +
> +static const struct file_operations i915_dsc_support_fops = {
> + .owner = THIS_MODULE,
> + .open = i915_dsc_support_open,
> + .read = seq_read,
> + .llseek = seq_lseek,
> + .release = single_release,
> + .write = i915_dsc_support_write
> +};
> +
>  /**
>   * i915_debugfs_connector_add - add i915 specific connector debugfs files
>   * @connector: pointer to a registered drm_connector
> @@ -5086,6 +5156,7 @@ DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
>  int i915_debugfs_connector_add(struct drm_connector *connector)
>  {
>   struct dentry *root = connector->debugfs_entry;
> + struct drm_i915_private *dev_priv = to_i915(connector->dev);
>  
>   /* The connector must have been registered beforehands. */
>   if (!root)
> @@ -5110,5 +5181,11 @@ int i915_debugfs_connector_add(struct drm_connector 
> *connector)
>   connector, _hdcp_sink_capability_fops);
>   }
>  
> + if (INTEL_GEN(dev_priv) >= 10 &&
> + (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
> +  connector->connector_type == DRM_MODE_CONNECTOR_eDP))
> + debugfs_create_file("i915_dsc_support", S_IRUGO, 

[Intel-gfx] ✓ Fi.CI.IGT: success for CRTC background color (rev3)

2018-11-15 Thread Patchwork
== Series Details ==

Series: CRTC background color (rev3)
URL   : https://patchwork.freedesktop.org/series/50834/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5147_full -> Patchwork_10834_full =

== Summary - SUCCESS ==

  No regressions found.

  

== Known issues ==

  Here are the changes found in Patchwork_10834_full that come from known 
issues:

  === IGT changes ===

 Issues hit 

igt@drv_suspend@shrink:
  shard-skl:  NOTRUN -> INCOMPLETE (fdo#106886)

igt@drv_suspend@sysfs-reader:
  shard-skl:  PASS -> INCOMPLETE (fdo#104108)

igt@gem_ppgtt@blt-vs-render-ctx0:
  shard-skl:  PASS -> TIMEOUT (fdo#108039)

igt@kms_color@pipe-b-legacy-gamma:
  shard-apl:  PASS -> FAIL (fdo#104782)

igt@kms_cursor_crc@cursor-64x21-sliding:
  shard-apl:  PASS -> FAIL (fdo#103232) +3

igt@kms_cursor_crc@cursor-64x64-offscreen:
  shard-skl:  NOTRUN -> FAIL (fdo#103232)

igt@kms_flip@flip-vs-expired-vblank:
  shard-kbl:  PASS -> FAIL (fdo#102887, fdo#105363)

igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
  shard-skl:  NOTRUN -> FAIL (fdo#105683)

igt@kms_plane@pixel-format-pipe-b-planes:
  shard-skl:  NOTRUN -> DMESG-WARN (fdo#106885)

igt@kms_plane@pixel-format-pipe-c-planes:
  shard-apl:  PASS -> FAIL (fdo#103166)

igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
  shard-skl:  NOTRUN -> FAIL (fdo#108145)

igt@kms_setmode@basic:
  shard-apl:  PASS -> FAIL (fdo#99912)

igt@perf_pmu@invalid-init:
  shard-glk:  PASS -> DMESG-WARN (fdo#105763, fdo#106538) +1


 Possible fixes 

igt@gem_eio@in-flight-suspend:
  shard-kbl:  INCOMPLETE (fdo#106702, fdo#103665) -> PASS

igt@gem_exec_nop@basic-series:
  shard-apl:  INCOMPLETE (fdo#103927) -> PASS

igt@kms_busy@extended-pageflip-hang-newfb-render-c:
  shard-glk:  DMESG-WARN (fdo#107956) -> PASS

igt@kms_chv_cursor_fail@pipe-a-128x128-top-edge:
  shard-apl:  DMESG-WARN (fdo#105602, fdo#103558) -> PASS +3

igt@kms_color@pipe-b-degamma:
  shard-apl:  FAIL (fdo#104782) -> PASS

igt@kms_cursor_crc@cursor-128x128-suspend:
  shard-apl:  FAIL (fdo#103232, fdo#103191) -> PASS

igt@kms_cursor_crc@cursor-256x256-dpms:
  shard-apl:  FAIL (fdo#103232) -> PASS +3

igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
  shard-skl:  FAIL (fdo#103184) -> PASS

igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled:
  shard-skl:  FAIL (fdo#103232, fdo#103184) -> PASS

igt@kms_fbcon_fbt@fbc-suspend:
  shard-skl:  INCOMPLETE (fdo#107773, fdo#104108) -> PASS

igt@kms_flip@flip-vs-expired-vblank:
  shard-skl:  FAIL (fdo#105363) -> PASS

igt@kms_flip_tiling@flip-to-x-tiled:
  shard-skl:  FAIL (fdo#108134) -> PASS

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
  shard-apl:  FAIL (fdo#103167) -> PASS

igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
  shard-skl:  FAIL (fdo#105682) -> PASS

igt@kms_plane@pixel-format-pipe-a-planes:
  shard-apl:  FAIL (fdo#103166) -> PASS

igt@kms_plane@plane-position-covered-pipe-c-planes:
  shard-glk:  FAIL (fdo#103166) -> PASS

igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
  shard-skl:  FAIL (fdo#107815, fdo#108145) -> PASS

igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
  shard-skl:  FAIL (fdo#107815) -> PASS

igt@kms_vblank@pipe-c-ts-continuation-suspend:
  shard-hsw:  FAIL (fdo#104894) -> PASS

igt@pm_rpm@basic-rte:
  shard-skl:  INCOMPLETE (fdo#107807) -> PASS

igt@pm_rpm@gem-execbuf-stress:
  shard-skl:  INCOMPLETE (fdo#107807, fdo#107803) -> PASS

igt@pm_rpm@system-suspend-modeset:
  shard-skl:  INCOMPLETE (fdo#107807, fdo#104108) -> PASS


  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
  fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782
  fdo#104894 https://bugs.freedesktop.org/show_bug.cgi?id=104894
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105602 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp_mst: Improve VCPI helpers, use in nouveau (rev6)

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/dp_mst: Improve VCPI helpers, use in nouveau (rev6)
URL   : https://patchwork.freedesktop.org/series/51412/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
446143844eea drm/dp_mst: Add some atomic state iterator macros
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

-:55: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible 
side-effects?
#55: FILE: include/drm/drm_dp_mst_helper.h:669:
+#define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state, 
__i) \
+   for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
&(old_state), &(new_state), (__i)))

-:55: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#55: FILE: include/drm/drm_dp_mst_helper.h:669:
+#define for_each_oldnew_mst_mgr_in_state(__state, mgr, old_state, new_state, 
__i) \
+   for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
&(old_state), &(new_state), (__i)))

-:57: WARNING:LONG_LINE: line over 100 characters
#57: FILE: include/drm/drm_dp_mst_helper.h:671:
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
&(old_state), &(new_state), (__i)))

-:72: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible 
side-effects?
#72: FILE: include/drm/drm_dp_mst_helper.h:686:
+#define for_each_old_mst_mgr_in_state(__state, mgr, old_state, __i) \
+   for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
&(old_state), NULL, (__i)))

-:72: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#72: FILE: include/drm/drm_dp_mst_helper.h:686:
+#define for_each_old_mst_mgr_in_state(__state, mgr, old_state, __i) \
+   for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
&(old_state), NULL, (__i)))

-:74: WARNING:LONG_LINE: line over 100 characters
#74: FILE: include/drm/drm_dp_mst_helper.h:688:
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
&(old_state), NULL, (__i)))

-:90: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible 
side-effects?
#90: FILE: include/drm/drm_dp_mst_helper.h:704:
+#define for_each_new_mst_mgr_in_state(__state, mgr, new_state, __i) \
+   for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
NULL, &(new_state), (__i)))

-:90: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#90: FILE: include/drm/drm_dp_mst_helper.h:704:
+#define for_each_new_mst_mgr_in_state(__state, mgr, new_state, __i) \
+   for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
NULL, &(new_state), (__i)))

-:92: WARNING:LONG_LINE: line over 100 characters
#92: FILE: include/drm/drm_dp_mst_helper.h:706:
+   for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), 
NULL, &(new_state), (__i)))

total: 0 errors, 4 warnings, 6 checks, 81 lines checked
69ff1fdbfe4e drm/dp_mst: Return kref_put() result from drm_dp_put_port()
783d19c2f54c drm/dp_mst: Start tracking per-port VCPI allocations
de21a67c03da drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()
e0be5ec00684 drm/nouveau: Stop unsetting mstc->port, check connector 
registration
70fc28c8d19f drm/nouveau: Use atomic VCPI helpers for MST

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[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/dp_mst: Improve VCPI helpers, use in nouveau (rev6)

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/dp_mst: Improve VCPI helpers, use in nouveau (rev6)
URL   : https://patchwork.freedesktop.org/series/51412/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_5149_full -> Patchwork_10835_full =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_10835_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10835_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in 
Patchwork_10835_full:

  === IGT changes ===

 Possible regressions 

igt@kms_flip_tiling@flip-changes-tiling:
  shard-skl:  NOTRUN -> FAIL


 Warnings 

igt@pm_rc6_residency@rc6-accuracy:
  shard-snb:  PASS -> SKIP


== Known issues ==

  Here are the changes found in Patchwork_10835_full that come from known 
issues:

  === IGT changes ===

 Issues hit 

igt@gem_eio@in-flight-suspend:
  shard-kbl:  PASS -> INCOMPLETE (fdo#106702, fdo#103665)

igt@gem_ppgtt@blt-vs-render-ctx0:
  shard-kbl:  PASS -> INCOMPLETE (fdo#106023, fdo#103665, 
fdo#106887)

igt@kms_busy@extended-modeset-hang-newfb-render-a:
  shard-skl:  NOTRUN -> DMESG-WARN (fdo#107956)

igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
  shard-skl:  PASS -> DMESG-WARN (fdo#107956)

igt@kms_color@pipe-a-degamma:
  shard-skl:  NOTRUN -> FAIL (fdo#104782, fdo#108145)

igt@kms_color@pipe-b-legacy-gamma:
  shard-apl:  PASS -> FAIL (fdo#104782)

igt@kms_cursor_crc@cursor-64x21-sliding:
  shard-apl:  PASS -> FAIL (fdo#103232) +3

igt@kms_fbcon_fbt@psr:
  shard-skl:  NOTRUN -> FAIL (fdo#107882)

igt@kms_flip@flip-vs-expired-vblank-interruptible:
  shard-glk:  PASS -> FAIL (fdo#102887, fdo#105363)

igt@kms_flip_tiling@flip-to-x-tiled:
  shard-skl:  NOTRUN -> FAIL (fdo#108134)

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
  shard-apl:  PASS -> FAIL (fdo#103167)

igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
  shard-skl:  NOTRUN -> FAIL (fdo#103167) +2

igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
  shard-skl:  NOTRUN -> FAIL (fdo#107815, fdo#108145) +1

igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb:
  shard-skl:  NOTRUN -> FAIL (fdo#108145) +1

igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
  shard-apl:  PASS -> FAIL (fdo#103166)

igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
  shard-glk:  PASS -> FAIL (fdo#103166) +1

igt@kms_setmode@basic:
  shard-apl:  PASS -> FAIL (fdo#99912)

igt@pm_rpm@modeset-lpsp-stress:
  shard-skl:  NOTRUN -> INCOMPLETE (fdo#107807) +2

igt@pm_rpm@sysfs-read:
  shard-skl:  PASS -> INCOMPLETE (fdo#107807) +2


 Possible fixes 

igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
  shard-hsw:  DMESG-WARN (fdo#107956) -> PASS

igt@kms_chv_cursor_fail@pipe-a-128x128-top-edge:
  shard-kbl:  DMESG-FAIL (fdo#105602, fdo#104671, fdo#103558) -> 
PASS

igt@kms_color@pipe-a-legacy-gamma:
  shard-kbl:  DMESG-WARN (fdo#105602, fdo#103558) -> PASS +1
  shard-apl:  DMESG-WARN (fdo#105602, fdo#103558) -> PASS +1

igt@kms_color@pipe-b-degamma:
  shard-apl:  FAIL (fdo#104782) -> PASS

igt@kms_cursor_crc@cursor-256x256-onscreen:
  shard-apl:  FAIL (fdo#103232) -> PASS

igt@kms_cursor_crc@cursor-256x256-random:
  shard-glk:  FAIL (fdo#103232) -> PASS

igt@kms_flip@flip-vs-expired-vblank-interruptible:
  shard-kbl:  FAIL (fdo#102887, fdo#105363) -> PASS

igt@kms_plane@plane-position-covered-pipe-c-planes:
  shard-apl:  FAIL (fdo#103166) -> PASS

igt@kms_setmode@basic:
  shard-glk:  FAIL (fdo#99912) -> PASS
  shard-hsw:  FAIL (fdo#99912) -> PASS


  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
  fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671
  fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
  fdo#106023 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp_mst: Improve VCPI helpers, use in nouveau (rev6)

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/dp_mst: Improve VCPI helpers, use in nouveau (rev6)
URL   : https://patchwork.freedesktop.org/series/51412/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5149 -> Patchwork_10835 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/51412/revisions/6/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10835 that come from known issues:

  === IGT changes ===

 Issues hit 

igt@gem_ctx_create@basic-files:
  fi-bsw-kefka:   PASS -> FAIL (fdo#108656)

igt@kms_frontbuffer_tracking@basic:
  fi-icl-u:   PASS -> FAIL (fdo#103167)

igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
  fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362)


 Possible fixes 

igt@gem_ctx_create@basic-files:
  fi-bsw-n3050:   FAIL (fdo#108656) -> PASS

igt@gem_ctx_switch@basic-default:
  fi-icl-u2:  DMESG-WARN (fdo#107724) -> PASS

igt@kms_chamelium@common-hpd-after-suspend:
  fi-skl-6700k2:  WARN (fdo#108680) -> PASS

igt@kms_pipe_crc_basic@read-crc-pipe-a:
  fi-byt-clapper: FAIL (fdo#107362) -> PASS +1

igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
  fi-blb-e6850:   INCOMPLETE (fdo#107718) -> PASS

igt@prime_vgem@basic-fence-flip:
  fi-gdg-551: FAIL (fdo#103182) -> PASS


 Warnings 

igt@drv_selftest@live_contexts:
  fi-icl-u:   INCOMPLETE (fdo#108315) -> DMESG-FAIL (fdo#108569)


  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103182 https://bugs.freedesktop.org/show_bug.cgi?id=103182
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
  fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315
  fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569
  fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656
  fdo#108680 https://bugs.freedesktop.org/show_bug.cgi?id=108680


== Participating hosts (51 -> 45) ==

  Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
fi-snb-2520m fi-ctg-p8600 


== Build changes ==

* Linux: CI_DRM_5149 -> Patchwork_10835

  CI_DRM_5149: c9e35242429a47b1c550dce738933bbd1739d897 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4715: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10835: 70fc28c8d19f2f366bb26f0a89b3dc42dafb25d5 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

70fc28c8d19f drm/nouveau: Use atomic VCPI helpers for MST
e0be5ec00684 drm/nouveau: Stop unsetting mstc->port, check connector 
registration
de21a67c03da drm/dp_mst: Check payload count in drm_dp_mst_atomic_check()
783d19c2f54c drm/dp_mst: Start tracking per-port VCPI allocations
69ff1fdbfe4e drm/dp_mst: Return kref_put() result from drm_dp_put_port()
446143844eea drm/dp_mst: Add some atomic state iterator macros

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10835/issues.html
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/selftests: Workaround an issue with unused lockdep subclass

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/i915/selftests: Workaround an issue with unused lockdep subclass
URL   : https://patchwork.freedesktop.org/series/52551/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_5147 -> Patchwork_10830 =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_10830 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10830, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/52551/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10830:

  === IGT changes ===

 Possible regressions 

igt@gem_exec_fence@basic-await-default:
  fi-elk-e7500:   PASS -> DMESG-WARN
  fi-ilk-650: PASS -> DMESG-WARN
  fi-snb-2600:PASS -> DMESG-WARN

igt@gem_exec_suspend@basic-s3:
  fi-byt-n2820:   PASS -> DMESG-WARN
  fi-byt-clapper: PASS -> DMESG-WARN

igt@gem_exec_suspend@basic-s4-devices:
  fi-byt-j1900:   PASS -> DMESG-WARN

igt@gem_wait@basic-await-all:
  fi-ivb-3770:PASS -> DMESG-WARN
  fi-ivb-3520m:   PASS -> DMESG-WARN
  fi-hsw-4770:PASS -> DMESG-WARN
  fi-hsw-peppy:   PASS -> DMESG-WARN
  fi-hsw-4770r:   PASS -> DMESG-WARN

{igt@runner@aborted}:
  fi-kbl-7500u:   NOTRUN -> FAIL
  fi-skl-guc: NOTRUN -> FAIL
  fi-kbl-r:   NOTRUN -> FAIL


== Known issues ==

  Here are the changes found in Patchwork_10830 that come from known issues:

  === IGT changes ===

 Issues hit 

igt@drv_selftest@live_coherency:
  fi-gdg-551: PASS -> DMESG-FAIL (fdo#107164)

igt@gem_ctx_create@basic-files:
  fi-icl-u2:  PASS -> DMESG-WARN (fdo#107724)

igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
  fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362)


 Possible fixes 

igt@gem_ctx_create@basic-files:
  fi-bsw-kefka:   FAIL (fdo#108656) -> PASS

igt@gem_exec_suspend@basic-s3:
  fi-icl-u2:  DMESG-WARN (fdo#107724) -> PASS

igt@kms_frontbuffer_tracking@basic:
  fi-hsw-peppy:   DMESG-WARN (fdo#102614) -> PASS

igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
  fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS +2

igt@pm_rpm@module-reload:
  fi-skl-6770hq:  DMESG-WARN (fdo#105541) -> PASS


 Warnings 

igt@drv_selftest@live_contexts:
  fi-icl-u:   DMESG-FAIL (fdo#108569) -> INCOMPLETE (fdo#108315)


  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#105541 https://bugs.freedesktop.org/show_bug.cgi?id=105541
  fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
  fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315
  fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569
  fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656


== Participating hosts (51 -> 45) ==

  Additional (1): fi-pnv-d510 
  Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
fi-snb-2520m fi-ctg-p8600 fi-kbl-7560u 


== Build changes ==

* Linux: CI_DRM_5147 -> Patchwork_10830

  CI_DRM_5147: 7d2b7a6073309f870689b91fa4c4a30120ccbe00 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4715: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10830: 7b8744c61302aae1b5aece81b7b003776a20f09e @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

7b8744c61302 drm/i915/selftests: Workaround an issue with unused lockdep 
subclass

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10830/issues.html
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
URL   : https://patchwork.freedesktop.org/series/52559/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
e9cbd5053fbd drm/i915/glk: Use cached RCOMP value when re-enabling DPIO Phy
-:29: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#29: FILE: drivers/gpu/drm/i915/intel_dpio_phy.c:426:
+   val = dev_priv->bxt_phy_grc = bxt_get_grc(dev_priv,

total: 0 errors, 0 warnings, 1 checks, 14 lines checked

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Re: [Intel-gfx] [RFC 6/7] drm/i915: Introduce subplatform concept

2018-11-15 Thread Tvrtko Ursulin


On 13/11/2018 22:28, Jani Nikula wrote:

On Tue, 13 Nov 2018, Tvrtko Ursulin  wrote:

On 13/11/2018 11:40, Jani Nikula wrote:

On Mon, 12 Nov 2018, Tvrtko Ursulin  wrote:

From: Tvrtko Ursulin 

Introduce subplatform mask to eliminate throughout the code devid checking
sprinkle, mostly courtesy of IS_*_UL[TX] macros.

Subplatform mask initialization is done at runtime device info init.


I kind of like the concept, and I like the centralization of devid
checks in one function, but I've always wanted to take this to one step
further: only specify device ids in i915_pciids.h, and *nowhere* else.

It's perhaps too much duplication to create a device info for all these
variants, but I think it would be possible to make the subplatform info
table driven using macros defined in i915_pciids.h.


It would be much nicer, but how would you do it? Perhaps my imagination
is just strong enough today.


So here's an idea.



Simply by splitting the id's into subplatform parts, for instance where
we have today:

#define INTEL_BDW_GT1_IDS(info)  \
  INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
  INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
  INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
  INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \
  INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
  INTEL_VGA_DEVICE(0x160D, info)  /* GT1 Workstation */

We'd split to:

#define INTEL_BDW_GT1_ULT_IDS(info)  \
  INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
  INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \

#define INTEL_BDW_GT1_ULX_IDS(info)  \
  INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \


So far so good.



#define INTEL_BDW_GT1_IDS(info)  \
  INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
  INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
  INTEL_VGA_DEVICE(0x160D, info)  /* GT1 Workstation */


Now include INTEL_BDW_GT1_ULT_IDS(info) and INTEL_BDW_GT1_ULX_IDS(info)
to the above...



Then in i915_pci.c, instead of:

...
INTEL_BDW_GT1_IDS(_broadwell_gt1_info),
...

We'd have:

...
INTEL_BDW_GT1_ULT_IDS(_broadwell_gt1_info),
INTEL_BDW_GT1_ULX_IDS(_broadwell_gt1_info),
INTEL_BDW_GT1_IDS(_broadwell_gt1_info),
...


...so you don't need to make this change at all. But that's a minor
detail.


Indeed, makes the change less intrusive.


And a separate table to map the id's to subplatform values.

Hmm, but we would probably need to extrac the id's from the
INTEL_BDW1_GT_IDS like macros so they can be used in this second site
without the info parameter. Something like the trick for device info
flags, but can it be made to generate a macro? I think not..


Are we shy of macro magic? Pfft.

#undef INTEL_VGA_DEVICE
#define INTEL_VGA_DEVICE(id, info) (id)

static const u32 bdw_ult_ids[] = {
INTEL_BDW_GT1_ULT_IDS(0),
};

static const u32 bdw_ulx_ids[] = {
INTEL_BDW_GT1_ULX_IDS(0),
};

#undef INTEL_VGA_DEVICE

Now you can add another mapping on top with pointers to similar arrays
as above and corresponding subplatform bits. Just need to order the code
to not clobber the real INTEL_VGA_DEVICE needs.

We don't need to split the ult/ulx tables by platform either if we only
care about the subplatform ult/ulx here, just need to remember add all
ult/ulx in corresponding arrays.


Nice and simple, thank you!

I am marking this for when I get round updating the series.

Regards,

Tvrtko
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Re: [Intel-gfx] [PATCH v2 13/13] drm/i915: Pass the plane to icl_program_input_csc_coeff()

2018-11-15 Thread Shankar, Uma


>-Original Message-
>From: Ville Syrjala [mailto:ville.syrj...@linux.intel.com]
>Sent: Thursday, November 15, 2018 2:37 AM
>To: intel-gfx@lists.freedesktop.org
>Cc: Shankar, Uma ; Maarten Lankhorst
>
>Subject: [PATCH v2 13/13] drm/i915: Pass the plane to
>icl_program_input_csc_coeff()
>
>From: Ville Syrjälä 
>
>On icl+ the plane state that gets passed to update_slave() is not the plane 
>state of
>the plane we're programming. With NV12 the plane state would be coming from
>the master (UV) plane whereas the plane we're programming is the slave (Y)
>plane. For that reason we need to explicitly pass around the slave plane (or 
>we'd
>have to otherwise deduce it by checking whether we were called via
>.update_plane() or .update_slave()).
>
>In the case of icl_program_input_csc_coeff() it's actually OK to assume that we
>are always the master plane because the input CSC only exists on HDR planes
>which can never be a slave plane. But for consistency let's pass in the plane
>explicitly anyway.
>
>While at it drop the "_coeff" from the function name since it's kinda 
>redundant,
>and this makes the name a bit shorter :)


Changes look ok to me.
Reviewed-by: Uma Shankar 

>Cc: Uma Shankar 
>Cc: Maarten Lankhorst 
>Signed-off-by: Ville Syrjälä 
>---
> drivers/gpu/drm/i915/intel_sprite.c | 14 ++
> 1 file changed, 6 insertions(+), 8 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_sprite.c
>b/drivers/gpu/drm/i915/intel_sprite.c
>index 0262159e7084..ee4c37a613f7 100644
>--- a/drivers/gpu/drm/i915/intel_sprite.c
>+++ b/drivers/gpu/drm/i915/intel_sprite.c
>@@ -373,14 +373,12 @@ skl_program_scaler(struct intel_plane *plane,
> #define  BOFF(x)  (((x) & 0x) << 16)
>
> static void
>-icl_program_input_csc_coeff(const struct intel_crtc_state *crtc_state,
>-  const struct intel_plane_state *plane_state)
>+icl_program_input_csc(struct intel_plane *plane,
>+const struct intel_crtc_state *crtc_state,
>+const struct intel_plane_state *plane_state)
> {
>-  struct drm_i915_private *dev_priv =
>-  to_i915(plane_state->base.plane->dev);
>-  struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>-  enum pipe pipe = crtc->pipe;
>-  struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
>+  struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>+  enum pipe pipe = plane->pipe;
>   enum plane_id plane_id = plane->id;
>
>   static const u16 input_csc_matrix[][9] = { @@ -540,7 +538,7 @@
>skl_program_plane(struct intel_plane *plane,
> plane_state->color_ctl);
>
>   if (fb->format->is_yuv && icl_is_hdr_plane(plane))
>-  icl_program_input_csc_coeff(crtc_state, plane_state);
>+  icl_program_input_csc(plane, crtc_state, plane_state);
>
>   skl_write_plane_wm(plane, crtc_state);
>
>--
>2.18.1

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Re: [Intel-gfx] [PATCH i-g-t 1/4] kms_content_protection: Fix log bug on 32-bit platforms.

2018-11-15 Thread Ville Syrjälä
On Wed, Nov 14, 2018 at 02:28:29PM -0800, Eric Anholt wrote:
> long is different between 32 and 64 and should basically never be
> used.  Fixes compiler warning about passing the wrong type.
> 
> Signed-off-by: Eric Anholt 
> ---
>  tests/kms_content_protection.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/kms_content_protection.c b/tests/kms_content_protection.c
> index 801eff66c272..bb9ecd3f4cde 100644
> --- a/tests/kms_content_protection.c
> +++ b/tests/kms_content_protection.c
> @@ -89,7 +89,8 @@ wait_for_prop_value(igt_output_t *output, uint64_t expected,
>   return true;
>   usleep(1000);
>   }
> - igt_info("prop_value mismatch %ld != %ld\n", val, expected);
> + igt_info("prop_value mismatch %lld != %lld\n",
> +  (long long)val, (long long)expected);

We use the ugly PRId64 & co. elsewhere for this.

Also FYI we have an igt-dev list now, so should post there rather than
on intel-gfx.

>  
>   return false;
>  }
> -- 
> 2.19.1
> 
> ___
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> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: remove excess line continuation backslashes

2018-11-15 Thread Patchwork
== Series Details ==

Series: drm/i915: remove excess line continuation backslashes
URL   : https://patchwork.freedesktop.org/series/52477/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5139_full -> Patchwork_10825_full =

== Summary - SUCCESS ==

  No regressions found.

  

== Known issues ==

  Here are the changes found in Patchwork_10825_full that come from known 
issues:

  === IGT changes ===

 Issues hit 

igt@gem_ctx_isolation@rcs0-s3:
  shard-skl:  PASS -> INCOMPLETE (fdo#107773, fdo#104108)

igt@gem_exec_schedule@pi-ringfull-bsd:
  shard-skl:  NOTRUN -> FAIL (fdo#103158)

igt@kms_atomic_transition@plane-all-modeset-transition:
  shard-hsw:  PASS -> DMESG-WARN (fdo#102614)

igt@kms_busy@extended-pageflip-hang-newfb-render-a:
  shard-apl:  PASS -> DMESG-WARN (fdo#107956)

igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
  shard-hsw:  PASS -> DMESG-WARN (fdo#107956)

igt@kms_color@pipe-a-ctm-0-75:
  shard-skl:  PASS -> FAIL (fdo#108682)

igt@kms_cursor_crc@cursor-256x256-onscreen:
  shard-skl:  PASS -> FAIL (fdo#103232)

igt@kms_cursor_crc@cursor-64x64-suspend:
  shard-skl:  PASS -> INCOMPLETE (fdo#104108)

igt@kms_flip@flip-vs-expired-vblank:
  shard-glk:  PASS -> FAIL (fdo#102887, fdo#105363)

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
  shard-glk:  PASS -> FAIL (fdo#103167) +1

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
  shard-apl:  PASS -> FAIL (fdo#103167) +1

igt@kms_frontbuffer_tracking@fbc-stridechange:
  shard-skl:  NOTRUN -> FAIL (fdo#105683)

igt@kms_plane@plane-position-covered-pipe-b-planes:
  shard-glk:  PASS -> FAIL (fdo#103166)

igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
  shard-skl:  NOTRUN -> FAIL (fdo#108145) +1

igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
  shard-skl:  PASS -> FAIL (fdo#107815)

igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
  shard-apl:  PASS -> FAIL (fdo#103166)

igt@pm_rpm@pc8-residency:
  shard-skl:  SKIP -> INCOMPLETE (fdo#107807)


 Possible fixes 

igt@drm_import_export@import-close-race-flink:
  shard-skl:  TIMEOUT (fdo#108667) -> PASS

igt@drv_suspend@shrink:
  shard-skl:  INCOMPLETE (fdo#106886) -> PASS

igt@kms_busy@extended-modeset-hang-newfb-render-a:
  shard-hsw:  DMESG-WARN (fdo#107956) -> PASS

igt@kms_busy@extended-modeset-hang-newfb-render-b:
  shard-snb:  DMESG-WARN (fdo#107956) -> PASS

igt@kms_busy@extended-pageflip-hang-newfb-render-c:
  shard-glk:  DMESG-WARN (fdo#107956) -> PASS

igt@kms_chv_cursor_fail@pipe-b-64x64-right-edge:
  shard-glk:  DMESG-FAIL (fdo#106538, fdo#104671) -> PASS

igt@kms_chv_cursor_fail@pipe-c-256x256-top-edge:
  shard-skl:  FAIL (fdo#104671) -> PASS

igt@kms_color@pipe-c-ctm-blue-to-red:
  shard-skl:  FAIL (fdo#107201) -> PASS

igt@kms_color@pipe-c-legacy-gamma:
  shard-apl:  FAIL (fdo#104782) -> PASS

igt@kms_cursor_crc@cursor-128x128-random:
  shard-apl:  FAIL (fdo#103232) -> PASS +1

igt@kms_flip@flip-vs-expired-vblank:
  shard-skl:  FAIL (fdo#105363) -> PASS

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
  shard-glk:  FAIL (fdo#103167) -> PASS

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
  shard-apl:  FAIL (fdo#103167) -> PASS +1

igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
  shard-skl:  FAIL (fdo#107815) -> PASS

igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
  shard-apl:  FAIL (fdo#103166) -> PASS +1

igt@kms_properties@connector-properties-legacy:
  shard-kbl:  DMESG-WARN (fdo#105345, fdo#103313) -> PASS

igt@kms_setmode@basic:
  shard-hsw:  FAIL (fdo#99912) -> PASS


  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
  fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
  fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
  fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
  fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671
  fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782
  fdo#105345 https://bugs.freedesktop.org/show_bug.cgi?id=105345
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105683 https://bugs.freedesktop.org/show_bug.cgi?id=105683
  

[Intel-gfx] [PATCH 1/3] drm/i915/bios: rename intel_aux_ch() to intel_bios_port_aux_ch()

2018-11-15 Thread Jani Nikula
Conform to function naming in intel_bios.c.

Cc: Imre Deak 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h   | 2 +-
 drivers/gpu/drm/i915/intel_bios.c | 3 ++-
 drivers/gpu/drm/i915/intel_ddi.c  | 2 +-
 drivers/gpu/drm/i915/intel_dp.c   | 2 +-
 drivers/gpu/drm/i915/intel_hdmi.c | 2 +-
 5 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5d686b585a95..8c6ca39feefc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3455,7 +3455,7 @@ bool intel_bios_is_port_hpd_inverted(struct 
drm_i915_private *dev_priv,
 enum port port);
 bool intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv,
enum port port);
-enum aux_ch intel_aux_ch(struct drm_i915_private *dev_priv, enum port port);
+enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, enum 
port port);
 
 /* intel_acpi.c */
 #ifdef CONFIG_ACPI
diff --git a/drivers/gpu/drm/i915/intel_bios.c 
b/drivers/gpu/drm/i915/intel_bios.c
index bd7b2da71419..0694aa8bb9bc 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -2191,7 +2191,8 @@ intel_bios_is_lspcon_present(struct drm_i915_private 
*dev_priv,
return false;
 }
 
-enum aux_ch intel_aux_ch(struct drm_i915_private *dev_priv, enum port port)
+enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
+  enum port port)
 {
const struct ddi_vbt_port_info *info =
_priv->vbt.ddi_port_info[port];
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 4913bbdac843..040483c96029 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -4119,7 +4119,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, 
enum port port)
(DDI_BUF_PORT_REVERSAL | DDI_A_4_LANES);
intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port);
-   intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
+   intel_dig_port->aux_ch = intel_bios_port_aux_ch(dev_priv, port);
 
switch (port) {
case PORT_A:
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2b090609bee2..7699f9b7b2d2 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -6745,7 +6745,7 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
if (port != PORT_A)
intel_infoframe_init(intel_dig_port);
 
-   intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
+   intel_dig_port->aux_ch = intel_bios_port_aux_ch(dev_priv, port);
if (!intel_dp_init_connector(intel_dig_port, intel_connector))
goto err_init_connector;
 
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
b/drivers/gpu/drm/i915/intel_hdmi.c
index bc5b945f9a71..e2c6a2b3e8f2 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -2520,6 +2520,6 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv,
 
intel_infoframe_init(intel_dig_port);
 
-   intel_dig_port->aux_ch = intel_aux_ch(dev_priv, port);
+   intel_dig_port->aux_ch = intel_bios_port_aux_ch(dev_priv, port);
intel_hdmi_init_connector(intel_dig_port, intel_connector);
 }
-- 
2.11.0

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[Intel-gfx] [PATCH 2/3] drm/i915: remove unused DDC PIN macros

2018-11-15 Thread Jani Nikula
Their user has vanished in the course of history. Remove.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8c6ca39feefc..d100c38697ff 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1060,10 +1060,6 @@ struct i915_gem_mm {
 #define DP_AUX_E 0x50
 #define DP_AUX_F 0x60
 
-#define DDC_PIN_B  0x05
-#define DDC_PIN_C  0x04
-#define DDC_PIN_D  0x06
-
 struct ddi_vbt_port_info {
int max_tmds_clock;
 
-- 
2.11.0

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[Intel-gfx] [PATCH 3/3] drm/i915/bios: make the aux channel macros private to the vbt parser

2018-11-15 Thread Jani Nikula
Hide the aux channel macros in intel_vbt_defs.h now that their use has
been abstracted in intel_bios_port_aux_ch().

Cc: Imre Deak 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h   | 7 ---
 drivers/gpu/drm/i915/intel_vbt_defs.h | 7 +++
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d100c38697ff..d69b71d368d3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1053,13 +1053,6 @@ struct i915_gem_mm {
 
 #define I915_ENGINE_WEDGED_TIMEOUT  (60 * HZ)  /* Reset but no recovery? */
 
-#define DP_AUX_A 0x40
-#define DP_AUX_B 0x10
-#define DP_AUX_C 0x20
-#define DP_AUX_D 0x30
-#define DP_AUX_E 0x50
-#define DP_AUX_F 0x60
-
 struct ddi_vbt_port_info {
int max_tmds_clock;
 
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/intel_vbt_defs.h
index bba98cf83cbd..bf3662ad5fed 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -326,6 +326,13 @@ enum vbt_gmbus_ddi {
ICL_DDC_BUS_PORT_4,
 };
 
+#define DP_AUX_A 0x40
+#define DP_AUX_B 0x10
+#define DP_AUX_C 0x20
+#define DP_AUX_D 0x30
+#define DP_AUX_E 0x50
+#define DP_AUX_F 0x60
+
 #define VBT_DP_MAX_LINK_RATE_HBR3  0
 #define VBT_DP_MAX_LINK_RATE_HBR2  1
 #define VBT_DP_MAX_LINK_RATE_HBR   2
-- 
2.11.0

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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915/bios: rename intel_aux_ch() to intel_bios_port_aux_ch()

2018-11-15 Thread Patchwork
== Series Details ==

Series: series starting with [1/3] drm/i915/bios: rename intel_aux_ch() to 
intel_bios_port_aux_ch()
URL   : https://patchwork.freedesktop.org/series/52525/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/bios: rename intel_aux_ch() to intel_bios_port_aux_ch()
Okay!

Commit: drm/i915: remove unused DDC PIN macros
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3716:16: warning: expression 
using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3712:16: warning: expression 
using sizeof(void)

Commit: drm/i915/bios: make the aux channel macros private to the vbt parser
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3712:16: warning: expression 
using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3705:16: warning: expression 
using sizeof(void)

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Re: [Intel-gfx] [PATCH] drm/i915: Fix plane allocation/free functions

2018-11-15 Thread Maarten Lankhorst
Op 13-11-18 om 15:02 schreef Ville Syrjälä:
> On Tue, Nov 13, 2018 at 10:28:04AM +0100, Maarten Lankhorst wrote:
>> Use intel_plane_destroy_state in intel_plane_free to free the state.
> Not entirely necessary since we have nothing in the state at that moment
> that would required to be freed separately. But seems more future proof
> anyway.
>
>> Also fix intel_plane_alloc() to use __drm_atomic_helper_plane_reset(),
>> to get sane defaults from the atomic core.
> Could mention the constant alpha specifically here since I think it
> was the only thing we didn't set ourselves.
>
> Reviewed-by: Ville Syrjälä 
>
>> Signed-off-by: Maarten Lankhorst 
>> Reported-by: Ville Syrjälä 
>> Cc: Ville Syrjälä 
>> Fixes: b20815255693 ("drm/i915: Add plane alpha blending support, v2.")
>> ---
>>  drivers/gpu/drm/i915/intel_atomic_plane.c | 40 ---
>>  drivers/gpu/drm/i915/intel_drv.h  |  5 ++-
>>  drivers/gpu/drm/i915/intel_sprite.c   | 29 
>>  3 files changed, 23 insertions(+), 51 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c 
>> b/drivers/gpu/drm/i915/intel_atomic_plane.c
>> index 7d3685075201..905f8ef3ba4f 100644
>> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
>> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
>> @@ -36,29 +36,31 @@
>>  #include 
>>  #include "intel_drv.h"
>>  
>> -/**
>> - * intel_create_plane_state - create plane state object
>> - * @plane: drm plane
>> - *
>> - * Allocates a fresh plane state for the given plane and sets some of
>> - * the state values to sensible initial values.
>> - *
>> - * Returns: A newly allocated plane state, or NULL on failure
>> - */
>> -struct intel_plane_state *
>> -intel_create_plane_state(struct drm_plane *plane)
>> +struct intel_plane *intel_plane_alloc(void)
>>  {
>> -struct intel_plane_state *state;
>> +struct intel_plane_state *plane_state;
>> +struct intel_plane *plane;
>>  
>> -state = kzalloc(sizeof(*state), GFP_KERNEL);
>> -if (!state)
>> -return NULL;
>> +plane = kzalloc(sizeof(*plane), GFP_KERNEL);
>> +if (!plane)
>> +return ERR_PTR(-ENOMEM);
>>  
>> -state->base.plane = plane;
>> -state->base.rotation = DRM_MODE_ROTATE_0;
>> -state->scaler_id = -1;
>> +plane_state = kzalloc(sizeof(*plane_state), GFP_KERNEL);
>> +if (!plane_state) {
>> +kfree(plane);
>> +return ERR_PTR(-ENOMEM);
>> +}
>>  
>> -return state;
>> +__drm_atomic_helper_plane_reset(>base, _state->base);
>> +plane_state->scaler_id = -1;
>> +
>> +return plane;
>> +}
>> +
>> +void intel_plane_free(struct intel_plane *plane)
>> +{
>> +intel_plane_destroy_state(>base, plane->base.state);
>> +kfree(plane);
>>  }
>>  
>>  /**
>> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
>> b/drivers/gpu/drm/i915/intel_drv.h
>> index 10a5df66e4eb..2a897e174ed5 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -2219,8 +2219,6 @@ void intel_pipe_update_end(struct intel_crtc_state 
>> *new_crtc_state);
>>  int intel_plane_check_stride(const struct intel_plane_state *plane_state);
>>  int intel_plane_check_src_coordinates(struct intel_plane_state 
>> *plane_state);
>>  int chv_plane_check_rotation(const struct intel_plane_state *plane_state);
>> -struct intel_plane *intel_plane_alloc(void);
>> -void intel_plane_free(struct intel_plane *plane);
>>  struct intel_plane *
>>  skl_universal_plane_create(struct drm_i915_private *dev_priv,
>> enum pipe pipe, enum plane_id plane_id);
>> @@ -2282,7 +2280,8 @@ int intel_atomic_setup_scalers(struct drm_i915_private 
>> *dev_priv,
>> struct intel_crtc_state *crtc_state);
>>  
>>  /* intel_atomic_plane.c */
>> -struct intel_plane_state *intel_create_plane_state(struct drm_plane *plane);
>> +struct intel_plane *intel_plane_alloc(void);
>> +void intel_plane_free(struct intel_plane *plane);
>>  struct drm_plane_state *intel_plane_duplicate_state(struct drm_plane 
>> *plane);
>>  void intel_plane_destroy_state(struct drm_plane *plane,
>> struct drm_plane_state *state);
>> diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
>> b/drivers/gpu/drm/i915/intel_sprite.c
>> index facf7ca8f14f..7db6d060efe7 100644
>> --- a/drivers/gpu/drm/i915/intel_sprite.c
>> +++ b/drivers/gpu/drm/i915/intel_sprite.c
>> @@ -1982,35 +1982,6 @@ static bool skl_plane_has_ccs(struct drm_i915_private 
>> *dev_priv,
>>   plane_id == PLANE_SPRITE0);
>>  }
>>  
>> -struct intel_plane *intel_plane_alloc(void)
>> -{
>> -struct intel_plane_state *plane_state;
>> -struct intel_plane *plane;
>> -
>> -plane = kzalloc(sizeof(*plane), GFP_KERNEL);
>> -if (!plane)
>> -return ERR_PTR(-ENOMEM);
>> -
>> -plane_state = intel_create_plane_state(>base);
>> -if (!plane_state) {
>> -kfree(plane);
>> -return ERR_PTR(-ENOMEM);
>> -}
>> -
>> -  

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Return immediately if trylock fails for direct-reclaim

2018-11-15 Thread Tvrtko Ursulin


On 13/11/2018 17:10, Chris Wilson wrote:

Quoting Tvrtko Ursulin (2018-11-13 10:24:43)


On 09/11/2018 11:44, Chris Wilson wrote:

Quoting Tvrtko Ursulin (2018-11-09 07:30:34)


On 08/11/2018 16:48, Chris Wilson wrote:

Quoting Tvrtko Ursulin (2018-11-08 16:23:08)


On 08/11/2018 08:17, Chris Wilson wrote:

Ignore trying to shrink from i915 if we fail to acquire the struct_mutex
in the shrinker while performing direct-reclaim. The trade-off being
(much) lower latency for non-i915 clients at an increased risk of being
unable to obtain a page from direct-reclaim without hitting the
oom-notifier. The proviso being that we still keep trying to hard
obtain the lock for oom so that we can reap under heavy memory pressure.

Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_gem_shrinker.c | 24 +++-
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c 
b/drivers/gpu/drm/i915/i915_gem_shrinker.c
index ea90d3a0d511..d461f458f4af 100644
--- a/drivers/gpu/drm/i915/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c
@@ -36,7 +36,9 @@
 #include "i915_drv.h"
 #include "i915_trace.h"
 
-static bool shrinker_lock(struct drm_i915_private *i915, bool *unlock)

+static bool shrinker_lock(struct drm_i915_private *i915,
+   unsigned int flags,
+   bool *unlock)
 {
 switch (mutex_trylock_recursive(>drm.struct_mutex)) {
 case MUTEX_TRYLOCK_RECURSIVE:
@@ -45,15 +47,11 @@ static bool shrinker_lock(struct drm_i915_private *i915, 
bool *unlock)
 
 case MUTEX_TRYLOCK_FAILED:

 *unlock = false;
- preempt_disable();
- do {
- cpu_relax();
- if (mutex_trylock(>drm.struct_mutex)) {
- *unlock = true;
- break;
- }
- } while (!need_resched());
- preempt_enable();
+ if (flags & I915_SHRINK_ACTIVE) {


So until I915_SHRINK_ACTIVE, which is the last ditch attempt to shrink
in the normal case (direct reclaim?) or oom, we bail out on the first
sign of struct mutex contention. Doesn't this make our shrinker much
less effective at runtime and why is that OK?


As I said, it's a tradeoff between blocking others for _several_
_seconds_ and making no progress and returning immediately and making no
progress. My argument is along the lines of if direct-reclaim is running
in another process and something else is engaged in the driver hopefully
the driver will be cleaning up as it goes along or else what remains is
active and won't be reaped anyway. If direct reclaim is failing, the
delay before trying the oom path is insignificant.


What was the rationale behind busy looping there btw?


Emulating the optimistic spin for mutex (my patches to expose it from
kernel/locking were kept hidden for public decency). My thinking was the
exact opposite to this patch, that direct reclaim was of paramount
importance and spending the time to try and ensure we grabbed the
struct_mutex to search for some pages to free was preferable.

It's just on the basis of looking at the actual syslatency and realising
the cause is this spinner, I want to swing the axe in other direction.

(There's probably a compromise, but honestly I'd prefer to sell the
struct_mutex free version of the shrinker first :)


Compared to
perhaps an alternative of micro-sleeps and trying a few times? I know it
would be opposite from what this patch is trying to achieve, I Just
don't had a good judgment on what makes most sense for the shrinker. Is
it better to perhaps try a little bit harder instead of giving up
immediately, but try a little bit harder in a softer way? Or that ends
up blocking the callers and has the same effect of making no progress?


Exactly. We can definitely measure the impact of the spinner on
unrelated processes, but detecting the premature allocation failure is
harder (we wait for more dmesg-warns). The compromise that I've tried to
reach here is that if direct-reclaim isn't enough, then we should still
try hard to grab the struct_mutex. (That leaves __GFP_RETRY_MAYFAIL
vulnerable to not shrinking i915, but a worthwhile compromise as it's
allowed to fail?)


Or in other words, for what use cases, tests or benchmark was the
existing approach of busy looping a problem?


Do something like 'find / -exec cat' while running i915 and see how long
you have to wait for a khungtaskd :|


I couldn't reproduce anything strange with this. Assuming you meant
something like -exec cat { } \; >dev/null.

Either case I think explanations like this should go into the commit
message.


Weird, I spent so long over the last few weeks talking about the impact
on gem_syslatency, I thought it was mentioned here.


gem_syslatency reports max latencies of over 600s, and I'm sure it's
pretty much 

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/bios: rename intel_aux_ch() to intel_bios_port_aux_ch()

2018-11-15 Thread Patchwork
== Series Details ==

Series: series starting with [1/3] drm/i915/bios: rename intel_aux_ch() to 
intel_bios_port_aux_ch()
URL   : https://patchwork.freedesktop.org/series/52525/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5141 -> Patchwork_10828 =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_10828 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10828, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/52525/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10828:

  === IGT changes ===

 Warnings 

igt@drv_selftest@live_guc:
  fi-skl-iommu:   SKIP -> PASS +1


== Known issues ==

  Here are the changes found in Patchwork_10828 that come from known issues:

  === IGT changes ===

 Issues hit 

igt@drv_selftest@live_contexts:
  fi-icl-u:   NOTRUN -> DMESG-FAIL (fdo#108569)

igt@drv_selftest@live_execlists:
  fi-apl-guc: PASS -> INCOMPLETE (fdo#103927)

igt@drv_selftest@live_hangcheck:
  fi-skl-guc: PASS -> DMESG-FAIL (fdo#108744, fdo#108593)

igt@kms_chamelium@common-hpd-after-suspend:
  fi-skl-6700k2:  PASS -> WARN (fdo#108680)

igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
  fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191)


 Possible fixes 

igt@drv_selftest@live_hangcheck:
  fi-skl-iommu:   INCOMPLETE (fdo#108602, fdo#108744) -> PASS

igt@gem_exec_suspend@basic-s3:
  fi-blb-e6850:   INCOMPLETE (fdo#107718) -> PASS

igt@kms_frontbuffer_tracking@basic:
  fi-hsw-peppy:   DMESG-WARN (fdo#102614) -> PASS
  fi-icl-u2:  FAIL (fdo#103167) -> PASS

igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
  fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS

igt@prime_vgem@basic-fence-flip:
  fi-gdg-551: FAIL (fdo#103182) -> PASS


  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103182 https://bugs.freedesktop.org/show_bug.cgi?id=103182
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  fdo#108569 https://bugs.freedesktop.org/show_bug.cgi?id=108569
  fdo#108593 https://bugs.freedesktop.org/show_bug.cgi?id=108593
  fdo#108602 https://bugs.freedesktop.org/show_bug.cgi?id=108602
  fdo#108680 https://bugs.freedesktop.org/show_bug.cgi?id=108680
  fdo#108744 https://bugs.freedesktop.org/show_bug.cgi?id=108744


== Participating hosts (51 -> 46) ==

  Additional (1): fi-icl-u 
  Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks 
fi-bsw-cyan fi-ctg-p8600 


== Build changes ==

* Linux: CI_DRM_5141 -> Patchwork_10828

  CI_DRM_5141: fcdadbabc3216aa16c6d8236d55c5e5c8261cc91 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10828: 3e4d914a16d1472873dbb2e3d8ff6c854118f16d @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

3e4d914a16d1 drm/i915/bios: make the aux channel macros private to the vbt 
parser
f2fa38668733 drm/i915: remove unused DDC PIN macros
bf30813eb674 drm/i915/bios: rename intel_aux_ch() to intel_bios_port_aux_ch()

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10828/issues.html
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Re: [Intel-gfx] [PATCH] drm/i915: remove excess line continuation backslashes

2018-11-15 Thread Jani Nikula
On Wed, 14 Nov 2018, Jani Nikula  wrote:
> On Wed, 14 Nov 2018, Ville Syrjälä  wrote:
>> On Wed, Nov 14, 2018 at 01:21:30PM +0200, Jani Nikula wrote:
>>> While removing .palette_offsets, I removed the commas after
>>> .trans_offsets in the macros, but failed to remove the line continuation
>>> backslashes.
>>> 
>>> While at it, also remove another extra comma to be in line with the
>>> other related macros.
>>
>> In general I like having the comma after the last element in an
>> array/enum/whatever. In this case it doesn't really matter, but
>> in cases like
>>
>>   enum {
>>  yes,
>>  no,
>> +maybe,
>>   };
>>
>> it will result in a cleaner diff.
>
> Totally agreed; it just doesn't make a difference here, and none of the
> other places here have it, so off it goes.
>
>> Anyways, patch is
>> Reviewed-by: Ville Syrjälä 
>
> Thanks. /me looks at CI expectantly.

And pushed.

>
> BR,
> Jani.
>
>>
>>> 
>>> Fixes: 74c1e826427a ("drm/i915: remove palette_offsets from device info in 
>>> favor of _PICK()")
>>> Cc: Ville Syrjälä 
>>> Signed-off-by: Jani Nikula 
>>> ---
>>>  drivers/gpu/drm/i915/i915_pci.c | 4 ++--
>>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>> 
>>> diff --git a/drivers/gpu/drm/i915/i915_pci.c 
>>> b/drivers/gpu/drm/i915/i915_pci.c
>>> index 4ccab8372dd4..983ae7fd8217 100644
>>> --- a/drivers/gpu/drm/i915/i915_pci.c
>>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>>> @@ -36,13 +36,13 @@
>>> .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, \
>>>   PIPE_C_OFFSET, PIPE_EDP_OFFSET }, \
>>> .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
>>> -  TRANSCODER_C_OFFSET, TRANSCODER_EDP_OFFSET } \
>>> +  TRANSCODER_C_OFFSET, TRANSCODER_EDP_OFFSET }
>>>  
>>>  #define GEN_CHV_PIPEOFFSETS \
>>> .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, \
>>>   CHV_PIPE_C_OFFSET }, \
>>> .trans_offsets = { TRANSCODER_A_OFFSET, TRANSCODER_B_OFFSET, \
>>> -  CHV_TRANSCODER_C_OFFSET, } \
>>> +  CHV_TRANSCODER_C_OFFSET }
>>>  
>>>  #define CURSOR_OFFSETS \
>>> .cursor_offsets = { CURSOR_A_OFFSET, CURSOR_B_OFFSET, 
>>> CHV_CURSOR_C_OFFSET }
>>> -- 
>>> 2.11.0

-- 
Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] [PATCH 5/5] drm/i915/fixed: cosmetic cleanup

2018-11-15 Thread Jani Nikula
Clean up fixed point temp variable initialization, use the more
conventional tmp name for temp variables, add empty lines before
return. No functional changes.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_fixed.h | 77 +--
 1 file changed, 41 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_fixed.h 
b/drivers/gpu/drm/i915/i915_fixed.h
index 524f1c95c4e1..a7a3eacd255e 100644
--- a/drivers/gpu/drm/i915/i915_fixed.h
+++ b/drivers/gpu/drm/i915/i915_fixed.h
@@ -16,11 +16,10 @@ static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
 
 static inline uint_fixed_16_16_t u32_to_fixed16(u32 val)
 {
-   uint_fixed_16_16_t fp;
+   uint_fixed_16_16_t fp = { .val = val << 16 };
 
WARN_ON(val > U16_MAX);
 
-   fp.val = val << 16;
return fp;
 }
 
@@ -37,26 +36,25 @@ static inline u32 fixed16_to_u32(uint_fixed_16_16_t fp)
 static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1,
 uint_fixed_16_16_t min2)
 {
-   uint_fixed_16_16_t min;
+   uint_fixed_16_16_t min = { .val = min(min1.val, min2.val) };
 
-   min.val = min(min1.val, min2.val);
return min;
 }
 
 static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1,
 uint_fixed_16_16_t max2)
 {
-   uint_fixed_16_16_t max;
+   uint_fixed_16_16_t max = { .val = max(max1.val, max2.val) };
 
-   max.val = max(max1.val, max2.val);
return max;
 }
 
 static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val)
 {
-   uint_fixed_16_16_t fp;
+   uint_fixed_16_16_t fp = { .val = (u32)val };
+
WARN_ON(val > U32_MAX);
-   fp.val = (u32)val;
+
return fp;
 }
 
@@ -68,66 +66,73 @@ static inline u32 div_round_up_fixed16(uint_fixed_16_16_t 
val,
 
 static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul)
 {
-   u64 intermediate_val;
+   u64 tmp;
+
+   tmp = (u64)val * mul.val;
+   tmp = DIV_ROUND_UP_ULL(tmp, 1 << 16);
+   WARN_ON(tmp > U32_MAX);
 
-   intermediate_val = (u64)val * mul.val;
-   intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
-   WARN_ON(intermediate_val > U32_MAX);
-   return (u32)intermediate_val;
+   return (u32)tmp;
 }
 
 static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
 uint_fixed_16_16_t mul)
 {
-   u64 intermediate_val;
+   u64 tmp;
 
-   intermediate_val = (u64)val.val * mul.val;
-   intermediate_val = intermediate_val >> 16;
-   return clamp_u64_to_fixed16(intermediate_val);
+   tmp = (u64)val.val * mul.val;
+   tmp = tmp >> 16;
+
+   return clamp_u64_to_fixed16(tmp);
 }
 
 static inline uint_fixed_16_16_t div_fixed16(u32 val, u32 d)
 {
-   u64 interm_val;
+   u64 tmp;
+
+   tmp = (u64)val << 16;
+   tmp = DIV_ROUND_UP_ULL(tmp, d);
 
-   interm_val = (u64)val << 16;
-   interm_val = DIV_ROUND_UP_ULL(interm_val, d);
-   return clamp_u64_to_fixed16(interm_val);
+   return clamp_u64_to_fixed16(tmp);
 }
 
 static inline u32 div_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t d)
 {
-   u64 interm_val;
+   u64 tmp;
 
-   interm_val = (u64)val << 16;
-   interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
-   WARN_ON(interm_val > U32_MAX);
-   return (u32)interm_val;
+   tmp = (u64)val << 16;
+   tmp = DIV_ROUND_UP_ULL(tmp, d.val);
+   WARN_ON(tmp > U32_MAX);
+
+   return (u32)tmp;
 }
 
 static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t 
mul)
 {
-   u64 intermediate_val;
+   u64 tmp;
+
+   tmp = (u64)val * mul.val;
 
-   intermediate_val = (u64)val * mul.val;
-   return clamp_u64_to_fixed16(intermediate_val);
+   return clamp_u64_to_fixed16(tmp);
 }
 
 static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
 uint_fixed_16_16_t add2)
 {
-   u64 interm_sum;
+   u64 tmp;
 
-   interm_sum = (u64)add1.val + add2.val;
-   return clamp_u64_to_fixed16(interm_sum);
+   tmp = (u64)add1.val + add2.val;
+
+   return clamp_u64_to_fixed16(tmp);
 }
 
 static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
 u32 add2)
 {
-   u64 interm_sum;
-   uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2);
+   uint_fixed_16_16_t tmp_add2 = u32_to_fixed16(add2);
+   u64 tmp;
+
+   tmp = (u64)add1.val + tmp_add2.val;
 
-   interm_sum = (u64)add1.val + interm_add2.val;
-   return clamp_u64_to_fixed16(interm_sum);
+   return clamp_u64_to_fixed16(tmp);
 }
-- 
2.11.0

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[Intel-gfx] [PATCH 2/5] drm/i915/fixed: prefer kernel types over stdint types

2018-11-15 Thread Jani Nikula
While at it, conform to kernel spacing (i.e. no space) after cast. No
functional changes.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_fixed.h | 61 +++
 1 file changed, 29 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_fixed.h 
b/drivers/gpu/drm/i915/i915_fixed.h
index cfeff89fa38a..08316e50167a 100644
--- a/drivers/gpu/drm/i915/i915_fixed.h
+++ b/drivers/gpu/drm/i915/i915_fixed.h
@@ -4,7 +4,7 @@
  */
 
 typedef struct {
-   uint32_t val;
+   u32 val;
 } uint_fixed_16_16_t;
 
 #define FP_16_16_MAX ({ \
@@ -20,7 +20,7 @@ static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
return false;
 }
 
-static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
+static inline uint_fixed_16_16_t u32_to_fixed16(u32 val)
 {
uint_fixed_16_16_t fp;
 
@@ -30,12 +30,12 @@ static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t 
val)
return fp;
 }
 
-static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
+static inline u32 fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
 {
return DIV_ROUND_UP(fp.val, 1 << 16);
 }
 
-static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp)
+static inline u32 fixed16_to_u32(uint_fixed_16_16_t fp)
 {
return fp.val >> 16;
 }
@@ -58,85 +58,82 @@ static inline uint_fixed_16_16_t 
max_fixed16(uint_fixed_16_16_t max1,
return max;
 }
 
-static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
+static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val)
 {
uint_fixed_16_16_t fp;
WARN_ON(val > U32_MAX);
-   fp.val = (uint32_t) val;
+   fp.val = (u32)val;
return fp;
 }
 
-static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
-   uint_fixed_16_16_t d)
+static inline u32 div_round_up_fixed16(uint_fixed_16_16_t val,
+  uint_fixed_16_16_t d)
 {
return DIV_ROUND_UP(val.val, d.val);
 }
 
-static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
-   uint_fixed_16_16_t mul)
+static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul)
 {
-   uint64_t intermediate_val;
+   u64 intermediate_val;
 
-   intermediate_val = (uint64_t) val * mul.val;
+   intermediate_val = (u64)val * mul.val;
intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
WARN_ON(intermediate_val > U32_MAX);
-   return (uint32_t) intermediate_val;
+   return (u32)intermediate_val;
 }
 
 static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
 uint_fixed_16_16_t mul)
 {
-   uint64_t intermediate_val;
+   u64 intermediate_val;
 
-   intermediate_val = (uint64_t) val.val * mul.val;
+   intermediate_val = (u64)val.val * mul.val;
intermediate_val = intermediate_val >> 16;
return clamp_u64_to_fixed16(intermediate_val);
 }
 
-static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)
+static inline uint_fixed_16_16_t div_fixed16(u32 val, u32 d)
 {
-   uint64_t interm_val;
+   u64 interm_val;
 
-   interm_val = (uint64_t)val << 16;
+   interm_val = (u64)val << 16;
interm_val = DIV_ROUND_UP_ULL(interm_val, d);
return clamp_u64_to_fixed16(interm_val);
 }
 
-static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
-   uint_fixed_16_16_t d)
+static inline u32 div_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t d)
 {
-   uint64_t interm_val;
+   u64 interm_val;
 
-   interm_val = (uint64_t)val << 16;
+   interm_val = (u64)val << 16;
interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
WARN_ON(interm_val > U32_MAX);
-   return (uint32_t) interm_val;
+   return (u32)interm_val;
 }
 
-static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,
-uint_fixed_16_16_t mul)
+static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t 
mul)
 {
-   uint64_t intermediate_val;
+   u64 intermediate_val;
 
-   intermediate_val = (uint64_t) val * mul.val;
+   intermediate_val = (u64)val * mul.val;
return clamp_u64_to_fixed16(intermediate_val);
 }
 
 static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
 uint_fixed_16_16_t add2)
 {
-   uint64_t interm_sum;
+   u64 interm_sum;
 
-   interm_sum = (uint64_t) add1.val + add2.val;
+   interm_sum = (u64)add1.val + add2.val;
return clamp_u64_to_fixed16(interm_sum);
 }
 
 static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
-uint32_t add2)
+u32 add2)
 {
-   uint64_t interm_sum;
+   u64 interm_sum;

[Intel-gfx] [PATCH 1/5] drm/i915: extract fixed point math to i915_fixed.h

2018-11-15 Thread Jani Nikula
Reduce bloat in one of the bigger header files. Fix some indentation
while at it. No functional changes.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h   | 139 +
 drivers/gpu/drm/i915/i915_fixed.h | 142 ++
 2 files changed, 143 insertions(+), 138 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_fixed.h

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5d686b585a95..9ef675428295 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -54,6 +54,7 @@
 #include 
 #include 
 
+#include "i915_fixed.h"
 #include "i915_params.h"
 #include "i915_reg.h"
 #include "i915_utils.h"
@@ -127,144 +128,6 @@ bool i915_error_injected(void);
__i915_printk(i915, i915_error_injected() ? KERN_DEBUG : KERN_ERR, \
  fmt, ##__VA_ARGS__)
 
-typedef struct {
-   uint32_t val;
-} uint_fixed_16_16_t;
-
-#define FP_16_16_MAX ({ \
-   uint_fixed_16_16_t fp; \
-   fp.val = UINT_MAX; \
-   fp; \
-})
-
-static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
-{
-   if (val.val == 0)
-   return true;
-   return false;
-}
-
-static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val)
-{
-   uint_fixed_16_16_t fp;
-
-   WARN_ON(val > U16_MAX);
-
-   fp.val = val << 16;
-   return fp;
-}
-
-static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp)
-{
-   return DIV_ROUND_UP(fp.val, 1 << 16);
-}
-
-static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp)
-{
-   return fp.val >> 16;
-}
-
-static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1,
-uint_fixed_16_16_t min2)
-{
-   uint_fixed_16_16_t min;
-
-   min.val = min(min1.val, min2.val);
-   return min;
-}
-
-static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1,
-uint_fixed_16_16_t max2)
-{
-   uint_fixed_16_16_t max;
-
-   max.val = max(max1.val, max2.val);
-   return max;
-}
-
-static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
-{
-   uint_fixed_16_16_t fp;
-   WARN_ON(val > U32_MAX);
-   fp.val = (uint32_t) val;
-   return fp;
-}
-
-static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
-   uint_fixed_16_16_t d)
-{
-   return DIV_ROUND_UP(val.val, d.val);
-}
-
-static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
-   uint_fixed_16_16_t mul)
-{
-   uint64_t intermediate_val;
-
-   intermediate_val = (uint64_t) val * mul.val;
-   intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
-   WARN_ON(intermediate_val > U32_MAX);
-   return (uint32_t) intermediate_val;
-}
-
-static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
-uint_fixed_16_16_t mul)
-{
-   uint64_t intermediate_val;
-
-   intermediate_val = (uint64_t) val.val * mul.val;
-   intermediate_val = intermediate_val >> 16;
-   return clamp_u64_to_fixed16(intermediate_val);
-}
-
-static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d)
-{
-   uint64_t interm_val;
-
-   interm_val = (uint64_t)val << 16;
-   interm_val = DIV_ROUND_UP_ULL(interm_val, d);
-   return clamp_u64_to_fixed16(interm_val);
-}
-
-static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
-   uint_fixed_16_16_t d)
-{
-   uint64_t interm_val;
-
-   interm_val = (uint64_t)val << 16;
-   interm_val = DIV_ROUND_UP_ULL(interm_val, d.val);
-   WARN_ON(interm_val > U32_MAX);
-   return (uint32_t) interm_val;
-}
-
-static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val,
-uint_fixed_16_16_t mul)
-{
-   uint64_t intermediate_val;
-
-   intermediate_val = (uint64_t) val * mul.val;
-   return clamp_u64_to_fixed16(intermediate_val);
-}
-
-static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1,
-uint_fixed_16_16_t add2)
-{
-   uint64_t interm_sum;
-
-   interm_sum = (uint64_t) add1.val + add2.val;
-   return clamp_u64_to_fixed16(interm_sum);
-}
-
-static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1,
-uint32_t add2)
-{
-   uint64_t interm_sum;
-   uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2);
-
-   interm_sum = (uint64_t) add1.val + interm_add2.val;
-   return clamp_u64_to_fixed16(interm_sum);
-}
-
 enum hpd_pin {
HPD_NONE = 0,
HPD_TV = HPD_NONE, /* TV is known to be unreliable */
diff --git a/drivers/gpu/drm/i915/i915_fixed.h 
b/drivers/gpu/drm/i915/i915_fixed.h
new file mode 

[Intel-gfx] [PATCH 4/5] drm/i915/fixed: simplify is_fixed16_zero()

2018-11-15 Thread Jani Nikula
Simply return the condition. No functional changes.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_fixed.h | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_fixed.h 
b/drivers/gpu/drm/i915/i915_fixed.h
index 927c59395569..524f1c95c4e1 100644
--- a/drivers/gpu/drm/i915/i915_fixed.h
+++ b/drivers/gpu/drm/i915/i915_fixed.h
@@ -11,9 +11,7 @@ typedef struct {
 
 static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
 {
-   if (val.val == 0)
-   return true;
-   return false;
+   return val.val == 0;
 }
 
 static inline uint_fixed_16_16_t u32_to_fixed16(u32 val)
-- 
2.11.0

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[Intel-gfx] [PATCH 3/5] drm/i915/fixed: simplify FP_16_16_MAX definition

2018-11-15 Thread Jani Nikula
No need to use a compound statement enclosed in parenthesis where a C99
compound literal will do. No functional changes.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_fixed.h | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_fixed.h 
b/drivers/gpu/drm/i915/i915_fixed.h
index 08316e50167a..927c59395569 100644
--- a/drivers/gpu/drm/i915/i915_fixed.h
+++ b/drivers/gpu/drm/i915/i915_fixed.h
@@ -7,11 +7,7 @@ typedef struct {
u32 val;
 } uint_fixed_16_16_t;
 
-#define FP_16_16_MAX ({ \
-   uint_fixed_16_16_t fp; \
-   fp.val = UINT_MAX; \
-   fp; \
-})
+#define FP_16_16_MAX ((uint_fixed_16_16_t){ .val = UINT_MAX })
 
 static inline bool is_fixed16_zero(uint_fixed_16_16_t val)
 {
-- 
2.11.0

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Re: [Intel-gfx] [PATCH v2 13/13] drm/i915: Pass the plane to icl_program_input_csc_coeff()

2018-11-15 Thread Maarten Lankhorst
Op 14-11-18 om 22:07 schreef Ville Syrjala:
> From: Ville Syrjälä 
>
> On icl+ the plane state that gets passed to update_slave() is not
> the plane state of the plane we're programming. With NV12 the
> plane state would be coming from the master (UV) plane whereas
> the plane we're programming is the slave (Y) plane. For that reason
> we need to explicitly pass around the slave plane (or we'd have to
> otherwise deduce it by checking whether we were called via
> .update_plane() or .update_slave()).
>
> In the case of icl_program_input_csc_coeff() it's actually OK to
> assume that we are always the master plane because the input CSC
> only exists on HDR planes which can never be a slave plane. But
> for consistency let's pass in the plane explicitly anyway.
>
> While at it drop the "_coeff" from the function name since it's
> kinda redundant, and this makes the name a bit shorter :)
>
> Cc: Uma Shankar 
> Cc: Maarten Lankhorst 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/intel_sprite.c | 14 ++
>  1 file changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
> b/drivers/gpu/drm/i915/intel_sprite.c
> index 0262159e7084..ee4c37a613f7 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -373,14 +373,12 @@ skl_program_scaler(struct intel_plane *plane,
>  #define  BOFF(x)  (((x) & 0x) << 16)
>  
>  static void
> -icl_program_input_csc_coeff(const struct intel_crtc_state *crtc_state,
> - const struct intel_plane_state *plane_state)
> +icl_program_input_csc(struct intel_plane *plane,
> +   const struct intel_crtc_state *crtc_state,
> +   const struct intel_plane_state *plane_state)
>  {
> - struct drm_i915_private *dev_priv =
> - to_i915(plane_state->base.plane->dev);
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
> - enum pipe pipe = crtc->pipe;
> - struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
> + struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> + enum pipe pipe = plane->pipe;
>   enum plane_id plane_id = plane->id;
>  
>   static const u16 input_csc_matrix[][9] = {
> @@ -540,7 +538,7 @@ skl_program_plane(struct intel_plane *plane,
> plane_state->color_ctl);
>  
>   if (fb->format->is_yuv && icl_is_hdr_plane(plane))
> - icl_program_input_csc_coeff(crtc_state, plane_state);
> + icl_program_input_csc(plane, crtc_state, plane_state);
>  
>   skl_write_plane_wm(plane, crtc_state);
>  

Whole series looks good to me.

Reviewed-by: Maarten Lankhorst 

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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/bios: rename intel_aux_ch() to intel_bios_port_aux_ch()

2018-11-15 Thread Patchwork
== Series Details ==

Series: series starting with [1/3] drm/i915/bios: rename intel_aux_ch() to 
intel_bios_port_aux_ch()
URL   : https://patchwork.freedesktop.org/series/52525/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5141_full -> Patchwork_10828_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_10828_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10828_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in 
Patchwork_10828_full:

  === IGT changes ===

 Warnings 

igt@pm_rc6_residency@rc6-accuracy:
  shard-kbl:  PASS -> SKIP


== Known issues ==

  Here are the changes found in Patchwork_10828_full that come from known 
issues:

  === IGT changes ===

 Issues hit 

igt@gem_ppgtt@blt-vs-render-ctxn:
  shard-skl:  NOTRUN -> TIMEOUT (fdo#108039)

igt@gem_userptr_blits@readonly-unsync:
  shard-apl:  PASS -> INCOMPLETE (fdo#103927) +1

igt@kms_busy@extended-pageflip-hang-newfb-render-a:
  shard-glk:  PASS -> DMESG-WARN (fdo#107956)

igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
  shard-skl:  NOTRUN -> DMESG-WARN (fdo#107956)

igt@kms_chv_cursor_fail@pipe-b-64x64-right-edge:
  shard-glk:  PASS -> DMESG-FAIL (fdo#104671, fdo#106538)

igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
  shard-glk:  PASS -> FAIL (fdo#105363) +1

igt@kms_flip@flip-vs-expired-vblank:
  shard-skl:  PASS -> FAIL (fdo#105363)

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
  shard-apl:  PASS -> FAIL (fdo#103167)

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
  shard-glk:  PASS -> FAIL (fdo#103167) +1

igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
  shard-skl:  NOTRUN -> FAIL (fdo#103167)

igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
  shard-apl:  PASS -> FAIL (fdo#103166) +2


 Possible fixes 

igt@gem_userptr_blits@readonly-unsync:
  shard-skl:  INCOMPLETE (fdo#108074) -> PASS

igt@kms_chv_cursor_fail@pipe-c-256x256-top-edge:
  shard-skl:  FAIL (fdo#104671) -> PASS

igt@kms_color@pipe-c-ctm-blue-to-red:
  shard-skl:  FAIL (fdo#107201) -> PASS

igt@kms_cursor_legacy@long-nonblocking-modeset-vs-cursor-atomic:
  shard-hsw:  DMESG-WARN (fdo#102614) -> PASS

igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
  shard-apl:  FAIL (fdo#103167) -> PASS

igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
  shard-glk:  FAIL (fdo#103166) -> PASS +2

igt@pm_rpm@system-suspend:
  shard-skl:  INCOMPLETE (fdo#104108, fdo#107807, fdo#107773) -> 
PASS


  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
  fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
  fdo#107201 https://bugs.freedesktop.org/show_bug.cgi?id=107201
  fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
  fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
  fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956
  fdo#108039 https://bugs.freedesktop.org/show_bug.cgi?id=108039
  fdo#108074 https://bugs.freedesktop.org/show_bug.cgi?id=108074


== Participating hosts (6 -> 6) ==

  No changes in participating hosts


== Build changes ==

* Linux: CI_DRM_5141 -> Patchwork_10828

  CI_DRM_5141: fcdadbabc3216aa16c6d8236d55c5e5c8261cc91 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4714: cab148ca3ec904a94d0cd43476cf7e1f8663f906 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10828: 3e4d914a16d1472873dbb2e3d8ff6c854118f16d @ 
git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ 
git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10828/shards.html
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915: extract fixed point math to i915_fixed.h

2018-11-15 Thread Patchwork
== Series Details ==

Series: series starting with [1/5] drm/i915: extract fixed point math to 
i915_fixed.h
URL   : https://patchwork.freedesktop.org/series/52528/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
6a9582cd3a2e drm/i915: extract fixed point math to i915_fixed.h
-:169: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#169: 
new file mode 100644

-:179: WARNING:NEW_TYPEDEFS: do not add new typedefs
#179: FILE: drivers/gpu/drm/i915/i915_fixed.h:6:
+typedef struct {

-:237: WARNING:LINE_SPACING: Missing a blank line after declarations
#237: FILE: drivers/gpu/drm/i915/i915_fixed.h:64:
+   uint_fixed_16_16_t fp;
+   WARN_ON(val > U32_MAX);

-:238: CHECK:SPACING: No space is necessary after a cast
#238: FILE: drivers/gpu/drm/i915/i915_fixed.h:65:
+   fp.val = (uint32_t) val;

-:253: CHECK:SPACING: No space is necessary after a cast
#253: FILE: drivers/gpu/drm/i915/i915_fixed.h:80:
+   intermediate_val = (uint64_t) val * mul.val;

-:256: CHECK:SPACING: No space is necessary after a cast
#256: FILE: drivers/gpu/drm/i915/i915_fixed.h:83:
+   return (uint32_t) intermediate_val;

-:264: CHECK:SPACING: No space is necessary after a cast
#264: FILE: drivers/gpu/drm/i915/i915_fixed.h:91:
+   intermediate_val = (uint64_t) val.val * mul.val;

-:286: CHECK:SPACING: No space is necessary after a cast
#286: FILE: drivers/gpu/drm/i915/i915_fixed.h:113:
+   return (uint32_t) interm_val;

-:294: CHECK:SPACING: No space is necessary after a cast
#294: FILE: drivers/gpu/drm/i915/i915_fixed.h:121:
+   intermediate_val = (uint64_t) val * mul.val;

-:303: CHECK:SPACING: No space is necessary after a cast
#303: FILE: drivers/gpu/drm/i915/i915_fixed.h:130:
+   interm_sum = (uint64_t) add1.val + add2.val;

-:313: CHECK:SPACING: No space is necessary after a cast
#313: FILE: drivers/gpu/drm/i915/i915_fixed.h:140:
+   interm_sum = (uint64_t) add1.val + interm_add2.val;

total: 0 errors, 3 warnings, 8 checks, 293 lines checked
972f5010d577 drm/i915/fixed: prefer kernel types over stdint types
23dc0f69fbfe drm/i915/fixed: simplify FP_16_16_MAX definition
f26dbee44029 drm/i915/fixed: simplify is_fixed16_zero()
7abd76bd22f0 drm/i915/fixed: cosmetic cleanup

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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/5] drm/i915: extract fixed point math to i915_fixed.h

2018-11-15 Thread Patchwork
== Series Details ==

Series: series starting with [1/5] drm/i915: extract fixed point math to 
i915_fixed.h
URL   : https://patchwork.freedesktop.org/series/52528/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: extract fixed point math to i915_fixed.h
-O:drivers/gpu/drm/i915/i915_drv.h:172:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:172:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:172:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:172:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_drv.h:181:19: warning: expression using 
sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:48:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:48:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:48:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:48:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:57:19: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3716:16: warning: expression 
using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3579:16: warning: expression 
using sizeof(void)

Commit: drm/i915/fixed: prefer kernel types over stdint types
Okay!

Commit: drm/i915/fixed: simplify FP_16_16_MAX definition
Okay!

Commit: drm/i915/fixed: simplify is_fixed16_zero()
Okay!

Commit: drm/i915/fixed: cosmetic cleanup
-O:drivers/gpu/drm/i915/i915_fixed.h:42:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:42:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:42:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:42:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
-O:drivers/gpu/drm/i915/i915_fixed.h:51:19: warning: expression using 
sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:39:43: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:39:43: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:39:43: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_fixed.h:39:43: warning: 

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: extract fixed point math to i915_fixed.h

2018-11-15 Thread Patchwork
== Series Details ==

Series: series starting with [1/5] drm/i915: extract fixed point math to 
i915_fixed.h
URL   : https://patchwork.freedesktop.org/series/52528/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5142 -> Patchwork_10829 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: 
https://patchwork.freedesktop.org/api/1.0/series/52528/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10829 that come from known issues:

  === IGT changes ===

 Issues hit 

igt@drv_selftest@live_contexts:
  fi-icl-u:   NOTRUN -> INCOMPLETE (fdo#108315)

igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
  fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362)

igt@kms_pipe_crc_basic@read-crc-pipe-b:
  fi-byt-clapper: PASS -> FAIL (fdo#107362)


 Possible fixes 

igt@drv_module_reload@basic-reload:
  fi-blb-e6850:   INCOMPLETE (fdo#107718) -> PASS

igt@drv_selftest@live_hangcheck:
  fi-skl-guc: DMESG-FAIL (fdo#108744, fdo#108593) -> PASS
  fi-bwr-2160:DMESG-FAIL (fdo#108735) -> PASS

igt@kms_frontbuffer_tracking@basic:
  fi-hsw-peppy:   DMESG-WARN (fdo#102614) -> PASS

igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
  fi-byt-clapper: FAIL (fdo#107362) -> PASS


  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  fdo#108315 https://bugs.freedesktop.org/show_bug.cgi?id=108315
  fdo#108593 https://bugs.freedesktop.org/show_bug.cgi?id=108593
  fdo#108735 https://bugs.freedesktop.org/show_bug.cgi?id=108735
  fdo#108744 https://bugs.freedesktop.org/show_bug.cgi?id=108744


== Participating hosts (48 -> 46) ==

  Additional (4): fi-byt-j1900 fi-glk-j4005 fi-icl-u fi-pnv-d510 
  Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan 
fi-ctg-p8600 fi-cfl-s3 


== Build changes ==

* Linux: CI_DRM_5142 -> Patchwork_10829

  CI_DRM_5142: 529058ece9a1c2cf9428deff766a4e236580d8b0 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4715: 111593c49d812a4f4ff9ab0ef053a3ab88a6f73f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10829: 7abd76bd22f01fbdaa6d09e1edddaff5a9f791fb @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

7abd76bd22f0 drm/i915/fixed: cosmetic cleanup
f26dbee44029 drm/i915/fixed: simplify is_fixed16_zero()
23dc0f69fbfe drm/i915/fixed: simplify FP_16_16_MAX definition
972f5010d577 drm/i915/fixed: prefer kernel types over stdint types
6a9582cd3a2e drm/i915: extract fixed point math to i915_fixed.h

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10829/issues.html
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