Re: [Intel-gfx] [PATCH] drm/ttm: replace busy placement with flags v2
Hi Somalapuram,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Somalapuram-Amaranath/drm-ttm-replace-busy-placement-with-flags-v2/20231109-104055
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:
https://lore.kernel.org/r/20231109023843.32326-1-Amaranath.Somalapuram%40amd.com
patch subject: [Intel-gfx] [PATCH] drm/ttm: replace busy placement with flags v2
config: arc-randconfig-001-20231109
(https://download.01.org/0day-ci/archive/20231109/202311091529.kil0h6z5-...@intel.com/config)
compiler: arc-elf-gcc (GCC) 13.2.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20231109/202311091529.kil0h6z5-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202311091529.kil0h6z5-...@intel.com/
All errors (new ones prefixed by >>):
drivers/gpu/drm/loongson/lsdc_ttm.c: In function 'lsdc_bo_set_placement':
>> drivers/gpu/drm/loongson/lsdc_ttm.c:57:24: error: 'struct ttm_placement' has
>> no member named 'busy_placement'; did you mean 'num_placement'?
57 | lbo->placement.busy_placement = lbo->placements;
|^~
|num_placement
>> drivers/gpu/drm/loongson/lsdc_ttm.c:80:24: error: 'struct ttm_placement' has
>> no member named 'num_busy_placement'; did you mean 'num_placement'?
80 | lbo->placement.num_busy_placement = c;
|^~
|num_placement
vim +57 drivers/gpu/drm/loongson/lsdc_ttm.c
f39db26c54281d Sui Jingfeng 2023-06-15 46
f39db26c54281d Sui Jingfeng 2023-06-15 47 static void
lsdc_bo_set_placement(struct lsdc_bo *lbo, u32 domain)
f39db26c54281d Sui Jingfeng 2023-06-15 48 {
f39db26c54281d Sui Jingfeng 2023-06-15 49 u32 c = 0;
f39db26c54281d Sui Jingfeng 2023-06-15 50 u32 pflags = 0;
f39db26c54281d Sui Jingfeng 2023-06-15 51 u32 i;
f39db26c54281d Sui Jingfeng 2023-06-15 52
f39db26c54281d Sui Jingfeng 2023-06-15 53 if (lbo->tbo.base.size <=
PAGE_SIZE)
f39db26c54281d Sui Jingfeng 2023-06-15 54 pflags |=
TTM_PL_FLAG_TOPDOWN;
f39db26c54281d Sui Jingfeng 2023-06-15 55
f39db26c54281d Sui Jingfeng 2023-06-15 56 lbo->placement.placement =
lbo->placements;
f39db26c54281d Sui Jingfeng 2023-06-15 @57 lbo->placement.busy_placement =
lbo->placements;
f39db26c54281d Sui Jingfeng 2023-06-15 58
f39db26c54281d Sui Jingfeng 2023-06-15 59 if (domain &
LSDC_GEM_DOMAIN_VRAM) {
f39db26c54281d Sui Jingfeng 2023-06-15 60
lbo->placements[c].mem_type = TTM_PL_VRAM;
f39db26c54281d Sui Jingfeng 2023-06-15 61
lbo->placements[c++].flags = pflags;
f39db26c54281d Sui Jingfeng 2023-06-15 62 }
f39db26c54281d Sui Jingfeng 2023-06-15 63
f39db26c54281d Sui Jingfeng 2023-06-15 64 if (domain &
LSDC_GEM_DOMAIN_GTT) {
f39db26c54281d Sui Jingfeng 2023-06-15 65
lbo->placements[c].mem_type = TTM_PL_TT;
f39db26c54281d Sui Jingfeng 2023-06-15 66
lbo->placements[c++].flags = pflags;
f39db26c54281d Sui Jingfeng 2023-06-15 67 }
f39db26c54281d Sui Jingfeng 2023-06-15 68
f39db26c54281d Sui Jingfeng 2023-06-15 69 if (domain &
LSDC_GEM_DOMAIN_SYSTEM) {
f39db26c54281d Sui Jingfeng 2023-06-15 70
lbo->placements[c].mem_type = TTM_PL_SYSTEM;
f39db26c54281d Sui Jingfeng 2023-06-15 71
lbo->placements[c++].flags = 0;
f39db26c54281d Sui Jingfeng 2023-06-15 72 }
f39db26c54281d Sui Jingfeng 2023-06-15 73
f39db26c54281d Sui Jingfeng 2023-06-15 74 if (!c) {
f39db26c54281d Sui Jingfeng 2023-06-15 75
lbo->placements[c].mem_type = TTM_PL_SYSTEM;
f39db26c54281d Sui Jingfeng 2023-06-15 76
lbo->placements[c++].flags = 0;
f39db26c54281d Sui Jingfeng 2023-06-15 77 }
f39db26c54281d Sui Jingfeng 2023-06-15 78
f39db26c54281d Sui Jingfeng 2023-06-15 79 lbo->placement.num_placement =
c;
f39db26c54281d Sui Jingfeng 2023-06-15 @80
lbo->placement.num_busy_placement = c;
f39db26c54281d Sui Jingfeng 2023-06-15 81
f39db26c54281d Sui Jingfeng 2023-06-15 82 for (i = 0; i < c; ++i) {
f39db26c54281d Sui Jingfeng 2023-06-15 83 lbo->placements[i].fpfn
= 0;
f39db26c54281d Sui Jingfeng 2023-06-15 84 lbo->placements[i].lpfn
= 0;
f39db26c54281d Sui Jingfeng 2023-06-15 85 }
f39db26c54281d Sui Jingfeng 2023-06-15 86 }
f39db26c54281d Sui Jingfeng 2023-06-15 87
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/vma: Fix potential UAF on multi-tile platforms (rev2)
On Wednesday, 8 November 2023 22:27:35 CET Patchwork wrote: > == Series Details == > > Series: drm/i915/vma: Fix potential UAF on multi-tile platforms (rev2) > URL : https://patchwork.freedesktop.org/series/126012/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_13852 -> Patchwork_126012v2 > > > Summary > --- > > **FAILURE** > > Serious unknown changes coming with Patchwork_126012v2 absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_126012v2, please notify your bug team > (lgci.bug.fil...@intel.com) to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/index.html > > Participating hosts (34 -> 33) > -- > > Additional (1): bat-mtlp-8 > Missing(2): fi-hsw-4770 bat-dg2-9 > > Possible new issues > --- > > Here are the unknown changes that may have been introduced in > Patchwork_126012v2: > > ### IGT changes ### > > Possible regressions > > * igt@i915_suspend@basic-s2idle-without-i915: > - bat-adlp-11:NOTRUN -> [FAIL][1] +1 other test fail >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/igt@i915_susp...@basic-s2idle-without-i915.html Stderr looks pretty much like here: https://gitlab.freedesktop.org/drm/intel/issues/9092 > > * igt@i915_suspend@basic-s3-without-i915: > - bat-rplp-1: NOTRUN -> [INCOMPLETE][2] >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-rplp-1/igt@i915_susp...@basic-s3-without-i915.html Kernel warning looks the same as here: https://gitlab.freedesktop.org/drm/intel/issues/9570 @BUG Filing, please update filters and re-report. Thanks, Janusz > > > Known issues > > > Here are the changes found in Patchwork_126012v2 that come from known > issues: > > ### CI changes ### > > Possible fixes > > * boot: > - bat-adlp-11:[FAIL][3] ([i915#8293]) -> [PASS][4] >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13852/bat-adlp-11/boot.html >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/boot.html > > > > ### IGT changes ### > > Issues hit > > * igt@debugfs_test@basic-hwmon: > - bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#9318]) >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html > - bat-adlp-11:NOTRUN -> [SKIP][6] ([i915#9318]) >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html > > * igt@gem_lmem_swapping@basic: > - bat-adln-1: NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests > skip >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adln-1/igt@gem_lmem_swapp...@basic.html > > * igt@gem_lmem_swapping@parallel-random-engines: > - bat-rplp-1: NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests > skip >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-rplp-1/igt@gem_lmem_swapp...@parallel-random-engines.html > > * igt@gem_lmem_swapping@random-engines: > - bat-adlp-6: NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests > skip >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-6/igt@gem_lmem_swapp...@random-engines.html > > * igt@gem_lmem_swapping@verify-random: > - bat-adlp-11:NOTRUN -> [SKIP][10] ([i915#4613]) +3 other tests > skip >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/igt@gem_lmem_swapp...@verify-random.html > - bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#4613]) +3 other tests > skip >[11]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html > > * igt@gem_mmap@basic: > - bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4083]) >[12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-mtlp-8/igt@gem_m...@basic.html > > * igt@gem_mmap_gtt@basic: > - bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#4077]) +3 other tests > skip >[13]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-mtlp-8/igt@gem_mmap_...@basic.html > > * igt@gem_render_tiled_blits@basic: > - bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#4079]) +1 other test > skip >[14]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html > > * igt@gem_tiled_pread_basic: > - bat-adlp-11:NOTRUN -> [SKIP][15] ([i915#3282]) >[15]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/igt@gem
Re: [Intel-gfx] [PATCH] drm/ttm: replace busy placement with flags v2
Hi Somalapuram,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Somalapuram-Amaranath/drm-ttm-replace-busy-placement-with-flags-v2/20231109-104055
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:
https://lore.kernel.org/r/20231109023843.32326-1-Amaranath.Somalapuram%40amd.com
patch subject: [Intel-gfx] [PATCH] drm/ttm: replace busy placement with flags v2
config: i386-buildonly-randconfig-001-20231109
(https://download.01.org/0day-ci/archive/20231109/202311091846.p6fn32ip-...@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20231109/202311091846.p6fn32ip-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202311091846.p6fn32ip-...@intel.com/
All warnings (new ones prefixed by >>):
In function 'i915_ttm_placement_from_obj',
inlined from 'i915_ttm_get_pages' at
drivers/gpu/drm/i915/gem/i915_gem_ttm.c:847:2:
>> drivers/gpu/drm/i915/gem/i915_gem_ttm.c:165:18: warning: 'places[0].flags'
>> is used uninitialized [-Wuninitialized]
165 | places[0].flags |= TTM_PL_FLAG_IDLE;
| ~^~
drivers/gpu/drm/i915/gem/i915_gem_ttm.c: In function 'i915_ttm_get_pages':
drivers/gpu/drm/i915/gem/i915_gem_ttm.c:837:26: note: 'places' declared here
837 | struct ttm_place places[I915_TTM_MAX_PLACEMENTS + 1];
| ^~
vim +165 drivers/gpu/drm/i915/gem/i915_gem_ttm.c
155
156 static void
157 i915_ttm_placement_from_obj(const struct drm_i915_gem_object *obj,
158 struct ttm_place *places,
159 struct ttm_placement *placement)
160 {
161 unsigned int num_allowed = obj->mm.n_placements;
162 unsigned int flags = obj->flags;
163 unsigned int i;
164
> 165 places[0].flags |= TTM_PL_FLAG_IDLE;
166 i915_ttm_place_from_region(num_allowed ? obj->mm.placements[0] :
167 obj->mm.region, &places[0],
obj->bo_offset,
168 obj->base.size, flags);
169
170 /* Cache this on object? */
171 for (i = 0; i < num_allowed; ++i) {
172 i915_ttm_place_from_region(obj->mm.placements[i],
173 &places[i + 1],
obj->bo_offset,
174 obj->base.size, flags);
175 places[i + 1].flags |= TTM_PL_FLAG_BUSY;
176 }
177
178 placement->num_placement = num_allowed + 1;
179 placement->placement = places;
180 }
181
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Re: [Intel-gfx] [PATCH] drm: i915: Adapt to -Walloc-size
On Wed, 08 Nov 2023, Jani Nikula wrote:
> On Tue, 07 Nov 2023, Sam James wrote:
>> GCC 14 introduces a new -Walloc-size included in -Wextra which errors out
>> like:
>> ```
>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c: In function
>> ‘eb_copy_relocations’:
>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1681:24: error: allocation of
>> insufficient size ‘1’ for type ‘struct drm_i915_gem_relocation_entry’ with
>> size ‘32’ [-Werror=alloc-size]
>> 1681 | relocs = kvmalloc_array(size, 1, GFP_KERNEL);
>> |^
>>
>> ```
>>
>> So, just swap the number of members and size arguments to match the
>> prototype, as
>> we're initialising 1 element of size `size`. GCC then sees we're not
>> doing anything wrong.
>>
>> Signed-off-by: Sam James
>
> The short answer,
>
> Reviewed-by: Jani Nikula
And pushed to drm-intel-gt-next, thanks for the patch.
BR,
Jani.
>
> but please read on.
>
>> ---
>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> index 683fd8d3151c..45b9d9e34b8b 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> @@ -1678,7 +1678,7 @@ static int eb_copy_relocations(const struct
>> i915_execbuffer *eb)
>> urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr);
>> size = nreloc * sizeof(*relocs);
>>
>> -relocs = kvmalloc_array(size, 1, GFP_KERNEL);
>> +relocs = kvmalloc_array(1, size, GFP_KERNEL);
>
> Based on the patch context, we should really be calling:
>
> kvmalloc_array(nreloc, sizeof(*relocs), GFP_KERNEL);
>
> and we'd get mul overflow checks too.
>
> However, the code below also needs size, unless it's refactored to
> operate on multiples of sizeof(*relocs) and it all gets a bit annoying.
>
> Maybe there's a better way, but for the short term the patch at hand is
> no worse than what we currently have, and it'll silence the warning, so
> let's go with this.
>
>
>> if (!relocs) {
>> err = -ENOMEM;
>> goto err;
--
Jani Nikula, Intel
[Intel-gfx] [PATCH v2] drm/i915/mtl: C20 state verification
Add state verification for C20 as we have one
for C10.
V2: Use abstractation of HW readout (Gustavo)
Drop MPLLA/B from message for TX and CMN
parameters (Gustavo)
Reviewed-by: Gustavo Sousa (v1)
Signed-off-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 120 +-
drivers/gpu/drm/i915/display/intel_cx0_phy.h | 2 +-
.../drm/i915/display/intel_modeset_verify.c | 2 +-
3 files changed, 88 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index b2ad4c6172f6..a8fa76580802 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -3017,55 +3017,33 @@ intel_mtl_port_pll_type(struct intel_encoder *encoder,
return ICL_PORT_DPLL_DEFAULT;
}
-void intel_c10pll_state_verify(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+static void intel_c10pll_state_verify(const struct intel_crtc_state *state,
+ struct intel_crtc *crtc,
+ struct intel_encoder *encoder,
+ struct intel_c10pll_state *mpllb_hw_state)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
- const struct intel_crtc_state *new_crtc_state =
- intel_atomic_get_new_crtc_state(state, crtc);
- struct intel_c10pll_state mpllb_hw_state = {};
- const struct intel_c10pll_state *mpllb_sw_state =
&new_crtc_state->cx0pll_state.c10;
- struct intel_encoder *encoder;
- enum phy phy;
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ const struct intel_c10pll_state *mpllb_sw_state =
&state->cx0pll_state.c10;
int i;
- if (DISPLAY_VER(i915) < 14)
- return;
-
- if (!new_crtc_state->hw.active)
- return;
-
- /* intel_get_crtc_new_encoder() only works for modeset/fastset commits
*/
- if (!intel_crtc_needs_modeset(new_crtc_state) &&
- !intel_crtc_needs_fastset(new_crtc_state))
- return;
-
- encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
- phy = intel_port_to_phy(i915, encoder->port);
-
- if (!intel_is_c10phy(i915, phy))
- return;
-
- intel_c10pll_readout_hw_state(encoder, &mpllb_hw_state);
-
for (i = 0; i < ARRAY_SIZE(mpllb_sw_state->pll); i++) {
u8 expected = mpllb_sw_state->pll[i];
- I915_STATE_WARN(i915, mpllb_hw_state.pll[i] != expected,
+ I915_STATE_WARN(i915, mpllb_hw_state->pll[i] != expected,
"[CRTC:%d:%s] mismatch in C10MPLLB:
Register[%d] (expected 0x%02x, found 0x%02x)",
crtc->base.base.id, crtc->base.name, i,
- expected, mpllb_hw_state.pll[i]);
+ expected, mpllb_hw_state->pll[i]);
}
- I915_STATE_WARN(i915, mpllb_hw_state.tx != mpllb_sw_state->tx,
+ I915_STATE_WARN(i915, mpllb_hw_state->tx != mpllb_sw_state->tx,
"[CRTC:%d:%s] mismatch in C10MPLLB: Register TX0
(expected 0x%02x, found 0x%02x)",
crtc->base.base.id, crtc->base.name,
- mpllb_sw_state->tx, mpllb_hw_state.tx);
+ mpllb_sw_state->tx, mpllb_hw_state->tx);
- I915_STATE_WARN(i915, mpllb_hw_state.cmn != mpllb_sw_state->cmn,
+ I915_STATE_WARN(i915, mpllb_hw_state->cmn != mpllb_sw_state->cmn,
"[CRTC:%d:%s] mismatch in C10MPLLB: Register CMN0
(expected 0x%02x, found 0x%02x)",
crtc->base.base.id, crtc->base.name,
- mpllb_sw_state->cmn, mpllb_hw_state.cmn);
+ mpllb_sw_state->cmn, mpllb_hw_state->cmn);
}
void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder,
@@ -3091,3 +3069,77 @@ int intel_cx0pll_calc_port_clock(struct intel_encoder
*encoder,
return intel_c20pll_calc_port_clock(encoder, &pll_state->c20);
}
+
+static void intel_c20pll_state_verify(const struct intel_crtc_state *state,
+ struct intel_crtc *crtc,
+ struct intel_encoder *encoder,
+ struct intel_c20pll_state *mpll_hw_state)
+{
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ const struct intel_c20pll_state *mpll_sw_state =
&state->cx0pll_state.c20;
+ bool use_mplla;
+ int i;
+
+ use_mplla = intel_c20_use_mplla(mpll_hw_state->clock);
+ if (use_mplla) {
+ for (i = 0; i < ARRAY_SIZE(mpll_sw_state->mplla); i++) {
+ I915_STATE_WARN(i915, mpll_hw_state->mplla[i] !=
mpll_sw_state->mplla[i],
+ "[CRTC:%d:%s] mismatch in C20MPLLA:
Register[%d]
Re: [Intel-gfx] [PATCH] drm/ttm: replace busy placement with flags v2
Hi Somalapuram,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Somalapuram-Amaranath/drm-ttm-replace-busy-placement-with-flags-v2/20231109-104055
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:
https://lore.kernel.org/r/20231109023843.32326-1-Amaranath.Somalapuram%40amd.com
patch subject: [Intel-gfx] [PATCH] drm/ttm: replace busy placement with flags v2
config: i386-randconfig-012-20231109
(https://download.01.org/0day-ci/archive/20231109/202311091943.7pztiigs-...@intel.com/config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20231109/202311091943.7pztiigs-...@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Closes:
https://lore.kernel.org/oe-kbuild-all/202311091943.7pztiigs-...@intel.com/
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/gem/i915_gem_ttm.c: In function 'i915_ttm_get_pages':
>> drivers/gpu/drm/i915/gem/i915_gem_ttm.c:165:18: warning: 'places.flags' is
>> used uninitialized in this function [-Wuninitialized]
165 | places[0].flags |= TTM_PL_FLAG_IDLE;
| ^~
vim +165 drivers/gpu/drm/i915/gem/i915_gem_ttm.c
155
156 static void
157 i915_ttm_placement_from_obj(const struct drm_i915_gem_object *obj,
158 struct ttm_place *places,
159 struct ttm_placement *placement)
160 {
161 unsigned int num_allowed = obj->mm.n_placements;
162 unsigned int flags = obj->flags;
163 unsigned int i;
164
> 165 places[0].flags |= TTM_PL_FLAG_IDLE;
166 i915_ttm_place_from_region(num_allowed ? obj->mm.placements[0] :
167 obj->mm.region, &places[0],
obj->bo_offset,
168 obj->base.size, flags);
169
170 /* Cache this on object? */
171 for (i = 0; i < num_allowed; ++i) {
172 i915_ttm_place_from_region(obj->mm.placements[i],
173 &places[i + 1],
obj->bo_offset,
174 obj->base.size, flags);
175 places[i + 1].flags |= TTM_PL_FLAG_BUSY;
176 }
177
178 placement->num_placement = num_allowed + 1;
179 placement->placement = places;
180 }
181
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Re: [Intel-gfx] [PATCH v9 1/6] drm/panelreplay: dpcd register definition for panelreplay
On Wed, 08 Nov 2023, Animesh Manna wrote: > Add DPCD register definition for discovering, enabling and > checking status of panel replay of the sink. > > Cc: Jouni Högander > Cc: Arun R Murthy > Cc: Jani Nikula > Reviewed-by: Arun R Murthy > Signed-off-by: Animesh Manna You got the ack, please keep track of it. https://lore.kernel.org/r/elcebygxs432bcj7oez7ndlfvb3lru7m7yznyqp2ei4ocjkvxp@23lf2rh45fmt > --- > include/drm/display/drm_dp.h | 23 +++ > 1 file changed, 23 insertions(+) > > diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h > index e69cece404b3..fc42b622ef32 100644 > --- a/include/drm/display/drm_dp.h > +++ b/include/drm/display/drm_dp.h > @@ -543,6 +543,10 @@ > /* DFP Capability Extension */ > #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0a3 /* 2.0 */ > > +#define DP_PANEL_REPLAY_CAP 0x0b0 /* DP 2.0 */ > +# define DP_PANEL_REPLAY_SUPPORT(1 << 0) > +# define DP_PANEL_REPLAY_SU_SUPPORT (1 << 1) > + > /* Link Configuration */ > #define DP_LINK_BW_SET 0x100 > # define DP_LINK_RATE_TABLE 0x00/* eDP 1.4 */ > @@ -716,6 +720,13 @@ > #define DP_BRANCH_DEVICE_CTRL0x1a1 > # define DP_BRANCH_DEVICE_IRQ_HPD(1 << 0) > > +#define PANEL_REPLAY_CONFIG 0x1b0 /* DP 2.0 */ > +# define DP_PANEL_REPLAY_ENABLE (1 << 0) > +# define DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN (1 << 3) > +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN (1 << 4) > +# define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN (1 << 5) > +# define DP_PANEL_REPLAY_SU_ENABLE (1 << 6) > + > #define DP_PAYLOAD_ALLOCATE_SET 0x1c0 > #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1 > #define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2 > @@ -1105,6 +1116,18 @@ > #define DP_LANE_ALIGN_STATUS_UPDATED_ESI 0x200e /* status same as > 0x204 */ > #define DP_SINK_STATUS_ESI 0x200f /* status same as > 0x205 */ > > +#define DP_PANEL_REPLAY_ERROR_STATUS 0x2020 /* DP 2.1*/ > +# define DP_PANEL_REPLAY_LINK_CRC_ERROR(1 << 0) > +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR (1 << 1) > +# define DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR (1 << 2) > + > +#define DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS0x2022 /* DP 2.1 */ > +# define DP_SINK_DEVICE_PANEL_REPLAY_STATUS_MASK (7 << 0) > +# define DP_SINK_FRAME_LOCKED_SHIFT3 > +# define DP_SINK_FRAME_LOCKED_MASK (3 << 3) > +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_SHIFT 5 > +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_MASK(1 << 5) > + > /* Extended Receiver Capability: See DP_DPCD_REV for definitions */ > #define DP_DP13_DPCD_REV0x2200 -- Jani Nikula, Intel
Re: [Intel-gfx] [PATCH v4] drm/i915/display: Support PSR entry VSC packet to be transmitted one frame earlier
> -Original Message-
> From: Jani Nikula
> Sent: Wednesday, November 8, 2023 7:42 PM
> To: Ville Syrjälä ; Kahola, Mika
>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH v4] drm/i915/display: Support PSR entry VSC
> packet to be transmitted one frame earlier
>
> On Wed, 08 Nov 2023, Ville Syrjälä wrote:
> > On Wed, Nov 08, 2023 at 06:59:18PM +0200, Ville Syrjälä wrote:
> >> On Mon, Nov 06, 2023 at 01:42:28PM +0200, Mika Kahola wrote:
> >> > Display driver shall read DPCD 00071h[3:1] during configuration to
> >> > get PSR setup time. This register provides the setup time
> >> > requirement on the VSC SDP entry packet. If setup time cannot be
> >> > met with the current timings (e.g., PSR setup time + other blanking
> >> > requirements > blanking time), driver should enable sending VSC SDP
> >> > one frame earlier before sending the capture frame.
> >> >
> >> > BSpec: 69895 (PSR Entry Setup Frames 17:16)
> >> >
> >> > v2: Write frames before su entry to correct register (Ville, Jouni)
> >> > Move frames before su entry calculation to it's
> >> > own function (Ville, Jouni)
> >> > Rename PSR Entry Setup Frames register to indicate
> >> > Lunarlake specificity (Jouni)
> >> > v3: Modify setup entry frames calculation function to
> >> > return the actual frames (Ville)
> >> > Match comment with actual implementation (Jouni)
> >> > v4: Drop "set" from function naming (Jouni, Ville)
> >> > Use i915 instead of dev_priv (Jouni)
> >> >
> >> > Signed-off-by: Mika Kahola
> >> > ---
> >> > .../drm/i915/display/intel_display_types.h| 1 +
> >> > drivers/gpu/drm/i915/display/intel_psr.c | 82 +++
> >> > drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +
> >> > 3 files changed, 71 insertions(+), 14 deletions(-)
> >> >
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> >> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> >> > index 047fe3f8905a..92f06d67fd1e 100644
> >> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> >> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> >> > @@ -1708,6 +1708,7 @@ struct intel_psr {
> >> > u32 dc3co_exitline;
> >> > u32 dc3co_exit_delay;
> >> > struct delayed_work dc3co_work;
> >> > +u8 entry_setup_frames;
> >> > };
> >> >
> >> > struct intel_dp {
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> >> > b/drivers/gpu/drm/i915/display/intel_psr.c
> >> > index 920f77336163..fc242916349b 100644
> >> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> >> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> >> > @@ -593,6 +593,9 @@ static void intel_psr_enable_sink(struct intel_dp
> >> > *intel_dp)
> >> > if (intel_dp->psr.req_psr2_sdp_prior_scanline)
> >> > dpcd_val |= DP_PSR_SU_REGION_SCANLINE_CAPTURE;
> >> >
> >> > +if (intel_dp->psr.entry_setup_frames > 0)
> >> > +dpcd_val |= DP_PSR_FRAME_CAPTURE;
> >> > +
> >> > drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val);
> >> >
> >> > drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,
> >> > DP_SET_POWER_D0); @@ -691,6 +694,9 @@ static void
> >> > hsw_activate_psr1(struct intel_dp *intel_dp)
> >> > if (DISPLAY_VER(dev_priv) >= 8)
> >> > val |= EDP_PSR_CRC_ENABLE;
> >> >
> >> > +if (DISPLAY_VER(dev_priv) >= 20)
> >> > +val |=
> >> > +LNL_EDP_PSR_ENTRY_SETUP_FRAMES(intel_dp->psr.entry_setup_frames);
> >> > +
> >> > intel_de_rmw(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder),
> >> > ~EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK, val); } @@
> >> > -728,11
> >> > +734,27 @@ static int psr2_block_count(struct intel_dp *intel_dp)
> >> > return psr2_block_count_lines(intel_dp) / 4; }
> >> >
> >> > +static u8 frames_before_su_entry(struct intel_dp *intel_dp)
> >> ^^
> >>
> >> That vs -ETIME broke my tgl.
> >>
> >> > +static u8 intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
> > ^^
> > No, actually that ...
>
> *sigh*
>
> I eyeballed the patch and the u8 and thought about giving my standard issue
> "please use ints unless you have specific reasons to
> use something else" comment. But didn't.
So it's time to switch to use ints. Thought entry_setup_frames would fit to u8
but I guess wasn't the case after all.
Thanks for spotting this!
-Mika-
>
> It's a "code smell". It's suspicious even if it isn't broken.
>
> BR,
> Jani.
>
>
> >
> >> > + const struct
> >> > drm_display_mode *adjusted_mode) {
> >> > +struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> >> > +int psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
> >> > +u8 entry_setup_frames = 0;
> > ^^
> > ... and that.
>
> --
> Jani Nikula, Intel
Re: [Intel-gfx] [PATCH v2] drm/i915/vma: Fix potential UAF on multi-tile platforms
Hi Janusz,
On Wed, Nov 08, 2023 at 05:29:06PM +0100, Janusz Krzysztofik wrote:
> Object debugging tools were sporadically reporting illegal attempts to
> free a still active i915 VMA object from when parking a GPU tile believed
> to be idle.
>
> [161.359441] ODEBUG: free active (active state 0) object: 88811643b958
> object type: i915_active hint: __i915_vma_active+0x0/0x50 [i915]
> [161.360082] WARNING: CPU: 5 PID: 276 at lib/debugobjects.c:514
> debug_print_object+0x80/0xb0
> ...
> [161.360304] CPU: 5 PID: 276 Comm: kworker/5:2 Not tainted
> 6.5.0-rc1-CI_DRM_13375-g003f860e5577+ #1
> [161.360314] Hardware name: Intel Corporation Rocket Lake Client
> Platform/RocketLake S UDIMM 6L RVP, BIOS RKLSFWI1.R00.3173.A03.2204210138
> 04/21/2022
> [161.360322] Workqueue: i915-unordered __intel_wakeref_put_work [i915]
> [161.360592] RIP: 0010:debug_print_object+0x80/0xb0
> ...
> [161.361347] debug_object_free+0xeb/0x110
> [161.361362] i915_active_fini+0x14/0x130 [i915]
> [161.361866] release_references+0xfe/0x1f0 [i915]
> [161.362543] i915_vma_parked+0x1db/0x380 [i915]
> [161.363129] __gt_park+0x121/0x230 [i915]
> [161.363515] intel_wakeref_put_last+0x1f/0x70 [i915]
>
> That has been tracked down to be happening when another thread was
> deactivating the VMA inside __active_retire() helper, after the VMA's
> active counter was already decremented to 0, but before deactivation of
> the VMA's object was reported to the object debugging tools. Root cause
> has been identified as premature release of last wakeref for the GPU tile
> to which the active VMA belonged.
>
> In case of single-tile platforms, an engine associated with a request that
> uses the VMA is usually keeping the tile's wakeref long enough for that
> VMA to be deactivated on time, before it is going to be freed on last put
> of that wakeref. However, on multi-tile platforms, a request may use a
> VMA from a tile other than the one that hosts the request's engine, then,
> not protected with the engine's wakeref.
>
> Get an extra wakeref for the VMA's tile when activating it, and put that
> wakeref only after the VMA is deactivated. However, exclude GGTT from
> that processing path, otherwise the GPU never goes idle. Since
> __i915_vma_retire() may be called from atomic contexts, use async variant
> of wakeref put.
>
> CI reports indicate that single-tile platforms also suffer sporadically
> from the same race, however, unlike in case of multi-tile, exact scenario
> when that happens hasn't been discovered yet. Then, while I submit this
> patch as fix for multi-tile cases, and in hope it also addresses single-
> tile, I'm not able to blame any particular commit for that issue.
> However, I'm going to ask i915 maintainers to include this fix, if
> accepted, in the current rc cycle (6.7-rc) as important for the first
> supported multi-tile platform -- Meteor Lake.
>
> v2: Get the wakeref before vm mutex to avoid circular locking dependency,
> - drop questionable Fixes: tag.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/issues/8875
> Signed-off-by: Janusz Krzysztofik
Can it be:
Fixes: 12c255b5dad1 ("drm/i915: Provide an i915_active.acquire callback")
Cc: Chris Wilson
Cc: # v5.4+
It's not exactly the one fix we need for as this patch is fixing
something on its own but not explicitely stated (maybe it was a
precautionary measure).
But if the fix has to be applied, it has to date back to that
period, I guess.
Reviewed-by: Andi Shyti
Andi
Re: [Intel-gfx] [PATCH v2 0/6] drm/edid: split out drm_eld.[ch], add some SAD helpers
On Thu, 02 Nov 2023, Jani Nikula wrote: > On Tue, 31 Oct 2023, Jani Nikula wrote: >> v2 of https://patchwork.freedesktop.org/series/123384/ >> >> Jani Nikula (6): >> drm/edid: split out drm_eld.h from drm_edid.h >> drm/eld: replace uint8_t with u8 >> drm/edid: include drm_eld.h only where required >> drm/edid: use a temp variable for sads to drop one level of >> dereferences >> drm/edid: add helpers to get/set struct cea_sad from/to 3-byte sad >> drm/eld: add helpers to modify the SADs of an ELD > > Maxime, Maarten, Thomas - > > I'm moving a bunch of code around here, and would like to get your acks > before merging. I'm planning on merging this via drm-misc-next, it's > just that it only has Intel reviews, and don't want to feel like I'm > sneaking this in. Merged with Maxime's IRC ack, which I forgot to add to the commit messages. *facepalm*. Sorry about that. Thanks Mitul for reviews! BR, Jani. > > Thanks, > Jani. > >> >> Documentation/gpu/drm-kms-helpers.rst | 6 + >> drivers/gpu/drm/Makefile | 1 + >> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 + >> drivers/gpu/drm/drm_edid.c| 43 +++-- >> drivers/gpu/drm/drm_eld.c | 55 ++ >> drivers/gpu/drm/drm_internal.h| 6 + >> drivers/gpu/drm/i915/display/intel_audio.c| 1 + >> .../drm/i915/display/intel_crtc_state_dump.c | 1 + >> drivers/gpu/drm/i915/display/intel_sdvo.c | 1 + >> drivers/gpu/drm/nouveau/dispnv50/disp.c | 1 + >> drivers/gpu/drm/radeon/radeon_audio.c | 1 + >> drivers/gpu/drm/tegra/hdmi.c | 1 + >> drivers/gpu/drm/tegra/sor.c | 1 + >> include/drm/drm_edid.h| 148 >> include/drm/drm_eld.h | 164 ++ >> sound/core/pcm_drm_eld.c | 1 + >> sound/soc/codecs/hdac_hdmi.c | 1 + >> sound/soc/codecs/hdmi-codec.c | 1 + >> sound/x86/intel_hdmi_audio.c | 1 + >> 19 files changed, 275 insertions(+), 160 deletions(-) >> create mode 100644 drivers/gpu/drm/drm_eld.c >> create mode 100644 include/drm/drm_eld.h -- Jani Nikula, Intel
[Intel-gfx] [PATCH 3/3] drm/i915: Use a different vblank worker for atomic unpin
For the atomic codepath we unpin_work in old_plane_state to unpin the
old fb. As this happened after swapping state, this is allowed.
Use the unpin_work only as a barrier, and keep doing the actual
unpinning in the atomic path.
Signed-off-by: Maarten Lankhorst
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 18
.../gpu/drm/i915/display/intel_atomic_plane.h | 2 ++
drivers/gpu/drm/i915/display/intel_crtc.c | 28 +++
3 files changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 06c2455bdd788..6ddb4f4ec79ac 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -1164,6 +1164,9 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
intel_display_rps_mark_interactive(dev_priv, state, false);
/* Should only be called after a successful intel_prepare_plane_fb()! */
+ if (old_plane_state->unpin_work.vblank)
+ drm_vblank_work_flush(&old_plane_state->unpin_work);
+
intel_plane_unpin_fb(old_plane_state);
}
@@ -1176,3 +1179,18 @@ void intel_plane_helper_add(struct intel_plane *plane)
{
drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);
}
+
+/* Completion is enough */
+static void intel_plane_cursor_vblank_work(struct kthread_work *base)
+{ }
+
+void intel_plane_init_cursor_vblank_work(struct intel_plane_state
*old_plane_state,
+struct intel_plane_state
*new_plane_state)
+{
+ if (!old_plane_state->ggtt_vma ||
+ old_plane_state->ggtt_vma == new_plane_state->ggtt_vma)
+ return;
+
+ drm_vblank_work_init(&old_plane_state->unpin_work,
old_plane_state->uapi.crtc,
+intel_plane_cursor_vblank_work);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 191dad0efc8e6..5a897cf6fa021 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -66,5 +66,7 @@ int intel_plane_check_src_coordinates(struct
intel_plane_state *plane_state);
void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state);
void intel_plane_helper_add(struct intel_plane *plane);
+void intel_plane_init_cursor_vblank_work(struct intel_plane_state
*old_plane_state,
+struct intel_plane_state
*new_plane_state);
#endif /* __INTEL_ATOMIC_PLANE_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
b/drivers/gpu/drm/i915/display/intel_crtc.c
index 1fd068e6e26ca..755c40fd0ac13 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -559,6 +559,19 @@ void intel_pipe_update_start(struct intel_atomic_state
*state,
if (intel_crtc_needs_vblank_work(new_crtc_state))
intel_crtc_vblank_work_init(new_crtc_state);
+ if (state->base.legacy_cursor_update) {
+ struct intel_plane *plane;
+ struct intel_plane_state *old_plane_state, *new_plane_state;
+ int i;
+
+ for_each_oldnew_intel_plane_in_state(state, plane,
old_plane_state,
+new_plane_state, i) {
+ if (old_plane_state->uapi.crtc == &crtc->base)
+
intel_plane_init_cursor_vblank_work(old_plane_state,
+
new_plane_state);
+ }
+ }
+
intel_crtc_vblank_evade_scanlines(state, crtc, &min, &max,
&vblank_start);
if (min <= 0 || max <= 0)
goto irq_disable;
@@ -721,6 +734,21 @@ void intel_pipe_update_end(struct intel_atomic_state
*state,
new_crtc_state->uapi.event = NULL;
}
+ if (state->base.legacy_cursor_update) {
+ struct intel_plane *plane;
+ struct intel_plane_state *old_plane_state;
+ int i;
+
+ for_each_old_intel_plane_in_state(state, plane,
old_plane_state, i) {
+ if (old_plane_state->uapi.crtc == &crtc->base &&
+ old_plane_state->unpin_work.vblank) {
+
drm_vblank_work_schedule(&old_plane_state->unpin_work,
+
drm_crtc_accurate_vblank_count(&crtc->base) + 1,
+false);
+ }
+ }
+ }
+
/*
* Send VRR Push to terminate Vblank. If we are already in vblank
* this has to be done _after_ sampling the frame counter, as
--
2.39.2
[Intel-gfx] [PATCH 2/3] drm/i915: Use vblank worker to unpin old legacy cursor fb safely
From: Ville Syrjälä
The cursor hardware only does sync updates, and thus the hardware
will be scanning out from the old fb until the next start of vblank.
So in order to make the legacy cursor fastpath actually safe we
should not unpin the old fb until we're sure the hardware has
ceased accessing it. The simplest approach is to just use a vblank
work here to do the delayed unpin.
Not 100% sure it's a good idea to put this onto the same high
priority vblank worker as eg. our timing critical gamma updates.
But let's keep it simple for now, and it we later discover that
this is causing problems we can think about adding a lower
priority worker for such things.
This patch is slightly reworked by Maarten
Cc: Maarten Lankhorst
Signed-off-by: Ville Syrjälä
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_cursor.c | 37 ---
drivers/gpu/drm/i915/display/intel_display.c | 3 ++
.../drm/i915/display/intel_display_types.h| 3 ++
3 files changed, 38 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
b/drivers/gpu/drm/i915/display/intel_cursor.c
index b342fad180ca5..1728ecd5cc782 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -603,6 +603,17 @@ static bool intel_cursor_format_mod_supported(struct
drm_plane *_plane,
return format == DRM_FORMAT_ARGB;
}
+static void intel_cursor_unpin_work(struct kthread_work *base)
+{
+ struct drm_vblank_work *work = to_drm_vblank_work(base);
+ struct intel_plane_state *plane_state =
+ container_of(work, typeof(*plane_state), unpin_work);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+
+ intel_plane_unpin_fb(plane_state);
+ intel_plane_destroy_state(&plane->base, &plane_state->uapi);
+}
+
static int
intel_legacy_cursor_update(struct drm_plane *_plane,
struct drm_crtc *_crtc,
@@ -688,9 +699,14 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
if (ret)
goto out_free;
- ret = intel_plane_pin_fb(new_plane_state);
- if (ret)
- goto out_free;
+ if (new_plane_state->uapi.fb != old_plane_state->uapi.fb) {
+ ret = intel_plane_pin_fb(new_plane_state);
+ if (ret)
+ goto out_free;
+ } else {
+ /* magic trick */
+ swap(new_plane_state->ggtt_vma, old_plane_state->ggtt_vma);
+ }
intel_frontbuffer_flush(to_intel_frontbuffer(new_plane_state->hw.fb),
ORIGIN_CURSOR_UPDATE);
@@ -730,14 +746,25 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
local_irq_enable();
- intel_plane_unpin_fb(old_plane_state);
+ if (old_plane_state->uapi.fb != new_plane_state->uapi.fb) {
+ drm_vblank_work_init(&old_plane_state->unpin_work, &crtc->base,
+intel_cursor_unpin_work);
+
+ drm_vblank_work_schedule(&old_plane_state->unpin_work,
+
drm_crtc_accurate_vblank_count(&crtc->base) + 1,
+false);
+
+ old_plane_state = NULL;
+ } else {
+ intel_plane_unpin_fb(old_plane_state);
+ }
out_free:
if (new_crtc_state)
intel_crtc_destroy_state(&crtc->base, &new_crtc_state->uapi);
if (ret)
intel_plane_destroy_state(&plane->base, &new_plane_state->uapi);
- else
+ else if (old_plane_state)
intel_plane_destroy_state(&plane->base, &old_plane_state->uapi);
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 3effafcbb411a..9b43810f9a934 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -64,6 +64,7 @@
#include "intel_crt.h"
#include "intel_crtc.h"
#include "intel_crtc_state_dump.h"
+#include "intel_cursor.h"
#include "intel_ddi.h"
#include "intel_de.h"
#include "intel_display_driver.h"
@@ -6883,6 +6884,8 @@ static void intel_commit_modeset_disables(struct
intel_atomic_state *state)
intel_pre_plane_update(state, crtc);
intel_crtc_disable_planes(state, crtc);
+
+ drm_vblank_work_flush_all(&crtc->base);
}
/* Only disable port sync and MST slaves */
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 926bf9c1a3ede..6d27cfb4f08e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -709,6 +709,9 @@ struct intel_plane_state {
struct intel_fb_view view;
+ /* for legacy cursor fb unpin */
+ struct drm_vblank_work unpin_work;
+
/*
[Intel-gfx] [PATCH 1/3] drm: Add drm_vblank_work_flush_all().
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2 ++
2 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/drm_vblank_work.c
b/drivers/gpu/drm/drm_vblank_work.c
index bd481fdd6b870..27c8646a79c8e 100644
--- a/drivers/gpu/drm/drm_vblank_work.c
+++ b/drivers/gpu/drm/drm_vblank_work.c
@@ -229,6 +229,28 @@ void drm_vblank_work_flush(struct drm_vblank_work *work)
}
EXPORT_SYMBOL(drm_vblank_work_flush);
+/**
+ * drm_vblank_work_flush_all - flush all currently pending vblank work on crtc.
+ * @crtc: crtc for which vblank work to flush
+ *
+ * Wait until all currently queued vblank work on @crtc
+ * has finished executing once.
+ */
+void drm_vblank_work_flush_all(struct drm_crtc *crtc)
+{
+ struct drm_device *dev = crtc->dev;
+ struct drm_vblank_crtc *vblank = &dev->vblank[drm_crtc_index(crtc)];
+
+ spin_lock_irq(&dev->event_lock);
+ wait_event_lock_irq(vblank->work_wait_queue,
+ waitqueue_active(&vblank->work_wait_queue),
+ dev->event_lock);
+ spin_unlock_irq(&dev->event_lock);
+
+ kthread_flush_worker(vblank->worker);
+}
+EXPORT_SYMBOL(drm_vblank_work_flush_all);
+
/**
* drm_vblank_work_init - initialize a vblank work item
* @work: vblank work item
diff --git a/include/drm/drm_vblank_work.h b/include/drm/drm_vblank_work.h
index eb41d0810c4ff..e04d436b72973 100644
--- a/include/drm/drm_vblank_work.h
+++ b/include/drm/drm_vblank_work.h
@@ -17,6 +17,7 @@ struct drm_crtc;
* drm_vblank_work_init()
* drm_vblank_work_cancel_sync()
* drm_vblank_work_flush()
+ * drm_vblank_work_flush_all()
*/
struct drm_vblank_work {
/**
@@ -67,5 +68,6 @@ void drm_vblank_work_init(struct drm_vblank_work *work,
struct drm_crtc *crtc,
void (*func)(struct kthread_work *work));
bool drm_vblank_work_cancel_sync(struct drm_vblank_work *work);
void drm_vblank_work_flush(struct drm_vblank_work *work);
+void drm_vblank_work_flush_all(struct drm_crtc *crtc);
#endif /* !_DRM_VBLANK_WORK_H_ */
--
2.39.2
[Intel-gfx] [PATCH 2/2] drm/i915: remove excess functions from plane protection check
Reduce the function calls by reusing ->decrypt.
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/display/skl_universal_plane.c | 18 --
1 file changed, 4 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 98acf25a5ca3..39499a0ec6c0 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1854,29 +1854,19 @@ static bool skl_fb_scalable(const struct
drm_framebuffer *fb)
}
}
-static bool bo_has_valid_encryption(struct drm_i915_gem_object *obj)
-{
- struct drm_i915_private *i915 = to_i915(obj->base.dev);
-
- return intel_pxp_key_check(i915->pxp, obj, false) == 0;
-}
-
-static bool pxp_is_borked(struct drm_i915_gem_object *obj)
-{
- return i915_gem_object_is_protected(obj) &&
!bo_has_valid_encryption(obj);
-}
-
static void check_protection(struct intel_plane_state *plane_state)
{
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
struct drm_i915_private *i915 = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
+ struct drm_i915_gem_object *obj = intel_fb_obj(fb);
if (DISPLAY_VER(i915) < 11)
return;
- plane_state->decrypt = bo_has_valid_encryption(intel_fb_obj(fb));
- plane_state->force_black = pxp_is_borked(intel_fb_obj(fb));
+ plane_state->decrypt = intel_pxp_key_check(i915->pxp, obj, false) == 0;
+ plane_state->force_black = i915_gem_object_is_protected(obj) &&
+ !plane_state->decrypt;
}
static int skl_plane_check(struct intel_crtc_state *crtc_state,
--
2.39.2
[Intel-gfx] [PATCH 1/2] drm/i915: abstract plane protection check
Centralize the conditions in a function.
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/display/skl_universal_plane.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 68035675ae3c..98acf25a5ca3 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1866,6 +1866,19 @@ static bool pxp_is_borked(struct drm_i915_gem_object
*obj)
return i915_gem_object_is_protected(obj) &&
!bo_has_valid_encryption(obj);
}
+static void check_protection(struct intel_plane_state *plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ struct drm_i915_private *i915 = to_i915(plane->base.dev);
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+
+ if (DISPLAY_VER(i915) < 11)
+ return;
+
+ plane_state->decrypt = bo_has_valid_encryption(intel_fb_obj(fb));
+ plane_state->force_black = pxp_is_borked(intel_fb_obj(fb));
+}
+
static int skl_plane_check(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
@@ -1910,10 +1923,7 @@ static int skl_plane_check(struct intel_crtc_state
*crtc_state,
if (ret)
return ret;
- if (DISPLAY_VER(dev_priv) >= 11) {
- plane_state->decrypt =
bo_has_valid_encryption(intel_fb_obj(fb));
- plane_state->force_black = pxp_is_borked(intel_fb_obj(fb));
- }
+ check_protection(plane_state);
/* HW only has 8 bits pixel precision, disable plane if invisible */
if (!(plane_state->hw.alpha >> 8))
--
2.39.2
[Intel-gfx] Regression on linux-next (next-20231107)
Hello Krister, Hope you are doing well. I am Chaitanya from the linux graphics team in Intel. This mail is regarding a regression we are seeing in our CI runs[1] for some machines (dg2 and adl-p) on linux-next repository. Since the version next-20231107 [2], we are seeing the following error ``` <4>[ 32.015910] stack segment: [#1] PREEMPT SMP NOPTI <4>[ 32.021048] CPU: 15 PID: 766 Comm: fusermount Not tainted 6.6.0-next-20231107-next-20231107-g5cd631a52568+ #1 <4>[ 32.031135] Hardware name: Intel Corporation Raptor Lake Client Platform/RPL-S ADP-S DDR5 UDIMM CRB, BIOS RPLSFWI1.R00.4221.A00.2305271351 05/27/2023 <4>[ 32.044657] RIP: 0010:fuse_evict_inode+0x61/0x150 [fuse] ` Details log can be found in [3]. After bisecting the tree, the following patch [4] seems to be the first "bad" commit ` 513dfacefd712bcbfab64e1a9c9c3e0d51c2dca5 is the first bad commit commit 513dfacefd712bcbfab64e1a9c9c3e0d51c2dca5 Author: Krister Johansen k...@templeofstupid.com Date: Fri Nov 3 10:39:47 2023 -0700 fuse: share lookup state between submount and its parent Fuse submounts do not perform a lookup for the nodeid that they inherit from their parent. Instead, the code decrements the nlookup on the submount's fuse_inode when it is instantiated, and no forget is performed when a submount root is evicted. Trouble arises when the submount's parent is evicted despite the submount itself being in use. In this author's case, the submount was in a container and deatched from the initial mount namespace via a MNT_DEATCH operation. When memory pressure triggered the shrinker, the inode from the parent was evicted, which triggered enough forgets to render the submount's nodeid invalid. Since submounts should still function, even if their parent goes away, solve this problem by sharing refcounted state between the parent and its submount. When all of the references on this shared state reach zero, it's safe to forget the final lookup of the fuse nodeid. ` We also verified that if we revert the patch the issue is not seen. Could you please check why the patch causes this regression and provide a fix if necessary? Thank you. Regards Chaitanya [1] https://intel-gfx-ci.01.org/tree/linux-next/combined-alt.html? [2] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20231107 [3] http://gfx-ci.igk.intel.com/tree/linux-next/next-20231109/bat-dg2-14/boot0.txt [4] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20231107&id=513dfacefd712bcbfab64e1a9c9c3e0d51c2dca5
Re: [Intel-gfx] [PATCH] drm/i915/quirk: Add quirk for devices with incorrect PWM frequency
Hi Allen,
On Tue, Oct 17, 2023 at 06:01:39PM +, Allen Ballway wrote:
> Cyernet T10C has a bad default PWM frequency causing the display to
> strobe when the brightness is less than 100%. Create a new quirk to use
> the value from the BIOS rather than the default register value.
>
> Signed-off-by: Allen Ballway
>
> ---
>
> .../gpu/drm/i915/display/intel_backlight.c| 3 ++-
> drivers/gpu/drm/i915/display/intel_quirks.c | 26 +++
> drivers/gpu/drm/i915/display/intel_quirks.h | 1 +
> 3 files changed, 29 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
> b/drivers/gpu/drm/i915/display/intel_backlight.c
> index 2e8f17c045222..c4dcfece9deca 100644
> --- a/drivers/gpu/drm/i915/display/intel_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_backlight.c
> @@ -1388,7 +1388,8 @@ static int vlv_setup_backlight(struct intel_connector
> *connector, enum pipe pipe
> ctl = intel_de_read(i915, VLV_BLC_PWM_CTL(pipe));
> panel->backlight.pwm_level_max = ctl >> 16;
>
> - if (!panel->backlight.pwm_level_max)
> + if (!panel->backlight.pwm_level_max ||
> + intel_has_quirk(i915, QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY))
> panel->backlight.pwm_level_max =
> get_backlight_max_vbt(connector);
I think it would be better if we did:
if (!intel_has_quirk(i915, QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY)) {
ctl = intel_de_read(i915, VLV_BLC_PWM_CTL(pipe));
panel->backlight.pwm_level_max = ctl >> 16;
} else {
panel->backlight.pwm_level_max = 0;
}
if (!panel->backlight.pwm_level_max)
panel->backlight.pwm_level_max =
get_backlight_max_vbt(connector);
The "else" branch can potentially be omitted if we know that backlight
member is initialized to 0 (I suspect it is).
>
> if (!panel->backlight.pwm_level_max)
> diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c
> b/drivers/gpu/drm/i915/display/intel_quirks.c
> index a280448df771a..ff6cb499428ce 100644
> --- a/drivers/gpu/drm/i915/display/intel_quirks.c
> +++ b/drivers/gpu/drm/i915/display/intel_quirks.c
> @@ -65,6 +65,12 @@ static void quirk_no_pps_backlight_power_hook(struct
> drm_i915_private *i915)
> drm_info(&i915->drm, "Applying no pps backlight power quirk\n");
> }
>
> +static void quirk_ignore_default_pwm_frequency(struct drm_i915_private *i915)
> +{
> + intel_set_quirk(i915, QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY);
> + drm_info(&i915->drm, "Applying ignore default pwm frequency quirk");
> +}
> +
> struct intel_quirk {
> int device;
> int subsystem_vendor;
> @@ -90,6 +96,12 @@ static int intel_dmi_no_pps_backlight(const struct
> dmi_system_id *id)
> return 1;
> }
>
> +static int intel_dmi_ignore_default_pwm_frequency(const struct dmi_system_id
> *id)
> +{
> + DRM_INFO("Default PWM frequency is incorrect and is overridden on
> %s\n", id->ident);
> + return 1;
> +}
> +
> static const struct intel_dmi_quirk intel_dmi_quirks[] = {
> {
> .dmi_id_list = &(const struct dmi_system_id[]) {
> @@ -136,6 +148,20 @@ static const struct intel_dmi_quirk intel_dmi_quirks[] =
> {
> },
> .hook = quirk_no_pps_backlight_power_hook,
> },
> + {
> + .dmi_id_list = &(const struct dmi_system_id[]) {
> + {
> + .callback =
> intel_dmi_ignore_default_pwm_frequency,
> + .ident = "Cybernet T10C Tablet",
> + .matches = {DMI_EXACT_MATCH(DMI_BOARD_VENDOR,
> + "Cybernet
> Manufacturing Inc."),
> + DMI_EXACT_MATCH(DMI_BOARD_NAME,
> "T10C Tablet"),
> + },
> + },
> + { }
> + },
> + .hook = quirk_ignore_default_pwm_frequency,
> + },
> };
>
> static struct intel_quirk intel_quirks[] = {
> diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h
> b/drivers/gpu/drm/i915/display/intel_quirks.h
> index 10a4d163149fd..70589505e5a0e 100644
> --- a/drivers/gpu/drm/i915/display/intel_quirks.h
> +++ b/drivers/gpu/drm/i915/display/intel_quirks.h
> @@ -17,6 +17,7 @@ enum intel_quirk_id {
> QUIRK_INVERT_BRIGHTNESS,
> QUIRK_LVDS_SSC_DISABLE,
> QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
> + QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY
You want a trailing comma here.
> };
>
> void intel_init_quirks(struct drm_i915_private *i915);
> --
> 2.42.0.655.g421f12c284-goog
>
Thanks.
--
Dmitry
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/6] drm/i915: Add ability for tracking buffer objects per client (rev5)
== Series Details == Series: series starting with [CI,1/6] drm/i915: Add ability for tracking buffer objects per client (rev5) URL : https://patchwork.freedesktop.org/series/126064/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/6] drm/i915: Add ability for tracking buffer objects per client (rev5)
== Series Details ==
Series: series starting with [CI,1/6] drm/i915: Add ability for tracking buffer
objects per client (rev5)
URL : https://patchwork.freedesktop.org/series/126064/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13856 -> Patchwork_126064v5
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/index.html
Participating hosts (34 -> 32)
--
Additional (1): fi-kbl-soraka
Missing(3): bat-rpls-1 bat-dg2-9 bat-dg2-8
Known issues
Here are the changes found in Patchwork_126064v5 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3
other tests skip
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_module_load@load:
- fi-kbl-soraka: NOTRUN -> [DMESG-WARN][3] ([i915#1982])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/fi-kbl-soraka/igt@i915_module_l...@load.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][4] ([i915#1886])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_dsc@dsc-basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271]) +9 other tests skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/fi-kbl-soraka/igt@kms_...@dsc-basic.html
Possible fixes
* igt@i915_module_load@reload:
- fi-skl-6600u: [DMESG-WARN][6] ([i915#1982]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-skl-6600u/igt@i915_module_l...@reload.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/fi-skl-6600u/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [DMESG-FAIL][8] ([i915#5334]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_frontbuffer_tracking@basic:
- fi-bsw-nick:[FAIL][10] ([i915#9276]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-bsw-nick/igt@kms_frontbuffer_track...@basic.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/fi-bsw-nick/igt@kms_frontbuffer_track...@basic.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][12] ([i915#8668]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
* igt@kms_psr@sprite_plane_onoff:
- bat-jsl-3: [SKIP][14] -> [PASS][15] +3 other tests pass
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#7359]: https://gitlab.freedesktop.org/drm/intel/issues/7359
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#8981]: https://gitlab.freedesktop.org/drm/intel/issues/8981
[i915#9276]: https://gitlab.freedesktop.org/drm/intel/issues/9276
Build changes
-
* Linux: CI_DRM_13856 -> Patchwork_126064v5
CI-20190529: 20190529
CI_DRM_13856: b81818fa6745cf79a86da57dc3a379bd80c7ea5f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7580: 847ee1e7d365e2fb08bf4198d3bf5ee8a852649f @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_126064v5: b81818fa6745cf79a86da57dc3a379bd80c7ea5f @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
f3cddb7510e8 drm/i915: Impleme
[Intel-gfx] [PATCH] drm/i915: Read a shadowed mmio register for ggtt flush
We read RENDER_HEAD as a part of the flush. If GT is in deeper sleep states, this could lead to read errors since we are not using a forcewake. Safer to read a shadowed register instead. Cc: John Harrison Cc: Daniele Ceraolo Spurio Signed-off-by: Vinay Belgaumkar --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index ed32bf5b1546..ea814ea5f700 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -451,7 +451,7 @@ void intel_gt_flush_ggtt_writes(struct intel_gt *gt) spin_lock_irqsave(&uncore->lock, flags); intel_uncore_posting_read_fw(uncore, -RING_HEAD(RENDER_RING_BASE)); +RING_TAIL(RENDER_RING_BASE)); spin_unlock_irqrestore(&uncore->lock, flags); } } -- 2.38.1
Re: [Intel-gfx] [PATCH] drm/i915: Read a shadowed mmio register for ggtt flush
On Thu, Nov 09, 2023 at 11:21:48AM -0800, Vinay Belgaumkar wrote: > We read RENDER_HEAD as a part of the flush. If GT is in > deeper sleep states, this could lead to read errors since we are > not using a forcewake. Safer to read a shadowed register instead. IIRC shadowing is only thing for writes, not reads. > > Cc: John Harrison > Cc: Daniele Ceraolo Spurio > Signed-off-by: Vinay Belgaumkar > --- > drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c > b/drivers/gpu/drm/i915/gt/intel_gt.c > index ed32bf5b1546..ea814ea5f700 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c > @@ -451,7 +451,7 @@ void intel_gt_flush_ggtt_writes(struct intel_gt *gt) > > spin_lock_irqsave(&uncore->lock, flags); > intel_uncore_posting_read_fw(uncore, > - RING_HEAD(RENDER_RING_BASE)); > + RING_TAIL(RENDER_RING_BASE)); > spin_unlock_irqrestore(&uncore->lock, flags); > } > } > -- > 2.38.1 -- Ville Syrjälä Intel
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mtl: C20 state verification (rev4)
== Series Details ==
Series: drm/i915/mtl: C20 state verification (rev4)
URL : https://patchwork.freedesktop.org/series/125855/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13856 -> Patchwork_125855v4
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125855v4/index.html
Participating hosts (34 -> 32)
--
Additional (1): fi-hsw-4770
Missing(3): bat-rpls-1 bat-dg2-9 bat-dg2-8
Known issues
Here are the changes found in Patchwork_125855v4 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#5190])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125855v4/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
- fi-hsw-4770:NOTRUN -> [SKIP][2] ([fdo#109271]) +12 other tests
skip
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125855v4/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-a-vga-1.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-vga-1:
- fi-hsw-4770:NOTRUN -> [DMESG-WARN][3] ([i915#8841]) +6 other
tests dmesg-warn
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125855v4/fi-hsw-4770/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-vga-1.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1072]) +3
other tests skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125855v4/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
Possible fixes
* igt@i915_module_load@reload:
- fi-skl-6600u: [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-skl-6600u/igt@i915_module_l...@reload.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125855v4/fi-skl-6600u/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [DMESG-FAIL][7] ([i915#5334]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125855v4/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][9] ([i915#8668]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125855v4/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
* igt@kms_psr@sprite_plane_onoff:
- bat-jsl-3: [SKIP][11] -> [PASS][12] +3 other tests pass
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125855v4/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
Build changes
-
* Linux: CI_DRM_13856 -> Patchwork_125855v4
CI-20190529: 20190529
CI_DRM_13856: b81818fa6745cf79a86da57dc3a379bd80c7ea5f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7580: 847ee1e7d365e2fb08bf4198d3bf5ee8a852649f @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_125855v4: b81818fa6745cf79a86da57dc3a379bd80c7ea5f @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
cca2dd2b04d8 drm/i915/mtl: C20 state verification
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125855v4/index.html
Re: [Intel-gfx] [PULL] drm-misc-next
On Mon, Nov 6, 2023 at 5:55 AM Maxime Ripard wrote: > On Mon, Nov 06, 2023 at 11:37:34AM +0100, Thomas Hellström wrote: > > On 11/6/23 11:20, Maxime Ripard wrote: > > > On Mon, Nov 06, 2023 at 11:01:51AM +0100, Thomas Hellström wrote: > > > > Hi, David. > > > > > > > > On 11/3/23 17:37, David Edelsohn wrote: > > > > > Dual-license drm_gpuvm to GPL-2.0 OR MIT. > > > > > diff --git a/drivers/gpu/drm/drm_gpuvm.c > b/drivers/gpu/drm/drm_gpuvm.c > > > > > index 02ce6baacdad..08c088319652 100644 --- > > > > > a/drivers/gpu/drm/drm_gpuvm.c < > https://cgit.freedesktop.org/drm/drm-misc/tree/drivers/gpu/drm/drm_gpuvm.c?id=6f2eeef4a0aa9791bbba9d353641a6e067bb86c1 > > > > > > > +++ b/drivers/gpu/drm/drm_gpuvm.c < > https://cgit.freedesktop.org/drm/drm-misc/tree/drivers/gpu/drm/drm_gpuvm.c?id=f7749a549b4f4db0c02e6b3d3800ea400dd76c12 > > > > > > > @@ -1,4 +1,4 @@ > > > > > -// SPDX-License-Identifier: GPL-2.0-only > > > > > +// SPDX-License-Identifier: GPL-2.0 OR MIT > > > > > /* > > > > > * Copyright (c) 2022 Red Hat. > > > > > * > > > > > The above SPDX License Identifier change is incorrect and no longer > > > > > valid. The change misunderstood the syntax of SPDX license > identifiers > > > > > and boolean operations. GPL-2.0-only is the name of the license > and means > > > > > GPL 2.0 only, as opposed to GPL 2.0 or later. The "only" does not > > > > > refer to restrictions on other licenses in the identifier and > should not > > > > > have been > > > > > removed. The hyphens designated that the name was a single unit. > > > > > The SPDX License Identifier boolean operators, such as OR, are a > > > > > separate layer > > > > > of syntax. > > > > > The SPDX License Identifier should be > > > > > GPL-2.0-only OR MIT > > > > > Thanks, David > > > > The author has acked the change / relicensing, which is also > described in > > > > the commit title so could you please elaborate why you think it is > not > > > > valid? > > > I think their point isn't so much about the license itself but rather > > > the SPDX syntax to express it. > > > > > > Maxime > > > > Hm. There are a pretty large number of these in drm with the same syntax: > > > > SPDX-License-Identifier: GPL-2.0 OR MIT > > > > So I read it as whe shouldn't have change "Licence A" to "Licence B OR > > C" but instead should have changed it to "Licence A OR C", hence the > > *change* (rather than the syntax) would no longer be valid. > > > > Perhaps I have had too little coffee this morning. > > > > I'd appreciate if David could clarify. > > Either way, one of the issue is that GPL-2.0 was deprecated in favour of > GPL-2.0-only > > https://spdx.org/licenses/GPL-2.0.html > > So you effectively changed the preferred syntax to the deprecated one in > the process of adding the new license. > > I think that's what David was saying, but there might be something else :) > Yes, that is what I was trying to express. And thanks for posting the patch to correct the name of the identifier. I'm not requesting that all uses of the deprecated identifier be changed in the Linux kernel, but it would be good to not regress. Thanks, David
Re: [Intel-gfx] [PATCH] drm/i915: Read a shadowed mmio register for ggtt flush
On 11/9/2023 11:30 AM, Ville Syrjälä wrote: On Thu, Nov 09, 2023 at 11:21:48AM -0800, Vinay Belgaumkar wrote: We read RENDER_HEAD as a part of the flush. If GT is in deeper sleep states, this could lead to read errors since we are not using a forcewake. Safer to read a shadowed register instead. IIRC shadowing is only thing for writes, not reads. Sure, but reading from a shadowed register does return the cached value (even though we don't care about the vakue here). When GT is in deeper sleep states, it is better to read a shadowed (cached) value instead of trying to attempt an mmio register read without a force wake anyways. Thanks, Vinay. Cc: John Harrison Cc: Daniele Ceraolo Spurio Signed-off-by: Vinay Belgaumkar --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index ed32bf5b1546..ea814ea5f700 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -451,7 +451,7 @@ void intel_gt_flush_ggtt_writes(struct intel_gt *gt) spin_lock_irqsave(&uncore->lock, flags); intel_uncore_posting_read_fw(uncore, -RING_HEAD(RENDER_RING_BASE)); +RING_TAIL(RENDER_RING_BASE)); spin_unlock_irqrestore(&uncore->lock, flags); } } -- 2.38.1
Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add a selftest for FAST_REQUEST errors
On 11/6/2023 3:59 PM, john.c.harri...@intel.com wrote:
From: John Harrison
There is a mechanism for reporting errors from fire and forget H2G
messages. This is the only way to find out about almost any error in
the GuC backend submission path. So it would be useful to know that it
is working.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc.h| 4 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 ++
drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 122 ++
3 files changed, 135 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 2b6dfe62c8f2a..e22c12ce245ad 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -297,6 +297,10 @@ struct intel_guc {
* @number_guc_id_stolen: The number of guc_ids that have been stolen
*/
int number_guc_id_stolen;
+ /**
+* @fast_response_selftest: Backdoor to CT handler for fast response
selftest
+*/
+ u32 fast_response_selftest;
#endif
};
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index 89e314b3756bb..9d958afb78b7f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -1076,6 +1076,15 @@ static int ct_handle_response(struct intel_guc_ct *ct,
struct ct_incoming_msg *r
found = true;
break;
}
+
+#ifdef CONFIG_DRM_I915_SELFTEST
+ if (!found && ct_to_guc(ct)->fast_response_selftest) {
+ CT_DEBUG(ct, "Assuming unsolicited response due to FAST_REQUEST
selftest\n");
+ ct_to_guc(ct)->fast_response_selftest++;
+ found = 1;
found = true ? it's the same thing, but it's cleaner to assign boolean
values to bool variables
+ }
+#endif
+
if (!found) {
CT_ERROR(ct, "Unsolicited response message: len %u, data %#x (fence
%u, last %u)\n",
len, hxg[0], fence, ct->requests.last_fence);
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
index bfb72143566f6..97fbbb396336c 100644
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
@@ -286,11 +286,133 @@ static int intel_guc_steal_guc_ids(void *arg)
return ret;
}
+/*
+ * Send a context schedule H2G message with an invalid context id.
+ * This should generate a GUC_RESULT_INVALID_CONTEXT response.
+ */
+static int bad_h2g(struct intel_guc *guc)
+{
+ u32 action[3], len = 0;
AFAICS This is a 2 DW command, so you can use action[2].
+
+ action[len++] = INTEL_GUC_ACTION_SCHED_CONTEXT;
+ action[len++] = 0x12345678;
+
+ return intel_guc_send_nb(guc, action, len, 0);
+}
+
+/*
+ * Set a spinner running to make sure the system is alive and active,
+ * then send a bad but asynchronous H2G command and wait to see if an
+ * error response is returned. If no response is received or if the
+ * spinner dies then the test will fail.
+ */
+#define FAST_RESPONSE_TIMEOUT_MS 1000
+static int intel_guc_fast_request(void *arg)
+{
+ struct intel_gt *gt = arg;
+ struct intel_context *ce;
+ struct igt_spinner spin;
+ struct i915_request *rq;
+ intel_wakeref_t wakeref;
+ struct intel_engine_cs *engine = intel_selftest_find_any_engine(gt);
+ ktime_t before, now, delta;
+ bool spinning = false;
+ u64 delta_ms;
+ int ret = 0;
+
+ if (!engine)
+ return 0;
+
+ wakeref = intel_runtime_pm_get(gt->uncore->rpm);
+
+ ce = intel_context_create(engine);
+ if (IS_ERR(ce)) {
+ ret = PTR_ERR(ce);
+ gt_err(gt, "Failed to create spinner request: %pe\n", ce);
+ goto err_pm;
+ }
+
+ ret = igt_spinner_init(&spin, engine->gt);
+ if (ret) {
+ gt_err(gt, "Failed to create spinner: %pe\n", ERR_PTR(ret));
+ goto err_pm;
+ }
+ spinning = true;
+
+ rq = igt_spinner_create_request(&spin, ce, MI_ARB_CHECK);
+ intel_context_put(ce);
+ if (IS_ERR(rq)) {
+ ret = PTR_ERR(rq);
+ gt_err(gt, "Failed to create spinner request: %pe\n", rq);
+ goto err_spin;
+ }
+
+ ret = request_add_spin(rq, &spin);
+ if (ret) {
+ gt_err(gt, "Failed to add Spinner request: %pe\n",
ERR_PTR(ret));
+ goto err_rq;
+ }
+
+ gt->uc.guc.fast_response_selftest = 1;
+
+ ret = bad_h2g(>->uc.guc);
+ if (ret) {
+ gt_err(gt, "Failed to send H2G: %pe\n", ERR_PTR(ret));
+ goto err_rq;
+ }
+
+ before = ktime_get();
+ while (gt->uc.guc.fast_response_selftest == 1) {
+ ret = i915_request_wait(rq, 0, 1);
+ if (ret != -ETIME) {
+
Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Fix for potential false positives in GuC hang selftest
On 11/6/2023 3:59 PM, john.c.harri...@intel.com wrote:
From: John Harrison
Noticed that the hangcheck selftest is submitting a non-preemptoble
spinner. That means that even if the GuC does not die, the heartbeat
will still kick in and trigger a reset. Which is rather defeating the
purpose of the test - to verify that the heartbeat will kick in if the
GuC itself has died. The test is deliberately killing the GuC, so it
should never hit the case of a non-dead GuC. But it is not impossible
that the kill might fail at some future point due to other driver
re-work.
So, make the spinner pre-emptible. That way the heartbeat can get
through if the GuC is alive and context switching. Thus a reset only
happens if the GuC dies. Thus, if the kill should stop working the
test will now fail rather than claim to pass.
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
Daniele
---
drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
b/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
index 34b5d952e2bcb..26fdc392fce6c 100644
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc_hangcheck.c
@@ -74,7 +74,7 @@ static int intel_hang_guc(void *arg)
goto err;
}
- rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+ rq = igt_spinner_create_request(&spin, ce, MI_ARB_CHECK);
intel_context_put(ce);
if (IS_ERR(rq)) {
ret = PTR_ERR(rq);
Re: [Intel-gfx] [PATCH] drm/i915: Read a shadowed mmio register for ggtt flush
On Thu, Nov 09, 2023 at 12:01:26PM -0800, Belgaumkar, Vinay wrote: > > On 11/9/2023 11:30 AM, Ville Syrjälä wrote: > > On Thu, Nov 09, 2023 at 11:21:48AM -0800, Vinay Belgaumkar wrote: > >> We read RENDER_HEAD as a part of the flush. If GT is in > >> deeper sleep states, this could lead to read errors since we are > >> not using a forcewake. Safer to read a shadowed register instead. > > IIRC shadowing is only thing for writes, not reads. > > Sure, but reading from a shadowed register does return the cached value Does it? I suppose that would make some sense, but I don't recall that ever being stated anywhere. At least before the shadow registers existed reads would just give you zeroes when not awake. > (even though we don't care about the vakue here). When GT is in deeper > sleep states, it is better to read a shadowed (cached) value instead of > trying to attempt an mmio register read without a force wake anyways. So you're saying reads from non-shadowed registers fails somehow when not awake? How exactly do they fail? And when reading from a shadowed register that failure never happens? > > Thanks, > > Vinay. > > > > >> Cc: John Harrison > >> Cc: Daniele Ceraolo Spurio > >> Signed-off-by: Vinay Belgaumkar > >> --- > >> drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c > >> b/drivers/gpu/drm/i915/gt/intel_gt.c > >> index ed32bf5b1546..ea814ea5f700 100644 > >> --- a/drivers/gpu/drm/i915/gt/intel_gt.c > >> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c > >> @@ -451,7 +451,7 @@ void intel_gt_flush_ggtt_writes(struct intel_gt *gt) > >> > >>spin_lock_irqsave(&uncore->lock, flags); > >>intel_uncore_posting_read_fw(uncore, > >> - RING_HEAD(RENDER_RING_BASE)); > >> + RING_TAIL(RENDER_RING_BASE)); > >>spin_unlock_irqrestore(&uncore->lock, flags); > >>} > >> } > >> -- > >> 2.38.1 -- Ville Syrjälä Intel
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm: Add drm_vblank_work_flush_all().
== Series Details == Series: series starting with [1/3] drm: Add drm_vblank_work_flush_all(). URL : https://patchwork.freedesktop.org/series/126202/ State : warning == Summary == Error: dim checkpatch failed abec0d586564 drm: Add drm_vblank_work_flush_all(). -:33: WARNING:WAITQUEUE_ACTIVE: waitqueue_active without comment #33: FILE: drivers/gpu/drm/drm_vblank_work.c:249: + waitqueue_active(&vblank->work_wait_queue), total: 0 errors, 1 warnings, 0 checks, 41 lines checked cb714c854956 drm/i915: Use vblank worker to unpin old legacy cursor fb safely 30be1a454d5a drm/i915: Use a different vblank worker for atomic unpin -:96: WARNING:LONG_LINE: line length of 105 exceeds 100 columns #96: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:746: + drm_crtc_accurate_vblank_count(&crtc->base) + 1, total: 0 errors, 1 warnings, 0 checks, 74 lines checked
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm: Add drm_vblank_work_flush_all().
== Series Details == Series: series starting with [1/3] drm: Add drm_vblank_work_flush_all(). URL : https://patchwork.freedesktop.org/series/126202/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm: Add drm_vblank_work_flush_all().
== Series Details == Series: series starting with [1/3] drm: Add drm_vblank_work_flush_all(). URL : https://patchwork.freedesktop.org/series/126202/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13856 -> Patchwork_126202v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126202v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126202v1, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/index.html Participating hosts (34 -> 34) -- Additional (1): fi-hsw-4770 Missing(1): bat-dg2-8 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126202v1: ### IGT changes ### Possible regressions * igt@i915_selftest@live@ring_submission: - fi-hsw-4770:NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/fi-hsw-4770/igt@i915_selftest@live@ring_submission.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-5: - bat-adlp-11:[PASS][2] -> [FAIL][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html Known issues Here are the changes found in Patchwork_126202v1 that come from known issues: ### IGT changes ### Issues hit * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - fi-hsw-4770:NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#5190]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1: - fi-hsw-4770:NOTRUN -> [SKIP][5] ([fdo#109271]) +12 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-a-vga-1.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-c-dp-5: - bat-adlp-11:[PASS][6] -> [DMESG-FAIL][7] ([i915#6868]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1: - fi-rkl-11600: [PASS][8] -> [FAIL][9] ([fdo#103375]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-rkl-11600/igt@kms_pipe_crc_basic@suspend-read-...@pipe-b-hdmi-a-1.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/fi-rkl-11600/igt@kms_pipe_crc_basic@suspend-read-...@pipe-b-hdmi-a-1.html * igt@kms_psr@sprite_plane_onoff: - fi-hsw-4770:NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1072]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html Possible fixes * igt@gem_exec_suspend@basic-s0@lmem0: - bat-dg2-9: [INCOMPLETE][11] ([i915#9275]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html * igt@i915_module_load@reload: - fi-skl-6600u: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-skl-6600u/igt@i915_module_l...@reload.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/fi-skl-6600u/igt@i915_module_l...@reload.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1: - bat-rplp-1: [ABORT][15] ([i915#8668]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html * igt@kms_psr@sprite_plane_onoff: - bat-jsl-3: [SKIP][17] -> [PASS][18] +3 other tests pass [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126202v1/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/vma: Fix potential UAF on multi-tile platforms (rev3)
== Series Details == Series: drm/i915/vma: Fix potential UAF on multi-tile platforms (rev3) URL : https://patchwork.freedesktop.org/series/126012/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13856 -> Patchwork_126012v3 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126012v3 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126012v3, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/index.html Participating hosts (34 -> 34) -- Additional (1): fi-kbl-soraka Missing(1): bat-dg2-8 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126012v3: ### IGT changes ### Possible regressions * igt@i915_suspend@basic-s2idle-without-i915: - bat-adlp-11:NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@i915_susp...@basic-s2idle-without-i915.html Known issues Here are the changes found in Patchwork_126012v3 that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html - bat-adln-1: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adln-1/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-rplp-1: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@random-engines: - bat-adlp-6: NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-6/igt@gem_lmem_swapp...@random-engines.html * igt@gem_lmem_swapping@verify-random: - bat-adlp-11:NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@gem_lmem_swapp...@verify-random.html * igt@i915_pm_rps@basic-api: - bat-adlp-6: NOTRUN -> [SKIP][8] ([i915#6621]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-6/igt@i915_pm_...@basic-api.html - bat-rplp-1: NOTRUN -> [SKIP][9] ([i915#6621]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1/igt@i915_pm_...@basic-api.html - bat-adlp-11:NOTRUN -> [SKIP][10] ([i915#6621]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@i915_pm_...@basic-api.html - bat-adln-1: NOTRUN -> [SKIP][11] ([i915#6621]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adln-1/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][12] ([i915#1886]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@kms_dsc@dsc-basic: - fi-kbl-soraka: NOTRUN -> [SKIP][13] ([fdo#109271]) +9 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@kms_...@dsc-basic.html * igt@kms_psr@primary_page_flip: - bat-rplp-1: NOTRUN -> [SKIP][14] ([i915#1072]) +3 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1/igt@kms_psr@primary_page_flip.html - bat-adlp-11:NOTRUN -> [SKIP][15] ([i915#1072]) +3 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@kms_psr@primary_page_flip.html * igt@kms_setmode@basic-clone-single-crtc: - bat-adlp-6: NOTRUN -> [SKIP][16] ([i915#3555]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-6/igt@kms_setm...@basic-clone-single-crtc.html - bat-rplp-1: NOTRUN -> [SKIP][17] ([i915#3555]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1/igt@kms_setm...@basic-clone-single-crtc.html - bat-adlp-11:NOTRUN -> [SKIP][18] ([i915#3555]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: abstract plane protection check
== Series Details ==
Series: series starting with [1/2] drm/i915: abstract plane protection check
URL : https://patchwork.freedesktop.org/series/126205/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13856 -> Patchwork_126205v1
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_126205v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_126205v1, please notify your bug team
(lgci.bug.fil...@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v1/index.html
Participating hosts (34 -> 33)
--
Additional (1): fi-hsw-4770
Missing(2): bat-dg2-8 fi-pnv-d510
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_126205v1:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@dmabuf:
- fi-hsw-4770:NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v1/fi-hsw-4770/igt@i915_selftest@l...@dmabuf.html
Known issues
Here are the changes found in Patchwork_126205v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#5190])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
- fi-hsw-4770:NOTRUN -> [SKIP][3] ([fdo#109271]) +12 other tests
skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v1/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-a-vga-1.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1072]) +3
other tests skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
Possible fixes
* igt@gem_exec_suspend@basic-s0@lmem0:
- bat-dg2-9: [INCOMPLETE][5] ([i915#9275]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v1/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
* igt@i915_module_load@reload:
- fi-skl-6600u: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-skl-6600u/igt@i915_module_l...@reload.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v1/fi-skl-6600u/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [DMESG-FAIL][9] ([i915#5334]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][11] ([i915#8668]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
* igt@kms_psr@sprite_plane_onoff:
- bat-jsl-3: [SKIP][13] -> [PASS][14] +3 other tests pass
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v1/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
Build changes
-
* Linux: CI_DRM_13856 -> Patchwork_126205v1
CI-20190529: 20190529
CI_DRM_13856: b81818fa6745cf79a86da57dc3a379bd80c7ea5f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7580: 847ee1e7d365e2fb08bf4198d3bf5ee8a852649f @
https://gitlab.freedesktop.o
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Read a shadowed mmio register for ggtt flush
== Series Details ==
Series: drm/i915: Read a shadowed mmio register for ggtt flush
URL : https://patchwork.freedesktop.org/series/126217/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13856 -> Patchwork_126217v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/index.html
Participating hosts (34 -> 34)
--
Additional (1): fi-hsw-4770
Missing(1): bat-dg2-8
Known issues
Here are the changes found in Patchwork_126217v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s0@smem:
- bat-dg2-9: [PASS][1] -> [INCOMPLETE][2] ([i915#9275])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:NOTRUN -> [INCOMPLETE][3] ([i915#9527])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#5190])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
- fi-hsw-4770:NOTRUN -> [SKIP][5] ([fdo#109271]) +12 other tests
skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-a-vga-1.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1072]) +3
other tests skip
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
Possible fixes
* igt@i915_module_load@reload:
- fi-skl-6600u: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-skl-6600u/igt@i915_module_l...@reload.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/fi-skl-6600u/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [DMESG-FAIL][9] ([i915#5334]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][11] ([i915#8668]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
* igt@kms_psr@sprite_plane_onoff:
- bat-jsl-3: [SKIP][13] -> [PASS][14] +3 other tests pass
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#7359]: https://gitlab.freedesktop.org/drm/intel/issues/7359
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#8981]: https://gitlab.freedesktop.org/drm/intel/issues/8981
[i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
[i915#9527]: https://gitlab.freedesktop.org/drm/intel/issues/9527
Build changes
-
* Linux: CI_DRM_13856 -> Patchwork_126217v1
CI-20190529: 20190529
CI_DRM_13856: b81818fa6745cf79a86da57dc3a379bd80c7ea5f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7580: 847ee1e7d365e2fb08bf4198d3bf5ee8a852649f @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_126217v1: b81818fa6745cf79a86da57dc3a379bd80c7ea5f @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
1412e4ebae9f drm/i915: Read a shadowed mmio register for ggtt flush
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126217v1/index
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/vma: Fix potential UAF on multi-tile platforms (rev3)
On Thursday, 9 November 2023 22:44:02 CET Patchwork wrote: > == Series Details == > > Series: drm/i915/vma: Fix potential UAF on multi-tile platforms (rev3) > URL : https://patchwork.freedesktop.org/series/126012/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_13856 -> Patchwork_126012v3 > > > Summary > --- > > **FAILURE** > > Serious unknown changes coming with Patchwork_126012v3 absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_126012v3, please notify your bug team > (lgci.bug.fil...@intel.com) to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/index.html > > Participating hosts (34 -> 34) > -- > > Additional (1): fi-kbl-soraka > Missing(1): bat-dg2-8 > > Possible new issues > --- > > Here are the unknown changes that may have been introduced in > Patchwork_126012v3: > > ### IGT changes ### > > Possible regressions > > * igt@i915_suspend@basic-s2idle-without-i915: > - bat-adlp-11:NOTRUN -> [FAIL][1] >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@i915_susp...@basic-s2idle-without-i915.html Andi, Since that issue popped up again after your re-run, I've had a closer look. The test igt@i915_suspend@basic-s2idle-without-i915 seems to be never executed on BAT ADL machines (e.g., adlp-11, adln-1) because of an abort triggered on those machines by igt@kms_pm_rpm@basic-pci-d3-state. The latter can be found below among possible fixes -- it succeeded, and that explains why igt@i915_suspend@basic-s2idle-without-i915 was executed this time, and also for my original submission (rev2). I suspect there must be an issue with adlp-11 machine that results in failures from igt@i915_suspend@basic-s2idle-without-i915. Unfortunately, that issue is not visible for now because that test is never executed on that machine. @BUG Filing, I'm no sure how re-reporting works, but once you have filters updated after my request submitted earlier today for rev2 of this patch, please also re-report results of rev3 (re-run of rev2). Thanks, Janusz > > > Known issues > > > Here are the changes found in Patchwork_126012v3 that come from known > issues: > > ### IGT changes ### > > Issues hit > > * igt@gem_huc_copy@huc-copy: > - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190]) >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html > > * igt@gem_lmem_swapping@basic: > - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 > other tests skip >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html > - bat-adln-1: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests > skip >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adln-1/igt@gem_lmem_swapp...@basic.html > > * igt@gem_lmem_swapping@parallel-random-engines: > - bat-rplp-1: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests > skip >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1/igt@gem_lmem_swapp...@parallel-random-engines.html > > * igt@gem_lmem_swapping@random-engines: > - bat-adlp-6: NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests > skip >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-6/igt@gem_lmem_swapp...@random-engines.html > > * igt@gem_lmem_swapping@verify-random: > - bat-adlp-11:NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests > skip >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@gem_lmem_swapp...@verify-random.html > > * igt@i915_pm_rps@basic-api: > - bat-adlp-6: NOTRUN -> [SKIP][8] ([i915#6621]) >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-6/igt@i915_pm_...@basic-api.html > - bat-rplp-1: NOTRUN -> [SKIP][9] ([i915#6621]) >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1/igt@i915_pm_...@basic-api.html > - bat-adlp-11:NOTRUN -> [SKIP][10] ([i915#6621]) >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@i915_pm_...@basic-api.html > - bat-adln-1: NOTRUN -> [SKIP][11] ([i915#6621]) >[11]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adln-1/igt@i915_pm_...@basic-api.html > > * igt@i915_selftest@live@gt_pm: > - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][12] ([i915#1886]) >[12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork
[Intel-gfx] [PATCH] drm/i915/gsc: Assign a uabi class number to the GSC CS
The GSC CS is not exposed to the user, so we skipped assigning a uabi
class number for it. However, the trace logs use the uabi class and
instance to identify the engine, so leaving uabi class unset makes the
GSC CS show up as the RCS in those logs.
Given that the engine is not exposed to the user, we can't add a new
case in the uabi enum, so we insted internally define a kernel
reserved class using the next free number.
Fixes: 194babe26bdc ("drm/i915/mtl: don't expose GSC command streamer to the
user")
Signed-off-by: Daniele Ceraolo Spurio
Cc: Tvrtko Ursulin
Cc: Alan Previn
Cc: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_engine_user.c | 17 -
drivers/gpu/drm/i915/gt/intel_engine_user.h | 4
drivers/gpu/drm/i915/i915_drm_client.h | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
4 files changed, 14 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 118164ddbb2e..3fd32bedd6e7 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -47,6 +47,7 @@ static const u8 uabi_classes[] = {
[VIDEO_DECODE_CLASS] = I915_ENGINE_CLASS_VIDEO,
[VIDEO_ENHANCEMENT_CLASS] = I915_ENGINE_CLASS_VIDEO_ENHANCE,
[COMPUTE_CLASS] = I915_ENGINE_CLASS_COMPUTE,
+ [OTHER_CLASS] = I915_KERNEL_RSVD_CLASS,
};
static int engine_cmp(void *priv, const struct list_head *A,
@@ -138,7 +139,7 @@ const char *intel_engine_class_repr(u8 class)
[COPY_ENGINE_CLASS] = "bcs",
[VIDEO_DECODE_CLASS] = "vcs",
[VIDEO_ENHANCEMENT_CLASS] = "vecs",
- [OTHER_CLASS] = "other",
+ [OTHER_CLASS] = "gsc",
[COMPUTE_CLASS] = "ccs",
};
@@ -216,14 +217,8 @@ void intel_engines_driver_register(struct drm_i915_private
*i915)
if (intel_gt_has_unrecoverable_error(engine->gt))
continue; /* ignore incomplete engines */
- /*
-* We don't want to expose the GSC engine to the users, but we
-* still rename it so it is easier to identify in the debug logs
-*/
- if (engine->id == GSC0) {
- engine_rename(engine, "gsc", 0);
- continue;
- }
+ /* The only engine we expect in OTHER_CLASS is GSC0 */
+ GEM_WARN_ON(engine->class == OTHER_CLASS && engine->id != GSC0);
GEM_BUG_ON(engine->class >= ARRAY_SIZE(uabi_classes));
engine->uabi_class = uabi_classes[engine->class];
@@ -238,6 +233,10 @@ void intel_engines_driver_register(struct drm_i915_private
*i915)
intel_engine_class_repr(engine->class),
engine->uabi_instance);
+ /* We don't want to expose the GSC engine to the users */
+ if (engine->id == GSC0)
+ continue;
+
rb_link_node(&engine->uabi_node, prev, p);
rb_insert_color(&engine->uabi_node, &i915->uabi_engines);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.h
b/drivers/gpu/drm/i915/gt/intel_engine_user.h
index 3dc7e8ab9fbc..dd31805b2a5a 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.h
@@ -11,6 +11,10 @@
struct drm_i915_private;
struct intel_engine_cs;
+#define I915_LAST_UABI_ENGINE_CLASS I915_ENGINE_CLASS_COMPUTE
+#define I915_KERNEL_RSVD_CLASS (I915_LAST_UABI_ENGINE_CLASS + 1)
+#define I915_MAX_UABI_CLASSES (I915_KERNEL_RSVD_CLASS + 1)
+
struct intel_engine_cs *
intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance);
diff --git a/drivers/gpu/drm/i915/i915_drm_client.h
b/drivers/gpu/drm/i915/i915_drm_client.h
index 67816c912bca..c42cb2511348 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.h
+++ b/drivers/gpu/drm/i915/i915_drm_client.h
@@ -12,7 +12,7 @@
#include
-#define I915_LAST_UABI_ENGINE_CLASS I915_ENGINE_CLASS_COMPUTE
+#include "gt/intel_engine_user.h"
struct drm_file;
struct drm_printer;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f3be9033a93f..a718b4cb5a2d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -238,7 +238,7 @@ struct drm_i915_private {
struct list_head uabi_engines_list;
struct rb_root uabi_engines;
};
- unsigned int engine_uabi_class_count[I915_LAST_UABI_ENGINE_CLASS + 1];
+ unsigned int engine_uabi_class_count[I915_MAX_UABI_CLASSES];
/* protects the irq masks */
spinlock_t irq_lock;
--
2.41.0
[Intel-gfx] [PATCH] drm/i915/huc: Stop printing about unsupported HuC on MTL
On MTL, the HuC is only supported on the media GT, so our validation check on the module parameter detects an inconsistency on the root GT (the modparams asks to enable HuC, but the support is not there) and prints the following info message: [drm] GT0: Incompatible option enable_guc=3 - HuC is not supported! This can be confusing to the user and make them think that something is wrong when it isn't, so we need to silence it. Given that any platform that supports HuC also supports GuC, if a user tries to enable HuC on a platform that really doesn't support it they'll already see a message about GuC not being supported, so instead of just silencing the HuC message on newer platforms we can just get rid of it entirely. Signed-off-by: Daniele Ceraolo Spurio Cc: John Harrison --- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c index 27f6561dd731..3872d309ed31 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c @@ -106,11 +106,6 @@ static void __confirm_options(struct intel_uc *uc) gt_info(gt, "Incompatible option enable_guc=%d - %s\n", i915->params.enable_guc, "GuC is not supported!"); - if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC && - !intel_uc_supports_huc(uc)) - gt_info(gt, "Incompatible option enable_guc=%d - %s\n", - i915->params.enable_guc, "HuC is not supported!"); - if (i915->params.enable_guc & ENABLE_GUC_SUBMISSION && !intel_uc_supports_guc_submission(uc)) gt_info(gt, "Incompatible option enable_guc=%d - %s\n", -- 2.41.0
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: abstract plane protection check (rev2)
== Series Details == Series: series starting with [1/2] drm/i915: abstract plane protection check (rev2) URL : https://patchwork.freedesktop.org/series/126205/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13856 -> Patchwork_126205v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126205v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126205v2, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/index.html Participating hosts (34 -> 35) -- Additional (2): fi-kbl-soraka fi-hsw-4770 Missing(1): fi-pnv-d510 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126205v2: ### IGT changes ### Possible regressions * igt@i915_selftest@live@guc_hang: - fi-hsw-4770:NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/fi-hsw-4770/igt@i915_selftest@live@guc_hang.html * igt@i915_suspend@basic-s3-without-i915: - fi-cfl-8109u: [PASS][2] -> [ABORT][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/fi-cfl-8109u/igt@i915_susp...@basic-s3-without-i915.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/fi-cfl-8109u/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-5: - bat-adlp-11:[PASS][4] -> [FAIL][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-adlp-11/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-5.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/bat-adlp-11/igt@kms_pipe_crc_basic@nonblocking-...@pipe-d-dp-5.html Known issues Here are the changes found in Patchwork_126205v2 that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_softpin@allocator-basic-reserve: - fi-hsw-4770:NOTRUN -> [SKIP][8] ([fdo#109271]) +12 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/fi-hsw-4770/igt@gem_soft...@allocator-basic-reserve.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][9] ([i915#1886]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_suspend@basic-s3-without-i915: - bat-dg2-8: NOTRUN -> [SKIP][10] ([i915#6645]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/bat-dg2-8/igt@i915_susp...@basic-s3-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - fi-hsw-4770:NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#5190]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-kbl-soraka: NOTRUN -> [SKIP][12] ([fdo#109271]) +9 other tests skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/fi-kbl-soraka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-dp-5: - bat-adlp-11:[PASS][13] -> [DMESG-FAIL][14] ([i915#6868]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-adlp-11/igt@kms_pipe_crc_basic@nonblocking-...@pipe-c-dp-5.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/bat-adlp-11/igt@kms_pipe_crc_basic@nonblocking-...@pipe-c-dp-5.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-dp-5: - bat-adlp-11:[PASS][15] -> [ABORT][16] ([i915#8668]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13856/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-b-dp-5.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-b-dp-5.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-d-dp-1: - bat-dg2-8: NOTRUN -> [INCOMPLETE][17] ([i915#9280]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v2/bat-dg2-8/igt@kms_pipe_crc_basic@suspend-read-...@pipe-d-dp-1.html
[Intel-gfx] [PATCH 0/2] Don't send double context enable/disable requests
From: John Harrison The driver could sometimes send context enable/disable requests when a previous request was still pending. This is not allowed. So stop doing it. Signed-off-by: John Harrison John Harrison (2): drm/i915/guc: Don't double enable a context drm/i915/guc: Don't disable a context whose enable is still pending .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 33 +++ 1 file changed, 26 insertions(+), 7 deletions(-) -- 2.41.0
[Intel-gfx] [PATCH 2/2] drm/i915/guc: Don't disable a context whose enable is still pending
From: John Harrison
Various processes involve requesting GuC to disable a given context.
However context enable/disable is an asynchronous process in the GuC.
Thus, it is possible the previous enable request is still being
processed when the disable request is triggered. Having both enable
and disable in flight concurrently is illegal - GuC will return an
error and fail the second operation. The KMD side handler for the
completion message also can't cope with having both pending flags set.
So delay the disable request until it is safe to send.
Signed-off-by: John Harrison
---
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 31 +++
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index d399e4d238c10..8c34b0a5abf9a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -3150,7 +3150,8 @@ guc_context_revoke(struct intel_context *ce, struct
i915_request *rq,
guc_cancel_context_requests(ce);
intel_engine_signal_breadcrumbs(ce->engine);
} else if (!context_pending_disable(ce)) {
- u16 guc_id;
+ u16 guc_id = ~0;
+ bool pending_enable = context_pending_enable(ce);
/*
* We add +2 here as the schedule disable complete CTB handler
@@ -3158,7 +3159,11 @@ guc_context_revoke(struct intel_context *ce, struct
i915_request *rq,
*/
atomic_add(2, &ce->pin_count);
- guc_id = prep_context_pending_disable(ce);
+ if (pending_enable)
+ guc_id = ce->guc_id.id;
+ else
+ guc_id = prep_context_pending_disable(ce);
+
spin_unlock_irqrestore(&ce->guc_state.lock, flags);
/*
@@ -3169,7 +3174,15 @@ guc_context_revoke(struct intel_context *ce, struct
i915_request *rq,
with_intel_runtime_pm(runtime_pm, wakeref) {
__guc_context_set_preemption_timeout(guc, guc_id,
preempt_timeout_ms);
- __guc_context_sched_disable(guc, ce, guc_id);
+ if (!pending_enable)
+ __guc_context_sched_disable(guc, ce, guc_id);
+ }
+
+ if (pending_enable) {
+ /* Can't have both in flight concurrently, so try again
later... */
+ mod_delayed_work(system_unbound_wq,
+
&ce->guc_state.sched_disable_delay_work,
+msecs_to_jiffies(1));
}
} else {
if (!context_guc_id_invalid(ce))
@@ -3222,7 +3235,13 @@ static void __delay_sched_disable(struct work_struct
*wrk)
spin_lock_irqsave(&ce->guc_state.lock, flags);
- if (bypass_sched_disable(guc, ce)) {
+ if (context_pending_enable(ce)) {
+ spin_unlock_irqrestore(&ce->guc_state.lock, flags);
+ /* Can't have both in flight concurrently, so try again
later... */
+ mod_delayed_work(system_unbound_wq,
+&ce->guc_state.sched_disable_delay_work,
+msecs_to_jiffies(1));
+ } else if (bypass_sched_disable(guc, ce)) {
spin_unlock_irqrestore(&ce->guc_state.lock, flags);
intel_context_sched_disable_unpin(ce);
} else {
@@ -3257,8 +3276,8 @@ static void guc_context_sched_disable(struct
intel_context *ce)
if (bypass_sched_disable(guc, ce)) {
spin_unlock_irqrestore(&ce->guc_state.lock, flags);
intel_context_sched_disable_unpin(ce);
- } else if (!intel_context_is_closed(ce) && !guc_id_pressure(guc, ce) &&
- delay) {
+ } else if ((!intel_context_is_closed(ce) && !guc_id_pressure(guc, ce) &&
+ delay) || context_pending_enable(ce)) {
spin_unlock_irqrestore(&ce->guc_state.lock, flags);
mod_delayed_work(system_unbound_wq,
&ce->guc_state.sched_disable_delay_work,
--
2.41.0
[Intel-gfx] [PATCH 1/2] drm/i915/guc: Don't double enable a context
From: John Harrison
If a context is blocked, unblocked and subitted repeatedly in rapid
succession, the driver can end up trying to enable the context while
the previous enable request is still in flight. This can lead to much
confusion in the state tracking.
Prevent that by checking the pending enable flag before trying to
enable a context.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index d37698bd6b91a..d399e4d238c10 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -720,7 +720,7 @@ static int __guc_add_request(struct intel_guc *guc, struct
i915_request *rq)
if (unlikely(context_blocked(ce) && !intel_context_is_parent(ce)))
goto out;
- enabled = context_enabled(ce) || context_blocked(ce);
+ enabled = context_enabled(ce) || context_blocked(ce) ||
context_pending_enable(ce);
if (!enabled) {
action[len++] = INTEL_GUC_ACTION_SCHED_CONTEXT_MODE_SET;
--
2.41.0
Re: [Intel-gfx] [PATCH] drm/i915: Read a shadowed mmio register for ggtt flush
On 11/9/2023 12:35 PM, Ville Syrjälä wrote: On Thu, Nov 09, 2023 at 12:01:26PM -0800, Belgaumkar, Vinay wrote: On 11/9/2023 11:30 AM, Ville Syrjälä wrote: On Thu, Nov 09, 2023 at 11:21:48AM -0800, Vinay Belgaumkar wrote: We read RENDER_HEAD as a part of the flush. If GT is in deeper sleep states, this could lead to read errors since we are not using a forcewake. Safer to read a shadowed register instead. IIRC shadowing is only thing for writes, not reads. Sure, but reading from a shadowed register does return the cached value Does it? I suppose that would make some sense, but I don't recall that ever being stated anywhere. At least before the shadow registers existed reads would just give you zeroes when not awake. (even though we don't care about the vakue here). When GT is in deeper sleep states, it is better to read a shadowed (cached) value instead of trying to attempt an mmio register read without a force wake anyways. So you're saying reads from non-shadowed registers fails somehow when not awake? How exactly do they fail? And when reading from a shadowed register that failure never happens? We could hit problems like the one being addressed here - https://patchwork.freedesktop.org/series/125356/. Reading from a shadowed register will avoid any needless references(without a wake) to the MMIO space. Shouldn't hurt to make this change for all gens IMO. Thanks, Vinay. Thanks, Vinay. Cc: John Harrison Cc: Daniele Ceraolo Spurio Signed-off-by: Vinay Belgaumkar --- drivers/gpu/drm/i915/gt/intel_gt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index ed32bf5b1546..ea814ea5f700 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -451,7 +451,7 @@ void intel_gt_flush_ggtt_writes(struct intel_gt *gt) spin_lock_irqsave(&uncore->lock, flags); intel_uncore_posting_read_fw(uncore, -RING_HEAD(RENDER_RING_BASE)); +RING_TAIL(RENDER_RING_BASE)); spin_unlock_irqrestore(&uncore->lock, flags); } } -- 2.38.1
Re: [Intel-gfx] [PATCH 2/2] drm/i915/guc: Add a selftest for FAST_REQUEST errors
On 11/9/2023 12:33, Daniele Ceraolo Spurio wrote:
On 11/6/2023 3:59 PM, john.c.harri...@intel.com wrote:
From: John Harrison
There is a mechanism for reporting errors from fire and forget H2G
messages. This is the only way to find out about almost any error in
the GuC backend submission path. So it would be useful to know that it
is working.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 4 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 9 ++
drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 122 ++
3 files changed, 135 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 2b6dfe62c8f2a..e22c12ce245ad 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -297,6 +297,10 @@ struct intel_guc {
* @number_guc_id_stolen: The number of guc_ids that have been
stolen
*/
int number_guc_id_stolen;
+ /**
+ * @fast_response_selftest: Backdoor to CT handler for fast
response selftest
+ */
+ u32 fast_response_selftest;
#endif
};
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index 89e314b3756bb..9d958afb78b7f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -1076,6 +1076,15 @@ static int ct_handle_response(struct
intel_guc_ct *ct, struct ct_incoming_msg *r
found = true;
break;
}
+
+#ifdef CONFIG_DRM_I915_SELFTEST
+ if (!found && ct_to_guc(ct)->fast_response_selftest) {
+ CT_DEBUG(ct, "Assuming unsolicited response due to
FAST_REQUEST selftest\n");
+ ct_to_guc(ct)->fast_response_selftest++;
+ found = 1;
found = true ? it's the same thing, but it's cleaner to assign boolean
values to bool variables
Doh.
+ }
+#endif
+
if (!found) {
CT_ERROR(ct, "Unsolicited response message: len %u, data
%#x (fence %u, last %u)\n",
len, hxg[0], fence, ct->requests.last_fence);
diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
index bfb72143566f6..97fbbb396336c 100644
--- a/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc.c
@@ -286,11 +286,133 @@ static int intel_guc_steal_guc_ids(void *arg)
return ret;
}
+/*
+ * Send a context schedule H2G message with an invalid context id.
+ * This should generate a GUC_RESULT_INVALID_CONTEXT response.
+ */
+static int bad_h2g(struct intel_guc *guc)
+{
+ u32 action[3], len = 0;
AFAICS This is a 2 DW command, so you can use action[2].
Yup. Copy and paste bug.
+
+ action[len++] = INTEL_GUC_ACTION_SCHED_CONTEXT;
+ action[len++] = 0x12345678;
+
+ return intel_guc_send_nb(guc, action, len, 0);
+}
+
+/*
+ * Set a spinner running to make sure the system is alive and active,
+ * then send a bad but asynchronous H2G command and wait to see if an
+ * error response is returned. If no response is received or if the
+ * spinner dies then the test will fail.
+ */
+#define FAST_RESPONSE_TIMEOUT_MS 1000
+static int intel_guc_fast_request(void *arg)
+{
+ struct intel_gt *gt = arg;
+ struct intel_context *ce;
+ struct igt_spinner spin;
+ struct i915_request *rq;
+ intel_wakeref_t wakeref;
+ struct intel_engine_cs *engine =
intel_selftest_find_any_engine(gt);
+ ktime_t before, now, delta;
+ bool spinning = false;
+ u64 delta_ms;
+ int ret = 0;
+
+ if (!engine)
+ return 0;
+
+ wakeref = intel_runtime_pm_get(gt->uncore->rpm);
+
+ ce = intel_context_create(engine);
+ if (IS_ERR(ce)) {
+ ret = PTR_ERR(ce);
+ gt_err(gt, "Failed to create spinner request: %pe\n", ce);
+ goto err_pm;
+ }
+
+ ret = igt_spinner_init(&spin, engine->gt);
+ if (ret) {
+ gt_err(gt, "Failed to create spinner: %pe\n", ERR_PTR(ret));
+ goto err_pm;
+ }
+ spinning = true;
+
+ rq = igt_spinner_create_request(&spin, ce, MI_ARB_CHECK);
+ intel_context_put(ce);
+ if (IS_ERR(rq)) {
+ ret = PTR_ERR(rq);
+ gt_err(gt, "Failed to create spinner request: %pe\n", rq);
+ goto err_spin;
+ }
+
+ ret = request_add_spin(rq, &spin);
+ if (ret) {
+ gt_err(gt, "Failed to add Spinner request: %pe\n",
ERR_PTR(ret));
+ goto err_rq;
+ }
+
+ gt->uc.guc.fast_response_selftest = 1;
+
+ ret = bad_h2g(>->uc.guc);
+ if (ret) {
+ gt_err(gt, "Failed to send H2G: %pe\n", ERR_PTR(ret));
+ goto err_rq;
+ }
+
+ before = ktime_get();
+ while (gt->uc.guc.fast_response_selftest == 1) {
+ ret = i915_request_wait(rq, 0, 1);
+ if (ret != -ETIME) {
+ gt_err(gt, "Request wait failed: %pe\n", ERR_PTR(ret));
+ goto err_rq;
+ }
+ now = ktime_get();
+ delta = ktime_sub(now, before);
+ delta_ms = ktime_to_ms(delta);
+
+
Re: [Intel-gfx] [PATCH] drm/i915/huc: Stop printing about unsupported HuC on MTL
On 11/9/2023 15:54, Daniele Ceraolo Spurio wrote: On MTL, the HuC is only supported on the media GT, so our validation check on the module parameter detects an inconsistency on the root GT (the modparams asks to enable HuC, but the support is not there) and prints the following info message: [drm] GT0: Incompatible option enable_guc=3 - HuC is not supported! This can be confusing to the user and make them think that something is wrong when it isn't, so we need to silence it. Given that any platform that supports HuC also supports GuC, if a user tries to enable HuC on a platform that really doesn't support it they'll already see a message about GuC not being supported, so instead of just silencing the HuC message on newer platforms we can just get rid of it entirely. Not following this argument. Someone might attempt to enable HuC only and do so on a older platform that supports neither HuC nor GuC. There would be no GuC warning because GuC was not requested. But now there would also be no HuC warning either. John. Signed-off-by: Daniele Ceraolo Spurio Cc: John Harrison --- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c index 27f6561dd731..3872d309ed31 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c @@ -106,11 +106,6 @@ static void __confirm_options(struct intel_uc *uc) gt_info(gt, "Incompatible option enable_guc=%d - %s\n", i915->params.enable_guc, "GuC is not supported!"); - if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC && - !intel_uc_supports_huc(uc)) - gt_info(gt, "Incompatible option enable_guc=%d - %s\n", - i915->params.enable_guc, "HuC is not supported!"); - if (i915->params.enable_guc & ENABLE_GUC_SUBMISSION && !intel_uc_supports_guc_submission(uc)) gt_info(gt, "Incompatible option enable_guc=%d - %s\n",
[Intel-gfx] [PATCH v6] drm/i915/dsb: DSB code refactoring
Refactor DSB implementation to be compatible with Xe driver.
v1: RFC version.
v2: Make intel_dsb structure opaque from external usage. [Jani]
v3: Rebased on latest.
v4:
- Add boundary check in dsb_buffer_memset(). [Luca]
- Use size_t instead of u32. [Luca]
v5: WARN_ON() added for out of boudary case with some optimization. [Luca]
Cc: Jani Nikula
Reviewed-by: Luca Coelho
Signed-off-by: Animesh Manna
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_dsb.c | 98 +++
.../gpu/drm/i915/display/intel_dsb_buffer.c | 82
.../gpu/drm/i915/display/intel_dsb_buffer.h | 29 ++
4 files changed, 148 insertions(+), 62 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dsb_buffer.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dsb_buffer.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 239da40a401f..7e5d6a39d450 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -277,6 +277,7 @@ i915-y += \
display/intel_dpt.o \
display/intel_drrs.o \
display/intel_dsb.o \
+ display/intel_dsb_buffer.o \
display/intel_fb.o \
display/intel_fb_pin.o \
display/intel_fbc.o \
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
b/drivers/gpu/drm/i915/display/intel_dsb.c
index 78b6fe24dcd8..9598d50f68f2 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -4,9 +4,6 @@
*
*/
-#include "gem/i915_gem_internal.h"
-#include "gem/i915_gem_lmem.h"
-
#include "i915_drv.h"
#include "i915_irq.h"
#include "i915_reg.h"
@@ -14,12 +11,13 @@
#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dsb.h"
+#include "intel_dsb_buffer.h"
#include "intel_dsb_regs.h"
#include "intel_vblank.h"
#include "intel_vrr.h"
#include "skl_watermark.h"
-struct i915_vma;
+#define CACHELINE_BYTES 64
enum dsb_id {
INVALID_DSB = -1,
@@ -32,8 +30,7 @@ enum dsb_id {
struct intel_dsb {
enum dsb_id id;
- u32 *cmd_buf;
- struct i915_vma *vma;
+ struct intel_dsb_buffer dsb_buf;
struct intel_crtc *crtc;
/*
@@ -109,15 +106,17 @@ static void intel_dsb_dump(struct intel_dsb *dsb)
{
struct intel_crtc *crtc = dsb->crtc;
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
- const u32 *buf = dsb->cmd_buf;
int i;
drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] DSB %d commands {\n",
crtc->base.base.id, crtc->base.name, dsb->id);
for (i = 0; i < ALIGN(dsb->free_pos, 64 / 4); i += 4)
drm_dbg_kms(&i915->drm,
- " 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
- i * 4, buf[i], buf[i+1], buf[i+2], buf[i+3]);
+ " 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", i * 4,
+ intel_dsb_buffer_read(&dsb->dsb_buf, i),
+ intel_dsb_buffer_read(&dsb->dsb_buf, i + 1),
+ intel_dsb_buffer_read(&dsb->dsb_buf, i + 2),
+ intel_dsb_buffer_read(&dsb->dsb_buf, i + 3));
drm_dbg_kms(&i915->drm, "}\n");
}
@@ -129,8 +128,6 @@ static bool is_dsb_busy(struct drm_i915_private *i915, enum
pipe pipe,
static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw, u32 udw)
{
- u32 *buf = dsb->cmd_buf;
-
if (!assert_dsb_has_room(dsb))
return;
@@ -139,14 +136,13 @@ static void intel_dsb_emit(struct intel_dsb *dsb, u32
ldw, u32 udw)
dsb->ins_start_offset = dsb->free_pos;
- buf[dsb->free_pos++] = ldw;
- buf[dsb->free_pos++] = udw;
+ intel_dsb_buffer_write(&dsb->dsb_buf, dsb->free_pos++, ldw);
+ intel_dsb_buffer_write(&dsb->dsb_buf, dsb->free_pos++, udw);
}
static bool intel_dsb_prev_ins_is_write(struct intel_dsb *dsb,
u32 opcode, i915_reg_t reg)
{
- const u32 *buf = dsb->cmd_buf;
u32 prev_opcode, prev_reg;
/*
@@ -157,8 +153,10 @@ static bool intel_dsb_prev_ins_is_write(struct intel_dsb
*dsb,
if (dsb->free_pos == 0)
return false;
- prev_opcode = buf[dsb->ins_start_offset + 1] & ~DSB_REG_VALUE_MASK;
- prev_reg = buf[dsb->ins_start_offset + 1] & DSB_REG_VALUE_MASK;
+ prev_opcode = intel_dsb_buffer_read(&dsb->dsb_buf,
+ dsb->ins_start_offset + 1) &
~DSB_REG_VALUE_MASK;
+ prev_reg = intel_dsb_buffer_read(&dsb->dsb_buf,
+ dsb->ins_start_offset + 1) &
DSB_REG_VALUE_MASK;
return prev_opcode == opcode && prev_reg == i915_mmio_reg_offset(reg);
}
@@ -191,6 +189,8 @@ static bool intel_dsb_prev_ins_is_indexed_write(struct
intel_dsb *dsb, i915_reg_
void intel_dsb_reg_write(struct intel_dsb *dsb,
i915_reg_t reg, u32 v
Re: [Intel-gfx] Regression on linux-next (next-20231107)
Hello Krister, > -Original Message- > From: Krister Johansen > Sent: Friday, November 10, 2023 2:10 AM > To: Borah, Chaitanya Kumar > Cc: k...@templeofstupid.com; intel-gfx@lists.freedesktop.org; Kurmi, Suresh > Kumar ; Saarinen, Jani > ; Miklos Szeredi > Subject: Re: Regression on linux-next (next-20231107) > > Hi Chaitanya, > > On Thu, Nov 09, 2023 at 05:00:09PM +, Borah, Chaitanya Kumar wrote: > > Hello Krister, > > > > Hope you are doing well. I am Chaitanya from the linux graphics team in > Intel. > > > > This mail is regarding a regression we are seeing in our CI runs[1] for some > machines (dg2 and adl-p) on linux-next repository. > > > > Since the version next-20231107 [2], we are seeing the following error > > ``` > > <4>[ 32.015910] stack segment: [#1] PREEMPT SMP NOPTI > > <4>[ 32.021048] CPU: 15 PID: 766 Comm: fusermount Not tainted 6.6.0- > next-20231107-next-20231107-g5cd631a52568+ #1 > > <4>[ 32.031135] Hardware name: Intel Corporation Raptor Lake Client > Platform/RPL-S ADP-S DDR5 UDIMM CRB, BIOS > RPLSFWI1.R00.4221.A00.2305271351 05/27/2023 > > <4>[ 32.044657] RIP: 0010:fuse_evict_inode+0x61/0x150 [fuse] > > `` > > ``` > > > > Details log can be found in [3]. > > > > After bisecting the tree, the following patch [4] seems to be the > > first "bad" commit > > > > > > `` > > ``` > > 513dfacefd712bcbfab64e1a9c9c3e0d51c2dca5 is the first bad commit > > commit 513dfacefd712bcbfab64e1a9c9c3e0d51c2dca5 > > Author: Krister Johansen k...@templeofstupid.com > > Date: Fri Nov 3 10:39:47 2023 -0700 > > > > fuse: share lookup state between submount and its parent > > > > Fuse submounts do not perform a lookup for the nodeid that they inherit > > from their parent. Instead, the code decrements the nlookup on the > > submount's fuse_inode when it is instantiated, and no forget is > > performed when a submount root is evicted. > > > > Trouble arises when the submount's parent is evicted despite the > > submount itself being in use. In this author's case, the submount was > > in a container and deatched from the initial mount namespace via a > > MNT_DEATCH operation. When memory pressure triggered the shrinker, > the > > inode from the parent was evicted, which triggered enough forgets to > > render the submount's nodeid invalid. > > > > Since submounts should still function, even if their parent goes away, > > solve this problem by sharing refcounted state between the parent and > > its submount. When all of the references on this shared state reach > > zero, it's safe to forget the final lookup of the fuse nodeid. > > > > > > `` > > ``` > > > > We also verified that if we revert the patch the issue is not seen. > > > > Could you please check why the patch causes this regression and provide a > fix if necessary? > > Apologies for the inconvenience. I've reproduced the problem, tested a fix, > and am in the process of preparing patches to send to Miklos. I'll cc the > people on this e-mail in that thread. > > > [3] > > http://gfx-ci.igk.intel.com/tree/linux-next/next-20231109/bat-dg2-14/b > > oot0.txt > > This link didn't resolve in DNS when I tried to access it. I needed to use > intel- > gfx-ci.01.org as the hostname instead. > My bad. I realized it too late. Hope you found the logs. If not here they are. https://intel-gfx-ci.01.org/tree/linux-next/next-20231109/bat-dg2-14/boot0.txt Regards Chaitanya > Thanks, > > -K
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gsc: Assign a uabi class number to the GSC CS
== Series Details == Series: drm/i915/gsc: Assign a uabi class number to the GSC CS URL : https://patchwork.freedesktop.org/series/126225/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gsc: Assign a uabi class number to the GSC CS
== Series Details == Series: drm/i915/gsc: Assign a uabi class number to the GSC CS URL : https://patchwork.freedesktop.org/series/126225/ State : success == Summary == CI Bug Log - changes from CI_DRM_13859 -> Patchwork_126225v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/index.html Participating hosts (33 -> 34) -- Additional (2): fi-hsw-4770 bat-dg2-9 Missing(1): fi-kbl-soraka Known issues Here are the changes found in Patchwork_126225v1 that come from known issues: ### CI changes ### Issues hit * boot: - fi-hsw-4770:NOTRUN -> [FAIL][1] ([i915#8293]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/fi-hsw-4770/boot.html ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg2-9: NOTRUN -> [SKIP][2] ([i915#4083]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-dg2-9/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-9: NOTRUN -> [SKIP][3] ([i915#4077]) +2 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-dg2-9/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-dg2-9: NOTRUN -> [SKIP][4] ([i915#4079]) +1 other test skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-dg2-9/igt@gem_render_tiled_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-9: NOTRUN -> [SKIP][5] ([i915#6621]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-dg2-9/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_heartbeat: - fi-apl-guc: [PASS][6] -> [DMESG-FAIL][7] ([i915#5334]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html * igt@i915_suspend@basic-s2idle-without-i915: - fi-apl-guc: [PASS][8] -> [INCOMPLETE][9] ([i915#1982] / [i915#4528]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/fi-apl-guc/igt@i915_susp...@basic-s2idle-without-i915.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/fi-apl-guc/igt@i915_susp...@basic-s2idle-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-9: NOTRUN -> [SKIP][10] ([i915#5190]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-dg2-9/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-9: NOTRUN -> [SKIP][11] ([i915#4215] / [i915#5190]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-dg2-9/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-9: NOTRUN -> [SKIP][12] ([i915#4212]) +6 other tests skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-dg2-9/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-9: NOTRUN -> [SKIP][13] ([i915#4212] / [i915#5608]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-dg2-9/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-9: NOTRUN -> [SKIP][14] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-dg2-9/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_flip@basic-flip-vs-wf_vblank@b-dp5: - bat-adlp-11:[PASS][15] -> [DMESG-WARN][16] ([i915#6868]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-adlp-11/igt@kms_flip@basic-flip-vs-wf_vbl...@b-dp5.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-wf_vbl...@b-dp5.html * igt@kms_flip@basic-flip-vs-wf_vblank@d-dp5: - bat-adlp-11:[PASS][17] -> [FAIL][18] ([i915#6121]) +1 other test fail [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-adlp-11/igt@kms_flip@basic-flip-vs-wf_vbl...@d-dp5.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-wf_vbl...@d-dp5.html * igt@kms_flip@basic-plain-flip@d-dp6: - bat-adlp-11:NOTRUN -> [DMESG-WARN][19] ([i915#6868]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126225v1/bat-adlp-11/igt@kms_flip@basic-plain-f...@d-dp6.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-9: NOTRUN -> [SKIP][20] ([fdo#109285]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/huc: Stop printing about unsupported HuC on MTL
== Series Details == Series: drm/i915/huc: Stop printing about unsupported HuC on MTL URL : https://patchwork.freedesktop.org/series/126226/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13859 -> Patchwork_126226v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126226v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126226v1, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/index.html Participating hosts (33 -> 32) -- Additional (1): bat-dg2-9 Missing(2): fi-kbl-soraka fi-pnv-d510 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126226v1: ### IGT changes ### Possible regressions * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-5: - bat-adlp-11:[PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-adlp-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-d-dp-5.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-adlp-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-d-dp-5.html Known issues Here are the changes found in Patchwork_126226v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg2-9: NOTRUN -> [SKIP][3] ([i915#4083]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-9: NOTRUN -> [SKIP][4] ([i915#4077]) +2 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-dg2-9: NOTRUN -> [SKIP][5] ([i915#4079]) +1 other test skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@gem_render_tiled_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-9: NOTRUN -> [SKIP][6] ([i915#6621]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-9: NOTRUN -> [SKIP][7] ([i915#5190]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-9: NOTRUN -> [SKIP][8] ([i915#4215] / [i915#5190]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-9: NOTRUN -> [SKIP][9] ([i915#4212]) +6 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-9: NOTRUN -> [SKIP][10] ([i915#4212] / [i915#5608]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@kms_addfb_ba...@tile-pitch-mismatch.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-dg2-9: NOTRUN -> [SKIP][11] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-9: NOTRUN -> [SKIP][12] ([fdo#109285]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-9: NOTRUN -> [SKIP][13] ([i915#5274]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-9/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: - bat-dg2-11: NOTRUN -> [SKIP][14] ([i915#1845] / [i915#9197]) +3 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-5: - bat-adlp-11:[PASS][15] -> [DMESG-FAIL][16] ([i915#6868]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-adlp-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-seque...@pipe-c-dp-5.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126226v1/bat-adlp-11/igt@kms_pi
Re: [Intel-gfx] [PATCH 1/2] drm/i915: abstract plane protection check
> -Original Message-
> From: Intel-gfx On Behalf Of Jani
> Nikula
> Sent: Thursday, November 9, 2023 9:37 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani
> Subject: [Intel-gfx] [PATCH 1/2] drm/i915: abstract plane protection check
>
> Centralize the conditions in a function.
>
> Signed-off-by: Jani Nikula
LGTM.
Reviewed-by: Suraj Kandpal
> ---
> .../gpu/drm/i915/display/skl_universal_plane.c | 18 ++
> 1 file changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 68035675ae3c..98acf25a5ca3 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1866,6 +1866,19 @@ static bool pxp_is_borked(struct
> drm_i915_gem_object *obj)
> return i915_gem_object_is_protected(obj) &&
> !bo_has_valid_encryption(obj); }
>
> +static void check_protection(struct intel_plane_state *plane_state) {
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> + struct drm_i915_private *i915 = to_i915(plane->base.dev);
> + const struct drm_framebuffer *fb = plane_state->hw.fb;
> +
> + if (DISPLAY_VER(i915) < 11)
> + return;
> +
> + plane_state->decrypt = bo_has_valid_encryption(intel_fb_obj(fb));
> + plane_state->force_black = pxp_is_borked(intel_fb_obj(fb)); }
> +
> static int skl_plane_check(struct intel_crtc_state *crtc_state,
> struct intel_plane_state *plane_state) { @@ -
> 1910,10 +1923,7 @@ static int skl_plane_check(struct intel_crtc_state
> *crtc_state,
> if (ret)
> return ret;
>
> - if (DISPLAY_VER(dev_priv) >= 11) {
> - plane_state->decrypt =
> bo_has_valid_encryption(intel_fb_obj(fb));
> - plane_state->force_black = pxp_is_borked(intel_fb_obj(fb));
> - }
> + check_protection(plane_state);
>
> /* HW only has 8 bits pixel precision, disable plane if invisible */
> if (!(plane_state->hw.alpha >> 8))
> --
> 2.39.2
Re: [Intel-gfx] [PATCH 2/2] drm/i915: remove excess functions from plane protection check
> -Original Message-
> From: Intel-gfx On Behalf Of Jani
> Nikula
> Sent: Thursday, November 9, 2023 9:37 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani
> Subject: [Intel-gfx] [PATCH 2/2] drm/i915: remove excess functions from plane
> protection check
>
> Reduce the function calls by reusing ->decrypt.
>
> Signed-off-by: Jani Nikula
LGTM.
Reviewed-by: Suraj Kandpal
> ---
> .../gpu/drm/i915/display/skl_universal_plane.c | 18 --
> 1 file changed, 4 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 98acf25a5ca3..39499a0ec6c0 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1854,29 +1854,19 @@ static bool skl_fb_scalable(const struct
> drm_framebuffer *fb)
> }
> }
>
> -static bool bo_has_valid_encryption(struct drm_i915_gem_object *obj) -{
> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> -
> - return intel_pxp_key_check(i915->pxp, obj, false) == 0;
> -}
> -
> -static bool pxp_is_borked(struct drm_i915_gem_object *obj) -{
> - return i915_gem_object_is_protected(obj) &&
> !bo_has_valid_encryption(obj);
> -}
> -
> static void check_protection(struct intel_plane_state *plane_state) {
> struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> struct drm_i915_private *i915 = to_i915(plane->base.dev);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> + struct drm_i915_gem_object *obj = intel_fb_obj(fb);
>
> if (DISPLAY_VER(i915) < 11)
> return;
>
> - plane_state->decrypt = bo_has_valid_encryption(intel_fb_obj(fb));
> - plane_state->force_black = pxp_is_borked(intel_fb_obj(fb));
> + plane_state->decrypt = intel_pxp_key_check(i915->pxp, obj, false) == 0;
> + plane_state->force_black = i915_gem_object_is_protected(obj) &&
> + !plane_state->decrypt;
> }
>
> static int skl_plane_check(struct intel_crtc_state *crtc_state,
> --
> 2.39.2
[Intel-gfx] ✗ Fi.CI.BAT: failure for Don't send double context enable/disable requests
== Series Details == Series: Don't send double context enable/disable requests URL : https://patchwork.freedesktop.org/series/126234/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13859 -> Patchwork_126234v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126234v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126234v1, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/index.html Participating hosts (33 -> 34) -- Additional (2): bat-dg2-8 bat-dg2-9 Missing(1): fi-kbl-soraka Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126234v1: ### IGT changes ### Possible regressions * igt@gem_exec_parallel@engines@fds: - bat-dg2-8: NOTRUN -> [TIMEOUT][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-8/igt@gem_exec_parallel@engi...@fds.html * igt@i915_selftest@live@gem_contexts: - bat-adlm-1: [PASS][2] -> [ABORT][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-adlm-1/igt@i915_selftest@live@gem_contexts.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-adlm-1/igt@i915_selftest@live@gem_contexts.html * igt@i915_selftest@live@requests: - bat-atsm-1: [PASS][4] -> [ABORT][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-atsm-1/igt@i915_selftest@l...@requests.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-atsm-1/igt@i915_selftest@l...@requests.html * igt@i915_selftest@live@workarounds: - bat-dg2-11: [PASS][6] -> [ABORT][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-dg2-11/igt@i915_selftest@l...@workarounds.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-11/igt@i915_selftest@l...@workarounds.html - bat-dg2-9: NOTRUN -> [ABORT][8] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-9/igt@i915_selftest@l...@workarounds.html * igt@kms_pipe_crc_basic@read-crc@pipe-d-dp-5: - bat-adlp-11:[PASS][9] -> [FAIL][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-adlp-11/igt@kms_pipe_crc_basic@read-...@pipe-d-dp-5.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-adlp-11/igt@kms_pipe_crc_basic@read-...@pipe-d-dp-5.html Known issues Here are the changes found in Patchwork_126234v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_flink_basic@bad-flink: - bat-dg2-8: NOTRUN -> [TIMEOUT][11] ([i915#8628]) +2 other tests timeout [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-8/igt@gem_flink_ba...@bad-flink.html * igt@gem_mmap@basic: - bat-dg2-9: NOTRUN -> [SKIP][12] ([i915#4083]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-9/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-dg2-9: NOTRUN -> [SKIP][13] ([i915#4077]) +2 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-9/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-dg2-9: NOTRUN -> [SKIP][14] ([i915#4079]) +1 other test skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-9/igt@gem_render_tiled_bl...@basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-9: NOTRUN -> [SKIP][15] ([i915#6621]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-9/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-9: NOTRUN -> [SKIP][16] ([i915#5190]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-9/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-9: NOTRUN -> [SKIP][17] ([i915#4215] / [i915#5190]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-9/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-9: NOTRUN -> [SKIP][18] ([i915#4212]) +6 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-9/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@tile-pitch-mismatch: - bat-dg2-9: NOTRUN -> [SKIP][19] ([i915#4212] / [i915#5608]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126234v1/bat-dg2-9/igt@kms_addfb_ba
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/vma: Fix potential UAF on multi-tile platforms (rev2)
== Series Details == Series: drm/i915/vma: Fix potential UAF on multi-tile platforms (rev2) URL : https://patchwork.freedesktop.org/series/126012/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13852 -> Patchwork_126012v2 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_126012v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_126012v2, please notify your bug team (lgci.bug.fil...@intel.com) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/index.html Participating hosts (34 -> 34) -- Additional (1): bat-mtlp-8 Missing(1): bat-dg2-9 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_126012v2: ### IGT changes ### Possible regressions * igt@kms_force_connector_basic@force-edid: - bat-adlp-11:NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/igt@kms_force_connector_ba...@force-edid.html Known issues Here are the changes found in Patchwork_126012v2 that come from known issues: ### CI changes ### Possible fixes * boot: - bat-adlp-11:[FAIL][2] ([i915#8293]) -> [PASS][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13852/bat-adlp-11/boot.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/boot.html ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-mtlp-8: NOTRUN -> [SKIP][4] ([i915#9318]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html - bat-adlp-11:NOTRUN -> [SKIP][5] ([i915#9318]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html * igt@gem_lmem_swapping@basic: - bat-adln-1: NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adln-1/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-rplp-1: NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-rplp-1/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@random-engines: - bat-adlp-6: NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-6/igt@gem_lmem_swapp...@random-engines.html * igt@gem_lmem_swapping@verify-random: - bat-adlp-11:NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/igt@gem_lmem_swapp...@verify-random.html - bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#4613]) +3 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#4083]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-mtlp-8/igt@gem_m...@basic.html * igt@gem_mmap_gtt@basic: - bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4077]) +3 other tests skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-mtlp-8/igt@gem_mmap_...@basic.html * igt@gem_render_tiled_blits@basic: - bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#4079]) +1 other test skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-adlp-11:NOTRUN -> [SKIP][14] ([i915#3282]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-adlp-6: NOTRUN -> [SKIP][15] ([i915#6621]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-6/igt@i915_pm_...@basic-api.html - bat-rplp-1: NOTRUN -> [SKIP][16] ([i915#6621]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-rplp-1/igt@i915_pm_...@basic-api.html - bat-adlp-11:NOTRUN -> [SKIP][17] ([i915#6621]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adlp-11/igt@i915_pm_...@basic-api.html - bat-adln-1: NOTRUN -> [SKIP][18] ([i915#6621]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v2/bat-adln-1/igt@i915_pm_...@basic-api.html - bat-mtlp-8: NOTRUN -> [SKIP][19] ([i915#6621]) [19]: https://intel-gfx-ci.01.org/
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/vma: Fix potential UAF on multi-tile platforms (rev3)
== Series Details == Series: drm/i915/vma: Fix potential UAF on multi-tile platforms (rev3) URL : https://patchwork.freedesktop.org/series/126012/ State : success == Summary == CI Bug Log - changes from CI_DRM_13856 -> Patchwork_126012v3 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/index.html Participating hosts (34 -> 35) -- Additional (2): fi-kbl-soraka fi-hsw-4770 Missing(1): bat-dg2-8 Known issues Here are the changes found in Patchwork_126012v3 that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-adln-1: NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adln-1/igt@gem_lmem_swapp...@parallel-random-engines.html - bat-rplp-1: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@random-engines: - bat-adlp-6: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-6/igt@gem_lmem_swapp...@random-engines.html * igt@gem_lmem_swapping@verify-random: - bat-adlp-11:NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@gem_lmem_swapp...@verify-random.html * igt@gem_softpin@allocator-basic-reserve: - fi-hsw-4770:NOTRUN -> [SKIP][7] ([fdo#109271]) +12 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-hsw-4770/igt@gem_soft...@allocator-basic-reserve.html * igt@i915_pm_rps@basic-api: - bat-adlp-6: NOTRUN -> [SKIP][8] ([i915#6621]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-6/igt@i915_pm_...@basic-api.html - bat-rplp-1: NOTRUN -> [SKIP][9] ([i915#6621]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1/igt@i915_pm_...@basic-api.html - bat-adlp-11:NOTRUN -> [SKIP][10] ([i915#6621]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@i915_pm_...@basic-api.html - bat-adln-1: NOTRUN -> [SKIP][11] ([i915#6621]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adln-1/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][12] ([i915#1886]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_suspend@basic-s2idle-without-i915: - bat-adlp-11:NOTRUN -> [FAIL][13] ([i915#9649]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@i915_susp...@basic-s2idle-without-i915.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - fi-hsw-4770:NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#5190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-kbl-soraka: NOTRUN -> [SKIP][15] ([fdo#109271]) +9 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_psr@primary_page_flip: - bat-rplp-1: NOTRUN -> [SKIP][16] ([i915#1072]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1/igt@kms_psr@primary_page_flip.html - bat-adlp-11:NOTRUN -> [SKIP][17] ([i915#1072]) +3 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@kms_psr@primary_page_flip.html * igt@kms_psr@sprite_plane_onoff: - fi-hsw-4770:NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#1072]) +3 other tests skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html * igt@kms_setmode@basic-clone-single-crtc: - bat-rplp-1: NOTRUN -> [SKIP][19] ([i915#3555]) [19]: https://intel-gfx-ci.01.org/tree/drm-ti
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/vma: Fix potential UAF on multi-tile platforms (rev3)
Hi, https://patchwork.freedesktop.org/series/126012/ - Re-reported Thanks, Tejasree -Original Message- From: Janusz Krzysztofik Sent: Friday, November 10, 2023 4:27 AM To: Andi Shyti Cc: intel-gfx@lists.freedesktop.org; LGCI Bug Filing Subject: Re: ✗ Fi.CI.BAT: failure for drm/i915/vma: Fix potential UAF on multi-tile platforms (rev3) On Thursday, 9 November 2023 22:44:02 CET Patchwork wrote: > == Series Details == > > Series: drm/i915/vma: Fix potential UAF on multi-tile platforms (rev3) > URL : https://patchwork.freedesktop.org/series/126012/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_13856 -> Patchwork_126012v3 > > > Summary > --- > > **FAILURE** > > Serious unknown changes coming with Patchwork_126012v3 absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_126012v3, please notify your bug team > (lgci.bug.fil...@intel.com) to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/index.html > > Participating hosts (34 -> 34) > -- > > Additional (1): fi-kbl-soraka > Missing(1): bat-dg2-8 > > Possible new issues > --- > > Here are the unknown changes that may have been introduced in > Patchwork_126012v3: > > ### IGT changes ### > > Possible regressions > > * igt@i915_suspend@basic-s2idle-without-i915: > - bat-adlp-11:NOTRUN -> [FAIL][1] >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-1 > 1/igt@i915_susp...@basic-s2idle-without-i915.html Andi, Since that issue popped up again after your re-run, I've had a closer look. The test igt@i915_suspend@basic-s2idle-without-i915 seems to be never executed on BAT ADL machines (e.g., adlp-11, adln-1) because of an abort triggered on those machines by igt@kms_pm_rpm@basic-pci-d3-state. The latter can be found below among possible fixes -- it succeeded, and that explains why igt@i915_suspend@basic-s2idle-without-i915 was executed this time, and also for my original submission (rev2). I suspect there must be an issue with adlp-11 machine that results in failures from igt@i915_suspend@basic-s2idle-without-i915. Unfortunately, that issue is not visible for now because that test is never executed on that machine. @BUG Filing, I'm no sure how re-reporting works, but once you have filters updated after my request submitted earlier today for rev2 of this patch, please also re-report results of rev3 (re-run of rev2). Thanks, Janusz > > > Known issues > > > Here are the changes found in Patchwork_126012v3 that come from known > issues: > > ### IGT changes ### > > Issues hit > > * igt@gem_huc_copy@huc-copy: > - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190]) >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-sor > aka/igt@gem_huc_c...@huc-copy.html > > * igt@gem_lmem_swapping@basic: > - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 > other tests skip >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html > - bat-adln-1: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests > skip >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adln-1 > /igt@gem_lmem_swapp...@basic.html > > * igt@gem_lmem_swapping@parallel-random-engines: > - bat-rplp-1: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests > skip >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1 > /igt@gem_lmem_swapp...@parallel-random-engines.html > > * igt@gem_lmem_swapping@random-engines: > - bat-adlp-6: NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests > skip >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-6 > /igt@gem_lmem_swapp...@random-engines.html > > * igt@gem_lmem_swapping@verify-random: > - bat-adlp-11:NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests > skip >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-1 > 1/igt@gem_lmem_swapp...@verify-random.html > > * igt@i915_pm_rps@basic-api: > - bat-adlp-6: NOTRUN -> [SKIP][8] ([i915#6621]) >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-6/igt@i915_pm_...@basic-api.html > - bat-rplp-1: NOTRUN -> [SKIP][9] ([i915#6621]) >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-rplp-1/igt@i915_pm_...@basic-api.html > - bat-adlp-11:NOTRUN -> [SKIP][10] ([i915#6621]) >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126012v3/bat-adlp-11/igt@i915_p
