Re: [PATCH 3/4] iommu/exynos: Use lookup based approach to access v7 registers
On 02/07/2022 23:37, Sam Protsenko wrote:
> SysMMU v7 might have different register layouts (VM capable or non-VM
> capable). Check which layout is implemented in current SysMMU module and
> prepare the corresponding register table for futher usage. This way is
> faster and more elegant than checking corresponding condition (if it's
> VM or non-VM SysMMU) each time before accessing v7 registers. For now
> the register table contains only most basic registers needed to add the
> SysMMU v7 support.
>
> This patch is based on downstream work of next authors:
> - Janghyuck Kim
> - Daniel Mentz
>
> Signed-off-by: Sam Protsenko
> ---
> drivers/iommu/exynos-iommu.c | 46
> 1 file changed, 46 insertions(+)
>
> diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
> index df6ddbebbe2b..47017e8945c5 100644
> --- a/drivers/iommu/exynos-iommu.c
> +++ b/drivers/iommu/exynos-iommu.c
> @@ -180,6 +180,47 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
>
> #define has_sysmmu(dev) (dev_iommu_priv_get(dev) != NULL)
>
> +#define MMU_REG(data, idx) \
> + ((data)->sfrbase + (data)->regs[idx].off)
I would expect to see users of this - convert all existing regs.
> +#define MMU_VM_REG(data, idx, vmid) \
> + (MMU_REG(data, idx) + (vmid) * (data)->regs[idx].mult)
> +
> +enum {
> + REG_SET_NON_VM,
> + REG_SET_VM,
> + MAX_REG_SET
> +};
> +
> +enum {
> + IDX_CTRL_VM,
> + IDX_CFG_VM,
> + IDX_FLPT_BASE,
Isn't this called REG_MMU_FLUSH? If yes, it's a bit confusing to see
different name used.
> + IDX_ALL_INV,
Isn't this called REG_MMU_FLUSH_ENTRY?
> + MAX_REG_IDX
> +};
> +
> +struct sysmmu_vm_reg {
> + unsigned int off; /* register offset */
> + unsigned int mult; /* VM index offset multiplier */
> +};
> +
> +static const struct sysmmu_vm_reg sysmmu_regs[MAX_REG_SET][MAX_REG_IDX] = {
> + /* Default register set (non-VM) */
> + {
> + /*
> + * SysMMUs without VM support do not have CTRL_VM and CFG_VM
> + * registers. Setting the offsets to 1 will trigger an unaligned
> + * access exception.
So why are you setting offset 1? To trigger unaligned access?
> + */
> + {0x1}, {0x1}, {0x000c}, {0x0010},
> + },
> + /* VM capable register set */
> + {
> + {0x8000, 0x1000}, {0x8004, 0x1000}, {0x800c, 0x1000},
> + {0x8010, 0x1000},
> + },
You add here quite a bit of dead code and some hard-coded numbers.
> +};
> +
> static struct device *dma_dev;
> static struct kmem_cache *lv2table_kmem_cache;
> static sysmmu_pte_t *zero_lv2_table;
> @@ -284,6 +325,7 @@ struct sysmmu_drvdata {
>
> /* v7 fields */
> bool has_vcr; /* virtual machine control register */
> + const struct sysmmu_vm_reg *regs; /* register set */
> };
>
> static struct exynos_iommu_domain *to_exynos_domain(struct iommu_domain *dom)
> @@ -407,6 +449,10 @@ static void sysmmu_get_hw_info(struct sysmmu_drvdata
> *data)
> __sysmmu_get_version(data);
> if (MMU_MAJ_VER(data->version) >= 7 && __sysmmu_has_capa1(data))
> __sysmmu_get_vcr(data);
> + if (data->has_vcr)
> + data->regs = sysmmu_regs[REG_SET_VM];
> + else
> + data->regs = sysmmu_regs[REG_SET_NON_VM];
This is set and not read.
>
> __sysmmu_disable_clocks(data);
> }
Best regards,
Krzysztof
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Re: [PATCH 2/4] iommu/exynos: Check if SysMMU v7 has VM registers
On 02/07/2022 23:37, Sam Protsenko wrote:
> SysMMU v7 can have Virtual Machine registers, which implement multiple
> translation domains. The driver should know if it's true or not, as VM
> registers shouldn't be accessed if not present. Read corresponding
> capabilities register to obtain that info, and store it in driver data.
>
> Signed-off-by: Sam Protsenko
> ---
> drivers/iommu/exynos-iommu.c | 42 ++--
> 1 file changed, 36 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
> index 28f8c8d93aa3..df6ddbebbe2b 100644
> --- a/drivers/iommu/exynos-iommu.c
> +++ b/drivers/iommu/exynos-iommu.c
> @@ -135,6 +135,9 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
> #define CFG_SYSSEL (1 << 22) /* System MMU 3.2 only */
> #define CFG_FLPDCACHE(1 << 20) /* System MMU 3.2+ only */
>
> +#define CAPA0_CAPA1_EXISTBIT(11)
> +#define CAPA1_VCR_ENABLEDBIT(14)
> +
> /* common registers */
> #define REG_MMU_CTRL 0x000
> #define REG_MMU_CFG 0x004
> @@ -171,6 +174,10 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
> #define REG_V5_FAULT_AR_VA 0x070
> #define REG_V5_FAULT_AW_VA 0x080
>
> +/* v7.x registers */
> +#define REG_V7_CAPA0 0x870
> +#define REG_V7_CAPA1 0x874
> +
> #define has_sysmmu(dev) (dev_iommu_priv_get(dev) != NULL)
>
> static struct device *dma_dev;
> @@ -274,6 +281,9 @@ struct sysmmu_drvdata {
> unsigned int version; /* our version */
>
> struct iommu_device iommu; /* IOMMU core handle */
> +
> + /* v7 fields */
> + bool has_vcr; /* virtual machine control register */
> };
>
> static struct exynos_iommu_domain *to_exynos_domain(struct iommu_domain *dom)
> @@ -364,11 +374,7 @@ static void __sysmmu_disable_clocks(struct
> sysmmu_drvdata *data)
>
> static void __sysmmu_get_version(struct sysmmu_drvdata *data)
> {
> - u32 ver;
> -
> - __sysmmu_enable_clocks(data);
> -
> - ver = readl(data->sfrbase + REG_MMU_VERSION);
> + const u32 ver = readl(data->sfrbase + REG_MMU_VERSION);
No need for const for local, non-pointer variables. There is no benefit
in preventing the modification and it is not a constant.
>
> /* controllers on some SoCs don't report proper version */
> if (ver == 0x8001u)
> @@ -378,6 +384,29 @@ static void __sysmmu_get_version(struct sysmmu_drvdata
> *data)
>
> dev_dbg(data->sysmmu, "hardware version: %d.%d\n",
> MMU_MAJ_VER(data->version), MMU_MIN_VER(data->version));
> +}
> +
> +static bool __sysmmu_has_capa1(struct sysmmu_drvdata *data)
> +{
> + const u32 capa0 = readl(data->sfrbase + REG_V7_CAPA0);
Same here and further.
Best regards,
Krzysztof
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Re: [PATCH 1/4] iommu/exynos: Set correct dma mask for SysMMU v5+
On 02/07/2022 23:37, Sam Protsenko wrote:
> SysMMU v5+ supports 36 bit physical address space. Set corresponding DMA
> mask to avoid falling back to SWTLBIO usage in dma_map_single() because
> of failed dma_capable() check.
>
> The original code for this fix was suggested by Marek.
>
> Originally-by: Marek Szyprowski
This is some tip specific tag, I don't think checkpatch allows it.
Either use suggesgted-by or co-developed-by + SoB.
> Signed-off-by: Sam Protsenko
> ---
> drivers/iommu/exynos-iommu.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
> index 71f2018e23fe..28f8c8d93aa3 100644
> --- a/drivers/iommu/exynos-iommu.c
> +++ b/drivers/iommu/exynos-iommu.c
> @@ -647,6 +647,14 @@ static int exynos_sysmmu_probe(struct platform_device
> *pdev)
> }
> }
>
> + if (MMU_MAJ_VER(data->version) >= 5) {
> + ret = dma_set_mask(dev, DMA_BIT_MASK(36));
> + if (ret) {
> + dev_err(dev, "Unable to set DMA mask: %d\n", ret);
Missing cleanup: iommu_device_unregister
and probably also: iommu_device_sysfs_remove
> + return ret;
> + }
> + }
> +
> /*
>* use the first registered sysmmu device for performing
>* dma mapping operations on iommu page tables (cpu cache flush)
Best regards,
Krzysztof
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Re: [RFC PATCH 3/3] iommu/vt-d: Show region type in arch_rmrr_sanity_check()
On Sat 2022-06-11 21:48 +0100, Aaron Tomlin wrote: > This patch will attempt to describe the region type in the event > that a given RMRR entry is not within a reserved region. Any thoughts? Kind regards, -- Aaron Tomlin ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
Re: [PATCH v3 6/8] genirq: Add and use an irq_data_update_affinity helper
On 01.07.22 23:00, Samuel Holland wrote:
Hello Samuel
Some architectures and irqchip drivers modify the cpumask returned by
irq_data_get_affinity_mask, usually by copying in to it. This is
problematic for uniprocessor configurations, where the affinity mask
should be constant, as it is known at compile time.
Add and use a setter for the affinity mask, following the pattern of
irq_data_update_effective_affinity. This allows the getter function to
return a const cpumask pointer.
Signed-off-by: Samuel Holland
---
Changes in v3:
- New patch to introduce irq_data_update_affinity
arch/alpha/kernel/irq.c | 2 +-
arch/ia64/kernel/iosapic.c | 2 +-
arch/ia64/kernel/irq.c | 4 ++--
arch/ia64/kernel/msi_ia64.c | 4 ++--
arch/parisc/kernel/irq.c | 2 +-
drivers/irqchip/irq-bcm6345-l1.c | 4 ++--
drivers/parisc/iosapic.c | 2 +-
drivers/sh/intc/chip.c | 2 +-
drivers/xen/events/events_base.c | 7 ---
include/linux/irq.h | 6 ++
10 files changed, 21 insertions(+), 14 deletions(-)
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index f6d2946edbd2..15f2effd6baf 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -60,7 +60,7 @@ int irq_select_affinity(unsigned int irq)
cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
last_cpu = cpu;
- cpumask_copy(irq_data_get_affinity_mask(data), cpumask_of(cpu));
+ irq_data_update_affinity(data, cpumask_of(cpu));
chip->irq_set_affinity(data, cpumask_of(cpu), false);
return 0;
}
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index 35adcf89035a..99300850abc1 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -834,7 +834,7 @@ iosapic_unregister_intr (unsigned int gsi)
if (iosapic_intr_info[irq].count == 0) {
#ifdef CONFIG_SMP
/* Clear affinity */
- cpumask_setall(irq_get_affinity_mask(irq));
+ irq_data_update_affinity(irq_get_irq_data(irq), cpu_all_mask);
#endif
/* Clear the interrupt information */
iosapic_intr_info[irq].dest = 0;
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index ecef17c7c35b..275b9ea58c64 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -57,8 +57,8 @@ static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1
};
void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
{
if (irq < NR_IRQS) {
- cpumask_copy(irq_get_affinity_mask(irq),
-cpumask_of(cpu_logical_id(hwid)));
+ irq_data_update_affinity(irq_get_irq_data(irq),
+cpumask_of(cpu_logical_id(hwid)));
irq_redir[irq] = (char) (redir & 0xff);
}
}
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index df5c28f252e3..025e5133c860 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -37,7 +37,7 @@ static int ia64_set_msi_irq_affinity(struct irq_data *idata,
msg.data = data;
pci_write_msi_msg(irq, );
- cpumask_copy(irq_data_get_affinity_mask(idata), cpumask_of(cpu));
+ irq_data_update_affinity(idata, cpumask_of(cpu));
return 0;
}
@@ -132,7 +132,7 @@ static int dmar_msi_set_affinity(struct irq_data *data,
msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
dmar_msi_write(irq, );
- cpumask_copy(irq_data_get_affinity_mask(data), mask);
+ irq_data_update_affinity(data, mask);
return 0;
}
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 0fe2d79fb123..5ebb1771b4ab 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -315,7 +315,7 @@ unsigned long txn_affinity_addr(unsigned int irq, int cpu)
{
#ifdef CONFIG_SMP
struct irq_data *d = irq_get_irq_data(irq);
- cpumask_copy(irq_data_get_affinity_mask(d), cpumask_of(cpu));
+ irq_data_update_affinity(d, cpumask_of(cpu));
#endif
return per_cpu(cpu_data, cpu).txn_addr;
diff --git a/drivers/irqchip/irq-bcm6345-l1.c b/drivers/irqchip/irq-bcm6345-l1.c
index 142a7431745f..6899e37810a8 100644
--- a/drivers/irqchip/irq-bcm6345-l1.c
+++ b/drivers/irqchip/irq-bcm6345-l1.c
@@ -216,11 +216,11 @@ static int bcm6345_l1_set_affinity(struct irq_data *d,
enabled = intc->cpus[old_cpu]->enable_cache[word] & mask;
if (enabled)
__bcm6345_l1_mask(d);
- cpumask_copy(irq_data_get_affinity_mask(d), dest);
+ irq_data_update_affinity(d, dest);
if (enabled)
__bcm6345_l1_unmask(d);
} else {
- cpumask_copy(irq_data_get_affinity_mask(d), dest);
+ irq_data_update_affinity(d, dest);
}
raw_spin_unlock_irqrestore(>lock, flags);
diff --git
Re: [PATCH v3 7/8] genirq: Return a const cpumask from irq_data_get_affinity_mask
On Fri, Jul 1, 2022 at 10:01 PM Samuel Holland wrote: > > Now that the irq_data_update_affinity helper exists, enforce its use > by returning a a const cpumask from irq_data_get_affinity_mask. > > Since the previous commit already updated places that needed to call > irq_data_update_affinity, this commit updates the remaining code that > either did not modify the cpumask or immediately passed the modified > mask to irq_set_affinity. When we refer to functions, we use parentheses, e.g. func(). -- With Best Regards, Andy Shevchenko ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
RE: [PATCH v3 7/8] genirq: Return a const cpumask from irq_data_get_affinity_mask
From: Samuel Holland Sent: Friday, July 1, 2022 1:01 PM
>
> Now that the irq_data_update_affinity helper exists, enforce its use
> by returning a a const cpumask from irq_data_get_affinity_mask.
Nit: duplicate word "a"
>
> Since the previous commit already updated places that needed to call
> irq_data_update_affinity, this commit updates the remaining code that
> either did not modify the cpumask or immediately passed the modified
> mask to irq_set_affinity.
>
> Signed-off-by: Samuel Holland
> ---
>
> Changes in v3:
> - New patch to make the returned cpumasks const
>
> arch/mips/cavium-octeon/octeon-irq.c | 4 ++--
> arch/sh/kernel/irq.c | 7 ---
> arch/x86/hyperv/irqdomain.c | 2 +-
> arch/xtensa/kernel/irq.c | 7 ---
> drivers/iommu/hyperv-iommu.c | 2 +-
> drivers/pci/controller/pci-hyperv.c | 10 +-
> include/linux/irq.h | 12 +++-
> kernel/irq/chip.c| 8 +---
> kernel/irq/debugfs.c | 2 +-
> kernel/irq/ipi.c | 16 +---
> 10 files changed, 39 insertions(+), 31 deletions(-)
>
[snip]
> diff --git a/arch/x86/hyperv/irqdomain.c b/arch/x86/hyperv/irqdomain.c
> index 7e0f6bedc248..42c70d28ef27 100644
> --- a/arch/x86/hyperv/irqdomain.c
> +++ b/arch/x86/hyperv/irqdomain.c
> @@ -192,7 +192,7 @@ static void hv_irq_compose_msi_msg(struct irq_data *data,
> struct msi_msg *msg)
> struct pci_dev *dev;
> struct hv_interrupt_entry out_entry, *stored_entry;
> struct irq_cfg *cfg = irqd_cfg(data);
> - cpumask_t *affinity;
> + const cpumask_t *affinity;
> int cpu;
> u64 status;
>
[snip]
> diff --git a/drivers/iommu/hyperv-iommu.c b/drivers/iommu/hyperv-iommu.c
> index e285a220c913..51bd66a45a11 100644
> --- a/drivers/iommu/hyperv-iommu.c
> +++ b/drivers/iommu/hyperv-iommu.c
> @@ -194,7 +194,7 @@ hyperv_root_ir_compose_msi_msg(struct irq_data *irq_data,
> struct msi_msg *msg)
> u32 vector;
> struct irq_cfg *cfg;
> int ioapic_id;
> - struct cpumask *affinity;
> + const struct cpumask *affinity;
> int cpu;
> struct hv_interrupt_entry entry;
> struct hyperv_root_ir_data *data = irq_data->chip_data;
> diff --git a/drivers/pci/controller/pci-hyperv.c
> b/drivers/pci/controller/pci-hyperv.c
> index db814f7b93ba..aebada45569b 100644
> --- a/drivers/pci/controller/pci-hyperv.c
> +++ b/drivers/pci/controller/pci-hyperv.c
> @@ -642,7 +642,7 @@ static void hv_arch_irq_unmask(struct irq_data *data)
> struct hv_retarget_device_interrupt *params;
> struct tran_int_desc *int_desc;
> struct hv_pcibus_device *hbus;
> - struct cpumask *dest;
> + const struct cpumask *dest;
> cpumask_var_t tmp;
> struct pci_bus *pbus;
> struct pci_dev *pdev;
> @@ -1613,7 +1613,7 @@ static void hv_pci_compose_compl(void *context, struct
> pci_response *resp,
> }
>
> static u32 hv_compose_msi_req_v1(
> - struct pci_create_interrupt *int_pkt, struct cpumask *affinity,
> + struct pci_create_interrupt *int_pkt, const struct cpumask *affinity,
> u32 slot, u8 vector, u8 vector_count)
> {
> int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
> @@ -1641,7 +1641,7 @@ static int hv_compose_msi_req_get_cpu(struct cpumask
> *affinity)
> }
>
> static u32 hv_compose_msi_req_v2(
> - struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
> + struct pci_create_interrupt2 *int_pkt, const struct cpumask *affinity,
> u32 slot, u8 vector, u8 vector_count)
> {
> int cpu;
> @@ -1660,7 +1660,7 @@ static u32 hv_compose_msi_req_v2(
> }
>
> static u32 hv_compose_msi_req_v3(
> - struct pci_create_interrupt3 *int_pkt, struct cpumask *affinity,
> + struct pci_create_interrupt3 *int_pkt, const struct cpumask *affinity,
> u32 slot, u32 vector, u8 vector_count)
> {
> int cpu;
> @@ -1697,7 +1697,7 @@ static void hv_compose_msi_msg(struct irq_data *data,
> struct msi_msg *msg)
> struct hv_pci_dev *hpdev;
> struct pci_bus *pbus;
> struct pci_dev *pdev;
> - struct cpumask *dest;
> + const struct cpumask *dest;
> struct compose_comp_ctxt comp;
> struct tran_int_desc *int_desc;
> struct msi_desc *msi_desc;
For these files with Hyper-V related changes:
arch/x86/hyperv/irqdomain.c
drivers/iommu/hyperv-iommu.c
drivers/pci/controller/pci-hyperv.c
Reviewed-by: Michael Kelley
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Re: [PATCH 0/4] iommu/exynos: Add basic support for SysMMU v7
On Sun, 2022-07-03 at 00:48 +0300, Sam Protsenko wrote: [...] > Hi Marek, > > As I understand, you have some board with SysMMU v7, which is not VM > capable (judging from the patches you shared earlier). Could you > please somehow verify if this series works fine for you? For example, > this testing driver [1] can be helpful. > > Thanks! > > [1] > https://github.com/joe-skb7/linux/commit/bbadd46fa525fe1fef2ccbdfff81f7d29caf0506 Hi Sam, Not Marek here, but I wanted to try this on my jackpotlte (Exynos 7885). The driver reports it's DPU sysmmu as version 7.2, and manually reading the capabilities registers it looks like it has the 2nd capability register but not the VM capability. After applying your patches, adding your test driver (with SYSMMU_BASE corrected to 7885 value), and adding the sysmmu to dt, I tried to cat the test file that it creates in debugfs and I got an SError kernel panic. I tried tracing where the SError happens and it looks like it's this line: /* Preload for emulation */ iowrite32(rw | vpn, obj->reg_base + MMU_EMU_PRELOAD); Trying to read the EMU registers using devmem results in a "Bus error". Could these emulation registers be missing from my SysMMU? Do you have any info on what version should have it? Or maybe some capability bit? I'll try testing it with DECON/DPP later and see if it works that way. Best regards, David ___ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
[PATCH v2] iommu/iova: change IOVA_MAG_SIZE to 127 to save memory
kmalloc will round up the request size to power of 2, and current
iova_magazine's size is 1032 (1024+8) bytes, so each instance
allocated will get 2048 bytes from kmalloc, causing around 1KB
waste.
Change IOVA_MAG_SIZE from 128 to 127 to make size of 'iova_magazine'
1024 bytes so that no memory will be wasted.
Signed-off-by: Feng Tang
Acked-by: Robin Murphy
---
Changelog:
since v1:
* update commit log per the comments from Robin and John
drivers/iommu/iova.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/iova.c b/drivers/iommu/iova.c
index db77aa675145b..27634ddd9b904 100644
--- a/drivers/iommu/iova.c
+++ b/drivers/iommu/iova.c
@@ -614,7 +614,12 @@ EXPORT_SYMBOL_GPL(reserve_iova);
* dynamic size tuning described in the paper.
*/
-#define IOVA_MAG_SIZE 128
+/*
+ * As kmalloc's buffer size is fixed to power of 2, 127 is chosen to
+ * assure size of 'iova_magazine' to be 1024 bytes, so that no memory
+ * will be wasted.
+ */
+#define IOVA_MAG_SIZE 127
#define MAX_GLOBAL_MAGS 32 /* magazines per bin */
struct iova_magazine {
--
2.27.0
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