Re: [PATCH v12 30/31] ARM: dts: add System MMU nodes of exynos5250
On Mon, 28 Apr 2014 16:13:19 -0700, Doug Anderson wrote:
> Vikas,
>
>
> On Sun, Apr 27, 2014 at 10:39 AM, Vikas Sajjan wrote:
> > Hi shaik,
> >
> > +Doug, Abhilash,
> >
> > On Sun, Apr 27, 2014 at 1:08 PM, Shaik Ameer Basha
> > wrote:
> >> From: Cho KyongHo
> >>
> >> Signed-off-by: Cho KyongHo
> >> ---
> >> arch/arm/boot/dts/exynos5250.dtsi | 270
> >> -
> >> 1 file changed, 267 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/arch/arm/boot/dts/exynos5250.dtsi
> >> b/arch/arm/boot/dts/exynos5250.dtsi
> >> index 3742331..eebd397 100644
> >> --- a/arch/arm/boot/dts/exynos5250.dtsi
> >> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> >> @@ -82,6 +82,16 @@
> >> reg = <0x10044040 0x20>;
> >> };
> >>
> >> + pd_isp: isp-power-domain@0x10044020 {
> >> + compatible = "samsung,exynos4210-pd";
> >> + reg = <0x10044020 0x20>;
> >> + };
> >> +
> >> + pd_disp1: disp1-power-domain@0x100440A0 {
> >> + compatible = "samsung,exynos4210-pd";
> >> + reg = <0x100440A0 0x20>;
> >> + };
> >> +
> >
> > As per subject "add System MMU nodes of exynos5250", it should only
> > add SysMMU node.
> > So, I think adding power domain nodes should go in a separate patch.
> >
> > Adding power domain nodes can break the system, if powering ON/OFF of
> > the given power domain is NOT taken care well.
> > I can see ISP is one such case. With this series I can see S2R breaks
> > [1] on 5250 chromebook with current mainline kernel (same applies for
> > arndale and smdk5250, but I have tested on these boards yet)
>
> Thanks for catching that! Let's make sure not to break suspend/resume.
>
> Given that these power domains are actually used as the domains for
> some of the System MMU nodes I don't totally object to adding them in
> the same patch, but if they're breaking things then I agree that we
> could leave them out and add them in a later patch (once issues are
> sorted out).
>
Thank you, Vikas.
Let me consider adding ISP power doamin after checking
power down sequence of ISP domain.
KyongHo
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Re: [PATCH v12 30/31] ARM: dts: add System MMU nodes of exynos5250
Vikas,
On Sun, Apr 27, 2014 at 10:39 AM, Vikas Sajjan wrote:
> Hi shaik,
>
> +Doug, Abhilash,
>
> On Sun, Apr 27, 2014 at 1:08 PM, Shaik Ameer Basha
> wrote:
>> From: Cho KyongHo
>>
>> Signed-off-by: Cho KyongHo
>> ---
>> arch/arm/boot/dts/exynos5250.dtsi | 270
>> -
>> 1 file changed, 267 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/exynos5250.dtsi
>> b/arch/arm/boot/dts/exynos5250.dtsi
>> index 3742331..eebd397 100644
>> --- a/arch/arm/boot/dts/exynos5250.dtsi
>> +++ b/arch/arm/boot/dts/exynos5250.dtsi
>> @@ -82,6 +82,16 @@
>> reg = <0x10044040 0x20>;
>> };
>>
>> + pd_isp: isp-power-domain@0x10044020 {
>> + compatible = "samsung,exynos4210-pd";
>> + reg = <0x10044020 0x20>;
>> + };
>> +
>> + pd_disp1: disp1-power-domain@0x100440A0 {
>> + compatible = "samsung,exynos4210-pd";
>> + reg = <0x100440A0 0x20>;
>> + };
>> +
>
> As per subject "add System MMU nodes of exynos5250", it should only
> add SysMMU node.
> So, I think adding power domain nodes should go in a separate patch.
>
> Adding power domain nodes can break the system, if powering ON/OFF of
> the given power domain is NOT taken care well.
> I can see ISP is one such case. With this series I can see S2R breaks
> [1] on 5250 chromebook with current mainline kernel (same applies for
> arndale and smdk5250, but I have tested on these boards yet)
Thanks for catching that! Let's make sure not to break suspend/resume.
Given that these power domains are actually used as the domains for
some of the System MMU nodes I don't totally object to adding them in
the same patch, but if they're breaking things then I agree that we
could leave them out and add them in a later patch (once issues are
sorted out).
-Doug
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Re: [PATCH v12 30/31] ARM: dts: add System MMU nodes of exynos5250
Hi shaik,
+Doug, Abhilash,
On Sun, Apr 27, 2014 at 1:08 PM, Shaik Ameer Basha
wrote:
> From: Cho KyongHo
>
> Signed-off-by: Cho KyongHo
> ---
> arch/arm/boot/dts/exynos5250.dtsi | 270
> -
> 1 file changed, 267 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi
> b/arch/arm/boot/dts/exynos5250.dtsi
> index 3742331..eebd397 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -82,6 +82,16 @@
> reg = <0x10044040 0x20>;
> };
>
> + pd_isp: isp-power-domain@0x10044020 {
> + compatible = "samsung,exynos4210-pd";
> + reg = <0x10044020 0x20>;
> + };
> +
> + pd_disp1: disp1-power-domain@0x100440A0 {
> + compatible = "samsung,exynos4210-pd";
> + reg = <0x100440A0 0x20>;
> + };
> +
As per subject "add System MMU nodes of exynos5250", it should only
add SysMMU node.
So, I think adding power domain nodes should go in a separate patch.
Adding power domain nodes can break the system, if powering ON/OFF of
the given power domain is NOT taken care well.
I can see ISP is one such case. With this series I can see S2R breaks
[1] on 5250 chromebook with current mainline kernel (same applies for
arndale and smdk5250, but I have tested on these boards yet)
Doug , Abhilash, Tomasz any thoughts on this.
[1]:
https://chromium.googlesource.com/chromiumos/third_party/kernel-next/+/2c3f79b4ed68a54da9065a7d1a6f46d33e1df204
> clock: clock-controller@1001 {
> compatible = "samsung,exynos5250-clock";
> reg = <0x1001 0x3>;
> @@ -192,7 +202,7 @@
> clock-names = "fimg2d";
> };
>
> - codec@1100 {
> + mfc: codec@1100 {
> compatible = "samsung,mfc-v6";
> reg = <0x1100 0x1>;
> interrupts = <0 96 0>;
> @@ -692,7 +702,7 @@
> "sclk_hdmiphy", "mout_hdmi";
> };
>
> - mixer {
> + mixer: mixer {
> compatible = "samsung,exynos5250-mixer";
> reg = <0x1445 0x1>;
> interrupts = <0 94 0>;
> @@ -713,7 +723,7 @@
> phy-names = "dp";
> };
>
> - fimd@1440 {
> + fimd: fimd@1440 {
> clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
> clock-names = "sclk_fimd", "fimd";
> };
> @@ -736,4 +746,258 @@
> clocks = <&clock 348>;
> clock-names = "secss";
> };
> +
> + sysmmu_g2d: sysmmu@10A6 {
> + compatible = "samsung,sysmmu-v1";
> + reg = <0x10A6 0x1000>;
> + interrupt-parent = <&combiner>;
> + interrupts = <24 5>;
> + clock-names = "sysmmu";
> + clocks = <&clock CLK_SMMU_2D>;
> + };
> +
> + sysmmu_mfc_r: sysmmu@1120 {
> + compatible = "samsung,sysmmu-v2";
> + reg = <0x1120 0x1000>;
> + interrupt-parent = <&combiner>;
> + interrupts = <6 2>;
> + clock-names = "sysmmu", "master";
> + clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
> + mmu-masters = <&mfc>;
> + samsung,power-domain = <&pd_mfc>;
> + };
> +
> + sysmmu_mfc_l: sysmmu@1121 {
> + compatible = "samsung,sysmmu-v2";
> + reg = <0x1121 0x1000>;
> + interrupt-parent = <&combiner>;
> + interrupts = <8 5>;
> + clock-names = "sysmmu", "master";
> + clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
> + mmu-masters = <&mfc>;
> + samsung,power-domain = <&pd_mfc>;
> + };
> +
> + sysmmu_rotator: sysmmu@11D4 {
> + compatible = "samsung,sysmmu-v1";
> + reg = <0x11D4 0x1000>;
> + interrupt-parent = <&combiner>;
> + interrupts = <4 0>;
> + clock-names = "sysmmu";
> + clocks = <&clock CLK_SMMU_ROTATOR>;
> + };
> +
> + sysmmu_fimc_isp: sysmmu@1326 {
> + compatible = "samsung,sysmmu-v1";
> + reg = <0x1326 0x1000>;
> + interrupt-parent = <&combiner>;
> + interrupts = <10 6>;
> + clock-names = "sysmmu";
> + clocks = <&clock CLK_SMMU_FIMC_ISP>;
> + samsung,power-domain = <&pd_isp>;
> + };
> +
> + sysmmu_fimc_drc: sysmmu@1327 {
> + compatible = "samsung,sysmmu-v1";
> + reg = <0x1327 0x1000>;
> + interrupt-parent = <&combiner>;
> + interrupts = <11 6>;
> + clock-names = "sysmmu";
> + clocks = <&clock CLK_SMMU_FIMC_DRC>;
> + samsung,power-do
[PATCH v12 30/31] ARM: dts: add System MMU nodes of exynos5250
From: Cho KyongHo
Signed-off-by: Cho KyongHo
---
arch/arm/boot/dts/exynos5250.dtsi | 270 -
1 file changed, 267 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 3742331..eebd397 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -82,6 +82,16 @@
reg = <0x10044040 0x20>;
};
+ pd_isp: isp-power-domain@0x10044020 {
+ compatible = "samsung,exynos4210-pd";
+ reg = <0x10044020 0x20>;
+ };
+
+ pd_disp1: disp1-power-domain@0x100440A0 {
+ compatible = "samsung,exynos4210-pd";
+ reg = <0x100440A0 0x20>;
+ };
+
clock: clock-controller@1001 {
compatible = "samsung,exynos5250-clock";
reg = <0x1001 0x3>;
@@ -192,7 +202,7 @@
clock-names = "fimg2d";
};
- codec@1100 {
+ mfc: codec@1100 {
compatible = "samsung,mfc-v6";
reg = <0x1100 0x1>;
interrupts = <0 96 0>;
@@ -692,7 +702,7 @@
"sclk_hdmiphy", "mout_hdmi";
};
- mixer {
+ mixer: mixer {
compatible = "samsung,exynos5250-mixer";
reg = <0x1445 0x1>;
interrupts = <0 94 0>;
@@ -713,7 +723,7 @@
phy-names = "dp";
};
- fimd@1440 {
+ fimd: fimd@1440 {
clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
clock-names = "sclk_fimd", "fimd";
};
@@ -736,4 +746,258 @@
clocks = <&clock 348>;
clock-names = "secss";
};
+
+ sysmmu_g2d: sysmmu@10A6 {
+ compatible = "samsung,sysmmu-v1";
+ reg = <0x10A6 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <24 5>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_2D>;
+ };
+
+ sysmmu_mfc_r: sysmmu@1120 {
+ compatible = "samsung,sysmmu-v2";
+ reg = <0x1120 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <6 2>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
+ mmu-masters = <&mfc>;
+ samsung,power-domain = <&pd_mfc>;
+ };
+
+ sysmmu_mfc_l: sysmmu@1121 {
+ compatible = "samsung,sysmmu-v2";
+ reg = <0x1121 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <8 5>;
+ clock-names = "sysmmu", "master";
+ clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
+ mmu-masters = <&mfc>;
+ samsung,power-domain = <&pd_mfc>;
+ };
+
+ sysmmu_rotator: sysmmu@11D4 {
+ compatible = "samsung,sysmmu-v1";
+ reg = <0x11D4 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <4 0>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_ROTATOR>;
+ };
+
+ sysmmu_fimc_isp: sysmmu@1326 {
+ compatible = "samsung,sysmmu-v1";
+ reg = <0x1326 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <10 6>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_ISP>;
+ samsung,power-domain = <&pd_isp>;
+ };
+
+ sysmmu_fimc_drc: sysmmu@1327 {
+ compatible = "samsung,sysmmu-v1";
+ reg = <0x1327 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <11 6>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_DRC>;
+ samsung,power-domain = <&pd_isp>;
+ };
+
+ sysmmu_fimc_scc: sysmmu@1328 {
+ compatible = "samsung,sysmmu-v1";
+ reg = <0x1328 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <5 2>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_SCC>;
+ samsung,power-domain = <&pd_isp>;
+ };
+
+ sysmmu_fimc_scp: sysmmu@1329 {
+ compatible = "samsung,sysmmu-v1";
+ reg = <0x1329 0x1000>;
+ interrupt-parent = <&combiner>;
+ interrupts = <3 6>;
+ clock-names = "sysmmu";
+ clocks = <&clock CLK_SMMU_FIMC_SCP>;
+ samsung,power-domain = <&pd_isp>;
+ };
+
+ sysmmu_fimc_fd: sysmmu@132A {
+ compatible = "samsung,sysmmu-v1";
+ reg = <0x132A 0x1000>;
+ interrupt-parent = <&combine
