Re: [PATCH v2 02/11] dt-bindings: memory: mediatek: Add mt8195 smi sub common

2021-07-21 Thread Rob Herring
On Thu, Jul 15, 2021 at 08:12:00PM +0800, Yong Wu wrote:
> Add the binding for smi-sub-common. The SMI block diagram like this:
> 
> IOMMU
>  |  |
>   smi-common
>   --
>   |    |
>  larb0   larb7   <-max is 8
> 
> The smi-common connects with smi-larb and IOMMU. The maximum larbs number
> that connects with a smi-common is 8. If the engines number is over 8,
> sometimes we use a smi-sub-common which is nearly same with smi-common.
> It supports up to 8 input and 1 output(smi-common has 2 output)
> 
> Something like:
> 
> IOMMU
>  |  |
>   smi-common
>   -
>   |  |  ...
> larb0  sub-common   ...   <-max is 8
>   ---
>||...   <-max is 8 too.
>  larb2 larb5
> 
> We don't need extra SW setting for smi-sub-common, only the sub-common has
> special clocks need to enable when the engines access dram.
> 
> If it is sub-common, it should have a "mediatek,smi" phandle to point to
> its smi-common. meanwhile, the sub-common only has one gals clock.
> 
> Signed-off-by: Yong Wu 
> ---
>  .../mediatek,smi-common.yaml  | 25 +++
>  1 file changed, 25 insertions(+)
> 
> diff --git 
> a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
>  
> b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
> index 602592b6c3f5..f79d99ebc440 100644
> --- 
> a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
> +++ 
> b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
> @@ -38,6 +38,7 @@ properties:
>- mediatek,mt8192-smi-common
>- mediatek,mt8195-smi-common-vdo
>- mediatek,mt8195-smi-common-vpp
> +  - mediatek,mt8195-smi-sub-common
>  
>- description: for mt7623
>  items:
> @@ -67,6 +68,10 @@ properties:
>  minItems: 2
>  maxItems: 4
>  
> +  mediatek,smi:
> +$ref: /schemas/types.yaml#/definitions/phandle-array

If only a phandle, then s/phandle-array/phandle/

> +description: a phandle to the smi-common node above. Only for sub-common.
> +
>  required:
>- compatible
>- reg
> @@ -93,6 +98,26 @@ allOf:
>  - const: smi
>  - const: async
>  
> +  - if:  # only for sub common
> +  properties:
> +compatible:
> +  contains:
> +enum:
> +  - mediatek,mt8195-smi-sub-common
> +then:
> +  required:
> +- mediatek,smi
> +  properties:
> +clock:
> +  items:
> +minItems: 3
> +maxItems: 3
> +clock-names:
> +  items:
> +- const: apb
> +- const: smi
> +- const: gals0
> +
>- if:  # for gen2 HW that have gals
>properties:
>  compatible:
> -- 
> 2.18.0
> 
> 
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[PATCH v2 02/11] dt-bindings: memory: mediatek: Add mt8195 smi sub common

2021-07-15 Thread Yong Wu
Add the binding for smi-sub-common. The SMI block diagram like this:

IOMMU
 |  |
  smi-common
  --
  |    |
 larb0   larb7   <-max is 8

The smi-common connects with smi-larb and IOMMU. The maximum larbs number
that connects with a smi-common is 8. If the engines number is over 8,
sometimes we use a smi-sub-common which is nearly same with smi-common.
It supports up to 8 input and 1 output(smi-common has 2 output)

Something like:

IOMMU
 |  |
  smi-common
  -
  |  |  ...
larb0  sub-common   ...   <-max is 8
  ---
   ||...   <-max is 8 too.
 larb2 larb5

We don't need extra SW setting for smi-sub-common, only the sub-common has
special clocks need to enable when the engines access dram.

If it is sub-common, it should have a "mediatek,smi" phandle to point to
its smi-common. meanwhile, the sub-common only has one gals clock.

Signed-off-by: Yong Wu 
---
 .../mediatek,smi-common.yaml  | 25 +++
 1 file changed, 25 insertions(+)

diff --git 
a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml 
b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
index 602592b6c3f5..f79d99ebc440 100644
--- 
a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
+++ 
b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml
@@ -38,6 +38,7 @@ properties:
   - mediatek,mt8192-smi-common
   - mediatek,mt8195-smi-common-vdo
   - mediatek,mt8195-smi-common-vpp
+  - mediatek,mt8195-smi-sub-common
 
   - description: for mt7623
 items:
@@ -67,6 +68,10 @@ properties:
 minItems: 2
 maxItems: 4
 
+  mediatek,smi:
+$ref: /schemas/types.yaml#/definitions/phandle-array
+description: a phandle to the smi-common node above. Only for sub-common.
+
 required:
   - compatible
   - reg
@@ -93,6 +98,26 @@ allOf:
 - const: smi
 - const: async
 
+  - if:  # only for sub common
+  properties:
+compatible:
+  contains:
+enum:
+  - mediatek,mt8195-smi-sub-common
+then:
+  required:
+- mediatek,smi
+  properties:
+clock:
+  items:
+minItems: 3
+maxItems: 3
+clock-names:
+  items:
+- const: apb
+- const: smi
+- const: gals0
+
   - if:  # for gen2 HW that have gals
   properties:
 compatible:
-- 
2.18.0

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