Re: [patch V2 15/46] x86/irq: Consolidate DMAR irq allocation

2020-08-27 Thread Dey, Megha

Hi Thomas,

On 8/26/2020 1:50 PM, Thomas Gleixner wrote:

On Wed, Aug 26 2020 at 20:32, Thomas Gleixner wrote:

On Wed, Aug 26 2020 at 09:50, Megha Dey wrote:

@@ -329,15 +329,15 @@ static struct irq_chip dmar_msi_controll
   static irq_hw_number_t dmar_msi_get_hwirq(struct msi_domain_info *info,
  msi_alloc_info_t *arg)
   {
-   return arg->dmar_id;
+   return arg->hwirq;

Shouldn't this return the arg->devid which gets set in dmar_alloc_hwirq?

Indeed.

But for simplicity we can set arg->hwirq to the dmar id right in the
alloc function and then once the generic ops are enabled remove the dmar
callback completely

True, can get rid of more code that way.
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Re: [patch V2 15/46] x86/irq: Consolidate DMAR irq allocation

2020-08-26 Thread Thomas Gleixner
On Wed, Aug 26 2020 at 20:32, Thomas Gleixner wrote:
> On Wed, Aug 26 2020 at 09:50, Megha Dey wrote:
>>> @@ -329,15 +329,15 @@ static struct irq_chip dmar_msi_controll
>>>   static irq_hw_number_t dmar_msi_get_hwirq(struct msi_domain_info *info,
>>>   msi_alloc_info_t *arg)
>>>   {
>>> -   return arg->dmar_id;
>>> +   return arg->hwirq;
>>
>> Shouldn't this return the arg->devid which gets set in dmar_alloc_hwirq?
>
> Indeed.

But for simplicity we can set arg->hwirq to the dmar id right in the
alloc function and then once the generic ops are enabled remove the dmar
callback completely.
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Re: [patch V2 15/46] x86/irq: Consolidate DMAR irq allocation

2020-08-26 Thread Thomas Gleixner
On Wed, Aug 26 2020 at 09:50, Megha Dey wrote:
>> @@ -329,15 +329,15 @@ static struct irq_chip dmar_msi_controll
>>   static irq_hw_number_t dmar_msi_get_hwirq(struct msi_domain_info *info,
>>msi_alloc_info_t *arg)
>>   {
>> -return arg->dmar_id;
>> +return arg->hwirq;
>
> Shouldn't this return the arg->devid which gets set in dmar_alloc_hwirq?

Indeed.
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Re: [patch V2 15/46] x86/irq: Consolidate DMAR irq allocation

2020-08-26 Thread Dey, Megha

Hi Thomas,

On 8/26/2020 4:16 AM, Thomas Gleixner wrote:

From: Thomas Gleixner 

None of the DMAR specific fields are required.

Signed-off-by: Thomas Gleixner 

---
  arch/x86/include/asm/hw_irq.h |6 --
  arch/x86/kernel/apic/msi.c|   10 +-
  2 files changed, 5 insertions(+), 11 deletions(-)

--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -83,12 +83,6 @@ struct irq_alloc_info {
irq_hw_number_t msi_hwirq;
};
  #endif
-#ifdef CONFIG_DMAR_TABLE
-   struct {
-   int dmar_id;
-   void*dmar_data;
-   };
-#endif
  #ifdefCONFIG_X86_UV
struct {
int uv_limit;
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -329,15 +329,15 @@ static struct irq_chip dmar_msi_controll
  static irq_hw_number_t dmar_msi_get_hwirq(struct msi_domain_info *info,
  msi_alloc_info_t *arg)
  {
-   return arg->dmar_id;
+   return arg->hwirq;


Shouldn't this return the arg->devid which gets set in dmar_alloc_hwirq?

-Megha


  }
  
  static int dmar_msi_init(struct irq_domain *domain,

 struct msi_domain_info *info, unsigned int virq,
 irq_hw_number_t hwirq, msi_alloc_info_t *arg)
  {
-   irq_domain_set_info(domain, virq, arg->dmar_id, info->chip, NULL,
-   handle_edge_irq, arg->dmar_data, "edge");
+   irq_domain_set_info(domain, virq, arg->devid, info->chip, NULL,
+   handle_edge_irq, arg->data, "edge");
  
  	return 0;

  }
@@ -384,8 +384,8 @@ int dmar_alloc_hwirq(int id, int node, v
  
  	init_irq_alloc_info(, NULL);

info.type = X86_IRQ_ALLOC_TYPE_DMAR;
-   info.dmar_id = id;
-   info.dmar_data = arg;
+   info.devid = id;
+   info.data = arg;
  
  	return irq_domain_alloc_irqs(domain, 1, node, );

  }



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[patch V2 15/46] x86/irq: Consolidate DMAR irq allocation

2020-08-26 Thread Thomas Gleixner
From: Thomas Gleixner 

None of the DMAR specific fields are required.

Signed-off-by: Thomas Gleixner 

---
 arch/x86/include/asm/hw_irq.h |6 --
 arch/x86/kernel/apic/msi.c|   10 +-
 2 files changed, 5 insertions(+), 11 deletions(-)

--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -83,12 +83,6 @@ struct irq_alloc_info {
irq_hw_number_t msi_hwirq;
};
 #endif
-#ifdef CONFIG_DMAR_TABLE
-   struct {
-   int dmar_id;
-   void*dmar_data;
-   };
-#endif
 #ifdef CONFIG_X86_UV
struct {
int uv_limit;
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -329,15 +329,15 @@ static struct irq_chip dmar_msi_controll
 static irq_hw_number_t dmar_msi_get_hwirq(struct msi_domain_info *info,
  msi_alloc_info_t *arg)
 {
-   return arg->dmar_id;
+   return arg->hwirq;
 }
 
 static int dmar_msi_init(struct irq_domain *domain,
 struct msi_domain_info *info, unsigned int virq,
 irq_hw_number_t hwirq, msi_alloc_info_t *arg)
 {
-   irq_domain_set_info(domain, virq, arg->dmar_id, info->chip, NULL,
-   handle_edge_irq, arg->dmar_data, "edge");
+   irq_domain_set_info(domain, virq, arg->devid, info->chip, NULL,
+   handle_edge_irq, arg->data, "edge");
 
return 0;
 }
@@ -384,8 +384,8 @@ int dmar_alloc_hwirq(int id, int node, v
 
init_irq_alloc_info(, NULL);
info.type = X86_IRQ_ALLOC_TYPE_DMAR;
-   info.dmar_id = id;
-   info.dmar_data = arg;
+   info.devid = id;
+   info.data = arg;
 
return irq_domain_alloc_irqs(domain, 1, node, );
 }


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