Re: [PATCH 1/3] dt-bindings: iommu: mediatek: add binding documentation for MT8365 SoC

2022-06-05 Thread Rob Herring
On Mon, May 30, 2022 at 08:03:26PM +0200, Fabien Parent wrote:
> Add IOMMU binding documentation for the MT8365 SoC.
> 
> Signed-off-by: Fabien Parent 
> ---
>  .../bindings/iommu/mediatek,iommu.yaml|  2 +
>  include/dt-bindings/memory/mt8365-larb-port.h | 96 +++
>  2 files changed, 98 insertions(+)
>  create mode 100644 include/dt-bindings/memory/mt8365-larb-port.h
> 
> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml 
> b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> index 97e8c471a5e8..5ba688365da5 100644
> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
> @@ -77,6 +77,7 @@ properties:
>- mediatek,mt8173-m4u  # generation two
>- mediatek,mt8183-m4u  # generation two
>- mediatek,mt8192-m4u  # generation two
> +  - mediatek,mt8365-m4u  # generation two
>  
>- description: mt7623 generation one
>  items:
> @@ -120,6 +121,7 @@ properties:
>dt-binding/memory/mt8173-larb-port.h for mt8173,
>dt-binding/memory/mt8183-larb-port.h for mt8183,
>dt-binding/memory/mt8192-larb-port.h for mt8192.
> +  dt-binding/memory/mt8365-larb-port.h for mt8365.
>  
>power-domains:
>  maxItems: 1
> diff --git a/include/dt-bindings/memory/mt8365-larb-port.h 
> b/include/dt-bindings/memory/mt8365-larb-port.h
> new file mode 100644
> index ..e7d5637aa38e
> --- /dev/null
> +++ b/include/dt-bindings/memory/mt8365-larb-port.h
> @@ -0,0 +1,96 @@
> +/* SPDX-License-Identifier: GPL-2.0 */

Dual license please.

Rob
___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu


Re: [PATCH 1/3] dt-bindings: iommu: mediatek: add binding documentation for MT8365 SoC

2022-06-02 Thread Yong Wu via iommu
On Thu, 2022-06-02 at 16:42 +0800, Macpaul Lin wrote:
> On 6/2/22 4:27 PM, Macpaul Lin wrote:
> > On 6/2/22 2:18 PM, Yong Wu wrote:
> > > On Mon, 2022-05-30 at 20:03 +0200, Fabien Parent wrote:
> > > > Add IOMMU binding documentation for the MT8365 SoC.
> > > > 
> > > > Signed-off-by: Fabien Parent 
> > > > ---
> > > >   .../bindings/iommu/mediatek,iommu.yaml|  2 +
> > > >   include/dt-bindings/memory/mt8365-larb-port.h | 96
> > > > +++
> > > >   2 files changed, 98 insertions(+)
> > > >   create mode 100644 include/dt-bindings/memory/mt8365-larb-
> > > > port.h
> > > 
> > > [snip...]
> > > 
> > > > +#ifndef _DT_BINDINGS_MEMORY_MT8365_LARB_PORT_H_
> > > > +#define _DT_BINDINGS_MEMORY_MT8365_LARB_PORT_H_
> > > > +
> > > > +#include 
> > > > +
> > > > +#define M4U_LARB0_ID0
> > > > +#define M4U_LARB1_ID1
> > > > +#define M4U_LARB2_ID2
> > > > +#define M4U_LARB3_ID3
> > > > +#define M4U_LARB4_ID4
> > > > +#define M4U_LARB5_ID5
> > > > +#define M4U_LARB6_ID6
> > > > +#define M4U_LARB7_ID7
> > > 
> > > Remove these. they are no used, right?
> > 
> > AIOT and customers are using the modules and their related IOMMU
> > modules.
> > DISP0, VENC, VDEC, ISP (CAMSYS), and APU (as far as I know, which
> > should 
> > be VP6?) were all supported.
> 
> Dear Yong,
> How about to replace the following definitions?
> 
> For example, replace
> #define M4U_PORT_DISP_OVL0MTK_M4U_ID(0, 0)
> to
> #define M4U_PORT_DISP_OVL0  MTK_M4U_ID(M4U_LARB0_ID , 0)

Yes. It is ok.

> 
> > > 
> > > > +
> > > > +/* larb0 */
> > > > +#define M4U_PORT_DISP_OVL0MTK_M4U_ID(0, 0)
> > > > +#define M4U_PORT_DISP_OVL0_2LMTK_M4U_ID(0, 1)
> > > 
> > > [...]
> > > 
> > > > 
> > > > +/* larb4 */
> > > > +#define M4U_PORT_APU_READMTK_M4U_ID(0, 0)
> > > > +#define M4U_PORT_APU_WRITEMTK_M4U_ID(0, 1)
> > > 
> > > Please remove these two APU definitions. currently these are not
> > > supported.
> > 
> > Kidd, please help to check if APU use these definitions with Yong.
> > However, I think these are all available to the customers.
> > 
> > Thanks
> > Macpaul Lin
> 
> Thanks
> Macpaul Lin

___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu


Re: [PATCH 1/3] dt-bindings: iommu: mediatek: add binding documentation for MT8365 SoC

2022-06-02 Thread Macpaul Lin via iommu

On 6/2/22 4:27 PM, Macpaul Lin wrote:

On 6/2/22 2:18 PM, Yong Wu wrote:

On Mon, 2022-05-30 at 20:03 +0200, Fabien Parent wrote:

Add IOMMU binding documentation for the MT8365 SoC.

Signed-off-by: Fabien Parent 
---
  .../bindings/iommu/mediatek,iommu.yaml    |  2 +
  include/dt-bindings/memory/mt8365-larb-port.h | 96
+++
  2 files changed, 98 insertions(+)
  create mode 100644 include/dt-bindings/memory/mt8365-larb-port.h


[snip...]


+#ifndef _DT_BINDINGS_MEMORY_MT8365_LARB_PORT_H_
+#define _DT_BINDINGS_MEMORY_MT8365_LARB_PORT_H_
+
+#include 
+
+#define M4U_LARB0_ID    0
+#define M4U_LARB1_ID    1
+#define M4U_LARB2_ID    2
+#define M4U_LARB3_ID    3
+#define M4U_LARB4_ID    4
+#define M4U_LARB5_ID    5
+#define M4U_LARB6_ID    6
+#define M4U_LARB7_ID    7


Remove these. they are no used, right?


AIOT and customers are using the modules and their related IOMMU modules.
DISP0, VENC, VDEC, ISP (CAMSYS), and APU (as far as I know, which should 
be VP6?) were all supported.


Dear Yong,
How about to replace the following definitions?

For example, replace
#define M4U_PORT_DISP_OVL0  MTK_M4U_ID(0, 0)
to
#define M4U_PORT_DISP_OVL0  MTK_M4U_ID(M4U_LARB0_ID , 0)




+
+/* larb0 */
+#define M4U_PORT_DISP_OVL0    MTK_M4U_ID(0, 0)
+#define M4U_PORT_DISP_OVL0_2L    MTK_M4U_ID(0, 1)


[...]



+/* larb4 */
+#define M4U_PORT_APU_READ    MTK_M4U_ID(0, 0)
+#define M4U_PORT_APU_WRITE    MTK_M4U_ID(0, 1)


Please remove these two APU definitions. currently these are not
supported.


Kidd, please help to check if APU use these definitions with Yong.
However, I think these are all available to the customers.

Thanks
Macpaul Lin


Thanks
Macpaul Lin___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

Re: [PATCH 1/3] dt-bindings: iommu: mediatek: add binding documentation for MT8365 SoC

2022-06-02 Thread Macpaul Lin via iommu

On 6/2/22 2:18 PM, Yong Wu wrote:

On Mon, 2022-05-30 at 20:03 +0200, Fabien Parent wrote:

Add IOMMU binding documentation for the MT8365 SoC.

Signed-off-by: Fabien Parent 
---
  .../bindings/iommu/mediatek,iommu.yaml|  2 +
  include/dt-bindings/memory/mt8365-larb-port.h | 96
+++
  2 files changed, 98 insertions(+)
  create mode 100644 include/dt-bindings/memory/mt8365-larb-port.h


[snip...]


+#ifndef _DT_BINDINGS_MEMORY_MT8365_LARB_PORT_H_
+#define _DT_BINDINGS_MEMORY_MT8365_LARB_PORT_H_
+
+#include 
+
+#define M4U_LARB0_ID   0
+#define M4U_LARB1_ID   1
+#define M4U_LARB2_ID   2
+#define M4U_LARB3_ID   3
+#define M4U_LARB4_ID   4
+#define M4U_LARB5_ID   5
+#define M4U_LARB6_ID   6
+#define M4U_LARB7_ID   7


Remove these. they are no used, right?


AIOT and customers are using the modules and their related IOMMU modules.
DISP0, VENC, VDEC, ISP (CAMSYS), and APU (as far as I know, which should 
be VP6?) were all supported.





+
+/* larb0 */
+#define M4U_PORT_DISP_OVL0 MTK_M4U_ID(0, 0)
+#define M4U_PORT_DISP_OVL0_2L  MTK_M4U_ID(0, 1)


[...]



+/* larb4 */
+#define M4U_PORT_APU_READ  MTK_M4U_ID(0, 0)
+#define M4U_PORT_APU_WRITE MTK_M4U_ID(0, 1)


Please remove these two APU definitions. currently these are not
supported.


Kidd, please help to check if APU use these definitions with Yong.
However, I think these are all available to the customers.

Thanks
Macpaul Lin___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

Re: [PATCH 1/3] dt-bindings: iommu: mediatek: add binding documentation for MT8365 SoC

2022-06-02 Thread Yong Wu via iommu
On Mon, 2022-05-30 at 20:03 +0200, Fabien Parent wrote:
> Add IOMMU binding documentation for the MT8365 SoC.
> 
> Signed-off-by: Fabien Parent 
> ---
>  .../bindings/iommu/mediatek,iommu.yaml|  2 +
>  include/dt-bindings/memory/mt8365-larb-port.h | 96
> +++
>  2 files changed, 98 insertions(+)
>  create mode 100644 include/dt-bindings/memory/mt8365-larb-port.h

[snip...]

> +#ifndef _DT_BINDINGS_MEMORY_MT8365_LARB_PORT_H_
> +#define _DT_BINDINGS_MEMORY_MT8365_LARB_PORT_H_
> +
> +#include 
> +
> +#define M4U_LARB0_ID 0
> +#define M4U_LARB1_ID 1
> +#define M4U_LARB2_ID 2
> +#define M4U_LARB3_ID 3
> +#define M4U_LARB4_ID 4
> +#define M4U_LARB5_ID 5
> +#define M4U_LARB6_ID 6
> +#define M4U_LARB7_ID 7

Remove these. they are no used, right?

> +
> +/* larb0 */
> +#define M4U_PORT_DISP_OVL0   MTK_M4U_ID(0, 0)
> +#define M4U_PORT_DISP_OVL0_2LMTK_M4U_ID(0, 1)

[...]

> 
> +/* larb4 */
> +#define M4U_PORT_APU_READMTK_M4U_ID(0, 0)
> +#define M4U_PORT_APU_WRITE   MTK_M4U_ID(0, 1)

Please remove these two APU definitions. currently these are not
supported.

Thanks.

> +
> +#endif

___
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu