[jallib] [jallib build] buildbot success in jallib on jallib-standard

[build]

Hi guys,

This is buildbot speaking. I have finished a build of jallib-standard on jallib.
Buildslave for this Build: sebbot

Build Reason: 
Build Source Stamp: HEAD
Blamelist: rob.jansen

Build succeeded!
Logs are attached.

sincerely,
 -The Buildbot

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Updating '.':

UU   CHANGELOG

UU   TORELEASE

UU   include/device/18f06q41.jal

UU   include/device/18f16q41.jal

UU   include/device/18f27q84.jal

Ainclude/device/18f47q84.jal

UU   include/device/18f57q84.jal

UU   include/device/chipdef_jallib.jal

UU   include/peripheral/pps/pps.jal

UU   sample/18f04q40_blink_intosc.jal

UU   sample/18f04q41_blink_intosc.jal

UU   sample/18f05q40_blink_intosc.jal

UU   sample/18f05q41_blink_intosc.jal

UU   sample/18f06q40_blink_intosc.jal

UU   sample/18f06q41_blink_intosc.jal

UU   sample/18f14q40_blink_intosc.jal

UU   sample/18f14q41_blink_intosc.jal

UU   sample/18f15q40_blink_intosc.jal

UU   sample/18f15q41_blink_intosc.jal

UU   sample/18f16q40_blink_intosc.jal

UU   sample/18f16q41_blink_intosc.jal

UU   sample/18f24k42_blink_intosc.jal

UU   sample/18f25k42_blink_intosc.jal

UU   sample/18f25k83_blink_intosc.jal

UU   sample/18f25q43_blink_intosc.jal

UU   sample/18f26k42_blink_intosc.jal

UU   sample/18f26k83_blink_intosc.jal

UU   sample/18f26q43_blink_intosc.jal

UU   sample/18f27k42_blink_intosc.jal

UU   sample/18f27q43_blink_intosc.jal

UU   sample/18f27q84_blink_intosc.jal

UU   sample/18f45k42_blink_intosc.jal

UU   sample/18f45q43_blink_intosc.jal

UU   sample/18f46k42_blink_intosc.jal

UU   sample/18f46q43_blink_intosc.jal

UU   sample/18f47k42_blink_intosc.jal

UU   sample/18f47q43_blink_intosc.jal

UU   sample/18f47q83_blink_intosc.jal

Asample/18f47q84_blink_intosc.jal

UU   sample/18f55k42_blink_intosc.jal

UU   sample/18f55q43_blink_intosc.jal

UU   sample/18f56k42_blink_intosc.jal

UU   sample/18f56q43_blink_intosc.jal

UU   sample/18f57k42_blink_intosc.jal

UU   sample/18f57q43_blink_intosc.jal

UU   sample/18f57q84_blink_intosc.jal

UU   sample/18lf24k42_blink_intosc.jal

UU   sample/18lf25k42_blink_intosc.jal

UU   sample/18lf25k83_blink_intosc.jal

UU   sample/18lf26k42_blink_intosc.jal

UU   sample/18lf26k83_blink_intosc.jal

UU   sample/18lf27k42_blink_intosc.jal

UU   sample/18lf45k42_blink_intosc.jal

UU   sample/18lf46k42_blink_intosc.jal

UU   sample/18lf47k42_blink_intosc.jal

UU   sample/18lf55k42_blink_intosc.jal

UU   sample/18lf56k42_blink_intosc.jal

UU   sample/18lf57k42_blink_intosc.jal

UU   tools/blink-a-led.py

UU   tools/devicespecific.json

Updated to revision 3731.

2137 samples to validate...

1100 libraries to validate...

All files validated :)

Environment config

JALLIB_ROOT=/home/mattschinkel/jallib/slave/standard/build

JALLIB_REPOS=/home/mattschinkel/jallib/slave/standard/build/include

JALLIB_SAMPLEDIR=/home/mattschinkel/jallib/slave/standard/build/sample

JALLIB_JALV2=/home/mattschinkel/bin/jalv2

JALLIB_PYTHON=python2.7



Time duration: 314 secs

jal jalv25r4 (compiled Dec 26 2020)

Required parameter to hex is missing!

no source file, use /home/mattschinkel/bin/jalv2 --help for help

Error while compiling file (status=1).

See previous message.

2137 samples to compile...

All samples compile :)

Environment config

JALLIB_ROOT=/home/mattschinkel/jallib/slave/standard/build

JALLIB_REPOS=/home/mattschinkel/jallib/slave/standard/build/include

JALLIB_SAMPLEDIR=/home/mattschinkel/jallib/slave/standard/build/sample

JALLIB_JALV2=/home/mattschinkel/bin/jalv2

JALLIB_PYTHON=python2.7



Time duration: 1462 secs

Re: [jallib] [jallib/jallib] 1dd7c1: Added new JAL library for the nRF905

[Gilles BARTHELEMY]

Hi Rob,

Yes, the whole system operates at 3v3.
I tried to make it work on a manufactured prototype (it's a part of a
bigger project), on a development board, and even a breadboard, with no
success... I buyed and tried several modules (the same as yours) but no
way  :-(


Le mar. 9 févr. 2021 à 19:52, Rob CJ  a écrit :

> Hi Gilles,
>
> I can give it a try this weekend. I do not have a 18f45k22 but I may have
> a 18f25k22 (same family).
>
> One more question. This device operates at 3.3 Volt and in your schematic
> diagram you connect it to VCC and directly to the PIC but for that your PIC
> needs to work at 3.3. Volt too.
>
> If the PIC is operating at 5 Volt you need to have level shifters between
> the PIC and the nRF905. Also see the blog post: JAL Library for the
> nRF905 transceiver module | Just Another JAL Website
> (justanotherlanguage.org) 
>
> I hope VCC is not +5Volt. If so then you may have damaged the device. Let
> me know if this is the case or not.
>
> I will let you know as soon as I have tested it with your program.
>
> Kind regards,
>
> Rob
>
> --
> *Van:* jallib@googlegroups.com  namens
> bar...@gmail.com 
> *Verzonden:* dinsdag 9 februari 2021 09:07
> *Aan:* jallib 
> *Onderwerp:* Re: [jallib] [jallib/jallib] 1dd7c1: Added new JAL library
> for the nRF905
>
> Hi Rob,
>
> thank you for your quick answer
> Yes you're right, I made a mistake while posting (I was a bit tired ;-) ,
> the correct code I tested with is this one:
>
> -- nRF905 pin definition.
> alias nrf905_spi_sck is pin_B3
> alias nrf905_spi_sck_direction is pin_B3_direction -- To SCK of nRF905
> alias nrf905_spi_sdi is pin_B1
> alias nrf905_spi_sdi_direction is pin_B1_direction -- To MISO of nRF905
> alias nrf905_spi_sdo is pin_B2
> alias nrf905_spi_sdo_direction is pin_B2_direction -- To MOSI of nRFF905
> alias nrf905_csn_pin is pin_A1
> alias nrf905_csn_pin_direction is pin_A1_direction -- To csn of nRF905
> alias nrf905_txen_pin is pin_B5
> alias nrf905_txen_pin_direction is pin_B5_direction -- To txen of nRF905
> alias nrf905_trx_ce_pin is pin_B4
> alias nrf905_trx_ce_pin_direction is pin_B4_direction  -- To (tx_)ce of
> nRF905
>
> the rest of the program remains unchanged.
>
> As you can see, it seems that the module always "sees" something to
> receive... Also some parameters appear to be incorrect, but I don't know
> what to change.
> Maybe there is something specific to add for the 18F45K22 ?
>
> Regards,
> Gilles
>
> Le lundi 8 février 2021 à 18:56:47 UTC+1, rob...@hotmail.com a écrit :
>
> Hi Gilles,
>
> Sorry to hear that.
>
> I had a quick look at you schematic diagram but there is something that I
> do not understand. You have made connections to the module using port B but
> the interface pins in your software for the communication are all on port C
> (and one on A).
>
> I am talking about these pin assignments in your program
> -- nRF905 pin definition.
> alias nrf905_spi_sck is pin_C0 -- Pin 10 for 14 pin DIP
> alias nrf905_spi_sck_direction is pin_C0_direction -- To SCK of nRF905
> alias nrf905_spi_sdi is pin_C1 -- Pin 9 for 14 pin DIP.
> alias nrf905_spi_sdi_direction is pin_C1_direction -- To MISO of nRF905
> alias nrf905_spi_sdo is pin_C2 -- Pin 8 for 14 pin DIP.
> alias nrf905_spi_sdo_direction is pin_C2_direction -- To MOSI of nRFF905
> alias nrf905_csn_pin is pin_C3 -- Pin 7 for 14 pin DIP.
> alias nrf905_csn_pin_direction is pin_C3_direction -- To csn of nRF905
> alias nrf905_txen_pin is pin_A5 -- Pin 2 for 14 pin DIP.
> alias nrf905_txen_pin_direction is pin_A5_direction -- To txen of nRF905
> alias nrf905_trx_ce_pin is pin_A4 -- Pin 3 for 14 pin DIP.
> alias nrf905_trx_ce_pin_direction is pin_A4_direction  -- To (tx_)ce of
> nRF905
>
> These aliases are still from the sample program. You have to change these
> aliases so that they match with your hardware schematig. Or am I missing
> something here?
>
> Kind regards,
>
> Rob
>
> --
> *Van:* jal...@googlegroups.com  namens
> bar...@gmail.com 
> *Verzonden:* maandag 8 februari 2021 14:50
> *Aan:* jallib 
>
> *Onderwerp:* Re: [jallib] [jallib/jallib] 1dd7c1: Added new JAL library
> for the nRF905
> Hello Rob
>
> A bit late :-( but I never could make this library work for me.
>
> Here is my code, which is a simple copy of your sample, whithout the use
> of interruptions.
>
> --
> %~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%
> -- %
>  %
> -- %Test Module nRF905
>  %
> -- %
>  %
> -- % Langage JALV2
>  %
> -- % GBA 01/2021
>  %
> --
> %~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%
>
> include 18f45k22 -- target PICmicro
> --
> -- This program assumes that a 20 MHz resonator or crystal
> -- is connected to pins OSC1 and OSC2.
> pragma target clock 20_000_000  -- oscillator frequency
> --
> pragma target OSC  HSH   

Re: [jallib] [jallib/jallib] 1dd7c1: Added new JAL library for the nRF905

[Rob CJ]

Hi Gilles,

I can give it a try this weekend. I do not have a 18f45k22 but I may have a 
18f25k22 (same family).

One more question. This device operates at 3.3 Volt and in your schematic 
diagram you connect it to VCC and directly to the PIC but for that your PIC 
needs to work at 3.3. Volt too.

If the PIC is operating at 5 Volt you need to have level shifters between the 
PIC and the nRF905. Also see the blog post: JAL Library for the nRF905 
transceiver module | Just Another JAL Website 
(justanotherlanguage.org)

I hope VCC is not +5Volt. If so then you may have damaged the device. Let me 
know if this is the case or not.

I will let you know as soon as I have tested it with your program.

Kind regards,

Rob


Van: jallib@googlegroups.com  namens bar...@gmail.com 

Verzonden: dinsdag 9 februari 2021 09:07
Aan: jallib 
Onderwerp: Re: [jallib] [jallib/jallib] 1dd7c1: Added new JAL library for the 
nRF905

Hi Rob,

thank you for your quick answer
Yes you're right, I made a mistake while posting (I was a bit tired ;-) , the 
correct code I tested with is this one:

-- nRF905 pin definition.
alias nrf905_spi_sck is pin_B3
alias nrf905_spi_sck_direction is pin_B3_direction -- To SCK of nRF905
alias nrf905_spi_sdi is pin_B1
alias nrf905_spi_sdi_direction is pin_B1_direction -- To MISO of nRF905
alias nrf905_spi_sdo is pin_B2
alias nrf905_spi_sdo_direction is pin_B2_direction -- To MOSI of nRFF905
alias nrf905_csn_pin is pin_A1
alias nrf905_csn_pin_direction is pin_A1_direction -- To csn of nRF905
alias nrf905_txen_pin is pin_B5
alias nrf905_txen_pin_direction is pin_B5_direction -- To txen of nRF905
alias nrf905_trx_ce_pin is pin_B4
alias nrf905_trx_ce_pin_direction is pin_B4_direction  -- To (tx_)ce of nRF905

the rest of the program remains unchanged.

As you can see, it seems that the module always "sees" something to receive... 
Also some parameters appear to be incorrect, but I don't know what to change.
Maybe there is something specific to add for the 18F45K22 ?

Regards,
Gilles

Le lundi 8 février 2021 à 18:56:47 UTC+1, rob...@hotmail.com a écrit :
Hi Gilles,

Sorry to hear that.

I had a quick look at you schematic diagram but there is something that I do 
not understand. You have made connections to the module using port B but the 
interface pins in your software for the communication are all on port C (and 
one on A).

I am talking about these pin assignments in your program
-- nRF905 pin definition.
alias nrf905_spi_sck is pin_C0 -- Pin 10 for 14 pin DIP
alias nrf905_spi_sck_direction is pin_C0_direction -- To SCK of nRF905
alias nrf905_spi_sdi is pin_C1 -- Pin 9 for 14 pin DIP.
alias nrf905_spi_sdi_direction is pin_C1_direction -- To MISO of nRF905
alias nrf905_spi_sdo is pin_C2 -- Pin 8 for 14 pin DIP.
alias nrf905_spi_sdo_direction is pin_C2_direction -- To MOSI of nRFF905
alias nrf905_csn_pin is pin_C3 -- Pin 7 for 14 pin DIP.
alias nrf905_csn_pin_direction is pin_C3_direction -- To csn of nRF905
alias nrf905_txen_pin is pin_A5 -- Pin 2 for 14 pin DIP.
alias nrf905_txen_pin_direction is pin_A5_direction -- To txen of nRF905
alias nrf905_trx_ce_pin is pin_A4 -- Pin 3 for 14 pin DIP.
alias nrf905_trx_ce_pin_direction is pin_A4_direction  -- To (tx_)ce of nRF905

These aliases are still from the sample program. You have to change these 
aliases so that they match with your hardware schematig. Or am I missing 
something here?

Kind regards,

Rob


Van: jal...@googlegroups.com  namens bar...@gmail.com 

Verzonden: maandag 8 februari 2021 14:50
Aan: jallib 

Onderwerp: Re: [jallib] [jallib/jallib] 1dd7c1: Added new JAL library for the 
nRF905
Hello Rob

A bit late :-( but I never could make this library work for me.

Here is my code, which is a simple copy of your sample, whithout the use of 
interruptions.

-- %~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%
-- %   %
-- %Test Module nRF905 %
-- %   %
-- % Langage JALV2 %
-- % GBA 01/2021   %
-- %~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%

include 18f45k22 -- target PICmicro
--
-- This program assumes that a 20 MHz resonator or crystal
-- is connected to pins OSC1 and OSC2.
pragma target clock 20_000_000  -- oscillator frequency
--
pragma target OSC  HSH   -- crystal or resonator
pragma target PLLENDISABLED  -- PLL off
pragma target WDT  DISABLED  -- watchdog
pragma target XINSTDISABLED  -- do not use extended 
instructionset
pragma target DEBUGDISABLED

[jallib] [jallib/jallib] 9b7a0c: Added new device files and blink samples

['Rob Jansen' via jallib]

  Branch: refs/heads/master
  Home:   https://github.com/jallib/jallib
  Commit: 9b7a0cff3206ab08dc85f890537a729dc61cff25
  
https://github.com/jallib/jallib/commit/9b7a0cff3206ab08dc85f890537a729dc61cff25
  Author: Rob Jansen <12682653+robjanse...@users.noreply.github.com>
  Date:   2021-02-09 (Tue, 09 Feb 2021)

  Changed paths:
M CHANGELOG
M TORELEASE
M include/device/18f06q41.jal
M include/device/18f16q41.jal
M include/device/18f27q84.jal
A include/device/18f47q84.jal
M include/device/18f57q84.jal
M include/device/chipdef_jallib.jal
A sample/18f47q84_blink_intosc.jal
M tools/blink-a-led.py
M tools/devicespecific.json

  Log Message:
  ---
  Added new device files and blink samples

Also included are an update of the blink-a-led.py script for disabling multi 
vectored interrupt and JTAG.


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[jallib] [jallib/jallib] c6488f: Update of blink samples

['Rob Jansen' via jallib]

  Branch: refs/heads/master
  Home:   https://github.com/jallib/jallib
  Commit: c6488f05e025d00588989c5cdcbbb398fe6486d1
  
https://github.com/jallib/jallib/commit/c6488f05e025d00588989c5cdcbbb398fe6486d1
  Author: Rob Jansen <12682653+robjanse...@users.noreply.github.com>
  Date:   2021-02-09 (Tue, 09 Feb 2021)

  Changed paths:
M sample/18f04q40_blink_intosc.jal
M sample/18f04q41_blink_intosc.jal
M sample/18f05q40_blink_intosc.jal
M sample/18f05q41_blink_intosc.jal
M sample/18f06q40_blink_intosc.jal
M sample/18f06q41_blink_intosc.jal
M sample/18f14q40_blink_intosc.jal
M sample/18f14q41_blink_intosc.jal
M sample/18f15q40_blink_intosc.jal
M sample/18f15q41_blink_intosc.jal
M sample/18f16q40_blink_intosc.jal
M sample/18f16q41_blink_intosc.jal
M sample/18f24k42_blink_intosc.jal
M sample/18f25k42_blink_intosc.jal
M sample/18f25k83_blink_intosc.jal
M sample/18f25q43_blink_intosc.jal
M sample/18f26k42_blink_intosc.jal
M sample/18f26k83_blink_intosc.jal
M sample/18f26q43_blink_intosc.jal
M sample/18f27k42_blink_intosc.jal
M sample/18f27q43_blink_intosc.jal
M sample/18f27q84_blink_intosc.jal
M sample/18f45k42_blink_intosc.jal
M sample/18f45q43_blink_intosc.jal
M sample/18f46k42_blink_intosc.jal
M sample/18f46q43_blink_intosc.jal
M sample/18f47k42_blink_intosc.jal
M sample/18f47q43_blink_intosc.jal
M sample/18f47q83_blink_intosc.jal
M sample/18f55k42_blink_intosc.jal
M sample/18f55q43_blink_intosc.jal
M sample/18f56k42_blink_intosc.jal
M sample/18f56q43_blink_intosc.jal
M sample/18f57k42_blink_intosc.jal
M sample/18f57q43_blink_intosc.jal
M sample/18f57q84_blink_intosc.jal
M sample/18lf24k42_blink_intosc.jal
M sample/18lf25k42_blink_intosc.jal
M sample/18lf25k83_blink_intosc.jal
M sample/18lf26k42_blink_intosc.jal
M sample/18lf26k83_blink_intosc.jal
M sample/18lf27k42_blink_intosc.jal
M sample/18lf45k42_blink_intosc.jal
M sample/18lf46k42_blink_intosc.jal
M sample/18lf47k42_blink_intosc.jal
M sample/18lf55k42_blink_intosc.jal
M sample/18lf56k42_blink_intosc.jal
M sample/18lf57k42_blink_intosc.jal

  Log Message:
  ---
  Update of blink samples

Added MVECEN DISABLED and where needed JTAGEN DISABLED.


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[jallib] [jallib/jallib] c7d7a0: Update pps.jal

['Rob Jansen' via jallib]

  Branch: refs/heads/master
  Home:   https://github.com/jallib/jallib
  Commit: c7d7a0e1457616c943209bbacfb61583565d33e9
  
https://github.com/jallib/jallib/commit/c7d7a0e1457616c943209bbacfb61583565d33e9
  Author: Rob Jansen <12682653+robjanse...@users.noreply.github.com>
  Date:   2021-02-09 (Tue, 09 Feb 2021)

  Changed paths:
M include/peripheral/pps/pps.jal

  Log Message:
  ---
  Update pps.jal

Alias added to support newer PICs. Work done by Oliver "Kiste" Seitz.


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[jallib] [jallib build] buildbot success in jallib on jallib-standard

[build]

Hi guys,

This is buildbot speaking. I have finished a build of jallib-standard on jallib.
Buildslave for this Build: sebbot

Build Reason: 
Build Source Stamp: HEAD
Blamelist: mattschinkel

Build succeeded!
Logs are attached.

sincerely,
 -The Buildbot

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Updating '.':

UU   CHANGELOG

Updated to revision 3728.

2136 samples to validate...

1099 libraries to validate...

All files validated :)

Environment config

JALLIB_ROOT=/home/mattschinkel/jallib/slave/standard/build

JALLIB_REPOS=/home/mattschinkel/jallib/slave/standard/build/include

JALLIB_SAMPLEDIR=/home/mattschinkel/jallib/slave/standard/build/sample

JALLIB_JALV2=/home/mattschinkel/bin/jalv2

JALLIB_PYTHON=python2.7



Time duration: 349 secs

jal jalv25r4 (compiled Dec 26 2020)

Required parameter to hex is missing!

no source file, use /home/mattschinkel/bin/jalv2 --help for help

Error while compiling file (status=1).

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2136 samples to compile...

All samples compile :)

Environment config

JALLIB_ROOT=/home/mattschinkel/jallib/slave/standard/build

JALLIB_REPOS=/home/mattschinkel/jallib/slave/standard/build/include

JALLIB_SAMPLEDIR=/home/mattschinkel/jallib/slave/standard/build/sample

JALLIB_JALV2=/home/mattschinkel/bin/jalv2

JALLIB_PYTHON=python2.7



Time duration: 1487 secs

Re: [jallib] [jallib/jallib] 1dd7c1: Added new JAL library for the nRF905

[bar...@gmail.com]

Hi Rob,

thank you for your quick answer
Yes you're right, I made a mistake while posting (I was a bit tired ;-) , 
the correct code I tested with is this one:

-- nRF905 pin definition.
alias nrf905_spi_sck is pin_B3
alias nrf905_spi_sck_direction is pin_B3_direction -- To SCK of nRF905
alias nrf905_spi_sdi is pin_B1
alias nrf905_spi_sdi_direction is pin_B1_direction -- To MISO of nRF905
alias nrf905_spi_sdo is pin_B2
alias nrf905_spi_sdo_direction is pin_B2_direction -- To MOSI of nRFF905
alias nrf905_csn_pin is pin_A1
alias nrf905_csn_pin_direction is pin_A1_direction -- To csn of nRF905
alias nrf905_txen_pin is pin_B5
alias nrf905_txen_pin_direction is pin_B5_direction -- To txen of nRF905
alias nrf905_trx_ce_pin is pin_B4
alias nrf905_trx_ce_pin_direction is pin_B4_direction  -- To (tx_)ce of 
nRF905

the rest of the program remains unchanged.

As you can see, it seems that the module always "sees" something to 
receive... Also some parameters appear to be incorrect, but I don't know 
what to change.
Maybe there is something specific to add for the 18F45K22 ?

Regards,
Gilles

Le lundi 8 février 2021 à 18:56:47 UTC+1, rob...@hotmail.com a écrit :

> Hi Gilles,
>
> Sorry to hear that.
>
> I had a quick look at you schematic diagram but there is something that I 
> do not understand. You have made connections to the module using port B but 
> the interface pins in your software for the communication are all on port C 
> (and one on A).
>
> I am talking about these pin assignments in your program
> -- nRF905 pin definition. 
> alias nrf905_spi_sck is pin_C0 -- Pin 10 for 14 pin DIP
> alias nrf905_spi_sck_direction is pin_C0_direction -- To SCK of nRF905
> alias nrf905_spi_sdi is pin_C1 -- Pin 9 for 14 pin DIP.
> alias nrf905_spi_sdi_direction is pin_C1_direction -- To MISO of nRF905
> alias nrf905_spi_sdo is pin_C2 -- Pin 8 for 14 pin DIP.
> alias nrf905_spi_sdo_direction is pin_C2_direction -- To MOSI of nRFF905
> alias nrf905_csn_pin is pin_C3 -- Pin 7 for 14 pin DIP.
> alias nrf905_csn_pin_direction is pin_C3_direction -- To csn of nRF905
> alias nrf905_txen_pin is pin_A5 -- Pin 2 for 14 pin DIP.
> alias nrf905_txen_pin_direction is pin_A5_direction -- To txen of nRF905
> alias nrf905_trx_ce_pin is pin_A4 -- Pin 3 for 14 pin DIP.
> alias nrf905_trx_ce_pin_direction is pin_A4_direction  -- To (tx_)ce of 
> nRF905
>
> These aliases are still from the sample program. You have to change these 
> aliases so that they match with your hardware schematig. Or am I missing 
> something here?
>
> Kind regards,
>
> Rob
>
> --
> *Van:* jal...@googlegroups.com  namens 
> bar...@gmail.com 
> *Verzonden:* maandag 8 februari 2021 14:50
> *Aan:* jallib 
>
> *Onderwerp:* Re: [jallib] [jallib/jallib] 1dd7c1: Added new JAL library 
> for the nRF905
> Hello Rob 
>
> A bit late :-( but I never could make this library work for me.
>
> Here is my code, which is a simple copy of your sample, whithout the use 
> of interruptions.
>
> -- 
> %~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%
> -- %  
>  %
> -- %Test Module nRF905
>  %
> -- %  
>  %
> -- % Langage JALV2
>  %
> -- % GBA 01/2021  
>  %
> -- 
> %~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%~%
>
> include 18f45k22 -- target PICmicro
> --
> -- This program assumes that a 20 MHz resonator or crystal
> -- is connected to pins OSC1 and OSC2.
> pragma target clock 20_000_000  -- oscillator frequency
> --
> pragma target OSC  HSH   -- crystal or resonator
> pragma target PLLENDISABLED  -- PLL off
> pragma target WDT  DISABLED  -- watchdog
> pragma target XINSTDISABLED  -- do not use extended 
> instructionset
> pragma target DEBUGDISABLED  -- no debugging
> pragma target BROWNOUT DISABLED  -- no brownout reset
> pragma target FCMENDISABLED  -- no clock monitoring
> pragma target IESO DISABLED  -- no int/ext osc 
> switching
> pragma target LVP  ENABLED  --  low voltage programming
> pragma target MCLR INTERNAL  -- no external reset
> --
> -- The configuration bit settings above are only a selection, sufficient
> -- for this program. Other programs may need more or different settings.
> --
> OSCCON_SCS = 0  -- select primary oscillator
> OSCTUNE_PLLEN = FALSE   -- no PLL
>
> include delay
> include print  -- formatted output library
>
> -- Active les résistances pull-up du port B
> INTCON2_NRBPU = 0
>