[Kernel-packages] [Bug 1718825] Re: [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID) support for OSV

2017-10-25 Thread quanxian
The changes are too invasive (they will not backport cleanly), they are
not stable yet (there are still bugs being found in 4.14-rcX). The
performance implications are also not well-documented across the
platforms that we care about.

The opinion is that it is not practical or a good idea to pursue putting
this code back into old distributions, closing this.


** Changed in: intel
   Status: New => Won't Fix

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Title:
  [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID)
  support for OSV

Status in intel:
  Won't Fix
Status in linux package in Ubuntu:
  Incomplete

Bug description:
  Description:

  The mapping from virtual address to physical address will be stored in 
someplace called TLB,
  CPU need to occasionally flush TLB for different reasons, the flush will 
impact all process address mapping,
  with PCID support, the impact will be minimal, this will bring overcall 
performance boost.

  
  The commits comes from Andy Lutomirski(not Intel), which is quite recent, on 
July 5 2017.
  Part1:
  660da7c9228f x86/mm: Enable CR4.PCIDE on supported systems
  0790c9aad849 x86/mm: Add the 'nopcid' boot option to turn off PCID
  cba4671af755 x86/mm: Disable PCID on 32-bit kernels
  43858b4f25cf x86/mm: Stop calling leave_mm() in idle code
  94b1b03b519b x86/mm: Rework lazy TLB mode and TLB freshness tracking
  b0579ade7cd8 x86/mm: Track the TLB's tlb_gen and update the flushing algorithm
  f39681ed0f48 x86/mm: Give each mm TLB flush generation a unique ID
  Part2:
  10af6235e0d3 x86/mm: Implement PCID based optimization: try to preserve old 
TLB entries using PCID

  Target Release: 17.10
  Kernel: 4.14

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[Kernel-packages] [Bug 1718825] Re: [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID) support for OSV

2017-10-03 Thread Seth Forshee
Let's defer to 18.04.

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Title:
  [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID)
  support for OSV

Status in intel:
  New
Status in linux package in Ubuntu:
  Incomplete

Bug description:
  Description:

  The mapping from virtual address to physical address will be stored in 
someplace called TLB,
  CPU need to occasionally flush TLB for different reasons, the flush will 
impact all process address mapping,
  with PCID support, the impact will be minimal, this will bring overcall 
performance boost.

  
  The commits comes from Andy Lutomirski(not Intel), which is quite recent, on 
July 5 2017.
  Part1:
  660da7c9228f x86/mm: Enable CR4.PCIDE on supported systems
  0790c9aad849 x86/mm: Add the 'nopcid' boot option to turn off PCID
  cba4671af755 x86/mm: Disable PCID on 32-bit kernels
  43858b4f25cf x86/mm: Stop calling leave_mm() in idle code
  94b1b03b519b x86/mm: Rework lazy TLB mode and TLB freshness tracking
  b0579ade7cd8 x86/mm: Track the TLB's tlb_gen and update the flushing algorithm
  f39681ed0f48 x86/mm: Give each mm TLB flush generation a unique ID
  Part2:
  10af6235e0d3 x86/mm: Implement PCID based optimization: try to preserve old 
TLB entries using PCID

  Target Release: 17.10
  Kernel: 4.14

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[Kernel-packages] [Bug 1718825] Re: [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID) support for OSV

2017-09-28 Thread quanxian
@Canonical
if the backporting works is not easy, we just move it into 18.04.
If the backporting is fine for you, just do it.

The patches are from outside who is not from Intel. we just find that
and list the patches here.

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https://bugs.launchpad.net/bugs/1718825

Title:
  [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID)
  support for OSV

Status in intel:
  New
Status in linux package in Ubuntu:
  Incomplete

Bug description:
  Description:

  The mapping from virtual address to physical address will be stored in 
someplace called TLB,
  CPU need to occasionally flush TLB for different reasons, the flush will 
impact all process address mapping,
  with PCID support, the impact will be minimal, this will bring overcall 
performance boost.

  
  The commits comes from Andy Lutomirski(not Intel), which is quite recent, on 
July 5 2017.
  Part1:
  660da7c9228f x86/mm: Enable CR4.PCIDE on supported systems
  0790c9aad849 x86/mm: Add the 'nopcid' boot option to turn off PCID
  cba4671af755 x86/mm: Disable PCID on 32-bit kernels
  43858b4f25cf x86/mm: Stop calling leave_mm() in idle code
  94b1b03b519b x86/mm: Rework lazy TLB mode and TLB freshness tracking
  b0579ade7cd8 x86/mm: Track the TLB's tlb_gen and update the flushing algorithm
  f39681ed0f48 x86/mm: Give each mm TLB flush generation a unique ID
  Part2:
  10af6235e0d3 x86/mm: Implement PCID based optimization: try to preserve old 
TLB entries using PCID

  Target Release: 17.10
  Kernel: 4.14

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[Kernel-packages] [Bug 1718825] Re: [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID) support for OSV

2017-09-28 Thread Seth Forshee
It's really not clear to me whether some of the changes to
arch/x86/mm/tlb.c should be applied without additional prerequisite
patches. Can you please advise? Thanks.

** Changed in: linux (Ubuntu)
   Status: Triaged => Incomplete

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You received this bug notification because you are a member of Kernel
Packages, which is subscribed to linux in Ubuntu.
https://bugs.launchpad.net/bugs/1718825

Title:
  [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID)
  support for OSV

Status in intel:
  New
Status in linux package in Ubuntu:
  Incomplete

Bug description:
  Description:

  The mapping from virtual address to physical address will be stored in 
someplace called TLB,
  CPU need to occasionally flush TLB for different reasons, the flush will 
impact all process address mapping,
  with PCID support, the impact will be minimal, this will bring overcall 
performance boost.

  
  The commits comes from Andy Lutomirski(not Intel), which is quite recent, on 
July 5 2017.
  Part1:
  660da7c9228f x86/mm: Enable CR4.PCIDE on supported systems
  0790c9aad849 x86/mm: Add the 'nopcid' boot option to turn off PCID
  cba4671af755 x86/mm: Disable PCID on 32-bit kernels
  43858b4f25cf x86/mm: Stop calling leave_mm() in idle code
  94b1b03b519b x86/mm: Rework lazy TLB mode and TLB freshness tracking
  b0579ade7cd8 x86/mm: Track the TLB's tlb_gen and update the flushing algorithm
  f39681ed0f48 x86/mm: Give each mm TLB flush generation a unique ID
  Part2:
  10af6235e0d3 x86/mm: Implement PCID based optimization: try to preserve old 
TLB entries using PCID

  Target Release: 17.10
  Kernel: 4.14

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[Kernel-packages] [Bug 1718825] Re: [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID) support for OSV

2017-09-23 Thread quanxian
Thanks

If possible,just take it.

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You received this bug notification because you are a member of Kernel
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https://bugs.launchpad.net/bugs/1718825

Title:
  [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID)
  support for OSV

Status in intel:
  New
Status in linux package in Ubuntu:
  Triaged

Bug description:
  Description:

  The mapping from virtual address to physical address will be stored in 
someplace called TLB,
  CPU need to occasionally flush TLB for different reasons, the flush will 
impact all process address mapping,
  with PCID support, the impact will be minimal, this will bring overcall 
performance boost.

  
  The commits comes from Andy Lutomirski(not Intel), which is quite recent, on 
July 5 2017.
  Part1:
  660da7c9228f x86/mm: Enable CR4.PCIDE on supported systems
  0790c9aad849 x86/mm: Add the 'nopcid' boot option to turn off PCID
  cba4671af755 x86/mm: Disable PCID on 32-bit kernels
  43858b4f25cf x86/mm: Stop calling leave_mm() in idle code
  94b1b03b519b x86/mm: Rework lazy TLB mode and TLB freshness tracking
  b0579ade7cd8 x86/mm: Track the TLB's tlb_gen and update the flushing algorithm
  f39681ed0f48 x86/mm: Give each mm TLB flush generation a unique ID
  Part2:
  10af6235e0d3 x86/mm: Implement PCID based optimization: try to preserve old 
TLB entries using PCID

  Target Release: 17.10
  Kernel: 4.14

To manage notifications about this bug go to:
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[Kernel-packages] [Bug 1718825] Re: [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID) support for OSV

2017-09-22 Thread Seth Forshee
Right away I notice some commits which look to be fixes for commits in
this series:

f34902c5c6c0 "x86/hibernate/64: Mask off CR3's PCID bits in the saved CR3"
c7ad5ad297e6 "x86/mm/64: Initialize CR4.PCIDE early"
a2105f8a9c38 "tools headers: Sync cpu features kernel ABI headers with tooling 
headers"
72c0098d92ce "x86/mm: Reinitialize TLB state on hotplug and resume"

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You received this bug notification because you are a member of Kernel
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https://bugs.launchpad.net/bugs/1718825

Title:
  [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID)
  support for OSV

Status in intel:
  New
Status in linux package in Ubuntu:
  Triaged

Bug description:
  Description:

  The mapping from virtual address to physical address will be stored in 
someplace called TLB,
  CPU need to occasionally flush TLB for different reasons, the flush will 
impact all process address mapping,
  with PCID support, the impact will be minimal, this will bring overcall 
performance boost.

  
  The commits comes from Andy Lutomirski(not Intel), which is quite recent, on 
July 5 2017.
  Part1:
  660da7c9228f x86/mm: Enable CR4.PCIDE on supported systems
  0790c9aad849 x86/mm: Add the 'nopcid' boot option to turn off PCID
  cba4671af755 x86/mm: Disable PCID on 32-bit kernels
  43858b4f25cf x86/mm: Stop calling leave_mm() in idle code
  94b1b03b519b x86/mm: Rework lazy TLB mode and TLB freshness tracking
  b0579ade7cd8 x86/mm: Track the TLB's tlb_gen and update the flushing algorithm
  f39681ed0f48 x86/mm: Give each mm TLB flush generation a unique ID
  Part2:
  10af6235e0d3 x86/mm: Implement PCID based optimization: try to preserve old 
TLB entries using PCID

  Target Release: 17.10
  Kernel: 4.14

To manage notifications about this bug go to:
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[Kernel-packages] [Bug 1718825] Re: [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID) support for OSV

2017-09-22 Thread Seth Forshee
** Information type changed from Proprietary to Public

** Also affects: linux (Ubuntu)
   Importance: Undecided
   Status: New

** Changed in: linux (Ubuntu)
   Importance: Undecided => Medium

** Changed in: linux (Ubuntu)
   Status: New => Triaged

** Changed in: linux (Ubuntu)
 Assignee: (unassigned) => Seth Forshee (sforshee)

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You received this bug notification because you are a member of Kernel
Packages, which is subscribed to linux in Ubuntu.
https://bugs.launchpad.net/bugs/1718825

Title:
  [Feature] Cristal Ridge: x86 Process Context IDentifiers (PCID)
  support for OSV

Status in intel:
  New
Status in linux package in Ubuntu:
  Triaged

Bug description:
  Description:

  The mapping from virtual address to physical address will be stored in 
someplace called TLB,
  CPU need to occasionally flush TLB for different reasons, the flush will 
impact all process address mapping,
  with PCID support, the impact will be minimal, this will bring overcall 
performance boost.

  
  The commits comes from Andy Lutomirski(not Intel), which is quite recent, on 
July 5 2017.
  Part1:
  660da7c9228f x86/mm: Enable CR4.PCIDE on supported systems
  0790c9aad849 x86/mm: Add the 'nopcid' boot option to turn off PCID
  cba4671af755 x86/mm: Disable PCID on 32-bit kernels
  43858b4f25cf x86/mm: Stop calling leave_mm() in idle code
  94b1b03b519b x86/mm: Rework lazy TLB mode and TLB freshness tracking
  b0579ade7cd8 x86/mm: Track the TLB's tlb_gen and update the flushing algorithm
  f39681ed0f48 x86/mm: Give each mm TLB flush generation a unique ID
  Part2:
  10af6235e0d3 x86/mm: Implement PCID based optimization: try to preserve old 
TLB entries using PCID

  Target Release: 17.10
  Kernel: 4.14

To manage notifications about this bug go to:
https://bugs.launchpad.net/intel/+bug/1718825/+subscriptions

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