Avi,
Any comments?
Thanks,
Jinsong
Liu, Jinsong wrote:
From ecd8be962f69393c183f941bfdbd7a7d3876d442 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong jinsong@intel.com
Date: Mon, 27 Feb 2012 05:19:32 +0800
Subject: [PATCH] KVM: expose Intel cpu new features to guest
Intel recently release 2 new features, HLE and TRM.
Refer to http://software.intel.com/file/41417.
This patch expose them to guest.
Signed-off-by: Liu, Jinsong jinsong@intel.com
---
arch/x86/include/asm/cpufeature.h |2 ++
arch/x86/kvm/cpuid.c |3 ++-
2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/x86/include/asm/cpufeature.h
b/arch/x86/include/asm/cpufeature.h
index 17c5d4b..e8d12a8 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -198,10 +198,12 @@
/* Intel-defined CPU features, CPUID level 0x0007:0 (ebx), word
9 */ #define X86_FEATURE_FSGSBASE(9*32+ 0) /* {RD/WR}{FS/GS}BASE
instructions*/ #define X86_FEATURE_BMI1 (9*32+ 3) /* 1st group bit
manipulation extensions */ +#define X86_FEATURE_HLE (9*32+ 4) /*
Hardware Lock Elision */ #define X86_FEATURE_AVX2(9*32+ 5) /* AVX2
instructions */ #define X86_FEATURE_SMEP (9*32+ 7) /* Supervisor
Mode Execution Protection */ #define X86_FEATURE_BMI2(9*32+ 8) /*
2nd group bit manipulation extensions */ #define
X86_FEATURE_ERMS (9*32+ 9) /* Enhanced REP MOVSB/STOSB */ +#define
X86_FEATURE_RTM (9*32+11) /* Restricted Transactional Memory */
#if defined(__KERNEL__) !defined(__ASSEMBLY__)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 9fed5be..c2134b8 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -247,7 +247,8 @@ static int do_cpuid_ent(struct kvm_cpuid_entry2
*entry, u32 function,
/* cpuid 7.0.ebx */
const u32 kvm_supported_word9_x86_features =
- F(FSGSBASE) | F(BMI1) | F(AVX2) | F(SMEP) | F(BMI2) | F(ERMS);
+ F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
+ F(BMI2) | F(ERMS) | F(RTM);
/* all calls to cpuid_count() should be made on the same cpu */
get_cpu();
--
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