Re: A KVM kernel for FVP for ARM7
The bellow is the command line I use. I am using now 4.14.48 compiled as arm7/ARCH-VEXPRESS . there is no clock tick. The boot hangs in: while (get_jiffies_64() < waitjiffies) udelay(10); /opt/DS-5_v5.28.1/sw/models/bin/FVP_VE_Cortex-A9x1 -a /opt/arm7/FVP/FVP_VE_V7/FVP_VE_V7.axf --data /opt/tlinux-4.14.48/arch/arm/boot/Image@0x80008000 -f /opt/truly/arm7/fvpbase.conf --data /opt/t/linux-4.14.48/arch/arm/boot/dts/vexpress-v2p-ca9.dtb Any idea ? On Thu, Jun 7, 2018 at 10:34 AM, Christoffer Dall wrote: > On Wed, Jun 06, 2018 at 09:22:52AM +0300, Raz wrote: > > Hello > > KVM arm was introduced in 3.9. I wish to debug it through fast models. > > My problem is that FVP uses 3.4 kernel, and 3.9 from "git:// > > git.kernel.org/pub/scm/virt/kvm/kvm.git " does not boot it. > > > > Do you have a ready kernel for FVP ? > > Mainline kernels should boot just fine on Arm fast models. I strongly > recommend you use a much newer kernel version for anything KVM-related. > > -Christoffer > ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
A KVM kernel for FVP for ARM7
Hello KVM arm was introduced in 3.9. I wish to debug it through fast models. My problem is that FVP uses 3.4 kernel, and 3.9 from "git:// git.kernel.org/pub/scm/virt/kvm/kvm.git " does not boot it. Do you have a ready kernel for FVP ? Thank you Raz ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
unmap_ptes is not complete
Hey in mmu.c unmap_ptes() you invalidate *pte but not the pte itself. This leads to inconsistency in el2 translation tables. ie; the pte entry is cleared in the cached memory but not in the RAM, so the entry may still be valid in EL2 translation tables. You should also clear pte itself. Kind Regards Raz ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
MAIR_EL2 Attributes
1. According the documentation of MAIR_EL2 there are 8 attributes but in the code you present only 6. Why ? 2. Why there are names to the attributes ? Does it make a difference if I assign an attribute index 2 or attribute index 0 in the page while the two attr /* * Memory types available. */ #define MT_DEVICE_nGnRnE0 #define MT_DEVICE_nGnRE1 #define MT_DEVICE_GRE2 #define MT_NORMAL_NC3 #define MT_NORMAL4 #define MT_NORMAL_WT5 ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Re: How to trap a real interrupt to EL2 ?
The entry woken in the vector is IRQ 64-bit EL1 ( same as el1_irq in kvn/hyp.S ). ESR_EL2.EC = 0x16 -" HVC executed in EL2". It does not change. Jintack CPSR.I is 1 , but I do not think I can just clear it, if that what you mean... Chrtistoph You deactivate traps in kvm_vcpu_return( called from el1_irq). Does it mean we cannot exit-enter the hypervisor when hcr_el2.IMO is enabled ? thx On Tue, Jul 4, 2017 at 11:12 AM, Christoffer Dall <cd...@linaro.org> wrote: > On Mon, Jul 03, 2017 at 09:56:06PM +, Raz wrote: > > Hey > > > > I am trying to trap any real IRQ into EL2. > > I created a thin hypervisor with mmu enabled and set hcr_el2 as follows: > > hcr_el2= HCR_IMO | HCR_VM | HCR_RW. > > > > > > Now it seems that once I set hcr_el2 to the above value and then exit > from > > EL2 I immediately jump back to EL2. > > You could read the ESR_EL2 and figure out what caused the exception... > > -Christoffer > -- https://sites.google.com/site/ironspeedlinux/ ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
How to trap a real interrupt to EL2 ?
Hey I am trying to trap any real IRQ into EL2. I created a thin hypervisor with mmu enabled and set hcr_el2 as follows: hcr_el2= HCR_IMO | HCR_VM | HCR_RW. Now it seems that once I set hcr_el2 to the above value and then exit from EL2 I immediately jump back to EL2. Any idea why ? ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Looking a bootloader code on Armv8a cpu
Hey I want to run a hypervisor on an Android smart phone. Where can I find a modified boot loader that can boot kvm on an Armv8a processor ? Thank you ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
A question about TTBRs
Hello I am reading the arm8a book. According to the documentation the output address of each level 3 entry in TTBRx_EL1points to an address in the physical memory. By looking in the mmu tab in the DS5 studio I can see the TTBRs tables. What I do not understand is why while I have 2GB of RAM in the FVP ( /proc/meminfo ) some page entries ( level 3 ) of the ttbr points to memory above 4GB; for instance: Output address NP:0xF794D000 Doesn't the physical memory starts at address zero ? if not, where its starting point is configured? Thank you Raz ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Re: Booting a kernel to EL1 in Armv8.1
On Wed, Jan 25, 2017 at 8:22 AM, Christoffer Dall < christoffer.d...@linaro.org> wrote: > On Tue, Jan 24, 2017 at 09:50:04PM +, Raz wrote: > > Hello > > > > I am trying to boot EL1 kernel in a platform based on Armv8.1. > > I am using fvp as a hardware. > > What I am trying to achieve is to execute some kernel code in > > EL2 exception level.. > > When you boot a reasonably recent kernel on VHE, it will execute in EL2, > so all the code you're executing will be at EL2, so I think you've > already achieved what you're trying to do. > > > > > The current VHE patch is booting the kernel into EL2. So I took an older > > kernel > > and I tried to set TTBR1_EL2 to access kernel memory as if it is > TTBR1_EL1 > > . > > That won't work unless you set the E2H bit, see the ARMv8.1 > documentation. > > If you boot a kernel that doesn't have the necessary bits to enable VHE, > then you'll just run as on a non-VHE system with the main kernel running > at EL1 and a stub installed at EL2 which eventually gets replaced by the > KVM hyp lowvisor code in EL2. > > > > > It is theoretically possible ? > > I'm not sure what you're asking? > > > Setting TTBR1_EL2 to TTBR1_EL1 > > and enabling mmu thtough sctlr_el2 does not work. > > > > Again, not sure what you're trying to do. If you're running in EL1 > (because you're old kernel drops you to EL1) then trying to access EL2 > registers obviously won't work. > > I created my own vector instead of kvm's . I am doing that because I want to create a sort of secured execution context by using a hypervisor. It is an academic work. I managed to do that by the way. I am calling regular kernel code in EL2. so thank you. If you run a VHE kernel, it will have already set the _EL2 registers to > the values you want (but it will use _EL1 register access intructions to > do so, and they are transparently rewritten by hardware to program the > corresponding _EL2 registers). > > Hope this helps, > -Christoffer > -- https://sites.google.com/site/ironspeedlinux/ ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Booting a kernel to EL1 in Armv8.1
Hello I am trying to boot EL1 kernel in a platform based on Armv8.1. I am using fvp as a hardware. What I am trying to achieve is to execute some kernel code in EL2 exception level.. The current VHE patch is booting the kernel into EL2. So I took an older kernel and I tried to set TTBR1_EL2 to access kernel memory as if it is TTBR1_EL1 . It is theoretically possible ? Setting TTBR1_EL2 to TTBR1_EL1 and enabling mmu thtough sctlr_el2 does not work. thank you Raz ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
