Re: [PATCH 1/2] ARM: msm: Add support for MSM8974 Dragonboard
On Tue, Aug 06, 2013 at 12:02:58AM +0100, Rohit Vaswani wrote:
> This patch adds basic board support for MSM8974 Dragonboard
> which belongs to the Snapdragon 800 family.
> For now, just support a basic machine with device tree.
>
> Signed-off-by: Rohit Vaswani
> ---
> arch/arm/boot/dts/Makefile| 3 ++-
> arch/arm/boot/dts/msm8974-db.dts | 26 ++
> arch/arm/mach-msm/Kconfig | 21 ++---
> arch/arm/mach-msm/Makefile| 1 +
> arch/arm/mach-msm/board-dt-8974.c | 23 +++
> 5 files changed, 70 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm/boot/dts/msm8974-db.dts
> create mode 100644 arch/arm/mach-msm/board-dt-8974.c
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 641b3c9a..62cea36 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -97,7 +97,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
> kirkwood-openblocks_a6.dtb
> dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
> - msm8960-cdp.dtb
> + msm8960-cdp.dtb \
> + msm8974-db.dtb
> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
> armada-370-mirabox.dtb \
> armada-370-rd.dtb \
> diff --git a/arch/arm/boot/dts/msm8974-db.dts
> b/arch/arm/boot/dts/msm8974-db.dts
> new file mode 100644
> index 000..badfc61
> --- /dev/null
> +++ b/arch/arm/boot/dts/msm8974-db.dts
> @@ -0,0 +1,26 @@
> +/dts-v1/;
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> + model = "Qualcomm MSM8974 Dragonboard";
> + compatible = "qcom,msm8974-db", "qcom,msm8974";
> + interrupt-parent = <&intc>;
> +
> + intc: interrupt-controller@f900 {
> + compatible = "qcom,msm-qgic2";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + reg = < 0xf900 0x1000 >,
> + < 0xf9002000 0x1000 >;
> + };
> +
> + timer {
> + compatible = "arm,armv7-timer";
> + interrupts = <1 2 0xf08>,
> + <1 3 0xf08>,
> + <1 4 0xf08>,
> + <1 1 0xf08>;
> + clock-frequency = <1920>;
Do you actually need this -- does your firmware and/or bootloader not
set CNTFRQ?
It's *far* preferable to set CNTFRQ. Virtualization hosts and guests
may not handle dt and may expect it to have been programmed as per the
ARM ARM.
Thanks,
Mark.
> + };
> +};
> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
> index 614e41e..343675b 100644
> --- a/arch/arm/mach-msm/Kconfig
> +++ b/arch/arm/mach-msm/Kconfig
> @@ -1,12 +1,12 @@
> if ARCH_MSM
>
> comment "Qualcomm MSM SoC Type"
> - depends on (ARCH_MSM8X60 || ARCH_MSM8960)
> + depends on ARCH_MSM_DT
>
> choice
> prompt "Qualcomm MSM SoC Type"
> default ARCH_MSM7X00A
> - depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
> + depends on !ARCH_MSM_DT
>
> config ARCH_MSM7X00A
> bool "MSM7x00A / MSM7x01A"
> @@ -60,6 +60,19 @@ config ARCH_MSM8960
> select MSM_SCM if SMP
> select USE_OF
>
> +config ARCH_MSM8974
> + bool "MSM8974"
> + select ARM_GIC
> + select CPU_V7
> + select HAVE_ARM_ARCH_TIMER
> + select HAVE_SMP
> + select MSM_SCM if SMP
> + select USE_OF
> +
> +config ARCH_MSM_DT
> + def_bool y
> + depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
> +
> config MSM_HAS_DEBUG_UART_HS
> bool
>
> @@ -68,6 +81,7 @@ config MSM_SOC_REV_A
>
> config ARCH_MSM_ARM11
> bool
> +
> config ARCH_MSM_SCORPION
> bool
>
> @@ -75,6 +89,7 @@ config MSM_VIC
> bool
>
> menu "Qualcomm MSM Board Type"
> + depends on !ARCH_MSM_DT
>
> config MACH_HALIBUT
> depends on ARCH_MSM
> @@ -121,7 +136,7 @@ config MSM_SMD
> bool
>
> config MSM_GPIOMUX
> - depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
> + depends on !ARCH_MSM_DT
> bool "MSM V1 TLMM GPIOMUX architecture"
> help
> Support for MSM V1 TLMM GPIOMUX architecture.
> diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
> index d257ff4..80e3b15 100644
> --- a/arch/arm/mach-msm/Makefile
> +++ b/arch/arm/mach-msm/Makefile
> @@ -29,5 +29,6 @@ obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o
> devices-msm7x30.o
> obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
> obj-$(CONFIG_ARCH_MSM8X60) += board-dt-8660.o
> obj-$(CONFIG_ARCH_MSM8960) += board-dt-8960.o
> +obj-$(CONFIG_ARCH_MSM8974) += board-dt-8974.o
> obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o
> obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o
> diff --git a/arch/arm/mach-msm/board-dt-8974.c
> b/arch/arm/mach-msm/board-dt-8974.c
> new file mode 100644
> index 000..697623e
> --- /dev/null
> +++ b/arch/arm/mach-msm/board-dt-8974.c
> @@ -0,0 +1,23 @@
> +/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
> + *
> + * This program is free s
Re: [PATCH v4] mmc: sdhci-msm: Add support for MSM chipsets
Hi Georgi,
Several comments bellow.
On Thu, 2013-09-12 at 17:56 +0300, Georgi Djakov wrote:
> This platform driver adds the support of Secure Digital Host Controller
> Interface compliant controller found in Qualcomm MSM chipsets.
>
> CC: Asutosh Das
> CC: Venkat Gopalakrishnan
> CC: Sahitya Tummala
> CC: Subhash Jadavani
> Signed-off-by: Georgi Djakov
> ---
> Changes from v3:
> - Allocate memory for all required structs at once
> - Added termination entry in sdhci_msm_dt_match[]
> - Fixed a missing sdhci_pltfm_free() in probe()
> - Removed redundant of_match_ptr
> - Removed the unneeded function sdhci_msm_vreg_reset()
>
> Changes from v2:
> - Added DT bindings for clocks
> - Moved voltage regulators data to platform data
> - Removed unneeded includes
> - Removed obsolete and wrapper functions
> - Removed error checking where unnecessary
> - Removed redundant _clk suffix from clock names
> - Just return instead of goto where possible
> - Minor fixes
>
> Changes from v1:
> - GPIO references are replaced by pinctrl
> - DT parsing is done mostly by mmc_of_parse()
> - Use of_match_device() for DT matching
> - A few minor changes
>
> .../devicetree/bindings/mmc/sdhci-msm.txt | 71 +++
> drivers/mmc/host/Kconfig | 13 +
> drivers/mmc/host/Makefile |1 +
> drivers/mmc/host/sdhci-msm.c | 660
>
> 4 files changed, 745 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> create mode 100644 drivers/mmc/host/sdhci-msm.c
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> new file mode 100644
> index 000..ee112da
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -0,0 +1,71 @@
> +* Qualcomm SDHCI controller (sdhci-msm)
> +
> +This file documents differences between the core properties in mmc.txt
> +and the properties used by the sdhci-msm driver.
> +
> +Required properties:
> +- compatible: should be "qcom,sdhci-msm"
> +- reg: should contain SDHC, SD Core register map
> +- reg-names: indicates various resources passed to driver (via reg proptery)
> by name
> + "reg-names" examples are "hc_mem" and "core_mem"
> +- interrupts: should contain SDHC interrupts
> +- interrupt-names: indicates interrupts passed to driver (via interrupts
> property) by name
> + "interrupt-names" examples are "hc_irq" and "pwr_irq"
> +- -supply: phandle to the regulator device tree node
> + "supply-name" examples are "vdd" and "vdd-io"
> +- pinctrl-names: Should contain only one value - "default".
> +- pinctrl-0: Should specify pin control groups used for this controller.
> +- clocks: phandles to clock instances of the device tree nodes
> +- clock-names:
> + iface: Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
> + core: SDC MMC clock (MCLK) (required)
> + bus: SDCC bus voter clock (optional)
> +
> +Optional properties:
> +- qcom,bus-speed-mode - specifies supported bus speed modes by host
> + The supported bus speed modes are :
> + "HS200_1p8v" - indicates that host can support HS200 at 1.8v
> + "HS200_1p2v" - indicates that host can support HS200 at 1.2v
> + "DDR_1p8v" - indicates that host can support DDR mode at 1.8v
> + "DDR_1p2v" - indicates that host can support DDR mode at 1.2v
> +
> +In the following, can be vdd (flash core voltage) or vdd-io (I/O
> voltage).
> +- qcom,-always-on - specifies whether supply should be kept "on"
> always.
> +- qcom,-lpm-sup - specifies whether supply can be kept in low power
> mode (lpm).
> +- qcom,-voltage-level - specifies voltage levels for supply. Should
> be
> +specified in pairs (min, max), units uV.
> +- qcom,-current-level - specifies load levels for supply in lpm or
> high power mode
> + (hpm). Should be specified in pairs (lpm, hpm), units uA.
> +
> +Example:
> +
> + aliases {
> + sdhc1 = &sdhc_1;
> + };
> +
> + sdhc_1: qcom,sdhc@f9824900 {
> + compatible = "qcom,sdhci-msm";
> + reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
> + reg-names = "hc_mem", "core_mem";
> + interrupts = <0 123 0>, <0 138 0>;
> + interrupt-names = "hc_irq", "pwr_irq";
> + bus-width = <4>;
> + non-removable;
> +
> + vdd-supply = <&pm8941_l21>;
> + vdd-io-supply = <&pm8941_l13>;
> + qcom,vdd-voltage-level = <295 295>;
> + qcom,vdd-current-level = <9000 80>;
> + qcom,vdd-io-always-on;
> + qcom,vdd-io-lpm-sup;
> + qcom,vdd-io-voltage-level = <180 295>;
> + qcom,vdd-io-current-level = <6 22000>;
> + qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_dat
Re: [PATCH 1/2] i2c: qup: Add device tree bindings information
Hi Mark, On Thu, 2013-09-12 at 17:28 +0100, Mark Rutland wrote: > On Thu, Aug 29, 2013 at 02:27:52PM +0100, Ivan T. Ivanov wrote: > > From: "Ivan T. Ivanov" > > > > The Qualcomm Universal Peripherial (QUP) wraps I2C mini-core and > > provide input and output FIFO's for it. I2C controller can operate > > as master with supported bus speeds of 100Kbps and 400Kbps. > > > > Signed-off-by: Ivan T. Ivanov > > --- > > Documentation/devicetree/bindings/i2c/i2c-qup.txt | 99 > > + > > 1 file changed, 99 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/i2c/i2c-qup.txt > > > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-qup.txt > > b/Documentation/devicetree/bindings/i2c/i2c-qup.txt > > new file mode 100644 > > index 000..c682726 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/i2c/i2c-qup.txt > > @@ -0,0 +1,99 @@ > > +Qualcomm Universal Periferial (QUP) I2C controller > > + > > +Required properties: > > + - compatible : should be "qcom,i2c-qup" > > + - reg : Offset and length of the register region for the device > > + - interrupts : core interrupt > > How about the following: > > - interrupts: interrupt-specifier for the core interrupt. Ok. > > > + > > + - pinctrl-names: Should contain only one value - "default". > > + - pinctrl-0: Should specify pin control group used for this controller. > > + > > + - clocks : phandles to clock instances of the device tree nodes > > Clocks aren't just phandles, they have a clock-specifier component. This > should probably be something like: > > - clocks: a list of phandle + clock-specifier pairs for each entry in >clock-names Right now MSM clocks [1] are just phandles, I should add #clock-cells = <0>. > > > + - clock-names : > > + "core" : Allow access to FIFO buffers and registers > > Huh? That description doesn't seem to descripe the hardware. How about: Allow access to I2C core FIFO buffers and registers. > > > + "iface" : Clock used by QUP interface > > Which interface? The slave interface the CPUs access, or the interface > to the I2C devices? My understanding for this is that QUP is wrapping I2C core. QUP is interface to I2C core. > > Are these the only clock inputs to the device? Yep. > > Is there a regulator input that might need to be specified? > No. Power management is done via clock gating. > > + > > + - #address-cells : should be <1> Address cells for I2C device address > > + - #size-cells : should be <0> I2C addresses have no size component. > > + > > +Optional properties : > > + - Child nodes conforming to i2c bus binding > > + - clock-frequency : Desired I2C bus clock frequency in Hz. If > > + not set thedefault frequency is 100kHz > > Why is this necessary? This is how I2C bus frequency could be specified. It is standard I2C property. Not sure that I get the question. > > > + - qcom,src-freq : Frequency of the source clocking this bus in Hz. > > + Divider value is set based on soruce-frequency and > > + desired I2C bus frequency. If this value is not > > + provided, the source clock is assumed to be running > > + at 19.2 MHz. > > This looks like it should be a clock input. Thanks, I will change it. Regard, Ivan [1] https://lkml.org/lkml/2013/7/24/729 > > Thanks, > Mark. -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
