Re: [PATCH RFC 06/12] mmc: mmci: Add write delay to variant structure.

2014-04-22 Thread Srinivas Kandagatla

Thanks Felipe,

On 21/04/14 23:08, Felipe Balbi wrote:

+   if (var-reg_write_delay  host-mclk)
+   udelay(1 + ((var-reg_write_delay * USEC_PER_SEC)/host-mclk));

looks like this should be quirk flag instead of a write delay... No
strong feelings though, but it looks like the following would be better,
perhaps:

if (host_is_qualcom(host))
udelay(1 + ((3 * USEC_PER_SEC)/host-mclk));
Am ok with your proposal. I was wondering if someone else might need it 
in future.

If not I could change it as you suggested.

Thanks,
srini


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[PATCH v6 00/19] usb: phy: msm: Fixes, cleanups and DT support

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Hi,

This is a sixth version of patches posted earlier here [1].

Changes since v5.

0001 - Enables driver on new ARCH_QCOM arches
0002 - Fixes section mismatch warning
0012 - Fix coding style error - pointer by Sergei
0014 - usleep_range() replaced with udelay(), in msm_phy_reset(),
   this eliminate scheduling while atomic warning - Thanks Tim.
0015 - Fix PTS definitions for MSM USB
0016 - Driver is now working even after cold boot. Earlier versions relied
   on fastboot to select proper PHY port on the dragonboard - Thanks Tim.
0019 - Use correct function to register USB2.0 PHY

[1] https://lkml.org/lkml/2014/3/5/792


Ivan T. Ivanov (17):
  usb: phy: msm: Make driver selectable on ARCH_QCOM
  usb: phy: msm: Remove __init macro from driver probe method
  usb: phy: msm: Move global regulators variables to driver state
  usb: phy: msm: Migrate to Managed Device Resource allocation
  usb: phy: msm: Remove unnecessarily check for valid regulators.
  usb: phy: msm: Fix checkpatch.pl warnings
  usb: phy: msm: Replace custom enum usb_mode_type with enum usb_dr_mode
  usb: phy: msm: Remove unused pclk_src_name
  usb: phy: msm: Remove HSUSB prefix from regulator names
  usb: phy: msm: Properly check result from platform_get_irq()
  usb: phy: msm: Add device tree support and binding information
  usb: phy: msm: Use reset framework for LINK and PHY resets
  usb: phy: msm: Add support for secondary PHY control
  usb: phy: msm: Correct USB PHY Reset sequence for newer platform
  usb: phy: msm: Handle disconnect events
  usb: phy: msm: Vote for corner of VDD CX instead of voltage of VDD CX
  usb: phy: msm: Use usb_add_phy_dev() to register device

Tim Bird (2):
  usb: phy: msm: Fix PTS definitions for MSM USB controller
  usb: phy: msm: Select secondary PHY via TCSR

 .../devicetree/bindings/usb/msm-hsusb.txt  |  78 +++
 arch/arm/mach-msm/board-msm7x30.c  |   2 +-
 arch/arm/mach-msm/board-qsd8x50.c  |   2 +-
 drivers/usb/phy/Kconfig|   6 +-
 drivers/usb/phy/phy-msm-usb.c  | 698 -
 include/linux/usb/msm_hsusb.h  |  39 +-
 include/linux/usb/msm_hsusb_hw.h   |  14 +-
 7 files changed, 502 insertions(+), 337 deletions(-)

--
1.8.3.2

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[PATCH v6 17/19] usb: phy: msm: Handle disconnect events

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Put the transceiver in non-driving mode. Otherwise host
may not detect soft-disconnection.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
Cc: Pavankumar Kondeti pkond...@codeaurora.org
---
 drivers/usb/phy/phy-msm-usb.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 729c06b..a89d966 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -235,6 +235,23 @@ static void ulpi_init(struct msm_otg *motg)
}
 }

+static int msm_phy_notify_disconnect(struct usb_phy *phy,
+  enum usb_device_speed speed)
+{
+   int val;
+
+   /*
+* Put the transceiver in non-driving mode. Otherwise host
+* may not detect soft-disconnection.
+*/
+   val = ulpi_read(phy, ULPI_FUNC_CTRL);
+   val = ~ULPI_FUNC_CTRL_OPMODE_MASK;
+   val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
+   ulpi_write(phy, val, ULPI_FUNC_CTRL);
+
+   return 0;
+}
+
 static int msm_otg_link_clk_reset(struct msm_otg *motg, bool assert)
 {
int ret;
@@ -1623,6 +1640,7 @@ static int msm_otg_probe(struct platform_device *pdev)

phy-init = msm_phy_init;
phy-set_power = msm_otg_set_power;
+   phy-notify_disconnect = msm_phy_notify_disconnect;

phy-io_ops = msm_otg_io_ops;

--
1.8.3.2

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[PATCH v6 19/19] usb: phy: msm: Use usb_add_phy_dev() to register device

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

They could be more than one USB2.0 PHY's on the platform.
This will allow all of them to be registred successfuly.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/phy/phy-msm-usb.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 08c9b2b..1029ae0 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -1660,6 +1660,7 @@ static int msm_otg_probe(struct platform_device *pdev)
phy-init = msm_phy_init;
phy-set_power = msm_otg_set_power;
phy-notify_disconnect = msm_phy_notify_disconnect;
+   phy-type = USB_PHY_TYPE_USB2;

phy-io_ops = msm_otg_io_ops;

@@ -1669,7 +1670,7 @@ static int msm_otg_probe(struct platform_device *pdev)

msm_usb_reset(phy);

-   ret = usb_add_phy(motg-phy, USB_PHY_TYPE_USB2);
+   ret = usb_add_phy_dev(motg-phy);
if (ret) {
dev_err(pdev-dev, usb_add_phy failed\n);
goto disable_ldo;
--
1.8.3.2

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[PATCH v6 13/19] usb: phy: msm: Add support for secondary PHY control

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Allow support to use 2nd HSPHY with USB2 Core.
Some platforms may have configuration to allow USB controller
work with any of the two HSPHYs present. By default driver
configures USB core to use primary HSPHY. Add support to allow
user select 2nd HSPHY using DT parameter.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
Cc: Manu Gautam mgau...@codeaurora.org
---
 .../devicetree/bindings/usb/msm-hsusb.txt  |  6 ++
 drivers/usb/phy/phy-msm-usb.c  | 24 --
 include/linux/usb/msm_hsusb.h  |  1 +
 include/linux/usb/msm_hsusb_hw.h   |  1 +
 4 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt 
b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
index ee4123d..0669667 100644
--- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -59,6 +59,12 @@ Optional properties:
 For example: qcom,phy-init-sequence =  -1 0x63 ;
 Will update only value at address ULPI_EXT_VENDOR_SPECIFIC + 1.

+- qcom,phy-num: Select number of pyco-phy to use, can be one of
+0 - PHY one, default
+1 - Second PHY
+Some platforms may have configuration to allow USB
+controller work with any of the two HSPHYs present.
+
 Example HSUSB OTG controller device node:

 usb@f9a55000 {
diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index d47d940..b03d7f1 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -314,6 +314,9 @@ static int msm_otg_phy_reset(struct msm_otg *motg)
if (!retries)
return -ETIMEDOUT;

+   if (motg-phy_number)
+   writel(readl(USB_PHY_CTRL2) | BIT(16), USB_PHY_CTRL2);
+
dev_info(motg-phy.dev, phy_reset: success\n);
return 0;
 }
@@ -368,6 +371,9 @@ static int msm_otg_reset(struct usb_phy *phy)
ulpi_write(phy, ulpi_val, ULPI_USB_INT_EN_FALL);
}

+   if (motg-phy_number)
+   writel(readl(USB_PHY_CTRL2) | BIT(16), USB_PHY_CTRL2);
+
return 0;
 }

@@ -404,6 +410,7 @@ static int msm_otg_suspend(struct msm_otg *motg)
struct usb_phy *phy = motg-phy;
struct usb_bus *bus = phy-otg-host;
struct msm_otg_platform_data *pdata = motg-pdata;
+   void __iomem *addr;
int cnt = 0;

if (atomic_read(motg-in_lpm))
@@ -463,9 +470,13 @@ static int msm_otg_suspend(struct msm_otg *motg)
 */
writel(readl(USB_USBCMD) | ASYNC_INTR_CTRL | ULPI_STP_CTRL, USB_USBCMD);

+   addr = USB_PHY_CTRL;
+   if (motg-phy_number)
+   addr = USB_PHY_CTRL2;
+
if (motg-pdata-phy_type == SNPS_28NM_INTEGRATED_PHY 
motg-pdata-otg_control == OTG_PMIC_CONTROL)
-   writel(readl(USB_PHY_CTRL) | PHY_RETEN, USB_PHY_CTRL);
+   writel(readl(addr) | PHY_RETEN, addr);

clk_disable_unprepare(motg-pclk);
clk_disable_unprepare(motg-clk);
@@ -495,6 +506,7 @@ static int msm_otg_resume(struct msm_otg *motg)
 {
struct usb_phy *phy = motg-phy;
struct usb_bus *bus = phy-otg-host;
+   void __iomem *addr;
int cnt = 0;
unsigned temp;

@@ -508,9 +520,14 @@ static int msm_otg_resume(struct msm_otg *motg)

if (motg-pdata-phy_type == SNPS_28NM_INTEGRATED_PHY 
motg-pdata-otg_control == OTG_PMIC_CONTROL) {
+
+   addr = USB_PHY_CTRL;
+   if (motg-phy_number)
+   addr = USB_PHY_CTRL2;
+
msm_hsusb_ldo_set_mode(motg, 1);
msm_hsusb_config_vddcx(motg, 1);
-   writel(readl(USB_PHY_CTRL)  ~PHY_RETEN, USB_PHY_CTRL);
+   writel(readl(addr)  ~PHY_RETEN, addr);
}

temp = readl(USB_USBCMD);
@@ -1396,6 +1413,9 @@ static int msm_otg_read_dt(struct platform_device *pdev, 
struct msm_otg *motg)
if (val == OTG_PMIC_CONTROL)
pdata-otg_control = val;

+   if (!of_property_read_u32(node, qcom,phy-num, val)  val  2)
+   motg-phy_number = val;
+
prop = of_find_property(node, qcom,phy-init-sequence, len);
if (!prop || !len)
return 0;
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index 4e5d916..4628f1a 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -158,6 +158,7 @@ struct msm_otg {
atomic_t in_lpm;
int async_int;
unsigned cur_power;
+   int phy_number;
struct delayed_work chg_work;
enum usb_chg_state chg_state;
enum usb_chg_type chg_type;
diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h
index 6e97a2d..e6d7035 100644
--- a/include/linux/usb/msm_hsusb_hw.h
+++ 

[PATCH v6 15/19] usb: phy: msm: Fix PTS definitions for MSM USB controller

2014-04-22 Thread Ivan T. Ivanov
From: Tim Bird tbird...@gmail.com

Fix the value used for Parallel Transceiver Select (PTS) for the MSM USB
controller.  This is a standard chipidea PORTSC definition, where
a PHY_TYPE of 10b (30) is ULPI and 11b (30) is SERIAL.
Fix the definitions and use them correctly in the driver code.

Signed-off-by: Tim Bird tim.b...@sonymobile.com
---
 drivers/usb/phy/phy-msm-usb.c| 8 +---
 include/linux/usb/msm_hsusb_hw.h | 5 +++--
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index dababf9..e83d13a 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -287,8 +287,9 @@ static int msm_link_reset(struct msm_otg *motg)
if (motg-phy_number)
writel(readl(USB_PHY_CTRL2) | BIT(16), USB_PHY_CTRL2);

+   /* put transciever in serial mode as part of reset */
val = readl(USB_PORTSC)  ~PORTSC_PTS_MASK;
-   writel(val | PORTSC_PTS_ULPI, USB_PORTSC);
+   writel(val | PORTSC_PTS_SERIAL, USB_PORTSC);

return 0;
 }
@@ -308,8 +309,9 @@ static int msm_otg_reset(struct usb_phy *phy)
if (cnt = LINK_RESET_TIMEOUT_USEC)
return -ETIMEDOUT;

-   /* select ULPI phy */
-   writel(0x8000, USB_PORTSC);
+   /* select ULPI phy and clear other status/control bits in PORTSC */
+   writel(PORTSC_PTS_ULPI, USB_PORTSC);
+
writel(0x0, USB_AHBBURST);
writel(0x08, USB_AHBMODE);

diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h
index 575c743..98d3dd8 100644
--- a/include/linux/usb/msm_hsusb_hw.h
+++ b/include/linux/usb/msm_hsusb_hw.h
@@ -31,8 +31,9 @@
 #define USB_USBINTR  (MSM_USB_BASE + 0x0148)

 #define PORTSC_PHCD(1  23) /* phy suspend mode */
-#define PORTSC_PTS_MASK (3  30)
-#define PORTSC_PTS_ULPI (3  30)
+#define PORTSC_PTS_MASK(3  30)
+#define PORTSC_PTS_ULPI(2  30)
+#define PORTSC_PTS_SERIAL  (3  30)

 #define USB_ULPI_VIEWPORT(MSM_USB_BASE + 0x0170)
 #define ULPI_RUN  (1  30)
--
1.8.3.2

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[PATCH v6 18/19] usb: phy: msm: Vote for corner of VDD CX instead of voltage of VDD CX

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

New platform uses RBCPR hardware feature, with that voting for
absolute voltage of VDD CX is not required. Hence vote for corner of
VDD CX which uses nominal corner voltage on VDD CX.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
Cc: Mayank Rana mr...@codeaurora.org
---
 .../devicetree/bindings/usb/msm-hsusb.txt  |  5 
 drivers/usb/phy/phy-msm-usb.c  | 35 +-
 include/linux/usb/msm_hsusb.h  |  1 +
 3 files changed, 33 insertions(+), 8 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt 
b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
index 0669667..2826f2a 100644
--- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -65,6 +65,10 @@ Optional properties:
 Some platforms may have configuration to allow USB
 controller work with any of the two HSPHYs present.

+- qcom,vdd-levels: This property must be a list of three integer values
+(no, min, max) where each value represents either a voltage
+in microvolts or a value corresponding to voltage corner.
+
 Example HSUSB OTG controller device node:

 usb@f9a55000 {
@@ -87,4 +91,5 @@ Example HSUSB OTG controller device node:

 qcom,otg-control = 1;
 qcom,phy-init-sequence =  -1 0x63 ;
+qcom,vdd-levels = 1 5 7;
};
diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index a89d966..08c9b2b 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -62,6 +62,13 @@

 #define USB_PHY_VDD_DIG_VOL_MIN100 /* uV */
 #define USB_PHY_VDD_DIG_VOL_MAX132 /* uV */
+#define USB_PHY_SUSP_DIG_VOL   50  /* uV */
+
+enum vdd_levels {
+   VDD_LEVEL_NONE = 0,
+   VDD_LEVEL_MIN,
+   VDD_LEVEL_MAX,
+};

 static int msm_hsusb_init_vddcx(struct msm_otg *motg, int init)
 {
@@ -69,8 +76,8 @@ static int msm_hsusb_init_vddcx(struct msm_otg *motg, int 
init)

if (init) {
ret = regulator_set_voltage(motg-vddcx,
-   USB_PHY_VDD_DIG_VOL_MIN,
-   USB_PHY_VDD_DIG_VOL_MAX);
+   motg-vdd_levels[VDD_LEVEL_MIN],
+   motg-vdd_levels[VDD_LEVEL_MAX]);
if (ret) {
dev_err(motg-phy.dev, Cannot set vddcx voltage\n);
return ret;
@@ -81,7 +88,7 @@ static int msm_hsusb_init_vddcx(struct msm_otg *motg, int 
init)
dev_err(motg-phy.dev, unable to enable hsusb 
vddcx\n);
} else {
ret = regulator_set_voltage(motg-vddcx, 0,
-   USB_PHY_VDD_DIG_VOL_MAX);
+   motg-vdd_levels[VDD_LEVEL_MAX]);
if (ret)
dev_err(motg-phy.dev, Cannot set vddcx voltage\n);
ret = regulator_disable(motg-vddcx);
@@ -435,17 +442,16 @@ static int msm_phy_init(struct usb_phy *phy)

 #ifdef CONFIG_PM

-#define USB_PHY_SUSP_DIG_VOL  50
 static int msm_hsusb_config_vddcx(struct msm_otg *motg, int high)
 {
-   int max_vol = USB_PHY_VDD_DIG_VOL_MAX;
+   int max_vol = motg-vdd_levels[VDD_LEVEL_MAX];
int min_vol;
int ret;

if (high)
-   min_vol = USB_PHY_VDD_DIG_VOL_MIN;
+   min_vol = motg-vdd_levels[VDD_LEVEL_MIN];
else
-   min_vol = USB_PHY_SUSP_DIG_VOL;
+   min_vol = motg-vdd_levels[VDD_LEVEL_NONE];

ret = regulator_set_voltage(motg-vddcx, min_vol, max_vol);
if (ret) {
@@ -1438,7 +1444,7 @@ static int msm_otg_read_dt(struct platform_device *pdev, 
struct msm_otg *motg)
struct device_node *node = pdev-dev.of_node;
struct property *prop;
int len, ret;
-   u32 val;
+   u32 val, tmp[3];

pdata = devm_kzalloc(pdev-dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
@@ -1469,6 +1475,19 @@ static int msm_otg_read_dt(struct platform_device *pdev, 
struct msm_otg *motg)
if (!of_property_read_u32(node, qcom,phy-num, val)  val  2)
motg-phy_number = val;

+   motg-vdd_levels[VDD_LEVEL_NONE] = USB_PHY_SUSP_DIG_VOL;
+   motg-vdd_levels[VDD_LEVEL_MIN] = USB_PHY_VDD_DIG_VOL_MIN;
+   motg-vdd_levels[VDD_LEVEL_MAX] = USB_PHY_VDD_DIG_VOL_MAX;
+
+   if (of_get_property(node, qcom,vdd-levels, len) 
+   len == sizeof(tmp)) {
+   of_property_read_u32_array(node, qcom,vdd-levels,
+  tmp, len / sizeof(*tmp));
+   motg-vdd_levels[VDD_LEVEL_NONE] = tmp[VDD_LEVEL_NONE];
+   motg-vdd_levels[VDD_LEVEL_MIN] = tmp[VDD_LEVEL_MIN];
+   motg-vdd_levels[VDD_LEVEL_MAX] = tmp[VDD_LEVEL_MAX];
+   }
+
prop = of_find_property(node, qcom,phy-init-sequence, len);

[PATCH v6 14/19] usb: phy: msm: Correct USB PHY Reset sequence for newer platform

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

On few legacy platforms, USB PHY is having dedicated reset clk.
It is used to reset USB PHY after putting USB PHY into low power
mode and for calibration of USB PHY. Putting USB PHY into low
power mode is causing ulpi read/write timeout as expected. USB PHY
reset clk is not available on newer platform.

For 28nm PHY, reset USB PHY after resestting USB LINK.
Also reset USB PHY using USB_PHY_PON bit with USB_OTG_HS_PHY_CTRL
register after programming USB PHY Override registers as suggested
with hardware programming guidelines.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
Signed-off-by: Tim Bird tim.b...@sonymobile.com
Cc: Mayank Rana mr...@codeaurora.org
---
 drivers/usb/phy/phy-msm-usb.c| 140 ---
 include/linux/usb/msm_hsusb_hw.h |   5 ++
 2 files changed, 93 insertions(+), 52 deletions(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index b03d7f1..dababf9 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -48,6 +48,7 @@
 #define DRIVER_NAMEmsm_otg

 #define ULPI_IO_TIMEOUT_USEC   (10 * 1000)
+#define LINK_RESET_TIMEOUT_USEC(250 * 1000)

 #define USB_PHY_3P3_VOL_MIN305 /* uV */
 #define USB_PHY_3P3_VOL_MAX330 /* uV */
@@ -267,77 +268,35 @@ static int msm_otg_phy_clk_reset(struct msm_otg *motg)
return ret;
 }

-static int msm_otg_phy_reset(struct msm_otg *motg)
+static int msm_link_reset(struct msm_otg *motg)
 {
u32 val;
int ret;
-   int retries;

ret = msm_otg_link_clk_reset(motg, 1);
if (ret)
return ret;
-   ret = msm_otg_phy_clk_reset(motg);
-   if (ret)
-   return ret;
-   ret = msm_otg_link_clk_reset(motg, 0);
-   if (ret)
-   return ret;

-   val = readl(USB_PORTSC)  ~PORTSC_PTS_MASK;
-   writel(val | PORTSC_PTS_ULPI, USB_PORTSC);
-
-   for (retries = 3; retries  0; retries--) {
-   ret = ulpi_write(motg-phy, ULPI_FUNC_CTRL_SUSPENDM,
-   ULPI_CLR(ULPI_FUNC_CTRL));
-   if (!ret)
-   break;
-   ret = msm_otg_phy_clk_reset(motg);
-   if (ret)
-   return ret;
-   }
-   if (!retries)
-   return -ETIMEDOUT;
+   /* wait for 1ms delay as suggested in HPG. */
+   usleep_range(1000, 1200);

-   /* This reset calibrates the phy, if the above write succeeded */
-   ret = msm_otg_phy_clk_reset(motg);
+   ret = msm_otg_link_clk_reset(motg, 0);
if (ret)
return ret;

-   for (retries = 3; retries  0; retries--) {
-   ret = ulpi_read(motg-phy, ULPI_DEBUG);
-   if (ret != -ETIMEDOUT)
-   break;
-   ret = msm_otg_phy_clk_reset(motg);
-   if (ret)
-   return ret;
-   }
-   if (!retries)
-   return -ETIMEDOUT;
-
if (motg-phy_number)
writel(readl(USB_PHY_CTRL2) | BIT(16), USB_PHY_CTRL2);

-   dev_info(motg-phy.dev, phy_reset: success\n);
+   val = readl(USB_PORTSC)  ~PORTSC_PTS_MASK;
+   writel(val | PORTSC_PTS_ULPI, USB_PORTSC);
+
return 0;
 }

-#define LINK_RESET_TIMEOUT_USEC(250 * 1000)
 static int msm_otg_reset(struct usb_phy *phy)
 {
struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
-   struct msm_otg_platform_data *pdata = motg-pdata;
int cnt = 0;
-   int ret;
-   u32 val = 0;
-   u32 ulpi_val = 0;
-
-   ret = msm_otg_phy_reset(motg);
-   if (ret) {
-   dev_err(phy-dev, phy_reset failed\n);
-   return ret;
-   }
-
-   ulpi_init(motg);

writel(USBCMD_RESET, USB_USBCMD);
while (cnt  LINK_RESET_TIMEOUT_USEC) {
@@ -351,11 +310,86 @@ static int msm_otg_reset(struct usb_phy *phy)

/* select ULPI phy */
writel(0x8000, USB_PORTSC);
+   writel(0x0, USB_AHBBURST);
+   writel(0x08, USB_AHBMODE);
+
+   if (motg-phy_number)
+   writel(readl(USB_PHY_CTRL2) | BIT(16), USB_PHY_CTRL2);
+   return 0;
+}
+
+static void msm_phy_reset(struct msm_otg *motg)
+{
+   void __iomem *addr;
+
+   if (motg-pdata-phy_type != SNPS_28NM_INTEGRATED_PHY) {
+   msm_otg_phy_clk_reset(motg);
+   return;
+   }
+
+   addr = USB_PHY_CTRL;
+   if (motg-phy_number)
+   addr = USB_PHY_CTRL2;
+
+   /* Assert USB PHY_POR */
+   writel(readl(addr) | PHY_POR_ASSERT, addr);
+
+   /*
+* wait for minimum 10 microseconds as suggested in HPG.
+* Use a slightly larger value since the exact value didn't
+* work 100% of the time.
+*/
+   udelay(12);
+
+   /* Deassert USB PHY_POR */
+   writel(readl(addr)  ~PHY_POR_ASSERT, addr);
+}
+
+static int msm_usb_reset(struct usb_phy *phy)
+{
+ 

[PATCH v6 16/19] usb: phy: msm: Select secondary PHY via TCSR

2014-04-22 Thread Ivan T. Ivanov
From: Tim Bird tbird...@gmail.com

Select the secondary PHY using the TCSR register, if phy-num=1
in the DTS (or phy_number is set in the platform data).  The
SOC has 2 PHYs which can be used with the OTG port, and this
code allows configuring the correct one.

Note: This resolves the problem I was seeing where I couldn't
get the USB driver working at all on a dragonboard, from cold
boot.  This patch depends on patch 5/14 from Ivan's msm USB
patch set.  It does not use DT for the register address, as
there's no evidence that this address changes between SoC
versions.

Signed-off-by: Tim Bird tim.b...@sonymobile.com
---
 drivers/usb/phy/phy-msm-usb.c| 14 ++
 include/linux/usb/msm_hsusb_hw.h |  3 +++
 2 files changed, 17 insertions(+)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index e83d13a..729c06b 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -1482,6 +1482,7 @@ static int msm_otg_probe(struct platform_device *pdev)
struct resource *res;
struct msm_otg *motg;
struct usb_phy *phy;
+   void __iomem *phy_select;

motg = devm_kzalloc(pdev-dev, sizeof(struct msm_otg), GFP_KERNEL);
if (!motg) {
@@ -1544,6 +1545,19 @@ static int msm_otg_probe(struct platform_device *pdev)
if (IS_ERR(motg-regs))
return PTR_ERR(motg-regs);

+   /*
+* NOTE: The PHYs can be multiplexed between the chipidea controller
+* and the dwc3 controller, using a single bit. It is important that
+* the dwc3 driver does not set this bit in an incompatible way.
+*/
+   if (motg-phy_number) {
+   phy_select = devm_ioremap_nocache(pdev-dev, USB2_PHY_SEL, 4);
+   if (IS_ERR(phy_select))
+   return PTR_ERR(phy_select);
+   /* Enable second PHY with the OTG port */
+   writel_relaxed(0x1, phy_select);
+   }
+
dev_info(pdev-dev, OTG regs = %p\n, motg-regs);

motg-irq = platform_get_irq(pdev, 0);
diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h
index 98d3dd8..a29f603 100644
--- a/include/linux/usb/msm_hsusb_hw.h
+++ b/include/linux/usb/msm_hsusb_hw.h
@@ -16,6 +16,9 @@
 #ifndef __LINUX_USB_GADGET_MSM72K_UDC_H__
 #define __LINUX_USB_GADGET_MSM72K_UDC_H__

+/* USB phy selector - in TCSR address range */
+#define USB2_PHY_SEL 0xfd4ab000
+
 #define USB_AHBBURST (MSM_USB_BASE + 0x0090)
 #define USB_AHBMODE  (MSM_USB_BASE + 0x0098)
 #define USB_CAPLENGTH(MSM_USB_BASE + 0x0100) /* 8 bit */
--
1.8.3.2

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[PATCH v6 12/19] usb: phy: msm: Use reset framework for LINK and PHY resets

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/phy/phy-msm-usb.c | 29 +
 include/linux/usb/msm_hsusb.h |  3 +++
 2 files changed, 24 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 7619b3f..d47d940 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -32,6 +32,7 @@
 #include linux/pm_runtime.h
 #include linux/of.h
 #include linux/of_device.h
+#include linux/reset.h

 #include linux/usb.h
 #include linux/usb/otg.h
@@ -235,12 +236,15 @@ static void ulpi_init(struct msm_otg *motg)

 static int msm_otg_link_clk_reset(struct msm_otg *motg, bool assert)
 {
-   int ret = 0;
+   int ret;

-   if (!motg-pdata-link_clk_reset)
-   return ret;
+   if (motg-pdata-link_clk_reset)
+   ret = motg-pdata-link_clk_reset(motg-clk, assert);
+   else if (assert)
+   ret = reset_control_assert(motg-link_rst);
+   else
+   ret = reset_control_deassert(motg-link_rst);

-   ret = motg-pdata-link_clk_reset(motg-clk, assert);
if (ret)
dev_err(motg-phy.dev, usb link clk reset %s failed\n,
assert ? assert : deassert);
@@ -250,12 +254,13 @@ static int msm_otg_link_clk_reset(struct msm_otg *motg, 
bool assert)

 static int msm_otg_phy_clk_reset(struct msm_otg *motg)
 {
-   int ret = 0;
+   int ret;

-   if (!motg-pdata-phy_clk_reset)
-   return ret;
+   if (motg-pdata-phy_clk_reset)
+   ret = motg-pdata-phy_clk_reset(motg-phy_reset_clk);
+   else
+   ret = reset_control_reset(motg-phy_rst);

-   ret = motg-pdata-phy_clk_reset(motg-phy_reset_clk);
if (ret)
dev_err(motg-phy.dev, usb phy clk reset failed\n);

@@ -1374,6 +1379,14 @@ static int msm_otg_read_dt(struct platform_device *pdev, 
struct msm_otg *motg)
id = of_match_device(msm_otg_dt_match, pdev-dev);
pdata-phy_type = (int) id-data;

+   motg-link_rst = devm_reset_control_get(pdev-dev, link);
+   if (IS_ERR(motg-link_rst))
+   return PTR_ERR(motg-link_rst);
+
+   motg-phy_rst = devm_reset_control_get(pdev-dev, phy);
+   if (IS_ERR(motg-phy_rst))
+   return PTR_ERR(motg-phy_rst);
+
pdata-mode = of_usb_get_dr_mode(node);
if (pdata-mode == USB_DR_MODE_UNKNOWN)
pdata-mode = USB_DR_MODE_OTG;
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index bd68299..4e5d916 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -165,6 +165,9 @@ struct msm_otg {
struct regulator *v3p3;
struct regulator *v1p8;
struct regulator *vddcx;
+
+   struct reset_control *phy_rst;
+   struct reset_control *link_rst;
 };

 #endif
--
1.8.3.2

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[PATCH v6 02/19] usb: phy: msm: Remove __init macro from driver probe method

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

This fixes following:

WARNING: drivers/usb/phy/built-in.o(.data+0x68): Section mismatch in reference 
from the variable msm_otg_driver to the function .init.text:msm_otg_probe()
The variable msm_otg_driver references
the function __init msm_otg_probe()

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/phy/phy-msm-usb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 5b37b81..6ae4d2f 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -1406,7 +1406,7 @@ static void msm_otg_debugfs_cleanup(void)
debugfs_remove(msm_otg_dbg_root);
 }

-static int __init msm_otg_probe(struct platform_device *pdev)
+static int msm_otg_probe(struct platform_device *pdev)
 {
int ret = 0;
struct resource *res;
--
1.8.3.2

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[PATCH v6 11/19] usb: phy: msm: Add device tree support and binding information

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Allows MSM OTG controller to be specified via device tree.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 .../devicetree/bindings/usb/msm-hsusb.txt  |  67 +
 drivers/usb/phy/phy-msm-usb.c  | 108 +
 include/linux/usb/msm_hsusb.h  |   6 +-
 3 files changed, 159 insertions(+), 22 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt 
b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
index 5ea26c6..ee4123d 100644
--- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -15,3 +15,70 @@ Example EHCI controller device node:
usb-phy = usb_otg;
};

+USB PHY with optional OTG:
+
+Required properties:
+- compatible:   Should contain:
+  qcom,usb-otg-ci for chipsets with ChipIdea 45nm PHY
+  qcom,usb-otg-snps for chipsets with Synopsys 28nm PHY
+
+- regs: Offset and length of the register set in the memory map
+- interrupts:   interrupt-specifier for the OTG interrupt.
+
+- clocks:   A list of phandle + clock-specifier pairs for the
+clocks listed in clock-names
+- clock-names:  Should contain the following:
+  phy USB PHY reference clock
+  coreProtocol engine clock
+  iface   Interface bus clock
+  alt_coreProtocol engine clock for targets with asynchronous
+reset methodology. (optional)
+
+- vdccx-supply: phandle to the regulator for the vdd supply for
+digital circuit operation.
+- v1p8-supply:  phandle to the regulator for the 1.8V supply
+- v3p3-supply:  phandle to the regulator for the 3.3V supply
+
+- resets:   A list of phandle + reset-specifier pairs for the
+resets listed in reset-names
+- reset-names:  Should contain the following:
+  phy USB PHY controller reset
+  linkUSB LINK controller reset
+
+- qcom,otg-control: OTG control (VBUS and ID notifications) can be one of
+1 - PHY control
+2 - PMIC control
+
+Optional properties:
+- dr_mode:  One of host, peripheral or otg. Defaults to otg
+
+- qcom,phy-init-sequence: PHY configuration sequence values. This is related 
to Device
+Mode Eye Diagram test. Start address at which these values 
will be
+written is ULPI_EXT_VENDOR_SPECIFIC. Value of -1 is reserved as
+do not overwrite default value at this address.
+For example: qcom,phy-init-sequence =  -1 0x63 ;
+Will update only value at address ULPI_EXT_VENDOR_SPECIFIC + 1.
+
+Example HSUSB OTG controller device node:
+
+usb@f9a55000 {
+compatible = qcom,usb-otg-snps;
+reg = 0xf9a55000 0x400;
+interrupts = 0 134 0;
+dr_mode = peripheral;
+
+clocks = gcc GCC_XO_CLK, gcc GCC_USB_HS_SYSTEM_CLK,
+gcc GCC_USB_HS_AHB_CLK;
+
+clock-names = phy, core, iface;
+
+vddcx-supply = pm8841_s2_corner;
+v1p8-supply = pm8941_l6;
+v3p3-supply = pm8941_l24;
+
+resets = gcc GCC_USB2A_PHY_BCR, gcc GCC_USB_HS_BCR;
+reset-names = phy, link;
+
+qcom,otg-control = 1;
+qcom,phy-init-sequence = -1 0x63;
+   };
diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 2dc7948..7619b3f 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -30,9 +30,12 @@
 #include linux/debugfs.h
 #include linux/seq_file.h
 #include linux/pm_runtime.h
+#include linux/of.h
+#include linux/of_device.h

 #include linux/usb.h
 #include linux/usb/otg.h
+#include linux/usb/of.h
 #include linux/usb/ulpi.h
 #include linux/usb/gadget.h
 #include linux/usb/hcd.h
@@ -217,16 +220,16 @@ static struct usb_phy_io_ops msm_otg_io_ops = {
 static void ulpi_init(struct msm_otg *motg)
 {
struct msm_otg_platform_data *pdata = motg-pdata;
-   int *seq = pdata-phy_init_seq;
+   int *seq = pdata-phy_init_seq, idx;
+   u32 addr = ULPI_EXT_VENDOR_SPECIFIC;

-   if (!seq)
-   return;
+   for (idx = 0; idx  pdata-phy_init_sz; idx++) {
+   if (seq[idx] == -1)
+   continue;

-   while (seq[0] = 0) {
dev_vdbg(motg-phy.dev, ulpi: write 0x%02x to 0x%02x\n,
-   seq[0], seq[1]);
-   ulpi_write(motg-phy, seq[0], seq[1]);
-   seq += 2;
+   seq[idx], addr + idx);
+   ulpi_write(motg-phy, seq[idx], addr + idx);
}
 }

@@ -1343,25 +1346,87 @@ static void msm_otg_debugfs_cleanup(void)
debugfs_remove(msm_otg_dbg_root);
 }

+static struct of_device_id msm_otg_dt_match[] = {
+   {
+   .compatible = qcom,usb-otg-ci,
+   .data = (void *) CI_45NM_INTEGRATED_PHY
+   }, {
+   .compatible = qcom,usb-otg-snps,
+  

[PATCH v6 06/19] usb: phy: msm: Fix checkpatch.pl warnings

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

This fixes following:

WARNING: quoted string split across lines
WARNING: Prefer seq_puts to seq_printf

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/phy/phy-msm-usb.c | 39 ++-
 1 file changed, 14 insertions(+), 25 deletions(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 4045301..1629247 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -67,8 +67,7 @@ static int msm_hsusb_init_vddcx(struct msm_otg *motg, int 
init)
USB_PHY_VDD_DIG_VOL_MIN,
USB_PHY_VDD_DIG_VOL_MAX);
if (ret) {
-   dev_err(motg-phy.dev, unable to set the voltage 
-   for hsusb vddcx\n);
+   dev_err(motg-phy.dev, Cannot set vddcx voltage\n);
return ret;
}

@@ -79,8 +78,7 @@ static int msm_hsusb_init_vddcx(struct msm_otg *motg, int 
init)
ret = regulator_set_voltage(motg-vddcx, 0,
USB_PHY_VDD_DIG_VOL_MAX);
if (ret)
-   dev_err(motg-phy.dev, unable to set the voltage 
-   for hsusb vddcx\n);
+   dev_err(motg-phy.dev, Cannot set vddcx voltage\n);
ret = regulator_disable(motg-vddcx);
if (ret)
dev_err(motg-phy.dev, unable to disable hsusb 
vddcx\n);
@@ -97,8 +95,7 @@ static int msm_hsusb_ldo_init(struct msm_otg *motg, int init)
rc = regulator_set_voltage(motg-v3p3, USB_PHY_3P3_VOL_MIN,
USB_PHY_3P3_VOL_MAX);
if (rc) {
-   dev_err(motg-phy.dev, unable to set voltage level 
-   for hsusb 3p3\n);
+   dev_err(motg-phy.dev, Cannot set v3p3 voltage\n);
goto exit;
}
rc = regulator_enable(motg-v3p3);
@@ -109,8 +106,7 @@ static int msm_hsusb_ldo_init(struct msm_otg *motg, int 
init)
rc = regulator_set_voltage(motg-v1p8, USB_PHY_1P8_VOL_MIN,
USB_PHY_1P8_VOL_MAX);
if (rc) {
-   dev_err(motg-phy.dev, unable to set voltage level 
-   for hsusb 1p8\n);
+   dev_err(motg-phy.dev, Cannot set v1p8 voltage\n);
goto disable_3p3;
}
rc = regulator_enable(motg-v1p8);
@@ -137,15 +133,13 @@ static int msm_hsusb_ldo_set_mode(struct msm_otg *motg, 
int on)
ret = regulator_set_optimum_mode(motg-v1p8,
USB_PHY_1P8_HPM_LOAD);
if (ret  0) {
-   pr_err(%s: Unable to set HPM of the regulator 
-   HSUSB_1p8\n, __func__);
+   pr_err(Could not set HPM for v1p8\n);
return ret;
}
ret = regulator_set_optimum_mode(motg-v3p3,
USB_PHY_3P3_HPM_LOAD);
if (ret  0) {
-   pr_err(%s: Unable to set HPM of the regulator 
-   HSUSB_3p3\n, __func__);
+   pr_err(Could not set HPM for v3p3\n);
regulator_set_optimum_mode(motg-v1p8,
USB_PHY_1P8_LPM_LOAD);
return ret;
@@ -154,13 +148,11 @@ static int msm_hsusb_ldo_set_mode(struct msm_otg *motg, 
int on)
ret = regulator_set_optimum_mode(motg-v1p8,
USB_PHY_1P8_LPM_LOAD);
if (ret  0)
-   pr_err(%s: Unable to set LPM of the regulator 
-   HSUSB_1p8\n, __func__);
+   pr_err(Could not set LPM for v1p8\n);
ret = regulator_set_optimum_mode(motg-v3p3,
USB_PHY_3P3_LPM_LOAD);
if (ret  0)
-   pr_err(%s: Unable to set LPM of the regulator 
-   HSUSB_3p3\n, __func__);
+   pr_err(Could not set LPM for v3p3\n);
}

pr_debug(reg (%s)\n, on ? HPM : LPM);
@@ -390,8 +382,7 @@ static int msm_hsusb_config_vddcx(struct msm_otg *motg, int 
high)

ret = regulator_set_voltage(motg-vddcx, min_vol, max_vol);
if (ret) {
-   pr_err(%s: unable to set the voltage for regulator 
-   HSUSB_VDDCX\n, __func__);
+   dev_err(motg-phy.dev, Cannot set vddcx voltage\n);
return ret;
}

@@ -546,8 +537,7 @@ static int msm_otg_resume(struct msm_otg *motg)
 * PHY. USB state can not be restored. Re-insertion
 * 

[PATCH v6 09/19] usb: phy: msm: Remove HSUSB prefix from regulator names

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Prefix did not bring any useful information. Currently none
of the MSM platforms define these regulators, so it is safe
to rename them.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/phy/phy-msm-usb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 9b0f683..6b44826 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -1417,19 +1417,19 @@ static int msm_otg_probe(struct platform_device *pdev)
return motg-irq;
}

-   motg-vddcx = devm_regulator_get(motg-phy.dev, HSUSB_VDDCX);
+   motg-vddcx = devm_regulator_get(motg-phy.dev, vddcx);
if (IS_ERR(motg-vddcx)) {
dev_err(motg-phy.dev, unable to get hsusb vddcx\n);
return PTR_ERR(motg-vddcx);
}

-   motg-v3p3 = devm_regulator_get(motg-phy.dev, HSUSB_3p3);
+   motg-v3p3 = devm_regulator_get(motg-phy.dev, v3p3);
if (IS_ERR(motg-v3p3)) {
dev_err(motg-phy.dev, unable to get hsusb 3p3\n);
return PTR_ERR(motg-v3p3);
}

-   motg-v1p8 = devm_regulator_get(motg-phy.dev, HSUSB_1p8);
+   motg-v1p8 = devm_regulator_get(motg-phy.dev, v1p8);
if (IS_ERR(motg-v1p8)) {
dev_err(motg-phy.dev, unable to get hsusb 1p8\n);
return PTR_ERR(motg-v1p8);
--
1.8.3.2

--
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[PATCH v6 05/19] usb: phy: msm: Remove unnecessarily check for valid regulators.

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Whether regulators are available or not is checked at driver
probe. If they are not available driver will refuse to load,
so no need to check them again.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/phy/phy-msm-usb.c | 10 --
 1 file changed, 10 deletions(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 67cac96..4045301 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -133,16 +133,6 @@ static int msm_hsusb_ldo_set_mode(struct msm_otg *motg, 
int on)
 {
int ret = 0;

-   if (!motg-v1p8 || IS_ERR(motg-v1p8)) {
-   pr_err(%s: HSUSB_1p8 is not initialized\n, __func__);
-   return -ENODEV;
-   }
-
-   if (!motg-v3p3 || IS_ERR(motg-v3p3)) {
-   pr_err(%s: HSUSB_3p3 is not initialized\n, __func__);
-   return -ENODEV;
-   }
-
if (on) {
ret = regulator_set_optimum_mode(motg-v1p8,
USB_PHY_1P8_HPM_LOAD);
--
1.8.3.2

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[PATCH v6 04/19] usb: phy: msm: Migrate to Managed Device Resource allocation

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Move memory, regulators, clocks and irq allocation to
devm_* variants. Properly check for valid clk handles.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/phy/phy-msm-usb.c | 195 --
 1 file changed, 75 insertions(+), 120 deletions(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 6bae936..67cac96 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -63,27 +63,18 @@ static int msm_hsusb_init_vddcx(struct msm_otg *motg, int 
init)
int ret = 0;

if (init) {
-   motg-vddcx = regulator_get(motg-phy.dev, HSUSB_VDDCX);
-   if (IS_ERR(motg-vddcx)) {
-   dev_err(motg-phy.dev, unable to get hsusb vddcx\n);
-   return PTR_ERR(motg-vddcx);
-   }
-
ret = regulator_set_voltage(motg-vddcx,
USB_PHY_VDD_DIG_VOL_MIN,
USB_PHY_VDD_DIG_VOL_MAX);
if (ret) {
dev_err(motg-phy.dev, unable to set the voltage 
for hsusb vddcx\n);
-   regulator_put(motg-vddcx);
return ret;
}

ret = regulator_enable(motg-vddcx);
-   if (ret) {
+   if (ret)
dev_err(motg-phy.dev, unable to enable hsusb 
vddcx\n);
-   regulator_put(motg-vddcx);
-   }
} else {
ret = regulator_set_voltage(motg-vddcx, 0,
USB_PHY_VDD_DIG_VOL_MAX);
@@ -93,8 +84,6 @@ static int msm_hsusb_init_vddcx(struct msm_otg *motg, int 
init)
ret = regulator_disable(motg-vddcx);
if (ret)
dev_err(motg-phy.dev, unable to disable hsusb 
vddcx\n);
-
-   regulator_put(motg-vddcx);
}

return ret;
@@ -105,53 +94,38 @@ static int msm_hsusb_ldo_init(struct msm_otg *motg, int 
init)
int rc = 0;

if (init) {
-   motg-v3p3 = regulator_get(motg-phy.dev, HSUSB_3p3);
-   if (IS_ERR(motg-v3p3)) {
-   dev_err(motg-phy.dev, unable to get hsusb 3p3\n);
-   return PTR_ERR(motg-v3p3);
-   }
-
rc = regulator_set_voltage(motg-v3p3, USB_PHY_3P3_VOL_MIN,
USB_PHY_3P3_VOL_MAX);
if (rc) {
dev_err(motg-phy.dev, unable to set voltage level 
for hsusb 3p3\n);
-   goto put_3p3;
+   goto exit;
}
rc = regulator_enable(motg-v3p3);
if (rc) {
dev_err(motg-phy.dev, unable to enable the hsusb 
3p3\n);
-   goto put_3p3;
-   }
-   motg-v1p8 = regulator_get(motg-phy.dev, HSUSB_1p8);
-   if (IS_ERR(motg-v1p8)) {
-   dev_err(motg-phy.dev, unable to get hsusb 1p8\n);
-   rc = PTR_ERR(motg-v1p8);
-   goto disable_3p3;
+   goto exit;
}
rc = regulator_set_voltage(motg-v1p8, USB_PHY_1P8_VOL_MIN,
USB_PHY_1P8_VOL_MAX);
if (rc) {
dev_err(motg-phy.dev, unable to set voltage level 
for hsusb 1p8\n);
-   goto put_1p8;
+   goto disable_3p3;
}
rc = regulator_enable(motg-v1p8);
if (rc) {
dev_err(motg-phy.dev, unable to enable the hsusb 
1p8\n);
-   goto put_1p8;
+   goto disable_3p3;
}

return 0;
}

regulator_disable(motg-v1p8);
-put_1p8:
-   regulator_put(motg-v1p8);
 disable_3p3:
regulator_disable(motg-v3p3);
-put_3p3:
-   regulator_put(motg-v3p3);
+exit:
return rc;
 }

@@ -506,7 +480,7 @@ static int msm_otg_suspend(struct msm_otg *motg)

clk_disable_unprepare(motg-pclk);
clk_disable_unprepare(motg-clk);
-   if (motg-core_clk)
+   if (!IS_ERR(motg-core_clk))
clk_disable_unprepare(motg-core_clk);

if (!IS_ERR(motg-pclk_src))
@@ -546,7 +520,7 @@ static int msm_otg_resume(struct msm_otg *motg)

clk_prepare_enable(motg-pclk);
clk_prepare_enable(motg-clk);
-   if (motg-core_clk)
+   if (!IS_ERR(motg-core_clk))
clk_prepare_enable(motg-core_clk);

if (motg-pdata-phy_type == SNPS_28NM_INTEGRATED_PHY 
@@ -1415,37 +1389,34 @@ static int msm_otg_probe(struct platform_device *pdev)
return -ENODEV;
}

-   motg = 

[PATCH v6 08/19] usb: phy: msm: Remove unused pclk_src_name

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

There are no references to 'pclk_src_name' in plaform code,
so it is unused.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/phy/phy-msm-usb.c | 26 +-
 include/linux/usb/msm_hsusb.h |  5 -
 2 files changed, 1 insertion(+), 30 deletions(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index b87f33a..9b0f683 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -464,9 +464,6 @@ static int msm_otg_suspend(struct msm_otg *motg)
if (!IS_ERR(motg-core_clk))
clk_disable_unprepare(motg-core_clk);

-   if (!IS_ERR(motg-pclk_src))
-   clk_disable_unprepare(motg-pclk_src);
-
if (motg-pdata-phy_type == SNPS_28NM_INTEGRATED_PHY 
motg-pdata-otg_control == OTG_PMIC_CONTROL) {
msm_hsusb_ldo_set_mode(motg, 0);
@@ -496,9 +493,6 @@ static int msm_otg_resume(struct msm_otg *motg)
if (!atomic_read(motg-in_lpm))
return 0;

-   if (!IS_ERR(motg-pclk_src))
-   clk_prepare_enable(motg-pclk_src);
-
clk_prepare_enable(motg-pclk);
clk_prepare_enable(motg-clk);
if (!IS_ERR(motg-core_clk))
@@ -1395,17 +1389,8 @@ static int msm_otg_probe(struct platform_device *pdev)
 * If USB Core is running its protocol engine based on CORE CLK,
 * CORE CLK  must be running at 55Mhz for correct HSUSB
 * operation and USB core cannot tolerate frequency changes on
-* CORE CLK. For such USB cores, vote for maximum clk frequency
-* on pclk source
+* CORE CLK.
 */
-motg-pclk_src = ERR_PTR(-ENOENT);
-if (motg-pdata-pclk_src_name) {
-   motg-pclk_src = devm_clk_get(pdev-dev,
-   motg-pdata-pclk_src_name);
-   if (IS_ERR(motg-pclk_src))
-   return PTR_ERR(motg-pclk_src);
-   }
-
motg-pclk = devm_clk_get(pdev-dev, usb_hs_pclk);
if (IS_ERR(motg-pclk)) {
dev_err(pdev-dev, failed to get usb_hs_pclk\n);
@@ -1451,10 +1436,6 @@ static int msm_otg_probe(struct platform_device *pdev)
}

clk_set_rate(motg-clk, 6000);
-   if (!IS_ERR(motg-pclk_src)) {
-   clk_set_rate(motg-pclk_src, INT_MAX);
-   clk_prepare_enable(motg-pclk_src);
-   }

clk_prepare_enable(motg-clk);
clk_prepare_enable(motg-pclk);
@@ -1530,8 +1511,6 @@ disable_clks:
clk_disable_unprepare(motg-clk);
if (!IS_ERR(motg-core_clk))
clk_disable_unprepare(motg-core_clk);
-   if (!IS_ERR(motg-pclk_src))
-   clk_disable_unprepare(motg-pclk_src);
return ret;
 }

@@ -1576,9 +1555,6 @@ static int msm_otg_remove(struct platform_device *pdev)
clk_disable_unprepare(motg-clk);
if (!IS_ERR(motg-core_clk))
clk_disable_unprepare(motg-core_clk);
-   if (!IS_ERR(motg-pclk_src))
-   clk_disable_unprepare(motg-pclk_src);
-
msm_hsusb_ldo_init(motg, 0);

pm_runtime_set_suspended(pdev-dev);
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index 72c5830..262ed80 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -106,8 +106,6 @@ enum usb_chg_type {
  * @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
  * @mode: Supported mode (OTG/peripheral/host).
  * @otg_control: OTG switch controlled by user/Id pin
- * @pclk_src_name: pclk is derived from ebi1_usb_clk in case of 7x27 and 8k
- *  dfab_usb_hs_clk in case of 8660 and 8960.
  */
 struct msm_otg_platform_data {
int *phy_init_seq;
@@ -117,7 +115,6 @@ struct msm_otg_platform_data {
enum otg_control_type otg_control;
enum msm_usb_phy_type phy_type;
void (*setup_gpio)(enum usb_otg_state state);
-   char *pclk_src_name;
int (*link_clk_reset)(struct clk *link_clk, bool assert);
int (*phy_clk_reset)(struct clk *phy_clk);
 };
@@ -129,7 +126,6 @@ struct msm_otg_platform_data {
  * @irq: IRQ number assigned for HSUSB controller.
  * @clk: clock struct of usb_hs_clk.
  * @pclk: clock struct of usb_hs_pclk.
- * @pclk_src: pclk source for voting.
  * @phy_reset_clk: clock struct of usb_phy_clk.
  * @core_clk: clock struct of usb_hs_core_clk.
  * @regs: ioremapped register base address.
@@ -150,7 +146,6 @@ struct msm_otg {
int irq;
struct clk *clk;
struct clk *pclk;
-   struct clk *pclk_src;
struct clk *phy_reset_clk;
struct clk *core_clk;
void __iomem *regs;
--
1.8.3.2

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[PATCH v6 07/19] usb: phy: msm: Replace custom enum usb_mode_type with enum usb_dr_mode

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Use enum usb_dr_mode and drop default usb_dr_mode from platform data.

USB DT bindings states: dr_mode: ...In case this attribute isn't
passed via DT, USB DRD controllers should default to OTG...,
so remove redundand field.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
Acked-by: David Brown dav...@codeaurora.org
---
 arch/arm/mach-msm/board-msm7x30.c |  2 +-
 arch/arm/mach-msm/board-qsd8x50.c |  2 +-
 drivers/usb/phy/phy-msm-usb.c | 41 ---
 include/linux/usb/msm_hsusb.h | 20 +--
 4 files changed, 20 insertions(+), 45 deletions(-)

diff --git a/arch/arm/mach-msm/board-msm7x30.c 
b/arch/arm/mach-msm/board-msm7x30.c
index 46de789..0c4c200 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -95,7 +95,7 @@ static int hsusb_phy_clk_reset(struct clk *phy_clk)

 static struct msm_otg_platform_data msm_otg_pdata = {
.phy_init_seq   = hsusb_phy_init_seq,
-   .mode   = USB_PERIPHERAL,
+   .mode   = USB_DR_MODE_PERIPHERAL,
.otg_control= OTG_PHY_CONTROL,
.link_clk_reset = hsusb_link_clk_reset,
.phy_clk_reset  = hsusb_phy_clk_reset,
diff --git a/arch/arm/mach-msm/board-qsd8x50.c 
b/arch/arm/mach-msm/board-qsd8x50.c
index 9169ec3..4c74861 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -116,7 +116,7 @@ static int hsusb_phy_clk_reset(struct clk *phy_clk)

 static struct msm_otg_platform_data msm_otg_pdata = {
.phy_init_seq   = hsusb_phy_init_seq,
-   .mode   = USB_PERIPHERAL,
+   .mode   = USB_DR_MODE_PERIPHERAL,
.otg_control= OTG_PHY_CONTROL,
.link_clk_reset = hsusb_link_clk_reset,
.phy_clk_reset  = hsusb_phy_clk_reset,
diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 1629247..b87f33a 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -348,10 +348,10 @@ static int msm_otg_reset(struct usb_phy *phy)

if (pdata-otg_control == OTG_PHY_CONTROL) {
val = readl(USB_OTGSC);
-   if (pdata-mode == USB_OTG) {
+   if (pdata-mode == USB_DR_MODE_OTG) {
ulpi_val = ULPI_INT_IDGRD | ULPI_INT_SESS_VALID;
val |= OTGSC_IDIE | OTGSC_BSVIE;
-   } else if (pdata-mode == USB_PERIPHERAL) {
+   } else if (pdata-mode == USB_DR_MODE_PERIPHERAL) {
ulpi_val = ULPI_INT_SESS_VALID;
val |= OTGSC_BSVIE;
}
@@ -637,7 +637,7 @@ static int msm_otg_set_host(struct usb_otg *otg, struct 
usb_bus *host)
 * Fail host registration if this board can support
 * only peripheral configuration.
 */
-   if (motg-pdata-mode == USB_PERIPHERAL) {
+   if (motg-pdata-mode == USB_DR_MODE_PERIPHERAL) {
dev_info(otg-phy-dev, Host mode is not supported\n);
return -ENODEV;
}
@@ -666,7 +666,7 @@ static int msm_otg_set_host(struct usb_otg *otg, struct 
usb_bus *host)
 * Kick the state machine work, if peripheral is not supported
 * or peripheral is already registered with us.
 */
-   if (motg-pdata-mode == USB_HOST || otg-gadget) {
+   if (motg-pdata-mode == USB_DR_MODE_HOST || otg-gadget) {
pm_runtime_get_sync(otg-phy-dev);
schedule_work(motg-sm_work);
}
@@ -710,7 +710,7 @@ static int msm_otg_set_peripheral(struct usb_otg *otg,
 * Fail peripheral registration if this board can support
 * only host configuration.
 */
-   if (motg-pdata-mode == USB_HOST) {
+   if (motg-pdata-mode == USB_DR_MODE_HOST) {
dev_info(otg-phy-dev, Peripheral mode is not supported\n);
return -ENODEV;
}
@@ -735,7 +735,7 @@ static int msm_otg_set_peripheral(struct usb_otg *otg,
 * Kick the state machine work, if host is not supported
 * or host is already registered with us.
 */
-   if (motg-pdata-mode == USB_PERIPHERAL || otg-host) {
+   if (motg-pdata-mode == USB_DR_MODE_PERIPHERAL || otg-host) {
pm_runtime_get_sync(otg-phy-dev);
schedule_work(motg-sm_work);
}
@@ -1056,7 +1056,7 @@ static void msm_otg_init_sm(struct msm_otg *motg)
u32 otgsc = readl(USB_OTGSC);

switch (pdata-mode) {
-   case USB_OTG:
+   case USB_DR_MODE_OTG:
if (pdata-otg_control == OTG_PHY_CONTROL) {
if (otgsc  OTGSC_ID)
set_bit(ID, motg-inputs);
@@ -1068,21 +1068,14 @@ static void msm_otg_init_sm(struct msm_otg *motg)
else
clear_bit(B_SESS_VLD, motg-inputs);

[PATCH v6 10/19] usb: phy: msm: Properly check result from platform_get_irq()

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Function return negative code on error.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/phy/phy-msm-usb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 6b44826..2dc7948 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -1412,7 +1412,7 @@ static int msm_otg_probe(struct platform_device *pdev)
dev_info(pdev-dev, OTG regs = %p\n, motg-regs);

motg-irq = platform_get_irq(pdev, 0);
-   if (!motg-irq) {
+   if (motg-irq  0) {
dev_err(pdev-dev, platform_get_irq failed\n);
return motg-irq;
}
--
1.8.3.2

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[PATCH v3 0/3] usb: chipidea: msm: Clean and fix glue layer driver

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

This series intend to fix driver, which was broken for a while.
It is used to create peripheral role device, which in coordination
with phy-usb-msm driver could provide USB2.0 gadget support for
Qualcomm targets.

Changes since version 2.

 - Rename devicetree description file to ci-hdrc-qcom.txt to be in-line
   with Freescale and Zevio naming scheme
 - Use better name for usb-phy phandle.
 - Make of_device_id structure const

[1] https://lkml.org/lkml/2014/2/18/209

Ivan T. Ivanov (3):
  usb: chipidea: msm: Add device tree binding information
  usb: chipidea: msm: Add device tree support
  usb: chipidea: msm: Initialize offset of the capability registers

 .../devicetree/bindings/usb/ci-hdrc-qcom.txt   | 17 +++
 drivers/usb/chipidea/ci_hdrc_msm.c | 24 +-
 2 files changed, 40 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt

--
1.8.3.2

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[PATCH v3 1/3] usb: chipidea: msm: Add device tree binding information

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Document device tree binding information as required by
the Qualcomm USB controller.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt | 17 +
 1 file changed, 17 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt

diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt 
b/Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt
new file mode 100644
index 000..7221072
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-qcom.txt
@@ -0,0 +1,17 @@
+Qualcomm CI13xxx (Chipidea) USB controllers
+
+Required properties:
+- compatible:   should contain qcom,ci-hdrc
+- reg:  offset and length of the register set in the memory map
+- interrupts:   interrupt-specifier for the controller interrupt.
+- usb-phy:  phandle for the PHY device
+- dr_mode:  Sould be peripheral
+
+Examples:
+   gadget@f9a55000 {
+   compatible = qcom,ci-hdrc;
+   reg = 0xf9a55000 0x400;
+   dr_mode = peripheral;
+   interrupts = 0 134 0;
+   usb-phy = usbphy0;
+   };
--
1.8.3.2

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[PATCH v3 2/3] usb: chipidea: msm: Add device tree support

2014-04-22 Thread Ivan T. Ivanov
From: Ivan T. Ivanov iiva...@mm-sol.com

Allows controller to be specified via device tree.
Pass PHY phandle specified in DT to core driver.

Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 23 ++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 2d51d85..736aeb2 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -57,9 +57,21 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
 static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
struct platform_device *plat_ci;
+   struct usb_phy *phy;

dev_dbg(pdev-dev, ci_hdrc_msm_probe\n);

+   /*
+* OTG(PHY) driver takes care of PHY initialization, clock management,
+* powering up VBUS, mapping of registers address space and power
+* management.
+*/
+   phy = devm_usb_get_phy_by_phandle(pdev-dev, usb-phy, 0);
+   if (IS_ERR(phy))
+   return PTR_ERR(phy);
+
+   ci_hdrc_msm_platdata.phy = phy;
+
plat_ci = ci_hdrc_add_device(pdev-dev,
pdev-resource, pdev-num_resources,
ci_hdrc_msm_platdata);
@@ -86,10 +98,19 @@ static int ci_hdrc_msm_remove(struct platform_device *pdev)
return 0;
 }

+static const struct of_device_id msm_ci_dt_match[] = {
+   { .compatible = qcom,ci-hdrc, },
+   { }
+};
+MODULE_DEVICE_TABLE(of, msm_ci_dt_match);
+
 static struct platform_driver ci_hdrc_msm_driver = {
.probe = ci_hdrc_msm_probe,
.remove = ci_hdrc_msm_remove,
-   .driver = { .name = msm_hsusb, },
+   .driver = {
+   .name = msm_hsusb,
+   .of_match_table = msm_ci_dt_match,
+   },
 };

 module_platform_driver(ci_hdrc_msm_driver);
--
1.8.3.2

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Re: Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Daniel Thompson
On 17/04/14 21:35, Jason Gunthorpe wrote:
 The above is useful for loading the raw uncompressed Image without 
 carrying the full ELF baggage.

 What exactly is the full ELF baggage? Aren't there existing mechanisms to 
 omit
 debugging symbols, for example, if size is of concern?
 
 FWIW, it is a small non-intrusive change to produce ELFs with the
 proper LMA, if it is useful for specialized tooling, here is the 3.14
 version of the patch I created (I see it needs a bit of cleanup..)
 You must also force PATCH_PHYS_VIRT off.
 
 The ELF also has the correct entry point address, so ELF tooling can
 just jump into it, after setting the proper register values according
 to the boot protocol.

That might be a useful approach for single platform kernels but I don't
think such an approach can work for multi-arch kernels since, because
the RAM can be located anywhere in the address map, the physical load
address is platform dependant.


Daniel.

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Re: Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Daniel Thompson
On 22/04/14 11:40, Russell King - ARM Linux wrote:
 On Tue, Apr 22, 2014 at 11:26:53AM +0100, Daniel Thompson wrote:
 On 18/04/14 05:34, Nicolas Pitre wrote:
 I'm not suggesting to break anything or changing existing platforms,
 but how do we improve the Image format in a compatible way. If
 bootloaders want to support booting Image files or vmlinux directly,
 then we should support that including any compatible changes to make
 things work better.
 And why would bootloaders want that?  Just to create confusion with 
 the established boot protocol?

 I'd say that they don't. My original concern was how the different
 architectures negotiate if more than one arch wants a special text
 offset, not how to write a correct bootloader.

 The existing uImage files already provide sufficient information to load
 the kernel regardless of the TEXT_OFFSET chosen by negotiation among the
 enabled architectures.
 
 No.  uImage merely specifies the address at which to load/execute the
 zImage, and more often than not this is a step which has to be done
 after kernel build as the kernel build does not have the information
 to be able to generate a uImage on its own.  Also, a uImage generated
 for one platform will not necessarily boot on a different platform
 even though the contents of the uImage may be 100% identical apart
 from the header.

You were right about the typo but I'm afraid the location was much
earlier. Sorry! Replace uImage with the vmlinux ELF image and my last
post is not quite such nonsense.


 The entry point is PAGE_OFFSET + TEXT_OFFSET and, although only
 implicitly defined, the entry point cannot be set to any other value
 without making a backward incompatible to arm/Booting:
 The boot loader is expected to call the kernel image by jumping
 directly to the first instruction of the kernel image.

Although for this bit probably will always be nonsense.


 Therefore providing PAGE_OFFSET remains 1G aligned and the hardware
 meets the not-unreasonably-stupid test (i.e. TEXT_OFFSET  1G) then
 deriving the right value for TEXT_OFFSET is a trivial mask operation on
 the entry point.
 
 PAGE_OFFSET doesn't have to be 1G aligned.  As I've already pointed out
 in previous replies, PAGE_OFFSET is totally irrelevant in this discussion.
 PAGE_OFFSET is the *virtual* address of the RAM, and has no bearing what
 so ever on where you load the kernel image.

When trying to directly load an ELF image, where by default vaddr ==
paddr, its actually PAGE_OFFSET we're looking for. Combining that with
some platform specific knowledge about RAM (i.e. typical PHYS_OFFSET for
the platform) and we can derive sensible paddr values.

At the start of last week the loader I used assumed TEXT_OFFSET would be
0x8000 and used it to calculate PAGE_OFFSET from the ELF entry point.

So I guess what I have now is still broken just, not quite as obviously...
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Re: [PATCH v6 15/19] usb: phy: msm: Fix PTS definitions for MSM USB controller

2014-04-22 Thread Sergei Shtylyov

Hello.

On 22-04-2014 13:20, Ivan T. Ivanov wrote:


From: Tim Bird tbird...@gmail.com



Fix the value used for Parallel Transceiver Select (PTS) for the MSM USB
controller.  This is a standard chipidea PORTSC definition, where
a PHY_TYPE of 10b (30) is ULPI and 11b (30) is SERIAL.
Fix the definitions and use them correctly in the driver code.



Signed-off-by: Tim Bird tim.b...@sonymobile.com
---
  drivers/usb/phy/phy-msm-usb.c| 8 +---
  include/linux/usb/msm_hsusb_hw.h | 5 +++--
  2 files changed, 8 insertions(+), 5 deletions(-)



diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index dababf9..e83d13a 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -287,8 +287,9 @@ static int msm_link_reset(struct msm_otg *motg)
if (motg-phy_number)
writel(readl(USB_PHY_CTRL2) | BIT(16), USB_PHY_CTRL2);

+   /* put transciever in serial mode as part of reset */


   s/transciever/transceiver/

[...]


diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h
index 575c743..98d3dd8 100644
--- a/include/linux/usb/msm_hsusb_hw.h
+++ b/include/linux/usb/msm_hsusb_hw.h
@@ -31,8 +31,9 @@
  #define USB_USBINTR  (MSM_USB_BASE + 0x0148)

  #define PORTSC_PHCD(1  23) /* phy suspend mode */
-#define PORTSC_PTS_MASK (3  30)
-#define PORTSC_PTS_ULPI (3  30)
+#define PORTSC_PTS_MASK(3  30)
+#define PORTSC_PTS_ULPI(2  30)
+#define PORTSC_PTS_SERIAL  (3  30)


   Please use tabs, not spaces here.

WBR, Sergei

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Re: [PATCH RFC 00/12] Add Qualcomm SD Card Controller support.

2014-04-22 Thread Srinivas Kandagatla

Hi Christopher,


On 22/04/14 13:58, Christopher Covington wrote:

Hi Srini,

On 04/21/2014 05:43 PM, srinivas.kandaga...@linaro.org wrote:


This patches are tested in PIO mode on IFC8064 board with both eMMC and
external SD card. I would appreciate any feedback/suggestions on the overall
approach.


I pushed a temporary tag mmci-pio-srini-wip for you on my git tree 
git://git.linaro.org/landing-teams/working/qualcomm/kernel.git



Is a non-upstream device tree needed to reproduce your test setup? If so could
you please point to or post it?


You will need to use multi_v7_defconfig.

Thanks,
srini


Thanks,
Christopher


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Re: [Qemu-devel] Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Michal Simek
On 04/17/2014 10:35 PM, Jason Gunthorpe wrote:
 On Thu, Apr 17, 2014 at 02:33:43PM -0400, Christopher Covington wrote:
 On 04/16/2014 07:21 PM, Nicolas Pitre wrote:
 On Wed, 16 Apr 2014, Christopher Covington wrote:

 Thank you for the suggestion. This approach also came to mind, but it would
 require new documentation and tooling in the JTAG scripts or simulator
 equivalent. That's another aspect of the ELF-based approaches that I
 like--hopefully existing documentation and tool support could be reused.

 The above is useful for loading the raw uncompressed Image without 
 carrying the full ELF baggage.

 What exactly is the full ELF baggage? Aren't there existing mechanisms to 
 omit
 debugging symbols, for example, if size is of concern?
 
 FWIW, it is a small non-intrusive change to produce ELFs with the
 proper LMA, if it is useful for specialized tooling, here is the 3.14
 version of the patch I created (I see it needs a bit of cleanup..)
 You must also force PATCH_PHYS_VIRT off.
 
 The ELF also has the correct entry point address, so ELF tooling can
 just jump into it, after setting the proper register values according
 to the boot protocol.
 
 From ca9763668eed2eaaf0c0c2640f1502c22b68a739 Mon Sep 17 00:00:00 2001
 From: Jason Gunthorpe jguntho...@obsidianresearch.com
 Date: Fri, 14 Sep 2012 11:27:17 -0600
 Subject: [PATCH] [ARM] Use AT() in the linker script to create correct program
  headers
 
 The standard linux asm-generic/vmlinux.lds.h already supports this,
 and it seems other architectures do as well.
 
 The goal is to create an ELF file that has correct program headers. We
 want to see the VirtAddr be the runtime address of the kernel with the
 MMU turned on, and PhysAddr be the physical load address for the section
 with no MMU.
 
 This allows ELF based boot loaders to properly load vmlinux:
 
 $ readelf -l vmlinux
 Entry point 0x8000
   Type   Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
   LOAD   0x008000 0xc0008000 0x8000 0x372244 0x3a4310 RWE 0x8000
 
 Signed-off-by: Jason Gunthorpe jguntho...@obsidianresearch.com
 ---
  arch/arm/include/asm/memory.h |  2 +-
  arch/arm/kernel/vmlinux.lds.S | 51 
 +--
  2 files changed, 31 insertions(+), 22 deletions(-)
 
 diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
 index 8756e4b..551e971 100644
 --- a/arch/arm/include/asm/memory.h
 +++ b/arch/arm/include/asm/memory.h
 @@ -350,7 +350,7 @@ static inline __deprecated void *bus_to_virt(unsigned 
 long x)
  #define virt_addr_valid(kaddr)   (((unsigned long)(kaddr) = PAGE_OFFSET 
  (unsigned long)(kaddr)  (unsigned long)high_memory) \
pfn_valid(__pa(kaddr)  PAGE_SHIFT) 
 )
  
 -#endif
 +#endif /* __ASSEMBLY__ */


This is unrelated change.

  
  #include asm-generic/memory_model.h
  
 diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
 index 7bcee5c..15353d2 100644
 --- a/arch/arm/kernel/vmlinux.lds.S
 +++ b/arch/arm/kernel/vmlinux.lds.S
 @@ -3,6 +3,13 @@
   * Written by Martin Mares m...@atrey.karlin.mff.cuni.cz
   */
  
 +/* If we have a known, fixed physical load address then set LOAD_OFFSET
 +   and generate an ELF that has the physical load address in the program
 +   headers. */
 +#ifndef CONFIG_ARM_PATCH_PHYS_VIRT
 +#define LOAD_OFFSET (PAGE_OFFSET - PLAT_PHYS_OFFSET)
 +#endif
 +
  #include asm-generic/vmlinux.lds.h
  #include asm/cache.h
  #include asm/thread_info.h
 @@ -43,7 +50,7 @@
  #endif
  
  OUTPUT_ARCH(arm)
 -ENTRY(stext)
 +ENTRY(phys_start)
  
  #ifndef __ARMEB__
  jiffies = jiffies_64;
 @@ -86,11 +93,13 @@ SECTIONS
  #else
   . = PAGE_OFFSET + TEXT_OFFSET;
  #endif
 - .head.text : {
 + .head.text : AT(ADDR(.head.text) - LOAD_OFFSET) {
   _text = .;
 + phys_start = . - LOAD_OFFSET;
   HEAD_TEXT
   }

I am not quite about these changes above but Russell can comment it.

 - .text : {   /* Real text segment*/
 + /* Real text segment */
 + .text :  AT(ADDR(.text) - LOAD_OFFSET) {

The rest is just fine. It is exactly what I have written some months
ago when I want to get ELF with correct addresses for qemu.
It is the same what it is written in asm-generic/vmlinux.lds.h
and ARM should also use it.

Thanks,
Michal

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Maintainer of Linux kernel - Xilinx Zynq ARM architecture
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Re: [PATCH v6 01/19] usb: phy: msm: Make driver selectable on ARCH_QCOM

2014-04-22 Thread Felipe Balbi
On Tue, Apr 22, 2014 at 12:20:20PM +0300, Ivan T. Ivanov wrote:
 From: Ivan T. Ivanov iiva...@mm-sol.com
 
 Controller could be found on APQ and MSM platforms,
 make configuration description more generic.
 
 Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
 ---
  drivers/usb/phy/Kconfig | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)
 
 diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
 index 416e0c8..0c668a3 100644
 --- a/drivers/usb/phy/Kconfig
 +++ b/drivers/usb/phy/Kconfig
 @@ -171,11 +171,11 @@ config USB_ISP1301
 module will be called phy-isp1301.
 
  config USB_MSM_OTG
 - tristate OTG support for Qualcomm on-chip USB controller
 - depends on (USB || USB_GADGET)  ARCH_MSM
 + tristate Qualcomm on-chip USB OTG controller support
 + depends on (USB || USB_GADGET)  (ARCH_MSM || ARCH_QCOM)

I would actually drop USB || USB_GADGET dependency here just make it
easier to enable the driver on Kconfig, other you have to enable
USB_SUPPORT, then enable USB, go back one menu level, go down to PHY
menu, and choose this driver.

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Re: [PATCH v6 04/19] usb: phy: msm: Migrate to Managed Device Resource allocation

2014-04-22 Thread Srinivas Kandagatla



On 22/04/14 10:20, Ivan T. Ivanov wrote:

From: Ivan T. Ivanov iiva...@mm-sol.com

Move memory, regulators, clocks and irq allocation to
devm_* variants. Properly check for valid clk handles.


-module_platform_driver_probe(msm_otg_driver, msm_otg_probe);
+module_platform_driver(msm_otg_driver);


This change doesn’t match the log.



  MODULE_LICENSE(GPL v2);
  MODULE_DESCRIPTION(MSM USB transceiver driver);
--
1.8.3.2

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Re: [PATCH 0/3] pinctrl: qcom: Add IPQ8064 pinctrl support

2014-04-22 Thread Linus Walleij
On Tue, Apr 15, 2014 at 5:10 AM, Andy Gross agr...@codeaurora.org wrote:

 This set of patches adds pinctrl support for the Qualcomm IPQ8064 platform.
 The IPQ8064 uses the same TLMM block as the APQ8064, but has a different 
 number
 of pins, functions, and function assignments.  The second patch contains the
 devicetree documentation.  The last patch selects PINCTRL for all ARCH_QCOM
 platforms.  This allows for selection of pinctrl support via a make 
 menuconfig.

 Andy Gross (3):
   pinctrl: qcom: Add definitions for IPQ8064
   dt: Document Qualcomm IPQ8064 pinctrl binding
   ARM: qcom: Select PINCTRL by default for ARCH_QCOM

Björn can you look at this series?

David/Bryan: can either of you ACK the changes hitting
arch/arm/mach-qcom/Kconfig
so I can merge this through the pinctrl tree?

Yours,
Linus Walleij
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Re: [PATCH v6 03/19] usb: phy: msm: Move global regulators variables to driver state

2014-04-22 Thread Felipe Balbi
On Tue, Apr 22, 2014 at 06:12:19PM +0300, Ivan T. Ivanov wrote:
 On Tue, 2014-04-22 at 09:57 -0500, Felipe Balbi wrote:
  On Tue, Apr 22, 2014 at 12:20:22PM +0300, Ivan T. Ivanov wrote:
   From: Ivan T. Ivanov iiva...@mm-sol.com
  
  #define ENOLOG  ENOCOMMIT
  
  return -ENOLOG;
  
 
 #if SIMPLE_CHANGE
 #define ENOLOG0
 #endif
 
 Will fix it :-)

#undef ENOLOG
#define THAT_DOESNT_REALLY_WORK_FOR_ME

hehehe :-) Thanks for updating ;-)

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Re: [PATCH v6 01/19] usb: phy: msm: Make driver selectable on ARCH_QCOM

2014-04-22 Thread Ivan T. Ivanov

Hi, 

On Tue, 2014-04-22 at 09:57 -0500, Felipe Balbi wrote:
 On Tue, Apr 22, 2014 at 12:20:20PM +0300, Ivan T. Ivanov wrote:
  From: Ivan T. Ivanov iiva...@mm-sol.com
  
  Controller could be found on APQ and MSM platforms,
  make configuration description more generic.
  
  Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
  ---
   drivers/usb/phy/Kconfig | 6 +++---
   1 file changed, 3 insertions(+), 3 deletions(-)
  
  diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
  index 416e0c8..0c668a3 100644
  --- a/drivers/usb/phy/Kconfig
  +++ b/drivers/usb/phy/Kconfig
  @@ -171,11 +171,11 @@ config USB_ISP1301
module will be called phy-isp1301.
  
   config USB_MSM_OTG
  -   tristate OTG support for Qualcomm on-chip USB controller
  -   depends on (USB || USB_GADGET)  ARCH_MSM
  +   tristate Qualcomm on-chip USB OTG controller support
  +   depends on (USB || USB_GADGET)  (ARCH_MSM || ARCH_QCOM)
 
 I would actually drop USB || USB_GADGET dependency here just make it
 easier to enable the driver on Kconfig, other you have to enable
 USB_SUPPORT, then enable USB, go back one menu level, go down to PHY
 menu, and choose this driver.
 

Because phy directory already depends on USB_SUPPORT?

Regards,
Ivan

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Re: [PATCH v6 03/19] usb: phy: msm: Move global regulators variables to driver state

2014-04-22 Thread Ivan T. Ivanov
On Tue, 2014-04-22 at 09:57 -0500, Felipe Balbi wrote:
 On Tue, Apr 22, 2014 at 12:20:22PM +0300, Ivan T. Ivanov wrote:
  From: Ivan T. Ivanov iiva...@mm-sol.com
 
 #define ENOLOGENOCOMMIT
 
 return -ENOLOG;
 

#if SIMPLE_CHANGE
#define ENOLOG  0
#endif

Will fix it :-)

Ivan

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Re: [PATCH v3 1/3] usb: chipidea: msm: Add device tree binding information

2014-04-22 Thread Ivan T. Ivanov
On Tue, 2014-04-22 at 16:07 +0100, Srinivas Kandagatla wrote:
 
 On 22/04/14 10:43, Ivan T. Ivanov wrote:
  +- interrupts:   interrupt-specifier for the controller interrupt.
  +- usb-phy:  phandle for the PHY device
  +- dr_mode:  Sould be peripheral
 s/Sould/Should/
  +

Thanks. will fix it.

Ivan

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Re: [PATCH v6 01/19] usb: phy: msm: Make driver selectable on ARCH_QCOM

2014-04-22 Thread Felipe Balbi
On Tue, Apr 22, 2014 at 06:16:35PM +0300, Ivan T. Ivanov wrote:
 
 Hi, 
 
 On Tue, 2014-04-22 at 09:57 -0500, Felipe Balbi wrote:
  On Tue, Apr 22, 2014 at 12:20:20PM +0300, Ivan T. Ivanov wrote:
   From: Ivan T. Ivanov iiva...@mm-sol.com
   
   Controller could be found on APQ and MSM platforms,
   make configuration description more generic.
   
   Signed-off-by: Ivan T. Ivanov iiva...@mm-sol.com
   ---
drivers/usb/phy/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
   
   diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
   index 416e0c8..0c668a3 100644
   --- a/drivers/usb/phy/Kconfig
   +++ b/drivers/usb/phy/Kconfig
   @@ -171,11 +171,11 @@ config USB_ISP1301
   module will be called phy-isp1301.
   
config USB_MSM_OTG
   - tristate OTG support for Qualcomm on-chip USB controller
   - depends on (USB || USB_GADGET)  ARCH_MSM
   + tristate Qualcomm on-chip USB OTG controller support
   + depends on (USB || USB_GADGET)  (ARCH_MSM || ARCH_QCOM)
  
  I would actually drop USB || USB_GADGET dependency here just make it
  easier to enable the driver on Kconfig, other you have to enable
  USB_SUPPORT, then enable USB, go back one menu level, go down to PHY
  menu, and choose this driver.
  
 
 Because phy directory already depends on USB_SUPPORT?

right

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Re: [PATCH v6 04/19] usb: phy: msm: Migrate to Managed Device Resource allocation

2014-04-22 Thread Ivan T. Ivanov
On Tue, 2014-04-22 at 16:07 +0100, Srinivas Kandagatla wrote:
 
 On 22/04/14 10:20, Ivan T. Ivanov wrote:
  From: Ivan T. Ivanov iiva...@mm-sol.com
 
  Move memory, regulators, clocks and irq allocation to
  devm_* variants. Properly check for valid clk handles.
 
 
  -module_platform_driver_probe(msm_otg_driver, msm_otg_probe);
  +module_platform_driver(msm_otg_driver);
 
 This change doesn’t match the log.

Right, I have erroneously assumed that devm_ functions are those 
which returns EPROBE_DEFER.

Will make it separate change.

Thanks,
Ivan

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Re: [PATCH v6 06/19] usb: phy: msm: Fix checkpatch.pl warnings

2014-04-22 Thread Srinivas Kandagatla



On 22/04/14 10:20, Ivan T. Ivanov wrote:

@@ -79,8 +78,7 @@ static int msm_hsusb_init_vddcx(struct msm_otg *motg, int 
init)
ret = regulator_set_voltage(motg-vddcx, 0,
USB_PHY_VDD_DIG_VOL_MAX);
if (ret)
-   dev_err(motg-phy.dev, unable to set the voltage 
-   for hsusb vddcx\n);
+   dev_err(motg-phy.dev, Cannot set vddcx voltage\n);




@@ -137,15 +133,13 @@ static int msm_hsusb_ldo_set_mode(struct msm_otg *motg, 
int on)
ret = regulator_set_optimum_mode(motg-v1p8,
USB_PHY_1P8_HPM_LOAD);
if (ret  0) {
-   pr_err(%s: Unable to set HPM of the regulator 
-   HSUSB_1p8\n, __func__);
+   pr_err(Could not set HPM for v1p8\n);
return ret;
}




@@ -390,8 +382,7 @@ static int msm_hsusb_config_vddcx(struct msm_otg *motg, int 
high)

ret = regulator_set_voltage(motg-vddcx, min_vol, max_vol);
if (ret) {
-   pr_err(%s: unable to set the voltage for regulator 
-   HSUSB_VDDCX\n, __func__);
+   dev_err(motg-phy.dev, Cannot set vddcx voltage\n);
return ret;
}




I see some of pr_err not moved to dev_err?, while others have been moved.

Also noticed that the error messages are changed as part of this fix. 
IMHO, changing an error message would have a side-effects on logging 
tools, anyway Am not sure if its true in this case.



Thanks,
srini
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Re: [PATCH 0/3] pinctrl: qcom: Add IPQ8064 pinctrl support

2014-04-22 Thread Bjorn Andersson
On Tue, Apr 22, 2014 at 8:11 AM, Linus Walleij linus.wall...@linaro.org wrote:
 On Tue, Apr 15, 2014 at 5:10 AM, Andy Gross agr...@codeaurora.org wrote:

 This set of patches adds pinctrl support for the Qualcomm IPQ8064 platform.
 The IPQ8064 uses the same TLMM block as the APQ8064, but has a different 
 number
 of pins, functions, and function assignments.  The second patch contains the
 devicetree documentation.  The last patch selects PINCTRL for all ARCH_QCOM
 platforms.  This allows for selection of pinctrl support via a make 
 menuconfig.

 Andy Gross (3):
   pinctrl: qcom: Add definitions for IPQ8064
   dt: Document Qualcomm IPQ8064 pinctrl binding
   ARM: qcom: Select PINCTRL by default for ARCH_QCOM

 Björn can you look at this series?

I don't have access to documentation for this platform, but I think
the code looks sane.

I would however like to push for the sort order of the Makefile and
Kconfig to be corrected (IPQ should come after APQ). Maybe you could
do that while picking the patches up?

With that change I find this

Reviewed-by: Bjorn Andersson bjorn.anders...@sonymobile.com


 David/Bryan: can either of you ACK the changes hitting
 arch/arm/mach-qcom/Kconfig
 so I can merge this through the pinctrl tree?

Maintainer for qcom-soc is Kumar, I added him to the To list.
May I suggest that Kumar picks the last change in the series (addition
of PINCTRL), as it is unrelated to the rest of the series?


 Yours,
 Linus Walleij

Regards,
Bjorn
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Re: [PATCH v6 11/19] usb: phy: msm: Add device tree support and binding information

2014-04-22 Thread Srinivas Kandagatla

Hi Ivan,

On 22/04/14 10:20, Ivan T. Ivanov wrote:

From: Ivan T. Ivanoviiva...@mm-sol.com

Allows MSM OTG controller to be specified via device tree.

Signed-off-by: Ivan T. Ivanoviiva...@mm-sol.com
---
  .../devicetree/bindings/usb/msm-hsusb.txt  |  67 +
  drivers/usb/phy/phy-msm-usb.c  | 108 +
  include/linux/usb/msm_hsusb.h  |   6 +-
  3 files changed, 159 insertions(+), 22 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt 
b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
index 5ea26c6..ee4123d 100644
--- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -15,3 +15,70 @@ Example EHCI controller device node:
usb-phy = usb_otg;
};

+USB PHY with optional OTG:
+
+Required properties:
+- compatible:   Should contain:
+  qcom,usb-otg-ci for chipsets with ChipIdea 45nm PHY
+  qcom,usb-otg-snps for chipsets with Synopsys 28nm PHY
+
+- regs: Offset and length of the register set in the memory map
+- interrupts:   interrupt-specifier for the OTG interrupt.
+
+- clocks:   A list of phandle + clock-specifier pairs for the
+clocks listed in clock-names
+- clock-names:  Should contain the following:
+  phy USB PHY reference clock
+  coreProtocol engine clock
+  iface   Interface bus clock
+  alt_coreProtocol engine clock for targets with asynchronous
+reset methodology. (optional)
+
+- vdccx-supply: phandle to the regulator for the vdd supply for
+digital circuit operation.
+- v1p8-supply:  phandle to the regulator for the 1.8V supply
+- v3p3-supply:  phandle to the regulator for the 3.3V supply
+
+- resets:   A list of phandle + reset-specifier pairs for the
+resets listed in reset-names
+- reset-names:  Should contain the following:
+  phy USB PHY controller reset
+  linkUSB LINK controller reset
+
+- qcom,otg-control: OTG control (VBUS and ID notifications) can be one of
+1 - PHY control
+2 - PMIC control
+
+Optional properties:
+- dr_mode:  One of host, peripheral or otg. Defaults to otg
+
+- qcom,phy-init-sequence: PHY configuration sequence values. This is related 
to Device
+Mode Eye Diagram test. Start address at which these values 
will be
+written is ULPI_EXT_VENDOR_SPECIFIC. Value of -1 is reserved as
+do not overwrite default value at this address.
+For example: qcom,phy-init-sequence =  -1 0x63 ;
+Will update only value at address ULPI_EXT_VENDOR_SPECIFIC + 1.


I don’t think DT maintainers will like the sound of it.
Sorry If I missed some old discussion on this.
But I don't this this is the correct way.

DT should describe the system hardware layout rather than initialization 
sequence.


The initialization code with magic values should go directly into the 
driver and depending on the dt-compatible driver should select the right 
sequence.


/phy-msm-usb.c

+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -30,9 +30,12 @@
  #include linux/debugfs.h
  #include linux/seq_file.h
  #include linux/pm_runtime.h
+#include linux/of.h
+#include linux/of_device.h

  #include linux/usb.h
  #include linux/usb/otg.h
+#include linux/usb/of.h
  #include linux/usb/ulpi.h
  #include linux/usb/gadget.h
  #include linux/usb/hcd.h
@@ -217,16 +220,16 @@ static struct usb_phy_io_ops msm_otg_io_ops = {
  static void ulpi_init(struct msm_otg *motg)
  {
struct msm_otg_platform_data *pdata = motg-pdata;
-   int *seq = pdata-phy_init_seq;
+   int *seq = pdata-phy_init_seq, idx;
+   u32 addr = ULPI_EXT_VENDOR_SPECIFIC;

-   if (!seq)
-   return;
+   for (idx = 0; idx  pdata-phy_init_sz; idx++) {
+   if (seq[idx] == -1)
+   continue;

-   while (seq[0] = 0) {
dev_vdbg(motg-phy.dev, ulpi: write 0x%02x to 0x%02x\n,
-   seq[0], seq[1]);
-   ulpi_write(motg-phy, seq[0], seq[1]);
-   seq += 2;
+   seq[idx], addr + idx);
+   ulpi_write(motg-phy, seq[idx], addr + idx);
}
  }


How is above change related to device trees?


@@ -1343,25 +1346,87 @@ static void msm_otg_debugfs_cleanup(void)
debugfs_remove(msm_otg_dbg_root);
  }

+static struct of_device_id msm_otg_dt_match[] = {
+   {
+   .compatible = qcom,usb-otg-ci,
+   .data = (void *) CI_45NM_INTEGRATED_PHY
+   }, {
+   .compatible = qcom,usb-otg-snps,
+   .data = (void *) SNPS_28NM_INTEGRATED_PHY
+   }, {}
+};
+
+static int msm_otg_read_dt(struct platform_device *pdev, struct msm_otg *motg)
+{
+   struct msm_otg_platform_data *pdata;
+   const struct of_device_id *id;
+   struct device_node 

Re: [Qemu-devel] Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Jason Gunthorpe
  index 8756e4b..551e971 100644
  +++ b/arch/arm/include/asm/memory.h
  @@ -350,7 +350,7 @@ static inline __deprecated void *bus_to_virt(unsigned 
  long x)
   #define virt_addr_valid(kaddr) (((unsigned long)(kaddr) = PAGE_OFFSET 
   (unsigned long)(kaddr)  (unsigned long)high_memory) \
   pfn_valid(__pa(kaddr)  PAGE_SHIFT) 
  )
   
  -#endif
  +#endif /* __ASSEMBLY__ */

 This is unrelated change.

Right, as I said it needs some cleanup :) This is left overs from
rebasing to 3.14 - the original had to carry some small changes to
memory.h as well, but now that we have PLAT_PHYS_OFFSET that isn't
necessary.
 
  @@ -43,7 +50,7 @@
   #endif
   
   OUTPUT_ARCH(arm)
  -ENTRY(stext)
  +ENTRY(phys_start)
   
   #ifndef __ARMEB__
   jiffies = jiffies_64;
  @@ -86,11 +93,13 @@ SECTIONS
   #else
  . = PAGE_OFFSET + TEXT_OFFSET;
   #endif
  -   .head.text : {
  +   .head.text : AT(ADDR(.head.text) - LOAD_OFFSET) {
  _text = .;
  +   phys_start = . - LOAD_OFFSET;
  HEAD_TEXT
  }
 
 I am not quite about these changes above but Russell can comment it.

This is adjusting the entry point address in the ELF.

I have copied what other arch's are doing and used the physical
address as the entry address (see x86, ia64).

Jason
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Re: Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Jason Gunthorpe
On Tue, Apr 22, 2014 at 10:44:14AM +0100, Daniel Thompson wrote:
 On 17/04/14 21:35, Jason Gunthorpe wrote:
  The above is useful for loading the raw uncompressed Image without 
  carrying the full ELF baggage.
 
  What exactly is the full ELF baggage? Aren't there existing mechanisms to 
  omit
  debugging symbols, for example, if size is of concern?
  
  FWIW, it is a small non-intrusive change to produce ELFs with the
  proper LMA, if it is useful for specialized tooling, here is the 3.14
  version of the patch I created (I see it needs a bit of cleanup..)
  You must also force PATCH_PHYS_VIRT off.
  
  The ELF also has the correct entry point address, so ELF tooling can
  just jump into it, after setting the proper register values according
  to the boot protocol.
 
 That might be a useful approach for single platform kernels but I don't
 think such an approach can work for multi-arch kernels since, because
 the RAM can be located anywhere in the address map, the physical load
 address is platform dependant.

Right, I think everyone realizes that.

What this patch does is make kernels that are built with
PLAT_PHYS_OFFSET set and CONFIG_ARM_PATCH_PHYS_VIRT disabled produce
an ELF that reflects the build configuration.

Based on comments from others in the thread this is looking useful for
a variety of cases.

I'm not sure who would need to ack this patch? I can clean it up of course.

Thanks,
Jason
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Re: [Qemu-devel] Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Russell King - ARM Linux
On Tue, Apr 22, 2014 at 04:50:12PM +0200, Michal Simek wrote:
 On 04/17/2014 10:35 PM, Jason Gunthorpe wrote:
  +/* If we have a known, fixed physical load address then set LOAD_OFFSET
  +   and generate an ELF that has the physical load address in the program
  +   headers. */
  +#ifndef CONFIG_ARM_PATCH_PHYS_VIRT
  +#define LOAD_OFFSET (PAGE_OFFSET - PLAT_PHYS_OFFSET)
  +#endif
  +
...
  -   .head.text : {
  +   .head.text : AT(ADDR(.head.text) - LOAD_OFFSET) {
  _text = .;
  +   phys_start = . - LOAD_OFFSET;
  HEAD_TEXT
  }
 
 I am not quite about these changes above but Russell can comment it.

I don't think /anyone/ is seriously proposing that we should merge this
patch... because that won't happen.  It should be clear enough from the
discussion why that is, but in case it isn't, take a look above.

What is that ifdef saying.  It's saying that if you enable
ARM_PATCH_PHYS_VIRT, which is an absolute requirement for multi-
platform kernels, then you get the proper LMA addresses.  If you don't,
then you don't get proper LMA addresses.

Put another way, if your platform is part of the multi-platform kernel
then you are *excluded* from being able to use this... unless you hack
the Kconfig, and then also provide a constant value for PHYS_OFFSET,
thereby _tying_ the kernel you built to a _single_ platform.

You can't do this _and_ have a multi-platform kernel.

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Re: [PATCH RFC] WIP: mfd: add support for Qualcomm RPM

2014-04-22 Thread Bjorn Andersson
On Thu 10 Apr 15:17 PDT 2014, Josh Cartwright wrote:

Hi Josh,

Thanks for posting this RFC.

 The Resource Power Manager (RPM) is responsible managing SoC-wide
 resources (clocks, regulators, etc) on MSM and other Qualcomm SoCs.
 This driver provides an implementation of the message-RAM-based
 communication protocol.
 
 Note, this is a rewrite of the driver as it exists in the downstream
 tree[1], making a few simplifying assumptions to clean it up, and adding
 device tree support.
 
 [1]: 
 https://www.codeaurora.org/cgit/quic/la/kernel/msm/tree/arch/arm/mach-msm/rpm.c?h=msm-3.4
 
 Signed-off-by: Josh Cartwright jo...@codeaurora.org
 ---
 This patch is intended to act as a starting point for discussions on how we
 should proceed going forward supporting RPM.  In particular, figuring out how
 to model RPM and it's controlled resources in device tree.

As you know I wrote up a simple driver for this to get regulators a few months
back, so I'm happy to see this discussion.

 
 I've chosen a path where a subnode logically separates the RPM resources; it's
 intended each set of resources will be controlled by a single driver.  For
 example, an RPM-controlled regulator might consume two RPM_TYPE_REQ resources
 described in 'reg'.

I agree, having each subnode be a 1:1 for a resource exposed by the rpm driver
seems to be the most logical idea. I did an experiment where I made my rpm
driver a mfd with regulator cells, but fell back to just having generic
platform_drivers like you do.


From the RPMs perspective each logical resource is represented by the following
properties:
1) A consecutive range of addresses used for updating a value (what you call
   REQ)
2) An offset in a bitmap used to indicate what resources are set by the urrent
   write
3) A consecutive range of addresses used for reading the status of a resource
   (what you call STATUS)

For the individual clock client we have:
  4 bytes of requested clock rate

For the individual regulator client we have:
  4 or 8 bytes, depending on regulator type, of a packed struct containing the
  various properties of the regulator.

For msm_bus the data is represented by 29 words, I'm not sure if there's some
additional logic so that not all of these needs to be updated at once, there is
still just one selector bit.

At least the clock and regulators are only ever interested in operating on
entire logical resources. It's arguably never correct to write only 4 bytes for
a ldo update.


The API must therefor describe the entirety of a logical resource, either via
passing a list of req's or by abstracting the rpm details out and simply
exposing logical resources.

 
 Effectively, this pushes the generic resource ID - SoC-specific resource
 ID mapping out of the large data tables that exist in msm-3.4 into the device
 tree.  An alternative approach would be to still maintain the SoC-specific
 tables, and have each node matched to it's resources using a unique compatible
 string.

In my solution I did choose to expose logical resources, that simply maps to a
lookup table where I store offset for writes and reds, the selector bit and the
resource's size.

The rpm doesn't care about the internal representation of the clients data and
the clients doesn't care about the internal representation of the rpm's data.

[snip]
 +Qualcomm Resource Power Manager (RPM)
 +
 +This driver is used to interface with Resource Power Manager (RPM).  The RPM 
 is
 +responsible managing SoC-wide resources (clocks, regulators, etc) on MSM and
 +other Qualcomm chipsets.
 +
 +Required properties:
 +
 +- compatible: must be one of:
 +   qcom,rpm-apq8064
 +   qcom,rpm-ipq8064
 +
 +- reg: must contain two register specifiers, in the following order:
 +   specifier 0: RPM Message RAM
 +   specifier 1: IPC register
 +
 +- reg-names: must contain the following, in order:
 +   msg_ram
 +   ipc
 +
 +- interrupts: must contain the following three interrupt specifiers, in 
 order:
 +   specifier 0: RPM Acknowledgement Interrupt
 +   specifier 1: Error Interrupt
 +   specifier 2: Wakeup interrupt
 +
 +- interrupt-names: must contain the following, in order:
 +   ack
 +   err
 +   wakeup
 +
 +- ipc-bit: bit written to the IPC register to notify RPM of a pending request
 +
 +- #address-cells: must be 3
 +   cell 0: offset in ACK and REQ register spaces corresponding to the 
 register
 +   cell 1: type field, one of RPM_TYPE_REQ (0) or RPM_TYPE_STATUS (1)
 +   cell 2: indicates the selector bit to set when writing this register,
 +   this cell is ignored (and should be set to zero) when type is
 +   RPM_TYPE_STATUS

As you've showed below, this requires a common parser-function to be feasable.
The natural place is to put this in the rpm implementation, but I found it
strange to have a function in the rpm driver, taking a pointer to a child node
and operating on that.

 +
 +Example:
 +
 +   #include 

Re: [Qemu-devel] Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Jason Gunthorpe
On Tue, Apr 22, 2014 at 06:11:42PM +0100, Russell King - ARM Linux wrote:

 Put another way, if your platform is part of the multi-platform kernel
 then you are *excluded* from being able to use this... unless you hack
 the Kconfig, and then also provide a constant value for PHYS_OFFSET,
 thereby _tying_ the kernel you built to a _single_ platform.

That is exactly right. To get a fixed LMA you must commit to a
non-relocatable kernel image.

Realistically this patch would need to be accompanied by something
that makes ARM_PATCH_PHYS_VIRT optional for multiplatform based on
EXPERT or similar.

The best usecase seems to be to support ELF tooling for low level
debugging activities, a non-relocatable image isn't a blocker for that
case.

Since the patch is a no-op if LOAD_OFFSET isn't set, is there a
downside I don't see?

Thanks,
Jason
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Re: Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Nicolas Pitre
On Tue, 22 Apr 2014, Jason Gunthorpe wrote:

 On Tue, Apr 22, 2014 at 10:44:14AM +0100, Daniel Thompson wrote:
  On 17/04/14 21:35, Jason Gunthorpe wrote:
   The above is useful for loading the raw uncompressed Image without 
   carrying the full ELF baggage.
  
   What exactly is the full ELF baggage? Aren't there existing mechanisms 
   to omit
   debugging symbols, for example, if size is of concern?
   
   FWIW, it is a small non-intrusive change to produce ELFs with the
   proper LMA, if it is useful for specialized tooling, here is the 3.14
   version of the patch I created (I see it needs a bit of cleanup..)
   You must also force PATCH_PHYS_VIRT off.
   
   The ELF also has the correct entry point address, so ELF tooling can
   just jump into it, after setting the proper register values according
   to the boot protocol.
  
  That might be a useful approach for single platform kernels but I don't
  think such an approach can work for multi-arch kernels since, because
  the RAM can be located anywhere in the address map, the physical load
  address is platform dependant.
 
 Right, I think everyone realizes that.
 
 What this patch does is make kernels that are built with
 PLAT_PHYS_OFFSET set and CONFIG_ARM_PATCH_PHYS_VIRT disabled produce
 an ELF that reflects the build configuration.
 
 Based on comments from others in the thread this is looking useful for
 a variety of cases.

Well...

We do not want people in general to have PLAT_PHYS_OFFSET defined and
CONFIG_ARM_PATCH_PHYS_VIRT disabled.  In fact a huge effort has been 
deployed to go the exact opposite way over the last few years.

There are special cases where CONFIG_ARM_PATCH_PHYS_VIRT needs to be 
turned off for example.  But those are specialized configurations and 
they should be the exception not the norm.  And you should be knowing 
what you're doing in those cases.

So I doubt it is worth complexifying the linker script for something 
that is meant to be the exception, _especially_ if this is for some 
debugging environment purposes.  You may just adjust some setting in 
your environment or do a quick kernel modification locally instead.  
And if you don't know what to modify then you're probably lacking the 
necessary qualifications to perform that kind of kernel debugging in the 
first place.

Making the patch available on a mailing list is fine.  If it is useful 
to someone else then it'll be found.  But I don't think this is useful 
upstream.


Nicolas
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Re: [Qemu-devel] Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Russell King - ARM Linux
On Tue, Apr 22, 2014 at 11:53:25AM -0600, Jason Gunthorpe wrote:
 On Tue, Apr 22, 2014 at 06:11:42PM +0100, Russell King - ARM Linux wrote:
 
  Put another way, if your platform is part of the multi-platform kernel
  then you are *excluded* from being able to use this... unless you hack
  the Kconfig, and then also provide a constant value for PHYS_OFFSET,
  thereby _tying_ the kernel you built to a _single_ platform.
 
 That is exactly right. To get a fixed LMA you must commit to a
 non-relocatable kernel image.
 
 Realistically this patch would need to be accompanied by something
 that makes ARM_PATCH_PHYS_VIRT optional for multiplatform based on
 EXPERT or similar.
 
 The best usecase seems to be to support ELF tooling for low level
 debugging activities, a non-relocatable image isn't a blocker for that
 case.

Let's not forget that if you want to debug, it's because you've hit a
problem in the kernel you're running.  To get an ELF image you can debug,
you have to turn ARM_PATCH_PHYS_VIRT off, which changes the generated
code - which can in itself cause bugs to hide themselves.

Unfortunately, those kinds of bugs are not as rare as you might think.

 Since the patch is a no-op if LOAD_OFFSET isn't set, is there a
 downside I don't see?

It leads people into thinking that we support booting an ELF file.
We don't.

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[RFC WIP 2/2] regulator: msm_rpm: Initial regulator driver for Qualcomm RPM

2014-04-22 Thread Bjorn Andersson
Initial regulator driver for ldos on the pm8921 controlled by RPM.

Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
 drivers/regulator/Kconfig |   7 +
 drivers/regulator/Makefile|   1 +
 drivers/regulator/msm_rpm-regulator.c | 467 ++
 3 files changed, 475 insertions(+)
 create mode 100644 drivers/regulator/msm_rpm-regulator.c

diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 6a79328..a1d35316 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -372,6 +372,13 @@ config REGULATOR_MC13892
  Say y here to support the regulators found on the Freescale MC13892
  PMIC.
 
+config REGULATOR_MSM_RPM
+   tristate Qualcomm RPM regulator driver
+   depends on MFD_MSM_RPM
+   help
+ This driver provides support for regulators controlled by the
+ Qualcomm RPM.
+
 config REGULATOR_PALMAS
tristate TI Palmas PMIC Regulators
depends on MFD_PALMAS
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 979f9dd..c1cb250 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_REGULATOR_MAX77693) += max77693.o
 obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o
 obj-$(CONFIG_REGULATOR_MC13892) += mc13892-regulator.o
 obj-$(CONFIG_REGULATOR_MC13XXX_CORE) +=  mc13xxx-regulator-core.o
+obj-$(CONFIG_REGULATOR_MSM_RPM) += msm_rpm-regulator.o
 obj-$(CONFIG_REGULATOR_PALMAS) += palmas-regulator.o
 obj-$(CONFIG_REGULATOR_PFUZE100) += pfuze100-regulator.o
 obj-$(CONFIG_REGULATOR_TPS51632) += tps51632-regulator.o
diff --git a/drivers/regulator/msm_rpm-regulator.c 
b/drivers/regulator/msm_rpm-regulator.c
new file mode 100644
index 000..4c1cd6a
--- /dev/null
+++ b/drivers/regulator/msm_rpm-regulator.c
@@ -0,0 +1,467 @@
+/*
+ * Copyright (c) 2013, Sony Mobile Communications AB.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/regulator/driver.h
+#include linux/regulator/machine.h
+#include linux/regulator/of_regulator.h
+
+#include linux/mfd/msm_rpm.h
+
+struct rpm_vreg_parts;
+struct vreg_range;
+
+struct msm_rpm_reg {
+   struct mutex lock;
+   struct device *dev;
+   struct regulator_desc desc;
+
+   const struct rpm_vreg_parts *parts;
+   const struct vreg_range *ranges;
+   int n_ranges;
+
+   const int resource;
+
+   int is_enabled;
+
+   u32 val[2];
+
+   int uV;
+   const int hpm_min_load;
+};
+
+#define REQUEST_MEMBER(_word, _mask, _shift)   \
+{  \
+   .word   = _word,\
+   .mask   = _mask,\
+   .shift  = _shift,   \
+}
+
+struct request_member {
+   int word;
+   unsigned intmask;
+   int shift;
+};
+
+/* Possible RPM regulator request members */
+struct rpm_vreg_parts {
+   struct request_member   mV; /* voltage: used if voltage is in mV */
+   struct request_member   uV; /* voltage: used if voltage is in uV */
+   struct request_member   ip; /* peak current in mA */
+   struct request_member   pd; /* pull down enable */
+   struct request_member   ia; /* average current in mA */
+   struct request_member   fm; /* force mode */
+   struct request_member   pm; /* power mode */
+   struct request_member   pc; /* pin control */
+   struct request_member   pf; /* pin function */
+   struct request_member   enable_state;   /* NCP and switch */
+   struct request_member   comp_mode;  /* NCP */
+   struct request_member   freq;   /* frequency: NCP and SMPS */
+   struct request_member   freq_clk_src;   /* clock source: SMPS */
+   struct request_member   hpm;/* switch: control OCP and SS */
+   int request_len;
+};
+
+struct vreg_range {
+   int min_uV;
+   int max_uV;
+   int step_uV;
+};
+
+#define VOLTAGE_RANGE(_min_uV, _max_uV, _step_uV)  \
+{  \
+   .min_uV  = _min_uV, \
+   .max_uV  = _max_uV, \
+   .step_uV = _step_uV,\
+}
+
+#define SET_POINTS(_ranges)\
+{   

[RFC WIP 1/2] mfd: msm_rpm: Initial driver for the Qualcomm RPM

2014-04-22 Thread Bjorn Andersson
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
 drivers/mfd/Kconfig |   7 +
 drivers/mfd/Makefile|   1 +
 drivers/mfd/msm_rpm-8064.h  | 420 +++
 drivers/mfd/msm_rpm-8960.h  | 400 +
 drivers/mfd/msm_rpm.c   | 525 
 include/linux/mfd/msm_rpm.h |  87 
 6 files changed, 1440 insertions(+)
 create mode 100644 drivers/mfd/msm_rpm-8064.h
 create mode 100644 drivers/mfd/msm_rpm-8960.h
 create mode 100644 drivers/mfd/msm_rpm.c
 create mode 100644 include/linux/mfd/msm_rpm.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 49bb445..e8395b1 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -468,6 +468,13 @@ config UCB1400_CORE
  To compile this driver as a module, choose M here: the
  module will be called ucb1400_core.
 
+config MFD_MSM_RPM
+   tristate Qualcomm RPM
+   depends on ARCH_MSM
+   select MFD_CORE
+   help
+ Select this option to enable the Qualcomm RPM driver.
+
 config MFD_PM8XXX
tristate
 
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 5aea5ef..b371ec9 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -149,6 +149,7 @@ obj-$(CONFIG_MFD_SI476X_CORE)   += si476x-core.o
 
 obj-$(CONFIG_MFD_CS5535)   += cs5535-mfd.o
 obj-$(CONFIG_MFD_OMAP_USB_HOST)+= omap-usb-host.o omap-usb-tll.o
+obj-$(CONFIG_MFD_MSM_RPM)  += msm_rpm.o
 obj-$(CONFIG_MFD_PM8921_CORE)  += pm8921-core.o ssbi.o
 obj-$(CONFIG_MFD_PM8XXX_IRQ)   += pm8xxx-irq.o
 obj-$(CONFIG_TPS65911_COMPARATOR)  += tps65911-comparator.o
diff --git a/drivers/mfd/msm_rpm-8064.h b/drivers/mfd/msm_rpm-8064.h
new file mode 100644
index 000..ef762f4
--- /dev/null
+++ b/drivers/mfd/msm_rpm-8064.h
@@ -0,0 +1,420 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ARCH_ARM_MACH_MSM_RPM_8064_H
+#define __ARCH_ARM_MACH_MSM_RPM_8064_H
+
+/* RPM resource select enums defined for RPM core
+   NOT IN SEQUENTIAL ORDER */
+enum {
+   MSM_RPM_8064_SEL_NOTIFICATION   = 0,
+   MSM_RPM_8064_SEL_INVALIDATE = 1,
+   MSM_RPM_8064_SEL_TRIGGER_TIMED  = 2,
+   MSM_RPM_8064_SEL_RPM_CTL= 3,
+
+   MSM_RPM_8064_SEL_CXO_CLK= 5,
+   MSM_RPM_8064_SEL_PXO_CLK= 6,
+   MSM_RPM_8064_SEL_QDSS_CLK   = 7,
+   MSM_RPM_8064_SEL_APPS_FABRIC_CLK= 8,
+   MSM_RPM_8064_SEL_SYSTEM_FABRIC_CLK  = 9,
+   MSM_RPM_8064_SEL_MM_FABRIC_CLK  = 10,
+   MSM_RPM_8064_SEL_DAYTONA_FABRIC_CLK = 11,
+   MSM_RPM_8064_SEL_SFPB_CLK   = 12,
+   MSM_RPM_8064_SEL_CFPB_CLK   = 13,
+   MSM_RPM_8064_SEL_MMFPB_CLK  = 14,
+   MSM_RPM_8064_SEL_EBI1_CLK   = 16,
+
+   MSM_RPM_8064_SEL_APPS_FABRIC_CFG_HALT   = 18,
+   MSM_RPM_8064_SEL_APPS_FABRIC_CFG_CLKMOD = 19,
+   MSM_RPM_8064_SEL_APPS_FABRIC_CFG_IOCTL  = 20,
+   MSM_RPM_8064_SEL_APPS_FABRIC_ARB= 21,
+
+   MSM_RPM_8064_SEL_SYS_FABRIC_CFG_HALT= 22,
+   MSM_RPM_8064_SEL_SYS_FABRIC_CFG_CLKMOD  = 23,
+   MSM_RPM_8064_SEL_SYS_FABRIC_CFG_IOCTL   = 24,
+   MSM_RPM_8064_SEL_SYSTEM_FABRIC_ARB  = 25,
+
+   MSM_RPM_8064_SEL_MMSS_FABRIC_CFG_HALT   = 26,
+   MSM_RPM_8064_SEL_MMSS_FABRIC_CFG_CLKMOD = 27,
+   MSM_RPM_8064_SEL_MMSS_FABRIC_CFG_IOCTL  = 28,
+   MSM_RPM_8064_SEL_MM_FABRIC_ARB  = 29,
+
+   MSM_RPM_8064_SEL_PM8921_S1  = 30,
+   MSM_RPM_8064_SEL_PM8921_S2  = 31,
+   MSM_RPM_8064_SEL_PM8921_S3  = 32,
+   MSM_RPM_8064_SEL_PM8921_S4  = 33,

[RFC WIP 0/2] Qualcomm family A RPM driver and example client

2014-04-22 Thread Bjorn Andersson
To be used for reference in the design discussion related to RPM driver
implementation for family A.

Regulator driver is a not even close to the shape it should be, but shows a
user of the api. Instead of having every regulator exposed as it's own
compatible, I would now have it take a resource id as reg and just be
compatible with the specific resource consumer.

The difference with Josh's proposal is the mapping table in msm_rpm.c, that
makes the rpm driver expose logical resources and therefor hides the details of
the rpm communication from its clients. This gives, in my mind, a cleaner
abstraction and api.

Bjorn Andersson (2):
  mfd: msm_rpm: Initial driver for the Qualcomm RPM
  regulator: msm_rpm: Initial regulator driver for Qualcomm RPM

 drivers/mfd/Kconfig   |   7 +
 drivers/mfd/Makefile  |   1 +
 drivers/mfd/msm_rpm-8064.h| 420 +++
 drivers/mfd/msm_rpm-8960.h| 400 ++
 drivers/mfd/msm_rpm.c | 525 ++
 drivers/regulator/Kconfig |   7 +
 drivers/regulator/Makefile|   1 +
 drivers/regulator/msm_rpm-regulator.c | 467 ++
 include/linux/mfd/msm_rpm.h   |  87 ++
 9 files changed, 1915 insertions(+)
 create mode 100644 drivers/mfd/msm_rpm-8064.h
 create mode 100644 drivers/mfd/msm_rpm-8960.h
 create mode 100644 drivers/mfd/msm_rpm.c
 create mode 100644 drivers/regulator/msm_rpm-regulator.c
 create mode 100644 include/linux/mfd/msm_rpm.h

-- 
1.8.2.2

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Re: Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Russell King - ARM Linux
On Tue, Apr 22, 2014 at 01:55:16PM -0400, Nicolas Pitre wrote:
 We do not want people in general to have PLAT_PHYS_OFFSET defined and
 CONFIG_ARM_PATCH_PHYS_VIRT disabled.  In fact a huge effort has been 
 deployed to go the exact opposite way over the last few years.
 
 There are special cases where CONFIG_ARM_PATCH_PHYS_VIRT needs to be 
 turned off for example.  But those are specialized configurations and 
 they should be the exception not the norm.  And you should be knowing 
 what you're doing in those cases.
 
 So I doubt it is worth complexifying the linker script for something 
 that is meant to be the exception, _especially_ if this is for some 
 debugging environment purposes.  You may just adjust some setting in 
 your environment or do a quick kernel modification locally instead.  
 And if you don't know what to modify then you're probably lacking the 
 necessary qualifications to perform that kind of kernel debugging in the 
 first place.
 
 Making the patch available on a mailing list is fine.  If it is useful 
 to someone else then it'll be found.  But I don't think this is useful 
 upstream.

Also, let's not forget that it the ELF file can be modified after the
kernel build:

$ vmlinux=your-vmlinux-file
$ newlma=lma-for-your-platform
$ arm-linux-objcopy $(
  arm-linux-objdump -h ${vmlinux} |
  grep -B1 'LOAD' | \
  sed -nr 's/^[ 0-9]*[0-9] ([^ ]*).*/--change-section-lma \1+${newlma}/p') \
  ${vmlinux} ${vmlinux}-${newlma}

(It would be nice if objcopy could be told change any section with _this_
attribute.)

The nice thing about this is that you can keep ARM_PATCH_PHYS_VIRT enabled
and not have to change the code in any way - you just fix up the headers on
the ELF file.

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Re: [Qemu-devel] Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Russell King - ARM Linux
On Tue, Apr 22, 2014 at 08:32:10PM +0200, Arnd Bergmann wrote:
 @@ -1943,6 +1953,7 @@ config DEPRECATED_PARAM_STRUCT
  # TEXT and BSS so we preserve their values in the config files.
  config ZBOOT_ROM_TEXT
   hex Compressed ROM boot loader base address
 + depends on BROKEN_MULTIPLATFORM
   default 0
   help
 The physical address at which the ROM-able zImage is to be
 @@ -1954,6 +1965,7 @@ config ZBOOT_ROM_TEXT
  
  config ZBOOT_ROM_BSS
   hex Compressed ROM boot loader BSS address
 + depends on BROKEN_MULTIPLATFORM
   default 0
   help
 The base address of an area of read/write memory in the target

Please get rid of the above changes.

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Re: [Qemu-devel] Change of TEXT_OFFSET for multi_v7_defconfig

2014-04-22 Thread Arnd Bergmann
On Tuesday 22 April 2014 19:38:55 Russell King - ARM Linux wrote:
 On Tue, Apr 22, 2014 at 08:32:10PM +0200, Arnd Bergmann wrote:
  @@ -1943,6 +1953,7 @@ config DEPRECATED_PARAM_STRUCT
   # TEXT and BSS so we preserve their values in the config files.
   config ZBOOT_ROM_TEXT
hex Compressed ROM boot loader base address
  + depends on BROKEN_MULTIPLATFORM
default 0
help
  The physical address at which the ROM-able zImage is to be
  @@ -1954,6 +1965,7 @@ config ZBOOT_ROM_TEXT
   
   config ZBOOT_ROM_BSS
hex Compressed ROM boot loader BSS address
  + depends on BROKEN_MULTIPLATFORM
default 0
help
  The base address of an area of read/write memory in the target
 
 Please get rid of the above changes.

Good point, fixed now.

Arnd
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[PATCH 0/3] ARM mach Kconfig clean-ups

2014-04-22 Thread Rob Herring
From: Rob Herring r...@kernel.org

This is a follow-up to the multi-platform kconfig clean-ups I did for 
3.15. This is fixing new things which got introduced in 3.15. For 
example, the BCM2835 changes appear to have been lost with its move to 
mach-bcm.

Rob

Rob Herring (3):
  ARM: mvebu: clean-up unneeded kconfig selects
  ARM: bcm: clean-up unneeded kconfig selects
  ARM: qcom: clean-up unneeded kconfig selects

 arch/arm/mach-bcm/Kconfig   | 8 
 arch/arm/mach-mvebu/Kconfig | 6 --
 arch/arm/mach-qcom/Kconfig  | 2 --
 3 files changed, 16 deletions(-)

-- 
1.9.1

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[PATCH 3/3] ARM: qcom: clean-up unneeded kconfig selects

2014-04-22 Thread Rob Herring
From: Rob Herring r...@kernel.org

Multi-platform support implies all these options are already selected and
individual platforms don't need to select them.

Signed-off-by: Rob Herring r...@kernel.org
Cc: Kumar Gala ga...@codeaurora.org
Cc: David Brown dav...@codeaurora.org
Cc: linux-arm-msm@vger.kernel.org
---
 arch/arm/mach-qcom/Kconfig | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig
index a028be2..6aa2214 100644
--- a/arch/arm/mach-qcom/Kconfig
+++ b/arch/arm/mach-qcom/Kconfig
@@ -3,8 +3,6 @@ config ARCH_QCOM
select ARCH_REQUIRE_GPIOLIB
select ARM_GIC
select CLKSRC_OF
-   select GENERIC_CLOCKEVENTS
-   select HAVE_SMP
select QCOM_SCM if SMP
help
  Support for Qualcomm's devicetree based systems.
-- 
1.9.1

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[PATCH 1/2] mfd: pm8x41: add support for Qualcomm 8x41 PMICs

2014-04-22 Thread Courtney Cavin
From: Josh Cartwright jo...@codeaurora.org

The Qualcomm 8941 and 8841 PMICs are components used with the Snapdragon
800 series SoC family.  This driver exists largely as a glue mfd component,
it exists to be an owner of an SPMI regmap for children devices
described in device tree.

Signed-off-by: Josh Cartwright jo...@codeaurora.org
Signed-off-by: Courtney Cavin courtney.ca...@sonymobile.com
---
 drivers/mfd/Kconfig  | 13 +++
 drivers/mfd/Makefile |  1 +
 drivers/mfd/pm8x41.c | 63 
 3 files changed, 77 insertions(+)
 create mode 100644 drivers/mfd/pm8x41.c

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 3383412..f5ff799 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -502,6 +502,19 @@ config MFD_PM8921_CORE
  Say M here if you want to include support for PM8921 chip as a module.
  This will build a module called pm8921-core.
 
+config MFD_PM8X41
+   bool Qualcomm PM8x41 PMIC
+   depends on ARCH_QCOM
+   select REGMAP_SPMI
+   help
+ This enables basic support for the Qualcomm 8941 and 8841 PMICs.
+ These PMICs are currently used with the Snapdragon 800 series of
+ SoCs.  Note, that this will only be useful paired with descriptions
+ of the independent functions as children nodes in the device tree.
+
+ Say M here if you want to include support for the PM8x41 series as a
+ module.  The module will be called pm8x41.
+
 config MFD_RDC321X
tristate RDC R-321x southbridge
select MFD_CORE
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 2851275..f0df41d 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -151,6 +151,7 @@ obj-$(CONFIG_MFD_SI476X_CORE)   += si476x-core.o
 obj-$(CONFIG_MFD_CS5535)   += cs5535-mfd.o
 obj-$(CONFIG_MFD_OMAP_USB_HOST)+= omap-usb-host.o omap-usb-tll.o
 obj-$(CONFIG_MFD_PM8921_CORE)  += pm8921-core.o ssbi.o
+obj-$(CONFIG_MFD_PM8X41)   += pm8x41.o
 obj-$(CONFIG_TPS65911_COMPARATOR)  += tps65911-comparator.o
 obj-$(CONFIG_MFD_TPS65090) += tps65090.o
 obj-$(CONFIG_MFD_AAT2870_CORE) += aat2870-core.o
diff --git a/drivers/mfd/pm8x41.c b/drivers/mfd/pm8x41.c
new file mode 100644
index 000..c85e0d6
--- /dev/null
+++ b/drivers/mfd/pm8x41.c
@@ -0,0 +1,63 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include linux/kernel.h
+#include linux/module.h
+#include linux/spmi.h
+#include linux/regmap.h
+#include linux/of_platform.h
+
+static const struct regmap_config pm8x41_regmap_config = {
+   .reg_bits   = 16,
+   .val_bits   = 8,
+   .max_register   = 0x,
+};
+
+static int pm8x41_remove_child(struct device *dev, void *unused)
+{
+   platform_device_unregister(to_platform_device(dev));
+   return 0;
+}
+
+static void pm8x41_remove(struct spmi_device *sdev)
+{
+   device_for_each_child(sdev-dev, NULL, pm8x41_remove_child);
+}
+
+static int pm8x41_probe(struct spmi_device *sdev)
+{
+   struct regmap *regmap;
+
+   regmap = devm_regmap_init_spmi_ext(sdev, pm8x41_regmap_config);
+   if (IS_ERR(regmap)) {
+   dev_dbg(sdev-dev, regmap creation failed.\n);
+   return PTR_ERR(regmap);
+   }
+
+   return of_platform_populate(sdev-dev.of_node, NULL, NULL, sdev-dev);
+}
+
+static const struct of_device_id pm8x41_id_table[] = {
+   { .compatible = qcom,pm8841, },
+   { .compatible = qcom,pm8941, },
+   {},
+};
+MODULE_DEVICE_TABLE(of, pm8x41_id_table);
+
+static struct spmi_driver pm8x41_driver = {
+   .probe  = pm8x41_probe,
+   .remove = pm8x41_remove,
+   .driver = {
+   .name   = pm8x41,
+   .of_match_table = pm8x41_id_table,
+   },
+};
+module_spmi_driver(pm8x41_driver);
-- 
1.8.1.5

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[PATCH 2/2] mfd: pm8x41: document device tree bindings

2014-04-22 Thread Courtney Cavin
From: Josh Cartwright jo...@codeaurora.org

Document the bindings used to describe the Qualcomm 8x41 PMICs.

Signed-off-by: Josh Cartwright jo...@codeaurora.org
Signed-off-by: Courtney Cavin courtney.ca...@sonymobile.com
---
 Documentation/devicetree/bindings/mfd/pm8x41.txt | 34 
 1 file changed, 34 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/pm8x41.txt

diff --git a/Documentation/devicetree/bindings/mfd/pm8x41.txt 
b/Documentation/devicetree/bindings/mfd/pm8x41.txt
new file mode 100644
index 000..b865a4f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/pm8x41.txt
@@ -0,0 +1,34 @@
+Qualcomm PM8841 and PM8941 PMIC multi-function device bindings
+
+The PM8x41 PMICs are used with the Qualcomm Snapdragon 800 series SoCs, and are
+interfaced to the chip via the SPMI (System Power Management Interface) bus.
+Support for multiple independent functions are implemented by splitting the
+16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
+each.  A function can consume one or more of these fixed-size register regions.
+
+Required properties:
+- compatible: Must be one of:
+ qcom,pm8841
+ qcom,pm8941
+- reg: Specifies the SPMI USID slave address for this device;
+   See bindings/spmi/spmi.txt
+- #address-cells = 1
+- #size-cells = 0
+
+Each child node represents a function of the PM8x41.  Each child 'reg' entry
+describes an offset within the USID slave address where the region starts.
+
+Example:
+
+pm8941@0 {
+   compatible = qcom,pm8941;
+   reg = 0x0 SPMI_USID;
+
+   #address-cells = 1;
+   #size-cells = 0;
+
+   rtc@6000 {
+   compatible = ...;
+   reg = 0x6000 0x6100;
+   };
+};
-- 
1.8.1.5

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