Re: [PATCH v3] firmware: qcom: scm: Peripheral Authentication Service

2015-09-24 Thread Stephen Boyd
On 09/23, Bjorn Andersson wrote:
> +
> +int __qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t 
> size)

Maybe we should make addr and size u32s as well. Kumar requested
we take the same approach for other scm calls.

> +{
> + __le32 scm_ret;
> + int ret;
> + struct {
> + __le32 proc;
> + __le32 addr;
> + __le32 len;
> + } request;
> +

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[Patch v3 05/10] arm64: dts: Add PM8916 support on MSM8916

2015-09-24 Thread Andy Gross
This patch adds the PM8916 regulator nodes found on MSM8916 platforms.

Signed-off-by: Andy Gross 
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi |   28 
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 27d3e90..d2b07eb 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -444,6 +444,34 @@
rpm_requests {
compatible = "qcom,rpm-msm8916";
qcom,smd-channels = "rpm_requests";
+
+   pm8916-regulators {
+   compatible = 
"qcom,rpm-pm8916-regulators";
+
+   pm8916_s1: s1 {};
+   pm8916_s2: s2 {};
+   pm8916_s3: s3 {};
+   pm8916_s4: s4 {};
+
+   pm8916_l1: l1 {};
+   pm8916_l2: l2 {};
+   pm8916_l3: l3 {};
+   pm8916_l4: l4 {};
+   pm8916_l5: l5 {};
+   pm8916_l6: l6 {};
+   pm8916_l7: l7 {};
+   pm8916_l8: l8 {};
+   pm8916_l9: l9 {};
+   pm8916_l10: l10 {};
+   pm8916_l11: l11 {};
+   pm8916_l12: l12 {};
+   pm8916_l13: l13 {};
+   pm8916_l14: l14 {};
+   pm8916_l15: l15 {};
+   pm8916_l16: l16 {};
+   pm8916_l17: l17 {};
+   pm8916_l18: l18 {};
+   };
};
};
};
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Re: [PATCH v3] firmware: qcom: scm: Peripheral Authentication Service

2015-09-24 Thread Bjorn Andersson
On Thu 24 Sep 12:13 PDT 2015, Stephen Boyd wrote:

> On 09/23, Bjorn Andersson wrote:
> > +
> > +int __qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t 
> > size)
> 
> Maybe we should make addr and size u32s as well. Kumar requested
> we take the same approach for other scm calls.
> 

So you're saying that on arm64 we're always going to load firmware in
the lower 32 bits of memory?


Not sure what the benefit of doing this conversion higher up in the
layers are, but sure we could do it...

Regards,
Bjorn
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[Patch v3 06/10] regulators: qcom-smd: Add PM8916 support

2015-09-24 Thread Andy Gross
This patch adds support and documentation for the PM8916 regulators
found on MSM8916 platforms.

Acked-by: Bjorn Andersson 
Signed-off-by: Andy Gross 
---
 .../bindings/soc/qcom/qcom,smd-rpm-regulator.txt   |   18 ++
 drivers/regulator/qcom_smd-regulator.c |   64 
 2 files changed, 82 insertions(+)

diff --git 
a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt
index 7084474..e74ffe1 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt
@@ -17,6 +17,7 @@ Regulator nodes are identified by their compatible:
Value type: 
Definition: must be one of:
"qcom,rpm-pm8841-regulators"
+   "qcom,rpm-pm8916-regulators"
"qcom,rpm-pm8941-regulators"
 
 - vdd_s1-supply:
@@ -35,6 +36,19 @@ Regulator nodes are identified by their compatible:
 - vdd_s1-supply:
 - vdd_s2-supply:
 - vdd_s3-supply:
+- vdd_s4-supply:
+- vdd_l1_l2_l3-supply:
+- vdd_l4_l5_l6-supply:
+- vdd_l7-supply:
+- vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18-supply:
+   Usage: optional (pm8916 only)
+   Value type: 
+   Definition: reference to regulator supplying the input pin, as
+   described in the data sheet
+
+- vdd_s1-supply:
+- vdd_s2-supply:
+- vdd_s3-supply:
 - vdd_l1_l3-supply:
 - vdd_l2_lvs1_2_3-supply:
 - vdd_l4_l11-supply:
@@ -57,6 +71,10 @@ of the pmics below.
 pm8841:
s1, s2, s3, s4, s5, s6, s7, s8
 
+pm8916:
+   s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13,
+   l14, l15, l16, l17, l18
+
 pm8941:
s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13,
l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2,
diff --git a/drivers/regulator/qcom_smd-regulator.c 
b/drivers/regulator/qcom_smd-regulator.c
index 9c6167d..e9b07cc3 100644
--- a/drivers/regulator/qcom_smd-regulator.c
+++ b/drivers/regulator/qcom_smd-regulator.c
@@ -211,6 +211,43 @@ static const struct regulator_desc pm8941_switch = {
.ops = _switch_ops,
 };
 
+static const struct regulator_desc pm8916_pldo = {
+   .linear_ranges = (struct regulator_linear_range[]) {
+   REGULATOR_LINEAR_RANGE(75, 0, 208, 12500),
+   },
+   .n_linear_ranges = 1,
+   .n_voltages = 209,
+   .ops = _smps_ldo_ops,
+};
+
+static const struct regulator_desc pm8916_nldo = {
+   .linear_ranges = (struct regulator_linear_range[]) {
+   REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
+   },
+   .n_linear_ranges = 1,
+   .n_voltages = 94,
+   .ops = _smps_ldo_ops,
+};
+
+static const struct regulator_desc pm8916_buck_lvo_smps = {
+   .linear_ranges = (struct regulator_linear_range[]) {
+   REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
+   REGULATOR_LINEAR_RANGE(75, 96, 127, 25000),
+   },
+   .n_linear_ranges = 2,
+   .n_voltages = 128,
+   .ops = _smps_ldo_ops,
+};
+
+static const struct regulator_desc pm8916_buck_hvo_smps = {
+   .linear_ranges = (struct regulator_linear_range[]) {
+   REGULATOR_LINEAR_RANGE(155, 0, 31, 25000),
+   },
+   .n_linear_ranges = 1,
+   .n_voltages = 32,
+   .ops = _smps_ldo_ops,
+};
+
 struct rpm_regulator_data {
const char *name;
u32 type;
@@ -231,6 +268,32 @@ static const struct rpm_regulator_data 
rpm_pm8841_regulators[] = {
{}
 };
 
+static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
+   { "s1", QCOM_SMD_RPM_SMPA, 1, _buck_lvo_smps, "vdd_s1" },
+   { "s2", QCOM_SMD_RPM_SMPA, 2, _buck_lvo_smps, "vdd_s2" },
+   { "s3", QCOM_SMD_RPM_SMPA, 3, _buck_lvo_smps, "vdd_s3" },
+   { "s4", QCOM_SMD_RPM_SMPA, 4, _buck_hvo_smps, "vdd_s4" },
+   { "l1", QCOM_SMD_RPM_LDOA, 1, _nldo, "vdd_l1_l2_l3" },
+   { "l2", QCOM_SMD_RPM_LDOA, 2, _nldo, "vdd_l1_l2_l3" },
+   { "l3", QCOM_SMD_RPM_LDOA, 3, _nldo, "vdd_l1_l2_l3" },
+   { "l4", QCOM_SMD_RPM_LDOA, 4, _pldo, "vdd_l4_l5_l6" },
+   { "l5", QCOM_SMD_RPM_LDOA, 5, _pldo, "vdd_l4_l5_l6" },
+   { "l6", QCOM_SMD_RPM_LDOA, 6, _pldo, "vdd_l4_l5_l6" },
+   { "l7", QCOM_SMD_RPM_LDOA, 7, _pldo, "vdd_l7" },
+   { "l8", QCOM_SMD_RPM_LDOA, 8, _pldo, 
"vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
+   { "l9", QCOM_SMD_RPM_LDOA, 9, _pldo, 
"vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
+   { "l10", QCOM_SMD_RPM_LDOA, 10, _pldo, 
"vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
+   { "l11", QCOM_SMD_RPM_LDOA, 11, _pldo, 
"vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
+   { "l12", QCOM_SMD_RPM_LDOA, 12, _pldo, 
"vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
+   { "l13", QCOM_SMD_RPM_LDOA, 13, _pldo, 

[Patch v3 10/10] regulator: qcom-smd: Add support for PMA8084

2015-09-24 Thread Andy Gross
This patch adds support and documentation for the PMA8084 regulators
found on APQ8084 platforms.

Signed-off-by: Andy Gross 
---
 .../bindings/soc/qcom/qcom,smd-rpm-regulator.txt   |   35 
 drivers/regulator/qcom_smd-regulator.c |   95 
 2 files changed, 130 insertions(+)

diff --git 
a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt
index e74ffe1..22b3506 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt
@@ -19,6 +19,7 @@ Regulator nodes are identified by their compatible:
"qcom,rpm-pm8841-regulators"
"qcom,rpm-pm8916-regulators"
"qcom,rpm-pm8941-regulators"
+   "qcom,rpm-pma8084-regulators"
 
 - vdd_s1-supply:
 - vdd_s2-supply:
@@ -64,6 +65,35 @@ Regulator nodes are identified by their compatible:
Definition: reference to regulator supplying the input pin, as
described in the data sheet
 
+- vdd_s1-supply:
+- vdd_s2-supply:
+- vdd_s3-supply:
+- vdd_s4-supply:
+- vdd_s5-supply:
+- vdd_s6-supply:
+- vdd_s7-supply:
+- vdd_s8-supply:
+- vdd_s9-supply:
+- vdd_s10-supply:
+- vdd_s11-supply:
+- vdd_s12-supply:
+- vdd_l1_l11-supply:
+- vdd_l2_l3_l4_l27-supply:
+- vdd_l5_l7-supply:
+- vdd_l6_l12_l14_l15_l26-supply:
+- vdd_l8-supply:
+- vdd_l9_l10_l13_l20_l23_l24-supply:
+- vdd_l16_l25-supply:
+- vdd_l17-supply:
+- vdd_l18-supply:
+- vdd_l19-supply:
+- vdd_l21-supply:
+- vdd_l22-supply:
+   Usage: optional (pma8084 only)
+   Value type: 
+   Definition: reference to regulator supplying the input pin, as
+   described in the data sheet
+
 The regulator node houses sub-nodes for each regulator within the device. Each
 sub-node is identified using the node's name, with valid values listed for each
 of the pmics below.
@@ -80,6 +110,11 @@ pm8941:
l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2,
lvs3, 5vs1, 5vs2
 
+pma8084:
+   s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, l4, l5,
+   l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20,
+   l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1
+
 The content of each sub-node is defined by the standard binding for regulators 
-
 see regulator.txt.
 
diff --git a/drivers/regulator/qcom_smd-regulator.c 
b/drivers/regulator/qcom_smd-regulator.c
index e9b07cc3..24f4be7 100644
--- a/drivers/regulator/qcom_smd-regulator.c
+++ b/drivers/regulator/qcom_smd-regulator.c
@@ -153,6 +153,49 @@ static const struct regulator_ops rpm_switch_ops = {
.is_enabled = rpm_reg_is_enabled,
 };
 
+static const struct regulator_desc pma8084_hfsmps = {
+   .linear_ranges = (struct regulator_linear_range[]) {
+   REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
+   REGULATOR_LINEAR_RANGE(155, 96, 158, 25000),
+   },
+   .n_linear_ranges = 2,
+   .n_voltages = 159,
+   .ops = _smps_ldo_ops,
+};
+
+static const struct regulator_desc pma8084_ftsmps = {
+   .linear_ranges = (struct regulator_linear_range[]) {
+   REGULATOR_LINEAR_RANGE(35,  0, 184, 5000),
+   REGULATOR_LINEAR_RANGE(70, 185, 339, 1),
+   },
+   .n_linear_ranges = 2,
+   .n_voltages = 340,
+   .ops = _smps_ldo_ops,
+};
+
+static const struct regulator_desc pma8084_pldo = {
+   .linear_ranges = (struct regulator_linear_range[]) {
+   REGULATOR_LINEAR_RANGE(75,  0,  30, 25000),
+   REGULATOR_LINEAR_RANGE(150, 31, 99, 5),
+   },
+   .n_linear_ranges = 2,
+   .n_voltages = 100,
+   .ops = _smps_ldo_ops,
+};
+
+static const struct regulator_desc pma8084_nldo = {
+   .linear_ranges = (struct regulator_linear_range[]) {
+   REGULATOR_LINEAR_RANGE(75, 0, 63, 12500),
+   },
+   .n_linear_ranges = 1,
+   .n_voltages = 64,
+   .ops = _smps_ldo_ops,
+};
+
+static const struct regulator_desc pma8084_switch = {
+   .ops = _switch_ops,
+};
+
 static const struct regulator_desc pm8x41_hfsmps = {
.linear_ranges = (struct regulator_linear_range[]) {
REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
@@ -335,10 +378,62 @@ static const struct rpm_regulator_data 
rpm_pm8941_regulators[] = {
{}
 };
 
+static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
+   { "s1", QCOM_SMD_RPM_SMPA, 1, _ftsmps, "vdd_s1" },
+   { "s2", QCOM_SMD_RPM_SMPA, 2, _ftsmps, "vdd_s2" },
+   { "s3", QCOM_SMD_RPM_SMPA, 3, _hfsmps, "vdd_s3" },
+   { "s4", QCOM_SMD_RPM_SMPA, 4, _hfsmps, "vdd_s4" },
+   { "s5", QCOM_SMD_RPM_SMPA, 5, _hfsmps, "vdd_s5" },
+   { "s6", QCOM_SMD_RPM_SMPA, 6, _ftsmps, "vdd_s6" },
+   { "s7", 

[Patch v3 01/10] soc: qcom: documentation: Update SMD/RPM Docs

2015-09-24 Thread Andy Gross
This patch moves the qcom,smd-rpm.txt to the correct location and splits
out the smd and rpm documentation.  In addition, a smd-rpm-regulator
document is added.

Signed-off-by: Andy Gross 
---
 .../qcom,smd-rpm-regulator.txt}|   30 +++
 .../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt  |   57 
 2 files changed, 65 insertions(+), 22 deletions(-)
 rename Documentation/devicetree/bindings/soc/{qcom,smd-rpm.txt => 
qcom/qcom,smd-rpm-regulator.txt} (75%)
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt

diff --git a/Documentation/devicetree/bindings/soc/qcom,smd-rpm.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt
similarity index 75%
rename from Documentation/devicetree/bindings/soc/qcom,smd-rpm.txt
rename to Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt
index e27f5c4..7084474 100644
--- a/Documentation/devicetree/bindings/soc/qcom,smd-rpm.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm-regulator.txt
@@ -1,27 +1,14 @@
-Qualcomm Resource Power Manager (RPM) over SMD
+QCOM SMD RPM REGULATOR
 
-This driver is used to interface with the Resource Power Manager (RPM) found in
-various Qualcomm platforms. The RPM allows each component in the system to vote
-for state of the system resources, such as clocks, regulators and bus
-frequencies.
+The Qualcomm RPM over SMD regulator is modelled as a subdevice of the RPM.
+Because SMD is used as the communication transport mechanism, the RPM resides 
as
+a subnode of the SMD.  As such, the SMD-RPM regulator requires that the SMD and
+RPM nodes be present.
 
-- compatible:
-   Usage: required
-   Value type: 
-   Definition: must be one of:
-   "qcom,rpm-msm8974"
+Please refer to the qcom,smd.txt for information pertaining to the SMD node.
+Please refer to the qcom,smd-rpm.txt for information regarding the RPM node.
 
-- qcom,smd-channels:
-   Usage: required
-   Value type: 
-   Definition: Shared Memory channel used for communication with the RPM
-
-= SUBDEVICES
-
-The RPM exposes resources to its subnodes. The below bindings specify the set
-of valid subnodes that can operate on these resources.
-
-== Regulators
+== Regulator
 
 Regulator nodes are identified by their compatible:
 
@@ -114,4 +101,3 @@ see regulator.txt.
};
};
};
-
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
new file mode 100644
index 000..003bedd
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
@@ -0,0 +1,57 @@
+Qualcomm Resource Power Manager (RPM) over SMD
+
+This driver is used to interface with the Resource Power Manager (RPM) found in
+various Qualcomm platforms. The RPM allows each component in the system to vote
+for state of the system resources, such as clocks, regulators and bus
+frequencies.
+
+The SMD information for the RPM edge should be filled out.  See qcom,smd.txt 
for
+the required edge properties.  All SMD related properties will reside within 
the
+RPM node itself.
+
+= SUBDEVICES
+
+The RPM exposes resources to its subnodes.  The rpm_requests node must be
+present and this subnode may contain children that designate regulator
+resources.
+
+- compatible:
+   Usage: required
+   Value type: 
+   Definition: must be one of:
+   "qcom,rpm-msm8974"
+
+- qcom,smd-channels:
+   Usage: required
+   Value type: 
+   Definition: must be "rpm_requests"
+
+Please refer to qcom,smd-rpm-regulator.txt for information on the regulator
+subnodes that can exist under the rpm_requests.
+
+Example:
+
+   soc {
+   apcs: syscon@f9011000 {
+   compatible = "syscon";
+   reg = <0xf9011000 0x1000>;
+   };
+   };
+
+   smd {
+   compatible = "qcom,smd";
+
+   rpm {
+   interrupts = <0 168 1>;
+   qcom,ipc = < 8 0>;
+   qcom,smd-edge = <15>;
+
+   rpm_requests {
+   compatible = "qcom,rpm-msm8974";
+   qcom,smd-channels = "rpm_requests";
+
+   ...
+   };
+   };
+   };
+
-- 
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[Patch v3 02/10] soc: qcom: smd-rpm: Add existing platform support

2015-09-24 Thread Andy Gross
This patch adds support for all current Qualcomm platforms which utilize
RPM over SMD.  This includes both MSM8916 and APQ8084.

Reviewed-by: Bjorn Andersson 
Signed-off-by: Andy Gross 
---
 .../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt  |2 ++
 drivers/soc/qcom/smd-rpm.c |2 ++
 2 files changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
index 003bedd..18d4d04 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt
@@ -19,6 +19,8 @@ resources.
Usage: required
Value type: 
Definition: must be one of:
+   "qcom,rpm-apq8084"
+   "qcom,rpm-msm8916"
"qcom,rpm-msm8974"
 
 - qcom,smd-channels:
diff --git a/drivers/soc/qcom/smd-rpm.c b/drivers/soc/qcom/smd-rpm.c
index 1392ccf..e8450f3 100644
--- a/drivers/soc/qcom/smd-rpm.c
+++ b/drivers/soc/qcom/smd-rpm.c
@@ -211,6 +211,8 @@ static void qcom_smd_rpm_remove(struct qcom_smd_device 
*sdev)
 }
 
 static const struct of_device_id qcom_smd_rpm_of_match[] = {
+   { .compatible = "qcom,rpm-apq8084" },
+   { .compatible = "qcom,rpm-msm8916" },
{ .compatible = "qcom,rpm-msm8974" },
{}
 };
-- 
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[Patch v3 03/10] arm64: dts: qcom: Add MSM8916 SMEM nodes

2015-09-24 Thread Andy Gross
This patch adds the nodes necessary to support the SMEM driver on MSM8916
platforms.

Signed-off-by: Andy Gross 
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi |   36 +
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 5911de0..d321266 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -37,6 +37,22 @@
reg = <0 0 0 0>;
};
 
+   reserved-memory {
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+
+   reserve_aligned@8600 {
+   reg = <0x0 0x8600 0x0 0x030>;
+   no-map;
+   };
+
+   smem_mem: smem_region@8630 {
+   reg = <0x0 0x8630 0x0 0x010>;
+   no-map;
+   };
+   };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -102,6 +118,26 @@
reg = <0x180 0x8>;
};
 
+   tcsr_mutex_regs: syscon@1905000 {
+   compatible = "syscon";
+   reg = <0x1905000 0x2>;
+   };
+
+   tcsr_mutex: hwlock {
+   compatible = "qcom,tcsr-mutex";
+   syscon = <_mutex_regs 0 0x1000>;
+   #hwlock-cells = <1>;
+   };
+
+   smem {
+   compatible = "qcom,smem";
+   reg = <0x6 0x8000>;
+   reg-names = "aux-mem1";
+
+   memory-region = <_mem>;
+   hwlocks = <_mutex 3>;
+   };
+
blsp1_uart2: serial@78b {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78b 0x200>;
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[Patch v3 00/10] Add RPM/SMD Support for QCOM platforms

2015-09-24 Thread Andy Gross
This patch set cleans up the documentation that is currently in place for the
SMD, SMD-RPM, and SMD-RPM regulators.  In addition, this patch set adds support
for the PM8916 found on MSM8916 platforms and the PMA8084 found on APQ8084
platforms.

  
All of the relevant DTS information is fleshed out for the regulators and their
dependencies for all of the platforms which support SMD-RPM regulators.

Changes since v2:
  - Fixed some missed review comments
  - Corrected the SMD RPM example binding indentation

Changes since v1:
  - Fixed various review comments
  - Removed MSM8974 patches as there was already an outstanding patch

Andy Gross (10):
  soc: qcom: documentation: Update SMD/RPM Docs
  soc: qcom: smd-rpm: Add existing platform support
  arm64: dts: qcom: Add MSM8916 SMEM nodes
  arm64: dts: qcom: Add RPM/SMD support on MSM8916
  arm64: dts: Add PM8916 support on MSM8916
  regulators: qcom-smd: Add PM8916 support
  arm: dts: Add APQ8084 SMEM nodes
  arm: dts: Add RPM/SMD support on APQ8084
  arm: dts: Add support for PMA8084 on APQ8084
  regulator: qcom-smd: Add support for PMA8084

 .../qcom,smd-rpm-regulator.txt}|   83 +++---
 .../devicetree/bindings/soc/qcom/qcom,smd-rpm.txt  |   59 
 arch/arm/boot/dts/qcom-apq8084.dtsi|  103 +
 arch/arm64/boot/dts/qcom/msm8916.dtsi  |   84 +++
 drivers/regulator/qcom_smd-regulator.c |  159 
 drivers/soc/qcom/smd-rpm.c |2 +
 6 files changed, 468 insertions(+), 22 deletions(-)
 rename Documentation/devicetree/bindings/soc/{qcom,smd-rpm.txt => 
qcom/qcom,smd-rpm-regulator.txt} (54%)
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.txt

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[Patch v3 09/10] arm: dts: Add support for PMA8084 on APQ8084

2015-09-24 Thread Andy Gross
This patch adds support for the PMA8084 regulators found on APQ8084
platforms.

Signed-off-by: Andy Gross 
---
 arch/arm/boot/dts/qcom-apq8084.dtsi |   52 +++
 1 file changed, 52 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi 
b/arch/arm/boot/dts/qcom-apq8084.dtsi
index d1c76e58..05553d5 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -329,6 +329,58 @@
rpm_requests {
compatible = "qcom,rpm-apq8084";
qcom,smd-channels = "rpm_requests";
+
+   pma8084-regulators {
+   compatible = 
"qcom,rpm-pma8084-regulators";
+
+   pma8084_s1: s1 {};
+   pma8084_s2: s2 {};
+   pma8084_s3: s3 {};
+   pma8084_s4: s4 {};
+   pma8084_s5: s5 {};
+   pma8084_s6: s6 {};
+   pma8084_s7: s7 {};
+   pma8084_s8: s8 {};
+   pma8084_s9: s9 {};
+   pma8084_s10: s10 {};
+   pma8084_s11: s11 {};
+   pma8084_s12: s12 {};
+
+   pma8084_l1: l1 {};
+   pma8084_l2: l2 {};
+   pma8084_l3: l3 {};
+   pma8084_l4: l4 {};
+   pma8084_l5: l5 {};
+   pma8084_l6: l6 {};
+   pma8084_l7: l7 {};
+   pma8084_l8: l8 {};
+   pma8084_l9: l9 {};
+   pma8084_l10: l10 {};
+   pma8084_l11: l11 {};
+   pma8084_l12: l12 {};
+   pma8084_l13: l13 {};
+   pma8084_l14: l14 {};
+   pma8084_l15: l15 {};
+   pma8084_l16: l16 {};
+   pma8084_l17: l17 {};
+   pma8084_l18: l18 {};
+   pma8084_l19: l19 {};
+   pma8084_l20: l20 {};
+   pma8084_l21: l21 {};
+   pma8084_l22: l22 {};
+   pma8084_l23: l23 {};
+   pma8084_l24: l24 {};
+   pma8084_l25: l25 {};
+   pma8084_l26: l26 {};
+   pma8084_l27: l27 {};
+
+   pma8084_lvs1: lvs1 {};
+   pma8084_lvs2: lvs2 {};
+   pma8084_lvs3: lvs3 {};
+   pma8084_lvs4: lvs4 {};
+
+   pma8084_5vs1: 5vs1 {};
+   };
};
};
};
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[Patch v3 04/10] arm64: dts: qcom: Add RPM/SMD support on MSM8916

2015-09-24 Thread Andy Gross
Add support for the SMD and RPM devices found on MSM8916 platforms.

Signed-off-by: Andy Gross 
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi |   20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index d321266..27d3e90 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -138,6 +138,11 @@
hwlocks = <_mutex 3>;
};
 
+   apcs: syscon@b011000 {
+   compatible = "syscon";
+   reg = <0x0b011000 0x1000>;
+   };
+
blsp1_uart2: serial@78b {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78b 0x200>;
@@ -427,6 +432,21 @@
#interrupt-cells = <4>;
};
};
+
+   smd {
+   compatible = "qcom,smd";
+
+   rpm {
+   interrupts = ;
+   qcom,ipc = < 8 0>;
+   qcom,smd-edge = <15>;
+
+   rpm_requests {
+   compatible = "qcom,rpm-msm8916";
+   qcom,smd-channels = "rpm_requests";
+   };
+   };
+   };
 };
 
 #include "msm8916-pins.dtsi"
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Re: [PATCH 0/7] tty: serial: msm: Add DMA support and fix bit definitions

2015-09-24 Thread Srinivas Kandagatla


Hi Ivan,
On 12/09/15 14:02, Ivan T. Ivanov wrote:

Hi,

Following patches add DMA support for UARTDM type of hardware.

Changes have been tested on UARTDM v1.3(APQ8064) and v1.4(APQ8016).

Patches from Gurav were published long ago here[1], I just addressed
remaining comments and coding style issues.

Any comments are welcome.

Looks like Magic Sysrq is broken with this patches.

--srini


Regards,
Ivan

Ivan T. Ivanov (5):
   tty: serial: msm: Fix command Stale Event Enable definition
   tty: serial: msm: Add msm prefix to all driver functions
   tty: serial: msm: Add TX DMA support
   tty: serial: msm: Add RX DMA support
   tty: serial: msm: Remove 115.2 Kbps maximum baud rate limitation

Pramod Gurav (2):
   tty: serial: msm: Add mask value for UART_DM registers
   tty: serial: msm: replaces (1 << x) with BIT(x) macro

[1] http://www.spinics.net/lists/linux-serial/msg16874.html


  .../devicetree/bindings/serial/qcom,msm-uartdm.txt |   6 +
  drivers/tty/serial/msm_serial.c| 616 +++--
  drivers/tty/serial/msm_serial.h|  55 +-
  3 files changed, 604 insertions(+), 73 deletions(-)

--
1.9.1

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Re: [GIT PULL] qcom fixes for 4.3-rc1 *RESEND*

2015-09-24 Thread Olof Johansson
On Wed, Sep 23, 2015 at 12:20:05PM -0500, Andy Gross wrote:
> The following changes since commit 6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f:
> 
>   Linux 4.3-rc1 (2015-09-12 16:35:56 -0700)
> 
> are available in the git repository at:
> 
>   g...@git.codeaurora.org:quic/kernel/agross-msm.git 
> tags/qcom-fixes-for-4.3-rc1
> 
> for you to fetch changes up to 50b956f3d85cdea130866f33613416431d60f396:
> 
>   firmware: qcom: scm: Add function stubs for ARM64 (2015-09-23 12:00:43 
> -0500)

Merged, thanks!


-Olof

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[PATCH v2 5/5] soc: qcom: smp2p: Qualcomm Shared Memory Point to Point

2015-09-24 Thread Bjorn Andersson
Introduce the Qualcomm Shard Memory Point to Point driver.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- Use the newly created smem state helper instead of gpiolib

 drivers/soc/qcom/Kconfig  |   8 +
 drivers/soc/qcom/Makefile |   1 +
 drivers/soc/qcom/smp2p.c  | 578 ++
 3 files changed, 587 insertions(+)
 create mode 100644 drivers/soc/qcom/smp2p.c

diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index 015baf47874c..7fc0d08c6f14 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -52,6 +52,14 @@ config QCOM_SMD_RPM
 config QCOM_SMEM_STATE
bool
 
+config QCOM_SMP2P
+   bool "Qualcomm Shared Memory Point to Point support"
+   depends on QCOM_SMEM
+   select QCOM_SMEM_STATE
+   help
+ Say yes here to support the Qualcomm Shared Memory Point to Point
+ protocol.
+
 config QCOM_SMSM
bool "Qualcomm Shared Memory State Machine"
depends on QCOM_SMEM
diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
index 452c505dafe4..69886e0f7ef8 100644
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -4,4 +4,5 @@ obj-$(CONFIG_QCOM_SMD) +=   smd.o
 obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o
 obj-$(CONFIG_QCOM_SMEM) += smem.o
 obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o
+obj-$(CONFIG_QCOM_SMP2P)   += smp2p.o
 obj-$(CONFIG_QCOM_SMSM)+= smsm.o
diff --git a/drivers/soc/qcom/smp2p.c b/drivers/soc/qcom/smp2p.c
new file mode 100644
index ..f1eed7f9dd67
--- /dev/null
+++ b/drivers/soc/qcom/smp2p.c
@@ -0,0 +1,578 @@
+/*
+ * Copyright (c) 2015, Sony Mobile Communications AB.
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * The Shared Memory Point to Point (SMP2P) protocol facilitates communication
+ * of a single 32-bit value between two processors.  Each value has a single
+ * writer (the local side) and a single reader (the remote side). Values are
+ * uniquely identified in the system by the directed edge (local processor ID
+ * to remote processor ID) and a string identifier.
+ *
+ * Each processor is responsible for creating the outgoing SMEM items and each
+ * item is writable by the local processor and readable by the remote
+ * processor.  By using two separate SMEM items that are single-reader and
+ * single-writer, SMP2P does not require any remote locking mechanisms.
+ *
+ * The driver uses the Linux GPIO and interrupt framework to expose a virtual
+ * GPIO for each outbound entry and a virtual interrupt controller for each
+ * inbound entry.
+ */
+
+#define SMP2P_MAX_ENTRY 16
+#define SMP2P_MAX_ENTRY_NAME 16
+
+#define SMP2P_FEATURE_SSR_ACK 0x1
+
+#define SMP2P_MAGIC 0x504d5324
+
+/**
+ * struct smp2p_smem_item - in memory communication structure
+ * @magic: magic number
+ * @version:   version - must be 1
+ * @features:  features flag - currently unused
+ * @local_pid: processor id of sending end
+ * @remote_pid:processor id of receiving end
+ * @total_entries: number of entries - always SMP2P_MAX_ENTRY
+ * @valid_entries: number of allocated entries
+ * @flags:
+ * @entries:   individual communication entries
+ * @name:  name of the entry
+ * @value: content of the entry
+ */
+struct smp2p_smem_item {
+   u32 magic;
+   u8 version;
+   unsigned features:24;
+   u16 local_pid;
+   u16 remote_pid;
+   u16 total_entries;
+   u16 valid_entries;
+   u32 flags;
+
+   struct {
+   u8 name[SMP2P_MAX_ENTRY_NAME];
+   u32 value;
+   } entries[SMP2P_MAX_ENTRY];
+} __packed;
+
+/**
+ * struct smp2p_entry - driver context matching one entry
+ * @node:  list entry to keep track of allocated entries
+ * @smp2p: reference to the device driver context
+ * @name:  name of the entry, to match against smp2p_smem_item
+ * @value: pointer to smp2p_smem_item entry value
+ * @last_value:last handled value
+ * @domain:irq_domain for inbound entries
+ * @irq_enabled:bitmap to track enabled irq bits
+ * @irq_rising:bitmap to mark irq bits for rising detection
+ * @irq_falling:bitmap to mark irq bits for falling detection
+ * @state: smem state handle
+ * @lock:  spinlock 

[PATCH v2 3/5] soc: qcom: Introduce common SMEM state machine code

2015-09-24 Thread Bjorn Andersson
This implements a common API for handling and exposing SMP2P and SMSM
state information.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- Introduced this file with stuff we previously got free from gpiolib

 drivers/soc/qcom/Kconfig|   3 +
 drivers/soc/qcom/Makefile   |   1 +
 drivers/soc/qcom/smem_state.c   | 201 
 include/linux/soc/qcom/smem_state.h |  18 
 4 files changed, 223 insertions(+)
 create mode 100644 drivers/soc/qcom/smem_state.c
 create mode 100644 include/linux/soc/qcom/smem_state.h

diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index 3e4d2133c3d2..68b261677046 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -48,3 +48,6 @@ config QCOM_SMD_RPM
 
  Say M here if you want to include support for the Qualcomm RPM as a
  module. This will build a module called "qcom-smd-rpm".
+
+config QCOM_SMEM_STATE
+   bool
diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
index 10a93d168e0e..d756033a4630 100644
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_QCOM_PM)   +=  spm.o
 obj-$(CONFIG_QCOM_SMD) +=  smd.o
 obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o
 obj-$(CONFIG_QCOM_SMEM) += smem.o
+obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o
diff --git a/drivers/soc/qcom/smem_state.c b/drivers/soc/qcom/smem_state.c
new file mode 100644
index ..54261decb369
--- /dev/null
+++ b/drivers/soc/qcom/smem_state.c
@@ -0,0 +1,201 @@
+/*
+ * Copyright (c) 2015, Sony Mobile Communications Inc.
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static LIST_HEAD(smem_states);
+static DEFINE_MUTEX(list_lock);
+
+/**
+ * struct qcom_smem_state - state context
+ * @refcount:  refcount for the state
+ * @orphan:boolean indicator that this state has been unregistered
+ * @list:  entry in smem_states list
+ * @of_node:   of_node to use for matching the state in DT
+ * @priv:  implementation private data
+ * @ops:   ops for the state
+ */
+struct qcom_smem_state {
+   struct kref refcount;
+   bool orphan;
+
+   struct list_head list;
+   struct device_node *of_node;
+
+   void *priv;
+
+   struct qcom_smem_state_ops ops;
+};
+
+/**
+ * qcom_smem_state_update_bits() - update the masked bits in state with value
+ * @state: state handle acquired by calling qcom_smem_state_get()
+ * @mask:  bit mask for the change
+ * @value: new value for the masked bits
+ *
+ * Returns 0 on success, otherwise negative errno.
+ */
+int qcom_smem_state_update_bits(struct qcom_smem_state *state,
+   u32 mask,
+   u32 value)
+{
+   if (state->orphan)
+   return -ENXIO;
+
+   if (!state->ops.update_bits)
+   return -ENOTSUPP;
+
+   return state->ops.update_bits(state->priv, mask, value);
+}
+EXPORT_SYMBOL_GPL(qcom_smem_state_update_bits);
+
+static struct qcom_smem_state *of_node_to_state(struct device_node *np)
+{
+   struct qcom_smem_state *state;
+
+   mutex_lock(_lock);
+
+   list_for_each_entry(state, _states, list) {
+   if (state->of_node == np) {
+   kref_get(>refcount);
+   goto unlock;
+   }
+   }
+   state = ERR_PTR(-EPROBE_DEFER);
+
+unlock:
+   mutex_unlock(_lock);
+
+   return state;
+}
+
+/**
+ * qcom_smem_state_get() - acquire handle to a state
+ * @dev:   client device pointer
+ * @con_id:name of the state to lookup
+ * @bit:   flags from the state reference, indicating which bit's affected
+ *
+ * Returns handle to the state, or ERR_PTR(). qcom_smem_state_put() must be
+ * called to release the returned state handle.
+ */
+struct qcom_smem_state *qcom_smem_state_get(struct device *dev,
+   const char *con_id,
+   unsigned *bit)
+{
+   struct qcom_smem_state *state;
+   struct of_phandle_args args;
+   int index = 0;
+   int ret;
+
+   if (con_id) {
+   index = of_property_match_string(dev->of_node,
+"qcom,state-names",
+con_id);
+   if (index < 0) {
+   

[PATCH v2 0/5] Qualcomm Shared Memory State Machines

2015-09-24 Thread Bjorn Andersson
This series implements the two different mechanisms for propagating single bit
state information, used on the various Qualcomm platforms.

The system was traditionally used by the modem and application processor to
convey information about boot progress, power states, error handling and so on.
This was implemented as SMSM, with status bits representing a single local
state.

As the complexity of the SoC grew the state bits array grew and the need for
targeting specific state information at specific remote processors appeared.
SMP2P solves this by having separate shared memory regions per processor-pair.

This state information is e.g. used to convey progress and status of remote
firmware loading. Individual bits maps to various stages of the boot and error
states.

Changed since v1:
- The series moved away from representing outgoing bits as gpios

Bjorn Andersson (5):
  dt-binding: soc: qcom: Add Qualcomm SMSM device tree documentation
  dt-binding: soc: qcom: Introduce qcom,smp2p binding documentation
  soc: qcom: Introduce common SMEM state machine code
  soc: qcom: smsm: Add driver for Qualcomm SMSM
  soc: qcom: smp2p: Qualcomm Shared Memory Point to Point

 .../devicetree/bindings/soc/qcom/qcom,smp2p.txt| 104 
 .../devicetree/bindings/soc/qcom/qcom,smsm.txt | 104 
 drivers/soc/qcom/Kconfig   |  19 +
 drivers/soc/qcom/Makefile  |   3 +
 drivers/soc/qcom/smem_state.c  | 201 +++
 drivers/soc/qcom/smp2p.c   | 578 +++
 drivers/soc/qcom/smsm.c| 625 +
 include/linux/soc/qcom/smem_state.h|  18 +
 8 files changed, 1652 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
 create mode 100644 drivers/soc/qcom/smem_state.c
 create mode 100644 drivers/soc/qcom/smp2p.c
 create mode 100644 drivers/soc/qcom/smsm.c
 create mode 100644 include/linux/soc/qcom/smem_state.h

-- 
1.8.2.2

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Re: [Patch v3 01/10] soc: qcom: documentation: Update SMD/RPM Docs

2015-09-24 Thread Bjorn Andersson
On Thu 24 Sep 12:18 PDT 2015, Andy Gross wrote:

> This patch moves the qcom,smd-rpm.txt to the correct location and splits
> out the smd and rpm documentation.  In addition, a smd-rpm-regulator
> document is added.
> 

Acked-by: Bjorn Andersson 

Regards,
Bjorn
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[PATCH v2 4/5] soc: qcom: smsm: Add driver for Qualcomm SMSM

2015-09-24 Thread Bjorn Andersson
This driver exposed the Qualcomm Shared Memory State Machine bits.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- Use the newly created smem state helper instead of gpiolib

 drivers/soc/qcom/Kconfig  |   8 +
 drivers/soc/qcom/Makefile |   1 +
 drivers/soc/qcom/smsm.c   | 625 ++
 3 files changed, 634 insertions(+)
 create mode 100644 drivers/soc/qcom/smsm.c

diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index 68b261677046..015baf47874c 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -51,3 +51,11 @@ config QCOM_SMD_RPM
 
 config QCOM_SMEM_STATE
bool
+
+config QCOM_SMSM
+   bool "Qualcomm Shared Memory State Machine"
+   depends on QCOM_SMEM
+   select QCOM_SMEM_STATE
+   help
+ Say yes here to support the Qualcomm Shared Memory State Machine.
+ The state machine is represented by bits in shared memory.
diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
index d756033a4630..452c505dafe4 100644
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_QCOM_SMD) +=   smd.o
 obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o
 obj-$(CONFIG_QCOM_SMEM) += smem.o
 obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o
+obj-$(CONFIG_QCOM_SMSM)+= smsm.o
diff --git a/drivers/soc/qcom/smsm.c b/drivers/soc/qcom/smsm.c
new file mode 100644
index ..6b777af1bc19
--- /dev/null
+++ b/drivers/soc/qcom/smsm.c
@@ -0,0 +1,625 @@
+/*
+ * Copyright (c) 2015, Sony Mobile Communications Inc.
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * This driver implements the Qualcomm Shared Memory State Machine, a mechanism
+ * for communicating single bit state information to remote processors.
+ *
+ * The implementation is based on two sections of shared memory; the first
+ * holding the state bits and the second holding a matrix of subscription bits.
+ *
+ * The state bits are structured in entries of 32 bits, each belonging to one
+ * system in the SoC. The entry belonging to the local system is considered
+ * read-write, while the rest should be considered read-only.
+ *
+ * The subscription matrix consists of N bitmaps per entry, denoting interest
+ * in updates of the entry for each of the N hosts. Upon updating a state bit
+ * each host's subscription bitmap should be queried and the remote system
+ * should be interrupted if they request so.
+ *
+ * The subscription matrix is laid out in entry-major order:
+ * entry0: [host0 ... hostN]
+ * .
+ * .
+ * entryM: [host0 ... hostN]
+ *
+ * A third, optional, shared memory region might contain information regarding
+ * the number of entries in the state bitmap as well as number of columns in
+ * the subscription matrix.
+ */
+
+/*
+ * Shared memory identifiers, used to acquire handles to respective memory
+ * region.
+ */
+#define SMEM_SMSM_SHARED_STATE 85
+#define SMEM_SMSM_CPU_INTR_MASK333
+#define SMEM_SMSM_SIZE_INFO419
+
+/*
+ * Default sizes, in case SMEM_SMSM_SIZE_INFO is not found.
+ */
+#define SMSM_DEFAULT_NUM_ENTRIES   8
+#define SMSM_DEFAULT_NUM_HOSTS 3
+
+struct smsm_entry;
+struct smsm_host;
+
+/**
+ * struct qcom_smsm - smsm driver context
+ * @dev:   smsm device pointer
+ * @local_host:column in the subscription matrix representing this 
system
+ * @num_hosts: number of columns in the subscription matrix
+ * @num_entries: number of entries in the state map and rows in the 
subscription
+ * matrix
+ * @local_state: pointer to the local processor's state bits
+ * @subscription: pointer to local processor's row in subscription matrix
+ * @state: smem state handle
+ * @lock:  spinlock for read-modify-write of the outgoing state
+ * @entries:   context for each of the entries
+ * @hosts: context for each of the hosts
+ */
+struct qcom_smsm {
+   struct device *dev;
+
+   u32 local_host;
+
+   u32 num_hosts;
+   u32 num_entries;
+
+   u32 *local_state;
+   u32 *subscription;
+   struct qcom_smem_state *state;
+
+   spinlock_t lock;
+
+   struct smsm_entry *entries;
+   struct smsm_host *hosts;
+};
+
+/**
+ * struct smsm_entry - per remote processor entry context
+ * @smsm:  back-reference to driver context
+ * @domain:

[PATCH v2 1/5] dt-binding: soc: qcom: Add Qualcomm SMSM device tree documentation

2015-09-24 Thread Bjorn Andersson
This documents a device tree binding for the Qualcomm Shared Memory
State Machine.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- No longer representing outgoing state as gpio-controller

 .../devicetree/bindings/soc/qcom/qcom,smsm.txt | 104 +
 1 file changed, 104 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
new file mode 100644
index ..a6634c70850d
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
@@ -0,0 +1,104 @@
+Qualcomm Shared Memory State Machine
+
+The Shared Memory State Machine facilitates broadcasting of single bit state
+information between the processors in a Qualcomm SoC. Each processor is
+assigned 32 bits of state that can be modified. A processor can through a
+matrix of bitmaps signal subscription of notifications upon changes to a
+certain bit owned by a certain remote processor.
+
+- compatible:
+   Usage: required
+   Value type: 
+   Definition: must be one of:
+   "qcom,smsm"
+
+- qcom,ipc-N:
+   Usage: required
+   Value type: 
+   Definition: three entries specifying the outgoing ipc bit used for
+   signaling the N:th remote processor
+   - phandle to a syscon node representing the apcs registers
+   - u32 representing offset to the register within the syscon
+   - u32 representing the ipc bit within the register
+
+- qcom,local-host:
+   Usage: optional
+   Value type: 
+   Definition: identifier of the local processor in the list of hosts, or
+   in other words specifier of the column in the subscription
+   matrix representing the local processor
+   defaults to host 0
+
+- #address-cells:
+   Usage: required
+   Value type: 
+   Definition: must be 1
+
+- #size-cells:
+   Usage: required
+   Value type: 
+   Definition: must be 0
+
+= SUBNODES
+Each processor's state bits are described by a subnode of the smsm device node.
+Nodes can either be flagged as an interrupt-controller to denote a remote
+processor's state bits or the local processors bits.  The node names are not
+important.
+
+- reg:
+   Usage: required
+   Value type: 
+   Definition: specifies the offset, in words, of the first bit for this
+   entry
+
+- #qcom,state-cells:
+   Usage: required for local entry
+   Value type: 
+   Definition: must be 1 - denotes bit number
+
+- interrupt-controller:
+   Usage: required for remote entries
+   Value type: 
+   Definition: marks the entry as a interrupt-controller and the state bits
+   to belong to a remote processor
+
+- #interrupt-cells:
+   Usage: required for remote entries
+   Value type: 
+   Definition: must be 2 - denotes bit number and IRQ flags
+
+- interrupts:
+   Usage: required for remote entries
+   Value type: 
+   Definition: one entry specifying remote IRQ used by the remote processor
+   to signal changes of its state bits
+
+
+= EXAMPLE
+The following example shows the SMEM setup for controlling properties of the
+wireless processor, defined from the 8974 apps processor's point-of-view. It
+encompasses one outbound entry and the outgoing interrupt for the wireless
+processor.
+
+smsm {
+   compatible = "qcom,smsm";
+
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   qcom,ipc-3 = < 8 19>;
+
+   apps_smsm: apps@0 {
+   reg = <0>;
+
+   #qcom,state-cells = <1>;
+   };
+
+   wcnss_smsm: wcnss@7 {
+   reg = <7>;
+   interrupts = <0 144 1>;
+
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+};
-- 
1.8.2.2

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[PATCH v2 2/5] dt-binding: soc: qcom: Introduce qcom,smp2p binding documentation

2015-09-24 Thread Bjorn Andersson
Introduce binding documentation for the Qualcomm Shared Memory Point 2 Point
protocol.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- No longer representing outgoing state as gpio-controller

 .../devicetree/bindings/soc/qcom/qcom,smp2p.txt| 104 +
 1 file changed, 104 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
new file mode 100644
index ..5cc82b8353d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
@@ -0,0 +1,104 @@
+Qualcomm Shared Memory Point 2 Point binding
+
+The Shared Memory Point to Point (SMP2P) protocol facilitates communication of
+a single 32-bit value between two processors.  Each value has a single writer
+(the local side) and a single reader (the remote side).  Values are uniquely
+identified in the system by the directed edge (local processor ID to remote
+processor ID) and a string identifier.
+
+- compatible:
+   Usage: required
+   Value type: 
+   Definition: must be one of:
+   "qcom,smp2p"
+
+- interrupts:
+   Usage: required
+   Value type: 
+   Definition: one entry specifying the smp2p notification interrupt
+
+- qcom,ipc:
+   Usage: required
+   Value type: 
+   Definition: three entries specifying the outgoing ipc bit used for
+   signaling the remote end of the smp2p edge:
+   - phandle to a syscon node representing the apcs registers
+   - u32 representing offset to the register within the syscon
+   - u32 representing the ipc bit within the register
+
+- qcom,smem:
+   Usage: required
+   Value type: 
+   Definition: two identifiers of the inbound and outbound smem items used
+   for this edge
+
+- qcom,local-pid:
+   Usage: required
+   Value type: 
+   Definition: specifies the identfier of the local endpoint of this edge
+
+- qcom,remote-pid:
+   Usage: required
+   Value type: 
+   Definition: specifies the identfier of the remote endpoint of this edge
+
+= SUBNODES
+Each SMP2P pair contain a set of inbound and outbound entries, these are
+described in subnodes of the smp2p device node. The node names are not
+important.
+
+- qcom,entry-name:
+   Usage: required
+   Value type: 
+   Definition: specifies the name of this entry, for inbound entries this
+   will be used to match against the remotely allocated entry
+   and for outbound entries this name is used for allocating
+   entries
+
+- interrupt-controller:
+   Usage: required for incoming entries
+   Value type: 
+   Definition: marks the entry as inbound; the node should be specified
+   as a two cell interrupt-controller as defined in
+   "../interrupt-controller/interrupts.txt"
+   If not specified this node will denote the outgoing entry
+
+- #interrupt-cells:
+   Usage: required for incoming entries
+   Value type: 
+   Definition: must be 2 - denoting the bit in the entry and IRQ flags
+
+- #qcom,state-cells:
+   Usage: required for outgoing entries
+   Value type: 
+   Definition: must be 1 - denoting the bit in the entry
+
+= EXAMPLE
+The following example shows the SMP2P setup with the wireless processor,
+defined from the 8974 apps processor's point-of-view. It encompasses one
+inbound and one outbound entry:
+
+wcnss-smp2p {
+   compatible = "qcom,smp2p";
+   qcom,smem = <431>, <451>;
+
+   interrupts = <0 143 1>;
+
+   qcom,ipc = < 8 18>;
+
+   qcom,local-pid = <0>;
+   qcom,remote-pid = <4>;
+
+   wcnss_smp2p_out: master-kernel {
+   qcom,entry-name = "master-kernel";
+
+   #qcom,state-cells = <1>;
+   };
+
+   wcnss_smp2p_in: slave-kernel {
+   qcom,entry-name = "slave-kernel";
+
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+};
-- 
1.8.2.2

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Re: [Patch v3 03/10] arm64: dts: qcom: Add MSM8916 SMEM nodes

2015-09-24 Thread Bjorn Andersson
On Thu 24 Sep 12:18 PDT 2015, Andy Gross wrote:

> This patch adds the nodes necessary to support the SMEM driver on MSM8916
> platforms.
> 

Looks reasonable, I've not reviewed the addresses of things, but I
presume you have :)

Acked-by: Bjorn Andersson 

Reards,
Bjorn
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[PATCH] soc: qcom: smd: Reject send of too big packets

2015-09-24 Thread Bjorn Andersson
Attempting to find room for a packet that's bigger than the fifo will
never succeed and the calling process will be sleeping forever in the
loop, waiting for enough room. So fail early instead.

Reported-by: Courtney Cavin 
Signed-off-by: Bjorn Andersson 
---
 drivers/soc/qcom/smd.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/soc/qcom/smd.c b/drivers/soc/qcom/smd.c
index 18964f154383..88353bda1ea4 100644
--- a/drivers/soc/qcom/smd.c
+++ b/drivers/soc/qcom/smd.c
@@ -723,6 +723,10 @@ int qcom_smd_send(struct qcom_smd_channel *channel, const 
void *data, int len)
if (channel->info_word && len % 4)
return -EINVAL;
 
+   /* Reject packets that are too big */
+   if (tlen >= channel->fifo_size)
+   return -EINVAL;
+
ret = mutex_lock_interruptible(>tx_lock);
if (ret)
return ret;
-- 
1.8.2.2

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Re: [Patch v3 08/10] arm: dts: Add RPM/SMD support on APQ8084

2015-09-24 Thread Bjorn Andersson
On Thu 24 Sep 12:18 PDT 2015, Andy Gross wrote:

> This patch adds support for RPM and SMD nodes that are present on APQ8084
> platforms.
> 

Acked-by: Bjorn Andersson 

Regards,
Bjorn
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Re: [Patch v3 07/10] arm: dts: Add APQ8084 SMEM nodes

2015-09-24 Thread Bjorn Andersson
On Thu 24 Sep 12:18 PDT 2015, Andy Gross wrote:

> This patch adds all the required nodes to support SMEM on APQ8084
> 

Acked-by: Bjorn Andersson 

Regards,
Bjorn
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