[PATCH v2 1/4] arm64: dts: fix i2c pinconf sleep state function

2015-10-09 Thread Srinivas Kandagatla 
This patch fixes the i2c pinctrl sleep state by changing the pinconf
function to be in gpio mode rather than i2c.

Signed-off-by: Srinivas Kandagatla 
---
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 42941b9..a6105d7 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -279,7 +279,7 @@
 
i2c4_sleep: i2c4_sleep {
pinmux {
-   function = "blsp_i2c4";
+   function = "gpio";
pins = "gpio14", "gpio15";
};
pinconf {
-- 
1.9.1

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[PATCH v4 5/8] arm: dts: msm8974: Add thermal zones, tsens and qfprom nodes

2015-10-09 Thread Rajendra Nayak 
Add thermal zones, tsens and qfprom nodes

Cc: Andy Gross 
Signed-off-by: Rajendra Nayak 
---
 arch/arm/boot/dts/qcom-msm8974.dtsi | 105 
 1 file changed, 105 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi 
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index ab8e572..cc88412 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -86,6 +86,88 @@
};
};
 
+   thermal-zones {
+   cpu-thermal0 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 5>;
+
+   trips {
+   cpu_alert0: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit0: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   cpu-thermal1 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 6>;
+
+   trips {
+   cpu_alert1: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit1: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   cpu-thermal2 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 7>;
+
+   trips {
+   cpu_alert2: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit2: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   cpu-thermal3 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 8>;
+
+   trips {
+   cpu_alert3: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit3: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+   };
+
cpu-pmu {
compatible = "qcom,krait-pmu";
interrupts = <1 7 0xf04>;
@@ -114,6 +196,29 @@
  <0xf9002000 0x1000>;
};
 
+   qfprom: qfprom@fc4bc000 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "qcom,qfprom";
+   reg = <0xfc4bc000 0x1000>;
+   tsens_calib: calib@d0 {
+   reg = <0xd0 0x18>;
+   };
+   tsens_backup: backup@440 {
+   reg = <0x440 0x10>;
+   };
+   };
+
+   tsens: thermal-sensor@fc4a8000 {
+   compatible = "qcom,msm8974-tsens";
+   reg = <0xfc4a8000 0x2000>;
+   nvmem-cells = <_calib>, <_backup>;
+   nvmem-cell-names = "calib", "calib_backup";
+   qcom,tsens-slopes = <3200 3200 3200 3200 3200 3200
+   3200 3200 3200 3200 3200>;
+   #thermal-sensor-cells = <1>;
+   };
+

[PATCH v4 1/8] thermal: qcom: tsens: Add a skeletal TSENS drivers

2015-10-09 Thread Rajendra Nayak 
TSENS is Qualcomms' thermal temperature sensor device. It
supports reading temperatures from multiple thermal sensors
present on various QCOM SoCs.
Calibration data is generally read from a non-volatile memory
(eeprom) device.

Add a skeleton driver with all the necessary abstractions so
a variety of qcom device families which support TSENS can
add driver extensions.

Also add the required device tree bindings which can be used
to describe the TSENS device in DT.

Signed-off-by: Rajendra Nayak 
Reviewed-by: Lina Iyer 
---
 .../devicetree/bindings/thermal/qcom-tsens.txt |  33 
 drivers/thermal/Kconfig|   5 +
 drivers/thermal/Makefile   |   1 +
 drivers/thermal/qcom/Kconfig   |  10 ++
 drivers/thermal/qcom/Makefile  |   2 +
 drivers/thermal/qcom/tsens.c   | 199 +
 drivers/thermal/qcom/tsens.h   |  58 ++
 7 files changed, 308 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/thermal/qcom-tsens.txt
 create mode 100644 drivers/thermal/qcom/Kconfig
 create mode 100644 drivers/thermal/qcom/Makefile
 create mode 100644 drivers/thermal/qcom/tsens.c
 create mode 100644 drivers/thermal/qcom/tsens.h

diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt 
b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt
new file mode 100644
index 000..8b1f26f
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt
@@ -0,0 +1,33 @@
+* QCOM SoC Temperature Sensor (TSENS)
+
+Required properties:
+- compatible :
+ - "qcom,msm8916-tsens" : For 8916 Family of SoCs
+ - "qcom,msm8974-tsens" : For 8974 Family of SoCs
+
+- reg: Address range of the thermal registers
+- qcom,tsens-slopes : Must contain slope value for each of the sensors 
controlled
+   by this device
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
+- Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to 
specify
+nvmem cells
+
+Optional properties:
+- qcom,sensor-id: List of sensor instances used in a given SoC. A TSENS IP can
+ have a fixed number of sensors (like 11) but a given SoC can
+ use only 5 of these and they might not always the first 5. 
They
+ could be sensors 0, 1, 4, 8 and 9. This property is used to
+ describe the subset of the sensors used. If this property is
+ missing they are assumed to be the first 'n' sensors numbered
+ sequentially in which case the number of sensors defaults to
+ the number of slope values.
+
+Example:
+tsens: thermal-sensor@90 {
+   compatible = "qcom,msm8916-tsens";
+   nvmem-cells = <_caldata>, <_calsel>;
+   nvmem-cell-names = "caldata", "calsel";
+   qcom,tsens-slopes = <3200 3200 3200 3200 3200>;
+   qcom,sensor-id = <0 1 2 4 5>;
+   #thermal-sensor-cells = <1>;
+   };
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 5aabc4b..d49f2bd 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -374,4 +374,9 @@ config QCOM_SPMI_TEMP_ALARM
  real time die temperature if an ADC is present or an estimate of the
  temperature based upon the over temperature stage value.
 
+menu "Qualcomm thermal drivers"
+depends on ARCH_QCOM && OF
+source "drivers/thermal/qcom/Kconfig"
+endmenu
+
 endif
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 26f1608..cdaa55f 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -43,5 +43,6 @@ obj-$(CONFIG_TI_SOC_THERMAL)  += ti-soc-thermal/
 obj-$(CONFIG_INT340X_THERMAL)  += int340x_thermal/
 obj-$(CONFIG_INTEL_PCH_THERMAL)+= intel_pch_thermal.o
 obj-$(CONFIG_ST_THERMAL)   += st/
+obj-$(CONFIG_QCOM_TSENS)   += qcom/
 obj-$(CONFIG_TEGRA_SOCTHERM)   += tegra_soctherm.o
 obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
diff --git a/drivers/thermal/qcom/Kconfig b/drivers/thermal/qcom/Kconfig
new file mode 100644
index 000..f7e8e40
--- /dev/null
+++ b/drivers/thermal/qcom/Kconfig
@@ -0,0 +1,10 @@
+config QCOM_TSENS
+   tristate "Qualcomm TSENS Temperature Alarm"
+   depends on THERMAL
+   depends on QCOM_QFPROM
+   help
+ This enables the thermal sysfs driver for the TSENS device. It shows
+ up in Sysfs as a thermal zone with multiple trip points. Disabling the
+ thermal zone device via the mode file results in disabling the sensor.
+ Also able to set threshold temperature for both hot and cold and 
update
+ when a threshold is reached.
diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile
new file mode 100644
index 000..401069b
--- /dev/null
+++ b/drivers/thermal/qcom/Makefile
@@ -0,0 +1,2 @@

[PATCH v4 7/8] arm: dts: apq8084: Add thermal zones, tsens and qfprom nodes

2015-10-09 Thread Rajendra Nayak 
Add thermal zones, tsens and qfprom nodes

Cc: Andy Gross 
Signed-off-by: Rajendra Nayak 
---
 arch/arm/boot/dts/qcom-apq8084.dtsi | 105 
 1 file changed, 105 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi 
b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 0554fbd..80570a1 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -75,6 +75,88 @@
};
};
 
+   thermal-zones {
+   cpu-thermal0 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 5>;
+
+   trips {
+   cpu_alert0: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit0: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   cpu-thermal1 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 6>;
+
+   trips {
+   cpu_alert1: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit1: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   cpu-thermal2 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 7>;
+
+   trips {
+   cpu_alert2: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit2: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   cpu-thermal3 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 8>;
+
+   trips {
+   cpu_alert3: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit3: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+   };
+
cpu-pmu {
compatible = "qcom,krait-pmu";
interrupts = <1 7 0xf04>;
@@ -103,6 +185,29 @@
  <0xf9002000 0x1000>;
};
 
+   qfprom: qfprom@fc4bc000 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "qcom,qfprom";
+   reg = <0xfc4bc000 0x1000>;
+   tsens_calib: calib@d0 {
+   reg = <0xd0 0x18>;
+   };
+   tsens_backup: backup@440 {
+   reg = <0x440 0x10>;
+   };
+   };
+
+   tsens: thermal-sensor@fc4a8000 {
+   compatible = "qcom,msm8974-tsens";
+   reg = <0xfc4a8000 0x2000>;
+   nvmem-cells = <_calib>, <_backup>;
+   nvmem-cell-names = "calib", "calib_backup";
+   qcom,tsens-slopes = <3200 3200 3200 3200 3200 3200
+   3200 3200 3200 3200 3200>;
+   #thermal-sensor-cells = <1>;
+   };
+

[PATCH v4 4/8] thermal: qcom: tsens-8960: Add support for 8960 family of SoCs

2015-10-09 Thread Rajendra Nayak 
8960 family of SoCs have the TSENS device as part of GCC, hence
the driver probes the virtual child device created by GCC and
uses the parent to extract all DT properties and reuses the GCC
regmap.

Also GCC/TSENS are part of a  domain thats not always ON.
Hence add .suspend and .resume hooks to save and restore some of
the inited register context.

Also 8960 family have some of the TSENS init sequence thats
required to be done by the HLOS driver (some later versions of TSENS
do not export these registers to non-secure world, and hence need
these initializations to be done by secure bootloaders)

8660 from the same family has just one sensor and hence some register
offset/layout differences which need special handling in the driver.

Based on the original code from Siddartha Mohanadoss, Stephen Boyd and
Narendran Rajan.

Signed-off-by: Rajendra Nayak 
---
 drivers/thermal/qcom/Makefile |   2 +-
 drivers/thermal/qcom/tsens-8960.c | 291 ++
 drivers/thermal/qcom/tsens.c  |  13 +-
 drivers/thermal/qcom/tsens.h  |   2 +-
 4 files changed, 302 insertions(+), 6 deletions(-)
 create mode 100644 drivers/thermal/qcom/tsens-8960.c

diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile
index a471100..f3cefd1 100644
--- a/drivers/thermal/qcom/Makefile
+++ b/drivers/thermal/qcom/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_QCOM_TSENS)   += qcom_tsens.o
-qcom_tsens-y   += tsens.o tsens-common.o tsens-8916.o 
tsens-8974.o
+qcom_tsens-y   += tsens.o tsens-common.o tsens-8916.o 
tsens-8974.o tsens-8960.o
diff --git a/drivers/thermal/qcom/tsens-8960.c 
b/drivers/thermal/qcom/tsens-8960.c
new file mode 100644
index 000..00f45e7
--- /dev/null
+++ b/drivers/thermal/qcom/tsens-8960.c
@@ -0,0 +1,291 @@
+/*
+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "tsens.h"
+
+#define CAL_MDEGC  3
+
+#define CONFIG_ADDR0x3640
+#define CONFIG_ADDR_8660   0x3620
+/* CONFIG_ADDR bitmasks */
+#define CONFIG 0x9b
+#define CONFIG_MASK0xf
+#define CONFIG_86601
+#define CONFIG_SHIFT_8660  28
+#define CONFIG_MASK_8660   (3 << CONFIG_SHIFT_8660)
+
+#define STATUS_CNTL_ADDR_8064  0x3660
+#define CNTL_ADDR  0x3620
+/* CNTL_ADDR bitmasks */
+#define EN BIT(0)
+#define SW_RST BIT(1)
+#define SENSOR0_EN BIT(3)
+#define SLP_CLK_ENABIT(26)
+#define SLP_CLK_ENA_8660   BIT(24)
+#define MEASURE_PERIOD 1
+#define SENSOR0_SHIFT  3
+
+/* INT_STATUS_ADDR bitmasks */
+#define MIN_STATUS_MASKBIT(0)
+#define LOWER_STATUS_CLR   BIT(1)
+#define UPPER_STATUS_CLR   BIT(2)
+#define MAX_STATUS_MASKBIT(3)
+
+#define THRESHOLD_ADDR 0x3624
+/* THRESHOLD_ADDR bitmasks */
+#define THRESHOLD_MAX_LIMIT_SHIFT  24
+#define THRESHOLD_MIN_LIMIT_SHIFT  16
+#define THRESHOLD_UPPER_LIMIT_SHIFT8
+#define THRESHOLD_LOWER_LIMIT_SHIFT0
+
+/* Initial temperature threshold values */
+#define LOWER_LIMIT_TH 0x50
+#define UPPER_LIMIT_TH 0xdf
+#define MIN_LIMIT_TH   0x0
+#define MAX_LIMIT_TH   0xff
+
+#define S0_STATUS_ADDR 0x3628
+#define INT_STATUS_ADDR0x363c
+#define TRDY_MASK  BIT(7)
+
+static int suspend_8960(struct tsens_device *tmdev)
+{
+   int ret;
+   unsigned int mask;
+   struct regmap *map = tmdev->map;
+
+   ret = regmap_read(map, THRESHOLD_ADDR, >ctx.threshold);
+   if (ret)
+   return ret;
+
+   ret = regmap_read(map, CNTL_ADDR, >ctx.control);
+   if (ret)
+   return ret;
+
+   if (tmdev->num_sensors > 1)
+   mask = SLP_CLK_ENA | EN;
+   else
+   mask = SLP_CLK_ENA_8660 | EN;
+
+   ret = regmap_update_bits(map, CNTL_ADDR, mask, 0);
+   if (ret)
+   return ret;
+
+   tmdev->trdy = false;
+
+   return 0;
+}
+
+static int resume_8960(struct tsens_device *tmdev)
+{
+   int ret;
+   unsigned long reg_cntl;
+   struct regmap *map = tmdev->map;
+
+   ret = regmap_update_bits(map, CNTL_ADDR, SW_RST, SW_RST);
+   if (ret)
+   return ret;
+
+   /*
+* Separate CONFIG restore is not needed only for 8660 as
+* config is part of CTRL Addr and its restored as such
+

[PATCH v4 2/8] thermal: qcom: tsens-8916: Add support for 8916 family of SoCs

2015-10-09 Thread Rajendra Nayak 
Add support to calibrate sensors on 8916 family and also add common
functions to read temperature from sensors (This can be reused on
other SoCs having similar TSENS device)
The calibration data is read from eeprom using the generic nvmem
framework apis.

Based on the original code by Siddartha Mohanadoss and Stephen Boyd.

Signed-off-by: Rajendra Nayak 
---
 drivers/thermal/qcom/Makefile   |   2 +-
 drivers/thermal/qcom/tsens-8916.c   | 107 +
 drivers/thermal/qcom/tsens-common.c | 130 
 drivers/thermal/qcom/tsens.c|   1 +
 drivers/thermal/qcom/tsens.h|  11 +++
 5 files changed, 250 insertions(+), 1 deletion(-)
 create mode 100644 drivers/thermal/qcom/tsens-8916.c
 create mode 100644 drivers/thermal/qcom/tsens-common.c

diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile
index 401069b..05c98e4 100644
--- a/drivers/thermal/qcom/Makefile
+++ b/drivers/thermal/qcom/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_QCOM_TSENS)   += qcom_tsens.o
-qcom_tsens-y   += tsens.o
+qcom_tsens-y   += tsens.o tsens-common.o tsens-8916.o
diff --git a/drivers/thermal/qcom/tsens-8916.c 
b/drivers/thermal/qcom/tsens-8916.c
new file mode 100644
index 000..a69aea3
--- /dev/null
+++ b/drivers/thermal/qcom/tsens-8916.c
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include 
+#include "tsens.h"
+
+/* eeprom layout data for 8916 */
+#define BASE0_MASK 0x007f
+#define BASE1_MASK 0xfe00
+#define BASE0_SHIFT0
+#define BASE1_SHIFT25
+
+#define S0_P1_MASK 0x0f80
+#define S1_P1_MASK 0x003e
+#define S2_P1_MASK 0xf800
+#define S3_P1_MASK 0x03e0
+#define S4_P1_MASK 0x000f8000
+
+#define S0_P2_MASK 0x0001f000
+#define S1_P2_MASK 0x07c0
+#define S2_P2_MASK 0x001f
+#define S3_P2_MASK 0x7c00
+#define S4_P2_MASK 0x01f0
+
+#define S0_P1_SHIFT7
+#define S1_P1_SHIFT17
+#define S2_P1_SHIFT27
+#define S3_P1_SHIFT5
+#define S4_P1_SHIFT15
+
+#define S0_P2_SHIFT12
+#define S1_P2_SHIFT22
+#define S2_P2_SHIFT0
+#define S3_P2_SHIFT10
+#define S4_P2_SHIFT20
+
+#define CAL_SEL_MASK   0xe000
+#define CAL_SEL_SHIFT  29
+
+static int calibrate_8916(struct tsens_device *tmdev)
+{
+   int base0 = 0, base1 = 0, i;
+   u32 p1[5], p2[5];
+   int mode = 0;
+   u32 *qfprom_cdata, *qfprom_csel;
+
+   qfprom_cdata = (u32 *)qfprom_read(tmdev->dev, "calib");
+   if (IS_ERR(qfprom_cdata))
+   return PTR_ERR(qfprom_cdata);
+
+   qfprom_csel = (u32 *)qfprom_read(tmdev->dev, "calib_sel");
+   if (IS_ERR(qfprom_csel))
+   return PTR_ERR(qfprom_csel);
+
+   mode = (qfprom_csel[0] & CAL_SEL_MASK) >> CAL_SEL_SHIFT;
+   dev_dbg(tmdev->dev, "calibration mode is %d\n", mode);
+
+   switch (mode) {
+   case TWO_PT_CALIB:
+   base1 = (qfprom_cdata[1] & BASE1_MASK) >> BASE1_SHIFT;
+   p2[0] = (qfprom_cdata[0] & S0_P2_MASK) >> S0_P2_SHIFT;
+   p2[1] = (qfprom_cdata[0] & S1_P2_MASK) >> S1_P2_SHIFT;
+   p2[2] = (qfprom_cdata[1] & S2_P2_MASK) >> S2_P2_SHIFT;
+   p2[3] = (qfprom_cdata[1] & S3_P2_MASK) >> S3_P2_SHIFT;
+   p2[4] = (qfprom_cdata[1] & S4_P2_MASK) >> S4_P2_SHIFT;
+   for (i = 0; i < tmdev->num_sensors; i++)
+   p2[i] = ((base1 + p2[i]) << 3);
+   /* Fall through */
+   case ONE_PT_CALIB2:
+   base0 = (qfprom_cdata[0] & BASE0_MASK);
+   p1[0] = (qfprom_cdata[0] & S0_P1_MASK) >> S0_P1_SHIFT;
+   p1[1] = (qfprom_cdata[0] & S1_P1_MASK) >> S1_P1_SHIFT;
+   p1[2] = (qfprom_cdata[0] & S2_P1_MASK) >> S2_P1_SHIFT;
+   p1[3] = (qfprom_cdata[1] & S3_P1_MASK) >> S3_P1_SHIFT;
+   p1[4] = (qfprom_cdata[1] & S4_P1_MASK) >> S4_P1_SHIFT;
+   for (i = 0; i < tmdev->num_sensors; i++)
+   p1[i] = (((base0) + p1[i]) << 3);
+   break;
+   default:
+   for (i = 0; i < tmdev->num_sensors; i++) {
+   p1[i] = 500;
+   p2[i] = 780;
+   }
+   break;
+   }
+
+   compute_intercept_slope(tmdev, p1, p2, mode);
+
+   return 0;
+}
+
+const struct tsens_ops ops_8916 = {
+   .init   = init_common,
+

[PATCH v4 6/8] arm: dts: apq8064: Add thermal zones, tsens and qfprom nodes

2015-10-09 Thread Rajendra Nayak 
TSENS is part of GCC, hence add TSENS properties as part of GCC node.
Also add thermal zones and qfprom nodes.
Update GCC bindings doc to mention the possibility of optional TSENS
properties that can be part of GCC node.

Cc: Andy Gross 
Signed-off-by: Rajendra Nayak 
---
 .../devicetree/bindings/clock/qcom,gcc.txt |  20 
 arch/arm/boot/dts/qcom-apq8064.dtsi| 101 +
 2 files changed, 121 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt 
b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
index 54c23f3..f1cf499 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
@@ -18,6 +18,13 @@ Required properties :
 - #clock-cells : shall contain 1
 - #reset-cells : shall contain 1
 
+Optional properties:
+- Qualcomm TSENS (thermal sensor device) on some devices can
+be part of GCC and hence the TSENS properties can also be
+part of the GCC/clock-controller node.
+For more details on the TSENS properties please refer
+Documentation/devicetree/bindings/thermal/qcom-tsens.txt
+
 Example:
clock-controller@90 {
compatible = "qcom,gcc-msm8960";
@@ -25,3 +32,16 @@ Example:
#clock-cells = <1>;
#reset-cells = <1>;
};
+
+Example of GCC with TSENS properties:
+   clock-controller@90 {
+   compatible = "qcom,gcc-apq8064";
+   reg = <0x0090 0x4000>;
+   nvmem-cells = <_calib>, <_backup>;
+   nvmem-cell-names = "calib", "calib_backup";
+   qcom,tsens-slopes = <1176 1176 1154 1176 
+   1132 1132 1199 1132 1199 1132>;
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   #thermal-sensor-cells = <1>;
+   };
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi 
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index d2e94d6..6a0866b 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -75,6 +75,88 @@
};
};
 
+   thermal-zones {
+   cpu-thermal0 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 7>;
+
+   trips {
+   cpu_alert0: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit0: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   cpu-thermal1 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 8>;
+
+   trips {
+   cpu_alert1: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit1: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   cpu-thermal2 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 9>;
+
+   trips {
+   cpu_alert2: trip@0 {
+   temperature = <75000>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit2: trip@1 {
+   temperature = <95000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   cpu-thermal3 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 10>;
+
+   trips {
+   cpu_alert3: trip@0 {
+   temperature = <75000>;
+   hysteresis =

[PATCH v4 8/8] arm64: dts: msm8916: Add thermal zones, tsens and qfprom nodes

2015-10-09 Thread Rajendra Nayak 
Add thermal zones, tsens and qfprom nodes

Cc: Andy Gross 
Signed-off-by: Rajendra Nayak 
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 66 +++
 1 file changed, 66 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 3e7083c..63b5262 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -68,6 +68,49 @@
};
};
 
+   thermal-zones {
+   cpu-thermal0 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 4>;
+
+   trips {
+   cpu_alert0: trip@0 {
+   temperature = <10>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit0: trip@1 {
+   temperature = <125000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   cpu-thermal1 {
+   polling-delay-passive = <250>;
+   polling-delay = <1000>;
+
+   thermal-sensors = < 3>;
+
+   trips {
+   cpu_alert1: trip@0 {
+   temperature = <10>;
+   hysteresis = <2000>;
+   type = "passive";
+   };
+   cpu_crit1: trip@1 {
+   temperature = <125000>;
+   hysteresis = <2000>;
+   type = "critical";
+   };
+   };
+   };
+
+   };
+
timer {
compatible = "arm,armv8-timer";
interrupts = ,
@@ -392,6 +435,29 @@
interrupt-controller;
#interrupt-cells = <4>;
};
+
+   qfprom: qfprom@5c000 {
+   compatible = "qcom,qfprom";
+   reg = <0x5c000 0x1000>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   tsens_caldata: caldata@d0 {
+   reg = <0xd0 0x8>;
+   };
+   tsens_calsel: calsel@ec {
+   reg = <0xec 0x4>;
+   };
+   };
+
+   tsens: thermal-sensor@4a8000 {
+   compatible = "qcom,msm8916-tsens";
+   reg = <0x4a8000 0x2000>;
+   nvmem-cells = <_caldata>, <_calsel>;
+   nvmem-cell-names = "calib", "calib_sel";
+   qcom,tsens-slopes = <3200 3200 3200 3200 3200>;
+   qcom,sensor-id = <0 1 2 4 5>;
+   #thermal-sensor-cells = <1>;
+   };
};
 };
 
-- 
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of Code Aurora Forum, hosted by The Linux Foundation

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[PATCH v4 3/8] thermal: qcom: tsens-8974: Add support for 8974 family of SoCs

2015-10-09 Thread Rajendra Nayak 
Add .calibrate support for 8974 family as part of tsens_ops.

Based on the original code by Siddartha Mohanadoss and Stephen Boyd.

Signed-off-by: Rajendra Nayak 
---
 drivers/thermal/qcom/Makefile |   2 +-
 drivers/thermal/qcom/tsens-8974.c | 239 ++
 drivers/thermal/qcom/tsens.c  |   1 +
 drivers/thermal/qcom/tsens.h  |   2 +-
 4 files changed, 242 insertions(+), 2 deletions(-)
 create mode 100644 drivers/thermal/qcom/tsens-8974.c

diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile
index 05c98e4..a471100 100644
--- a/drivers/thermal/qcom/Makefile
+++ b/drivers/thermal/qcom/Makefile
@@ -1,2 +1,2 @@
 obj-$(CONFIG_QCOM_TSENS)   += qcom_tsens.o
-qcom_tsens-y   += tsens.o tsens-common.o tsens-8916.o
+qcom_tsens-y   += tsens.o tsens-common.o tsens-8916.o 
tsens-8974.o
diff --git a/drivers/thermal/qcom/tsens-8974.c 
b/drivers/thermal/qcom/tsens-8974.c
new file mode 100644
index 000..19d9258
--- /dev/null
+++ b/drivers/thermal/qcom/tsens-8974.c
@@ -0,0 +1,239 @@
+/*
+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include 
+#include "tsens.h"
+
+/* eeprom layout data for 8974 */
+#define BASE1_MASK 0xff
+#define S0_P1_MASK 0x3f00
+#define S1_P1_MASK 0xfc000
+#define S2_P1_MASK 0x3f0
+#define S3_P1_MASK 0xfc00
+#define S4_P1_MASK 0x3f
+#define S5_P1_MASK 0xfc0
+#define S6_P1_MASK 0x3f000
+#define S7_P1_MASK 0xfc
+#define S8_P1_MASK 0x3f00
+#define S8_P1_MASK_BKP 0x3f
+#define S9_P1_MASK 0x3f
+#define S9_P1_MASK_BKP 0xfc0
+#define S10_P1_MASK0xfc0
+#define S10_P1_MASK_BKP0x3f000
+#define CAL_SEL_0_10xc000
+#define CAL_SEL_2  0x4000
+#define CAL_SEL_SHIFT  30
+#define CAL_SEL_SHIFT_228
+
+#define S0_P1_SHIFT8
+#define S1_P1_SHIFT14
+#define S2_P1_SHIFT20
+#define S3_P1_SHIFT26
+#define S5_P1_SHIFT6
+#define S6_P1_SHIFT12
+#define S7_P1_SHIFT18
+#define S8_P1_SHIFT24
+#define S9_P1_BKP_SHIFT6
+#define S10_P1_SHIFT   6
+#define S10_P1_BKP_SHIFT   12
+
+#define BASE2_SHIFT12
+#define BASE2_BKP_SHIFT18
+#define S0_P2_SHIFT20
+#define S0_P2_BKP_SHIFT26
+#define S1_P2_SHIFT26
+#define S2_P2_BKP_SHIFT6
+#define S3_P2_SHIFT6
+#define S3_P2_BKP_SHIFT12
+#define S4_P2_SHIFT12
+#define S4_P2_BKP_SHIFT18
+#define S5_P2_SHIFT18
+#define S5_P2_BKP_SHIFT24
+#define S6_P2_SHIFT24
+#define S7_P2_BKP_SHIFT6
+#define S8_P2_SHIFT6
+#define S8_P2_BKP_SHIFT12
+#define S9_P2_SHIFT12
+#define S9_P2_BKP_SHIFT18
+#define S10_P2_SHIFT   18
+#define S10_P2_BKP_SHIFT   24
+
+#define BASE2_MASK 0xff000
+#define BASE2_BKP_MASK 0xfc
+#define S0_P2_MASK 0x3f0
+#define S0_P2_BKP_MASK 0xfc00
+#define S1_P2_MASK 0xfc00
+#define S1_P2_BKP_MASK 0x3f
+#define S2_P2_MASK 0x3f
+#define S2_P2_BKP_MASK 0xfc0
+#define S3_P2_MASK 0xfc0
+#define S3_P2_BKP_MASK 0x3f000
+#define S4_P2_MASK 0x3f000
+#define S4_P2_BKP_MASK 0xfc
+#define S5_P2_MASK 0xfc
+#define S5_P2_BKP_MASK 0x3f00
+#define S6_P2_MASK 0x3f00
+#define S6_P2_BKP_MASK 0x3f
+#define S7_P2_MASK 0x3f
+#define S7_P2_BKP_MASK 0xfc0
+#define S8_P2_MASK 0xfc0
+#define S8_P2_BKP_MASK 0x3f000
+#define S9_P2_MASK 0x3f000
+#define S9_P2_BKP_MASK 0xfc
+#define S10_P2_MASK0xfc
+#define S10_P2_BKP_MASK0x3f00
+
+#define BKP_SEL0x3
+#define BKP_REDUN_SEL  0xe000
+#define BKP_REDUN_SHIFT29
+
+#define BIT_APPEND 0x3
+
+static int calibrate_8974(struct tsens_device *tmdev)
+{
+   int base1 = 0, base2 = 0, i;
+   u32 p1[11], p2[11];
+   int mode = 0;
+   u32 *calib, *bkp;
+   u32 calib_redun_sel;
+
+

Re: [PATCH 2/4] arm64: dts: qcom: Add msm8916 I2C nodes.

2015-10-09 Thread Srinivas Kandagatla 



On 08/10/15 19:17, Stephen Boyd wrote:

On 10/08/2015 04:19 AM, Srinivas Kandagatla wrote:

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 85f7bee..d49ac37 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -233,6 +233,22 @@
status = "disabled";
};

+   /* BLSP1 QUP2 */


This comment is useless.


Absolutely.. :-)
will fix it in next version.

--srini



+   blsp_i2c2: i2c@78b6000 {
+   compatible = "qcom,i2c-qup-v2.2.1";
+   reg = <0x78b6000 0x1000>;
+   interrupts = ;




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[PATCH v2 4/4] arm64: dts: apq8016-sbc: enable spi buses on LS and HS

2015-10-09 Thread Srinivas Kandagatla 
This patch enables spi buses on low speed and high speed expansion
connectors on DB410C

Signed-off-by: Srinivas Kandagatla 
---
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi 
b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index cd1d0b5..64b06d8 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -49,6 +49,16 @@
status = "okay";
};
 
+   spi@78b7000 {
+   /* On High speed expansion */
+   status = "okay";
+   };
+
+   spi@78b9000 {
+   /* On Low speed expansion */
+   status = "okay";
+   };
+
leds {
pinctrl-names = "default";
pinctrl-0 = <_leds>,
-- 
1.9.1

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[PATCH v2 3/4] arm64: dts: apq8016-sbc: enable i2c buses on LS and HS

2015-10-09 Thread Srinivas Kandagatla 
This patch enables i2c buses on low speed and high speed expansion
connectors on DB410C.

Signed-off-by: Srinivas Kandagatla 
---
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi 
b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 3fc3be4..cd1d0b5 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -34,6 +34,21 @@
pinctrl-1 = <_uart2_sleep>;
};
 
+   i2c@78b6000 {
+   /* On Low speed expansion */
+   status = "okay";
+   };
+
+   i2c@78b8000 {
+   /* On High speed expansion */
+   status = "okay";
+   };
+
+   i2c@78ba000 {
+   /* On Low speed expansion */
+   status = "okay";
+   };
+
leds {
pinctrl-names = "default";
pinctrl-0 = <_leds>,
-- 
1.9.1

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[PATCH v2 2/4] arm64: dts: qcom: Add msm8916 I2C nodes.

2015-10-09 Thread Srinivas Kandagatla 
This patch adds missing support for i2c0 and i2c6, this support is
required to connect the i2c slaves on LS expansion on DB410c.

Signed-off-by: Srinivas Kandagatla 
---
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 48 ++
 arch/arm64/boot/dts/qcom/msm8916.dtsi  | 30 +++
 2 files changed, 78 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index a6105d7..49ec55a 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -265,6 +265,30 @@
};
};
 
+   i2c2_default: i2c2_default {
+   pinmux {
+   function = "blsp_i2c2";
+   pins = "gpio6", "gpio7";
+   };
+   pinconf {
+   pins = "gpio6", "gpio7";
+   drive-strength = <2>;
+   bias-disable = <0>;
+   };
+   };
+
+   i2c2_sleep: i2c2_sleep {
+   pinmux {
+   function = "gpio";
+   pins = "gpio6", "gpio7";
+   };
+   pinconf {
+   pins = "gpio6", "gpio7";
+   drive-strength = <2>;
+   bias-disable = <0>;
+   };
+   };
+
i2c4_default: i2c4_default {
pinmux {
function = "blsp_i2c4";
@@ -289,6 +313,30 @@
};
};
 
+   i2c6_default: i2c6_default {
+   pinmux {
+   function = "blsp_i2c6";
+   pins = "gpio22", "gpio23";
+   };
+   pinconf {
+   pins = "gpio22", "gpio23";
+   drive-strength = <2>;
+   bias-disable = <0>;
+   };
+   };
+
+   i2c6_sleep: i2c6_sleep {
+   pinmux {
+   function = "gpio";
+   pins = "gpio22", "gpio23";
+   };
+   pinconf {
+   pins = "gpio22", "gpio23";
+   drive-strength = <2>;
+   bias-disable = <0>;
+   };
+   };
+
sdhc2_cd_pin {
sdc2_cd_on: cd_on {
pinmux {
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 85f7bee..2c86234 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -233,6 +233,21 @@
status = "disabled";
};
 
+   blsp_i2c2: i2c@78b6000 {
+   compatible = "qcom,i2c-qup-v2.2.1";
+   reg = <0x78b6000 0x1000>;
+   interrupts = ;
+   clocks = < GCC_BLSP1_AHB_CLK>,
+   < GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+   clock-names = "iface", "core";
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <_default>;
+   pinctrl-1 = <_sleep>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b8000 0x1000>;
@@ -248,6 +263,21 @@
status = "disabled";
};
 
+   blsp_i2c6: i2c@78ba000 {
+   compatible = "qcom,i2c-qup-v2.2.1";
+   reg = <0x78ba000 0x1000>;
+   interrupts = ;
+   clocks = < GCC_BLSP1_AHB_CLK>,
+   < GCC_BLSP1_QUP6_I2C_APPS_CLK>;
+   clock-names = "iface", "core";
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <_default>;
+   pinctrl-1 = <_sleep>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
sdhc_1: sdhci@07824000 {
compatible = "qcom,sdhci-msm-v4";
reg = <0x07824900 0x11c>, <0x07824000 0x800>;
-- 
1.9.1

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[PATCH v4 0/8] qcom: Add support for TSENS driver

2015-10-09 Thread Rajendra Nayak 
Patches 1/8 to 4/8 will need to go via the thermal tree/Eduardo.
Patches 5/8 to 8/8 will need to go via qcom-msm tree/Andy.

Eduardo, can you please take a look at the patches and let me
know if you see any issues.

Current set of patches apply on 4.3-rc4. Need to pull in clk-next
(for a dependent patch) to be able to test on ifc6410 board.

Changes since v3:
* Dropped 'clk: qcom: create virtual child device for TSENS' which
is picked up by Stephen
* Updated GCC bindings with optional TSENS properties

Changes since v2:
* Minor review fixes from Stephen/Punit and rebase on 4.3-rc4

Changes since v1:
* Created virtual tsens device from gcc driver for 8960,
with DT having a single node for gcc and tsens
* Minor fixes with rebasing on 4.3-rc1

Changes since RFC:
* Added support for 8916 and 8084
* Based off the latest nvmem framework patches [1]
* Minor review fixes for comments mostly from Lina

This is an attempt to have a single TSENS driver for
the different versions of the TSENS IP that exist, on
different qcom msm/apq SoCs'
Support is added for msm8916, msm8960 and msm8974 families.

A lot of the work is based of original code from Stephen Boyd
and Siddartha Mohanadoss. I have also picked some of what
Narendran Rajan did in his attempt to upstream the support
for 8960 family. I could not keep the original authorship on
any of the patches because I ended up moving the code around
quite a bit in an effort to have a single driver for the
various devices. I would be glad to change the authorship
for any of the patches if needed.

Rajendra Nayak (8):
  thermal: qcom: tsens: Add a skeletal TSENS drivers
  thermal: qcom: tsens-8916: Add support for 8916 family of SoCs
  thermal: qcom: tsens-8974: Add support for 8974 family of SoCs
  thermal: qcom: tsens-8960: Add support for 8960 family of SoCs
  arm: dts: msm8974: Add thermal zones, tsens and qfprom nodes
  arm: dts: apq8064: Add thermal zones, tsens and qfprom nodes
  arm: dts: apq8084: Add thermal zones, tsens and qfprom nodes
  arm64: dts: msm8916: Add thermal zones, tsens and qfprom nodes

 .../devicetree/bindings/clock/qcom,gcc.txt |  20 ++
 .../devicetree/bindings/thermal/qcom-tsens.txt |  33 +++
 arch/arm/boot/dts/qcom-apq8064.dtsi| 101 +++
 arch/arm/boot/dts/qcom-apq8084.dtsi| 105 
 arch/arm/boot/dts/qcom-msm8974.dtsi| 105 
 arch/arm64/boot/dts/qcom/msm8916.dtsi  |  66 +
 drivers/thermal/Kconfig|   5 +
 drivers/thermal/Makefile   |   1 +
 drivers/thermal/qcom/Kconfig   |  10 +
 drivers/thermal/qcom/Makefile  |   2 +
 drivers/thermal/qcom/tsens-8916.c  | 107 
 drivers/thermal/qcom/tsens-8960.c  | 291 +
 drivers/thermal/qcom/tsens-8974.c  | 239 +
 drivers/thermal/qcom/tsens-common.c| 130 +
 drivers/thermal/qcom/tsens.c   | 206 +++
 drivers/thermal/qcom/tsens.h   |  69 +
 16 files changed, 1490 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/thermal/qcom-tsens.txt
 create mode 100644 drivers/thermal/qcom/Kconfig
 create mode 100644 drivers/thermal/qcom/Makefile
 create mode 100644 drivers/thermal/qcom/tsens-8916.c
 create mode 100644 drivers/thermal/qcom/tsens-8960.c
 create mode 100644 drivers/thermal/qcom/tsens-8974.c
 create mode 100644 drivers/thermal/qcom/tsens-common.c
 create mode 100644 drivers/thermal/qcom/tsens.c
 create mode 100644 drivers/thermal/qcom/tsens.h

-- 
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Re: [PATCH 4/4] arm64: dts: apq8016-sbc: enable spi buses on LS and HS

2015-10-09 Thread Srinivas Kandagatla 



On 08/10/15 19:16, Stephen Boyd wrote:

On 10/08/2015 04:19 AM, Srinivas Kandagatla wrote:

This patch enables spi buses on low speed and high speed expansion
connectors on DB410C

Signed-off-by: Srinivas Kandagatla 
---
  arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 10 ++
  1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi 
b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 3581272..d872654 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -92,11 +92,21 @@
status = "okay";
  };

+_spi3 {
+   /* On High speed expansion */
+   status = "okay";
+};
+
  _i2c4 {
/* On High speed expansion */
status = "okay";
  };

+_spi5 {
+   /* On Low speed expansion */
+   status = "okay";
+};
+
  _i2c6 {
/* On Low speed expansion */
status = "okay";


We've been using absolute nodes to mark device nodes as status = "okay".
Can we keep doing that here please?


Sure, I will re-spin a new version.

--srini



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[PATCH v2 0/4] arm64: dts: qcom: add support to LS and HS connectors

2015-10-09 Thread Srinivas Kandagatla 
Hi Andy, 

This patchset adds support for i2c and spi on High-Speed and Low speed
connectors on DB410c.
One of the patch fixes the sleep state of existing i2c node.

thanks,
srini

Changes since v1:
- removed useless comment spotted by Stephen Boyd.
- Use absolute names instead of lables for consistency suggested by 
Stephen Boyd.

Srinivas Kandagatla (4):
  arm64: dts: fix i2c pinconf sleep state function
  arm64: dts: qcom: Add msm8916 I2C nodes.
  arm64: dts: apq8016-sbc: enable i2c buses on LS and HS
  arm64: dts: apq8016-sbc: enable spi buses on LS and HS

 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi  | 25 +++
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 50 +-
 arch/arm64/boot/dts/qcom/msm8916.dtsi  | 30 ++
 3 files changed, 104 insertions(+), 1 deletion(-)

-- 
1.9.1

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[PATCH v2 0/7] Qualcomm WCNSS HCI support

2015-10-09 Thread Bjorn Andersson 
After trying to avoid implementing multi-channel support in SMD in v1 of
the HCI driver for Qualcomm WCNSS BT, this new version includes the
necessary SMD refactoring and additon of an API that allows SMD devices
to call back into the SMD core to acquire additonal channels.

The additional channels are tied to the existing SMD device and the life
cycle of the new channel will be tied to, and affect, the original
channel.

With this in place the btqcomsmd driver is refactored into being a
single driver, without global state.

Bjorn Andersson (7):
  soc: qcom: smd: Introduce callback setter
  soc: qcom: smd: Split discovery and state change work
  soc: qcom: smd: Refactor channel open and close handling
  soc: qcom: smd: Support multiple channels per sdev
  soc: qcom: smd: Support opening additional channels
  Bluetooth: Add HCI device identifier for Qualcomm SMD
  Bluetooth: hci_smd: Qualcomm WCNSS HCI driver

 drivers/bluetooth/Kconfig |  11 ++
 drivers/bluetooth/Makefile|   1 +
 drivers/bluetooth/btqcomsmd.c | 198 
 drivers/soc/qcom/smd.c| 228 +++---
 include/linux/soc/qcom/smd.h  |   8 +-
 include/net/bluetooth/hci.h   |   1 +
 6 files changed, 387 insertions(+), 60 deletions(-)
 create mode 100644 drivers/bluetooth/btqcomsmd.c

-- 
2.4.2

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[PATCH v2 5/7] soc: qcom: smd: Support opening additional channels

2015-10-09 Thread Bjorn Andersson 
With the qcom_smd_open_channel() API we allow SMD devices to open
additional SMD channels, to allow implementation of multi-channel SMD
devices - like Bluetooth.

Channels are opened from the same edge as the calling SMD device is tied
to.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- New patch

 drivers/soc/qcom/smd.c   | 75 
 include/linux/soc/qcom/smd.h |  4 +++
 2 files changed, 79 insertions(+)

diff --git a/drivers/soc/qcom/smd.c b/drivers/soc/qcom/smd.c
index 4c55708aac50..3257ba488d3d 100644
--- a/drivers/soc/qcom/smd.c
+++ b/drivers/soc/qcom/smd.c
@@ -129,6 +129,8 @@ struct qcom_smd_edge {
 
unsigned smem_available;
 
+   wait_queue_head_t new_channel_event;
+
struct work_struct scan_work;
struct work_struct state_work;
 };
@@ -1042,6 +1044,76 @@ void qcom_smd_driver_unregister(struct qcom_smd_driver 
*qsdrv)
 }
 EXPORT_SYMBOL(qcom_smd_driver_unregister);
 
+static struct qcom_smd_channel *
+qcom_smd_find_channel(struct qcom_smd_edge *edge, const char *name)
+{
+   struct qcom_smd_channel *channel;
+   struct qcom_smd_channel *ret = NULL;
+   unsigned state;
+
+   read_lock(>channels_lock);
+   list_for_each_entry(channel, >channels, list) {
+   if (strcmp(channel->name, name))
+   continue;
+
+   state = GET_RX_CHANNEL_INFO(channel, state);
+   if (state != SMD_CHANNEL_OPENING &&
+   state != SMD_CHANNEL_OPENED)
+   continue;
+
+   ret = channel;
+   break;
+   }
+   read_unlock(>channels_lock);
+
+   return ret;
+}
+
+/**
+ * qcom_smd_open_channel() - claim additional channels on the same edge
+ * @sdev:  smd_device handle
+ * @name:  channel name
+ * @cb:callback method to use for incoming data
+ *
+ * Returns a channel handle on success, or -EPROBE_DEFER if the channel isn't
+ * ready.
+ */
+struct qcom_smd_channel *qcom_smd_open_channel(struct qcom_smd_device *sdev,
+  const char *name,
+  qcom_smd_cb_t cb)
+{
+   struct qcom_smd_channel *channel;
+   struct qcom_smd_edge *edge = sdev->channel->edge;
+   int ret;
+
+   /* Wait up to HZ for the channel to appear */
+   ret = wait_event_interruptible_timeout(edge->new_channel_event,
+   (channel = qcom_smd_find_channel(edge, name)) != NULL,
+   HZ);
+   if (!ret)
+   return ERR_PTR(-ETIMEDOUT);
+
+   if (channel->state != SMD_CHANNEL_CLOSED) {
+   dev_err(>dev, "channel %s is busy\n", channel->name);
+   return ERR_PTR(-EBUSY);
+   }
+
+   channel->qsdev = sdev;
+   ret = qcom_smd_channel_open(channel, cb);
+   if (ret) {
+   channel->qsdev = NULL;
+   return ERR_PTR(ret);
+   }
+
+   /*
+* Append the list of channel to the channels associated with the sdev
+*/
+   list_add_tail(>dev_list, >channel->dev_list);
+
+   return channel;
+}
+EXPORT_SYMBOL(qcom_smd_open_channel);
+
 /*
  * Allocate the qcom_smd_channel object for a newly found smd channel,
  * retrieving and validating the smem items involved.
@@ -1178,6 +1250,8 @@ static void qcom_channel_scan_worker(struct work_struct 
*work)
 
dev_dbg(smd->dev, "new channel found: '%s'\n", 
channel->name);
set_bit(i, edge->allocated[tbl]);
+
+   wake_up_interruptible(>new_channel_event);
}
}
 
@@ -1340,6 +1414,7 @@ static int qcom_smd_probe(struct platform_device *pdev)
for_each_available_child_of_node(pdev->dev.of_node, node) {
edge = >edges[i++];
edge->smd = smd;
+   init_waitqueue_head(>new_channel_event);
 
ret = qcom_smd_parse_edge(>dev, node, edge);
if (ret)
diff --git a/include/linux/soc/qcom/smd.h b/include/linux/soc/qcom/smd.h
index 65a64fcdb1aa..bd51c8a9d807 100644
--- a/include/linux/soc/qcom/smd.h
+++ b/include/linux/soc/qcom/smd.h
@@ -56,4 +56,8 @@ void qcom_smd_driver_unregister(struct qcom_smd_driver *drv);
 
 int qcom_smd_send(struct qcom_smd_channel *channel, const void *data, int len);
 
+struct qcom_smd_channel *qcom_smd_open_channel(struct qcom_smd_device *sdev,
+  const char *name,
+  qcom_smd_cb_t cb);
+
 #endif
-- 
2.4.2

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[PATCH v2 1/7] soc: qcom: smd: Introduce callback setter

2015-10-09 Thread Bjorn Andersson 
Introduce a setter for the callback function pointer to clarify the
locking around the operation and to reduce some duplication.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- New patch

 drivers/soc/qcom/smd.c   | 25 +
 include/linux/soc/qcom/smd.h |  4 +++-
 2 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/drivers/soc/qcom/smd.c b/drivers/soc/qcom/smd.c
index 18964f154383..8b401d89b0d0 100644
--- a/drivers/soc/qcom/smd.c
+++ b/drivers/soc/qcom/smd.c
@@ -186,7 +186,7 @@ struct qcom_smd_channel {
int fifo_size;
 
void *bounce_buffer;
-   int (*cb)(struct qcom_smd_device *, const void *, size_t);
+   qcom_smd_cb_t cb;
 
spinlock_t recv_lock;
 
@@ -378,6 +378,19 @@ static void qcom_smd_channel_reset(struct qcom_smd_channel 
*channel)
 }
 
 /*
+ * Set the callback for a channel, with appropriate locking
+ */
+static void qcom_smd_channel_set_callback(struct qcom_smd_channel *channel,
+ qcom_smd_cb_t cb)
+{
+   unsigned long flags;
+
+   spin_lock_irqsave(>recv_lock, flags);
+   channel->cb = cb;
+   spin_unlock_irqrestore(>recv_lock, flags);
+};
+
+/*
  * Calculate the amount of data available in the rx fifo
  */
 static size_t qcom_smd_channel_get_rx_avail(struct qcom_smd_channel *channel)
@@ -815,8 +828,7 @@ static int qcom_smd_dev_probe(struct device *dev)
if (!channel->bounce_buffer)
return -ENOMEM;
 
-   channel->cb = qsdrv->callback;
-
+   qcom_smd_channel_set_callback(channel, qsdrv->callback);
qcom_smd_channel_set_state(channel, SMD_CHANNEL_OPENING);
 
qcom_smd_channel_set_state(channel, SMD_CHANNEL_OPENED);
@@ -832,7 +844,7 @@ static int qcom_smd_dev_probe(struct device *dev)
 err:
dev_err(>dev, "probe failed\n");
 
-   channel->cb = NULL;
+   qcom_smd_channel_set_callback(channel, NULL);
kfree(channel->bounce_buffer);
channel->bounce_buffer = NULL;
 
@@ -851,16 +863,13 @@ static int qcom_smd_dev_remove(struct device *dev)
struct qcom_smd_device *qsdev = to_smd_device(dev);
struct qcom_smd_driver *qsdrv = to_smd_driver(dev);
struct qcom_smd_channel *channel = qsdev->channel;
-   unsigned long flags;
 
qcom_smd_channel_set_state(channel, SMD_CHANNEL_CLOSING);
 
/*
 * Make sure we don't race with the code receiving data.
 */
-   spin_lock_irqsave(>recv_lock, flags);
-   channel->cb = NULL;
-   spin_unlock_irqrestore(>recv_lock, flags);
+   qcom_smd_channel_set_callback(channel, NULL);
 
/* Wake up any sleepers in qcom_smd_send() */
wake_up_interruptible(>fblockread_event);
diff --git a/include/linux/soc/qcom/smd.h b/include/linux/soc/qcom/smd.h
index d0cb6d189a0a..65a64fcdb1aa 100644
--- a/include/linux/soc/qcom/smd.h
+++ b/include/linux/soc/qcom/smd.h
@@ -26,6 +26,8 @@ struct qcom_smd_device {
struct qcom_smd_channel *channel;
 };
 
+typedef int (*qcom_smd_cb_t)(struct qcom_smd_device *, const void *, size_t);
+
 /**
  * struct qcom_smd_driver - smd driver struct
  * @driver:underlying device driver
@@ -42,7 +44,7 @@ struct qcom_smd_driver {
 
int (*probe)(struct qcom_smd_device *dev);
void (*remove)(struct qcom_smd_device *dev);
-   int (*callback)(struct qcom_smd_device *, const void *, size_t);
+   qcom_smd_cb_t callback;
 };
 
 int qcom_smd_driver_register(struct qcom_smd_driver *drv);
-- 
2.4.2

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[PATCH v2 2/7] soc: qcom: smd: Split discovery and state change work

2015-10-09 Thread Bjorn Andersson 
Split the two steps of channel discovery and state change handling into
two different workers. This allows for new channels to be found while
we're are probing, which is required as we introduce multi-channel
support.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- New patch

 drivers/soc/qcom/smd.c | 58 +-
 1 file changed, 29 insertions(+), 29 deletions(-)

diff --git a/drivers/soc/qcom/smd.c b/drivers/soc/qcom/smd.c
index 8b401d89b0d0..fb5f91efd0da 100644
--- a/drivers/soc/qcom/smd.c
+++ b/drivers/soc/qcom/smd.c
@@ -106,9 +106,9 @@ static const struct {
  * @channels:  list of all channels detected on this edge
  * @channels_lock: guard for modifications of @channels
  * @allocated: array of bitmaps representing already allocated channels
- * @need_rescan:   flag that the @work needs to scan smem for new channels
  * @smem_available:last available amount of smem triggering a channel scan
- * @work:  work item for edge house keeping
+ * @scan_work: work item for discovering new channels
+ * @state_work:work item for edge state changes
  */
 struct qcom_smd_edge {
struct qcom_smd *smd;
@@ -123,14 +123,14 @@ struct qcom_smd_edge {
int ipc_bit;
 
struct list_head channels;
-   spinlock_t channels_lock;
+   rwlock_t channels_lock;
 
DECLARE_BITMAP(allocated[SMD_ALLOC_TBL_COUNT], SMD_ALLOC_TBL_SIZE);
 
-   bool need_rescan;
unsigned smem_available;
 
-   struct work_struct work;
+   struct work_struct scan_work;
+   struct work_struct state_work;
 };
 
 /*
@@ -624,13 +624,13 @@ static irqreturn_t qcom_smd_edge_intr(int irq, void *data)
/*
 * Handle state changes or data on each of the channels on this edge
 */
-   spin_lock(>channels_lock);
+   read_lock(>channels_lock);
list_for_each_entry(channel, >channels, list) {
spin_lock(>recv_lock);
kick_worker |= qcom_smd_channel_intr(channel);
spin_unlock(>recv_lock);
}
-   spin_unlock(>channels_lock);
+   read_unlock(>channels_lock);
 
/*
 * Creating a new channel requires allocating an smem entry, so we only
@@ -640,12 +640,11 @@ static irqreturn_t qcom_smd_edge_intr(int irq, void *data)
available = qcom_smem_get_free_space(edge->remote_pid);
if (available != edge->smem_available) {
edge->smem_available = available;
-   edge->need_rescan = true;
kick_worker = true;
}
 
if (kick_worker)
-   schedule_work(>work);
+   schedule_work(>scan_work);
 
return IRQ_HANDLED;
 }
@@ -1101,8 +1100,9 @@ free_name_and_channel:
  * qcom_smd_create_channel() to create representations of these and add
  * them to the edge's list of channels.
  */
-static void qcom_discover_channels(struct qcom_smd_edge *edge)
+static void qcom_channel_scan_worker(struct work_struct *work)
 {
+   struct qcom_smd_edge *edge = container_of(work, struct qcom_smd_edge, 
scan_work);
struct qcom_smd_alloc_entry *alloc_tbl;
struct qcom_smd_alloc_entry *entry;
struct qcom_smd_channel *channel;
@@ -1146,16 +1146,16 @@ static void qcom_discover_channels(struct qcom_smd_edge 
*edge)
if (IS_ERR(channel))
continue;
 
-   spin_lock_irqsave(>channels_lock, flags);
+   write_lock_irqsave(>channels_lock, flags);
list_add(>list, >channels);
-   spin_unlock_irqrestore(>channels_lock, flags);
+   write_unlock_irqrestore(>channels_lock, flags);
 
dev_dbg(smd->dev, "new channel found: '%s'\n", 
channel->name);
set_bit(i, edge->allocated[tbl]);
}
}
 
-   schedule_work(>work);
+   schedule_work(>state_work);
 }
 
 /*
@@ -1163,29 +1163,22 @@ static void qcom_discover_channels(struct qcom_smd_edge 
*edge)
  * then scans all registered channels for state changes that should be handled
  * by creating or destroying smd client devices for the registered channels.
  *
- * LOCKING: edge->channels_lock is not needed to be held during the traversal
- * of the channels list as it's done synchronously with the only writer.
+ * LOCKING: edge->channels_lock only needs to cover the list operations, as the
+ * worker is killed before any channels are deallocated
  */
 static void qcom_channel_state_worker(struct work_struct *work)
 {
struct qcom_smd_channel *channel;
struct qcom_smd_edge *edge = container_of(work,
  struct qcom_smd_edge,
- work);
+ state_work);
unsigned

Re: [PATCH v2 7/7] Bluetooth: btqcomsmd: Qualcomm WCNSS HCI driver

2015-10-09 Thread Marcel Holtmann 
Hi Bjorn,

> The Qualcomm WCNSS chip provides two SMD channels to the BT core; one
> for command and one for event packets. This driver exposes the two
> channels as a hci device.
> 
> Signed-off-by: Bjorn Andersson 
> ---
> 
> Changes since v1:
> - With the introduction of qcom_smd_open_channel() the two drivers are now one
> - No more global state
> - Corrected memory management of sk_buffs
> - Reverted to __hci_cmd_sync_ev() for set_bdaddr
> - Renamed the driver to btqcomsmd
> - Split out the addition of HCI_SMD to separate patch
> 
> drivers/bluetooth/Kconfig |  11 +++
> drivers/bluetooth/Makefile|   1 +
> drivers/bluetooth/btqcomsmd.c | 198 ++
> 3 files changed, 210 insertions(+)
> create mode 100644 drivers/bluetooth/btqcomsmd.c
> 
> diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
> index 62999546a301..1652997e59cc 100644
> --- a/drivers/bluetooth/Kconfig
> +++ b/drivers/bluetooth/Kconfig
> @@ -169,6 +169,17 @@ config BT_HCIUART_QCA
> 
> Say Y here to compile support for QCA protocol.
> 
> +config BT_QCOMSMD
> + tristate "Qualcomm SMD based HCI support"
> + depends on QCOM_SMD
> + help
> +   Qualcomm SMD based HCI driver.
> +   This driver is used to bridge HCI data onto the shared memory
> +   channels to the WCNSS core.
> +
> +   Say Y here to compile support for HCI over Qualcomm SMD into the
> +   kernelor say M to compile as a module.
> +
> config BT_HCIBCM203X
>   tristate "HCI BCM203x USB driver"
>   depends on USB
> diff --git a/drivers/bluetooth/Makefile b/drivers/bluetooth/Makefile
> index 07c9cf381e5a..19e313bf8c39 100644
> --- a/drivers/bluetooth/Makefile
> +++ b/drivers/bluetooth/Makefile
> @@ -23,6 +23,7 @@ obj-$(CONFIG_BT_WILINK) += btwilink.o
> obj-$(CONFIG_BT_BCM)  += btbcm.o
> obj-$(CONFIG_BT_RTL)  += btrtl.o
> obj-$(CONFIG_BT_QCA)  += btqca.o
> +obj-$(CONFIG_BT_QCOMSMD) += btqcomsmd.o
> 
> btmrvl-y  := btmrvl_main.o
> btmrvl-$(CONFIG_DEBUG_FS) += btmrvl_debugfs.o
> diff --git a/drivers/bluetooth/btqcomsmd.c b/drivers/bluetooth/btqcomsmd.c
> new file mode 100644
> index ..4b91c830531e
> --- /dev/null
> +++ b/drivers/bluetooth/btqcomsmd.c
> @@ -0,0 +1,198 @@
> +/*
> + * Copyright (c) 2015, Sony Mobile Communications Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define EDL_NVM_ACCESS_SET_REQ_CMD   0x01
> +#define EDL_NVM_ACCESS_OPCODE0xfc0b
> +
> +struct btqcomsmd {
> + struct qcom_smd_channel *acl_channel;
> + struct qcom_smd_channel *cmd_channel;
> +};
> +
> +static int btqcomsmd_recv(struct hci_dev *hdev,
> +   unsigned type,
> +   const void *data,
> +   size_t count)

you are overdoing it here. Place as many parameters in one line as long as they 
are below 80 chars. Only then put them on the next line. One param per line is 
too much.

> +{
> + struct sk_buff *skb;
> + void *buf;
> +
> + /* Use GFP_ATOMIC as we're in IRQ context */
> + skb = bt_skb_alloc(count, GFP_ATOMIC);
> + if (!skb)
> + return -ENOMEM;
> +
> + bt_cb(skb)->pkt_type = type;
> +
> + /* Use io accessor as data might be ioremapped */
> + buf = skb_put(skb, count);
> + memcpy_fromio(buf, data, count);

memcpy_fromio(skb_put(skb, count), data, count);

Avoid the extra buf variable.

> +
> + return hci_recv_frame(hdev, skb);
> +}
> +
> +static int btqcomsmd_acl_callback(struct qcom_smd_device *qsdev,
> +   const void *data,
> +   size_t count)
> +{
> + struct hci_dev *hdev = dev_get_drvdata(>dev);
> +
> + return btqcomsmd_recv(hdev, HCI_ACLDATA_PKT, data, count);
> +}
> +
> +static int btqcomsmd_cmd_callback(struct qcom_smd_device *qsdev,
> +   const void *data,
> +   size_t count)
> +{
> + struct hci_dev *hdev = dev_get_drvdata(>dev);
> +
> + return btqcomsmd_recv(hdev, HCI_EVENT_PKT, data, count);
> +}
> +
> +static int btqcomsmd_send(struct hci_dev *hdev, struct sk_buff *skb)
> +{
> + struct btqcomsmd *btq = hci_get_drvdata(hdev);
> + int ret;
> +
> + switch (bt_cb(skb)->pkt_type) {
> + case HCI_ACLDATA_PKT:
> + case HCI_SCODATA_PKT:
> + ret =

[PATCH v2 7/7] Bluetooth: btqcomsmd: Qualcomm WCNSS HCI driver

2015-10-09 Thread Bjorn Andersson 
The Qualcomm WCNSS chip provides two SMD channels to the BT core; one
for command and one for event packets. This driver exposes the two
channels as a hci device.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- With the introduction of qcom_smd_open_channel() the two drivers are now one
- No more global state
- Corrected memory management of sk_buffs
- Reverted to __hci_cmd_sync_ev() for set_bdaddr
- Renamed the driver to btqcomsmd
- Split out the addition of HCI_SMD to separate patch

 drivers/bluetooth/Kconfig |  11 +++
 drivers/bluetooth/Makefile|   1 +
 drivers/bluetooth/btqcomsmd.c | 198 ++
 3 files changed, 210 insertions(+)
 create mode 100644 drivers/bluetooth/btqcomsmd.c

diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 62999546a301..1652997e59cc 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -169,6 +169,17 @@ config BT_HCIUART_QCA
 
  Say Y here to compile support for QCA protocol.
 
+config BT_QCOMSMD
+   tristate "Qualcomm SMD based HCI support"
+   depends on QCOM_SMD
+   help
+ Qualcomm SMD based HCI driver.
+ This driver is used to bridge HCI data onto the shared memory
+ channels to the WCNSS core.
+
+ Say Y here to compile support for HCI over Qualcomm SMD into the
+ kernelor say M to compile as a module.
+
 config BT_HCIBCM203X
tristate "HCI BCM203x USB driver"
depends on USB
diff --git a/drivers/bluetooth/Makefile b/drivers/bluetooth/Makefile
index 07c9cf381e5a..19e313bf8c39 100644
--- a/drivers/bluetooth/Makefile
+++ b/drivers/bluetooth/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_BT_WILINK)   += btwilink.o
 obj-$(CONFIG_BT_BCM)   += btbcm.o
 obj-$(CONFIG_BT_RTL)   += btrtl.o
 obj-$(CONFIG_BT_QCA)   += btqca.o
+obj-$(CONFIG_BT_QCOMSMD)   += btqcomsmd.o
 
 btmrvl-y   := btmrvl_main.o
 btmrvl-$(CONFIG_DEBUG_FS)  += btmrvl_debugfs.o
diff --git a/drivers/bluetooth/btqcomsmd.c b/drivers/bluetooth/btqcomsmd.c
new file mode 100644
index ..4b91c830531e
--- /dev/null
+++ b/drivers/bluetooth/btqcomsmd.c
@@ -0,0 +1,198 @@
+/*
+ * Copyright (c) 2015, Sony Mobile Communications Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define EDL_NVM_ACCESS_SET_REQ_CMD 0x01
+#define EDL_NVM_ACCESS_OPCODE  0xfc0b
+
+struct btqcomsmd {
+   struct qcom_smd_channel *acl_channel;
+   struct qcom_smd_channel *cmd_channel;
+};
+
+static int btqcomsmd_recv(struct hci_dev *hdev,
+ unsigned type,
+ const void *data,
+ size_t count)
+{
+   struct sk_buff *skb;
+   void *buf;
+
+   /* Use GFP_ATOMIC as we're in IRQ context */
+   skb = bt_skb_alloc(count, GFP_ATOMIC);
+   if (!skb)
+   return -ENOMEM;
+
+   bt_cb(skb)->pkt_type = type;
+
+   /* Use io accessor as data might be ioremapped */
+   buf = skb_put(skb, count);
+   memcpy_fromio(buf, data, count);
+
+   return hci_recv_frame(hdev, skb);
+}
+
+static int btqcomsmd_acl_callback(struct qcom_smd_device *qsdev,
+ const void *data,
+ size_t count)
+{
+   struct hci_dev *hdev = dev_get_drvdata(>dev);
+
+   return btqcomsmd_recv(hdev, HCI_ACLDATA_PKT, data, count);
+}
+
+static int btqcomsmd_cmd_callback(struct qcom_smd_device *qsdev,
+ const void *data,
+ size_t count)
+{
+   struct hci_dev *hdev = dev_get_drvdata(>dev);
+
+   return btqcomsmd_recv(hdev, HCI_EVENT_PKT, data, count);
+}
+
+static int btqcomsmd_send(struct hci_dev *hdev, struct sk_buff *skb)
+{
+   struct btqcomsmd *btq = hci_get_drvdata(hdev);
+   int ret;
+
+   switch (bt_cb(skb)->pkt_type) {
+   case HCI_ACLDATA_PKT:
+   case HCI_SCODATA_PKT:
+   ret = qcom_smd_send(btq->acl_channel, skb->data, skb->len);
+   break;
+   case HCI_COMMAND_PKT:
+   ret = qcom_smd_send(btq->cmd_channel, skb->data, skb->len);
+   break;
+   default:
+   ret = -ENODEV;
+   break;
+   }
+
+   return ret;
+}
+
+static int btqcomsmd_open(struct hci_dev *hdev)
+{
+   set_bit(HCI_RUNNING, >flags);
+   return 0;
+}
+
+static int btqcomsmd_close(struct hci_dev

[PATCH v2 3/7] soc: qcom: smd: Refactor channel open and close handling

2015-10-09 Thread Bjorn Andersson 
Refactor opening and closing of channels into two separate functions
instead of open coding this in the various places.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- New patch

 drivers/soc/qcom/smd.c | 62 --
 1 file changed, 40 insertions(+), 22 deletions(-)

diff --git a/drivers/soc/qcom/smd.c b/drivers/soc/qcom/smd.c
index fb5f91efd0da..669bda585dad 100644
--- a/drivers/soc/qcom/smd.c
+++ b/drivers/soc/qcom/smd.c
@@ -806,18 +806,12 @@ static int qcom_smd_dev_match(struct device *dev, struct 
device_driver *drv)
 }
 
 /*
- * Probe the smd client.
- *
- * The remote side have indicated that it want the channel to be opened, so
- * complete the state handshake and probe our client driver.
+ * Helper for opening a channel
  */
-static int qcom_smd_dev_probe(struct device *dev)
+static int qcom_smd_channel_open(struct qcom_smd_channel *channel,
+qcom_smd_cb_t cb)
 {
-   struct qcom_smd_device *qsdev = to_smd_device(dev);
-   struct qcom_smd_driver *qsdrv = to_smd_driver(dev);
-   struct qcom_smd_channel *channel = qsdev->channel;
size_t bb_size;
-   int ret;
 
/*
 * Packets are maximum 4k, but reduce if the fifo is smaller
@@ -827,11 +821,44 @@ static int qcom_smd_dev_probe(struct device *dev)
if (!channel->bounce_buffer)
return -ENOMEM;
 
-   qcom_smd_channel_set_callback(channel, qsdrv->callback);
+   qcom_smd_channel_set_callback(channel, cb);
qcom_smd_channel_set_state(channel, SMD_CHANNEL_OPENING);
-
qcom_smd_channel_set_state(channel, SMD_CHANNEL_OPENED);
 
+   return 0;
+}
+
+/*
+ * Helper for closing and resetting a channel
+ */
+static void qcom_smd_channel_close(struct qcom_smd_channel *channel)
+{
+   qcom_smd_channel_set_callback(channel, NULL);
+
+   kfree(channel->bounce_buffer);
+   channel->bounce_buffer = NULL;
+
+   qcom_smd_channel_set_state(channel, SMD_CHANNEL_CLOSED);
+   qcom_smd_channel_reset(channel);
+}
+
+/*
+ * Probe the smd client.
+ *
+ * The remote side have indicated that it want the channel to be opened, so
+ * complete the state handshake and probe our client driver.
+ */
+static int qcom_smd_dev_probe(struct device *dev)
+{
+   struct qcom_smd_device *qsdev = to_smd_device(dev);
+   struct qcom_smd_driver *qsdrv = to_smd_driver(dev);
+   struct qcom_smd_channel *channel = qsdev->channel;
+   int ret;
+
+   ret = qcom_smd_channel_open(channel, qsdrv->callback);
+   if (ret)
+   return ret;
+
ret = qsdrv->probe(qsdev);
if (ret)
goto err;
@@ -843,11 +870,7 @@ static int qcom_smd_dev_probe(struct device *dev)
 err:
dev_err(>dev, "probe failed\n");
 
-   qcom_smd_channel_set_callback(channel, NULL);
-   kfree(channel->bounce_buffer);
-   channel->bounce_buffer = NULL;
-
-   qcom_smd_channel_set_state(channel, SMD_CHANNEL_CLOSED);
+   qcom_smd_channel_close(channel);
return ret;
 }
 
@@ -884,12 +907,7 @@ static int qcom_smd_dev_remove(struct device *dev)
 * The client is now gone, cleanup and reset the channel state.
 */
channel->qsdev = NULL;
-   kfree(channel->bounce_buffer);
-   channel->bounce_buffer = NULL;
-
-   qcom_smd_channel_set_state(channel, SMD_CHANNEL_CLOSED);
-
-   qcom_smd_channel_reset(channel);
+   qcom_smd_channel_close(channel);
 
return 0;
 }
-- 
2.4.2

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[PATCH v2 6/7] Bluetooth: Add HCI device identifier for Qualcomm SMD

2015-10-09 Thread Bjorn Andersson 
This patch assigns the next free HCI device identifier to Bluetooth
devices based on the Qualcomm Shared Memory channels.

Signed-off-by: Bjorn Andersson 
---

Changes since v1:
- Split out this from the btqcomsmd patch

 include/net/bluetooth/hci.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h
index e7f938cac7c6..adfb371a19f9 100644
--- a/include/net/bluetooth/hci.h
+++ b/include/net/bluetooth/hci.h
@@ -60,6 +60,7 @@
 #define HCI_RS232  4
 #define HCI_PCI5
 #define HCI_SDIO   6
+#define HCI_SMD7
 
 /* HCI controller types */
 #define HCI_BREDR  0x00
-- 
2.4.2

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[PATCH] soc: qcom: smd: Correct SMEM items for upper channels

2015-10-09 Thread Bjorn Andersson 
Update the SMEM items for the second set of SMD channels, as these where
incorrect.

Signed-off-by: Bjorn Andersson 
---
 drivers/soc/qcom/smd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/qcom/smd.c b/drivers/soc/qcom/smd.c
index 18964f1..e7fb8fa 100644
--- a/drivers/soc/qcom/smd.c
+++ b/drivers/soc/qcom/smd.c
@@ -87,8 +87,8 @@ static const struct {
.fifo_base_id = 338
},
{
-   .alloc_tbl_id = 14,
-   .info_base_id = 266,
+   .alloc_tbl_id = 266,
+   .info_base_id = 138,
.fifo_base_id = 202,
},
 };
-- 
2.3.2 (Apple Git-55)

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[RESEND PATCH] soc: qcom: smd: Correct SMEM items for upper channels

2015-10-09 Thread bjorn 
From: Bjorn Andersson 

Update the SMEM items for the second set of SMD channels, as these where
incorrect.

Signed-off-by: Bjorn Andersson 
---

Corrected .gitconfig mishap which gave wrong author.

 drivers/soc/qcom/smd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/qcom/smd.c b/drivers/soc/qcom/smd.c
index 18964f1..e7fb8fa 100644
--- a/drivers/soc/qcom/smd.c
+++ b/drivers/soc/qcom/smd.c
@@ -87,8 +87,8 @@ static const struct {
.fifo_base_id = 338
},
{
-   .alloc_tbl_id = 14,
-   .info_base_id = 266,
+   .alloc_tbl_id = 266,
+   .info_base_id = 138,
.fifo_base_id = 202,
},
 };
-- 
2.3.2 (Apple Git-55)

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Re: [PATCH] arm64: defconfig: Enable devices for MSM8916

2015-10-09 Thread Arnd Bergmann 
On Thursday 08 October 2015 15:37:08 Andy Gross wrote:
> This patch enables a number of devices currently supported by the MSM8916
> boards.  These include I2C, SPI, DMA, SMEM, SMD, and SMD regulator support.
> 
> Signed-off-by: Andy Gross 
> 


Merged into next/defconfig, thanks!

Arnd
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