date:20151022

Re: [PATCH 3/8] crypto: ccp: Use precalculated hash from headers

2015-10-22 Thread Tom Lendacky


On 10/20/2015 02:33 AM, LABBE Corentin wrote:

Precalculated hash for empty message are now present in hash headers.
This patch just use them.

Signed-off-by: LABBE Corentin 


Tested-by: Tom Lendacky 
Acked-by: Tom Lendacky 


---
  drivers/crypto/ccp/ccp-ops.c | 39 ---
  1 file changed, 8 insertions(+), 31 deletions(-)

diff --git a/drivers/crypto/ccp/ccp-ops.c b/drivers/crypto/ccp/ccp-ops.c
index d09c6c4..64fac2b 100644
--- a/drivers/crypto/ccp/ccp-ops.c
+++ b/drivers/crypto/ccp/ccp-ops.c
@@ -152,32 +152,6 @@ static const __be32 ccp_sha256_init[CCP_SHA_CTXSIZE / 
sizeof(__be32)] = {
cpu_to_be32(SHA256_H6), cpu_to_be32(SHA256_H7),
  };

-/* The CCP cannot perform zero-length sha operations so the caller
- * is required to buffer data for the final operation.  However, a
- * sha operation for a message with a total length of zero is valid
- * so known values are required to supply the result.
- */
-static const u8 ccp_sha1_zero[CCP_SHA_CTXSIZE] = {
-   0xda, 0x39, 0xa3, 0xee, 0x5e, 0x6b, 0x4b, 0x0d,
-   0x32, 0x55, 0xbf, 0xef, 0x95, 0x60, 0x18, 0x90,
-   0xaf, 0xd8, 0x07, 0x09, 0x00, 0x00, 0x00, 0x00,
-   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-};
-
-static const u8 ccp_sha224_zero[CCP_SHA_CTXSIZE] = {
-   0xd1, 0x4a, 0x02, 0x8c, 0x2a, 0x3a, 0x2b, 0xc9,
-   0x47, 0x61, 0x02, 0xbb, 0x28, 0x82, 0x34, 0xc4,
-   0x15, 0xa2, 0xb0, 0x1f, 0x82, 0x8e, 0xa6, 0x2a,
-   0xc5, 0xb3, 0xe4, 0x2f, 0x00, 0x00, 0x00, 0x00,
-};
-
-static const u8 ccp_sha256_zero[CCP_SHA_CTXSIZE] = {
-   0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14,
-   0x9a, 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24,
-   0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c,
-   0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55,
-};
-
  static u32 ccp_addr_lo(struct ccp_dma_info *info)
  {
return lower_32_bits(info->address + info->offset);
@@ -1388,18 +1362,21 @@ static int ccp_run_sha_cmd(struct ccp_cmd_queue *cmd_q, 
struct ccp_cmd *cmd)
if (sha->msg_bits)
return -EINVAL;

-   /* A sha operation for a message with a total length of zero,
-* return known result.
+   /* The CCP cannot perform zero-length sha operations so the
+* caller is required to buffer data for the final operation.
+* However, a sha operation for a message with a total length
+* of zero is valid so known values are required to supply
+* the result.
 */
switch (sha->type) {
case CCP_SHA_TYPE_1:
-   sha_zero = ccp_sha1_zero;
+   sha_zero = sha1_zero_message_hash;
break;
case CCP_SHA_TYPE_224:
-   sha_zero = ccp_sha224_zero;
+   sha_zero = sha224_zero_message_hash;
break;
case CCP_SHA_TYPE_256:
-   sha_zero = ccp_sha256_zero;
+   sha_zero = sha256_zero_message_hash;
break;
default:
return -EINVAL;


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[PATCH 1/4] crypto: hifn_795x: replace simple_strtoul by kstrtouint

2015-10-22 Thread LABBE Corentin

The simple_strtoul function is marked as obsolete.
This patch replace it by kstrtouint at the cost of changing some function
return type from void to int.

Signed-off-by: LABBE Corentin 
---
 drivers/crypto/hifn_795x.c | 28 
 1 file changed, 20 insertions(+), 8 deletions(-)

diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index 8d2a772..079b995 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -970,10 +970,11 @@ static void hifn_init_dma(struct hifn_device *dev)
  * 66MHz since according to Mike Ham of HiFn, almost every board in existence
  * has an external crystal populated at 66MHz.
  */
-static void hifn_init_pll(struct hifn_device *dev)
+static int hifn_init_pll(struct hifn_device *dev)
 {
unsigned int freq, m;
u32 pllcfg;
+   int err;
 
pllcfg = HIFN_1_PLL | HIFN_PLL_RESERVED_1;
 
@@ -982,9 +983,11 @@ static void hifn_init_pll(struct hifn_device *dev)
else
pllcfg |= HIFN_PLL_REF_CLK_HBI;
 
-   if (hifn_pll_ref[3] != '\0')
-   freq = simple_strtoul(hifn_pll_ref + 3, NULL, 10);
-   else {
+   if (hifn_pll_ref[3] != '\0') {
+   err = kstrtouint(hifn_pll_ref + 3, 10, );
+   if (err)
+   return err;
+   } else {
freq = 66;
printk(KERN_INFO "hifn795x: assuming %uMHz clock speed, "
 "override with hifn_pll_ref=%.3s\n",
@@ -1021,11 +1024,13 @@ static void hifn_init_pll(struct hifn_device *dev)
 * in slightly larger intervals.
 */
dev->pk_clk_freq = 100 * (freq + 1) * m / 2;
+   return 0;
 }
 
-static void hifn_init_registers(struct hifn_device *dev)
+static int hifn_init_registers(struct hifn_device *dev)
 {
u32 dptr = dev->desc_dma;
+   int err;
 
/* Initialization magic... */
hifn_write_0(dev, HIFN_0_PUCTRL, HIFN_PUCTRL_DMAENA);
@@ -1090,13 +1095,16 @@ static void hifn_init_registers(struct hifn_device *dev)
 #else
hifn_write_0(dev, HIFN_0_PUCNFG, 0x10342);
 #endif
-   hifn_init_pll(dev);
+   err = hifn_init_pll(dev);
+   if (err)
+   return err;
 
hifn_write_0(dev, HIFN_0_PUISR, HIFN_PUISR_DSTOVER);
hifn_write_1(dev, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
HIFN_DMACNFG_DMARESET | HIFN_DMACNFG_MODE | HIFN_DMACNFG_LAST |
((HIFN_POLL_FREQUENCY << 16 ) & HIFN_DMACNFG_POLLFREQ) |
((HIFN_POLL_SCALAR << 8) & HIFN_DMACNFG_POLLINVAL));
+   return 0;
 }
 
 static int hifn_setup_base_command(struct hifn_device *dev, u8 *buf,
@@ -1711,7 +1719,9 @@ static int hifn_start_device(struct hifn_device *dev)
 
hifn_init_dma(dev);
 
-   hifn_init_registers(dev);
+   err = hifn_init_registers(dev);
+   if (err)
+   return err;
 
hifn_init_pubrng(dev);
 
@@ -2763,7 +2773,9 @@ static int __init hifn_init(void)
 * but this chip is currently not supported.
 */
if (hifn_pll_ref[3] != '\0') {
-   freq = simple_strtoul(hifn_pll_ref + 3, NULL, 10);
+   err = kstrtouint(hifn_pll_ref + 3, 10, );
+   if (err)
+   return err;
if (freq < 20 || freq > 100) {
printk(KERN_ERR "hifn795x: invalid hifn_pll_ref "
"frequency, must be in the range "
-- 
2.4.10

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[PATCH] Add select of CONFIG_SRCU by CONFIG_CRYPTO

2015-10-22 Thread Andrej Krutak

Signed-off-by: Andrej Krutak 

---
 crypto/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/crypto/Kconfig b/crypto/Kconfig
index 48ee3e1..c7596ee 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -14,6 +14,7 @@ source "crypto/async_tx/Kconfig"
 #
 menuconfig CRYPTO
tristate "Cryptographic API"
+   select SRCU
help
  This option provides the core Cryptographic API.
 
-- 
1.9.1

-- 
Best regards | S pozdravom | Mit freundlichen Grüßen | Cordialement

Andrej Krutak
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[PATCH 3/4] crypto: hifn_795x: use dev_xx/pr_xx instead of printk

2015-10-22 Thread LABBE Corentin

This patch replace all printk by their dev_xx/pr_xx counterpart.
The patch remove also all custom dprintk by pr_debug/dev_debug

Signed-off-by: LABBE Corentin 
---
 drivers/crypto/hifn_795x.c | 149 -
 1 file changed, 67 insertions(+), 82 deletions(-)

diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index e6bc825..ea490bd 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -38,14 +38,6 @@
 
 #include 
 
-//#define HIFN_DEBUG
-
-#ifdef HIFN_DEBUG
-#define dprintk(f, a...)   printk(f, ##a)
-#else
-#define dprintk(f, a...)   do {} while (0)
-#endif
-
 static char hifn_pll_ref[sizeof("extNNN")] = "ext";
 module_param_string(hifn_pll_ref, hifn_pll_ref, sizeof(hifn_pll_ref), 0444);
 MODULE_PARM_DESC(hifn_pll_ref,
@@ -704,7 +696,7 @@ static void hifn_wait_puc(struct hifn_device *dev)
}
 
if (!i)
-   dprintk("%s: Failed to reset PUC unit.\n", dev->name);
+   dev_err(>pdev->dev, "Failed to reset PUC unit.\n");
 }
 
 static void hifn_reset_puc(struct hifn_device *dev)
@@ -856,15 +848,13 @@ static int hifn_init_pubrng(struct hifn_device *dev)
}
 
if (!i)
-   dprintk("Chip %s: Failed to initialise public key engine.\n",
-   dev->name);
+   dev_err(>pdev->dev, "Failed to initialise public key 
engine.\n");
else {
hifn_write_1(dev, HIFN_1_PUB_IEN, HIFN_PUBIEN_DONE);
dev->dmareg |= HIFN_DMAIER_PUBDONE;
hifn_write_1(dev, HIFN_1_DMA_IER, dev->dmareg);
 
-   dprintk("Chip %s: Public key engine has been successfully "
-   "initialised.\n", dev->name);
+   dev_dbg(>pdev->dev, "Public key engine has been 
successfully initialised.\n");
}
 
/*
@@ -873,8 +863,7 @@ static int hifn_init_pubrng(struct hifn_device *dev)
 
hifn_write_1(dev, HIFN_1_RNG_CONFIG,
hifn_read_1(dev, HIFN_1_RNG_CONFIG) | HIFN_RNGCFG_ENA);
-   dprintk("Chip %s: RNG engine has been successfully initialised.\n",
-   dev->name);
+   dev_dbg(>pdev->dev, "RNG engine has been successfully 
initialised.\n");
 
 #ifdef CONFIG_CRYPTO_DEV_HIFN_795X_RNG
/* First value must be discarded */
@@ -899,7 +888,7 @@ static int hifn_enable_crypto(struct hifn_device *dev)
}
 
if (offtbl == NULL) {
-   dprintk("Chip %s: Unknown card!\n", dev->name);
+   dev_err(>pdev->dev, "Unknown card!\n");
return -ENODEV;
}
 
@@ -922,7 +911,7 @@ static int hifn_enable_crypto(struct hifn_device *dev)
}
hifn_write_1(dev, HIFN_1_DMA_CNFG, dmacfg);
 
-   dprintk("Chip %s: %s.\n", dev->name, pci_name(dev->pdev));
+   dev_dbg(>pdev->dev, "%s %s.\n", dev->name, pci_name(dev->pdev));
 
return 0;
 }
@@ -989,9 +978,8 @@ static int hifn_init_pll(struct hifn_device *dev)
return err;
} else {
freq = 66;
-   printk(KERN_INFO "hifn795x: assuming %uMHz clock speed, "
-"override with hifn_pll_ref=%.3s\n",
-  freq, hifn_pll_ref);
+   dev_info(>pdev->dev, "assuming %uMHz clock speed, override 
with hifn_pll_ref=%.3s\n",
+freq, hifn_pll_ref);
}
 
m = HIFN_PLL_FCK_MAX / freq;
@@ -1481,8 +1469,8 @@ static int ablkcipher_add(unsigned int *drestp, struct 
scatterlist *dst,
drest -= copy;
nbytes -= copy;
 
-   dprintk("%s: copy: %u, size: %u, drest: %u, nbytes: %u.\n",
-   __func__, copy, size, drest, nbytes);
+   pr_debug("%s: copy: %u, size: %u, drest: %u, nbytes: %u.\n",
+__func__, copy, size, drest, nbytes);
 
dst++;
idx++;
@@ -1509,8 +1497,8 @@ static int hifn_cipher_walk(struct ablkcipher_request 
*req,
 
dst = >dst[idx];
 
-   dprintk("\n%s: dlen: %u, doff: %u, offset: %u, nbytes: %u.\n",
-   __func__, dst->length, dst->offset, offset, nbytes);
+   pr_debug("\n%s: dlen: %u, doff: %u, offset: %u, nbytes: %u.\n",
+__func__, dst->length, dst->offset, offset, nbytes);
 
if (!IS_ALIGNED(dst->offset, HIFN_D_DST_DALIGN) ||
!IS_ALIGNED(dst->length, HIFN_D_DST_DALIGN) ||
@@ -1546,14 +1534,13 @@ static int hifn_cipher_walk(struct ablkcipher_request 
*req,
 * Temporary of course...
 * Kick author if you will catch this one.
 */
-   printk(KERN_ERR "%s: dlen: %u, nbytes: %u,"
-   "slen: %u, offset: %u.\n",
-

[PATCH 4/4] crypto: hifn_795x: fix coding style

2015-10-22 Thread LABBE Corentin

The hifn_795x driver is old and have lots of style issue.
This patch try to solve easy ones.

Signed-off-by: LABBE Corentin 
---
 drivers/crypto/hifn_795x.c | 301 +
 1 file changed, 138 insertions(+), 163 deletions(-)

diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index ea490bd..f398f5b 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -11,10 +11,6 @@
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
 #include 
@@ -73,12 +69,12 @@ static atomic_t hifn_dev_number;
 
 /* DMA registres */
 
-#define HIFN_DMA_CRA   0x0C/* DMA Command Ring Address */
-#define HIFN_DMA_SDRA  0x1C/* DMA Source Data Ring Address 
*/
+#define HIFN_DMA_CRA   0x0C/* DMA Command Ring Address */
+#define HIFN_DMA_SDRA  0x1C/* DMA Source Data Ring Address 
*/
 #define HIFN_DMA_RRA   0x2C/* DMA Result Ring Address */
 #define HIFN_DMA_DDRA  0x3C/* DMA Destination Data Ring 
Address */
 #define HIFN_DMA_STCTL 0x40/* DMA Status and Control */
-#define HIFN_DMA_INTREN0x44/* DMA Interrupt Enable */
+#define HIFN_DMA_INTREN0x44/* DMA Interrupt Enable 
*/
 #define HIFN_DMA_CFG1  0x48/* DMA Configuration #1 */
 #define HIFN_DMA_CFG2  0x6C/* DMA Configuration #2 */
 #define HIFN_CHIP_ID   0x98/* Chip ID */
@@ -352,10 +348,10 @@ static atomic_t hifn_dev_number;
 #define HIFN_NAMESIZE  32
 #define HIFN_MAX_RESULT_ORDER  5
 
-#defineHIFN_D_CMD_RSIZE24*1
-#defineHIFN_D_SRC_RSIZE80*1
-#defineHIFN_D_DST_RSIZE80*1
-#defineHIFN_D_RES_RSIZE24*1
+#defineHIFN_D_CMD_RSIZE(24 * 1)
+#defineHIFN_D_SRC_RSIZE(80 * 1)
+#defineHIFN_D_DST_RSIZE(80 * 1)
+#defineHIFN_D_RES_RSIZE(24 * 1)
 
 #define HIFN_D_DST_DALIGN  4
 
@@ -380,17 +376,16 @@ static atomic_t hifn_dev_number;
 #defineHIFN_MAX_RESULT (8 + 4 + 4 + 20 + 4)
 #define HIFN_USED_RESULT   12
 
-struct hifn_desc
-{
+struct hifn_desc {
volatile __le32 l;
volatile __le32 p;
 };
 
 struct hifn_dma {
-   struct hifn_desccmdr[HIFN_D_CMD_RSIZE+1];
-   struct hifn_descsrcr[HIFN_D_SRC_RSIZE+1];
-   struct hifn_descdstr[HIFN_D_DST_RSIZE+1];
-   struct hifn_descresr[HIFN_D_RES_RSIZE+1];
+   struct hifn_desccmdr[HIFN_D_CMD_RSIZE + 1];
+   struct hifn_descsrcr[HIFN_D_SRC_RSIZE + 1];
+   struct hifn_descdstr[HIFN_D_DST_RSIZE + 1];
+   struct hifn_descresr[HIFN_D_RES_RSIZE + 1];
 
u8  
command_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_COMMAND];
u8  result_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_RESULT];
@@ -404,16 +399,15 @@ struct hifn_dma {
int cmdk, srck, dstk, resk;
 };
 
-#define HIFN_FLAG_CMD_BUSY (1<<0)
-#define HIFN_FLAG_SRC_BUSY (1<<1)
-#define HIFN_FLAG_DST_BUSY (1<<2)
-#define HIFN_FLAG_RES_BUSY (1<<3)
-#define HIFN_FLAG_OLD_KEY  (1<<4)
+#define HIFN_FLAG_CMD_BUSY (1 << 0)
+#define HIFN_FLAG_SRC_BUSY (1 << 1)
+#define HIFN_FLAG_DST_BUSY (1 << 2)
+#define HIFN_FLAG_RES_BUSY (1 << 3)
+#define HIFN_FLAG_OLD_KEY  (1 << 4)
 
 #define HIFN_DEFAULT_ACTIVE_NUM5
 
-struct hifn_device
-{
+struct hifn_device {
charname[HIFN_NAMESIZE];
 
int irq;
@@ -426,7 +420,7 @@ struct hifn_device
 
u32 dmareg;
 
-   void*sa[HIFN_D_RES_RSIZE];
+   void*sa[HIFN_D_RES_RSIZE];
 
spinlock_t  lock;
 
@@ -441,7 +435,7 @@ struct hifn_device
 
struct tasklet_struct   tasklet;
 
-   struct crypto_queue queue;
+   struct crypto_queue queue;
struct list_headalg_list;
 
unsigned intpk_clk_freq;
@@ -462,8 +456,7 @@ struct hifn_device
 #defineHIFN_D_JUMP 0x4000
 #defineHIFN_D_VALID0x8000
 
-struct hifn_base_command
-{
+struct hifn_base_command {
volatile __le16 masks;
volatile __le16 session_num;
volatile __le16

[PATCH 2/4] crypto: hifn_795x: remove the hifn_test function

2015-10-22 Thread LABBE Corentin

The hifn_test function is redundant with test done at register time by
the crypto API, so remove it.

Signed-off-by: LABBE Corentin 
---
 drivers/crypto/hifn_795x.c | 58 --
 1 file changed, 58 deletions(-)

diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index 079b995..e6bc825 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -1650,60 +1650,6 @@ err_out_exit:
return err;
 }
 
-static int hifn_test(struct hifn_device *dev, int encdec, u8 snum)
-{
-   int n, err;
-   u8 src[16];
-   struct hifn_context ctx;
-   struct hifn_request_context rctx;
-   u8 fips_aes_ecb_from_zero[16] = {
-   0x66, 0xE9, 0x4B, 0xD4,
-   0xEF, 0x8A, 0x2C, 0x3B,
-   0x88, 0x4C, 0xFA, 0x59,
-   0xCA, 0x34, 0x2B, 0x2E};
-   struct scatterlist sg;
-
-   memset(src, 0, sizeof(src));
-   memset(ctx.key, 0, sizeof(ctx.key));
-
-   ctx.dev = dev;
-   ctx.keysize = 16;
-   rctx.ivsize = 0;
-   rctx.iv = NULL;
-   rctx.op = (encdec)?ACRYPTO_OP_ENCRYPT:ACRYPTO_OP_DECRYPT;
-   rctx.mode = ACRYPTO_MODE_ECB;
-   rctx.type = ACRYPTO_TYPE_AES_128;
-   rctx.walk.cache[0].length = 0;
-
-   sg_init_one(, , sizeof(src));
-
-   err = hifn_setup_dma(dev, , , , , sizeof(src), NULL);
-   if (err)
-   goto err_out;
-
-   dev->started = 0;
-   msleep(200);
-
-   dprintk("%s: decoded: ", dev->name);
-   for (n=0; nname);
-   for (n=0; nname);
-   return 0;
-   }
-
-err_out:
-   printk(KERN_INFO "%s: AES 128 ECB test has been failed.\n", dev->name);
-   return -1;
-}
-
 static int hifn_start_device(struct hifn_device *dev)
 {
int err;
@@ -2658,10 +2604,6 @@ static int hifn_probe(struct pci_dev *pdev, const struct 
pci_device_id *id)
if (err)
goto err_out_free_irq;
 
-   err = hifn_test(dev, 1, 0);
-   if (err)
-   goto err_out_stop_device;
-
err = hifn_register_rng(dev);
if (err)
goto err_out_stop_device;
-- 
2.4.10

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[PATCH] crypto: qat - remove superfluous check from adf_probe

2015-10-22 Thread Salvatore Benedetto

 - ent->device is already checked at the beginning of the function
   against the same value. This check is a duplicate.

Signed-off-by: Salvatore Benedetto 
---
 drivers/crypto/qat/qat_dh895xcc/adf_drv.c   | 8 +---
 drivers/crypto/qat/qat_dh895xccvf/adf_drv.c | 9 +
 2 files changed, 2 insertions(+), 15 deletions(-)

diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_drv.c 
b/drivers/crypto/qat/qat_dh895xcc/adf_drv.c
index f8dd14f..f933f7d 100644
--- a/drivers/crypto/qat/qat_dh895xcc/adf_drv.c
+++ b/drivers/crypto/qat/qat_dh895xcc/adf_drv.c
@@ -253,13 +253,7 @@ static int adf_probe(struct pci_dev *pdev, const struct 
pci_device_id *ent)
}
 
accel_dev->hw_device = hw_data;
-   switch (ent->device) {
-   case ADF_DH895XCC_PCI_DEVICE_ID:
-   adf_init_hw_data_dh895xcc(accel_dev->hw_device);
-   break;
-   default:
-   return -ENODEV;
-   }
+   adf_init_hw_data_dh895xcc(accel_dev->hw_device);
pci_read_config_byte(pdev, PCI_REVISION_ID, _pci_dev->revid);
pci_read_config_dword(pdev, ADF_DH895XCC_FUSECTL_OFFSET,
  _data->fuses);
diff --git a/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c 
b/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c
index 789426f..7bec249 100644
--- a/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c
+++ b/drivers/crypto/qat/qat_dh895xccvf/adf_drv.c
@@ -243,14 +243,7 @@ static int adf_probe(struct pci_dev *pdev, const struct 
pci_device_id *ent)
goto out_err;
}
accel_dev->hw_device = hw_data;
-   switch (ent->device) {
-   case ADF_DH895XCCIOV_PCI_DEVICE_ID:
-   adf_init_hw_data_dh895xcciov(accel_dev->hw_device);
-   break;
-   default:
-   ret = -ENODEV;
-   goto out_err;
-   }
+   adf_init_hw_data_dh895xcciov(accel_dev->hw_device);
 
/* Get Accelerators and Accelerators Engines masks */
hw_data->accel_mask = hw_data->get_accel_mask(hw_data->fuses);
-- 
1.9.1

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[PATCH] crypto: qat - fix get instance function

2015-10-22 Thread Tadeusz Struk

Fix the logic in case we have found a device on a given node.

Signed-off-by: Tadeusz Struk 
---
 drivers/crypto/qat/qat_common/qat_crypto.c |   22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/crypto/qat/qat_common/qat_crypto.c 
b/drivers/crypto/qat/qat_common/qat_crypto.c
index 603c12d..4d0c65b 100644
--- a/drivers/crypto/qat/qat_common/qat_crypto.c
+++ b/drivers/crypto/qat/qat_common/qat_crypto.c
@@ -119,19 +119,19 @@ struct qat_crypto_instance 
*qat_crypto_get_instance_node(int node)
}
}
}
-   if (!accel_dev)
-   pr_info("QAT: Could not find a device on node %d\n", node);
-
-   /* Get any started device */
-   list_for_each(itr, adf_devmgr_get_head()) {
-   struct adf_accel_dev *tmp_dev;
 
-   tmp_dev = list_entry(itr, struct adf_accel_dev, list);
+   if (!accel_dev) {
+   pr_info("QAT: Could not find a device on node %d\n", node);
+   /* Get any started device */
+   list_for_each(itr, adf_devmgr_get_head()) {
+   struct adf_accel_dev *tmp_dev;
 
-   if (adf_dev_started(tmp_dev) &&
-   !list_empty(_dev->crypto_list)) {
-   accel_dev = tmp_dev;
-   break;
+   tmp_dev = list_entry(itr, struct adf_accel_dev, list);
+   if (adf_dev_started(tmp_dev) &&
+   !list_empty(_dev->crypto_list)) {
+   accel_dev = tmp_dev;
+   break;
+   }
}
}
 

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Re: [PATCH] Add select of CONFIG_SRCU by CONFIG_CRYPTO

2015-10-22 Thread Herbert Xu

Andrej Krutak  wrote:
> Signed-off-by: Andrej Krutak 

You are supposed to describe the patch here, e.g., the reason
why we need this patch.

Thanks,
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Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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Re: [PATCH 3/8] crypto: ccp: Use precalculated hash from headers

[PATCH 1/4] crypto: hifn_795x: replace simple_strtoul by kstrtouint

[PATCH] Add select of CONFIG_SRCU by CONFIG_CRYPTO

[PATCH 3/4] crypto: hifn_795x: use dev_xx/pr_xx instead of printk

[PATCH 4/4] crypto: hifn_795x: fix coding style

[PATCH 2/4] crypto: hifn_795x: remove the hifn_test function

[PATCH] crypto: qat - remove superfluous check from adf_probe

[PATCH] crypto: qat - fix get instance function

Re: [PATCH] Add select of CONFIG_SRCU by CONFIG_CRYPTO

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