Re: crypto/cavium MSI-X fixups

[Christoph Hellwig]

On Tue, Feb 21, 2017 at 09:36:04AM -0800, David Daney wrote:
> With respect to pci_enable_msix(), what do you recommend as a replacement?  

pci_alloc_irq_vectors.  In fact I have a tree ready for after -rc1
that removes pci_enable_msix() entirely.

> For the crypto/cavium driver, you recommend pci_alloc_irq_vectors(), which 
> works well if the required MSI-X indexes are contiguous starting at zero.   
> What would be used for a device that has 184 MSI-X, but only a sparse 
> subset (fewer than half) of these are required for the driver operation.  
> It would waste system resources to use an API that forces us to allocate 
> 184 when only 80 are required.

Currently we don't have a good API for that.  I've not been through all
users of pci_enable_msix_{range,exact} yet, but so far I've only found
one user not using all vectors from 0 to some limit.  Depending how many
such users we have and how they'll look I will have to look into an API
to support that use case.

[PATCH v3 4/4] hwrng: meson: add clock handling to driver

[Heiner Kallweit]

Add handling of RNG0 clock to the driver.

Signed-off-by: Heiner Kallweit 
---
v2:
- consider that clock is optional
- use managed call to clk_disable_unprepare to ensure that
  cleaning up is done in the right order if driver is removed
v3:
- no changes
---
 drivers/char/hw_random/meson-rng.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/drivers/char/hw_random/meson-rng.c 
b/drivers/char/hw_random/meson-rng.c
index 119d6984..2e23be80 100644
--- a/drivers/char/hw_random/meson-rng.c
+++ b/drivers/char/hw_random/meson-rng.c
@@ -62,6 +62,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define RNG_DATA 0x00
 
@@ -69,6 +70,7 @@ struct meson_rng_data {
void __iomem *base;
struct platform_device *pdev;
struct hwrng rng;
+   struct clk *core_clk;
 };
 
 static int meson_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
@@ -81,11 +83,17 @@ static int meson_rng_read(struct hwrng *rng, void *buf, 
size_t max, bool wait)
return sizeof(u32);
 }
 
+static void meson_rng_clk_disable(void *data)
+{
+   clk_disable_unprepare(data);
+}
+
 static int meson_rng_probe(struct platform_device *pdev)
 {
struct device *dev = >dev;
struct meson_rng_data *data;
struct resource *res;
+   int ret;
 
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
@@ -98,6 +106,20 @@ static int meson_rng_probe(struct platform_device *pdev)
if (IS_ERR(data->base))
return PTR_ERR(data->base);
 
+   data->core_clk = devm_clk_get(dev, "core");
+   if (IS_ERR(data->core_clk))
+   data->core_clk = NULL;
+
+   if (data->core_clk) {
+   ret = clk_prepare_enable(data->core_clk);
+   if (ret)
+   return ret;
+   ret = devm_add_action_or_reset(dev, meson_rng_clk_disable,
+  data->core_clk);
+   if (ret)
+   return ret;
+   }
+
data->rng.name = pdev->name;
data->rng.read = meson_rng_read;
 
-- 
2.11.1

[PATCH v3 3/4] ARM64: dts: meson-gx: add clock CLKID_RNG0 to hwrng node

[Heiner Kallweit]

Add clock CLKID_RNG0 to HW randon number generator node.

Signed-off-by: Heiner Kallweit 
---
v2:
- splitted first version of patch into two
- add DT binding documentation
- mention that clock is optional
- replace spaces with tabs in DT binding example
v3:
- splitted DT extension and binding documentation update into two patches
---
 arch/arm64/boot/dts/amlogic/meson-gx.dtsi   | 2 +-
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 5 +
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi 
b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 5d995f77..620495a4 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -380,7 +380,7 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
 
-   rng {
+   hwrng: rng {
compatible = "amlogic,meson-rng";
reg = <0x0 0x0 0x0 0x4>;
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi 
b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 04b3324b..a375cb21 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -524,3 +524,8 @@
  {
compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
 };
+
+ {
+   clocks = < CLKID_RNG0>;
+   clock-names = "core";
+};
-- 
2.11.1

[PATCH v3 2/4] ARM64: dts: meson-gx: add clock to DT binding documentation for hwrng

[Heiner Kallweit]

Add clock to DT binding documentation.

Signed-off-by: Heiner Kallweit 
---
v2:
- splitted first version of patch into two
- add DT binding documentation
- mention that clock is optional
- replace spaces with tabs in DT binding example
v3:
- splitted DT extension and binding documentation update into two patches
---
 Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt 
b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt
index 202f2d09..4d403645 100644
--- a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt
+++ b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt
@@ -6,9 +6,16 @@ Required properties:
 - compatible : should be "amlogic,meson-rng"
 - reg : Specifies base physical address and size of the registers.
 
+Optional properties:
+
+- clocks : phandle to the following named clocks
+- clock-names: Name of core clock, must be "core"
+
 Example:
 
 rng {
-compatible = "amlogic,meson-rng";
-reg = <0x0 0xc8834000 0x0 0x4>;
+   compatible = "amlogic,meson-rng";
+   reg = <0x0 0xc8834000 0x0 0x4>;
+   clocks = < CLKID_RNG0>;
+   clock-names = "core";
 };
-- 
2.11.1

[PATCH v3 1/3] clk: meson-gxbb: expose clock CLKID_RNG0

[Heiner Kallweit]

Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by: Heiner Kallweit 
---
v2:
- added clk and DT maintainers
- split exposing the clock and using it in DT into two patches
- comment out clock definition in drivers/clk/meson/gxbb.h
- silently move CLKID_SPI to the right place
v3:
- no changes
---
 drivers/clk/meson/gxbb.h  | 2 +-
 include/dt-bindings/clock/gxbb-clkc.h | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
index 8ee2022c..cbd62e46 100644
--- a/drivers/clk/meson/gxbb.h
+++ b/drivers/clk/meson/gxbb.h
@@ -193,7 +193,7 @@
 /* CLKID_I2C */
 /* #define CLKID_SAR_ADC */
 #define CLKID_SMART_CARD 24
-#define CLKID_RNG0   25
+/* CLKID_RNG0 */
 #define CLKID_UART0  26
 #define CLKID_SDHC   27
 #define CLKID_STREAM 28
diff --git a/include/dt-bindings/clock/gxbb-clkc.h 
b/include/dt-bindings/clock/gxbb-clkc.h
index 692846c7..63f4c2c4 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -12,9 +12,10 @@
 #define CLKID_FCLK_DIV46
 #define CLKID_CLK8112
 #define CLKID_MPLL215
-#define CLKID_SPI  34
 #define CLKID_I2C  22
 #define CLKID_SAR_ADC  23
+#define CLKID_RNG0 25
+#define CLKID_SPI  34
 #define CLKID_ETH  36
 #define CLKID_USB0 50
 #define CLKID_USB1 51
-- 
2.11.1

Re: [RFC PATCH v4] IV Generation algorithms for dm-crypt

[Binoy Jayan]

Hi Herbert,

On 8 February 2017 at 13:02, Gilad Ben-Yossef  wrote:
> On Tue, Feb 7, 2017 at 12:35 PM, Binoy Jayan  wrote:
>> ===
>> dm-crypt optimization for larger block sizes
>> ===
>>
>> Currently, the iv generation algorithms are implemented in dm-crypt.c. The 
>> goal
>> is to move these algorithms from the dm layer to the kernel crypto layer by
>> implementing them as template ciphers so they can be used in relation with
>> algorithms like aes, and with multiple modes like cbc, ecb etc. As part of 
>> this
>> patchset, the iv-generation code is moved from the dm layer to the crypto 
>> layer
>> and adapt the dm-layer to send a whole 'bio' (as defined in the block layer)
>> at a time. Each bio contains the in memory representation of physically
>> contiguous disk blocks. Since the bio itself may not be contiguous in main
>> memory, the dm layer sets up a chained scatterlist of these blocks split into
>> physically contiguous segments in memory so that DMA can be performed.

> Ran Bonnie++ on it last night  (Luks mode, plain64, Qemu Virt platform
> Arm64) and it works just fine.
>
> Tested-by: Gilad Ben-Yossef 

I was wondering if this is near to be ready for submission (apart from
the testmgr.c
changes) or I need to make some changes to make it similar to the IPSec offload?

Thanks,
Binoy

crypto: xts: regression in 4.10

[Nicolas Porcel]

Hello,

I am using aes-xts-plain64 with LUKS headers to crypt the root. In 4.10,
the partition cannot be opened and I have the following errors when
booting:

device-mapper: table: 253:0: crypt: Error allocating crypto tfm
device-mapper: ioctl: error adding target to table
device-mapper: reload ioctl on  failed: No such file or directory
Failed to setup dm-crypt key mapping for device /dev/mmcblk0p2
Check that the kernel supports aes-xts-plain64 cipher (check syslog for 
more info)

I found that this commit is responsible for the regression (reverting it
solves the problem):

> commit f1c131b45410a202eb45cc55980a7a9e4e4b4f40
> Author: Herbert Xu 
> Date:   Tue Nov 22 20:08:19 2016 +0800
> 
> crypto: xts - Convert to skcipher

Some precision: I am using the vanilla kernel source for 4.10. The aes,
xts and dm-crypt modules are directly compiled in the kernel and not as
modules. I also had the same problem with kernel 4.10-rc*.

Is it a known issue? I found 1 related email with no answer on the
dm-crypt mailing. If this is a regression, I can start digging, although
any guidance would be greatly appreciated.

Thank you in advance,

Best regards,

-- 
Nicolas Porcel

Re: [PATCH v2 3/3] hwrng: meson: add clock handling to driver

[Heiner Kallweit]

Am 21.02.2017 um 22:21 schrieb Neil Armstrong:
> On 02/21/2017 12:26 PM, Heiner Kallweit wrote:
>> Add handling of RNG0 clock to the driver.
>>
>> Signed-off-by: Heiner Kallweit 
>> ---
>> v2:
>> - consider that clock is optional
>> - use managed call to clk_disable_unprepare to ensure that
>>   cleaning up is done in the right order if driver is removed
>> ---
>>  drivers/char/hw_random/meson-rng.c | 22 ++
>>  1 file changed, 22 insertions(+)
>>
>> diff --git a/drivers/char/hw_random/meson-rng.c 
>> b/drivers/char/hw_random/meson-rng.c
>> index 119d6984..2e23be80 100644
>> --- a/drivers/char/hw_random/meson-rng.c
>> +++ b/drivers/char/hw_random/meson-rng.c
>> @@ -62,6 +62,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  
>>  #define RNG_DATA 0x00
>>  
>> @@ -69,6 +70,7 @@ struct meson_rng_data {
>>  void __iomem *base;
>>  struct platform_device *pdev;
>>  struct hwrng rng;
>> +struct clk *core_clk;
>>  };
>>  
>>  static int meson_rng_read(struct hwrng *rng, void *buf, size_t max, bool 
>> wait)
>> @@ -81,11 +83,17 @@ static int meson_rng_read(struct hwrng *rng, void *buf, 
>> size_t max, bool wait)
>>  return sizeof(u32);
>>  }
>>  
>> +static void meson_rng_clk_disable(void *clk)
>> +{
>> +clk_disable_unprepare(clk);
>> +}
>> +
>>  static int meson_rng_probe(struct platform_device *pdev)
>>  {
>>  struct device *dev = >dev;
>>  struct meson_rng_data *data;
>>  struct resource *res;
>> +int ret;
>>  
>>  data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
>>  if (!data)
>> @@ -98,6 +106,20 @@ static int meson_rng_probe(struct platform_device *pdev)
>>  if (IS_ERR(data->base))
>>  return PTR_ERR(data->base);
>>  
>> +data->core_clk = devm_clk_get(dev, "core");
>> +if (IS_ERR(data->core_clk))
>> +data->core_clk = NULL;
>> +
>> +if (data->core_clk) {
> 
> This "if" is useless, if core_clk is NULL, this will work also.
> 
Regarding clk_prepare_enable you're right. However we need this "if" for
the call to devm_add_action_or_reset because we can't provide a NULL
pointer as data argument.
And including clk_prepare_enable in the if clause creates no overhead
and is clearer IMHO.

>> +ret = clk_prepare_enable(data->core_clk);
>> +if (ret)
>> +return ret;
>> +ret = devm_add_action_or_reset(dev, meson_rng_clk_disable,
>> +   data->core_clk);
>> +if (ret)
>> +return ret;
>> +}
>> +
>>  data->rng.name = pdev->name;
>>  data->rng.read = meson_rng_read;
>>  
>>
> 
> 

Re: [PATCH v2 3/3] hwrng: meson: add clock handling to driver

[Neil Armstrong]

On 02/21/2017 12:26 PM, Heiner Kallweit wrote:
> Add handling of RNG0 clock to the driver.
> 
> Signed-off-by: Heiner Kallweit 
> ---
> v2:
> - consider that clock is optional
> - use managed call to clk_disable_unprepare to ensure that
>   cleaning up is done in the right order if driver is removed
> ---
>  drivers/char/hw_random/meson-rng.c | 22 ++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/drivers/char/hw_random/meson-rng.c 
> b/drivers/char/hw_random/meson-rng.c
> index 119d6984..2e23be80 100644
> --- a/drivers/char/hw_random/meson-rng.c
> +++ b/drivers/char/hw_random/meson-rng.c
> @@ -62,6 +62,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #define RNG_DATA 0x00
>  
> @@ -69,6 +70,7 @@ struct meson_rng_data {
>   void __iomem *base;
>   struct platform_device *pdev;
>   struct hwrng rng;
> + struct clk *core_clk;
>  };
>  
>  static int meson_rng_read(struct hwrng *rng, void *buf, size_t max, bool 
> wait)
> @@ -81,11 +83,17 @@ static int meson_rng_read(struct hwrng *rng, void *buf, 
> size_t max, bool wait)
>   return sizeof(u32);
>  }
>  
> +static void meson_rng_clk_disable(void *clk)
> +{
> + clk_disable_unprepare(clk);
> +}
> +
>  static int meson_rng_probe(struct platform_device *pdev)
>  {
>   struct device *dev = >dev;
>   struct meson_rng_data *data;
>   struct resource *res;
> + int ret;
>  
>   data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
>   if (!data)
> @@ -98,6 +106,20 @@ static int meson_rng_probe(struct platform_device *pdev)
>   if (IS_ERR(data->base))
>   return PTR_ERR(data->base);
>  
> + data->core_clk = devm_clk_get(dev, "core");
> + if (IS_ERR(data->core_clk))
> + data->core_clk = NULL;
> +
> + if (data->core_clk) {

This "if" is useless, if core_clk is NULL, this will work also.

> + ret = clk_prepare_enable(data->core_clk);
> + if (ret)
> + return ret;
> + ret = devm_add_action_or_reset(dev, meson_rng_clk_disable,
> +data->core_clk);
> + if (ret)
> + return ret;
> + }
> +
>   data->rng.name = pdev->name;
>   data->rng.read = meson_rng_read;
>  
> 

Re: [PATCH v2 2/3] ARM64: dts: meson-gx: add clock CLKID_RNG0 to hwrng node

[Neil Armstrong]

On 02/21/2017 12:18 PM, Heiner Kallweit wrote:
> Add clock CLKID_RNG0 to HW randon number generator node and
> extend the DT binding documentation accordingly.
> 
> Signed-off-by: Heiner Kallweit 
> ---
> v2:
> - splitted first version of patch into two
> - add DT binding documentation

Hi Heiner,

Can you move the dt-bindings to a separate patch ?

> - mention that clock is optional
> - replace spaces with tabs in DT binding example
> ---
>  Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt | 8 ++--
>  arch/arm64/boot/dts/amlogic/meson-gx.dtsi   | 2 +-
>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 5 +
>  3 files changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt 
> b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt
> index 202f2d09..4c012a04 100644
> --- a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt
> +++ b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt
> @@ -5,10 +5,14 @@ Required properties:
>  
>  - compatible : should be "amlogic,meson-rng"
>  - reg : Specifies base physical address and size of the registers.
> +- clocks : Optional core clock
> +- clock-names: Name of core clock, must be "core"

Please put these in a separate "Optional Properties" :

Optional Properties:
- clocks : phandle to the following named clocks
- clock-names: Name of core clock, must be "core"

>  
>  Example:
>  
>  rng {
> -compatible = "amlogic,meson-rng";
> -reg = <0x0 0xc8834000 0x0 0x4>;
> + compatible = "amlogic,meson-rng";
> + reg = <0x0 0xc8834000 0x0 0x4>;
> + clocks = < CLKID_RNG0>;
> + clock-names = "core";
>  };
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi 
> b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> index 5d995f77..620495a4 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
> @@ -380,7 +380,7 @@
>   #size-cells = <2>;
>   ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
>  
> - rng {
> + hwrng: rng {
>   compatible = "amlogic,meson-rng";
>   reg = <0x0 0x0 0x0 0x4>;
>   };
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi 
> b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
> index 04b3324b..a375cb21 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
> @@ -524,3 +524,8 @@
>   {
>   compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
>  };
> +
> + {
> + clocks = < CLKID_RNG0>;
> + clock-names = "core";
> +};
> 

[PATCH v2 3/3] hwrng: meson: add clock handling to driver

[Heiner Kallweit]

Add handling of RNG0 clock to the driver.

Signed-off-by: Heiner Kallweit 
---
v2:
- consider that clock is optional
- use managed call to clk_disable_unprepare to ensure that
  cleaning up is done in the right order if driver is removed
---
 drivers/char/hw_random/meson-rng.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/drivers/char/hw_random/meson-rng.c 
b/drivers/char/hw_random/meson-rng.c
index 119d6984..2e23be80 100644
--- a/drivers/char/hw_random/meson-rng.c
+++ b/drivers/char/hw_random/meson-rng.c
@@ -62,6 +62,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define RNG_DATA 0x00
 
@@ -69,6 +70,7 @@ struct meson_rng_data {
void __iomem *base;
struct platform_device *pdev;
struct hwrng rng;
+   struct clk *core_clk;
 };
 
 static int meson_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
@@ -81,11 +83,17 @@ static int meson_rng_read(struct hwrng *rng, void *buf, 
size_t max, bool wait)
return sizeof(u32);
 }
 
+static void meson_rng_clk_disable(void *clk)
+{
+   clk_disable_unprepare(clk);
+}
+
 static int meson_rng_probe(struct platform_device *pdev)
 {
struct device *dev = >dev;
struct meson_rng_data *data;
struct resource *res;
+   int ret;
 
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
@@ -98,6 +106,20 @@ static int meson_rng_probe(struct platform_device *pdev)
if (IS_ERR(data->base))
return PTR_ERR(data->base);
 
+   data->core_clk = devm_clk_get(dev, "core");
+   if (IS_ERR(data->core_clk))
+   data->core_clk = NULL;
+
+   if (data->core_clk) {
+   ret = clk_prepare_enable(data->core_clk);
+   if (ret)
+   return ret;
+   ret = devm_add_action_or_reset(dev, meson_rng_clk_disable,
+  data->core_clk);
+   if (ret)
+   return ret;
+   }
+
data->rng.name = pdev->name;
data->rng.read = meson_rng_read;
 
-- 
2.11.1

[PATCH v2 2/3] ARM64: dts: meson-gx: add clock CLKID_RNG0 to hwrng node

[Heiner Kallweit]

Add clock CLKID_RNG0 to HW randon number generator node and
extend the DT binding documentation accordingly.

Signed-off-by: Heiner Kallweit 
---
v2:
- splitted first version of patch into two
- add DT binding documentation
- mention that clock is optional
- replace spaces with tabs in DT binding example
---
 Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt | 8 ++--
 arch/arm64/boot/dts/amlogic/meson-gx.dtsi   | 2 +-
 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 5 +
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt 
b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt
index 202f2d09..4c012a04 100644
--- a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt
+++ b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt
@@ -5,10 +5,14 @@ Required properties:
 
 - compatible : should be "amlogic,meson-rng"
 - reg : Specifies base physical address and size of the registers.
+- clocks : Optional core clock
+- clock-names: Name of core clock, must be "core"
 
 Example:
 
 rng {
-compatible = "amlogic,meson-rng";
-reg = <0x0 0xc8834000 0x0 0x4>;
+   compatible = "amlogic,meson-rng";
+   reg = <0x0 0xc8834000 0x0 0x4>;
+   clocks = < CLKID_RNG0>;
+   clock-names = "core";
 };
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi 
b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 5d995f77..620495a4 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -380,7 +380,7 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
 
-   rng {
+   hwrng: rng {
compatible = "amlogic,meson-rng";
reg = <0x0 0x0 0x0 0x4>;
};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi 
b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 04b3324b..a375cb21 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -524,3 +524,8 @@
  {
compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
 };
+
+ {
+   clocks = < CLKID_RNG0>;
+   clock-names = "core";
+};
-- 
2.11.1

[PATCH v2 1/3] clk: meson-gxbb: expose clock CLKID_RNG0

[Heiner Kallweit]

Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by: Heiner Kallweit 
---
v2:
- added clk and DT maintainers
- split exposing the clock and using it in DT into two patches
- comment out clock definition in drivers/clk/meson/gxbb.h
- silently move CLKID_SPI to the right place
---
 drivers/clk/meson/gxbb.h  | 2 +-
 include/dt-bindings/clock/gxbb-clkc.h | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
index 8ee2022c..cbd62e46 100644
--- a/drivers/clk/meson/gxbb.h
+++ b/drivers/clk/meson/gxbb.h
@@ -193,7 +193,7 @@
 /* CLKID_I2C */
 /* #define CLKID_SAR_ADC */
 #define CLKID_SMART_CARD 24
-#define CLKID_RNG0   25
+/* CLKID_RNG0 */
 #define CLKID_UART0  26
 #define CLKID_SDHC   27
 #define CLKID_STREAM 28
diff --git a/include/dt-bindings/clock/gxbb-clkc.h 
b/include/dt-bindings/clock/gxbb-clkc.h
index 692846c7..63f4c2c4 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -12,9 +12,10 @@
 #define CLKID_FCLK_DIV46
 #define CLKID_CLK8112
 #define CLKID_MPLL215
-#define CLKID_SPI  34
 #define CLKID_I2C  22
 #define CLKID_SAR_ADC  23
+#define CLKID_RNG0 25
+#define CLKID_SPI  34
 #define CLKID_ETH  36
 #define CLKID_USB0 50
 #define CLKID_USB1 51
-- 
2.11.1

Re: crypto/cavium MSI-X fixups

[David Daney]

On 02/19/2017 09:32 AM, Christoph Hellwig wrote:

Herbert,

any comment?  I'd really like to avoid introducing new pci_enable_msix
users in this merge window..


Hi Cristoph,

With respect to pci_enable_msix(), what do you recommend as a 
replacement?  For the crypto/cavium driver, you recommend 
pci_alloc_irq_vectors(), which works well if the required MSI-X indexes 
are contiguous starting at zero.   What would be used for a device that 
has 184 MSI-X, but only a sparse subset (fewer than half) of these are 
required for the driver operation.  It would waste system resources to 
use an API that forces us to allocate 184 when only 80 are required.


Currently pci_enable_msix() allows an arbitrary set of MSI-X to be 
requested, which exactly fits the requirements of our (non 
crypto/cavium) hardware.


Thanks in advance for any insight you can provide,
David Daney




On Wed, Feb 15, 2017 at 02:47:09PM +0530, George Cherian wrote:

Hi Christoph,


On 02/15/2017 12:48 PM, Christoph Hellwig wrote:

Hi George,

your commit "crypto: cavium - Add Support for Octeon-tx CPT Engine"
add a new caller to pci_enable_msix.  This API has long been deprecated
so this series switches it to use pci_alloc_irq_vectors instead.

Can you please test it and make sure it goes in before the end of the
merge window so that no more users of the old API hit mainline?


Yes the changes works well.
Acked-by: George Cherian 

for the series.



---end quoted text---