Re: [PATCH -next] hwrng: atmel - use clk_disable_unprepare instead of clk_disable
Le 11/11/2016 à 15:56, Wei Yongjun a écrit : > From: Wei Yongjun <weiyongj...@huawei.com> > > Since clk_prepare_enable() is used to get trng->clk, we should > use clk_disable_unprepare() to release it for the error path. > > Signed-off-by: Wei Yongjun <weiyongj...@huawei.com> Acked-by: Nicolas Ferre <nicolas.fe...@atmel.com> Thank you. Best regards, > --- > drivers/char/hw_random/atmel-rng.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/char/hw_random/atmel-rng.c > b/drivers/char/hw_random/atmel-rng.c > index ae7cae5..661c82c 100644 > --- a/drivers/char/hw_random/atmel-rng.c > +++ b/drivers/char/hw_random/atmel-rng.c > @@ -94,7 +94,7 @@ static int atmel_trng_probe(struct platform_device *pdev) > return 0; > > err_register: > - clk_disable(trng->clk); > + clk_disable_unprepare(trng->clk); > return ret; > } > > -- Nicolas Ferre -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] char: hw_random: atmel-rng: disable TRNG during suspend
Le 25/10/2016 à 02:56, Wenyou Yang a écrit :
> To fix the over consumption on the VDDCore due to the TRNG enabled,
> disable the TRNG during suspend, not only disable the user interface
> clock (which is controlled by PMC). Because the user interface clock
> is independent from any clock that may be used in the entropy source
> logic circuitry.
>
> Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
Acked-by: Nicolas Ferre <nicolas.fe...@atmel.com>
Thanks
> ---
>
> Changes in v2:
> - Enable the user interface first, then enable the internal clock
>when resume.
>
> drivers/char/hw_random/atmel-rng.c | 24 +---
> 1 file changed, 21 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/char/hw_random/atmel-rng.c
> b/drivers/char/hw_random/atmel-rng.c
> index 0fcc9e6..ae7cae5 100644
> --- a/drivers/char/hw_random/atmel-rng.c
> +++ b/drivers/char/hw_random/atmel-rng.c
> @@ -48,6 +48,16 @@ static int atmel_trng_read(struct hwrng *rng, void *buf,
> size_t max,
> return 0;
> }
>
> +static void atmel_trng_enable(struct atmel_trng *trng)
> +{
> + writel(TRNG_KEY | 1, trng->base + TRNG_CR);
> +}
> +
> +static void atmel_trng_disable(struct atmel_trng *trng)
> +{
> + writel(TRNG_KEY, trng->base + TRNG_CR);
> +}
> +
> static int atmel_trng_probe(struct platform_device *pdev)
> {
> struct atmel_trng *trng;
> @@ -71,7 +81,7 @@ static int atmel_trng_probe(struct platform_device *pdev)
> if (ret)
> return ret;
>
> - writel(TRNG_KEY | 1, trng->base + TRNG_CR);
> + atmel_trng_enable(trng);
> trng->rng.name = pdev->name;
> trng->rng.read = atmel_trng_read;
>
> @@ -94,7 +104,7 @@ static int atmel_trng_remove(struct platform_device *pdev)
>
> hwrng_unregister(>rng);
>
> - writel(TRNG_KEY, trng->base + TRNG_CR);
> + atmel_trng_disable(trng);
> clk_disable_unprepare(trng->clk);
>
> return 0;
> @@ -105,6 +115,7 @@ static int atmel_trng_suspend(struct device *dev)
> {
> struct atmel_trng *trng = dev_get_drvdata(dev);
>
> + atmel_trng_disable(trng);
> clk_disable_unprepare(trng->clk);
>
> return 0;
> @@ -113,8 +124,15 @@ static int atmel_trng_suspend(struct device *dev)
> static int atmel_trng_resume(struct device *dev)
> {
> struct atmel_trng *trng = dev_get_drvdata(dev);
> + int ret;
> +
> + ret = clk_prepare_enable(trng->clk);
> + if (ret)
> + return ret;
>
> - return clk_prepare_enable(trng->clk);
> + atmel_trng_enable(trng);
> +
> + return 0;
> }
>
> static const struct dev_pm_ops atmel_trng_pm_ops = {
>
--
Nicolas Ferre
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Re: [PATCH v1] char: hw_random: atmel-rng: disable TRNG during suspend
Le 24/10/2016 à 10:03, Wenyou Yang a écrit :
> To fix the over consumption on the VDDCore due to the TRNG enabled,
> disable the TRNG during suspend, not only disable the user interface
> clock (which is controlled by PMC). Because the user interface clock
> is independent from any clock that may be used in the entropy source
> logic circuitry.
>
> Signed-off-by: Wenyou Yang <wenyou.y...@atmel.com>
> ---
>
> drivers/char/hw_random/atmel-rng.c | 16 ++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/char/hw_random/atmel-rng.c
> b/drivers/char/hw_random/atmel-rng.c
> index 0fcc9e6..2e2d09a 100644
> --- a/drivers/char/hw_random/atmel-rng.c
> +++ b/drivers/char/hw_random/atmel-rng.c
> @@ -48,6 +48,16 @@ static int atmel_trng_read(struct hwrng *rng, void *buf,
> size_t max,
> return 0;
> }
>
> +static void atmel_trng_enable(struct atmel_trng *trng)
> +{
> + writel(TRNG_KEY | 1, trng->base + TRNG_CR);
> +}
> +
> +static void atmel_trng_disable(struct atmel_trng *trng)
> +{
> + writel(TRNG_KEY, trng->base + TRNG_CR);
> +}
> +
> static int atmel_trng_probe(struct platform_device *pdev)
> {
> struct atmel_trng *trng;
> @@ -71,7 +81,7 @@ static int atmel_trng_probe(struct platform_device *pdev)
> if (ret)
> return ret;
>
> - writel(TRNG_KEY | 1, trng->base + TRNG_CR);
> + atmel_trng_enable(trng);
> trng->rng.name = pdev->name;
> trng->rng.read = atmel_trng_read;
>
> @@ -94,7 +104,7 @@ static int atmel_trng_remove(struct platform_device *pdev)
>
> hwrng_unregister(>rng);
>
> - writel(TRNG_KEY, trng->base + TRNG_CR);
> + atmel_trng_disable(trng);
> clk_disable_unprepare(trng->clk);
>
> return 0;
> @@ -105,6 +115,7 @@ static int atmel_trng_suspend(struct device *dev)
> {
> struct atmel_trng *trng = dev_get_drvdata(dev);
>
> + atmel_trng_disable(trng);
> clk_disable_unprepare(trng->clk);
>
> return 0;
> @@ -114,6 +125,7 @@ static int atmel_trng_resume(struct device *dev)
> {
> struct atmel_trng *trng = dev_get_drvdata(dev);
>
> + atmel_trng_enable(trng);
> return clk_prepare_enable(trng->clk);
Isn't it the other way around:
enable the user interface first, then enable the internal clock? like:
clk_prepare_enable(trng->clk);
atmel_trng_enable(trng);
Regards,
--
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Re: [PATCH 0/5] crypto: atmel-sha: fix registration issue and other bugs
Le 15/01/2016 15:49, Cyrille Pitchen a écrit : > Hi all, > > This series of patches fixes many issues such as the algo registration failure > or the broken support of context switches. I think it's eligible as a "fixes" series for 4.5... Herbert, is the whole series can be queued as fixes, in your opinion? And, on the whole series: Acked-by: Nicolas Ferre <nicolas.fe...@atmel.com> > This series was applied to linux-next and tested on a sama5d2 xplained > ultra board. We now pass the tcrypt tests in the following modes: > - 2: sha1 > - 6: sha256 > - 11: sha384 > - 12: sha512 > - 33: sha224 > > The context switch fix was tested with a userspace program using the cryptodev > module. This single thread program computes the SHA256 hashes of many files > by splitting then into fixed size chunks. The chunks of each file are > processed by calling 'update' operations using a round robin algorithm. > > However, the .import() / .export() implementation was NOT tested! > Nonetheless the last patch is needed to fix the registration issue, otherwise > atmel_sha_probe() would still fail. > > Best regards, > > Cyrille > > > Cyrille Pitchen (5): > crypto: atmel-sha: fix crash when computing digest on empty message > crypto: atmel-sha: fix a race between the 'done' tasklet and the > crypto client > crypto: atmel-sha: add support of sama5d2x SoCs > crypto: atmel-sha: fix context switches > crypto: atmel-sha: fix algorihtm registration > > drivers/crypto/atmel-sha-regs.h | 4 + > drivers/crypto/atmel-sha.c | 186 > +--- > 2 files changed, 158 insertions(+), 32 deletions(-) > -- Nicolas Ferre -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH RESEND v2 0/4] hwrng: atmel: add DT support
This is the patch series that Boris sent yesterday. I've just collected Acked-by tags and resend it with updated cover letter. This series adds DT support for the TRNG (True Random Generator) block and adds missing trng nodes to at91sam9g45 dtsi files. Herbert, As you said that you can take this series, here is the latest vertion ready for you to pick it up. Thanks for your help. Bye, Boris Brezillon (4): hwrng: atmel: use clk_prepapre_enable/_disable_unprepare hwrng: atmel: add DT support hwrng: atmel: Add TRNG DT binding doc ARM: at91/dt: add trng node to at91sam9g45 Documentation/devicetree/bindings/hwrng/atmel-trng.txt | 16 arch/arm/boot/dts/at91sam9g45.dtsi | 7 +++ drivers/char/hw_random/Kconfig | 2 +- drivers/char/hw_random/atmel-rng.c | 15 +++ 4 files changed, 35 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/hwrng/atmel-trng.txt -- 2.1.3 -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH RESEND v2 1/4] hwrng: atmel: use clk_prepapre_enable/_disable_unprepare
From: Boris Brezillon boris.brezil...@free-electrons.com
Use clk_prepare_enable/_disable_unprepare instead of clk_enable/disable
to work properly with the CCF.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Peter Korsgaard pe...@korsgaard.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
drivers/char/hw_random/atmel-rng.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/char/hw_random/atmel-rng.c
b/drivers/char/hw_random/atmel-rng.c
index 851bc7e20ad2..644ec4882206 100644
--- a/drivers/char/hw_random/atmel-rng.c
+++ b/drivers/char/hw_random/atmel-rng.c
@@ -67,7 +67,7 @@ static int atmel_trng_probe(struct platform_device *pdev)
if (IS_ERR(trng-clk))
return PTR_ERR(trng-clk);
- ret = clk_enable(trng-clk);
+ ret = clk_prepare_enable(trng-clk);
if (ret)
return ret;
@@ -95,7 +95,7 @@ static int atmel_trng_remove(struct platform_device *pdev)
hwrng_unregister(trng-rng);
writel(TRNG_KEY, trng-base + TRNG_CR);
- clk_disable(trng-clk);
+ clk_disable_unprepare(trng-clk);
return 0;
}
@@ -105,7 +105,7 @@ static int atmel_trng_suspend(struct device *dev)
{
struct atmel_trng *trng = dev_get_drvdata(dev);
- clk_disable(trng-clk);
+ clk_disable_unprepare(trng-clk);
return 0;
}
@@ -114,7 +114,7 @@ static int atmel_trng_resume(struct device *dev)
{
struct atmel_trng *trng = dev_get_drvdata(dev);
- return clk_enable(trng-clk);
+ return clk_prepare_enable(trng-clk);
}
static const struct dev_pm_ops atmel_trng_pm_ops = {
--
2.1.3
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[PATCH RESEND v2 4/4] ARM: at91/dt: add trng node to at91sam9g45
From: Boris Brezillon boris.brezil...@free-electrons.com
Add a DT node for the TRNG (True Random Number Generator) block.
Keep this block enabled as it does not depend on any external connection,
and thus should be available on all boards.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/boot/dts/at91sam9g45.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi
b/arch/arm/boot/dts/at91sam9g45.dtsi
index d3f65130a1f8..6c0637a4bda5 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -940,6 +940,13 @@
status = disabled;
};
+ trng@fffcc000 {
+ compatible = atmel,at91sam9g45-trng;
+ reg = 0xfffcc000 0x4000;
+ interrupts = 6 IRQ_TYPE_LEVEL_HIGH 0;
+ clocks = trng_clk;
+ };
+
i2c0: i2c@fff84000 {
compatible = atmel,at91sam9g10-i2c;
reg = 0xfff84000 0x100;
--
2.1.3
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[PATCH RESEND v2 3/4] hwrng: atmel: Add TRNG DT binding doc
From: Boris Brezillon boris.brezil...@free-electrons.com
Document DT bindings of Atmel's TRNG (True Random Number Generator) IP.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Peter Korsgaard pe...@korsgaard.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
Documentation/devicetree/bindings/hwrng/atmel-trng.txt | 16
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwrng/atmel-trng.txt
diff --git a/Documentation/devicetree/bindings/hwrng/atmel-trng.txt
b/Documentation/devicetree/bindings/hwrng/atmel-trng.txt
new file mode 100644
index ..4ac5aaa2d024
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwrng/atmel-trng.txt
@@ -0,0 +1,16 @@
+Atmel TRNG (True Random Number Generator) block
+
+Required properties:
+- compatible : Should be atmel,at91sam9g45-trng
+- reg : Offset and length of the register set of this block
+- interrupts : the interrupt number for the TRNG block
+- clocks: should contain the TRNG clk source
+
+Example:
+
+trng@fffcc000 {
+ compatible = atmel,at91sam9g45-trng;
+ reg = 0xfffcc000 0x4000;
+ interrupts = 6 IRQ_TYPE_LEVEL_HIGH 0;
+ clocks = trng_clk;
+};
--
2.1.3
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[PATCH RESEND v2 2/4] hwrng: atmel: add DT support
From: Boris Brezillon boris.brezil...@free-electrons.com
Add DT support.
Make the driver depend on CONFIG_OF as at91sam9g45 was the only SoC making
use of the TRNG block and this SoC is now fully migrated to DT.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Acked-by: Peter Korsgaard pe...@korsgaard.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
drivers/char/hw_random/Kconfig | 2 +-
drivers/char/hw_random/atmel-rng.c | 7 +++
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 91a04ae8003c..de57b38809c7 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -64,7 +64,7 @@ config HW_RANDOM_AMD
config HW_RANDOM_ATMEL
tristate Atmel Random Number Generator support
- depends on ARCH_AT91 HAVE_CLK
+ depends on ARCH_AT91 HAVE_CLK OF
default HW_RANDOM
---help---
This driver provides kernel-side support for the Random Number
diff --git a/drivers/char/hw_random/atmel-rng.c
b/drivers/char/hw_random/atmel-rng.c
index 644ec4882206..0bb0b2120a63 100644
--- a/drivers/char/hw_random/atmel-rng.c
+++ b/drivers/char/hw_random/atmel-rng.c
@@ -123,6 +123,12 @@ static const struct dev_pm_ops atmel_trng_pm_ops = {
};
#endif /* CONFIG_PM */
+static const struct of_device_id atmel_trng_dt_ids[] = {
+ { .compatible = atmel,at91sam9g45-trng },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, atmel_trng_dt_ids);
+
static struct platform_driver atmel_trng_driver = {
.probe = atmel_trng_probe,
.remove = atmel_trng_remove,
@@ -132,6 +138,7 @@ static struct platform_driver atmel_trng_driver = {
#ifdef CONFIG_PM
.pm = atmel_trng_pm_ops,
#endif /* CONFIG_PM */
+ .of_match_table = atmel_trng_dt_ids,
},
};
--
2.1.3
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Re: [PATCH RESEND 0/4] ARM: at91: remove at91sam9g45/9m10 legacy board support
On 19/11/2014 17:07, Boris Brezillon : Hello, This series adds DT support for the TRNG (True Random Generator) block and adds missing trng nodes to dtsi files. Nitpicking: subject of this cover letter seems not good ;-) Herbert, do you think you can take this series yourself or do I have to take it? Bye, Boris Brezillon (4): hwrng: atmel: use clk_prepapre_enable/_disable_unprepare hwrng: atmel: add DT support hwrng: atmel: Add TRNG DT binding doc ARM: at91/dt: add trng node Documentation/devicetree/bindings/hwrng/atmel-trng.txt | 16 arch/arm/boot/dts/at91sam9g45.dtsi | 7 +++ drivers/char/hw_random/Kconfig | 2 +- drivers/char/hw_random/atmel-rng.c | 15 +++ 4 files changed, 35 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/hwrng/atmel-trng.txt -- Nicolas Ferre -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH RESEND 0/4] hrng: atmel: add DT support
On 19/11/2014 17:18, Boris Brezillon : On Wed, 19 Nov 2014 17:15:47 +0100 Nicolas Ferre nicolas.fe...@atmel.com wrote: On 19/11/2014 17:07, Boris Brezillon : Hello, This series adds DT support for the TRNG (True Random Generator) block and adds missing trng nodes to dtsi files. Nitpicking: subject of this cover letter seems not good ;-) Sorry, you should read: hrng: atmel: add DT support Yep Herbert, do you think you can take this series yourself or do I have to take it? Oh, and BTW some Acked-by tags from Peter are missing, did forget them or changed something? Bye, Boris Brezillon (4): hwrng: atmel: use clk_prepapre_enable/_disable_unprepare hwrng: atmel: add DT support hwrng: atmel: Add TRNG DT binding doc ARM: at91/dt: add trng node Documentation/devicetree/bindings/hwrng/atmel-trng.txt | 16 arch/arm/boot/dts/at91sam9g45.dtsi | 7 +++ drivers/char/hw_random/Kconfig | 2 +- drivers/char/hw_random/atmel-rng.c | 15 +++ 4 files changed, 35 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/hwrng/atmel-trng.txt -- Nicolas Ferre -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH RESEND 0/7] crypto: at91/atmel: add Device Tree support
On 08/11/2013 16:08, Nicolas Ferre : This series adds Device Tree support to the Atmel crypto drivers (AES/[T]DES/SHA). The Device Tree entries are very simple and only declare the reg/irq values and the link to DMA. Herbert, ping? Could I have your Acked-by for taking these patches through the arm-soc git tree, or do you want that we split this series so that you can take the driver part of it? Best regards, Some trivial patches are preceding this move to Device Tree to clean things up beforehand. The series has already been sent but a little bit scattered. So I collect everything, this time. Nicolas Ferre (7): ARM: at91/dt/trivial: use macro for AES irq type ARM: at91/dt/trivial: before sama5d3, Atmel MPU were using at91 prefix ARM: at91/dt/sama5d3: add DMA information to SHA/AES/TDES nodes crypto: atmel-aes - add support for Device Tree crypto: atmel-tdes - add support for Device Tree crypto: atmel-sha - add support for Device Tree crypto: atmel-sha - add sha information to the log .../devicetree/bindings/crypto/atmel-crypto.txt| 68 ++ arch/arm/boot/dts/sama5d3.dtsi | 16 ++- drivers/crypto/atmel-aes.c | 143 ++--- drivers/crypto/atmel-sha.c | 103 +++ drivers/crypto/atmel-tdes.c| 143 ++--- 5 files changed, 346 insertions(+), 127 deletions(-) create mode 100644 Documentation/devicetree/bindings/crypto/atmel-crypto.txt -- Nicolas Ferre -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH RESEND 3/7] ARM: at91/dt/sama5d3: add DMA information to SHA/AES/TDES nodes
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/boot/dts/sama5d3.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 8716fc2..56c3b01 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -354,18 +354,26 @@
compatible = atmel,at91sam9g46-sha;
reg = 0xf8034000 0x100;
interrupts = 42 IRQ_TYPE_LEVEL_HIGH 0;
+ dmas = dma1 2 AT91_DMA_CFG_PER_ID(17);
+ dma-names = tx;
};
aes@f8038000 {
compatible = atmel,at91sam9g46-aes;
reg = 0xf8038000 0x100;
interrupts = 43 IRQ_TYPE_LEVEL_HIGH 0;
+ dmas = dma1 2 AT91_DMA_CFG_PER_ID(18),
+ dma1 2 AT91_DMA_CFG_PER_ID(19);
+ dma-names = tx, rx;
};
tdes@f803c000 {
compatible = atmel,at91sam9g46-tdes;
reg = 0xf803c000 0x100;
interrupts = 44 IRQ_TYPE_LEVEL_HIGH 0;
+ dmas = dma1 2 AT91_DMA_CFG_PER_ID(20),
+ dma1 2 AT91_DMA_CFG_PER_ID(21);
+ dma-names = tx, rx;
};
dma0: dma-controller@e600 {
--
1.8.2.2
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[PATCH RESEND 2/7] ARM: at91/dt/trivial: before sama5d3, Atmel MPU were using at91 prefix
Change the sha/aes/tdes compatibility string to match common
case for the at91sam9g45 family which is to keep the at91 prefix.
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/boot/dts/sama5d3.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index fca56c7..8716fc2 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -351,19 +351,19 @@
};
sha@f8034000 {
- compatible = atmel,sam9g46-sha;
+ compatible = atmel,at91sam9g46-sha;
reg = 0xf8034000 0x100;
interrupts = 42 IRQ_TYPE_LEVEL_HIGH 0;
};
aes@f8038000 {
- compatible = atmel,sam9g46-aes;
+ compatible = atmel,at91sam9g46-aes;
reg = 0xf8038000 0x100;
interrupts = 43 IRQ_TYPE_LEVEL_HIGH 0;
};
tdes@f803c000 {
- compatible = atmel,sam9g46-tdes;
+ compatible = atmel,at91sam9g46-tdes;
reg = 0xf803c000 0x100;
interrupts = 44 IRQ_TYPE_LEVEL_HIGH 0;
};
--
1.8.2.2
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[PATCH RESEND 0/7] crypto: at91/atmel: add Device Tree support
This series adds Device Tree support to the Atmel crypto drivers (AES/[T]DES/SHA). The Device Tree entries are very simple and only declare the reg/irq values and the link to DMA. Some trivial patches are preceding this move to Device Tree to clean things up beforehand. The series has already been sent but a little bit scattered. So I collect everything, this time. Nicolas Ferre (7): ARM: at91/dt/trivial: use macro for AES irq type ARM: at91/dt/trivial: before sama5d3, Atmel MPU were using at91 prefix ARM: at91/dt/sama5d3: add DMA information to SHA/AES/TDES nodes crypto: atmel-aes - add support for Device Tree crypto: atmel-tdes - add support for Device Tree crypto: atmel-sha - add support for Device Tree crypto: atmel-sha - add sha information to the log .../devicetree/bindings/crypto/atmel-crypto.txt| 68 ++ arch/arm/boot/dts/sama5d3.dtsi | 16 ++- drivers/crypto/atmel-aes.c | 143 ++--- drivers/crypto/atmel-sha.c | 103 +++ drivers/crypto/atmel-tdes.c| 143 ++--- 5 files changed, 346 insertions(+), 127 deletions(-) create mode 100644 Documentation/devicetree/bindings/crypto/atmel-crypto.txt -- 1.8.2.2 -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH RESEND 1/7] ARM: at91/dt/trivial: use macro for AES irq type
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index b7f4961..fca56c7 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -359,7 +359,7 @@
aes@f8038000 {
compatible = atmel,sam9g46-aes;
reg = 0xf8038000 0x100;
- interrupts = 43 4 0;
+ interrupts = 43 IRQ_TYPE_LEVEL_HIGH 0;
};
tdes@f803c000 {
--
1.8.2.2
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[PATCH RESEND 5/7] crypto: atmel-tdes - add support for Device Tree
Add support for Device Tree and use of the DMA DT API to
get the channels if needed.
Documentation is added for these DT nodes.
Initial code by: Nicolas Royer and Eukrea.
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
.../devicetree/bindings/crypto/atmel-crypto.txt| 23
drivers/crypto/atmel-tdes.c| 143 ++---
2 files changed, 117 insertions(+), 49 deletions(-)
diff --git a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
index d273f0b..9a24fd9 100644
--- a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
+++ b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
@@ -21,3 +21,26 @@ aes@f8038000 {
dmas = dma1 2 18,
dma1 2 19;
dma-names = tx, rx;
+
+* Triple Data Encryption Standard (Triple DES)
+
+Required properties:
+- compatible : Should be atmel,at91sam9g46-tdes.
+- reg: Should contain TDES registers location and length.
+- interrupts: Should contain the IRQ line for the TDES.
+
+Optional properties:
+- dmas: List of two DMA specifiers as described in
+atmel-dma.txt and dma.txt files.
+- dma-names: Contains one identifier string for each DMA specifier
+ in the dmas property.
+
+Example:
+tdes@f803c000 {
+ compatible = atmel,at91sam9g46-tdes;
+ reg = 0xf803c000 0x100;
+ interrupts = 44 4 0;
+ dmas = dma1 2 20,
+ dma1 2 21;
+ dma-names = tx, rx;
+};
diff --git a/drivers/crypto/atmel-tdes.c b/drivers/crypto/atmel-tdes.c
index 4a99564..6cde5b5 100644
--- a/drivers/crypto/atmel-tdes.c
+++ b/drivers/crypto/atmel-tdes.c
@@ -30,6 +30,7 @@
#include linux/irq.h
#include linux/scatterlist.h
#include linux/dma-mapping.h
+#include linux/of_device.h
#include linux/delay.h
#include linux/crypto.h
#include linux/cryptohash.h
@@ -716,59 +717,50 @@ static int atmel_tdes_dma_init(struct atmel_tdes_dev *dd,
struct crypto_platform_data *pdata)
{
int err = -ENOMEM;
- dma_cap_mask_t mask_in, mask_out;
+ dma_cap_mask_t mask;
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ /* Try to grab 2 DMA channels */
+ dd-dma_lch_in.chan = dma_request_slave_channel_compat(mask,
+ atmel_tdes_filter, pdata-dma_slave-rxdata, dd-dev,
tx);
+ if (!dd-dma_lch_in.chan)
+ goto err_dma_in;
+
+ dd-dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
+ dd-dma_lch_in.dma_conf.dst_addr = dd-phys_base +
+ TDES_IDATA1R;
+ dd-dma_lch_in.dma_conf.src_maxburst = 1;
+ dd-dma_lch_in.dma_conf.src_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_in.dma_conf.dst_maxburst = 1;
+ dd-dma_lch_in.dma_conf.dst_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_in.dma_conf.device_fc = false;
+
+ dd-dma_lch_out.chan = dma_request_slave_channel_compat(mask,
+ atmel_tdes_filter, pdata-dma_slave-txdata, dd-dev,
rx);
+ if (!dd-dma_lch_out.chan)
+ goto err_dma_out;
+
+ dd-dma_lch_out.dma_conf.direction = DMA_DEV_TO_MEM;
+ dd-dma_lch_out.dma_conf.src_addr = dd-phys_base +
+ TDES_ODATA1R;
+ dd-dma_lch_out.dma_conf.src_maxburst = 1;
+ dd-dma_lch_out.dma_conf.src_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_out.dma_conf.dst_maxburst = 1;
+ dd-dma_lch_out.dma_conf.dst_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_out.dma_conf.device_fc = false;
- if (pdata pdata-dma_slave-txdata.dma_dev
- pdata-dma_slave-rxdata.dma_dev) {
-
- /* Try to grab 2 DMA channels */
- dma_cap_zero(mask_in);
- dma_cap_set(DMA_SLAVE, mask_in);
-
- dd-dma_lch_in.chan = dma_request_channel(mask_in,
- atmel_tdes_filter, pdata-dma_slave-rxdata);
-
- if (!dd-dma_lch_in.chan)
- goto err_dma_in;
-
- dd-dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
- dd-dma_lch_in.dma_conf.dst_addr = dd-phys_base +
- TDES_IDATA1R;
- dd-dma_lch_in.dma_conf.src_maxburst = 1;
- dd-dma_lch_in.dma_conf.src_addr_width =
- DMA_SLAVE_BUSWIDTH_4_BYTES;
- dd-dma_lch_in.dma_conf.dst_maxburst = 1;
- dd-dma_lch_in.dma_conf.dst_addr_width =
- DMA_SLAVE_BUSWIDTH_4_BYTES;
- dd-dma_lch_in.dma_conf.device_fc = false;
-
- dma_cap_zero(mask_out);
- dma_cap_set(DMA_SLAVE, mask_out);
- dd-dma_lch_out.chan = dma_request_channel(mask_out,
- atmel_tdes_filter, pdata-dma_slave-txdata);
-
- if (!dd-dma_lch_out.chan)
- goto err_dma_out
[PATCH RESEND 4/7] crypto: atmel-aes - add support for Device Tree
Add support for Device Tree and use of the DMA DT API to
get the needed channels.
Documentation is added for these DT nodes.
Initial code by: Nicolas Royer and Eukrea.
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
.../devicetree/bindings/crypto/atmel-crypto.txt| 23
drivers/crypto/atmel-aes.c | 143 ++---
2 files changed, 117 insertions(+), 49 deletions(-)
create mode 100644 Documentation/devicetree/bindings/crypto/atmel-crypto.txt
diff --git a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
new file mode 100644
index 000..d273f0b
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
@@ -0,0 +1,23 @@
+* Atmel HW cryptographic accelerators
+
+These are the HW cryptographic accelerators found on some Atmel products.
+
+* Advanced Encryption Standard (AES)
+
+Required properties:
+- compatible : Should be atmel,at91sam9g46-aes.
+- reg: Should contain AES registers location and length.
+- interrupts: Should contain the IRQ line for the AES.
+- dmas: List of two DMA specifiers as described in
+atmel-dma.txt and dma.txt files.
+- dma-names: Contains one identifier string for each DMA specifier
+ in the dmas property.
+
+Example:
+aes@f8038000 {
+ compatible = atmel,at91sam9g46-aes;
+ reg = 0xf8038000 0x100;
+ interrupts = 43 4 0;
+ dmas = dma1 2 18,
+ dma1 2 19;
+ dma-names = tx, rx;
diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
index c1efd91..d7c9e31 100644
--- a/drivers/crypto/atmel-aes.c
+++ b/drivers/crypto/atmel-aes.c
@@ -30,6 +30,7 @@
#include linux/irq.h
#include linux/scatterlist.h
#include linux/dma-mapping.h
+#include linux/of_device.h
#include linux/delay.h
#include linux/crypto.h
#include linux/cryptohash.h
@@ -39,6 +40,7 @@
#include crypto/hash.h
#include crypto/internal/hash.h
#include linux/platform_data/crypto-atmel.h
+#include dt-bindings/dma/at91.h
#include atmel-aes-regs.h
#define CFB8_BLOCK_SIZE1
@@ -747,59 +749,50 @@ static int atmel_aes_dma_init(struct atmel_aes_dev *dd,
struct crypto_platform_data *pdata)
{
int err = -ENOMEM;
- dma_cap_mask_t mask_in, mask_out;
+ dma_cap_mask_t mask;
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ /* Try to grab 2 DMA channels */
+ dd-dma_lch_in.chan = dma_request_slave_channel_compat(mask,
+ atmel_aes_filter, pdata-dma_slave-rxdata, dd-dev,
tx);
+ if (!dd-dma_lch_in.chan)
+ goto err_dma_in;
+
+ dd-dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
+ dd-dma_lch_in.dma_conf.dst_addr = dd-phys_base +
+ AES_IDATAR(0);
+ dd-dma_lch_in.dma_conf.src_maxburst = dd-caps.max_burst_size;
+ dd-dma_lch_in.dma_conf.src_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_in.dma_conf.dst_maxburst = dd-caps.max_burst_size;
+ dd-dma_lch_in.dma_conf.dst_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_in.dma_conf.device_fc = false;
+
+ dd-dma_lch_out.chan = dma_request_slave_channel_compat(mask,
+ atmel_aes_filter, pdata-dma_slave-txdata, dd-dev,
rx);
+ if (!dd-dma_lch_out.chan)
+ goto err_dma_out;
+
+ dd-dma_lch_out.dma_conf.direction = DMA_DEV_TO_MEM;
+ dd-dma_lch_out.dma_conf.src_addr = dd-phys_base +
+ AES_ODATAR(0);
+ dd-dma_lch_out.dma_conf.src_maxburst = dd-caps.max_burst_size;
+ dd-dma_lch_out.dma_conf.src_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_out.dma_conf.dst_maxburst = dd-caps.max_burst_size;
+ dd-dma_lch_out.dma_conf.dst_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_out.dma_conf.device_fc = false;
- if (pdata pdata-dma_slave-txdata.dma_dev
- pdata-dma_slave-rxdata.dma_dev) {
-
- /* Try to grab 2 DMA channels */
- dma_cap_zero(mask_in);
- dma_cap_set(DMA_SLAVE, mask_in);
-
- dd-dma_lch_in.chan = dma_request_channel(mask_in,
- atmel_aes_filter, pdata-dma_slave-rxdata);
-
- if (!dd-dma_lch_in.chan)
- goto err_dma_in;
-
- dd-dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
- dd-dma_lch_in.dma_conf.dst_addr = dd-phys_base +
- AES_IDATAR(0);
- dd-dma_lch_in.dma_conf.src_maxburst = dd-caps.max_burst_size;
- dd-dma_lch_in.dma_conf.src_addr_width =
- DMA_SLAVE_BUSWIDTH_4_BYTES;
- dd-dma_lch_in.dma_conf.dst_maxburst = dd-caps.max_burst_size;
- dd-dma_lch_in.dma_conf.dst_addr_width =
- DMA_SLAVE_BUSWIDTH_4_BYTES;
- dd
Re: [PATCH 2/3] ARM: at91/dt/trivial: before sama5d3, Atmel MPU were using at91 prefix
On 14/10/2013 19:09, Jean-Christophe PLAGNIOL-VILLARD :
On 18:46 Mon 14 Oct , Nicolas Ferre wrote:
Change the sha/aes/tdes compatibility string to match common
case for the at91sam9g45 family which is to keep the at91 prefix.
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/boot/dts/sama5d3.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index b2aabff..99bd4a6 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -342,19 +342,19 @@
};
sha@f8034000 {
- compatible = atmel,sam9g46-sha;
+ compatible = atmel,at91sam9g46-sha;
reg = 0xf8034000 0x100;
interrupts = 42 IRQ_TYPE_LEVEL_HIGH 0;
};
aes@f8038000 {
- compatible = atmel,sam9g46-aes;
+ compatible = atmel,at91sam9g46-aes;
reg = 0xf8038000 0x100;
interrupts = 43 IRQ_TYPE_LEVEL_HIGH 0;
};
tdes@f803c000 {
- compatible = atmel,sam9g46-tdes;
+ compatible = atmel,at91sam9g46-tdes;
reg = 0xf803c000 0x100;
interrupts = 44 IRQ_TYPE_LEVEL_HIGH 0;
you keep the previous compatible in the driver too for backword compatiblity
No, as the consumer of the old compatibility string has never been sent
to mainline (or even mailing-list) and as the dma property is not
compatible with the one existing on our 3.6.9-based kernel.
So, anyway the DT has to be changed for a move from 3.6.9 = 3.10. As I
do not want to bloat the DT forever, let's stick with this new
compatibility string.
Bye,
};
--
1.8.2.2
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[PATCH 1/3] crypto: atmel-tdes - add support for Device Tree
Add support for Device Tree and use of the DMA DT API to
get the channels if needed.
Documentation is added for these DT nodes.
Initial code by: Nicolas Royer and Eukrea.
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
.../devicetree/bindings/crypto/atmel-crypto.txt| 23
drivers/crypto/atmel-tdes.c| 143 ++---
2 files changed, 117 insertions(+), 49 deletions(-)
diff --git a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
index d273f0b..9a24fd9 100644
--- a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
+++ b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
@@ -21,3 +21,26 @@ aes@f8038000 {
dmas = dma1 2 18,
dma1 2 19;
dma-names = tx, rx;
+
+* Triple Data Encryption Standard (Triple DES)
+
+Required properties:
+- compatible : Should be atmel,at91sam9g46-tdes.
+- reg: Should contain TDES registers location and length.
+- interrupts: Should contain the IRQ line for the TDES.
+
+Optional properties:
+- dmas: List of two DMA specifiers as described in
+atmel-dma.txt and dma.txt files.
+- dma-names: Contains one identifier string for each DMA specifier
+ in the dmas property.
+
+Example:
+tdes@f803c000 {
+ compatible = atmel,at91sam9g46-tdes;
+ reg = 0xf803c000 0x100;
+ interrupts = 44 4 0;
+ dmas = dma1 2 20,
+ dma1 2 21;
+ dma-names = tx, rx;
+};
diff --git a/drivers/crypto/atmel-tdes.c b/drivers/crypto/atmel-tdes.c
index 4a99564..6cde5b5 100644
--- a/drivers/crypto/atmel-tdes.c
+++ b/drivers/crypto/atmel-tdes.c
@@ -30,6 +30,7 @@
#include linux/irq.h
#include linux/scatterlist.h
#include linux/dma-mapping.h
+#include linux/of_device.h
#include linux/delay.h
#include linux/crypto.h
#include linux/cryptohash.h
@@ -716,59 +717,50 @@ static int atmel_tdes_dma_init(struct atmel_tdes_dev *dd,
struct crypto_platform_data *pdata)
{
int err = -ENOMEM;
- dma_cap_mask_t mask_in, mask_out;
+ dma_cap_mask_t mask;
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ /* Try to grab 2 DMA channels */
+ dd-dma_lch_in.chan = dma_request_slave_channel_compat(mask,
+ atmel_tdes_filter, pdata-dma_slave-rxdata, dd-dev,
tx);
+ if (!dd-dma_lch_in.chan)
+ goto err_dma_in;
+
+ dd-dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
+ dd-dma_lch_in.dma_conf.dst_addr = dd-phys_base +
+ TDES_IDATA1R;
+ dd-dma_lch_in.dma_conf.src_maxburst = 1;
+ dd-dma_lch_in.dma_conf.src_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_in.dma_conf.dst_maxburst = 1;
+ dd-dma_lch_in.dma_conf.dst_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_in.dma_conf.device_fc = false;
+
+ dd-dma_lch_out.chan = dma_request_slave_channel_compat(mask,
+ atmel_tdes_filter, pdata-dma_slave-txdata, dd-dev,
rx);
+ if (!dd-dma_lch_out.chan)
+ goto err_dma_out;
+
+ dd-dma_lch_out.dma_conf.direction = DMA_DEV_TO_MEM;
+ dd-dma_lch_out.dma_conf.src_addr = dd-phys_base +
+ TDES_ODATA1R;
+ dd-dma_lch_out.dma_conf.src_maxburst = 1;
+ dd-dma_lch_out.dma_conf.src_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_out.dma_conf.dst_maxburst = 1;
+ dd-dma_lch_out.dma_conf.dst_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_out.dma_conf.device_fc = false;
- if (pdata pdata-dma_slave-txdata.dma_dev
- pdata-dma_slave-rxdata.dma_dev) {
-
- /* Try to grab 2 DMA channels */
- dma_cap_zero(mask_in);
- dma_cap_set(DMA_SLAVE, mask_in);
-
- dd-dma_lch_in.chan = dma_request_channel(mask_in,
- atmel_tdes_filter, pdata-dma_slave-rxdata);
-
- if (!dd-dma_lch_in.chan)
- goto err_dma_in;
-
- dd-dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
- dd-dma_lch_in.dma_conf.dst_addr = dd-phys_base +
- TDES_IDATA1R;
- dd-dma_lch_in.dma_conf.src_maxburst = 1;
- dd-dma_lch_in.dma_conf.src_addr_width =
- DMA_SLAVE_BUSWIDTH_4_BYTES;
- dd-dma_lch_in.dma_conf.dst_maxburst = 1;
- dd-dma_lch_in.dma_conf.dst_addr_width =
- DMA_SLAVE_BUSWIDTH_4_BYTES;
- dd-dma_lch_in.dma_conf.device_fc = false;
-
- dma_cap_zero(mask_out);
- dma_cap_set(DMA_SLAVE, mask_out);
- dd-dma_lch_out.chan = dma_request_channel(mask_out,
- atmel_tdes_filter, pdata-dma_slave-txdata);
-
- if (!dd-dma_lch_out.chan)
- goto err_dma_out
[PATCH 2/3] crypto: atmel-sha - add support for Device Tree
Add support for Device Tree and use of the DMA DT API to
get the channels if needed.
Documentation is added for these DT nodes.
Initial code by: Nicolas Royer and Eukrea.
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
.../devicetree/bindings/crypto/atmel-crypto.txt| 22 +
drivers/crypto/atmel-sha.c | 99 --
2 files changed, 97 insertions(+), 24 deletions(-)
diff --git a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
index 9a24fd9..f2aab3d 100644
--- a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
+++ b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
@@ -44,3 +44,25 @@ tdes@f803c000 {
dma1 2 21;
dma-names = tx, rx;
};
+
+* Secure Hash Algorithm (SHA)
+
+Required properties:
+- compatible : Should be atmel,at91sam9g46-sha.
+- reg: Should contain SHA registers location and length.
+- interrupts: Should contain the IRQ line for the SHA.
+
+Optional properties:
+- dmas: One DMA specifiers as described in
+atmel-dma.txt and dma.txt files.
+- dma-names: Contains one identifier string for each DMA specifier
+ in the dmas property. Only one tx string needed.
+
+Example:
+sha@f8034000 {
+ compatible = atmel,at91sam9g46-sha;
+ reg = 0xf8034000 0x100;
+ interrupts = 42 4 0;
+ dmas = dma1 2 17;
+ dma-names = tx;
+};
diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c
index eaed8bf..ecfdf72 100644
--- a/drivers/crypto/atmel-sha.c
+++ b/drivers/crypto/atmel-sha.c
@@ -30,6 +30,7 @@
#include linux/irq.h
#include linux/scatterlist.h
#include linux/dma-mapping.h
+#include linux/of_device.h
#include linux/delay.h
#include linux/crypto.h
#include linux/cryptohash.h
@@ -1263,32 +1264,29 @@ static int atmel_sha_dma_init(struct atmel_sha_dev *dd,
int err = -ENOMEM;
dma_cap_mask_t mask_in;
- if (pdata pdata-dma_slave-rxdata.dma_dev) {
- /* Try to grab DMA channel */
- dma_cap_zero(mask_in);
- dma_cap_set(DMA_SLAVE, mask_in);
+ /* Try to grab DMA channel */
+ dma_cap_zero(mask_in);
+ dma_cap_set(DMA_SLAVE, mask_in);
- dd-dma_lch_in.chan = dma_request_channel(mask_in,
- atmel_sha_filter, pdata-dma_slave-rxdata);
-
- if (!dd-dma_lch_in.chan)
- return err;
-
- dd-dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
- dd-dma_lch_in.dma_conf.dst_addr = dd-phys_base +
- SHA_REG_DIN(0);
- dd-dma_lch_in.dma_conf.src_maxburst = 1;
- dd-dma_lch_in.dma_conf.src_addr_width =
- DMA_SLAVE_BUSWIDTH_4_BYTES;
- dd-dma_lch_in.dma_conf.dst_maxburst = 1;
- dd-dma_lch_in.dma_conf.dst_addr_width =
- DMA_SLAVE_BUSWIDTH_4_BYTES;
- dd-dma_lch_in.dma_conf.device_fc = false;
-
- return 0;
+ dd-dma_lch_in.chan = dma_request_slave_channel_compat(mask_in,
+ atmel_sha_filter, pdata-dma_slave-rxdata, dd-dev,
tx);
+ if (!dd-dma_lch_in.chan) {
+ dev_warn(dd-dev, no DMA channel available\n);
+ return err;
}
- return -ENODEV;
+ dd-dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
+ dd-dma_lch_in.dma_conf.dst_addr = dd-phys_base +
+ SHA_REG_DIN(0);
+ dd-dma_lch_in.dma_conf.src_maxburst = 1;
+ dd-dma_lch_in.dma_conf.src_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_in.dma_conf.dst_maxburst = 1;
+ dd-dma_lch_in.dma_conf.dst_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_in.dma_conf.device_fc = false;
+
+ return 0;
}
static void atmel_sha_dma_cleanup(struct atmel_sha_dev *dd)
@@ -1326,6 +1324,48 @@ static void atmel_sha_get_cap(struct atmel_sha_dev *dd)
}
}
+#if defined(CONFIG_OF)
+static const struct of_device_id atmel_sha_dt_ids[] = {
+ { .compatible = atmel,at91sam9g46-sha },
+ { /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, atmel_sha_dt_ids);
+
+static struct crypto_platform_data *atmel_sha_of_init(struct platform_device
*pdev)
+{
+ struct device_node *np = pdev-dev.of_node;
+ struct crypto_platform_data *pdata;
+
+ if (!np) {
+ dev_err(pdev-dev, device node not found\n);
+ return ERR_PTR(-EINVAL);
+ }
+
+ pdata = devm_kzalloc(pdev-dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata) {
+ dev_err(pdev-dev, could not allocate memory for pdata\n);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ pdata-dma_slave = devm_kzalloc(pdev-dev,
+ sizeof(*(pdata-dma_slave)),
+ GFP_KERNEL);
+ if (!pdata-dma_slave
[PATCH 3/3] crypto: atmel-sha - add sha information to the log
Depending on peripheral capabilities, print SHA information at the end of the probe function. Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com --- drivers/crypto/atmel-sha.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c index ecfdf72..0618be0 100644 --- a/drivers/crypto/atmel-sha.c +++ b/drivers/crypto/atmel-sha.c @@ -1469,7 +1469,9 @@ static int atmel_sha_probe(struct platform_device *pdev) if (err) goto err_algs; - dev_info(dev, Atmel SHA1/SHA256\n); + dev_info(dev, Atmel SHA1/SHA256%s%s\n, + sha_dd-caps.has_sha224 ? /SHA224 : , + sha_dd-caps.has_sha_384_512 ? /SHA384/SHA512 : ); return 0; -- 1.8.2.2 -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] crypto: atmel-aes - add support for Device Tree
Add support for Device Tree and use of the DMA DT API to
get the needed channels.
Documentation is added for these DT nodes.
Initial code by: Nicolas Royer and Eukrea.
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
.../devicetree/bindings/crypto/atmel-crypto.txt| 23
drivers/crypto/atmel-aes.c | 143 ++---
2 files changed, 117 insertions(+), 49 deletions(-)
create mode 100644 Documentation/devicetree/bindings/crypto/atmel-crypto.txt
diff --git a/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
new file mode 100644
index 000..d273f0b
--- /dev/null
+++ b/Documentation/devicetree/bindings/crypto/atmel-crypto.txt
@@ -0,0 +1,23 @@
+* Atmel HW cryptographic accelerators
+
+These are the HW cryptographic accelerators found on some Atmel products.
+
+* Advanced Encryption Standard (AES)
+
+Required properties:
+- compatible : Should be atmel,at91sam9g46-aes.
+- reg: Should contain AES registers location and length.
+- interrupts: Should contain the IRQ line for the AES.
+- dmas: List of two DMA specifiers as described in
+atmel-dma.txt and dma.txt files.
+- dma-names: Contains one identifier string for each DMA specifier
+ in the dmas property.
+
+Example:
+aes@f8038000 {
+ compatible = atmel,at91sam9g46-aes;
+ reg = 0xf8038000 0x100;
+ interrupts = 43 4 0;
+ dmas = dma1 2 18,
+ dma1 2 19;
+ dma-names = tx, rx;
diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
index c1efd91..d7c9e31 100644
--- a/drivers/crypto/atmel-aes.c
+++ b/drivers/crypto/atmel-aes.c
@@ -30,6 +30,7 @@
#include linux/irq.h
#include linux/scatterlist.h
#include linux/dma-mapping.h
+#include linux/of_device.h
#include linux/delay.h
#include linux/crypto.h
#include linux/cryptohash.h
@@ -39,6 +40,7 @@
#include crypto/hash.h
#include crypto/internal/hash.h
#include linux/platform_data/crypto-atmel.h
+#include dt-bindings/dma/at91.h
#include atmel-aes-regs.h
#define CFB8_BLOCK_SIZE1
@@ -747,59 +749,50 @@ static int atmel_aes_dma_init(struct atmel_aes_dev *dd,
struct crypto_platform_data *pdata)
{
int err = -ENOMEM;
- dma_cap_mask_t mask_in, mask_out;
+ dma_cap_mask_t mask;
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ /* Try to grab 2 DMA channels */
+ dd-dma_lch_in.chan = dma_request_slave_channel_compat(mask,
+ atmel_aes_filter, pdata-dma_slave-rxdata, dd-dev,
tx);
+ if (!dd-dma_lch_in.chan)
+ goto err_dma_in;
+
+ dd-dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
+ dd-dma_lch_in.dma_conf.dst_addr = dd-phys_base +
+ AES_IDATAR(0);
+ dd-dma_lch_in.dma_conf.src_maxburst = dd-caps.max_burst_size;
+ dd-dma_lch_in.dma_conf.src_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_in.dma_conf.dst_maxburst = dd-caps.max_burst_size;
+ dd-dma_lch_in.dma_conf.dst_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_in.dma_conf.device_fc = false;
+
+ dd-dma_lch_out.chan = dma_request_slave_channel_compat(mask,
+ atmel_aes_filter, pdata-dma_slave-txdata, dd-dev,
rx);
+ if (!dd-dma_lch_out.chan)
+ goto err_dma_out;
+
+ dd-dma_lch_out.dma_conf.direction = DMA_DEV_TO_MEM;
+ dd-dma_lch_out.dma_conf.src_addr = dd-phys_base +
+ AES_ODATAR(0);
+ dd-dma_lch_out.dma_conf.src_maxburst = dd-caps.max_burst_size;
+ dd-dma_lch_out.dma_conf.src_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_out.dma_conf.dst_maxburst = dd-caps.max_burst_size;
+ dd-dma_lch_out.dma_conf.dst_addr_width =
+ DMA_SLAVE_BUSWIDTH_4_BYTES;
+ dd-dma_lch_out.dma_conf.device_fc = false;
- if (pdata pdata-dma_slave-txdata.dma_dev
- pdata-dma_slave-rxdata.dma_dev) {
-
- /* Try to grab 2 DMA channels */
- dma_cap_zero(mask_in);
- dma_cap_set(DMA_SLAVE, mask_in);
-
- dd-dma_lch_in.chan = dma_request_channel(mask_in,
- atmel_aes_filter, pdata-dma_slave-rxdata);
-
- if (!dd-dma_lch_in.chan)
- goto err_dma_in;
-
- dd-dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
- dd-dma_lch_in.dma_conf.dst_addr = dd-phys_base +
- AES_IDATAR(0);
- dd-dma_lch_in.dma_conf.src_maxburst = dd-caps.max_burst_size;
- dd-dma_lch_in.dma_conf.src_addr_width =
- DMA_SLAVE_BUSWIDTH_4_BYTES;
- dd-dma_lch_in.dma_conf.dst_maxburst = dd-caps.max_burst_size;
- dd-dma_lch_in.dma_conf.dst_addr_width =
- DMA_SLAVE_BUSWIDTH_4_BYTES;
- dd
[PATCH 1/3] ARM: at91/dt/trivial: use macro for AES irq type
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index ca956b6..b2aabff 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -350,7 +350,7 @@
aes@f8038000 {
compatible = atmel,sam9g46-aes;
reg = 0xf8038000 0x100;
- interrupts = 43 4 0;
+ interrupts = 43 IRQ_TYPE_LEVEL_HIGH 0;
};
tdes@f803c000 {
--
1.8.2.2
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[PATCH 3/3] ARM: at91/dt/sama5d3: add DMA information to SHA/AES/TDES nodes
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/boot/dts/sama5d3.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 99bd4a6..aca3893 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -345,18 +345,26 @@
compatible = atmel,at91sam9g46-sha;
reg = 0xf8034000 0x100;
interrupts = 42 IRQ_TYPE_LEVEL_HIGH 0;
+ dmas = dma1 2 AT91_DMA_CFG_PER_ID(17);
+ dma-names = tx;
};
aes@f8038000 {
compatible = atmel,at91sam9g46-aes;
reg = 0xf8038000 0x100;
interrupts = 43 IRQ_TYPE_LEVEL_HIGH 0;
+ dmas = dma1 2 AT91_DMA_CFG_PER_ID(18),
+ dma1 2 AT91_DMA_CFG_PER_ID(19);
+ dma-names = tx, rx;
};
tdes@f803c000 {
compatible = atmel,at91sam9g46-tdes;
reg = 0xf803c000 0x100;
interrupts = 44 IRQ_TYPE_LEVEL_HIGH 0;
+ dmas = dma1 2 AT91_DMA_CFG_PER_ID(20),
+ dma1 2 AT91_DMA_CFG_PER_ID(21);
+ dma-names = tx, rx;
};
dma0: dma-controller@e600 {
--
1.8.2.2
--
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Re: [PATCH 36/51] DMA-API: usb: use dma_set_coherent_mask()
On 20/09/2013 00:01, Russell King :
The correct way for a driver to specify the coherent DMA mask is
not to directly access the field in the struct device, but to use
dma_set_coherent_mask(). Only arch and bus code should access this
member directly.
Convert all direct write accesses to using the correct API.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
drivers/usb/chipidea/ci_hdrc_imx.c |5 +++--
drivers/usb/dwc3/dwc3-exynos.c |5 +++--
drivers/usb/gadget/lpc32xx_udc.c |4 +++-
drivers/usb/host/ehci-atmel.c |5 +++--
For Atmel driver:
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
[..]
diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
index 3b645ff..5831a88 100644
--- a/drivers/usb/host/ehci-atmel.c
+++ b/drivers/usb/host/ehci-atmel.c
@@ -92,8 +92,9 @@ static int ehci_atmel_drv_probe(struct platform_device *pdev)
*/
if (!pdev-dev.dma_mask)
pdev-dev.dma_mask = pdev-dev.coherent_dma_mask;
- if (!pdev-dev.coherent_dma_mask)
- pdev-dev.coherent_dma_mask = DMA_BIT_MASK(32);
+ retval = dma_set_coherent_mask(pdev-dev, DMA_BIT_MASK(32));
+ if (retval)
+ goto fail_create_hcd;
hcd = usb_create_hcd(driver, pdev-dev, dev_name(pdev-dev));
if (!hcd) {
[..]
Thanks,
--
Nicolas Ferre
--
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Re: [PATCH 37/51] DMA-API: usb: use new dma_coerce_mask_and_coherent()
On 20/09/2013 00:02, Russell King : Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk --- drivers/usb/chipidea/ci_hdrc_imx.c |4 +--- drivers/usb/dwc3/dwc3-exynos.c |4 +--- drivers/usb/host/ehci-atmel.c |4 +--- For Atmel driver: Acked-by: Nicolas Ferre nicolas.fe...@atmel.com [..] diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c index 5831a88..8e7323e 100644 --- a/drivers/usb/host/ehci-atmel.c +++ b/drivers/usb/host/ehci-atmel.c @@ -90,9 +90,7 @@ static int ehci_atmel_drv_probe(struct platform_device *pdev) * Since shared usb code relies on it, set it here for now. * Once we have dma capability bindings this can go away. */ - if (!pdev-dev.dma_mask) - pdev-dev.dma_mask = pdev-dev.coherent_dma_mask; - retval = dma_set_coherent_mask(pdev-dev, DMA_BIT_MASK(32)); + retval = dma_coerce_mask_and_coherent(pdev-dev, DMA_BIT_MASK(32)); if (retval) goto fail_create_hcd; [..] Thanks Russell, -- Nicolas Ferre -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/5] ARM: AT91SAM9G45: fix crypto peripherals irq issue due to sparse irq support.
On 11/07/2012 04:27 PM, Jean-Christophe PLAGNIOL-VILLARD : On 17:31 Tue 06 Nov , Nicolas Royer wrote: Spare irq support introduced by commit 8fe82a5 ARM: at91: sparse irq support involves to add the NR_IRQS_LEGACY offset to irq number. Signed-off-by: Nicolas Royer nico...@eukrea.com Acked-by: Nicolas Ferre nicolas.fe...@atmel.com Acked-by: Eric Bénard e...@eukrea.com Tested-by: Eric Bénard e...@eukrea.com Cc: sta...@vger.kernel.org # 3.6 ok will see if we can have it for 3.7 Queued in our at91-fixes pull request for 3.7-final. Thanks a lot, best regards, -- Nicolas Ferre -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
