[PATCH 1/1] crypto: brcm - Avoid double free in ahash_finup()
In Broadcom SPU driver, in case where incremental hash is done in software in ahash_finup(), tmpbuf was freed twice. Reported-by: Dan Carpenter <dan.carpen...@oracle.com> Signed-off-by: Rob Rice <rob.r...@broadcom.com> --- drivers/crypto/bcm/cipher.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/crypto/bcm/cipher.c b/drivers/crypto/bcm/cipher.c index a654a01..cc0d5b9 100644 --- a/drivers/crypto/bcm/cipher.c +++ b/drivers/crypto/bcm/cipher.c @@ -2331,7 +2331,6 @@ static int ahash_finup(struct ahash_request *req) /* Call synchronous update */ ret = crypto_shash_finup(ctx->shash, tmpbuf, req->nbytes, req->result); - kfree(tmpbuf); } else { /* Otherwise call the internal function which uses SPU hw */ return __ahash_finup(req); -- 2.1.0
[PATCH v4 0/3] Add Broadcom SPU Crypto Driver
Changes in v4: - Added Rob Herring's Acked-by to patch 1/3 for bindings doc - In response to Herbert's comment, in ahash_export() and ahash_import(), only copy the hash state, not state params related to cipher or aead algos. - Noticed that hmac_offset in iproc_reqctx_s and spu_hash_params wasn't really used. So removed. Changes in v3: - rebase to 4.10-rc3 in cryptodev-2.6 tree - in bindings doc, list all valid compatibility strings - rename DT nodes "crypto" rather than "spu-crypto" - include a separate DT node for each SPU hardware block. Previously, there was a single SPU node listing a register range for each hw block. - select hash algos in Kconfig. Driver HMAC implementation uses hash sw algos for inner and outer hashes. - Fix crash for AES CCM decrypt when AAD and data are both empty Change in v2: - select CRYPTO_DES in Kconfig The Broadcom SPU crypto driver provides access to SPU hardware for symmetric crypto offload. The driver supports ablkcipher, ahash, and aead operations. The driver supports several Broadcom SoCs with different revisions of the SPU hardware. The driver supports SPU-M and SPU2 hardware revisions, and a couple versions of each hw revision, each version with minor differences. Rob Rice (3): crypto: brcm: DT documentation for Broadcom SPU hardware crypto: brcm: Add Broadcom SPU driver arm64: dts: ns2: Add Broadcom SPU driver DT entry. .../devicetree/bindings/crypto/brcm,spu-crypto.txt | 22 + arch/arm64/boot/dts/broadcom/ns2.dtsi | 24 + drivers/crypto/Kconfig | 15 + drivers/crypto/Makefile|2 + drivers/crypto/bcm/Makefile| 15 + drivers/crypto/bcm/cipher.c| 4964 drivers/crypto/bcm/cipher.h| 483 ++ drivers/crypto/bcm/spu.c | 1251 + drivers/crypto/bcm/spu.h | 287 ++ drivers/crypto/bcm/spu2.c | 1401 ++ drivers/crypto/bcm/spu2.h | 228 + drivers/crypto/bcm/spum.h | 174 + drivers/crypto/bcm/util.c | 581 +++ drivers/crypto/bcm/util.h | 116 + 14 files changed, 9563 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt create mode 100644 drivers/crypto/bcm/Makefile create mode 100644 drivers/crypto/bcm/cipher.c create mode 100644 drivers/crypto/bcm/cipher.h create mode 100644 drivers/crypto/bcm/spu.c create mode 100644 drivers/crypto/bcm/spu.h create mode 100644 drivers/crypto/bcm/spu2.c create mode 100644 drivers/crypto/bcm/spu2.h create mode 100644 drivers/crypto/bcm/spum.h create mode 100644 drivers/crypto/bcm/util.c create mode 100644 drivers/crypto/bcm/util.h -- 2.1.0
[PATCH v4 3/3] arm64: dts: ns2: Add Broadcom SPU driver DT entry.
Add Northstar2 device tree entry for Broadcom Secure Processing Unit (SPU) crypto hardware. Signed-off-by: Steve Lin <steven.l...@broadcom.com> Signed-off-by: Rob Rice <rob.r...@broadcom.com> --- arch/arm64/boot/dts/broadcom/ns2.dtsi | 24 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi index 4fcdeca..ec1a628 100644 --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi @@ -218,6 +218,12 @@ brcm,use-bcm-hdr; }; + crypto0: crypto@612d { + compatible = "brcm,spum-crypto"; + reg = <0x612d 0x900>; + mboxes = < 0>; + }; + pdc1: iproc-pdc1@612e { compatible = "brcm,iproc-pdc-mbox"; reg = <0x612e 0x445>; /* PDC FS1 regs */ @@ -227,6 +233,12 @@ brcm,use-bcm-hdr; }; + crypto1: crypto@612f { + compatible = "brcm,spum-crypto"; + reg = <0x612f 0x900>; + mboxes = < 0>; + }; + pdc2: iproc-pdc2@6130 { compatible = "brcm,iproc-pdc-mbox"; reg = <0x6130 0x445>; /* PDC FS2 regs */ @@ -236,6 +248,12 @@ brcm,use-bcm-hdr; }; + crypto2: crypto@6131 { + compatible = "brcm,spum-crypto"; + reg = <0x6131 0x900>; + mboxes = < 0>; + }; + pdc3: iproc-pdc3@6132 { compatible = "brcm,iproc-pdc-mbox"; reg = <0x6132 0x445>; /* PDC FS3 regs */ @@ -245,6 +263,12 @@ brcm,use-bcm-hdr; }; + crypto3: crypto@6133 { + compatible = "brcm,spum-crypto"; + reg = <0x6133 0x900>; + mboxes = < 0>; + }; + dma0: dma@6136 { compatible = "arm,pl330", "arm,primecell"; reg = <0x6136 0x1000>; -- 2.1.0
[PATCH v4 1/3] crypto: brcm: DT documentation for Broadcom SPU hardware
Device tree documentation for Broadcom Secure Processing Unit (SPU) crypto hardware. Signed-off-by: Steve Lin <steven.l...@broadcom.com> Signed-off-by: Rob Rice <rob.r...@broadcom.com> Acked-by: Rob Herring <r...@kernel.org> --- .../devicetree/bindings/crypto/brcm,spu-crypto.txt | 22 ++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt diff --git a/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt new file mode 100644 index 000..29b6007 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt @@ -0,0 +1,22 @@ +The Broadcom Secure Processing Unit (SPU) hardware supports symmetric +cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware +blocks. + +Required properties: +- compatible: Should be one of the following: + brcm,spum-crypto - for devices with SPU-M hardware + brcm,spu2-crypto - for devices with SPU2 hardware + brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3 + and Rabin Fingerprint support + brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware + +- reg: Should contain SPU registers location and length. +- mboxes: The mailbox channel to be used to communicate with the SPU. + Mailbox channels correspond to DMA rings on the device. + +Example: + crypto@612d { + compatible = "brcm,spum-crypto"; + reg = <0 0x612d 0 0x900>; + mboxes = < 0>; + }; -- 2.1.0
Re: [PATCH v3 2/3] crypto: brcm: Add Broadcom SPU driver
Herbert, > On Feb 2, 2017, at 9:05 AM, Herbert Xu <herb...@gondor.apana.org.au> wrote: > > On Wed, Jan 25, 2017 at 11:44:48AM -0500, Rob Rice wrote: >> >> +static int ahash_export(struct ahash_request *req, void *out) >> +{ >> +const struct iproc_reqctx_s *rctx = ahash_request_ctx(req); >> + >> +memcpy(out, rctx, offsetof(struct iproc_reqctx_s, msg_buf)); >> +return 0; >> +} > > The reqctx data structure seems to contain a lot of info unrelated > to the hash state. Can't we get away with just copying the hash > state (incr_hash) itself? Yes, I see your point. I’ll whittle the export state down to just what’s needed for the hash. > > Cheers, > -- > Email: Herbert Xu <herb...@gondor.apana.org.au> > Home Page: http://gondor.apana.org.au/~herbert/ > PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
[PATCH v3 3/3] arm64: dts: ns2: Add Broadcom SPU driver DT entry.
Add Northstar2 device tree entry for Broadcom Secure Processing Unit (SPU) crypto hardware. Signed-off-by: Steve Lin <steven.l...@broadcom.com> Signed-off-by: Rob Rice <rob.r...@broadcom.com> --- arch/arm64/boot/dts/broadcom/ns2.dtsi | 24 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi index 4fcdeca..ec1a628 100644 --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi @@ -218,6 +218,12 @@ brcm,use-bcm-hdr; }; + crypto0: crypto@612d { + compatible = "brcm,spum-crypto"; + reg = <0x612d 0x900>; + mboxes = < 0>; + }; + pdc1: iproc-pdc1@612e { compatible = "brcm,iproc-pdc-mbox"; reg = <0x612e 0x445>; /* PDC FS1 regs */ @@ -227,6 +233,12 @@ brcm,use-bcm-hdr; }; + crypto1: crypto@612f { + compatible = "brcm,spum-crypto"; + reg = <0x612f 0x900>; + mboxes = < 0>; + }; + pdc2: iproc-pdc2@6130 { compatible = "brcm,iproc-pdc-mbox"; reg = <0x6130 0x445>; /* PDC FS2 regs */ @@ -236,6 +248,12 @@ brcm,use-bcm-hdr; }; + crypto2: crypto@6131 { + compatible = "brcm,spum-crypto"; + reg = <0x6131 0x900>; + mboxes = < 0>; + }; + pdc3: iproc-pdc3@6132 { compatible = "brcm,iproc-pdc-mbox"; reg = <0x6132 0x445>; /* PDC FS3 regs */ @@ -245,6 +263,12 @@ brcm,use-bcm-hdr; }; + crypto3: crypto@6133 { + compatible = "brcm,spum-crypto"; + reg = <0x6133 0x900>; + mboxes = < 0>; + }; + dma0: dma@6136 { compatible = "arm,pl330", "arm,primecell"; reg = <0x6136 0x1000>; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 1/3] crypto: brcm: DT documentation for Broadcom SPU hardware
Device tree documentation for Broadcom Secure Processing Unit (SPU) crypto hardware. Signed-off-by: Steve Lin <steven.l...@broadcom.com> Signed-off-by: Rob Rice <rob.r...@broadcom.com> --- .../devicetree/bindings/crypto/brcm,spu-crypto.txt | 22 ++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt diff --git a/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt new file mode 100644 index 000..29b6007 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt @@ -0,0 +1,22 @@ +The Broadcom Secure Processing Unit (SPU) hardware supports symmetric +cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware +blocks. + +Required properties: +- compatible: Should be one of the following: + brcm,spum-crypto - for devices with SPU-M hardware + brcm,spu2-crypto - for devices with SPU2 hardware + brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3 + and Rabin Fingerprint support + brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware + +- reg: Should contain SPU registers location and length. +- mboxes: The mailbox channel to be used to communicate with the SPU. + Mailbox channels correspond to DMA rings on the device. + +Example: + crypto@612d { + compatible = "brcm,spum-crypto"; + reg = <0 0x612d 0 0x900>; + mboxes = < 0>; + }; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 0/3] Add Broadcom SPU Crypto Driver
Changes in v3: - rebase to 4.10-rc3 in cryptodev-2.6 tree - in bindings doc, list all valid compatibility strings - rename DT nodes "crypto" rather than "spu-crypto" - include a separate DT node for each SPU hardware block. Previously, there was a single SPU node listing a register range for each hw block. - select hash algos in Kconfig. Driver HMAC implementation uses hash sw algos for inner and outer hashes. - Fix crash for AES CCM decrypt when AAD and data are both empty Change in v2: - select CRYPTO_DES in Kconfig The Broadcom SPU crypto driver provides access to SPU hardware for symmetric crypto offload. The driver supports ablkcipher, ahash, and aead operations. The driver supports several Broadcom SoCs with different revisions of the SPU hardware. The driver supports SPU-M and SPU2 hardware revisions, and a couple versions of each hw revision, each version with minor differences. Rob Rice (3): crypto: brcm: DT documentation for Broadcom SPU hardware crypto: brcm: Add Broadcom SPU driver arm64: dts: ns2: Add Broadcom SPU driver DT entry. .../devicetree/bindings/crypto/brcm,spu-crypto.txt | 22 + arch/arm64/boot/dts/broadcom/ns2.dtsi | 24 + drivers/crypto/Kconfig | 15 + drivers/crypto/Makefile|2 + drivers/crypto/bcm/Makefile| 15 + drivers/crypto/bcm/cipher.c| 4955 drivers/crypto/bcm/cipher.h| 475 ++ drivers/crypto/bcm/spu.c | 1252 + drivers/crypto/bcm/spu.h | 288 ++ drivers/crypto/bcm/spu2.c | 1402 ++ drivers/crypto/bcm/spu2.h | 228 + drivers/crypto/bcm/spum.h | 174 + drivers/crypto/bcm/util.c | 581 +++ drivers/crypto/bcm/util.h | 116 + 14 files changed, 9549 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt create mode 100644 drivers/crypto/bcm/Makefile create mode 100644 drivers/crypto/bcm/cipher.c create mode 100644 drivers/crypto/bcm/cipher.h create mode 100644 drivers/crypto/bcm/spu.c create mode 100644 drivers/crypto/bcm/spu.h create mode 100644 drivers/crypto/bcm/spu2.c create mode 100644 drivers/crypto/bcm/spu2.h create mode 100644 drivers/crypto/bcm/spum.h create mode 100644 drivers/crypto/bcm/util.c create mode 100644 drivers/crypto/bcm/util.h -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
arm64 broken
I’m working on updating a patchset. The master branch in crypto-2.6 doesn’t compile for ARM64. The first couple errors are listed below. A colleague believes that the following commit in rc2 fixes the problem. commit b4b8664d291ac1998e0f0bcdc96b6397f0fe68b3 Author: Al Viro> Date: Mon Dec 26 04:10:19 2016 -0500 arm64: don't pull uaccess.h into *.S Split asm-only parts of arm64 uaccess.h into a new header and use that from *.S. Signed-off-by: Al Viro > Any chance we could either pull in the fix or move to rc2? Thanks, Rob AS arch/arm64/kernel/entry.o In file included from ./include/linux/sched.h:17:0, from ./include/linux/uaccess.h:4, from arch/arm64/kernel/entry.S:34: ./include/linux/kernel.h:49:0: warning: "ALIGN" redefined #define ALIGN(x, a) __ALIGN_KERNEL((x), (a)) ^ In file included from arch/arm64/kernel/entry.S:22:0: ./include/linux/linkage.h:78:0: note: this is the location of the previous definition #define ALIGN __ALIGN ^ In file included from ./include/linux/time.h:7:0, from ./include/uapi/linux/timex.h:56, from ./include/linux/timex.h:56, from ./include/linux/sched.h:19, from ./include/linux/uaccess.h:4, from arch/arm64/kernel/entry.S:34: ./include/linux/time64.h:36:0: warning: "NSEC_PER_SEC" redefined #define NSEC_PER_SEC 10L-- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 3/3] crypto: brcm: Add Broadcom SPU driver DT entry.
Add Northstar2 device tree entry for Broadcom Secure Processing Unit (SPU) crypto driver. Signed-off-by: Steve Lin <steven.l...@broadcom.com> Signed-off-by: Rob Rice <rob.r...@broadcom.com> --- arch/arm64/boot/dts/broadcom/ns2.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi index d95dc40..8b81b0d 100644 --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi @@ -191,6 +191,18 @@ #include "ns2-clock.dtsi" + spu-crypto@612d { + compatible = "brcm,spum-crypto"; + reg = <0x612d 0x900>,/* SPU 0 control regs */ + <0x612f 0x900>, /* SPU 1 control regs */ + <0x6131 0x900>, /* SPU 2 control regs */ + <0x6133 0x900>; /* SPU 3 control regs */ + mboxes = < 0>, + < 0>, + < 0>, + < 0>; + }; + dma0: dma@6136 { compatible = "arm,pl330", "arm,primecell"; reg = <0x6136 0x1000>; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/3] crypto: brcm: DT documentation for Broadcom SPU driver
Device tree documentation for Broadcom Secure Processing Unit (SPU) crypto driver. Signed-off-by: Steve Lin <steven.l...@broadcom.com> Signed-off-by: Rob Rice <rob.r...@broadcom.com> --- .../devicetree/bindings/crypto/brcm,spu-crypto.txt | 25 ++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt diff --git a/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt new file mode 100644 index 000..e5fe942 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt @@ -0,0 +1,25 @@ +The Broadcom Secure Processing Unit (SPU) driver supports symmetric +cryptographic offload for Broadcom SoCs with SPU hardware. A SoC may have +multiple SPU hardware blocks. + +Required properties: +- compatible : Should be "brcm,spum-crypto" for devices with SPU-M hardware + (e.g., Northstar2) or "brcm,spum-nsp-crypto" for the Northstar Plus variant + of the SPU-M hardware. + +- reg: Should contain SPU registers location and length. +- mboxes: A list of mailbox channels to be used by the kernel driver. Mailbox +channels correspond to DMA rings on the device. + +Example: + spu-crypto@612d { + compatible = "brcm,spum-crypto"; + reg = <0 0x612d 0 0x900>,/* SPU 0 control regs */ + <0 0x612f 0 0x900>, /* SPU 1 control regs */ + <0 0x6131 0 0x900>, /* SPU 2 control regs */ + <0 0x6133 0 0x900>; /* SPU 3 control regs */ + mboxes = < 0>, + < 0>, + < 0>, + < 0>; + }; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/3] Add Broadcom SPU Crypto Driver
Change in v2: - select CRYPTO_DES in Kconfig The Broadcom SPU crypto driver provides access to SPU hardware for symmetric crypto offload. The driver supports ablkcipher, ahash, and aead operations. The driver supports several Broadcom SoCs with different revisions of the SPU hardware. The driver supports SPU-M and SPU2 hardware revisions, and a couple versions of each hw revision, each version with minor differences. The device tree entries for the SPU depends on device tree entries for the Broadcom PDC driver. The PDC DT entries have been accepted upstream, but are not yet included in the crypto repo. See commit e79249143f468f8d3365dbbd1642c045bdcc98c5. Rob Rice (3): crypto: brcm: DT documentation for Broadcom SPU driver crypto: brcm: Add Broadcom SPU driver crypto: brcm: Add Broadcom SPU driver DT entry. .../devicetree/bindings/crypto/brcm,spu-crypto.txt | 25 + arch/arm64/boot/dts/broadcom/ns2.dtsi | 12 + drivers/crypto/Kconfig | 11 + drivers/crypto/Makefile|1 + drivers/crypto/bcm/Makefile| 15 + drivers/crypto/bcm/cipher.c| 4943 drivers/crypto/bcm/cipher.h| 472 ++ drivers/crypto/bcm/spu.c | 1252 + drivers/crypto/bcm/spu.h | 288 ++ drivers/crypto/bcm/spu2.c | 1402 ++ drivers/crypto/bcm/spu2.h | 228 + drivers/crypto/bcm/spum.h | 174 + drivers/crypto/bcm/util.c | 584 +++ drivers/crypto/bcm/util.h | 117 + 14 files changed, 9524 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt create mode 100644 drivers/crypto/bcm/Makefile create mode 100644 drivers/crypto/bcm/cipher.c create mode 100644 drivers/crypto/bcm/cipher.h create mode 100644 drivers/crypto/bcm/spu.c create mode 100644 drivers/crypto/bcm/spu.h create mode 100644 drivers/crypto/bcm/spu2.c create mode 100644 drivers/crypto/bcm/spu2.h create mode 100644 drivers/crypto/bcm/spum.h create mode 100644 drivers/crypto/bcm/util.c create mode 100644 drivers/crypto/bcm/util.h -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] crypto: brcm: Add Broadcom SPU driver DT entry.
Add Northstar2 device tree entry for Broadcom Secure Processing Unit (SPU) crypto driver. Signed-off-by: Steve Lin <steven.l...@broadcom.com> Signed-off-by: Rob Rice <rob.r...@broadcom.com> --- arch/arm64/boot/dts/broadcom/ns2.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi index d95dc40..8b81b0d 100644 --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi @@ -191,6 +191,18 @@ #include "ns2-clock.dtsi" + spu-crypto@612d { + compatible = "brcm,spum-crypto"; + reg = <0x612d 0x900>,/* SPU 0 control regs */ + <0x612f 0x900>, /* SPU 1 control regs */ + <0x6131 0x900>, /* SPU 2 control regs */ + <0x6133 0x900>; /* SPU 3 control regs */ + mboxes = < 0>, + < 0>, + < 0>, + < 0>; + }; + dma0: dma@6136 { compatible = "arm,pl330", "arm,primecell"; reg = <0x6136 0x1000>; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] Add Broadcom SPU Crypto Driver
The Broadcom SPU crypto driver provides access to SPU hardware for symmetric crypto offload. The driver supports ablkcipher, ahash, and aead operations. The driver supports several Broadcom SoCs with different revisions of the SPU hardware. The driver supports SPU-M and SPU2 hardware revisions, and a couple versions of each hw revision, each version with minor differences. The device tree entries for the SPU depends on device tree entries for the Broadcom PDC driver. The PDC DT entries have been accepted upstream, but are not yet included in the crypto repo. See commit e79249143f468f8d3365dbbd1642c045bdcc98c5. Rob Rice (3): crypto: brcm: DT documentation for Broadcom SPU driver crypto: brcm: Add Broadcom SPU driver crypto: brcm: Add Broadcom SPU driver DT entry. .../devicetree/bindings/crypto/brcm,spu-crypto.txt | 25 + arch/arm64/boot/dts/broadcom/ns2.dtsi | 12 + drivers/crypto/Kconfig | 10 + drivers/crypto/Makefile|1 + drivers/crypto/bcm/Makefile| 15 + drivers/crypto/bcm/cipher.c| 4943 drivers/crypto/bcm/cipher.h| 472 ++ drivers/crypto/bcm/spu.c | 1252 + drivers/crypto/bcm/spu.h | 288 ++ drivers/crypto/bcm/spu2.c | 1402 ++ drivers/crypto/bcm/spu2.h | 228 + drivers/crypto/bcm/spum.h | 174 + drivers/crypto/bcm/util.c | 584 +++ drivers/crypto/bcm/util.h | 117 + 14 files changed, 9523 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt create mode 100644 drivers/crypto/bcm/Makefile create mode 100644 drivers/crypto/bcm/cipher.c create mode 100644 drivers/crypto/bcm/cipher.h create mode 100644 drivers/crypto/bcm/spu.c create mode 100644 drivers/crypto/bcm/spu.h create mode 100644 drivers/crypto/bcm/spu2.c create mode 100644 drivers/crypto/bcm/spu2.h create mode 100644 drivers/crypto/bcm/spum.h create mode 100644 drivers/crypto/bcm/util.c create mode 100644 drivers/crypto/bcm/util.h -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] crypto: brcm: DT documentation for Broadcom SPU driver
Device tree documentation for Broadcom Secure Processing Unit (SPU) crypto driver. Signed-off-by: Steve Lin <steven.l...@broadcom.com> Signed-off-by: Rob Rice <rob.r...@broadcom.com> --- .../devicetree/bindings/crypto/brcm,spu-crypto.txt | 25 ++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt diff --git a/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt new file mode 100644 index 000..e5fe942 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt @@ -0,0 +1,25 @@ +The Broadcom Secure Processing Unit (SPU) driver supports symmetric +cryptographic offload for Broadcom SoCs with SPU hardware. A SoC may have +multiple SPU hardware blocks. + +Required properties: +- compatible : Should be "brcm,spum-crypto" for devices with SPU-M hardware + (e.g., Northstar2) or "brcm,spum-nsp-crypto" for the Northstar Plus variant + of the SPU-M hardware. + +- reg: Should contain SPU registers location and length. +- mboxes: A list of mailbox channels to be used by the kernel driver. Mailbox +channels correspond to DMA rings on the device. + +Example: + spu-crypto@612d { + compatible = "brcm,spum-crypto"; + reg = <0 0x612d 0 0x900>,/* SPU 0 control regs */ + <0 0x612f 0 0x900>, /* SPU 1 control regs */ + <0 0x6131 0 0x900>, /* SPU 2 control regs */ + <0 0x6133 0 0x900>; /* SPU 3 control regs */ + mboxes = < 0>, + < 0>, + < 0>, + < 0>; + }; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html