Re: [PATCH V2 0/6] Enable NX 842 compression engine on Power9
On 07/18/2017 11:06 AM, Sukadev Bhattiprolu wrote:
> Nicholas Piggin [nicholas.pig...@gmail.com] wrote:
>> On Mon, 17 Jul 2017 16:43:19 -0700
>> Haren Myneni <ha...@linux.vnet.ibm.com> wrote:
>>
>>> [PATCH V2 0/6] Enable NX 842 compression engine on Power9
>>> This patchset depends on VAS kernel changes:
>>> https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-May/158178.html
>>
>> Just a question, we no longer invalidate the copy buffer on context
>> switch after this patch:
>>
>> 07d2a628bc ("powerpc/64s: Avoid cpabort in context switch when possible")
>>
>> If your vas address mappings are visible only to kernel, only used in
>> process / kthread context, and only used with kernel preemption disabled,
>> this is okay.
>
> Kernel preemption is not explicitly disabled in the NX driver I think
> and
>
>>
>> If userspace can possibly copy/paste to the mappings or if you need to
>> sleep or call this from interrupt context, we need to work out how to
>> invalidate the copy buffer.
>
> user space cannot copy/paste to the mappings yet (that mechanism is
> further out).
>
> NX driver calls:
>
> vas_copy(, ...);
> vas_paste(addr, ...);
>
> but not from an interrupt context. Can/should we disable premption between
> the copy/paste and to avoid having to invalidate the copy buffer?
Nick, Also we do not support 842 in user space. Only future NX gzip compression
module.
If OK, will add disable premption for copy/paste. Thanks for review,
>
> Sukadev
>
Re: [PATCH V2 0/6] Enable NX 842 compression engine on Power9
Nicholas Piggin [nicholas.pig...@gmail.com] wrote:
> On Mon, 17 Jul 2017 16:43:19 -0700
> Haren Myneni <ha...@linux.vnet.ibm.com> wrote:
>
> > [PATCH V2 0/6] Enable NX 842 compression engine on Power9
> > This patchset depends on VAS kernel changes:
> > https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-May/158178.html
>
> Just a question, we no longer invalidate the copy buffer on context
> switch after this patch:
>
> 07d2a628bc ("powerpc/64s: Avoid cpabort in context switch when possible")
>
> If your vas address mappings are visible only to kernel, only used in
> process / kthread context, and only used with kernel preemption disabled,
> this is okay.
Kernel preemption is not explicitly disabled in the NX driver I think
and
>
> If userspace can possibly copy/paste to the mappings or if you need to
> sleep or call this from interrupt context, we need to work out how to
> invalidate the copy buffer.
user space cannot copy/paste to the mappings yet (that mechanism is
further out).
NX driver calls:
vas_copy(, ...);
vas_paste(addr, ...);
but not from an interrupt context. Can/should we disable premption between
the copy/paste and to avoid having to invalidate the copy buffer?
Sukadev
Re: [PATCH V2 0/6] Enable NX 842 compression engine on Power9
On Mon, 17 Jul 2017 16:43:19 -0700
Haren Myneni <ha...@linux.vnet.ibm.com> wrote:
> [PATCH V2 0/6] Enable NX 842 compression engine on Power9
>
> P9 introduces Virtual Accelerator Switchboard (VAS) to communicate
> with NX 842 engine. icswx function is used to access NX before.
> On powerNV systems, NX-842 driver invokes VAS functions for
> configuring RxFIFO (receive window) per each NX engine. VAS uses
> this FIFO to communicate the request to NX. The kernel opens send
> window which is used to transfer compression/decompression requests
> to VAS. It maps the send window to the corresponding RxFIFO.
> copy/paste instructions are used to pass the CRB to VAS.
>
> This patch series adds P9 NX support for 842 compression engine.
> First 4 patches reorganize the current code so that VAS function
> can be added.
> - nx842_powernv_function points to VAS function if VAS feature is
> available. Otherwise icswx function is used.
> - Move configure CRB code nx842_cfg_crb()
> - In addition to freeing co-processor structs for initialization
> failures and exit, both send and receive windows have to closed
> for VAS.
> - Move updating coprocessor info list to nx842_add_coprocs_list().
>
> The last 2 patches adds configuring and invoking VAS, and also
> checking P9 NX specific errors that are provided in co-processor
> status block (CSB) for failures.
>
> Patches have been tested on P9 DD1 system using VAS changes and
> on P8 HW to make sure no regression.
>
> This patchset depends on VAS kernel changes:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-May/158178.html
Just a question, we no longer invalidate the copy buffer on context
switch after this patch:
07d2a628bc ("powerpc/64s: Avoid cpabort in context switch when possible")
If your vas address mappings are visible only to kernel, only used in
process / kthread context, and only used with kernel preemption disabled,
this is okay.
If userspace can possibly copy/paste to the mappings or if you need to
sleep or call this from interrupt context, we need to work out how to
invalidate the copy buffer.
Thanks,
Nick
[PATCH V2 0/6] Enable NX 842 compression engine on Power9
[PATCH V2 0/6] Enable NX 842 compression engine on Power9 P9 introduces Virtual Accelerator Switchboard (VAS) to communicate with NX 842 engine. icswx function is used to access NX before. On powerNV systems, NX-842 driver invokes VAS functions for configuring RxFIFO (receive window) per each NX engine. VAS uses this FIFO to communicate the request to NX. The kernel opens send window which is used to transfer compression/decompression requests to VAS. It maps the send window to the corresponding RxFIFO. copy/paste instructions are used to pass the CRB to VAS. This patch series adds P9 NX support for 842 compression engine. First 4 patches reorganize the current code so that VAS function can be added. - nx842_powernv_function points to VAS function if VAS feature is available. Otherwise icswx function is used. - Move configure CRB code nx842_cfg_crb() - In addition to freeing co-processor structs for initialization failures and exit, both send and receive windows have to closed for VAS. - Move updating coprocessor info list to nx842_add_coprocs_list(). The last 2 patches adds configuring and invoking VAS, and also checking P9 NX specific errors that are provided in co-processor status block (CSB) for failures. Patches have been tested on P9 DD1 system using VAS changes and on P8 HW to make sure no regression. This patchset depends on VAS kernel changes: https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-May/158178.html Thanks to Sukadev Bhattiprolu for his review, input and testing with VAS changes. Also thanks to Michael Ellerman and Benjamin Herrenschmidt for their valuable guidance and comments. Changelog[v2] - Open/close send windows in nx842_poernv_crypto_init/exit_vas(). - Changes for the new device-tree NX properties such as priority and compatible properties. - Incorporate review comments from Michael Ellerman. - Other minor issues found during HW testing. Haren Myneni (6): crypto/nx842: Rename nx842_powernv_function as icswx function crypto/nx: Create nx842_configure_crb function crypto/nx: Create nx842_delete_coprocs function crypto/nx: Add nx842_add_coprocs_list function crypto/nx: Add P9 NX specific error codes for 842 engine crypto/nx: Add P9 NX support for 842 compression engine. arch/powerpc/include/asm/icswx.h | 3 + drivers/crypto/nx/Kconfig | 1 + drivers/crypto/nx/nx-842-powernv.c | 499 + drivers/crypto/nx/nx-842.c | 2 +- drivers/crypto/nx/nx-842.h | 8 + 5 files changed, 465 insertions(+), 48 deletions(-) -- 2.11.0
