Re: [PATCH v7 04/14] crypto: add a new driver for Marvell's CESA

2015-06-19 Thread Herbert Xu
On Thu, Jun 18, 2015 at 03:46:20PM +0200, Boris Brezillon wrote:

 + dram = mv_mbus_dram_info_nooverlap();

This doesn't compile because it hasn't made it into mainline yet.
I'm afraid this patch-set will have to wait until that happens.

Cheers,
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Re: [PATCH v7 04/14] crypto: add a new driver for Marvell's CESA

2015-06-19 Thread Herbert Xu
On Fri, Jun 19, 2015 at 10:40:15AM +0200, Gregory CLEMENT wrote:
 
 For this option you can use the branch mvebu/drivers located at
  git://git.infradead.org/linux-mvebu.git.
 
 In this branch there is the commit bus: mvebu-mbus: add 
 mv_mbus_dram_info_nooverlap()
 but not only this one because it depends also on fixes which have been
 merged in this same branch.

It looks like the parent of this changeset is already in the mainline
so it's literally just a single patch.  I'll try to pull it into
cryptodev.

Thanks,
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Re: [PATCH v7 04/14] crypto: add a new driver for Marvell's CESA

2015-06-19 Thread Gregory CLEMENT
Hi Thomas, Herbert,

On 19/06/2015 10:24, Thomas Petazzoni wrote:
 Hello Herbert,
 
 On Fri, 19 Jun 2015 14:42:56 +0800, Herbert Xu wrote:
 On Thu, Jun 18, 2015 at 03:46:20PM +0200, Boris Brezillon wrote:

 +   dram = mv_mbus_dram_info_nooverlap();

 This doesn't compile because it hasn't made it into mainline yet.
 I'm afraid this patch-set will have to wait until that happens.
 
 We have two options here:
 
  1/ We can ask the mach-mvebu maintainers to provide a branch with just
 the commit implementing mv_mbus_dram_info_nooverlap(), and you
 merge that branch into your tree as a dependency.

For this option you can use the branch mvebu/drivers located at
 git://git.infradead.org/linux-mvebu.git.

In this branch there is the commit bus: mvebu-mbus: add 
mv_mbus_dram_info_nooverlap()
but not only this one because it depends also on fixes which have been
merged in this same branch.

This branch is immutable and have already been merged in arm-soc.

Thanks,

Gregory

 
  2/ We temporarily revert back to using mv_mbus_dram_info(). For the
 vast majority of platforms, this is OK. It's only if you have 4 GB
 of RAM or more that it causes problem. And then we switch to
 mv_mbus_dram_info_nooverlap() as part of the -rc cycle.
 
 (2) is probably easier. Herbert, what do you think?
 
 Thomas
 


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Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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Re: [PATCH v7 04/14] crypto: add a new driver for Marvell's CESA

2015-06-19 Thread Thomas Petazzoni
Hello Herbert,

On Fri, 19 Jun 2015 14:42:56 +0800, Herbert Xu wrote:
 On Thu, Jun 18, 2015 at 03:46:20PM +0200, Boris Brezillon wrote:
 
  +   dram = mv_mbus_dram_info_nooverlap();
 
 This doesn't compile because it hasn't made it into mainline yet.
 I'm afraid this patch-set will have to wait until that happens.

We have two options here:

 1/ We can ask the mach-mvebu maintainers to provide a branch with just
the commit implementing mv_mbus_dram_info_nooverlap(), and you
merge that branch into your tree as a dependency.

 2/ We temporarily revert back to using mv_mbus_dram_info(). For the
vast majority of platforms, this is OK. It's only if you have 4 GB
of RAM or more that it causes problem. And then we switch to
mv_mbus_dram_info_nooverlap() as part of the -rc cycle.

(2) is probably easier. Herbert, what do you think?

Thomas
-- 
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Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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[PATCH v7 04/14] crypto: add a new driver for Marvell's CESA

2015-06-18 Thread Boris Brezillon
The existing mv_cesa driver supports some features of the CESA IP but is
quite limited, and reworking it to support new features (like involving the
TDMA engine to offload the CPU) is almost impossible.
This driver has been rewritten from scratch to take those new features into
account.

This commit introduce the base infrastructure allowing us to add support
for DMA optimization.
It also includes support for one hash (SHA1) and one cipher (AES)
algorithm, and enable those features on the Armada 370 SoC.

Other algorithms and platforms will be added later on.

Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Signed-off-by: Arnaud Ebalard a...@natisbad.org
---
 drivers/crypto/Kconfig  |  15 +
 drivers/crypto/Makefile |   1 +
 drivers/crypto/marvell/Makefile |   2 +
 drivers/crypto/marvell/cesa.c   | 417 +++
 drivers/crypto/marvell/cesa.h   | 554 +++
 drivers/crypto/marvell/cipher.c | 331 ++
 drivers/crypto/marvell/hash.c   | 720 
 7 files changed, 2040 insertions(+)
 create mode 100644 drivers/crypto/marvell/Makefile
 create mode 100644 drivers/crypto/marvell/cesa.c
 create mode 100644 drivers/crypto/marvell/cesa.h
 create mode 100644 drivers/crypto/marvell/cipher.c
 create mode 100644 drivers/crypto/marvell/hash.c

diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index a6bbea8..cbc3d3d 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -174,6 +174,21 @@ config CRYPTO_DEV_MV_CESA
 
  Currently the driver supports AES in ECB and CBC mode without DMA.
 
+config CRYPTO_DEV_MARVELL_CESA
+   tristate New Marvell's Cryptographic Engine driver
+   depends on (PLAT_ORION || ARCH_MVEBU || COMPILE_TEST)  HAS_DMA  
HAS_IOMEM
+   select CRYPTO_AES
+   select CRYPTO_DES
+   select CRYPTO_BLKCIPHER
+   select CRYPTO_HASH
+   select SRAM
+   help
+ This driver allows you to utilize the Cryptographic Engines and
+ Security Accelerator (CESA) which can be found on the Armada 370.
+
+ This driver is aimed at replacing the mv_cesa driver. This will only
+ happen once it has received proper testing.
+
 config CRYPTO_DEV_NIAGARA2
tristate Niagara2 Stream Processing Unit driver
select CRYPTO_DES
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index fb84be7..e35c07a 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_CRYPTO_DEV_HIFN_795X) += hifn_795x.o
 obj-$(CONFIG_CRYPTO_DEV_IMGTEC_HASH) += img-hash.o
 obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
 obj-$(CONFIG_CRYPTO_DEV_MV_CESA) += mv_cesa.o
+obj-$(CONFIG_CRYPTO_DEV_MARVELL_CESA) += marvell/
 obj-$(CONFIG_CRYPTO_DEV_MXS_DCP) += mxs-dcp.o
 obj-$(CONFIG_CRYPTO_DEV_NIAGARA2) += n2_crypto.o
 n2_crypto-y := n2_core.o n2_asm.o
diff --git a/drivers/crypto/marvell/Makefile b/drivers/crypto/marvell/Makefile
new file mode 100644
index 000..68d0982
--- /dev/null
+++ b/drivers/crypto/marvell/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_CRYPTO_DEV_MARVELL_CESA) += marvell-cesa.o
+marvell-cesa-objs := cesa.o cipher.o hash.o
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c
new file mode 100644
index 000..76a6943
--- /dev/null
+++ b/drivers/crypto/marvell/cesa.c
@@ -0,0 +1,417 @@
+/*
+ * Support for Marvell's Cryptographic Engine and Security Accelerator (CESA)
+ * that can be found on the following platform: Orion, Kirkwood, Armada. This
+ * driver supports the TDMA engine on platforms on which it is available.
+ *
+ * Author: Boris Brezillon boris.brezil...@free-electrons.com
+ * Author: Arnaud Ebalard a...@natisbad.org
+ *
+ * This work is based on an initial version written by
+ * Sebastian Andrzej Siewior  sebastian at breakpoint dot cc 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include linux/delay.h
+#include linux/genalloc.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/kthread.h
+#include linux/mbus.h
+#include linux/platform_device.h
+#include linux/scatterlist.h
+#include linux/slab.h
+#include linux/module.h
+#include linux/clk.h
+#include linux/of.h
+#include linux/of_platform.h
+#include linux/of_irq.h
+
+#include cesa.h
+
+struct mv_cesa_dev *cesa_dev;
+
+static void mv_cesa_dequeue_req_unlocked(struct mv_cesa_engine *engine)
+{
+   struct crypto_async_request *req, *backlog;
+   struct mv_cesa_ctx *ctx;
+
+   spin_lock_bh(cesa_dev-lock);
+   backlog = crypto_get_backlog(cesa_dev-queue);
+   req = crypto_dequeue_request(cesa_dev-queue);
+   engine-req = req;
+   spin_unlock_bh(cesa_dev-lock);
+
+   if (!req)
+   return;
+
+   if (backlog)
+   backlog-complete(backlog, -EINPROGRESS);
+
+   ctx =