[PATCH v3 1/2] em28xx: Ignore errors while reading from eeprom

[Mauro Carvalho Chehab]

While testing support for Terratec H6 rev. 2, it was noticed
that reading from eeprom there causes a timeout error.

Apparently, this is due to the need of properly setting GPIOs.

In any case, the driver doesn't really require eeprom reading
to succeed, as this is currently used only for debug.

So, Ignore such errors.

Signed-off-by: Mauro Carvalho Chehab 
---
 drivers/media/usb/em28xx/em28xx-i2c.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/media/usb/em28xx/em28xx-i2c.c 
b/drivers/media/usb/em28xx/em28xx-i2c.c
index 8c472d5adb50..60b195c157b8 100644
--- a/drivers/media/usb/em28xx/em28xx-i2c.c
+++ b/drivers/media/usb/em28xx/em28xx-i2c.c
@@ -982,8 +982,6 @@ int em28xx_i2c_register(struct em28xx *dev, unsigned bus,
dev_err(&dev->intf->dev,
"%s: em28xx_i2_eeprom failed! retval [%d]\n",
__func__, retval);
-
-   return retval;
}
}
 
-- 
2.9.3

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[PATCH v3 0/2] Add support for Terratec H6 version 2

[Mauro Carvalho Chehab]

That's the third version of this patch series. It adds support
for Terratec H6 version 2.

As on the past version, this board is identified as "H5 MKII".
There's a typo on the manufacturer's name, though:

[ 2970.196999] usb 1-1.5: Product: TERRATCE H5 MKII
[ 2970.197011] usb 1-1.5: Manufacturer: TERRATEC

While I wrote the patches, I don't have this verson of
this device. The tests were run by an IRC user. Thanks!

The first patch is actually not needed for this device to work,
but it fixes an issue: if something goes bad while reading
the eeprom, the device probe aborts. As we don't really need
to read the eeprom contents, we safely ignore any errors there.

While not certain why eeprom reading was failing with this
device, I suspect that this particular device require some
GPIO setting before being able to read its eeprom content.

The second patch in this series add support for the board.

-

v3: Improve patch documentation
v2: Ignore eeprom errors
v1: was assuming that eeprom would be at bus 1. such hipotesys
didn't confirm on the tests done today.

Mauro Carvalho Chehab (2):
  em28xx: Ignore errors while reading from eeprom
  em28xx: add support for new of Terratec H6

 drivers/media/usb/em28xx/em28xx-cards.c | 18 ++
 drivers/media/usb/em28xx/em28xx-dvb.c   |  1 +
 drivers/media/usb/em28xx/em28xx-i2c.c   |  2 --
 drivers/media/usb/em28xx/em28xx.h   |  1 +
 4 files changed, 20 insertions(+), 2 deletions(-)

-- 
2.9.3


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[PATCH v3 2/2] em28xx: add support for new of Terratec H6

[Mauro Carvalho Chehab]

There's a new version of Terratec H6 with uses USB ID
0ccd:10b2. This version is similar to the old one (with is
supported via the HTC entry), except that this one has the
eeprom on the second bus.

On this board, one side of this board is labeled with:
dvbc v2.0
The other side with:
94V-0, MO2, RK-4221 with huge digits: 1107

With those patches, the board is properly detected:

em28xx 1-1.5:1.0: New device TERRATEC TERRATCE H5 MKII @ 480 Mbps 
(0ccd:10b2, interface 0, class 0)
em28xx 1-1.5:1.0: Audio interface 0 found (Vendor Class)
em28xx 1-1.5:1.0: Video interface 0 found: isoc
em28xx 1-1.5:1.0: DVB interface 0 found: isoc
em28xx 1-1.5:1.0: chip ID is em2884
em28xx eeprom : 26 00 00 00 02 0b 0f e5 f5 64 01 60 09 e5 f5 64  
&d.`...d
em28xx eeprom 0010: 09 60 03 c2 c6 22 e5 f7 b4 03 13 e5 f6 b4 87 03  
.`..."..
em28xx eeprom 0020: 02 0a b9 e5 f6 b4 93 03 02 09 46 c2 c6 22 c2 c6  
..F.."..
em28xx eeprom 0030: 22 00 60 00 ef 70 08 85 3d 82 85 3c 83 93 ff ef  
".`..p..=..<
em28xx eeprom 0040: 60 19 85 3d 82 85 3c 83 e4 93 12 07 a3 12 0a fe  
`..=..<.
em28xx eeprom 0050: 05 3d e5 3d 70 02 05 3c 1f 80 e4 22 12 0b 06 02  
.=.=p..<..."
em28xx eeprom 0060: 07 e2 01 00 1a eb 67 95 cd 0c b2 10 f0 13 6b 03  
..g...k.
em28xx eeprom 0070: 98 22 6a 1c 86 12 27 57 4e 16 29 00 60 00 00 00  
."j...'WN.).`...
em28xx eeprom 0080: 02 00 00 00 5e 00 13 00 f0 10 44 82 82 00 00 00  
^.D.
em28xx eeprom 0090: 5b 81 c0 00 00 00 20 40 20 80 02 20 10 01 00 00  
[. @ .. 
em28xx eeprom 00a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  

em28xx eeprom 00b0: c6 40 00 00 81 00 00 00 00 00 00 00 00 c4 00 00  
.@..
em28xx eeprom 00c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1c 03  

em28xx eeprom 00d0: 31 00 32 00 33 00 34 00 35 00 36 00 37 00 38 00  
1.2.3.4.5.6.7.8.
em28xx eeprom 00e0: 39 00 41 00 42 00 43 00 44 00 12 03 54 00 45 00  
9.A.B.C.D...T.E.
em28xx eeprom 00f0: 52 00 52 00 41 00 54 00 45 00 43 00 22 03 54 00  
R.R.A.T.E.C.".T.
em28xx 1-1.5:1.0: eeprom 000100: ... (skipped)
em28xx 1-1.5:1.0: EEPROM ID = 26 00 00 00, EEPROM hash = 0xbcd5a8cf
em28xx 1-1.5:1.0: EEPROM info:
em28xx 1-1.5:1.0:   microcode start address = 0x0004, boot configuration = 
0x00
em28xx 1-1.5:1.0:   I2S audio, 5 sample rates
em28xx 1-1.5:1.0:   500mA max power
em28xx 1-1.5:1.0:   Table at offset 0x27, strings=0x2298, 0x1c6a, 0x1286
em28xx 1-1.5:1.0: Identified as Terratec Cinergy H6 rev. 2 (card=101)
em28xx 1-1.5:1.0: Currently, V4L2 is not supported on this model
em28xx 1-1.5:1.0: dvb set to isoc mode.
usbcore: registered new interface driver em28xx
em28xx 1-1.5:1.0: Binding audio extension
em28xx 1-1.5:1.0: em28xx-audio.c: Copyright (C) 2006 Markus Rechberger
em28xx 1-1.5:1.0: em28xx-audio.c: Copyright (C) 2007-2016 Mauro Carvalho 
Chehab
em28xx 1-1.5:1.0: Endpoint 0x83 high-speed on intf 0 alt 7 interval = 8, 
size 196
em28xx 1-1.5:1.0: Number of URBs: 1, with 64 packets and 192 size
em28xx 1-1.5:1.0: Audio extension successfully initialized
em28xx: Registered (Em28xx Audio Extension) extension
em28xx 1-1.5:1.0: Binding DVB extension
drxk: status = 0x639260d9
drxk: detected a drx-3926k, spin A3, xtal 20.250 MHz
drxk: DRXK driver version 0.9.4300
drxk: frontend initialized.
tda18271 4-0060: creating new instance
tda18271: TDA18271HD/C2 detected @ 4-0060
dvbdev: DVB: registering new adapter (1-1.5:1.0)
em28xx 1-1.5:1.0: DVB: registering adapter 0 frontend 0 (DRXK DVB-C 
DVB-T)...
dvbdev: dvb_create_media_entity: media entity 'DRXK DVB-C DVB-T' registered.
dvbdev: dvb_create_media_entity: media entity 'dvb-demux' registered.
em28xx 1-1.5:1.0: DVB extension successfully initialized
em28xx: Registered (Em28xx dvb Extension) extension
em28xx 1-1.5:1.0: Registering input extension
rc rc0: 1-1.5:1.0 IR as 
/devices/platform/soc/3f98.usb/usb1/1-1/1-1.5/1-1.5:1.0/rc/rc0
Registered IR keymap rc-nec-terratec-cinergy-xs
input: 1-1.5:1.0 IR as 
/devices/platform/soc/3f98.usb/usb1/1-1/1-1.5/1-1.5:1.0/rc/rc0/input0
em28xx 1-1.5:1.0: Input extension successfully initalized
em28xx: Registered (Em28xx Input Extension) extension
tda18271: performing RF tracking filter calibration
tda18271: RF tracking filter calibration complete

Signed-off-by: Mauro Carvalho Chehab 
---
 drivers/media/usb/em28xx/em28xx-cards.c | 18 ++
 drivers/media/usb/em28xx/em28xx-dvb.c   |  1 +
 drivers/media/usb/em28xx/em28xx.h   |  1 +
 3 files changed, 20 insertions(+)

diff --git a/drivers/media/usb/em28xx/em28xx-cards.c 
b/drivers/media/usb/em28xx/em28xx-cards.c
index a12b599a1fa2..25e952b176ae 100644
--- a/drivers/media/usb/em28xx/em28

[RFC PATCH v2 3/3] hwmon: (adt7475) temperature smoothing

[Chris Packham]

When enabled temperature smoothing allows ramping the fan speed over a
configurable period of time instead of jumping to the new speed
instantaneously.

Signed-off-by: Chris Packham 
---
Changes in v2:
- use a single tempN_smoothing attribute

 Documentation/hwmon/adt7475 |  4 ++
 drivers/hwmon/adt7475.c | 99 +
 2 files changed, 103 insertions(+)

diff --git a/Documentation/hwmon/adt7475 b/Documentation/hwmon/adt7475
index 63507402cd4f..dd6433d819d0 100644
--- a/Documentation/hwmon/adt7475
+++ b/Documentation/hwmon/adt7475
@@ -114,6 +114,10 @@ minimum (i.e. auto_point1_pwm). This behaviour be 
configured using the
 pwm[1-*]_stall_dis sysfs attribute. A value of 0 means the fans will shut off.
 A value of 1 means the fans will run at auto_point1_pwm.
 
+The responsiveness of the ADT747x to temperature changes can be configured.
+This allows smoothing of the fan speed transition. To set the transition time
+set the value in ms in the temp[1-*]_smoothing sysfs attribute.
+
 Notes
 -
 
diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c
index 85957324cd85..41342de6e20c 100644
--- a/drivers/hwmon/adt7475.c
+++ b/drivers/hwmon/adt7475.c
@@ -526,6 +526,96 @@ static ssize_t set_temp(struct device *dev, struct 
device_attribute *attr,
return count;
 }
 
+/* Assuming CONFIG6[SLOW] is 0 */
+static const int ad7475_st_map[] = {
+   37500, 18800, 12500, 7500, 4700, 3100, 1600, 800,
+};
+
+static ssize_t show_temp_st(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+   struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+   struct i2c_client *client = to_i2c_client(dev);
+   struct adt7475_data *data = i2c_get_clientdata(client);
+   int shift, idx;
+   long val;
+
+   switch (sattr->index) {
+   case 0:
+   shift = 0;
+   idx = 0;
+   break;
+   case 1:
+   shift = 4;
+   idx = 1;
+   break;
+   case 2:
+   shift = 0;
+   idx = 1;
+   break;
+   default:
+   return -EINVAL;
+   }
+
+   val = data->enh_acou[idx] >> shift;
+   if (val & 0x8) {
+   return sprintf(buf, "%d\n", ad7475_st_map[val & 0x7]);
+   } else {
+   return sprintf(buf, "0\n");
+   }
+}
+
+static ssize_t set_temp_st(struct device *dev, struct device_attribute *attr,
+const char *buf, size_t count)
+{
+   struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+   struct i2c_client *client = to_i2c_client(dev);
+   struct adt7475_data *data = i2c_get_clientdata(client);
+   unsigned char reg;
+   int shift, idx;
+   ulong val;
+
+   if (kstrtoul(buf, 10, &val))
+   return -EINVAL;
+
+   switch (sattr->index) {
+   case 0:
+   reg = REG_ENHANCE_ACOUSTICS1;
+   shift = 0;
+   idx = 0;
+   break;
+   case 1:
+   reg = REG_ENHANCE_ACOUSTICS2;
+   shift = 4;
+   idx = 1;
+   break;
+   case 2:
+   reg = REG_ENHANCE_ACOUSTICS2;
+   shift = 0;
+   idx = 1;
+   break;
+   default:
+   return -EINVAL;
+   }
+
+   if (val > 0) {
+   val = find_closest_descending(val, ad7475_st_map,
+ ARRAY_SIZE(ad7475_st_map));
+   val |= 0x8;
+   }
+
+   mutex_lock(&data->lock);
+
+   data->enh_acou[idx] &= ~(0xf << shift);
+   data->enh_acou[idx] |= (val << shift);
+
+   i2c_smbus_write_byte_data(client, reg, data->enh_acou[idx]);
+
+   mutex_unlock(&data->lock);
+
+   return count;
+}
+
 /*
  * Table of autorange values - the user will write the value in millidegrees,
  * and we'll convert it
@@ -1008,6 +1098,8 @@ static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IRUGO | 
S_IWUSR, show_temp, set_temp,
THERM, 0);
 static SENSOR_DEVICE_ATTR_2(temp1_crit_hyst, S_IRUGO | S_IWUSR, show_temp,
set_temp, HYSTERSIS, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_smoothing, S_IRUGO | S_IWUSR, show_temp_st,
+   set_temp_st, 0, 0);
 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, INPUT, 1);
 static SENSOR_DEVICE_ATTR_2(temp2_alarm, S_IRUGO, show_temp, NULL, ALARM, 1);
 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
@@ -1024,6 +1116,8 @@ static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IRUGO | 
S_IWUSR, show_temp, set_temp,
THERM, 1);
 static SENSOR_DEVICE_ATTR_2(temp2_crit_hyst, S_IRUGO | S_IWUSR, show_temp,
set_temp, HYSTERSIS, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_smoothing, S_IRUGO | S_IWUSR, show_temp_st,
+  

[RFC PATCH v2 2/3] hwmon: (adt7475) fan stall prevention

[Chris Packham]

By default adt7475 will stop the fans (pwm duty cycle 0%) when the
temperature drops past Tmin - hysteresis. Some systems want to keep the
fans moving even when the temperature drops so add new sysfs attributes
that configure the enhanced acoustics min 1-3 which allows the fans to
run at the minimum configure pwm duty cycle.

Signed-off-by: Chris Packham 
---
Changes in v2:
- use pwmN_stall_dis as the attribute name. I think this describes the purpose
  pretty well. I went with a new attribute instead of overloading
  pwmN_auto_point1_pwm so this doesn't affect existing users.

 Documentation/hwmon/adt7475 |  5 +
 drivers/hwmon/adt7475.c | 50 +
 2 files changed, 55 insertions(+)

diff --git a/Documentation/hwmon/adt7475 b/Documentation/hwmon/adt7475
index 0502f2b464e1..63507402cd4f 100644
--- a/Documentation/hwmon/adt7475
+++ b/Documentation/hwmon/adt7475
@@ -109,6 +109,11 @@ fan speed) is applied. PWM values range from 0 (off) to 
255 (full speed).
 Fan speed may be set to maximum when the temperature sensor associated with
 the PWM control exceeds temp#_max.
 
+At Tmin - hysteresis the PWM output can either be off (0% duty cycle) or at the
+minimum (i.e. auto_point1_pwm). This behaviour be configured using the
+pwm[1-*]_stall_dis sysfs attribute. A value of 0 means the fans will shut off.
+A value of 1 means the fans will run at auto_point1_pwm.
+
 Notes
 -
 
diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c
index ec0c43fbcdce..85957324cd85 100644
--- a/drivers/hwmon/adt7475.c
+++ b/drivers/hwmon/adt7475.c
@@ -79,6 +79,9 @@
 
 #define REG_TEMP_TRANGE_BASE   0x5F
 
+#define REG_ENHANCE_ACOUSTICS1 0x62
+#define REG_ENHANCE_ACOUSTICS2 0x63
+
 #define REG_PWM_MIN_BASE   0x64
 
 #define REG_TEMP_TMIN_BASE 0x67
@@ -209,6 +212,7 @@ struct adt7475_data {
u8 range[3];
u8 pwmctl[3];
u8 pwmchan[3];
+   u8 enh_acou[2];
 
u8 vid;
u8 vrm;
@@ -700,6 +704,43 @@ static ssize_t set_pwm(struct device *dev, struct 
device_attribute *attr,
data->pwm[sattr->nr][sattr->index] = clamp_val(val, 0, 0xFF);
i2c_smbus_write_byte_data(client, reg,
  data->pwm[sattr->nr][sattr->index]);
+   mutex_unlock(&data->lock);
+
+   return count;
+}
+
+
+static ssize_t show_stall_dis(struct device *dev, struct device_attribute 
*attr,
+ char *buf)
+{
+   struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+   struct i2c_client *client = to_i2c_client(dev);
+   struct adt7475_data *data = i2c_get_clientdata(client);
+   u8 mask = BIT(5 + sattr->index);
+
+   return sprintf(buf, "%d\n", !!(data->enh_acou[0] & mask));
+}
+
+static ssize_t set_stall_dis(struct device *dev, struct device_attribute *attr,
+const char *buf, size_t count)
+{
+   struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
+   struct i2c_client *client = to_i2c_client(dev);
+   struct adt7475_data *data = i2c_get_clientdata(client);
+   long val;
+   u8 mask = BIT(5 + sattr->index);
+
+   if (kstrtol(buf, 10, &val))
+   return -EINVAL;
+
+   mutex_lock(&data->lock);
+
+   data->enh_acou[0] &= ~mask;
+   if (val)
+   data->enh_acou[0] |= mask;
+
+   i2c_smbus_write_byte_data(client, REG_ENHANCE_ACOUSTICS1,
+ data->enh_acou[0]);
 
mutex_unlock(&data->lock);
 
@@ -1028,6 +1069,8 @@ static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO 
| S_IWUSR, show_pwm,
set_pwm, MIN, 0);
 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR, show_pwm,
set_pwm, MAX, 0);
+static SENSOR_DEVICE_ATTR_2(pwm1_stall_dis, S_IRUGO | S_IWUSR, show_stall_dis,
+   set_stall_dis, 0, 0);
 static SENSOR_DEVICE_ATTR_2(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, INPUT,
1);
 static SENSOR_DEVICE_ATTR_2(pwm2_freq, S_IRUGO | S_IWUSR, show_pwmfreq,
@@ -1040,6 +1083,8 @@ static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO 
| S_IWUSR, show_pwm,
set_pwm, MIN, 1);
 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR, show_pwm,
set_pwm, MAX, 1);
+static SENSOR_DEVICE_ATTR_2(pwm2_stall_dis, S_IRUGO | S_IWUSR, show_stall_dis,
+   set_stall_dis, 0, 1);
 static SENSOR_DEVICE_ATTR_2(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, INPUT,
2);
 static SENSOR_DEVICE_ATTR_2(pwm3_freq, S_IRUGO | S_IWUSR, show_pwmfreq,
@@ -1052,6 +1097,8 @@ static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO 
| S_IWUSR, show_pwm,
set_pwm, MIN, 2);
 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR, show_pwm,
set_pwm, MAX, 2);
+static SENS

Re: [PATCH 2/3] hwmon: (adt7475) fan stall prevention

[Chris Packham]

On 03/05/17 06:07, Guenter Roeck wrote:
> On Tue, May 02, 2017 at 05:45:35PM +1200, Chris Packham wrote:
>> By default adt7475 will stop the fans (pwm duty cycle 0%) when the
>> temperature drops past Tmin - hysteresis. Some systems want to keep the
>> fans moving even when the temperature drops so add new sysfs attributes
>> that configure the enhanced acoustics min 1-3 which allows the fans to
>> run at the minimum configure pwm duty cycle.
>>
>> Signed-off-by: Chris Packham 
>> ---
>> pwmN_min is a horrible name but I really can't think of anything better.
>> I'm biased a little because that is essentially the name of the bits in
>> the datasheet. I'm open to suggestions.
>
> pwmX_min is also traditionally the mimimum permitted pwm value,
> not a boolean. This would be more appropriate to reflect the PWMmin
> register values (0x64 to 0x66). Similar for pwmX_max if you want to
> add support for it.

For the adt7476 driver these are used as pwmN_auto_point[12]_pwm.

> It might make sense to combine pwmX_min==0 with clearing the
> respective bit in the REG_ENHANCE_ACOUSTICS[12] register. This way
> we would only need one attribute to support both.

I could add code such that if pwmN_auto_point1_pwm > 0. The bit in 
REG_ENHANCE_ACOUSTICS is set but that would be a change in existing 
behaviour.

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Re: [PATCH v2 0/6] Add kselftest_harness.h

[Kees Cook]

On Tue, May 2, 2017 at 3:26 PM, Mickaël Salaün  wrote:
> Hi,
>
> This second patch series make the seccomp/test_harness.h more generally
> available [1] and update the kselftest documentation with the Sphinx format. 
> It
> also improve the Makefile of seccomp tests to take into account any
> kselftest_harness.h update.
>
> [1] 
> https://lkml.kernel.org/r/CAGXu5j+8CVz8vL51DRYXqOY=xc3zuKFf=ptene88xyhzfyi...@mail.gmail.com
>
> Regards,
>
> Mickaël Salaün (6):
>   selftests: Make test_harness.h more generally available
>   selftests: Cosmetic renames in kselftest_harness.h
>   selftests/seccomp: Force rebuild according to dependencies
>   Documentation/dev-tools: Add kselftest

For these four:

Acked-by: Kees Cook 

>   Documentation/dev-tools: Use reStructuredText markups for kselftest
>   Documentation/dev-tools: Add kselftest_harness documentation

These two have some minor nits I emailed about, but if those are
fixed, consider them Acked-by me too.

Thanks for this!

-Kees

>
>  Documentation/00-INDEX |   2 -
>  Documentation/dev-tools/index.rst  |   1 +
>  .../{kselftest.txt => dev-tools/kselftest.rst} | 134 +--
>  MAINTAINERS|   1 +
>  .../test_harness.h => kselftest_harness.h} | 268 
> +++--
>  tools/testing/selftests/seccomp/Makefile   |   2 +
>  tools/testing/selftests/seccomp/seccomp_bpf.c  |   2 +-
>  7 files changed, 307 insertions(+), 103 deletions(-)
>  rename Documentation/{kselftest.txt => dev-tools/kselftest.rst} (52%)
>  rename tools/testing/selftests/{seccomp/test_harness.h => 
> kselftest_harness.h} (81%)
>
> --
> 2.11.0
>



-- 
Kees Cook
Pixel Security
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Re: [PATCH v2 6/6] Documentation/dev-tools: Add kselftest_harness documentation

[Kees Cook]

On Tue, May 2, 2017 at 3:26 PM, Mickaël Salaün  wrote:
> Add metadata to kselftest_harness.h to be able to include the comments
> in the Sphinx documentation.
>
> Signed-off-by: Mickaël Salaün 
> Cc: Andy Lutomirski 
> Cc: Jonathan Corbet 
> Cc: Kees Cook 
> Cc: Shuah Khan 
> Cc: Will Drewry 
> ---
>  Documentation/dev-tools/kselftest.rst   |  57 ++
>  tools/testing/selftests/kselftest_harness.h | 259 
> 
>  2 files changed, 243 insertions(+), 73 deletions(-)
>
> diff --git a/Documentation/dev-tools/kselftest.rst 
> b/Documentation/dev-tools/kselftest.rst
> index 39af2cb3d248..cf1e1f262c44 100644
> --- a/Documentation/dev-tools/kselftest.rst
> +++ b/Documentation/dev-tools/kselftest.rst
> @@ -138,3 +138,60 @@ Contributing new tests (details)
> executable which is not tested by default.
> TEST_FILES, TEST_GEN_FILES mean it is the file which is used by
> test.
> +
> +Test Harness
> +
> +
> +The *kselftest_harness.h* file contains useful helpers to build tests. The
> +tests from seccomp/seccomp_bpf.c can be used as examples.
> +
> +Example
> +~~~
> +
> +.. code-block:: c
> +
> +#include "../kselftest_harness.h"
> +
> +TEST(standalone_test) {
> +  do_some_stuff;
> +  EXPECT_GT(10, stuff) {
> + stuff_state_t state;
> + enumerate_stuff_state(&state);
> + TH_LOG("expectation failed with state: %s", state.msg);
> +  }
> +  more_stuff;
> +  ASSERT_NE(some_stuff, NULL) TH_LOG("how did it happen?!");
> +  last_stuff;
> +  EXPECT_EQ(0, last_stuff);
> +}
> +
> +FIXTURE(my_fixture) {
> +  mytype_t *data;
> +  int awesomeness_level;
> +};
> +FIXTURE_SETUP(my_fixture) {
> +  self->data = mytype_new();
> +  ASSERT_NE(NULL, self->data);
> +}
> +FIXTURE_TEARDOWN(my_fixture) {
> +  mytype_free(self->data);
> +}
> +TEST_F(my_fixture, data_is_good) {
> +  EXPECT_EQ(1, is_my_data_good(self->data));
> +}
> +
> +TEST_HARNESS_MAIN
> +
> +
> +Helpers
> +~
> +
> +.. kernel-doc:: tools/testing/selftests/kselftest_harness.h
> +:doc: helpers
> +
> +
> +Operators
> +~
> +
> +.. kernel-doc:: tools/testing/selftests/kselftest_harness.h
> +:doc: operators

Awesome! Yay docs!

> diff --git a/tools/testing/selftests/kselftest_harness.h 
> b/tools/testing/selftests/kselftest_harness.h
> index 8ba227db46aa..efe50c80 100644
> --- a/tools/testing/selftests/kselftest_harness.h
> +++ b/tools/testing/selftests/kselftest_harness.h
> @@ -4,38 +4,6 @@
>   *
>   * kselftest_harness.h: simple C unit test helper.
>   *
> - * Usage:

Can you add a pointer to the .rst file so someone looking at the
header file will find out where to get an example?

Otherwise, looks great!

-Kees

> - *   #include "../kselftest_harness.h"
> - *   TEST(standalone_test) {
> - * do_some_stuff;
> - * EXPECT_GT(10, stuff) {
> - *stuff_state_t state;
> - *enumerate_stuff_state(&state);
> - *TH_LOG("expectation failed with state: %s", state.msg);
> - * }
> - * more_stuff;
> - * ASSERT_NE(some_stuff, NULL) TH_LOG("how did it happen?!");
> - * last_stuff;
> - * EXPECT_EQ(0, last_stuff);
> - *   }
> - *
> - *   FIXTURE(my_fixture) {
> - * mytype_t *data;
> - * int awesomeness_level;
> - *   };
> - *   FIXTURE_SETUP(my_fixture) {
> - * self->data = mytype_new();
> - * ASSERT_NE(NULL, self->data);
> - *   }
> - *   FIXTURE_TEARDOWN(my_fixture) {
> - * mytype_free(self->data);
> - *   }
> - *   TEST_F(my_fixture, data_is_good) {
> - * EXPECT_EQ(1, is_my_data_good(self->data));
> - *   }
> - *
> - *   TEST_HARNESS_MAIN
> - *
>   * API inspired by code.google.com/p/googletest
>   */
>
> @@ -58,7 +26,13 @@
>   * Exported APIs
>   */
>
> -/* TEST(name) { implementation }
> +/**
> + * DOC: helpers
> + *
> + * .. code-block:: c
> + *
> + * TEST(name) { implementation }
> + *
>   * Defines a test by name.
>   * Names must be unique and tests must not be run in parallel.  The
>   * implementation containing block is a function and scoping should be 
> treated
> @@ -68,7 +42,13 @@
>   */
>  #define TEST TEST_API(TEST)
>
> -/* TEST_SIGNAL(name, signal) { implementation }
> +/**
> + * DOC: helpers
> + *
> + * .. code-block:: c
> + *
> + * TEST_SIGNAL(name, signal) { implementation }
> + *
>   * Defines a test by name and the expected term signal.
>   * Names must be unique and tests must not be run in parallel.  The
>   * implementation containing block is a function and scoping should be 
> treated
> @@ -78,25 +58,43 @@
>   */
>  #define TEST_SIGNAL TEST_API(TEST_SIGNAL)
>
> -/* FIXTURE(datatype name) {
> - *   type property1;
> - *   ...
> - * };
> - * Defines the data provided to TEST_F()-defined tests as |self|.  It should 
> be
> +/**
> + * DOC: helpers
> + *
> + * .. code-block:: c
> + *
> + * FIXTURE(datatype name) {
> + *   type property1;
> + *   ...
> + * };
> + *
> + * Defines

Re: [PATCH v2 5/6] Documentation/dev-tools: Use reStructuredText markups for kselftest

[Kees Cook]

On Tue, May 2, 2017 at 3:26 PM, Mickaël Salaün  wrote:
> Include and convert kselftest to the Sphinx format.
>
> Signed-off-by: Mickaël Salaün 
> Cc: Jonathan Corbet 
> Cc: Shuah Khan 
> ---
>  Documentation/dev-tools/index.rst |  1 +
>  Documentation/dev-tools/kselftest.rst | 77 
> ---
>  2 files changed, 55 insertions(+), 23 deletions(-)
>
> diff --git a/Documentation/dev-tools/index.rst 
> b/Documentation/dev-tools/index.rst
> index 07d881147ef3..e50054c6aeaa 100644
> --- a/Documentation/dev-tools/index.rst
> +++ b/Documentation/dev-tools/index.rst
> @@ -23,6 +23,7 @@ whole; patches welcome!
> kmemleak
> kmemcheck
> gdb-kernel-debugging
> +   kselftest
>
>
>  .. only::  subproject and html
> diff --git a/Documentation/dev-tools/kselftest.rst 
> b/Documentation/dev-tools/kselftest.rst
> index 5bd590335839..39af2cb3d248 100644
> --- a/Documentation/dev-tools/kselftest.rst
> +++ b/Documentation/dev-tools/kselftest.rst
> @@ -1,4 +1,5 @@
>  Linux Kernel Selftests
> +==

Shouldn't this be:


Linux Kernel Selftests


And then leave the other sections with  underlines.

>
>  The kernel contains a set of "self tests" under the tools/testing/selftests/
>  directory. These are intended to be small tests to exercise individual code
> @@ -13,65 +14,93 @@ run on a single cpu as opposed to all hotplug capable 
> cpus, and memory
>  hotplug test is run on 2% of hotplug capable memory instead of 10%.
>
>  Running the selftests (hotplug tests are run in limited mode)
> -=
> +-
>
>  To build the tests:
> -  $ make -C tools/testing/selftests
> +
> +.. code-block:: sh
> +
> +make -C tools/testing/selftests

An easier way to do this is "::" at the end of "To build the tests",
which is fewer lines delta.

>
>
>  To run the tests:
> -  $ make -C tools/testing/selftests run_tests
> +
> +.. code-block:: sh
> +
> +make -C tools/testing/selftests run_tests
>
>  To build and run the tests with a single command, use:
> -  $ make kselftest
>
> -- note that some tests will require root privileges.
> +.. code-block:: sh
> +
> +make kselftest
> +
> +Note that some tests will require root privileges.
>
>
>  Running a subset of selftests
> -
> +-
> +
>  You can use the "TARGETS" variable on the make command line to specify
>  single test to run, or a list of tests to run.
>
>  To run only tests targeted for a single subsystem:
> -  $  make -C tools/testing/selftests TARGETS=ptrace run_tests
> +
> +.. code-block:: sh
> +
> +make -C tools/testing/selftests TARGETS=ptrace run_tests
>
>  You can specify multiple tests to build and run:
> -  $  make TARGETS="size timers" kselftest
> +
> +.. code-block:: sh
> +
> +make TARGETS="size timers" kselftest
>
>  See the top-level tools/testing/selftests/Makefile for the list of all
>  possible targets.
>
>
>  Running the full range hotplug selftests
> -
> +
>
>  To build the hotplug tests:
> -  $ make -C tools/testing/selftests hotplug
> +
> +.. code-block:: sh
> +
> +make -C tools/testing/selftests hotplug
>
>  To run the hotplug tests:
> -  $ make -C tools/testing/selftests run_hotplug
>
> -- note that some tests will require root privileges.
> +.. code-block:: sh
> +
> +make -C tools/testing/selftests run_hotplug
> +
> +Note that some tests will require root privileges.
>
>
>  Install selftests
> -=
> +-
>
>  You can use kselftest_install.sh tool installs selftests in default
>  location which is tools/testing/selftests/kselftest or a user specified
>  location.
>
>  To install selftests in default location:
> -   $ cd tools/testing/selftests
> -   $ ./kselftest_install.sh
> +
> +.. code-block:: sh
> +
> +cd tools/testing/selftests
> +./kselftest_install.sh
>
>  To install selftests in a user specified location:
> -   $ cd tools/testing/selftests
> -   $ ./kselftest_install.sh install_dir
> +
> +.. code-block:: sh
> +
> +cd tools/testing/selftests
> +./kselftest_install.sh install_dir
>
>  Running installed selftests
> -===
> +---
>
>  Kselftest install as well as the Kselftest tarball provide a script
>  named "run_kselftest.sh" to run the tests.
> @@ -79,11 +108,13 @@ named "run_kselftest.sh" to run the tests.
>  You can simply do the following to run the installed Kselftests. Please
>  note some tests will require root privileges.
>
> -cd kselftest
> -./run_kselftest.sh
> +.. code-block:: sh
> +
> +cd kselftest
> +./run_kselftest.sh
>
>  Contributing new tests
> -==
> +--
>
>  In general, the rules for selftests are
>
> @@ -96,8 +127,8 @@ In general, the rules f

[PATCH v2 5/6] Documentation/dev-tools: Use reStructuredText markups for kselftest

[Mickaël Salaün]

Include and convert kselftest to the Sphinx format.

Signed-off-by: Mickaël Salaün 
Cc: Jonathan Corbet 
Cc: Shuah Khan 
---
 Documentation/dev-tools/index.rst |  1 +
 Documentation/dev-tools/kselftest.rst | 77 ---
 2 files changed, 55 insertions(+), 23 deletions(-)

diff --git a/Documentation/dev-tools/index.rst 
b/Documentation/dev-tools/index.rst
index 07d881147ef3..e50054c6aeaa 100644
--- a/Documentation/dev-tools/index.rst
+++ b/Documentation/dev-tools/index.rst
@@ -23,6 +23,7 @@ whole; patches welcome!
kmemleak
kmemcheck
gdb-kernel-debugging
+   kselftest
 
 
 .. only::  subproject and html
diff --git a/Documentation/dev-tools/kselftest.rst 
b/Documentation/dev-tools/kselftest.rst
index 5bd590335839..39af2cb3d248 100644
--- a/Documentation/dev-tools/kselftest.rst
+++ b/Documentation/dev-tools/kselftest.rst
@@ -1,4 +1,5 @@
 Linux Kernel Selftests
+==
 
 The kernel contains a set of "self tests" under the tools/testing/selftests/
 directory. These are intended to be small tests to exercise individual code
@@ -13,65 +14,93 @@ run on a single cpu as opposed to all hotplug capable cpus, 
and memory
 hotplug test is run on 2% of hotplug capable memory instead of 10%.
 
 Running the selftests (hotplug tests are run in limited mode)
-=
+-
 
 To build the tests:
-  $ make -C tools/testing/selftests
+
+.. code-block:: sh
+
+make -C tools/testing/selftests
 
 
 To run the tests:
-  $ make -C tools/testing/selftests run_tests
+
+.. code-block:: sh
+
+make -C tools/testing/selftests run_tests
 
 To build and run the tests with a single command, use:
-  $ make kselftest
 
-- note that some tests will require root privileges.
+.. code-block:: sh
+
+make kselftest
+
+Note that some tests will require root privileges.
 
 
 Running a subset of selftests
-
+-
+
 You can use the "TARGETS" variable on the make command line to specify
 single test to run, or a list of tests to run.
 
 To run only tests targeted for a single subsystem:
-  $  make -C tools/testing/selftests TARGETS=ptrace run_tests
+
+.. code-block:: sh
+
+make -C tools/testing/selftests TARGETS=ptrace run_tests
 
 You can specify multiple tests to build and run:
-  $  make TARGETS="size timers" kselftest
+
+.. code-block:: sh
+
+make TARGETS="size timers" kselftest
 
 See the top-level tools/testing/selftests/Makefile for the list of all
 possible targets.
 
 
 Running the full range hotplug selftests
-
+
 
 To build the hotplug tests:
-  $ make -C tools/testing/selftests hotplug
+
+.. code-block:: sh
+
+make -C tools/testing/selftests hotplug
 
 To run the hotplug tests:
-  $ make -C tools/testing/selftests run_hotplug
 
-- note that some tests will require root privileges.
+.. code-block:: sh
+
+make -C tools/testing/selftests run_hotplug
+
+Note that some tests will require root privileges.
 
 
 Install selftests
-=
+-
 
 You can use kselftest_install.sh tool installs selftests in default
 location which is tools/testing/selftests/kselftest or a user specified
 location.
 
 To install selftests in default location:
-   $ cd tools/testing/selftests
-   $ ./kselftest_install.sh
+
+.. code-block:: sh
+
+cd tools/testing/selftests
+./kselftest_install.sh
 
 To install selftests in a user specified location:
-   $ cd tools/testing/selftests
-   $ ./kselftest_install.sh install_dir
+
+.. code-block:: sh
+
+cd tools/testing/selftests
+./kselftest_install.sh install_dir
 
 Running installed selftests
-===
+---
 
 Kselftest install as well as the Kselftest tarball provide a script
 named "run_kselftest.sh" to run the tests.
@@ -79,11 +108,13 @@ named "run_kselftest.sh" to run the tests.
 You can simply do the following to run the installed Kselftests. Please
 note some tests will require root privileges.
 
-cd kselftest
-./run_kselftest.sh
+.. code-block:: sh
+
+cd kselftest
+./run_kselftest.sh
 
 Contributing new tests
-==
+--
 
 In general, the rules for selftests are
 
@@ -96,8 +127,8 @@ In general, the rules for selftests are
  * Don't cause the top-level "make run_tests" to fail if your feature is
unconfigured.
 
-Contributing new tests(details)
-===
+Contributing new tests (details)
+
 
  * Use TEST_GEN_XXX if such binaries or files are generated during
compiling.
-- 
2.11.0

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[PATCH v2 1/6] selftests: Make test_harness.h more generally available

[Mickaël Salaün]

The seccomp/test_harness.h file contains useful helpers to build tests.
Moving it to the selftest directory should benefit to other test
components.

Keep seccomp maintainers for this file.

Changes since v1:
* rename to kselftest_harness.h (suggested by Shuah Khan)
* keep maintainers

Signed-off-by: Mickaël Salaün 
Acked-by: Kees Cook 
Acked-by: Will Drewry 
Cc: Andy Lutomirski 
Cc: Shuah Khan 
Link: 
https://lkml.kernel.org/r/CAGXu5j+8CVz8vL51DRYXqOY=xc3zuKFf=ptene88xyhzfyi...@mail.gmail.com
---
 MAINTAINERS | 1 +
 tools/testing/selftests/{seccomp/test_harness.h => kselftest_harness.h} | 0
 tools/testing/selftests/seccomp/seccomp_bpf.c   | 2 +-
 3 files changed, 2 insertions(+), 1 deletion(-)
 rename tools/testing/selftests/{seccomp/test_harness.h => kselftest_harness.h} 
(100%)

diff --git a/MAINTAINERS b/MAINTAINERS
index c265a5fe4848..a42b0c1ca437 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11254,6 +11254,7 @@ F:  kernel/seccomp.c
 F: include/uapi/linux/seccomp.h
 F: include/linux/seccomp.h
 F: tools/testing/selftests/seccomp/*
+F: tools/testing/selftests/kselftest_harness.h
 K: \bsecure_computing
 K: \bTIF_SECCOMP\b
 
diff --git a/tools/testing/selftests/seccomp/test_harness.h 
b/tools/testing/selftests/kselftest_harness.h
similarity index 100%
rename from tools/testing/selftests/seccomp/test_harness.h
rename to tools/testing/selftests/kselftest_harness.h
diff --git a/tools/testing/selftests/seccomp/seccomp_bpf.c 
b/tools/testing/selftests/seccomp/seccomp_bpf.c
index 03f1fa495d74..7ba94efb24fd 100644
--- a/tools/testing/selftests/seccomp/seccomp_bpf.c
+++ b/tools/testing/selftests/seccomp/seccomp_bpf.c
@@ -37,7 +37,7 @@
 #include 
 #include 
 
-#include "test_harness.h"
+#include "../kselftest_harness.h"
 
 #ifndef PR_SET_PTRACER
 # define PR_SET_PTRACER 0x59616d61
-- 
2.11.0

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[PATCH v2 6/6] Documentation/dev-tools: Add kselftest_harness documentation

[Mickaël Salaün]

Add metadata to kselftest_harness.h to be able to include the comments
in the Sphinx documentation.

Signed-off-by: Mickaël Salaün 
Cc: Andy Lutomirski 
Cc: Jonathan Corbet 
Cc: Kees Cook 
Cc: Shuah Khan 
Cc: Will Drewry 
---
 Documentation/dev-tools/kselftest.rst   |  57 ++
 tools/testing/selftests/kselftest_harness.h | 259 
 2 files changed, 243 insertions(+), 73 deletions(-)

diff --git a/Documentation/dev-tools/kselftest.rst 
b/Documentation/dev-tools/kselftest.rst
index 39af2cb3d248..cf1e1f262c44 100644
--- a/Documentation/dev-tools/kselftest.rst
+++ b/Documentation/dev-tools/kselftest.rst
@@ -138,3 +138,60 @@ Contributing new tests (details)
executable which is not tested by default.
TEST_FILES, TEST_GEN_FILES mean it is the file which is used by
test.
+
+Test Harness
+
+
+The *kselftest_harness.h* file contains useful helpers to build tests. The
+tests from seccomp/seccomp_bpf.c can be used as examples.
+
+Example
+~~~
+
+.. code-block:: c
+
+#include "../kselftest_harness.h"
+
+TEST(standalone_test) {
+  do_some_stuff;
+  EXPECT_GT(10, stuff) {
+ stuff_state_t state;
+ enumerate_stuff_state(&state);
+ TH_LOG("expectation failed with state: %s", state.msg);
+  }
+  more_stuff;
+  ASSERT_NE(some_stuff, NULL) TH_LOG("how did it happen?!");
+  last_stuff;
+  EXPECT_EQ(0, last_stuff);
+}
+
+FIXTURE(my_fixture) {
+  mytype_t *data;
+  int awesomeness_level;
+};
+FIXTURE_SETUP(my_fixture) {
+  self->data = mytype_new();
+  ASSERT_NE(NULL, self->data);
+}
+FIXTURE_TEARDOWN(my_fixture) {
+  mytype_free(self->data);
+}
+TEST_F(my_fixture, data_is_good) {
+  EXPECT_EQ(1, is_my_data_good(self->data));
+}
+
+TEST_HARNESS_MAIN
+
+
+Helpers
+~
+
+.. kernel-doc:: tools/testing/selftests/kselftest_harness.h
+:doc: helpers
+
+
+Operators
+~
+
+.. kernel-doc:: tools/testing/selftests/kselftest_harness.h
+:doc: operators
diff --git a/tools/testing/selftests/kselftest_harness.h 
b/tools/testing/selftests/kselftest_harness.h
index 8ba227db46aa..efe50c80 100644
--- a/tools/testing/selftests/kselftest_harness.h
+++ b/tools/testing/selftests/kselftest_harness.h
@@ -4,38 +4,6 @@
  *
  * kselftest_harness.h: simple C unit test helper.
  *
- * Usage:
- *   #include "../kselftest_harness.h"
- *   TEST(standalone_test) {
- * do_some_stuff;
- * EXPECT_GT(10, stuff) {
- *stuff_state_t state;
- *enumerate_stuff_state(&state);
- *TH_LOG("expectation failed with state: %s", state.msg);
- * }
- * more_stuff;
- * ASSERT_NE(some_stuff, NULL) TH_LOG("how did it happen?!");
- * last_stuff;
- * EXPECT_EQ(0, last_stuff);
- *   }
- *
- *   FIXTURE(my_fixture) {
- * mytype_t *data;
- * int awesomeness_level;
- *   };
- *   FIXTURE_SETUP(my_fixture) {
- * self->data = mytype_new();
- * ASSERT_NE(NULL, self->data);
- *   }
- *   FIXTURE_TEARDOWN(my_fixture) {
- * mytype_free(self->data);
- *   }
- *   TEST_F(my_fixture, data_is_good) {
- * EXPECT_EQ(1, is_my_data_good(self->data));
- *   }
- *
- *   TEST_HARNESS_MAIN
- *
  * API inspired by code.google.com/p/googletest
  */
 
@@ -58,7 +26,13 @@
  * Exported APIs
  */
 
-/* TEST(name) { implementation }
+/**
+ * DOC: helpers
+ *
+ * .. code-block:: c
+ *
+ * TEST(name) { implementation }
+ *
  * Defines a test by name.
  * Names must be unique and tests must not be run in parallel.  The
  * implementation containing block is a function and scoping should be treated
@@ -68,7 +42,13 @@
  */
 #define TEST TEST_API(TEST)
 
-/* TEST_SIGNAL(name, signal) { implementation }
+/**
+ * DOC: helpers
+ *
+ * .. code-block:: c
+ *
+ * TEST_SIGNAL(name, signal) { implementation }
+ *
  * Defines a test by name and the expected term signal.
  * Names must be unique and tests must not be run in parallel.  The
  * implementation containing block is a function and scoping should be treated
@@ -78,25 +58,43 @@
  */
 #define TEST_SIGNAL TEST_API(TEST_SIGNAL)
 
-/* FIXTURE(datatype name) {
- *   type property1;
- *   ...
- * };
- * Defines the data provided to TEST_F()-defined tests as |self|.  It should be
+/**
+ * DOC: helpers
+ *
+ * .. code-block:: c
+ *
+ * FIXTURE(datatype name) {
+ *   type property1;
+ *   ...
+ * };
+ *
+ * Defines the data provided to TEST_F()-defined tests as \|self\|.  It should 
be
  * populated and cleaned up using FIXTURE_SETUP and FIXTURE_TEARDOWN.
  */
 #define FIXTURE TEST_API(FIXTURE)
 
-/* FIXTURE_DATA(datatype name)
+/**
+ * DOC: helpers
+ *
+ * .. code-block:: c
+ *
+ * FIXTURE_DATA(datatype name)
+ *
  * This call may be used when the type of the fixture data
  * is needed.  In general, this should not be needed unless
- * the |self| is being passed to a helper directly.
+ * the \|self\| is being passed to a helper directly.
  */
 #define FIXTURE_DATA TEST_API(F

[PATCH v2 2/6] selftests: Cosmetic renames in kselftest_harness.h

[Mickaël Salaün]

Keep the content consistent with the new name.

Signed-off-by: Mickaël Salaün 
Cc: Andy Lutomirski 
Cc: Kees Cook 
Cc: Shuah Khan 
Cc: Will Drewry 
---
 tools/testing/selftests/kselftest_harness.h | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/tools/testing/selftests/kselftest_harness.h 
b/tools/testing/selftests/kselftest_harness.h
index a786c69c7584..8ba227db46aa 100644
--- a/tools/testing/selftests/kselftest_harness.h
+++ b/tools/testing/selftests/kselftest_harness.h
@@ -2,10 +2,10 @@
  * Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
  * Use of this source code is governed by the GPLv2 license.
  *
- * test_harness.h: simple C unit test helper.
+ * kselftest_harness.h: simple C unit test helper.
  *
  * Usage:
- *   #include "test_harness.h"
+ *   #include "../kselftest_harness.h"
  *   TEST(standalone_test) {
  * do_some_stuff;
  * EXPECT_GT(10, stuff) {
@@ -38,8 +38,9 @@
  *
  * API inspired by code.google.com/p/googletest
  */
-#ifndef TEST_HARNESS_H_
-#define TEST_HARNESS_H_
+
+#ifndef __KSELFTEST_HARNESS_H
+#define __KSELFTEST_HARNESS_H
 
 #define _GNU_SOURCE
 #include 
@@ -532,4 +533,4 @@ static void __attribute__((constructor)) 
__constructor_order_first(void)
__constructor_order = _CONSTRUCTOR_ORDER_FORWARD;
 }
 
-#endif  /* TEST_HARNESS_H_ */
+#endif  /* __KSELFTEST_HARNESS_H *
-- 
2.11.0

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[PATCH v2 0/6] Add kselftest_harness.h

[Mickaël Salaün]

Hi,

This second patch series make the seccomp/test_harness.h more generally
available [1] and update the kselftest documentation with the Sphinx format. It
also improve the Makefile of seccomp tests to take into account any
kselftest_harness.h update.

[1] 
https://lkml.kernel.org/r/CAGXu5j+8CVz8vL51DRYXqOY=xc3zuKFf=ptene88xyhzfyi...@mail.gmail.com

Regards,

Mickaël Salaün (6):
  selftests: Make test_harness.h more generally available
  selftests: Cosmetic renames in kselftest_harness.h
  selftests/seccomp: Force rebuild according to dependencies
  Documentation/dev-tools: Add kselftest
  Documentation/dev-tools: Use reStructuredText markups for kselftest
  Documentation/dev-tools: Add kselftest_harness documentation

 Documentation/00-INDEX |   2 -
 Documentation/dev-tools/index.rst  |   1 +
 .../{kselftest.txt => dev-tools/kselftest.rst} | 134 +--
 MAINTAINERS|   1 +
 .../test_harness.h => kselftest_harness.h} | 268 +++--
 tools/testing/selftests/seccomp/Makefile   |   2 +
 tools/testing/selftests/seccomp/seccomp_bpf.c  |   2 +-
 7 files changed, 307 insertions(+), 103 deletions(-)
 rename Documentation/{kselftest.txt => dev-tools/kselftest.rst} (52%)
 rename tools/testing/selftests/{seccomp/test_harness.h => kselftest_harness.h} 
(81%)

-- 
2.11.0

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[PATCH v2 3/6] selftests/seccomp: Force rebuild according to dependencies

[Mickaël Salaün]

Rebuild the seccomp tests when kselftest_harness.h is updated.

Signed-off-by: Mickaël Salaün 
Cc: Andy Lutomirski 
Cc: Kees Cook 
Cc: Shuah Khan 
Cc: Will Drewry 
---
 tools/testing/selftests/seccomp/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/testing/selftests/seccomp/Makefile 
b/tools/testing/selftests/seccomp/Makefile
index 5fa6fd2246b1..aeb0c805f3ca 100644
--- a/tools/testing/selftests/seccomp/Makefile
+++ b/tools/testing/selftests/seccomp/Makefile
@@ -4,3 +4,5 @@ LDFLAGS += -lpthread
 
 include ../lib.mk
 
+$(TEST_GEN_PROGS): seccomp_bpf.c ../kselftest_harness.h
+   $(CC) $(CFLAGS) $(LDFLAGS) $< -o $@
-- 
2.11.0

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[PATCH v2 4/6] Documentation/dev-tools: Add kselftest

[Mickaël Salaün]

Move kselftest.txt to dev-tools/kselftest.rst .

Signed-off-by: Mickaël Salaün 
Cc: Jonathan Corbet 
Cc: Shuah Khan 
---
 Documentation/00-INDEX   | 2 --
 Documentation/{kselftest.txt => dev-tools/kselftest.rst} | 0
 2 files changed, 2 deletions(-)
 rename Documentation/{kselftest.txt => dev-tools/kselftest.rst} (100%)

diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX
index 793acf999e9e..924471664b5a 100644
--- a/Documentation/00-INDEX
+++ b/Documentation/00-INDEX
@@ -246,8 +246,6 @@ kprobes.txt
- documents the kernel probes debugging feature.
 kref.txt
- docs on adding reference counters (krefs) to kernel objects.
-kselftest.txt
-   - small unittests for (some) individual codepaths in the kernel.
 laptops/
- directory with laptop related info and laptop driver documentation.
 ldm.txt
diff --git a/Documentation/kselftest.txt b/Documentation/dev-tools/kselftest.rst
similarity index 100%
rename from Documentation/kselftest.txt
rename to Documentation/dev-tools/kselftest.rst
-- 
2.11.0

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Re: [RFC PATCH 3/3] hwmon: (adt7475) temperature smoothing

[Chris Packham]

On 03/05/17 07:14, Guenter Roeck wrote:
> On Tue, May 02, 2017 at 05:45:36PM +1200, Chris Packham wrote:
>> When enabled temperature smoothing allows ramping the fan speed over a
>> configurable period of time instead of jumping to the new speed
>> instantaneously.
>>
>> Signed-off-by: Chris Packham 
>> ---
>>  Documentation/hwmon/adt7475 |   5 ++
>>  drivers/hwmon/adt7475.c | 121 
>> 
>>  2 files changed, 126 insertions(+)
>>
>> diff --git a/Documentation/hwmon/adt7475 b/Documentation/hwmon/adt7475
>> index 85dc9e17bdee..31b15cb910ea 100644
>> --- a/Documentation/hwmon/adt7475
>> +++ b/Documentation/hwmon/adt7475
>> @@ -114,6 +114,11 @@ at the minimum (i.e. auto_point1_pwm). This can be 
>> configured using the
>>  pwm[1-*]_min sysfs attribute. A value of 0 means the fans will shut off. A
>>  value of 1 means the fans will run at auto_point1_pwm.
>>
>> +The responsiveness of the ADT747x to temperature changes can be configured.
>> +This allows smoothing of the fan speed transition. To enable temperature
>> +smoothing used the temp[1-*]_smoothing_enable sysfs attribute. To set the
>> +transition time set the value in ms in the temp[1-*]_smoothing sysfs 
>> attribute.
>> +
> Does this require two attributes, or can setting '0' for temp[1-*]_smoothing
> be used to disable it ?
>

One attribute could be made to work. I was following asc7621.c but from 
a usability perspective having to set the two attributes is not 
particularly convenient. The only argument for separating them is to 
allow smoothing at whatever the hardware default is.

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[PATCH v2 1/2] em28xx: Ignore errors while reading from eeprom

[Mauro Carvalho Chehab]

On some newer devices (newer Terratec H6 rev. 2), reading
from eeprom fails.

Ignore such errors, as we don't really need it to succeed.

Signed-off-by: Mauro Carvalho Chehab 
---
 drivers/media/usb/em28xx/em28xx-i2c.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/media/usb/em28xx/em28xx-i2c.c 
b/drivers/media/usb/em28xx/em28xx-i2c.c
index 8c472d5adb50..60b195c157b8 100644
--- a/drivers/media/usb/em28xx/em28xx-i2c.c
+++ b/drivers/media/usb/em28xx/em28xx-i2c.c
@@ -982,8 +982,6 @@ int em28xx_i2c_register(struct em28xx *dev, unsigned bus,
dev_err(&dev->intf->dev,
"%s: em28xx_i2_eeprom failed! retval [%d]\n",
__func__, retval);
-
-   return retval;
}
}
 
-- 
2.9.3

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[PATCH v2 2/2] em28xx: add support for new of Terratec H6

[Mauro Carvalho Chehab]

There's a new version of Terratec H6 with uses USB ID
0ccd:10b2. This version is similar to the old one (with is
supported via the HTC entry), except that this one has the
eeprom on the second bus.

On this board, one side of this board is labeled with:
dvbc v2.0
The other side with:
94V-0, MO2, RK-4221 with huge digits: 1107

Signed-off-by: Mauro Carvalho Chehab 
---
 drivers/media/usb/em28xx/em28xx-cards.c | 18 ++
 drivers/media/usb/em28xx/em28xx-dvb.c   |  1 +
 drivers/media/usb/em28xx/em28xx.h   |  1 +
 3 files changed, 20 insertions(+)

diff --git a/drivers/media/usb/em28xx/em28xx-cards.c 
b/drivers/media/usb/em28xx/em28xx-cards.c
index a12b599a1fa2..25e952b176ae 100644
--- a/drivers/media/usb/em28xx/em28xx-cards.c
+++ b/drivers/media/usb/em28xx/em28xx-cards.c
@@ -1193,6 +1193,22 @@ struct em28xx_board em28xx_boards[] = {
.i2c_speed= EM28XX_I2C_CLK_WAIT_ENABLE |
EM28XX_I2C_FREQ_400_KHZ,
},
+   [EM2884_BOARD_TERRATEC_H6] = {
+   .name = "Terratec Cinergy H6 rev. 2",
+   .has_dvb  = 1,
+   .ir_codes = RC_MAP_NEC_TERRATEC_CINERGY_XS,
+#if 0
+   .tuner_type   = TUNER_PHILIPS_TDA8290,
+   .tuner_addr   = 0x41,
+   .dvb_gpio = terratec_h5_digital, /* FIXME: probably wrong */
+   .tuner_gpio   = terratec_h5_gpio,
+#else
+   .tuner_type   = TUNER_ABSENT,
+#endif
+   .def_i2c_bus  = 1,
+   .i2c_speed= EM28XX_I2C_CLK_WAIT_ENABLE |
+   EM28XX_I2C_FREQ_400_KHZ,
+   },
[EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C] = {
.name = "Hauppauge WinTV HVR 930C",
.has_dvb  = 1,
@@ -2496,6 +2512,8 @@ struct usb_device_id em28xx_id_table[] = {
.driver_info = EM2884_BOARD_TERRATEC_H5 },
{ USB_DEVICE(0x0ccd, 0x10b6),   /* H5 Rev. 3 */
.driver_info = EM2884_BOARD_TERRATEC_H5 },
+   { USB_DEVICE(0x0ccd, 0x10b2),   /* H6 */
+   .driver_info = EM2884_BOARD_TERRATEC_H6 },
{ USB_DEVICE(0x0ccd, 0x0084),
.driver_info = EM2860_BOARD_TERRATEC_AV350 },
{ USB_DEVICE(0x0ccd, 0x0096),
diff --git a/drivers/media/usb/em28xx/em28xx-dvb.c 
b/drivers/media/usb/em28xx/em28xx-dvb.c
index 82edd37f0d73..4a7db623fe29 100644
--- a/drivers/media/usb/em28xx/em28xx-dvb.c
+++ b/drivers/media/usb/em28xx/em28xx-dvb.c
@@ -1522,6 +1522,7 @@ static int em28xx_dvb_init(struct em28xx *dev)
break;
case EM2884_BOARD_ELGATO_EYETV_HYBRID_2008:
case EM2884_BOARD_CINERGY_HTC_STICK:
+   case EM2884_BOARD_TERRATEC_H6:
terratec_htc_stick_init(dev);
 
/* attach demodulator */
diff --git a/drivers/media/usb/em28xx/em28xx.h 
b/drivers/media/usb/em28xx/em28xx.h
index e8d97d5ec161..88084f24f033 100644
--- a/drivers/media/usb/em28xx/em28xx.h
+++ b/drivers/media/usb/em28xx/em28xx.h
@@ -148,6 +148,7 @@
 #define EM28178_BOARD_PLEX_PX_BCUD98
 #define EM28174_BOARD_HAUPPAUGE_WINTV_DUALHD_DVB  99
 #define EM28174_BOARD_HAUPPAUGE_WINTV_DUALHD_01595 100
+#define EM2884_BOARD_TERRATEC_H6 101
 
 /* Limits minimum and default number of buffers */
 #define EM28XX_MIN_BUF 4
-- 
2.9.3

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Re: [RFC PATCH 3/3] hwmon: (adt7475) temperature smoothing

[Guenter Roeck]

On Tue, May 02, 2017 at 05:45:36PM +1200, Chris Packham wrote:
> When enabled temperature smoothing allows ramping the fan speed over a
> configurable period of time instead of jumping to the new speed
> instantaneously.
> 
> Signed-off-by: Chris Packham 
> ---
>  Documentation/hwmon/adt7475 |   5 ++
>  drivers/hwmon/adt7475.c | 121 
> 
>  2 files changed, 126 insertions(+)
> 
> diff --git a/Documentation/hwmon/adt7475 b/Documentation/hwmon/adt7475
> index 85dc9e17bdee..31b15cb910ea 100644
> --- a/Documentation/hwmon/adt7475
> +++ b/Documentation/hwmon/adt7475
> @@ -114,6 +114,11 @@ at the minimum (i.e. auto_point1_pwm). This can be 
> configured using the
>  pwm[1-*]_min sysfs attribute. A value of 0 means the fans will shut off. A
>  value of 1 means the fans will run at auto_point1_pwm.
>  
> +The responsiveness of the ADT747x to temperature changes can be configured.
> +This allows smoothing of the fan speed transition. To enable temperature
> +smoothing used the temp[1-*]_smoothing_enable sysfs attribute. To set the
> +transition time set the value in ms in the temp[1-*]_smoothing sysfs 
> attribute.
> +
Does this require two attributes, or can setting '0' for temp[1-*]_smoothing
be used to disable it ?

Thanks,
Guenter

>  Notes
>  -
>  
> diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c
> index 53f25bda0919..e1299eef7c51 100644
> --- a/drivers/hwmon/adt7475.c
> +++ b/drivers/hwmon/adt7475.c
> @@ -526,6 +526,109 @@ static ssize_t set_temp(struct device *dev, struct 
> device_attribute *attr,
>   return count;
>  }
>  
> +/* Assuming CONFIG6[SLOW] is 0 */
> +static const int ad7475_st_map[] = {
> + 37500, 18800, 12500, 7500, 4700, 3100, 1600, 800,
> +};
> +
> +static ssize_t show_temp_st(struct device *dev, struct device_attribute 
> *attr,
> +   char *buf)
> +{
> + struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
> + struct i2c_client *client = to_i2c_client(dev);
> + struct adt7475_data *data = i2c_get_clientdata(client);
> + int shift, idx;
> + long val;
> +
> + switch (sattr->index) {
> + case 0:
> + shift = 0;
> + idx = 0;
> + break;
> + case 1:
> + shift = 4;
> + idx = 1;
> + break;
> + case 2:
> + shift = 0;
> + idx = 1;
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + switch (sattr->nr) {
> + case CONTROL:
> + val = (data->enh_acou[idx] >> shift) & 0x8;
> + return sprintf(buf, "%d\n", !!val);
> + case MIN:
> + val = (data->enh_acou[idx] >> shift) & 0x7;
> + return sprintf(buf, "%d\n", ad7475_st_map[val]);
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static ssize_t set_temp_st(struct device *dev, struct device_attribute *attr,
> +  const char *buf, size_t count)
> +{
> + struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
> + struct i2c_client *client = to_i2c_client(dev);
> + struct adt7475_data *data = i2c_get_clientdata(client);
> + unsigned char reg;
> + int shift, idx;
> + int mask;
> + long val;
> +
> + if (kstrtol(buf, 10, &val))
> + return -EINVAL;
> +
> + switch (sattr->index) {
> + case 0:
> + reg = REG_ENHANCE_ACOUSTICS1;
> + shift = 0;
> + idx = 0;
> + break;
> + case 1:
> + reg = REG_ENHANCE_ACOUSTICS2;
> + shift = 4;
> + idx = 1;
> + break;
> + case 2:
> + reg = REG_ENHANCE_ACOUSTICS2;
> + shift = 0;
> + idx = 1;
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + switch (sattr->nr) {
> + case CONTROL:
> + val = !!val << 3;
> + mask = 0x8;
> + break;
> + case MIN:
> + val = find_closest_descending(val, ad7475_st_map,
> +   ARRAY_SIZE(ad7475_st_map));
> + mask = 0x7;
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + mutex_lock(&data->lock);
> +
> + data->enh_acou[idx] &= ~(mask << shift);
> + data->enh_acou[idx] |= (val << shift);
> +
> + i2c_smbus_write_byte_data(client, reg, data->enh_acou[idx]);
> +
> + mutex_unlock(&data->lock);
> +
> + return count;
> +}
> +
>  /*
>   * Table of autorange values - the user will write the value in millidegrees,
>   * and we'll convert it
> @@ -1008,6 +,10 @@ static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IRUGO | 
> S_IWUSR, show_temp, set_temp,
>   THERM, 0);
>  static SENSOR_DEVICE_ATTR_2(temp1_crit_hyst, S_IRUGO | S_IWUSR, show_temp,
>   set_temp, HYSTERSIS, 0);
> +static SENSOR

Re: [PATCH 2/3] hwmon: (adt7475) fan stall prevention

[Guenter Roeck]

On Tue, May 02, 2017 at 05:45:35PM +1200, Chris Packham wrote:
> By default adt7475 will stop the fans (pwm duty cycle 0%) when the
> temperature drops past Tmin - hysteresis. Some systems want to keep the
> fans moving even when the temperature drops so add new sysfs attributes
> that configure the enhanced acoustics min 1-3 which allows the fans to
> run at the minimum configure pwm duty cycle.
> 
> Signed-off-by: Chris Packham 
> ---
> pwmN_min is a horrible name but I really can't think of anything better.
> I'm biased a little because that is essentially the name of the bits in
> the datasheet. I'm open to suggestions.

pwmX_min is also traditionally the mimimum permitted pwm value,
not a boolean. This would be more appropriate to reflect the PWMmin
register values (0x64 to 0x66). Similar for pwmX_max if you want to
add support for it.
It might make sense to combine pwmX_min==0 with clearing the
respective bit in the REG_ENHANCE_ACOUSTICS[12] register. This way
we would only need one attribute to support both.

Guenter

> 
>  Documentation/hwmon/adt7475 |  5 +
>  drivers/hwmon/adt7475.c | 50 
> +
>  2 files changed, 55 insertions(+)
> 
> diff --git a/Documentation/hwmon/adt7475 b/Documentation/hwmon/adt7475
> index 0502f2b464e1..85dc9e17bdee 100644
> --- a/Documentation/hwmon/adt7475
> +++ b/Documentation/hwmon/adt7475
> @@ -109,6 +109,11 @@ fan speed) is applied. PWM values range from 0 (off) to 
> 255 (full speed).
>  Fan speed may be set to maximum when the temperature sensor associated with
>  the PWM control exceeds temp#_max.
>  
> +At Tmin - hysteresis the PWM output can either be off (0% duty cycle) or
> +at the minimum (i.e. auto_point1_pwm). This can be configured using the
> +pwm[1-*]_min sysfs attribute. A value of 0 means the fans will shut off. A
> +value of 1 means the fans will run at auto_point1_pwm.
> +
>  Notes
>  -
>  
> diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c
> index ec0c43fbcdce..53f25bda0919 100644
> --- a/drivers/hwmon/adt7475.c
> +++ b/drivers/hwmon/adt7475.c
> @@ -79,6 +79,9 @@
>  
>  #define REG_TEMP_TRANGE_BASE 0x5F
>  
> +#define REG_ENHANCE_ACOUSTICS1   0x62
> +#define REG_ENHANCE_ACOUSTICS2   0x63
> +
>  #define REG_PWM_MIN_BASE 0x64
>  
>  #define REG_TEMP_TMIN_BASE   0x67
> @@ -209,6 +212,7 @@ struct adt7475_data {
>   u8 range[3];
>   u8 pwmctl[3];
>   u8 pwmchan[3];
> + u8 enh_acou[2];
>  
>   u8 vid;
>   u8 vrm;
> @@ -700,6 +704,43 @@ static ssize_t set_pwm(struct device *dev, struct 
> device_attribute *attr,
>   data->pwm[sattr->nr][sattr->index] = clamp_val(val, 0, 0xFF);
>   i2c_smbus_write_byte_data(client, reg,
> data->pwm[sattr->nr][sattr->index]);
> + mutex_unlock(&data->lock);
> +
> + return count;
> +}
> +
> +
> +static ssize_t show_pwm_min(struct device *dev, struct device_attribute 
> *attr,
> + char *buf)
> +{
> + struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
> + struct i2c_client *client = to_i2c_client(dev);
> + struct adt7475_data *data = i2c_get_clientdata(client);
> + u8 mask = BIT(5 + sattr->index);
> +
> + return sprintf(buf, "%d\n", !!(data->enh_acou[0] & mask));
> +}
> +
> +static ssize_t set_pwm_min(struct device *dev, struct device_attribute *attr,
> + const char *buf, size_t count)
> +{
> + struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
> + struct i2c_client *client = to_i2c_client(dev);
> + struct adt7475_data *data = i2c_get_clientdata(client);
> + long val;
> + u8 mask = BIT(5 + sattr->index);
> +
> + if (kstrtol(buf, 10, &val))
> + return -EINVAL;
> +
> + mutex_lock(&data->lock);
> +
> + data->enh_acou[0] &= ~mask;
> + if (val)
> + data->enh_acou[0] |= mask;
> +
> + i2c_smbus_write_byte_data(client, REG_ENHANCE_ACOUSTICS1,
> +   data->enh_acou[0]);
>  
>   mutex_unlock(&data->lock);
>  
> @@ -1028,6 +1069,8 @@ static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, 
> S_IRUGO | S_IWUSR, show_pwm,
>   set_pwm, MIN, 0);
>  static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR, 
> show_pwm,
>   set_pwm, MAX, 0);
> +static SENSOR_DEVICE_ATTR_2(pwm1_min, S_IRUGO | S_IWUSR, show_pwm_min,
> + set_pwm_min, 0, 0);
>  static SENSOR_DEVICE_ATTR_2(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 
> INPUT,
>   1);
>  static SENSOR_DEVICE_ATTR_2(pwm2_freq, S_IRUGO | S_IWUSR, show_pwmfreq,
> @@ -1040,6 +1083,8 @@ static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, 
> S_IRUGO | S_IWUSR, show_pwm,
>   set_pwm, MIN, 1);
>  static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR, 
> show_pwm,
>   set_pwm, MAX, 1);
> +static SENSOR_DEVI

Re: [PATCH 1/2] em28xx: allow setting the eeprom bus at cards struct

[Frank Schäfer]

Am 01.05.2017 um 19:54 schrieb Mauro Carvalho Chehab:
> Hi Frank,
>
> Em Mon, 1 May 2017 16:11:51 +0200
> Frank Schäfer  escreveu:
>
>> Am 01.05.2017 um 13:38 schrieb Mauro Carvalho Chehab:
>>> Right now, all devices use bus 0 for eeprom. However, newer
>>> versions of Terratec H6 use a different buffer for eeprom.
>>>
>>> So, add support to use a different I2C address for eeprom.  
>> Has this been tested ?
>> Did you read my reply to the previous patch version ?:
>> See http://www.spinics.net/lists/linux-media/msg114860.html
>>
>> I doubt it will work. At least not for the device from the thread in the
>> Kodi-forum.
> Yes. Someone at IRC were complaining about this device (his nick is
> buxy81). 
Ahh, you are in contact with him ? That's good.

> According with the tests he did, with both patches his
> device is now working.
I guess it works because (due to the first patch) no eeprom is detected
anymore.
In this case the driver prints a "board has no eeprom" message to the
log and continues.

> That's said, it would be great if he could provide us more details
> about the tests he did, with the logs enabled, in order for us to see
> if the eeprom contents is properly read.
Yes, further tests/details are required.
Can you ask him to join the list ?

Regards,
Frank



>
>
> Thanks,
> Mauro

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Re: [PATCH v4 RFT 1/2] powerpc/fadump: reduce memory consumption for capture kernel

[Hari Bathini]

Hi Michal,


On Tuesday 02 May 2017 09:26 PM, Michal Suchanek wrote:

With fadump (dump capture) kernel booting like a regular kernel, it almost
needs the same amount of memory to boot as the production kernel, which is
unwarranted for a dump capture kernel. But with no option to disable some
of the unnecessary subsystems in fadump kernel, that much memory is wasted
on fadump, depriving the production kernel of that memory.

Introduce kernel parameter 'fadump_append=' that would take regular kernel
parameters to be appended when fadump is active.
This 'fadump_append=' parameter can be leveraged to pass parameters like
nr_cpus=1, cgroup_disable=memory and numa=off, to disable unwarranted
resources/subsystems.

Also, ensure the log "Firmware-assisted dump is active" is printed early
in the boot process to put the subsequent fadump messages in context.

Suggested-by: Michael Ellerman 
Signed-off-by: Hari Bathini 
Signed-off-by: Michal Suchanek 
---
v4:
  - use space separated arguments instead of comma separated
  - do not append parameters when fadummp is disabled
---
  arch/powerpc/kernel/fadump.c | 27 ---
  1 file changed, 24 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c
index ebf2e9c..e0c728a 100644
--- a/arch/powerpc/kernel/fadump.c
+++ b/arch/powerpc/kernel/fadump.c
@@ -79,8 +79,10 @@ int __init early_init_dt_scan_fw_dump(unsigned long node,
 * dump data waiting for us.
 */
fdm_active = of_get_flat_dt_prop(node, "ibm,kernel-dump", NULL);
-   if (fdm_active)
+   if (fdm_active) {
+   pr_info("Firmware-assisted dump is active.\n");
fw_dump.dump_active = 1;
+   }

/* Get the sizes required to store dump data for the firmware provided
 * dump sections.
@@ -263,8 +265,12 @@ int __init fadump_reserve_mem(void)
  {
unsigned long base, size, memory_boundary;

-   if (!fw_dump.fadump_enabled)
+   if (!fw_dump.fadump_enabled) {
+   if (fw_dump.dump_active)
+   pr_warn("Firmware-assisted dump was active but kernel"
+   " booted with fadump disabled!\n");
return 0;
+   }

if (!fw_dump.fadump_supported) {
printk(KERN_INFO "Firmware-assisted dump is not supported on"
@@ -304,7 +310,6 @@ int __init fadump_reserve_mem(void)
memory_boundary = memblock_end_of_DRAM();

if (fw_dump.dump_active) {
-   printk(KERN_INFO "Firmware-assisted dump is active.\n");
/*
 * If last boot has crashed then reserve all the memory
 * above boot_memory_size so that we don't touch it until
@@ -363,6 +368,22 @@ unsigned long __init arch_reserved_kernel_pages(void)
return memblock_reserved_size() / PAGE_SIZE;
  }

+/* Look for fadump_append= cmdline option. */
+static int __init early_fadump_append_param(char *p)
+{
+   if (!p)
+   return 1;
+
+   if (fw_dump.fadump_enabled && fw_dump.dump_active) {
+   pr_info("enforcing additional parameters (%s) passed through "
+   "'fadump_append=' parameter\n", p);
+   parse_early_options(p);
+   }
+
+   return 0;
+}
+early_param("fadump_append", early_fadump_append_param);
+
  /* Look for fadump= cmdline option. */
  static int __init early_fadump_param(char *p)
  {


I don't think this addresses Michael's concern in v3..
IIUC, we should actually be editing boot_command_line early
in the boot process instead of using parse_early_options() to enforce
the additional parameters..

Thanks
Hari

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[PATCH v4 RFT 2/2] powerpc/fadump: update documentation about 'fadump_append=' parameter

[Michal Suchanek]

With the introduction of 'fadump_append=' parameter to pass additional
parameters to fadump (capture) kernel, update documentation about it.

Signed-off-by: Hari Bathini 
Signed-off-by: Michal Suchanek 
---
 Documentation/powerpc/firmware-assisted-dump.txt | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Documentation/powerpc/firmware-assisted-dump.txt 
b/Documentation/powerpc/firmware-assisted-dump.txt
index 9cabaf8..99ab8f4 100644
--- a/Documentation/powerpc/firmware-assisted-dump.txt
+++ b/Documentation/powerpc/firmware-assisted-dump.txt
@@ -162,7 +162,11 @@ How to enable firmware-assisted dump (fadump):
 
 1. Set config option CONFIG_FA_DUMP=y and build kernel.
 2. Boot into linux kernel with 'fadump=on' kernel cmdline option.
-3. Optionally, user can also set 'crashkernel=' kernel cmdline
+3. A user can pass additional kernel parameters as a comma separated list
+   through 'fadump_append=' parameter, to be be appended when fadump is active.
+   This can be used to pass parameters like nr_cpus=1, numa=off to reduce
+   memory consumption during dump capture.
+4. Optionally, user can also set 'fadump_reserve_mem=' kernel cmdline
to specify size of the memory to reserve for boot memory dump
preservation.
 
@@ -172,6 +176,8 @@ NOTE: 1. 'fadump_reserve_mem=' parameter has been 
deprecated. Instead
   2. If firmware-assisted dump fails to reserve memory then it
  will fallback to existing kdump mechanism if 'crashkernel='
  option is set at kernel cmdline.
+  3. 'fadump_append=' parameter con be quoted to append multiple arguments
+ as in 'fadump_append="nr_cpus=8 numa=off"'
 
 Sysfs/debugfs files:
 
-- 
2.10.2

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[PATCH v4 RFT 1/2] powerpc/fadump: reduce memory consumption for capture kernel

[Michal Suchanek]

With fadump (dump capture) kernel booting like a regular kernel, it almost
needs the same amount of memory to boot as the production kernel, which is
unwarranted for a dump capture kernel. But with no option to disable some
of the unnecessary subsystems in fadump kernel, that much memory is wasted
on fadump, depriving the production kernel of that memory.

Introduce kernel parameter 'fadump_append=' that would take regular kernel
parameters to be appended when fadump is active.
This 'fadump_append=' parameter can be leveraged to pass parameters like
nr_cpus=1, cgroup_disable=memory and numa=off, to disable unwarranted
resources/subsystems.

Also, ensure the log "Firmware-assisted dump is active" is printed early
in the boot process to put the subsequent fadump messages in context.

Suggested-by: Michael Ellerman 
Signed-off-by: Hari Bathini 
Signed-off-by: Michal Suchanek 
---
v4:
 - use space separated arguments instead of comma separated
 - do not append parameters when fadummp is disabled
---
 arch/powerpc/kernel/fadump.c | 27 ---
 1 file changed, 24 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c
index ebf2e9c..e0c728a 100644
--- a/arch/powerpc/kernel/fadump.c
+++ b/arch/powerpc/kernel/fadump.c
@@ -79,8 +79,10 @@ int __init early_init_dt_scan_fw_dump(unsigned long node,
 * dump data waiting for us.
 */
fdm_active = of_get_flat_dt_prop(node, "ibm,kernel-dump", NULL);
-   if (fdm_active)
+   if (fdm_active) {
+   pr_info("Firmware-assisted dump is active.\n");
fw_dump.dump_active = 1;
+   }
 
/* Get the sizes required to store dump data for the firmware provided
 * dump sections.
@@ -263,8 +265,12 @@ int __init fadump_reserve_mem(void)
 {
unsigned long base, size, memory_boundary;
 
-   if (!fw_dump.fadump_enabled)
+   if (!fw_dump.fadump_enabled) {
+   if (fw_dump.dump_active)
+   pr_warn("Firmware-assisted dump was active but kernel"
+   " booted with fadump disabled!\n");
return 0;
+   }
 
if (!fw_dump.fadump_supported) {
printk(KERN_INFO "Firmware-assisted dump is not supported on"
@@ -304,7 +310,6 @@ int __init fadump_reserve_mem(void)
memory_boundary = memblock_end_of_DRAM();
 
if (fw_dump.dump_active) {
-   printk(KERN_INFO "Firmware-assisted dump is active.\n");
/*
 * If last boot has crashed then reserve all the memory
 * above boot_memory_size so that we don't touch it until
@@ -363,6 +368,22 @@ unsigned long __init arch_reserved_kernel_pages(void)
return memblock_reserved_size() / PAGE_SIZE;
 }
 
+/* Look for fadump_append= cmdline option. */
+static int __init early_fadump_append_param(char *p)
+{
+   if (!p)
+   return 1;
+
+   if (fw_dump.fadump_enabled && fw_dump.dump_active) {
+   pr_info("enforcing additional parameters (%s) passed through "
+   "'fadump_append=' parameter\n", p);
+   parse_early_options(p);
+   }
+
+   return 0;
+}
+early_param("fadump_append", early_fadump_append_param);
+
 /* Look for fadump= cmdline option. */
 static int __init early_fadump_param(char *p)
 {
-- 
2.10.2

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[PATCH] input: edt-ft5x06: increase allowed data range for threshold parameter

[Martin Kepplinger]

The datasheet and application note does not mention an allowed range for
the M09_REGISTER_THRESHOLD parameter. One of our customers needs to set
lower values than 20 and they seem to work just fine on EDT EP0xx0M09 with
T5x06 touch.

So, lacking a known lower limit, we increase the range for thresholds,
and set the lower limit to 0. The documentation is updated accordingly.

Signed-off-by: Schoefegger Stefan 
Signed-off-by: Manfred Schlaegl 
Signed-off-by: Martin Kepplinger 
---
 Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt | 2 +-
 Documentation/input/devices/edt-ft5x06.rst | 2 +-
 drivers/input/touchscreen/edt-ft5x06.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt 
b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt
index 6db2210..025cf8c 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt
+++ b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.txt
@@ -36,7 +36,7 @@ Optional properties:
 control gpios
 
  - threshold:   allows setting the "click"-threshold in the range
-from 20 to 80.
+from 0 to 80.
 
  - gain:allows setting the sensitivity in the range from 0 to
 31. Note that lower values indicate higher
diff --git a/Documentation/input/devices/edt-ft5x06.rst 
b/Documentation/input/devices/edt-ft5x06.rst
index 2032f0b..1ccc94b 100644
--- a/Documentation/input/devices/edt-ft5x06.rst
+++ b/Documentation/input/devices/edt-ft5x06.rst
@@ -15,7 +15,7 @@ It has been tested with the following devices:
 The driver allows configuration of the touch screen via a set of sysfs files:
 
 /sys/class/input/eventX/device/device/threshold:
-allows setting the "click"-threshold in the range from 20 to 80.
+allows setting the "click"-threshold in the range from 0 to 80.
 
 /sys/class/input/eventX/device/device/gain:
 allows setting the sensitivity in the range from 0 to 31. Note that
diff --git a/drivers/input/touchscreen/edt-ft5x06.c 
b/drivers/input/touchscreen/edt-ft5x06.c
index 8cf8d8d..f872817 100644
--- a/drivers/input/touchscreen/edt-ft5x06.c
+++ b/drivers/input/touchscreen/edt-ft5x06.c
@@ -471,7 +471,7 @@ static EDT_ATTR(gain, S_IWUSR | S_IRUGO, WORK_REGISTER_GAIN,
 static EDT_ATTR(offset, S_IWUSR | S_IRUGO, WORK_REGISTER_OFFSET,
M09_REGISTER_OFFSET, 0, 31);
 static EDT_ATTR(threshold, S_IWUSR | S_IRUGO, WORK_REGISTER_THRESHOLD,
-   M09_REGISTER_THRESHOLD, 20, 80);
+   M09_REGISTER_THRESHOLD, 0, 80);
 static EDT_ATTR(report_rate, S_IWUSR | S_IRUGO, WORK_REGISTER_REPORT_RATE,
NO_REGISTER, 3, 14);
 
-- 
2.1.4

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Re: [PATCH v2] stm class: Document the stm_ftrace

[Alexander Shishkin]

Chunyan Zhang  writes:

> Hi Alex,

Hi Chunyan,

> Could you take this patch please if there's no further comments?

Sorry for the delay. Yes, I'm picking this patch into my tree very
soon.

Thanks,
--
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[PATCH v8 4/7] coresight: refactor with function of_coresight_get_cpu

[Leo Yan]

This is refactor to add function of_coresight_get_cpu(), so it's used to
retrieve CPU id for coresight component. Finally can use it as a common
function for multiple places.

Suggested-by: Mathieu Poirier 
Reviewed-by: Suzuki K Poulose 
Signed-off-by: Leo Yan 
---
 drivers/hwtracing/coresight/of_coresight.c | 43 +++---
 include/linux/coresight.h  |  2 ++
 2 files changed, 30 insertions(+), 15 deletions(-)

diff --git a/drivers/hwtracing/coresight/of_coresight.c 
b/drivers/hwtracing/coresight/of_coresight.c
index de7e8ce..46eec0f 100644
--- a/drivers/hwtracing/coresight/of_coresight.c
+++ b/drivers/hwtracing/coresight/of_coresight.c
@@ -101,15 +101,39 @@ static int of_coresight_alloc_memory(struct device *dev,
return 0;
 }
 
+int of_coresight_get_cpu(const struct device_node *node)
+{
+   int cpu;
+   bool found;
+   struct device_node *dn, *np;
+
+   dn = of_parse_phandle(node, "cpu", 0);
+
+   /* Affinity defaults to CPU0 */
+   if (!dn)
+   return 0;
+
+   for_each_possible_cpu(cpu) {
+   np = of_cpu_device_node_get(cpu);
+   found = (dn == np);
+   of_node_put(np);
+   if (found)
+   break;
+   }
+   of_node_put(dn);
+
+   /* Affinity to CPU0 if no cpu nodes are found */
+   return found ? cpu : 0;
+}
+EXPORT_SYMBOL_GPL(of_coresight_get_cpu);
+
 struct coresight_platform_data *of_get_coresight_platform_data(
struct device *dev, const struct device_node *node)
 {
-   int i = 0, ret = 0, cpu;
+   int i = 0, ret = 0;
struct coresight_platform_data *pdata;
struct of_endpoint endpoint, rendpoint;
struct device *rdev;
-   bool found;
-   struct device_node *dn, *np;
struct device_node *ep = NULL;
struct device_node *rparent = NULL;
struct device_node *rport = NULL;
@@ -176,18 +200,7 @@ struct coresight_platform_data 
*of_get_coresight_platform_data(
} while (ep);
}
 
-   dn = of_parse_phandle(node, "cpu", 0);
-   for_each_possible_cpu(cpu) {
-   np = of_cpu_device_node_get(cpu);
-   found = (dn == np);
-   of_node_put(np);
-   if (found)
-   break;
-   }
-   of_node_put(dn);
-
-   /* Affinity to CPU0 if no cpu nodes are found */
-   pdata->cpu = found ? cpu : 0;
+   pdata->cpu = of_coresight_get_cpu(node);
 
return pdata;
 }
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 769f2c8..4915254 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -263,9 +263,11 @@ static inline int coresight_timeout(void __iomem *addr, 
u32 offset,
 #endif
 
 #ifdef CONFIG_OF
+extern int of_coresight_get_cpu(const struct device_node *node);
 extern struct coresight_platform_data *of_get_coresight_platform_data(
struct device *dev, const struct device_node *node);
 #else
+static inline int of_coresight_get_cpu(const struct device_node *node) { 
return 0; }
 static inline struct coresight_platform_data *of_get_coresight_platform_data(
struct device *dev, const struct device_node *node) { return NULL; }
 #endif
-- 
2.7.4

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[PATCH v8 6/7] arm64: dts: hi6220: register debug module

[Leo Yan]

Bind debug module driver for Hi6220.

Signed-off-by: Leo Yan 
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++
 1 file changed, 64 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 470461d..467aa15 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -913,5 +913,69 @@
};
};
};
+
+   debug@f659 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf659 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu0>;
+   };
+
+   debug@f6592000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf6592000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu1>;
+   };
+
+   debug@f6594000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf6594000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu2>;
+   };
+
+   debug@f6596000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf6596000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu3>;
+   };
+
+   debug@f65d {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf65d 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu4>;
+   };
+
+   debug@f65d2000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf65d2000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu5>;
+   };
+
+   debug@f65d4000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf65d4000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu6>;
+   };
+
+   debug@f65d6000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf65d6000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu7>;
+   };
};
 };
-- 
2.7.4

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[PATCH v8 1/7] coresight: bindings for CPU debug module

[Leo Yan]

According to ARMv8 architecture reference manual (ARM DDI 0487A.k)
Chapter 'Part H: External debug', the CPU can integrate debug module
and it can support self-hosted debug and external debug. Especially
for supporting self-hosted debug, this means the program can access
the debug module from mmio region; and usually the mmio region is
integrated with coresight.

So add document for binding debug component, includes binding to APB
clock; and also need specify the CPU node which the debug module is
dedicated to specific CPU.

Suggested-by: Mike Leach 
Reviewed-by: Mathieu Poirier 
Reviewed-by: Suzuki K Poulose 
Acked-by: Rob Herring 
Signed-off-by: Leo Yan 
---
 .../bindings/arm/coresight-cpu-debug.txt   | 49 ++
 1 file changed, 49 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt

diff --git a/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt 
b/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
new file mode 100644
index 000..2982912
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
@@ -0,0 +1,49 @@
+* CoreSight CPU Debug Component:
+
+CoreSight CPU debug component are compliant with the ARMv8 architecture
+reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The
+external debug module is mainly used for two modes: self-hosted debug and
+external debug, and it can be accessed from mmio region from Coresight
+and eventually the debug module connects with CPU for debugging. And the
+debug module provides sample-based profiling extension, which can be used
+to sample CPU program counter, secure state and exception level, etc;
+usually every CPU has one dedicated debug module to be connected.
+
+Required properties:
+
+- compatible : should be "arm,coresight-cpu-debug"; supplemented with
+   "arm,primecell" since this driver is using the AMBA bus
+  interface.
+
+- reg : physical base address and length of the register set.
+
+- clocks : the clock associated to this component.
+
+- clock-names : the name of the clock referenced by the code. Since we are
+using the AMBA framework, the name of the clock providing
+   the interconnect should be "apb_pclk" and the clock is
+   mandatory. The interface between the debug logic and the
+   processor core is clocked by the internal CPU clock, so it
+   is enabled with CPU clock by default.
+
+- cpu : the CPU phandle the debug module is affined to. When omitted
+   the module is considered to belong to CPU0.
+
+Optional properties:
+
+- power-domains: a phandle to the debug power domain. We use "power-domains"
+ binding to turn on the debug logic if it has own dedicated
+power domain and if necessary to use "cpuidle.off=1" or
+"nohlt" in the kernel command line or sysfs node to
+constrain idle states to ensure registers in the CPU power
+domain are accessible.
+
+Example:
+
+   debug@f659 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf659 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu0>;
+   };
-- 
2.7.4

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[PATCH v8 5/7] coresight: add support for CPU debug module

[Leo Yan]

Coresight includes debug module and usually the module connects with CPU
debug logic. ARMv8 architecture reference manual (ARM DDI 0487A.k) has
description for related info in "Part H: External Debug".

Chapter H7 "The Sample-based Profiling Extension" introduces several
sampling registers, e.g. we can check program counter value with
combined CPU exception level, secure state, etc. So this is helpful for
analysis CPU lockup scenarios, e.g. if one CPU has run into infinite
loop with IRQ disabled. In this case the CPU cannot switch context and
handle any interrupt (including IPIs), as the result it cannot handle
SMP call for stack dump.

This patch is to enable coresight debug module, so firstly this driver
is to bind apb clock for debug module and this is to ensure the debug
module can be accessed from program or external debugger. And the driver
uses sample-based registers for debug purpose, e.g. when system triggers
panic, the driver will dump program counter and combined context
registers (EDCIDSR, EDVIDSR); by parsing context registers so can
quickly get to know CPU secure state, exception level, etc.

Some of the debug module registers are located in CPU power domain, so
this requires the CPU power domain stays on when access related debug
registers, but the power management for CPU power domain is quite
dependent on SoC integration for power management. For the platforms
which with sane power controller implementations, this driver follows
the method to set EDPRCR to try to pull the CPU out of low power state
and then set 'no power down request' bit so the CPU has no chance to
lose power.

If the SoC has not followed up this design well for power management
controller, the user should use the command line parameter or sysfs
to constrain all or partial idle states to ensure the CPU power
domain is enabled and access coresight CPU debug component safely.

Signed-off-by: Leo Yan 
---
 drivers/hwtracing/coresight/Kconfig   |  14 +
 drivers/hwtracing/coresight/Makefile  |   1 +
 drivers/hwtracing/coresight/coresight-cpu-debug.c | 670 ++
 3 files changed, 685 insertions(+)
 create mode 100644 drivers/hwtracing/coresight/coresight-cpu-debug.c

diff --git a/drivers/hwtracing/coresight/Kconfig 
b/drivers/hwtracing/coresight/Kconfig
index 130cb21..8d55d6d 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -89,4 +89,18 @@ config CORESIGHT_STM
  logging useful software events or data coming from various entities
  in the system, possibly running different OSs
 
+config CORESIGHT_CPU_DEBUG
+   tristate "CoreSight CPU Debug driver"
+   depends on ARM || ARM64
+   depends on DEBUG_FS
+   help
+ This driver provides support for coresight debugging module. This
+ is primarily used to dump sample-based profiling registers when
+ system triggers panic, the driver will parse context registers so
+ can quickly get to know program counter (PC), secure state,
+ exception level, etc. Before use debugging functionality, platform
+ needs to ensure the clock domain and power domain are enabled
+ properly, please refer Documentation/trace/coresight-cpu-debug.txt
+ for detailed description and the example for usage.
+
 endif
diff --git a/drivers/hwtracing/coresight/Makefile 
b/drivers/hwtracing/coresight/Makefile
index af480d9..433d590 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o \
coresight-etm4x-sysfs.o
 obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o
 obj-$(CONFIG_CORESIGHT_STM) += coresight-stm.o
+obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o
diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c 
b/drivers/hwtracing/coresight/coresight-cpu-debug.c
new file mode 100644
index 000..b77456d
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c
@@ -0,0 +1,670 @@
+/*
+ * Copyright (c) 2017 Linaro Limited. All rights reserved.
+ *
+ * Author: Leo Yan 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ *
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 

[PATCH v8 7/7] arm64: dts: qcom: msm8916: Add debug unit

[Leo Yan]

Add debug unit on Qualcomm msm8916 based platforms, including the
DragonBoard 410c board.

Signed-off-by: Leo Yan 
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 68a8e67..3af814b 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1104,6 +1104,38 @@
};
};
 
+   debug@85 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0x85 0x1000>;
+   clocks = <&rpmcc RPM_QDSS_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&CPU0>;
+   };
+
+   debug@852000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0x852000 0x1000>;
+   clocks = <&rpmcc RPM_QDSS_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&CPU1>;
+   };
+
+   debug@854000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0x854000 0x1000>;
+   clocks = <&rpmcc RPM_QDSS_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&CPU2>;
+   };
+
+   debug@856000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0x856000 0x1000>;
+   clocks = <&rpmcc RPM_QDSS_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&CPU3>;
+   };
+
etm@85c000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0x85c000 0x1000>;
-- 
2.7.4

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[PATCH v8 2/7] doc: Add documentation for Coresight CPU debug

[Leo Yan]

Update kernel-parameters.txt to add new parameter:
coresight_cpu_debug.enable is a knob to enable debugging at boot time.

Add detailed documentation, which contains the implementation, Mike
Leach excellent summary for "clock and power domain". At the end some
examples on how to enable the debugging functionality are provided.

Suggested-by: Mike Leach 
Signed-off-by: Leo Yan 
---
 Documentation/admin-guide/kernel-parameters.txt |   7 +
 Documentation/trace/coresight-cpu-debug.txt | 174 
 2 files changed, 181 insertions(+)
 create mode 100644 Documentation/trace/coresight-cpu-debug.txt

diff --git a/Documentation/admin-guide/kernel-parameters.txt 
b/Documentation/admin-guide/kernel-parameters.txt
index facc20a..cf90146 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -650,6 +650,13 @@
/proc//coredump_filter.
See also Documentation/filesystems/proc.txt.
 
+   coresight_cpu_debug.enable
+   [ARM,ARM64]
+   Format: 
+   Enable/disable the CPU sampling based debugging.
+   0: default value, disable debugging
+   1: enable debugging at boot time
+
cpuidle.off=1   [CPU_IDLE]
disable the cpuidle sub-system
 
diff --git a/Documentation/trace/coresight-cpu-debug.txt 
b/Documentation/trace/coresight-cpu-debug.txt
new file mode 100644
index 000..0426d50
--- /dev/null
+++ b/Documentation/trace/coresight-cpu-debug.txt
@@ -0,0 +1,174 @@
+   Coresight CPU Debug Module
+   ==
+
+   Author:   Leo Yan 
+   Date: April 5th, 2017
+
+Introduction
+
+
+Coresight CPU debug module is defined in ARMv8-a architecture reference manual
+(ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate
+debug module and it is mainly used for two modes: self-hosted debug and
+external debug. Usually the external debug mode is well known as the external
+debugger connects with SoC from JTAG port; on the other hand the program can
+explore debugging method which rely on self-hosted debug mode, this document
+is to focus on this part.
+
+The debug module provides sample-based profiling extension, which can be used
+to sample CPU program counter, secure state and exception level, etc; usually
+every CPU has one dedicated debug module to be connected. Based on self-hosted
+debug mechanism, Linux kernel can access these related registers from mmio
+region when the kernel panic happens. The callback notifier for kernel panic
+will dump related registers for every CPU; finally this is good for assistant
+analysis for panic.
+
+
+Implementation
+--
+
+- During driver registration, use EDDEVID and EDDEVID1 two device ID
+  registers to decide if sample-based profiling is implemented or not. On some
+  platforms this hardware feature is fully or partialy implemented; and if
+  this feature is not supported then registration will fail.
+
+- When write this doc, the debug driver mainly relies on three sampling
+  registers. The kernel panic callback notifier gathers info from EDPCSR
+  EDVIDSR and EDCIDSR; from EDPCSR we can get program counter, EDVIDSR has
+  information for secure state, exception level, bit width, etc; EDCIDSR is
+  context ID value which contains the sampled value of CONTEXTIDR_EL1.
+
+- The driver supports CPU running mode with either AArch64 or AArch32. The
+  registers naming convention is a bit different between them, AArch64 uses
+  'ED' for register prefix (ARM DDI 0487A.k, chapter H9.1) and AArch32 uses
+  'DBG' as prefix (ARM DDI 0487A.k, chapter G5.1). The driver is unified to
+  use AArch64 naming convention.
+
+- ARMv8-a (ARM DDI 0487A.k) and ARMv7-a (ARM DDI 0406C.b) have different
+  register bits definition. So the driver consolidates two difference:
+
+  If PCSROffset=0b, on ARMv8-a the feature of EDPCSR is not implemented;
+  but ARMv7-a defines "PCSR samples are offset by a value that depends on the
+  instruction set state". For ARMv7-a, the driver checks furthermore if CPU
+  runs with ARM or thumb instruction set and calibrate PCSR value, the
+  detailed description for offset is in ARMv7-a ARM (ARM DDI 0406C.b) chapter
+  C11.11.34 "DBGPCSR, Program Counter Sampling Register".
+
+  If PCSROffset=0b0010, ARMv8-a defines "EDPCSR implemented, and samples have
+  no offset applied and do not sample the instruction set state in AArch32
+  state". So on ARMv8 if EDDEVID1.PCSROffset is 0b0010 and the CPU operates
+  in AArch32 state, EDPCSR is not sampled; when the CPU operates in AArch64
+  state EDPCSR is sampled and no offset are applied.
+
+
+Clock and power domain
+--
+
+Before accessing debug registers, we should ensure the clock and power domain
+have been enabled properly. In ARMv8-a ARM (ARM DDI 0487A.k) chapter 'H9.1
+

[PATCH v8 3/7] coresight: of_get_coresight_platform_data: Add missing of_node_put

[Leo Yan]

From: Suzuki K Poulose 

The of_get_coresight_platform_data iterates over the possible CPU nodes
to find a given cpu phandle. However it does not drop the reference
to the node pointer returned by the of_get_coresight_platform_data.

This patch also introduces another minor fix is to use
of_cpu_device_node_get() to replace of_get_cpu_node().

Cc: Mathieu Poirier 
Reviewed-by: Suzuki K Poulose 
Signed-off-by: Suzuki K Poulose 
[Leo: minor tweaks for of_get_coresight_platform_data]
Signed-off-by: Leo Yan 
---
 drivers/hwtracing/coresight/of_coresight.c | 17 ++---
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/hwtracing/coresight/of_coresight.c 
b/drivers/hwtracing/coresight/of_coresight.c
index 859ad49..de7e8ce 100644
--- a/drivers/hwtracing/coresight/of_coresight.c
+++ b/drivers/hwtracing/coresight/of_coresight.c
@@ -108,7 +108,8 @@ struct coresight_platform_data 
*of_get_coresight_platform_data(
struct coresight_platform_data *pdata;
struct of_endpoint endpoint, rendpoint;
struct device *rdev;
-   struct device_node *dn;
+   bool found;
+   struct device_node *dn, *np;
struct device_node *ep = NULL;
struct device_node *rparent = NULL;
struct device_node *rport = NULL;
@@ -175,17 +176,19 @@ struct coresight_platform_data 
*of_get_coresight_platform_data(
} while (ep);
}
 
-   /* Affinity defaults to CPU0 */
-   pdata->cpu = 0;
dn = of_parse_phandle(node, "cpu", 0);
-   for (cpu = 0; dn && cpu < nr_cpu_ids; cpu++) {
-   if (dn == of_get_cpu_node(cpu, NULL)) {
-   pdata->cpu = cpu;
+   for_each_possible_cpu(cpu) {
+   np = of_cpu_device_node_get(cpu);
+   found = (dn == np);
+   of_node_put(np);
+   if (found)
break;
-   }
}
of_node_put(dn);
 
+   /* Affinity to CPU0 if no cpu nodes are found */
+   pdata->cpu = found ? cpu : 0;
+
return pdata;
 }
 EXPORT_SYMBOL_GPL(of_get_coresight_platform_data);
-- 
2.7.4

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[PATCH v8 0/7] coresight: enable debug module

[Leo Yan]

ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The
Sample-based Profiling Extension" has description for sampling
registers, we can utilize these registers to check program counter
value with combined CPU exception level, secure state, etc. So this is
helpful for CPU lockup bugs, e.g. if one CPU has run into infinite loop
with IRQ disabled; the 'hang' CPU cannot switch context and handle any
interrupt, so it cannot handle SMP call for stack dump, etc.

This patch series is to enable coresight debug module with sample-based
registers and register call back notifier for PCSR register dumping
when panic happens, so we can see below dumping info for panic; and
this patch series has considered the conditions for access permission
for debug registers self, so this can avoid access debug registers when
CPU power domain is off; the driver also try to figure out the CPU is
in secure or non-secure state.

Patch 0001 is to document the dt binding; patch 0002 is to document
boot parameters used in kernel command line and add one detailed
document to describe the Coresight debug module implementation, the
clock and power domain impaction on the driver, some examples for
usage.

Patch 0003 is used to fix the func of_get_coresight_platform_data()
doesn't properly drop the reference to the CPU node pointer; and
patch 0004 is refactor to add new function of_coresight_get_cpu().

Patch 0005 is the driver for CPU debug module.

Patch 0006 in this series are to enable debug unit on 96boards Hikey,
Patch 0007 is to enable debug on 96boards DB410c. Have verified on both
two boards.

We can enable debugging with two methods, adding parameters into kernel
command line for build-in module:
  coresight_cpu_debug.enable=1

Or we can wait the system has booted up to use debugfs nodes to enable
debugging:
  # echo 1 > /sys/kernel/debug/coresight_cpu_debug/enable

As result we can get below log after input command:
echo c > /proc/sysrq-trigger:

ARM external debug module:
CPU[0]:
 EDPRSR:  000b (Power:On DLK:Unlock)
 EDPCSR:  [] handle_IPI+0xe4/0x150
 EDCIDSR: 
 EDVIDSR: 9000 (State:Non-secure Mode:EL1/0 Width:64bits VMID:0)
CPU[1]:
 EDPRSR:  000b (Power:On DLK:Unlock)
 EDPCSR:  [] debug_notifier_call+0x108/0x288
 EDCIDSR: 
 EDVIDSR: 9000 (State:Non-secure Mode:EL1/0 Width:64bits VMID:0)

[...]

Changes from v7:
* Fix operator priority bug.
* Minor sequence adjustment for function debug_func_exit().

Changes from v6:
* According to Suzuki and Mathieu suggestions, refined debug module
  driver to install panic notifier when insmod module; refined function
  debug_force_cpu_powered_up() for CPU power state checking; some minor
  fixing for output log, adding comments for memory barrier, code
  alignment.

Changes from v5:
* According to Suzuki and Mathieu suggestions, refined debug module
  driver to drop unused structure members, refactored initialization
  code to distinguish hardware implementation features, refactored
  flow for forcing CPU powered up, supported pm_runtime operations.
* Added one new doc file: Documentation/trace/coresight-cpu-debug.txt,
  which is used to describe detailed info for implementation, clock
  and power domain impaction on debug module, and exmaples for common
  usage.
* Removed "idle constraints" from debug driver.

Changes from v4:
* This version is mainly credit to ARM colleagues many contribution
  ideas for better quality (Thanks a lot Suzuki, Mike and Sudeep!).
* According to Suzuki suggestion, refined debug module driver to avoid
  memory leak for drvdata struct, handle PCSAMPLE_MODE=1, use flag
  drvdata.pc_has_offset to indicate if PCSR has offset, minor fixes.
* According to Mathieu suggestion, refined dt binding description.
* Changed driver to support module mode;
* According to Mike suggestion and very appreciate the pseudo code,
  added support to force CPU powered up with register EDPRCR;
* According to discussions, added command line and debugfs nodes to
  support enabling debugging for boot time, or later can dynamically
  enable/disable debugging by debugfs.
* According to Rob Herring suggestion, one minor fixes in DT binding.
* According to Stephen Boyd suggestion, add const quality to structure
  device_node. And used use of_cpu_device_node_get() to replace
  of_get_cpu_node() in patch 0003.

Changes from v3:
* Added Suzuki K Poulose's patch to fix issue for the func
  of_get_coresight_platform_data() doesn't properly drop the reference
  to the CPU node pointer.
* According to Suzuki suggestion, added code to handl the corner case
  for ARMv8 CPU with aarch32 mode.
* According to Suzuki suggestion, changed compatible string to
  "arm,coresight-cpu-debug".
* According to Mathieu suggestion, added "power-domains" as optional
  properties.

Changes from v2:
* According to Mathieu Poirier suggestion, applied some minor fixes.
* Added two extra patches for enabling debug module on Hikey.

Changes from v1:
* According to Mike Leach suggest

Re: [PATCH v7 5/7] coresight: add support for CPU debug module

[Leo Yan]

On Tue, May 02, 2017 at 04:30:03PM +0800, Leo Yan wrote:

[...]

> +static void debug_force_cpu_powered_up(struct debug_drvdata *drvdata)
> +{
> + u32 edprcr;
> +
> +try_again:
> +
> + /*
> +  * Send request to power management controller and assert
> +  * DBGPWRUPREQ signal; if power management controller has
> +  * sane implementation, it should enable CPU power domain
> +  * in case CPU is in low power state.
> +  */
> + edprcr = readl_relaxed(drvdata->base + EDPRCR);
> + edprcr |= EDPRCR_COREPURQ;
> + writel_relaxed(edprcr, drvdata->base + EDPRCR);
> +
> + /* Wait for CPU to be powered up (timeout~=32ms) */
> + if (readx_poll_timeout_atomic(readl_relaxed, drvdata->base + EDPRSR,
> + drvdata->edprsr, (drvdata->edprsr & EDPRSR_PU),
> + DEBUG_WAIT_SLEEP, DEBUG_WAIT_TIMEOUT)) {
> + /*
> +  * Unfortunately the CPU cannot be powered up, so return
> +  * back and later has no permission to access other
> +  * registers. For this case, should disable CPU low power
> +  * states to ensure CPU power domain is enabled!
> +  */
> + pr_err("%s: power up request for CPU%d failed\n",
> + __func__, drvdata->cpu);
> + return;
> + }
> +
> + /*
> +  * At this point the CPU is powered up, so set the no powerdown
> +  * request bit so we don't lose power and emulate power down.
> +  */
> + edprcr = readl_relaxed(drvdata->base + EDPRCR);
> + edprcr |= EDPRCR_COREPURQ | EDPRCR_CORENPDRQ;
> + writel_relaxed(edprcr, drvdata->base + EDPRCR);
> +
> + drvdata->edprsr = readl_relaxed(drvdata->base + EDPRSR);
> +
> + /* The core power domain got switched off on use, try again */
> + if (unlikely(!drvdata->edprsr & EDPRSR_PU))

Here have error introduced by operator priority. Should change to

if (unlikely(!(drvdata->edprsr & EDPRSR_PU)))

Will send new version soon for this fixing.

> + goto try_again;
> +}

[...]

Thanks,
Leo Yan
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[PATCH v7 3/7] coresight: of_get_coresight_platform_data: Add missing of_node_put

[Leo Yan]

From: Suzuki K Poulose 

The of_get_coresight_platform_data iterates over the possible CPU nodes
to find a given cpu phandle. However it does not drop the reference
to the node pointer returned by the of_get_coresight_platform_data.

This patch also introduces another minor fix is to use
of_cpu_device_node_get() to replace of_get_cpu_node().

Cc: Mathieu Poirier 
Reviewed-by: Suzuki K Poulose 
Signed-off-by: Suzuki K Poulose 
[Leo: minor tweaks for of_get_coresight_platform_data]
Signed-off-by: Leo Yan 
---
 drivers/hwtracing/coresight/of_coresight.c | 17 ++---
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/hwtracing/coresight/of_coresight.c 
b/drivers/hwtracing/coresight/of_coresight.c
index 859ad49..de7e8ce 100644
--- a/drivers/hwtracing/coresight/of_coresight.c
+++ b/drivers/hwtracing/coresight/of_coresight.c
@@ -108,7 +108,8 @@ struct coresight_platform_data 
*of_get_coresight_platform_data(
struct coresight_platform_data *pdata;
struct of_endpoint endpoint, rendpoint;
struct device *rdev;
-   struct device_node *dn;
+   bool found;
+   struct device_node *dn, *np;
struct device_node *ep = NULL;
struct device_node *rparent = NULL;
struct device_node *rport = NULL;
@@ -175,17 +176,19 @@ struct coresight_platform_data 
*of_get_coresight_platform_data(
} while (ep);
}
 
-   /* Affinity defaults to CPU0 */
-   pdata->cpu = 0;
dn = of_parse_phandle(node, "cpu", 0);
-   for (cpu = 0; dn && cpu < nr_cpu_ids; cpu++) {
-   if (dn == of_get_cpu_node(cpu, NULL)) {
-   pdata->cpu = cpu;
+   for_each_possible_cpu(cpu) {
+   np = of_cpu_device_node_get(cpu);
+   found = (dn == np);
+   of_node_put(np);
+   if (found)
break;
-   }
}
of_node_put(dn);
 
+   /* Affinity to CPU0 if no cpu nodes are found */
+   pdata->cpu = found ? cpu : 0;
+
return pdata;
 }
 EXPORT_SYMBOL_GPL(of_get_coresight_platform_data);
-- 
2.7.4

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[PATCH v7 4/7] coresight: refactor with function of_coresight_get_cpu

[Leo Yan]

This is refactor to add function of_coresight_get_cpu(), so it's used to
retrieve CPU id for coresight component. Finally can use it as a common
function for multiple places.

Suggested-by: Mathieu Poirier 
Reviewed-by: Suzuki K Poulose 
Signed-off-by: Leo Yan 
---
 drivers/hwtracing/coresight/of_coresight.c | 43 +++---
 include/linux/coresight.h  |  2 ++
 2 files changed, 30 insertions(+), 15 deletions(-)

diff --git a/drivers/hwtracing/coresight/of_coresight.c 
b/drivers/hwtracing/coresight/of_coresight.c
index de7e8ce..46eec0f 100644
--- a/drivers/hwtracing/coresight/of_coresight.c
+++ b/drivers/hwtracing/coresight/of_coresight.c
@@ -101,15 +101,39 @@ static int of_coresight_alloc_memory(struct device *dev,
return 0;
 }
 
+int of_coresight_get_cpu(const struct device_node *node)
+{
+   int cpu;
+   bool found;
+   struct device_node *dn, *np;
+
+   dn = of_parse_phandle(node, "cpu", 0);
+
+   /* Affinity defaults to CPU0 */
+   if (!dn)
+   return 0;
+
+   for_each_possible_cpu(cpu) {
+   np = of_cpu_device_node_get(cpu);
+   found = (dn == np);
+   of_node_put(np);
+   if (found)
+   break;
+   }
+   of_node_put(dn);
+
+   /* Affinity to CPU0 if no cpu nodes are found */
+   return found ? cpu : 0;
+}
+EXPORT_SYMBOL_GPL(of_coresight_get_cpu);
+
 struct coresight_platform_data *of_get_coresight_platform_data(
struct device *dev, const struct device_node *node)
 {
-   int i = 0, ret = 0, cpu;
+   int i = 0, ret = 0;
struct coresight_platform_data *pdata;
struct of_endpoint endpoint, rendpoint;
struct device *rdev;
-   bool found;
-   struct device_node *dn, *np;
struct device_node *ep = NULL;
struct device_node *rparent = NULL;
struct device_node *rport = NULL;
@@ -176,18 +200,7 @@ struct coresight_platform_data 
*of_get_coresight_platform_data(
} while (ep);
}
 
-   dn = of_parse_phandle(node, "cpu", 0);
-   for_each_possible_cpu(cpu) {
-   np = of_cpu_device_node_get(cpu);
-   found = (dn == np);
-   of_node_put(np);
-   if (found)
-   break;
-   }
-   of_node_put(dn);
-
-   /* Affinity to CPU0 if no cpu nodes are found */
-   pdata->cpu = found ? cpu : 0;
+   pdata->cpu = of_coresight_get_cpu(node);
 
return pdata;
 }
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 769f2c8..4915254 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -263,9 +263,11 @@ static inline int coresight_timeout(void __iomem *addr, 
u32 offset,
 #endif
 
 #ifdef CONFIG_OF
+extern int of_coresight_get_cpu(const struct device_node *node);
 extern struct coresight_platform_data *of_get_coresight_platform_data(
struct device *dev, const struct device_node *node);
 #else
+static inline int of_coresight_get_cpu(const struct device_node *node) { 
return 0; }
 static inline struct coresight_platform_data *of_get_coresight_platform_data(
struct device *dev, const struct device_node *node) { return NULL; }
 #endif
-- 
2.7.4

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[PATCH v7 5/7] coresight: add support for CPU debug module

[Leo Yan]

Coresight includes debug module and usually the module connects with CPU
debug logic. ARMv8 architecture reference manual (ARM DDI 0487A.k) has
description for related info in "Part H: External Debug".

Chapter H7 "The Sample-based Profiling Extension" introduces several
sampling registers, e.g. we can check program counter value with
combined CPU exception level, secure state, etc. So this is helpful for
analysis CPU lockup scenarios, e.g. if one CPU has run into infinite
loop with IRQ disabled. In this case the CPU cannot switch context and
handle any interrupt (including IPIs), as the result it cannot handle
SMP call for stack dump.

This patch is to enable coresight debug module, so firstly this driver
is to bind apb clock for debug module and this is to ensure the debug
module can be accessed from program or external debugger. And the driver
uses sample-based registers for debug purpose, e.g. when system triggers
panic, the driver will dump program counter and combined context
registers (EDCIDSR, EDVIDSR); by parsing context registers so can
quickly get to know CPU secure state, exception level, etc.

Some of the debug module registers are located in CPU power domain, so
this requires the CPU power domain stays on when access related debug
registers, but the power management for CPU power domain is quite
dependent on SoC integration for power management. For the platforms
which with sane power controller implementations, this driver follows
the method to set EDPRCR to try to pull the CPU out of low power state
and then set 'no power down request' bit so the CPU has no chance to
lose power.

If the SoC has not followed up this design well for power management
controller, the user should use the command line parameter or sysfs
to constrain all or partial idle states to ensure the CPU power
domain is enabled and access coresight CPU debug component safely.

Signed-off-by: Leo Yan 
---
 drivers/hwtracing/coresight/Kconfig   |  14 +
 drivers/hwtracing/coresight/Makefile  |   1 +
 drivers/hwtracing/coresight/coresight-cpu-debug.c | 671 ++
 3 files changed, 686 insertions(+)
 create mode 100644 drivers/hwtracing/coresight/coresight-cpu-debug.c

diff --git a/drivers/hwtracing/coresight/Kconfig 
b/drivers/hwtracing/coresight/Kconfig
index 130cb21..8d55d6d 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -89,4 +89,18 @@ config CORESIGHT_STM
  logging useful software events or data coming from various entities
  in the system, possibly running different OSs
 
+config CORESIGHT_CPU_DEBUG
+   tristate "CoreSight CPU Debug driver"
+   depends on ARM || ARM64
+   depends on DEBUG_FS
+   help
+ This driver provides support for coresight debugging module. This
+ is primarily used to dump sample-based profiling registers when
+ system triggers panic, the driver will parse context registers so
+ can quickly get to know program counter (PC), secure state,
+ exception level, etc. Before use debugging functionality, platform
+ needs to ensure the clock domain and power domain are enabled
+ properly, please refer Documentation/trace/coresight-cpu-debug.txt
+ for detailed description and the example for usage.
+
 endif
diff --git a/drivers/hwtracing/coresight/Makefile 
b/drivers/hwtracing/coresight/Makefile
index af480d9..433d590 100644
--- a/drivers/hwtracing/coresight/Makefile
+++ b/drivers/hwtracing/coresight/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o \
coresight-etm4x-sysfs.o
 obj-$(CONFIG_CORESIGHT_QCOM_REPLICATOR) += coresight-replicator-qcom.o
 obj-$(CONFIG_CORESIGHT_STM) += coresight-stm.o
+obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o
diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c 
b/drivers/hwtracing/coresight/coresight-cpu-debug.c
new file mode 100644
index 000..38e3794
--- /dev/null
+++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c
@@ -0,0 +1,671 @@
+/*
+ * Copyright (c) 2017 Linaro Limited. All rights reserved.
+ *
+ * Author: Leo Yan 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ *
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 

[PATCH v7 6/7] arm64: dts: hi6220: register debug module

[Leo Yan]

Bind debug module driver for Hi6220.

Signed-off-by: Leo Yan 
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 64 +++
 1 file changed, 64 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 470461d..467aa15 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -913,5 +913,69 @@
};
};
};
+
+   debug@f659 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf659 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu0>;
+   };
+
+   debug@f6592000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf6592000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu1>;
+   };
+
+   debug@f6594000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf6594000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu2>;
+   };
+
+   debug@f6596000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf6596000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu3>;
+   };
+
+   debug@f65d {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf65d 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu4>;
+   };
+
+   debug@f65d2000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf65d2000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu5>;
+   };
+
+   debug@f65d4000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf65d4000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu6>;
+   };
+
+   debug@f65d6000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf65d6000 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu7>;
+   };
};
 };
-- 
2.7.4

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[PATCH v7 7/7] arm64: dts: qcom: msm8916: Add debug unit

[Leo Yan]

Add debug unit on Qualcomm msm8916 based platforms, including the
DragonBoard 410c board.

Signed-off-by: Leo Yan 
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 68a8e67..3af814b 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1104,6 +1104,38 @@
};
};
 
+   debug@85 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0x85 0x1000>;
+   clocks = <&rpmcc RPM_QDSS_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&CPU0>;
+   };
+
+   debug@852000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0x852000 0x1000>;
+   clocks = <&rpmcc RPM_QDSS_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&CPU1>;
+   };
+
+   debug@854000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0x854000 0x1000>;
+   clocks = <&rpmcc RPM_QDSS_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&CPU2>;
+   };
+
+   debug@856000 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0x856000 0x1000>;
+   clocks = <&rpmcc RPM_QDSS_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&CPU3>;
+   };
+
etm@85c000 {
compatible = "arm,coresight-etm4x", "arm,primecell";
reg = <0x85c000 0x1000>;
-- 
2.7.4

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[PATCH v7 2/7] doc: Add documentation for Coresight CPU debug

[Leo Yan]

Update kernel-parameters.txt to add new parameter:
coresight_cpu_debug.enable is a knob to enable debugging at boot time.

Add detailed documentation, which contains the implementation, Mike
Leach excellent summary for "clock and power domain". At the end some
examples on how to enable the debugging functionality are provided.

Suggested-by: Mike Leach 
Signed-off-by: Leo Yan 
---
 Documentation/admin-guide/kernel-parameters.txt |   7 +
 Documentation/trace/coresight-cpu-debug.txt | 174 
 2 files changed, 181 insertions(+)
 create mode 100644 Documentation/trace/coresight-cpu-debug.txt

diff --git a/Documentation/admin-guide/kernel-parameters.txt 
b/Documentation/admin-guide/kernel-parameters.txt
index facc20a..cf90146 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -650,6 +650,13 @@
/proc//coredump_filter.
See also Documentation/filesystems/proc.txt.
 
+   coresight_cpu_debug.enable
+   [ARM,ARM64]
+   Format: 
+   Enable/disable the CPU sampling based debugging.
+   0: default value, disable debugging
+   1: enable debugging at boot time
+
cpuidle.off=1   [CPU_IDLE]
disable the cpuidle sub-system
 
diff --git a/Documentation/trace/coresight-cpu-debug.txt 
b/Documentation/trace/coresight-cpu-debug.txt
new file mode 100644
index 000..fd3f07d
--- /dev/null
+++ b/Documentation/trace/coresight-cpu-debug.txt
@@ -0,0 +1,174 @@
+   Coresight CPU Debug Module
+   ==
+
+   Author:   Leo Yan 
+   Date: April 5th, 2017
+
+Introduction
+
+
+Coresight CPU debug module is defined in ARMv8-a architecture reference manual
+(ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate
+debug module and it is mainly used for two modes: self-hosted debug and
+external debug. Usually the external debug mode is well known as the external
+debugger connects with SoC from JTAG port; on the other hand the program can
+explore debugging method which rely on self-hosted debug mode, this document
+is to focus on this part.
+
+The debug module provides sample-based profiling extension, which can be used
+to sample CPU program counter, secure state and exception level, etc; usually
+every CPU has one dedicated debug module to be connected. Based on self-hosted
+debug mechanism, Linux kernel can access these related registers from mmio
+region when the kernel panic happens. The callback notifier for kernel panic
+will dump related registers for every CPU; finally this is good for assistant
+analysis for panic.
+
+
+Implementation
+--
+
+- During driver registration, use EDDEVID and EDDEVID1 two device ID
+  registers to decide if sample-based profiling is implemented or not. On some
+  platforms this hardware feature is fully or partialy implemented; and if
+  this feature is not supported then registration will fail.
+
+- When write this doc, the debug driver mainly relies on three sampling
+  registers. The kernel panic callback notifier gathers info from EDPCSR
+  EDVIDSR and EDCIDSR; from EDPCSR we can get program counter, EDVIDSR has
+  information for secure state, exception level, bit width, etc; EDCIDSR is
+  context ID value which contains the sampled value of CONTEXTIDR_EL1.
+
+- The driver supports CPU running mode with either AArch64 or AArch32. The
+  registers naming convention is a bit different between them, AArch64 uses
+  'ED' for register prefix (ARM DDI 0487A.k, chapter H9.1) and AArch32 uses
+  'DBG' as prefix (ARM DDI 0487A.k, chapter G5.1). The driver is unified to
+  use AArch64 naming convention.
+
+- ARMv8-a (ARM DDI 0487A.k) and ARMv7-a (ARM DDI 0406C.b) have different
+  register bits definition. So the driver consolidates two difference:
+
+  If PCSROffset=0b, on ARMv8-a the feature of EDPCSR is not implemented;
+  but ARMv7-a defines "PCSR samples are offset by a value that depends on the
+  instruction set state". For ARMv7-a, the driver checks furthermore if CPU
+  runs with ARM or thumb instruction set and calibrate PCSR value, the
+  detailed description for offset is in ARMv7-a ARM (ARM DDI 0406C.b) chapter
+  C11.11.34 "DBGPCSR, Program Counter Sampling Register".
+
+  If PCSROffset=0b0010, ARMv8-a defines "EDPCSR implemented, and samples have
+  no offset applied and do not sample the instruction set state in AArch32
+  state". So on ARMv8 if EDDEVID1.PCSROffset is 0b0010 and the CPU operates
+  in AArch32 state, EDPCSR is not sampled; when the CPU operates in AArch64
+  state EDPCSR is sampled and no offset are applied.
+
+
+Clock and power domain
+--
+
+Before accessing debug registers, we should ensure the clock and power domain
+have been enabled properly. In ARMv8-a ARM (ARM DDI 0487A.k) chapter 'H9.1
+

[PATCH v7 1/7] coresight: bindings for CPU debug module

[Leo Yan]

According to ARMv8 architecture reference manual (ARM DDI 0487A.k)
Chapter 'Part H: External debug', the CPU can integrate debug module
and it can support self-hosted debug and external debug. Especially
for supporting self-hosted debug, this means the program can access
the debug module from mmio region; and usually the mmio region is
integrated with coresight.

So add document for binding debug component, includes binding to APB
clock; and also need specify the CPU node which the debug module is
dedicated to specific CPU.

Suggested-by: Mike Leach 
Reviewed-by: Mathieu Poirier 
Reviewed-by: Suzuki K Poulose 
Acked-by: Rob Herring 
Signed-off-by: Leo Yan 
---
 .../bindings/arm/coresight-cpu-debug.txt   | 49 ++
 1 file changed, 49 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt

diff --git a/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt 
b/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
new file mode 100644
index 000..2982912
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt
@@ -0,0 +1,49 @@
+* CoreSight CPU Debug Component:
+
+CoreSight CPU debug component are compliant with the ARMv8 architecture
+reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The
+external debug module is mainly used for two modes: self-hosted debug and
+external debug, and it can be accessed from mmio region from Coresight
+and eventually the debug module connects with CPU for debugging. And the
+debug module provides sample-based profiling extension, which can be used
+to sample CPU program counter, secure state and exception level, etc;
+usually every CPU has one dedicated debug module to be connected.
+
+Required properties:
+
+- compatible : should be "arm,coresight-cpu-debug"; supplemented with
+   "arm,primecell" since this driver is using the AMBA bus
+  interface.
+
+- reg : physical base address and length of the register set.
+
+- clocks : the clock associated to this component.
+
+- clock-names : the name of the clock referenced by the code. Since we are
+using the AMBA framework, the name of the clock providing
+   the interconnect should be "apb_pclk" and the clock is
+   mandatory. The interface between the debug logic and the
+   processor core is clocked by the internal CPU clock, so it
+   is enabled with CPU clock by default.
+
+- cpu : the CPU phandle the debug module is affined to. When omitted
+   the module is considered to belong to CPU0.
+
+Optional properties:
+
+- power-domains: a phandle to the debug power domain. We use "power-domains"
+ binding to turn on the debug logic if it has own dedicated
+power domain and if necessary to use "cpuidle.off=1" or
+"nohlt" in the kernel command line or sysfs node to
+constrain idle states to ensure registers in the CPU power
+domain are accessible.
+
+Example:
+
+   debug@f659 {
+   compatible = "arm,coresight-cpu-debug","arm,primecell";
+   reg = <0 0xf659 0 0x1000>;
+   clocks = <&sys_ctrl HI6220_DAPB_CLK>;
+   clock-names = "apb_pclk";
+   cpu = <&cpu0>;
+   };
-- 
2.7.4

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[PATCH v7 0/7] coresight: enable debug module

[Leo Yan]

ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter H7 "The
Sample-based Profiling Extension" has description for sampling
registers, we can utilize these registers to check program counter
value with combined CPU exception level, secure state, etc. So this is
helpful for CPU lockup bugs, e.g. if one CPU has run into infinite loop
with IRQ disabled; the 'hang' CPU cannot switch context and handle any
interrupt, so it cannot handle SMP call for stack dump, etc.

This patch series is to enable coresight debug module with sample-based
registers and register call back notifier for PCSR register dumping
when panic happens, so we can see below dumping info for panic; and
this patch series has considered the conditions for access permission
for debug registers self, so this can avoid access debug registers when
CPU power domain is off; the driver also try to figure out the CPU is
in secure or non-secure state.

Patch 0001 is to document the dt binding; patch 0002 is to document
boot parameters used in kernel command line and add one detailed
document to describe the Coresight debug module implementation, the
clock and power domain impaction on the driver, some examples for
usage.

Patch 0003 is used to fix the func of_get_coresight_platform_data()
doesn't properly drop the reference to the CPU node pointer; and
patch 0004 is refactor to add new function of_coresight_get_cpu().

Patch 0005 is the driver for CPU debug module.

Patch 0006 in this series are to enable debug unit on 96boards Hikey,
Patch 0007 is to enable debug on 96boards DB410c. Have verified on both
two boards.

We can enable debugging with two methods, adding parameters into kernel
command line for build-in module:
  coresight_cpu_debug.enable=1

Or we can wait the system has booted up to use debugfs nodes to enable
debugging:
  # echo 1 > /sys/kernel/debug/coresight_cpu_debug/enable

As result we can get below log after input command:
echo c > /proc/sysrq-trigger:

ARM external debug module:
CPU[0]:
 EDPRSR:  000b (Power:On DLK:Unlock)
 EDPCSR:  [] handle_IPI+0xe4/0x150
 EDCIDSR: 
 EDVIDSR: 9000 (State:Non-secure Mode:EL1/0 Width:64bits VMID:0)
CPU[1]:
 EDPRSR:  000b (Power:On DLK:Unlock)
 EDPCSR:  [] debug_notifier_call+0x108/0x288
 EDCIDSR: 
 EDVIDSR: 9000 (State:Non-secure Mode:EL1/0 Width:64bits VMID:0)

[...]

Changes from v6:
* According to Suzuki and Mathieu suggestions, refined debug module
  driver to install panic notifier when insmod module; refined function
  debug_force_cpu_powered_up() for CPU power state checking; some minor
  fixing for output log, adding comments for memory barrier, code
  alignment.

Changes from v5:
* According to Suzuki and Mathieu suggestions, refined debug module
  driver to drop unused structure members, refactored initialization
  code to distinguish hardware implementation features, refactored
  flow for forcing CPU powered up, supported pm_runtime operations.
* Added one new doc file: Documentation/trace/coresight-cpu-debug.txt,
  which is used to describe detailed info for implementation, clock
  and power domain impaction on debug module, and exmaples for common
  usage.
* Removed "idle constraints" from debug driver.

Changes from v4:
* This version is mainly credit to ARM colleagues many contribution
  ideas for better quality (Thanks a lot Suzuki, Mike and Sudeep!).
* According to Suzuki suggestion, refined debug module driver to avoid
  memory leak for drvdata struct, handle PCSAMPLE_MODE=1, use flag
  drvdata.pc_has_offset to indicate if PCSR has offset, minor fixes.
* According to Mathieu suggestion, refined dt binding description.
* Changed driver to support module mode;
* According to Mike suggestion and very appreciate the pseudo code,
  added support to force CPU powered up with register EDPRCR;
* According to discussions, added command line and debugfs nodes to
  support enabling debugging for boot time, or later can dynamically
  enable/disable debugging by debugfs.
* According to Rob Herring suggestion, one minor fixes in DT binding.
* According to Stephen Boyd suggestion, add const quality to structure
  device_node. And used use of_cpu_device_node_get() to replace
  of_get_cpu_node() in patch 0003.

Changes from v3:
* Added Suzuki K Poulose's patch to fix issue for the func
  of_get_coresight_platform_data() doesn't properly drop the reference
  to the CPU node pointer.
* According to Suzuki suggestion, added code to handl the corner case
  for ARMv8 CPU with aarch32 mode.
* According to Suzuki suggestion, changed compatible string to
  "arm,coresight-cpu-debug".
* According to Mathieu suggestion, added "power-domains" as optional
  properties.

Changes from v2:
* According to Mathieu Poirier suggestion, applied some minor fixes.
* Added two extra patches for enabling debug module on Hikey.

Changes from v1:
* According to Mike Leach suggestion, removed the binding for debug
  module clocks which have been directly provided by CPU clocks.
* Accor