Re: [PATCH 06/10] misc: pci_endpoint_test: Add MSI-X support

2018-04-30 Thread Gustavo Pimentel 
Hi Alan,

On 30/04/2018 16:35, Alan Douglas wrote:
> Hi Gustavo,
> 
> On April 27, 2018, 4:57 p.m. Gustavo Pimentel wrote:
>> Add MSI-X support and update driver documentation accordingly.
>>
>> Add new driver parameter to allow interruption type selection.
>>
>> Modify the Legacy/MSI/MSI-X test process, by:
>>  - Add and use a specific register located in a BAR, which defines the 
>> interrupt
>> type is been triggered.
>>  - Move the interrupt ID number from the command section to a register
>> located in a BAR.
>>
>> Signed-off-by: Gustavo Pimentel 
>> ---
>>  Documentation/misc-devices/pci-endpoint-test.txt |   3 +
>>  drivers/misc/pci_endpoint_test.c | 121 
>> +++
>>  drivers/pci/endpoint/functions/pci-epf-test.c|  78 +++
>>  3 files changed, 143 insertions(+), 59 deletions(-)
>>
> In testing these changes  I found that pci_epc_raise_irq() also needs to be
> updated in pci-epc-core.c, since it has interrupt_num parameter as u8

Yes, indeed. I updated it together with the pci-epc.h file.
Thanks Alan, well spotted!

Regards,
Gustavo

> 
> Thanks,
> Alan
> 


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RE: [PATCH 06/10] misc: pci_endpoint_test: Add MSI-X support

2018-04-30 Thread Alan Douglas 
Hi Gustavo,

On April 27, 2018, 4:57 p.m. Gustavo Pimentel wrote:
> Add MSI-X support and update driver documentation accordingly.
> 
> Add new driver parameter to allow interruption type selection.
> 
> Modify the Legacy/MSI/MSI-X test process, by:
>  - Add and use a specific register located in a BAR, which defines the 
> interrupt
> type is been triggered.
>  - Move the interrupt ID number from the command section to a register
> located in a BAR.
> 
> Signed-off-by: Gustavo Pimentel 
> ---
>  Documentation/misc-devices/pci-endpoint-test.txt |   3 +
>  drivers/misc/pci_endpoint_test.c | 121 
> +++
>  drivers/pci/endpoint/functions/pci-epf-test.c|  78 +++
>  3 files changed, 143 insertions(+), 59 deletions(-)
> 
In testing these changes  I found that pci_epc_raise_irq() also needs to be
updated in pci-epc-core.c, since it has interrupt_num parameter as u8

Thanks,
Alan
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[PATCH 06/10] misc: pci_endpoint_test: Add MSI-X support

2018-04-27 Thread Gustavo Pimentel 
Add MSI-X support and update driver documentation accordingly.

Add new driver parameter to allow interruption type selection.

Modify the Legacy/MSI/MSI-X test process, by:
 - Add and use a specific register located in a BAR, which defines
the interrupt type is been triggered.
 - Move the interrupt ID number from the command section to a
register located in a BAR.

Signed-off-by: Gustavo Pimentel 
---
 Documentation/misc-devices/pci-endpoint-test.txt |   3 +
 drivers/misc/pci_endpoint_test.c | 121 +++
 drivers/pci/endpoint/functions/pci-epf-test.c|  78 +++
 3 files changed, 143 insertions(+), 59 deletions(-)

diff --git a/Documentation/misc-devices/pci-endpoint-test.txt 
b/Documentation/misc-devices/pci-endpoint-test.txt
index 4ebc359..fdfa0f6 100644
--- a/Documentation/misc-devices/pci-endpoint-test.txt
+++ b/Documentation/misc-devices/pci-endpoint-test.txt
@@ -10,6 +10,7 @@ The PCI driver for the test device performs the following 
tests
*) verifying addresses programmed in BAR
*) raise legacy IRQ
*) raise MSI IRQ
+   *) raise MSI-X IRQ
*) read data
*) write data
*) copy data
@@ -25,6 +26,8 @@ ioctl
  PCITEST_LEGACY_IRQ: Tests legacy IRQ
  PCITEST_MSI: Tests message signalled interrupts. The MSI number
  to be tested should be passed as argument.
+ PCITEST_MSIX: Tests message signalled interrupts. The MSI-X number
+ to be tested should be passed as argument.
  PCITEST_WRITE: Perform write tests. The size of the buffer should be passed
as argument.
  PCITEST_READ: Perform read tests. The size of the buffer should be passed
diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
index 58a88ba..b003079 100644
--- a/drivers/misc/pci_endpoint_test.c
+++ b/drivers/misc/pci_endpoint_test.c
@@ -35,38 +35,44 @@
 
 #include 
 
-#define DRV_MODULE_NAME"pci-endpoint-test"
-
-#define PCI_ENDPOINT_TEST_MAGIC0x0
-
-#define PCI_ENDPOINT_TEST_COMMAND  0x4
-#define COMMAND_RAISE_LEGACY_IRQ   BIT(0)
-#define COMMAND_RAISE_MSI_IRQ  BIT(1)
-#define MSI_NUMBER_SHIFT   2
-/* 6 bits for MSI number */
-#define COMMAND_READBIT(8)
-#define COMMAND_WRITE   BIT(9)
-#define COMMAND_COPYBIT(10)
-
-#define PCI_ENDPOINT_TEST_STATUS   0x8
-#define STATUS_READ_SUCCESS BIT(0)
-#define STATUS_READ_FAILBIT(1)
-#define STATUS_WRITE_SUCCESSBIT(2)
-#define STATUS_WRITE_FAIL   BIT(3)
-#define STATUS_COPY_SUCCESS BIT(4)
-#define STATUS_COPY_FAILBIT(5)
-#define STATUS_IRQ_RAISED   BIT(6)
-#define STATUS_SRC_ADDR_INVALID BIT(7)
-#define STATUS_DST_ADDR_INVALID BIT(8)
-
-#define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR   0xc
+#define DRV_MODULE_NAME"pci-endpoint-test"
+
+#define IRQ_TYPE_LEGACY0
+#define IRQ_TYPE_MSI   1
+#define IRQ_TYPE_MSIX  2
+
+#define PCI_ENDPOINT_TEST_MAGIC0x0
+
+#define PCI_ENDPOINT_TEST_COMMAND  0x4
+#define COMMAND_RAISE_LEGACY_IRQ   BIT(0)
+#define COMMAND_RAISE_MSI_IRQ  BIT(1)
+#define COMMAND_RAISE_MSIX_IRQ BIT(2)
+#define COMMAND_READ   BIT(3)
+#define COMMAND_WRITE  BIT(4)
+#define COMMAND_COPY   BIT(5)
+
+#define PCI_ENDPOINT_TEST_STATUS   0x8
+#define STATUS_READ_SUCCESSBIT(0)
+#define STATUS_READ_FAIL   BIT(1)
+#define STATUS_WRITE_SUCCESS   BIT(2)
+#define STATUS_WRITE_FAIL  BIT(3)
+#define STATUS_COPY_SUCCESSBIT(4)
+#define STATUS_COPY_FAIL   BIT(5)
+#define STATUS_IRQ_RAISED  BIT(6)
+#define STATUS_SRC_ADDR_INVALIDBIT(7)
+#define STATUS_DST_ADDR_INVALIDBIT(8)
+
+#define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR   0x0c
 #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR   0x10
 
 #define PCI_ENDPOINT_TEST_LOWER_DST_ADDR   0x14
 #define PCI_ENDPOINT_TEST_UPPER_DST_ADDR   0x18
 
-#define PCI_ENDPOINT_TEST_SIZE 0x1c
-#define PCI_ENDPOINT_TEST_CHECKSUM 0x20
+#define PCI_ENDPOINT_TEST_SIZE 0x1c
+#define PCI_ENDPOINT_TEST_CHECKSUM 0x20
+
+#define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24
+#define PCI_ENDPOINT_TEST_IRQ_NUMBER   0x28
 
 static DEFINE_IDA(pci_endpoint_test_ida);
 
@@ -77,6 +83,10 @@ static bool no_msi;
 module_param(no_msi, bool, 0444);
 MODULE_PARM_DESC(no_msi, "Disable MSI interrupt in pci_endpoint_test");
 
+static int irq_type = IRQ_TYPE_MSI;
+module_param(irq_type, int, 0444);