Re: [GIT PULL] PCI: Support for configurable PCI endpoint

2017-04-11 Thread Kishon Vijay Abraham I 
Hi Bjorn,

On Wednesday 12 April 2017 01:04 AM, Bjorn Helgaas wrote:
> On Mon, Apr 10, 2017 at 10:43:28AM -0500, Bjorn Helgaas wrote:
>> On Wed, Apr 05, 2017 at 02:22:20PM +0530, Kishon Vijay Abraham I wrote:
>>> Hi Bjorn,
>>>
>>> Please find the pull request for PCI endpoint support below. I've
>>> also included all the history here.
>>
>> Thanks, I applied these (with v7 of the first patch) to pci/host-designware
>> for v4.12.
> 
> Ok, sorry, I screwed this up.  I think my branch actually had v5, not
> v6.  But I *think* I fixed it.  Here's the diff from my branch to your
> git tree.  Apparently you haven't pushed the v7 patch there, so I
> *think* the diff below is the diff between v6 and v7 of that first
> patch.

I just checked your pci/host-designware branch and it looks correct. Thanks for
sorting this out.

Cheers
Kishon

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Re: [GIT PULL] PCI: Support for configurable PCI endpoint

2017-04-11 Thread Bjorn Helgaas 
On Mon, Apr 10, 2017 at 10:43:28AM -0500, Bjorn Helgaas wrote:
> On Wed, Apr 05, 2017 at 02:22:20PM +0530, Kishon Vijay Abraham I wrote:
> > Hi Bjorn,
> > 
> > Please find the pull request for PCI endpoint support below. I've
> > also included all the history here.
> 
> Thanks, I applied these (with v7 of the first patch) to pci/host-designware
> for v4.12.

Ok, sorry, I screwed this up.  I think my branch actually had v5, not
v6.  But I *think* I fixed it.  Here's the diff from my branch to your
git tree.  Apparently you haven't pushed the v7 patch there, so I
*think* the diff below is the diff between v6 and v7 of that first
patch.

$ git diff pci/host-designware a5c85ba45c96
diff --git a/drivers/pci/endpoint/pci-epc-core.c 
b/drivers/pci/endpoint/pci-epc-core.c
index caa7be10e473..9ae9e59b2a74 100644
--- a/drivers/pci/endpoint/pci-epc-core.c
+++ b/drivers/pci/endpoint/pci-epc-core.c
@@ -83,7 +83,6 @@ struct pci_epc *pci_epc_get(const char *epc_name)
goto err;
}
 
-   class_dev_iter_exit();
get_device(>dev);
return epc;
}
diff --git a/drivers/pci/endpoint/pci-epf-core.c 
b/drivers/pci/endpoint/pci-epf-core.c
index 6877d6a5bcc9..92db7dcd911c 100644
--- a/drivers/pci/endpoint/pci-epf-core.c
+++ b/drivers/pci/endpoint/pci-epf-core.c
@@ -40,10 +40,8 @@ static struct device_type pci_epf_type;
  */
 void pci_epf_linkup(struct pci_epf *epf)
 {
-   if (!epf->driver) {
+   if (!epf->driver)
dev_WARN(>dev, "epf device not bound to driver\n");
-   return;
-   }
 
epf->driver->ops->linkup(epf);
 }
@@ -59,10 +57,8 @@ EXPORT_SYMBOL_GPL(pci_epf_linkup);
  */
 void pci_epf_unbind(struct pci_epf *epf)
 {
-   if (!epf->driver) {
+   if (!epf->driver)
dev_WARN(>dev, "epf device not bound to driver\n");
-   return;
-   }
 
epf->driver->ops->unbind(epf);
module_put(epf->driver->owner);
@@ -78,10 +74,8 @@ EXPORT_SYMBOL_GPL(pci_epf_unbind);
  */
 int pci_epf_bind(struct pci_epf *epf)
 {
-   if (!epf->driver) {
+   if (!epf->driver)
dev_WARN(>dev, "epf device not bound to driver\n");
-   return -EINVAL;
-   }
 
if (!try_module_get(epf->driver->owner))
return -EAGAIN;
@@ -233,7 +227,7 @@ struct pci_epf *pci_epf_create(const char *name)
epf->name = kstrdup(func_name, GFP_KERNEL);
if (!epf->name) {
ret = -ENOMEM;
-   goto free_func_name;
+   goto free_epf;
}
 
dev = >dev;
@@ -255,8 +249,6 @@ struct pci_epf *pci_epf_create(const char *name)
 put_dev:
put_device(dev);
kfree(epf->name);
-
-free_func_name:
kfree(func_name);
 
 free_epf:
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Re: [GIT PULL] PCI: Support for configurable PCI endpoint

2017-04-10 Thread Bjorn Helgaas 
On Wed, Apr 05, 2017 at 02:22:20PM +0530, Kishon Vijay Abraham I wrote:
> Hi Bjorn,
> 
> Please find the pull request for PCI endpoint support below. I've
> also included all the history here.

Thanks, I applied these (with v7 of the first patch) to pci/host-designware
for v4.12.

> Changes from v5:
> *) remove #syscon-cells property added in v5 and used 
>of_parse_phandle_with_fixed_args
> *) fix compilation error in make.cross ARCH=blackfin that was because
>pci_endpoint_test.c driver depends on COMPILE_TEST.
> 
> Changes from v4:
> *) add #syscon-cells property and used of_parse_phandle_with_args
>to perform a configuration in syscon module (as suggested by
>Rob Herring)
> *) Remove unnecessary white space.
> 
> Changes from v3:
> *) fixed a typo and adapted to https://lkml.org/lkml/2017/3/13/562.
> 
> Changes from v2:
> *) changed the configfs structure as suggested by Christoph Hellwig. With
>this change the framework creates configfs entry for EP function driver
>and EP controller. Previously these entries have to be created by the
>the user. (Haven't changed the epc core or epf core except for invoking
>configfs APIs to create entries for EP function driver and EP controller.
>That's mostly because the EP function device can still be created by
>directly invoking the epf core API without using configfs).
> *) Now the user has to use configfs entry 'start' to start the link.
>This was previously done by the function driver. However in the case of
>multi function EP, the function driver shouldn't start the link.
> 
> Changes from v1:
> *) The preparation patches for adding EP support is removed and is sent
>separately
> *) Added device ID for DRA74x/DRA72x and used it instead of
>using "PCI_ANY_ID"
> *) Added userguide for PCI endpoint test function
> 
> Major Improvements from RFC:
>  *) support multi-function devices (hw supported not virtual)
>  *) Access host side buffers
>  *) Raise MSI interrupts
>  *) Add user space program to use the host side PCI driver
>  *) Adapt all other users of designware to use the new design (only
> compile tested. Since I have only dra7xx boards, the new design
> has only been tested in dra7xx. I'd require the help of others
> to test the platforms they have access to).
> 
> This is based on
> git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
> pci/host-designware
> 
> Thanks
> Kishon
> 
> The following changes since commit 7ea64dcf602c21b3e5062ca90111ca4459fab403:
> 
>   __end__ (2017-04-04 15:29:37 -0500)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/kishon/pci-endpoint.git 
> tags/pci-endpoint-for-4.12
> 
> for you to fetch changes up to a5c85ba45c9682456077d7277196e91f8ea5fd5c:
> 
>   ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to 
> SW_WKUP (2017-04-05 14:05:28 +0530)
> 
> 
> pci: endpoint: for 4.12
> 
>  *) Add PCI endpoint core layer
>  *) Modify designware and dra7xx driver to be configured in EP mode
>  *) Add a PCI endpoint *test* function driver and corresponding host
> driver
> 
> Signed-off-by: Kishon Vijay Abraham I 
> 
> 
> Kishon Vijay Abraham I (23):
>   PCI: endpoint: Add EP core layer to enable EP controller and EP 
> functions
>   Documentation: PCI: Guide to use PCI Endpoint Core Layer
>   PCI: endpoint: Introduce configfs entry for configuring EP functions
>   Documentation: PCI: Guide to use PCI endpoint configfs
>   PCI: endpoint: Create configfs entry for EPC device and EPF driver
>   Documentation: PCI: Add specification for the *PCI test* function device
>   PCI: endpoint: functions: Add an EP function to test PCI
>   Documentation: PCI: Add binding documentation for pci-test endpoint 
> function
>   PCI: dwc: designware: Add EP mode support
>   dt-bindings: PCI: Add DT bindings for PCI designware EP mode
>   PCI: dwc: dra7xx: Facilitate wrapper and MSI interrupts to be enabled 
> independently
>   PCI: dwc: dra7xx: Add EP mode support
>   dt-bindings: PCI: dra7xx: Add DT bindings for PCI dra7xx EP mode
>   PCI: dwc: dra7xx: Workaround for errata id i870
>   dt-bindings: PCI: dra7xx: Add DT bindings to enable unaligned access
>   PCI: Add device IDs for DRA74x and DRA72x
>   misc: Add host side PCI driver for PCI test function device
>   Documentation: misc-devices: Add Documentation for pci-endpoint-test 
> driver
>   tools: PCI: Add a userspace tool to test PCI endpoint
>   tools: PCI: Add sample test script to invoke pcitest
>   Documentation: PCI: Add userguide for PCI endpoint test function
>   MAINTAINERS: Add PCI Endpoint maintainer
>   ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to 
> SW_WKUP
> 
>  Documentation/PCI/00-INDEX

Re: [GIT PULL] PCI: Support for configurable PCI endpoint

2017-04-05 Thread Kishon Vijay Abraham I 
Hi Bjorn,

On Wednesday 05 April 2017 02:06 AM, Bjorn Helgaas wrote:
> On Mon, Mar 27, 2017 at 03:14:56PM +0530, Kishon Vijay Abraham I wrote:
>> Hi Bjorn,
>>
>> Please find the pull request for PCI endpoint support below. I've
>> also included all the history here.
> 
> I tentatively applied this to pci/host-designware with the mostly trival
> textual changes below.  If you post the series again, please include them.

Sure, I've used pci/host-designware as the base for the next revision.
> 
> I saw some acks to prior revisions, but few of them were included in this
> series.   Can you collect them up?  If there are no other substantial
> changes, I can insert them into my branch manually.

Yeah, looks like I've missed including Joao Pinto's Acked-by in some of the
patches. I'll include them in the next revision.

Thanks
Kishon
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Re: [GIT PULL] PCI: Support for configurable PCI endpoint

2017-04-04 Thread Bjorn Helgaas 
On Mon, Mar 27, 2017 at 03:14:56PM +0530, Kishon Vijay Abraham I wrote:
> Hi Bjorn,
> 
> Please find the pull request for PCI endpoint support below. I've
> also included all the history here.

I tentatively applied this to pci/host-designware with the mostly trival
textual changes below.  If you post the series again, please include them.

I saw some acks to prior revisions, but few of them were included in this
series.   Can you collect them up?  If there are no other substantial
changes, I can insert them into my branch manually.

Bjorn



diff --git a/Documentation/PCI/00-INDEX b/Documentation/PCI/00-INDEX
index fd533c79fa19..00c9a90b6f38 100644
--- a/Documentation/PCI/00-INDEX
+++ b/Documentation/PCI/00-INDEX
@@ -15,10 +15,10 @@ pcieaer-howto.txt
 endpoint/pci-endpoint.txt
- guide to add endpoint controller driver and endpoint function driver.
 endpoint/pci-endpoint-cfs.txt
-   - guide to use configfs to configure the pci endpoint function.
+   - guide to use configfs to configure the PCI endpoint function.
 endpoint/pci-test-function.txt
-   - specification of *pci test* function device.
+   - specification of *PCI test* function device.
 endpoint/pci-test-howto.txt
- userguide for PCI endpoint test function.
 endpoint/function/binding/
-   - binding documentation for pci endpoint function
+   - binding documentation for PCI endpoint function
diff --git a/Documentation/PCI/endpoint/function/binding/pci-test.txt 
b/Documentation/PCI/endpoint/function/binding/pci-test.txt
index c44fc18d78cc..3b68b955fb50 100644
--- a/Documentation/PCI/endpoint/function/binding/pci-test.txt
+++ b/Documentation/PCI/endpoint/function/binding/pci-test.txt
@@ -13,5 +13,5 @@ cache_line_size: don't care
 subsys_vendor_id : don't care
 subsys_id   : don't care
 interrupt_pin   : Should be 1 - INTA, 2 - INTB, 3 - INTC, 4 -INTD
-msi_interrupts  : Should be 1 to 32 depending on the number of msi interrupts
+msi_interrupts  : Should be 1 to 32 depending on the number of MSI interrupts
   to test
diff --git a/Documentation/PCI/endpoint/pci-endpoint-cfs.txt 
b/Documentation/PCI/endpoint/pci-endpoint-cfs.txt
index 8b2a8280b131..d740f29960a4 100644
--- a/Documentation/PCI/endpoint/pci-endpoint-cfs.txt
+++ b/Documentation/PCI/endpoint/pci-endpoint-cfs.txt
@@ -1,10 +1,10 @@
CONFIGURING PCI ENDPOINT USING CONFIGFS
 Kishon Vijay Abraham I 
 
-The PCI Endpoint Core exposes configfs entry (pci_ep) in order to configure the
-PCI endpoint function and in order to bind the endpoint function
+The PCI Endpoint Core exposes configfs entry (pci_ep) to configure the
+PCI endpoint function and to bind the endpoint function
 with the endpoint controller. (For introducing other mechanisms to
-configure the PCI Endpoint Function refer [1]).
+configure the PCI Endpoint Function refer to [1]).
 
 *) Mounting configfs
 
diff --git a/Documentation/PCI/endpoint/pci-endpoint.txt 
b/Documentation/PCI/endpoint/pci-endpoint.txt
index 4a3e4388b37b..9b1d66829290 100644
--- a/Documentation/PCI/endpoint/pci-endpoint.txt
+++ b/Documentation/PCI/endpoint/pci-endpoint.txt
@@ -2,27 +2,27 @@
Kishon Vijay Abraham I 
 
 This document is a guide to use the PCI Endpoint Framework in order to create
-endpoint controller driver, endpoint function driver and using configfs
+endpoint controller driver, endpoint function driver, and using configfs
 interface to bind the function driver to the controller driver.
 
 1. Introduction
 
-*Linux* has a comprehensive PCI subsystem to support PCI controllers that
+Linux has a comprehensive PCI subsystem to support PCI controllers that
 operates in Root Complex mode. The subsystem has capability to scan PCI bus,
-assign memory resources and irq resources, load PCI driver (based on
-vendorid, deviceid), support other services like hot-plug, power management,
+assign memory resources and IRQ resources, load PCI driver (based on
+vendor ID, device ID), support other services like hot-plug, power management,
 advanced error reporting and virtual channels.
 
-However PCI controller IPs integrated in certain SoC is capable of operating
+However the PCI controller IP integrated in some SoCs is capable of operating
 either in Root Complex mode or Endpoint mode. PCI Endpoint Framework will
-add endpoint mode support in *Linux*. This will help to run Linux in an
+add endpoint mode support in Linux. This will help to run Linux in an
 EP system which can have a wide variety of use cases from testing or
-validation, co-processor accelerator etc..
+validation, co-processor accelerator, etc.
 
 2. PCI Endpoint Core
 
-The PCI Endpoint Core layer comprises of 3 components: the Endpoint Controller
-library, the Endpoint Function library and the configfs layer to bind the
+The PCI Endpoint Core layer comprises 3 components: the Endpoint Controller
+library, the Endpoint Function library, and the

Re: [GIT PULL] PCI: Support for configurable PCI endpoint

2017-03-29 Thread Niklas Cassel 
On 03/29/2017 02:36 PM, Kishon Vijay Abraham I wrote:
(snip)
>>>
>>> FWIW:
>>> I've tested Kishon's tag pci-endpoint-for-4.12
>>> and PCIe on artpec6 SoC is still working fine.
>>
>> Thanks for testing it.
>>>
>>> I also included the DRA7xx PCIe driver in my
>>> kernel so that pcie-designware-ep.c gets built.
>>>
>>> My only worry is that the code in pcie-designware-ep.c
>>> is not compile tested if DRA7xx is not selected
>>> (as it is the only driver using PCIE_DW_EP at
>>> the moment).
>>
>> yeah, we should plan to include COMPILE_TEST in all pci drivers but I guess
>> there is some problem with non-ARM builds [1]. As Bjorn mentioned in the
>> thread, we could add #ifdef ARM and then include COMPILE_TEST.
> 
> I think I misunderstood your concern. yeah, there is no direct way to compile
> pcie-designware-ep.c without selecting DRA7xx.

There is no way to compile pcie-designware-host.c + pcie-designware.c
without selecting a driver that selects PCIE_DW_HOST,
so I guess the same "problem" applies there.

As long as kbuild builds PCI_DRA7XX_EP (and any driver that selects
PCIE_DW_HOST), we should be fine.
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Re: [GIT PULL] PCI: Support for configurable PCI endpoint

2017-03-29 Thread Kishon Vijay Abraham I 
Hi,

On Wednesday 29 March 2017 05:40 PM, Kishon Vijay Abraham I wrote:
> Hi Niklas,
> 
> On Wednesday 29 March 2017 05:12 PM, Niklas Cassel wrote:
>> On 03/27/2017 11:44 AM, Kishon Vijay Abraham I wrote:
>>> Hi Bjorn,
>>>
>>> Please find the pull request for PCI endpoint support below. I've
>>> also included all the history here.
>>>
>>> Changes from v4:
>>> *) add #syscon-cells property and used of_parse_phandle_with_args
>>>to perform a configuration in syscon module (as suggested by
>>>Rob Herring)
>>> *) Remove unnecessary white space.
>>>
>>> Changes from v3:
>>> *) fixed a typo and adapted to https://lkml.org/lkml/2017/3/13/562.
>>>
>>> Changes from v2:
>>> *) changed the configfs structure as suggested by Christoph Hellwig. With
>>>this change the framework creates configfs entry for EP function driver
>>>and EP controller. Previously these entries have to be created by the
>>>the user. (Haven't changed the epc core or epf core except for invoking
>>>configfs APIs to create entries for EP function driver and EP controller.
>>>That's mostly because the EP function device can still be created by
>>>directly invoking the epf core API without using configfs).
>>> *) Now the user has to use configfs entry 'start' to start the link.
>>>This was previously done by the function driver. However in the case of
>>>multi function EP, the function driver shouldn't start the link.
>>>
>>> Changes from v1:
>>> *) The preparation patches for adding EP support is removed and is sent
>>>separately
>>> *) Added device ID for DRA74x/DRA72x and used it instead of
>>>using "PCI_ANY_ID"
>>> *) Added userguide for PCI endpoint test function
>>>
>>> Major Improvements from RFC:
>>>  *) support multi-function devices (hw supported not virtual)
>>>  *) Access host side buffers
>>>  *) Raise MSI interrupts
>>>  *) Add user space program to use the host side PCI driver
>>>  *) Adapt all other users of designware to use the new design (only
>>> compile tested. Since I have only dra7xx boards, the new design
>>> has only been tested in dra7xx. I'd require the help of others
>>> to test the platforms they have access to).
>>>
>>> This series has been developed over 4.11-rc1 + [1]
>>> [1] -> https://lkml.org/lkml/2017/3/13/562
>>>
>>> Let me know if this has to be re-based to some of your branch.
>>>
>>> Thanks
>>> Kishon
>>>
>>> The following changes since commit 623e87fec8ab7867fb51b3079196bd10718a60ce:
>>>
>>>   PCI: dwc: dra7xx: Push request_irq call to the bottom of probe 
>>> (2017-03-22 20:35:30 +0530)
>>>
>>> are available in the git repository at:
>>>
>>>   git://git.kernel.org/pub/scm/linux/kernel/git/kishon/pci-endpoint.git 
>>> tags/pci-endpoint-for-4.12
>>>
>>> for you to fetch changes up to e98bf80074be4654faae42fe0f5a622a776b6fdd:
>>>
>>>   ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to 
>>> SW_WKUP (2017-03-27 15:08:22 +0530)
>>>
>>> 
>>
>> FWIW:
>> I've tested Kishon's tag pci-endpoint-for-4.12
>> and PCIe on artpec6 SoC is still working fine.
> 
> Thanks for testing it.
>>
>> I also included the DRA7xx PCIe driver in my
>> kernel so that pcie-designware-ep.c gets built.
>>
>> My only worry is that the code in pcie-designware-ep.c
>> is not compile tested if DRA7xx is not selected
>> (as it is the only driver using PCIE_DW_EP at
>> the moment).
> 
> yeah, we should plan to include COMPILE_TEST in all pci drivers but I guess
> there is some problem with non-ARM builds [1]. As Bjorn mentioned in the
> thread, we could add #ifdef ARM and then include COMPILE_TEST.

I think I misunderstood your concern. yeah, there is no direct way to compile
pcie-designware-ep.c without selecting DRA7xx.

Thanks
Kishon
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Re: [GIT PULL] PCI: Support for configurable PCI endpoint

2017-03-29 Thread Kishon Vijay Abraham I 
Hi Niklas,

On Wednesday 29 March 2017 05:12 PM, Niklas Cassel wrote:
> On 03/27/2017 11:44 AM, Kishon Vijay Abraham I wrote:
>> Hi Bjorn,
>>
>> Please find the pull request for PCI endpoint support below. I've
>> also included all the history here.
>>
>> Changes from v4:
>> *) add #syscon-cells property and used of_parse_phandle_with_args
>>to perform a configuration in syscon module (as suggested by
>>Rob Herring)
>> *) Remove unnecessary white space.
>>
>> Changes from v3:
>> *) fixed a typo and adapted to https://lkml.org/lkml/2017/3/13/562.
>>
>> Changes from v2:
>> *) changed the configfs structure as suggested by Christoph Hellwig. With
>>this change the framework creates configfs entry for EP function driver
>>and EP controller. Previously these entries have to be created by the
>>the user. (Haven't changed the epc core or epf core except for invoking
>>configfs APIs to create entries for EP function driver and EP controller.
>>That's mostly because the EP function device can still be created by
>>directly invoking the epf core API without using configfs).
>> *) Now the user has to use configfs entry 'start' to start the link.
>>This was previously done by the function driver. However in the case of
>>multi function EP, the function driver shouldn't start the link.
>>
>> Changes from v1:
>> *) The preparation patches for adding EP support is removed and is sent
>>separately
>> *) Added device ID for DRA74x/DRA72x and used it instead of
>>using "PCI_ANY_ID"
>> *) Added userguide for PCI endpoint test function
>>
>> Major Improvements from RFC:
>>  *) support multi-function devices (hw supported not virtual)
>>  *) Access host side buffers
>>  *) Raise MSI interrupts
>>  *) Add user space program to use the host side PCI driver
>>  *) Adapt all other users of designware to use the new design (only
>> compile tested. Since I have only dra7xx boards, the new design
>> has only been tested in dra7xx. I'd require the help of others
>> to test the platforms they have access to).
>>
>> This series has been developed over 4.11-rc1 + [1]
>> [1] -> https://lkml.org/lkml/2017/3/13/562
>>
>> Let me know if this has to be re-based to some of your branch.
>>
>> Thanks
>> Kishon
>>
>> The following changes since commit 623e87fec8ab7867fb51b3079196bd10718a60ce:
>>
>>   PCI: dwc: dra7xx: Push request_irq call to the bottom of probe (2017-03-22 
>> 20:35:30 +0530)
>>
>> are available in the git repository at:
>>
>>   git://git.kernel.org/pub/scm/linux/kernel/git/kishon/pci-endpoint.git 
>> tags/pci-endpoint-for-4.12
>>
>> for you to fetch changes up to e98bf80074be4654faae42fe0f5a622a776b6fdd:
>>
>>   ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to 
>> SW_WKUP (2017-03-27 15:08:22 +0530)
>>
>> 
> 
> FWIW:
> I've tested Kishon's tag pci-endpoint-for-4.12
> and PCIe on artpec6 SoC is still working fine.

Thanks for testing it.
> 
> I also included the DRA7xx PCIe driver in my
> kernel so that pcie-designware-ep.c gets built.
> 
> My only worry is that the code in pcie-designware-ep.c
> is not compile tested if DRA7xx is not selected
> (as it is the only driver using PCIE_DW_EP at
> the moment).

yeah, we should plan to include COMPILE_TEST in all pci drivers but I guess
there is some problem with non-ARM builds [1]. As Bjorn mentioned in the
thread, we could add #ifdef ARM and then include COMPILE_TEST.

Thanks
Kishon

[1] -> http://www.spinics.net/lists/linux-pci/msg58134.html

Thanks
Kishon
> 
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Re: [GIT PULL] PCI: Support for configurable PCI endpoint

2017-03-29 Thread Niklas Cassel 
On 03/27/2017 11:44 AM, Kishon Vijay Abraham I wrote:
> Hi Bjorn,
> 
> Please find the pull request for PCI endpoint support below. I've
> also included all the history here.
> 
> Changes from v4:
> *) add #syscon-cells property and used of_parse_phandle_with_args
>to perform a configuration in syscon module (as suggested by
>Rob Herring)
> *) Remove unnecessary white space.
> 
> Changes from v3:
> *) fixed a typo and adapted to https://lkml.org/lkml/2017/3/13/562.
> 
> Changes from v2:
> *) changed the configfs structure as suggested by Christoph Hellwig. With
>this change the framework creates configfs entry for EP function driver
>and EP controller. Previously these entries have to be created by the
>the user. (Haven't changed the epc core or epf core except for invoking
>configfs APIs to create entries for EP function driver and EP controller.
>That's mostly because the EP function device can still be created by
>directly invoking the epf core API without using configfs).
> *) Now the user has to use configfs entry 'start' to start the link.
>This was previously done by the function driver. However in the case of
>multi function EP, the function driver shouldn't start the link.
> 
> Changes from v1:
> *) The preparation patches for adding EP support is removed and is sent
>separately
> *) Added device ID for DRA74x/DRA72x and used it instead of
>using "PCI_ANY_ID"
> *) Added userguide for PCI endpoint test function
> 
> Major Improvements from RFC:
>  *) support multi-function devices (hw supported not virtual)
>  *) Access host side buffers
>  *) Raise MSI interrupts
>  *) Add user space program to use the host side PCI driver
>  *) Adapt all other users of designware to use the new design (only
> compile tested. Since I have only dra7xx boards, the new design
> has only been tested in dra7xx. I'd require the help of others
> to test the platforms they have access to).
> 
> This series has been developed over 4.11-rc1 + [1]
> [1] -> https://lkml.org/lkml/2017/3/13/562
> 
> Let me know if this has to be re-based to some of your branch.
> 
> Thanks
> Kishon
> 
> The following changes since commit 623e87fec8ab7867fb51b3079196bd10718a60ce:
> 
>   PCI: dwc: dra7xx: Push request_irq call to the bottom of probe (2017-03-22 
> 20:35:30 +0530)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/kishon/pci-endpoint.git 
> tags/pci-endpoint-for-4.12
> 
> for you to fetch changes up to e98bf80074be4654faae42fe0f5a622a776b6fdd:
> 
>   ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to 
> SW_WKUP (2017-03-27 15:08:22 +0530)
> 
> 

FWIW:
I've tested Kishon's tag pci-endpoint-for-4.12
and PCIe on artpec6 SoC is still working fine.

I also included the DRA7xx PCIe driver in my
kernel so that pcie-designware-ep.c gets built.

My only worry is that the code in pcie-designware-ep.c
is not compile tested if DRA7xx is not selected
(as it is the only driver using PCIE_DW_EP at
the moment).
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