[PATCH] staging:iio:ad2s1210 fix a leak when device removed

[Jimmy Li]

Signed-off-by: Jimmy Li 
---
 drivers/staging/iio/resolver/ad2s1210.c |1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/staging/iio/resolver/ad2s1210.c 
b/drivers/staging/iio/resolver/ad2s1210.c
index 7fbaba4..3d6e123 100644
--- a/drivers/staging/iio/resolver/ad2s1210.c
+++ b/drivers/staging/iio/resolver/ad2s1210.c
@@ -716,6 +716,7 @@ static int ad2s1210_remove(struct spi_device *spi)
 
iio_device_unregister(indio_dev);
ad2s1210_free_gpios(iio_priv(indio_dev));
+   devm_iio_device_free(>dev, indio_dev);
 
return 0;
 }
-- 
1.7.9.5

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RE: [PATCH 1/2] PM / OPP: Use list_for_each_entry_reverse instead of list_for_each_entry

[Jonghwan Choi]

Hi~

> > Most of the cpufreq table is sorted in descending order.
> 
> Which part of kernel says that?
> 
-> I couldn't check all. Sorry.

> > But when cpufreq table is made from dev_pm_opp_init_cpufreq_table, it
> > is sorted in ascending order. So in some case to make cpufreq table
> > with descending order it needs an extra work.
> 
> Order of this table shouldn't matter at all in cpufreq layer..
-> You are right. But 5440 cpufreq driver write an index number instead of
clk divider value
for change DVFS. And our another(will submit) also write an index number for
changing DVFS.
As you said, order of table shouldn't matter at all in cpufreq layer. Then,
could this can be applied?
In our case, We want to use index 0 for P0 and index 1 for P1.

Thanks

Best Ragrds.   



> -Original Message-
> From: viresh.li...@gmail.com [mailto:viresh.li...@gmail.com] On Behalf Of
> Viresh Kumar
> Sent: Tuesday, April 29, 2014 2:33 PM
> To: Jonghwan Choi
> Cc: open list; Rafael J. Wysocki; Len Brown
> Subject: Re: [PATCH 1/2] PM / OPP: Use list_for_each_entry_reverse instead
> of list_for_each_entry
> 
> On Tue, Apr 29, 2014 at 10:54 AM, Jonghwan Choi 
> wrote:
> > Most of the cpufreq table is sorted in descending order.
> 
> Which part of kernel says that?
> 
> > But when cpufreq table is made from dev_pm_opp_init_cpufreq_table, it
> > is sorted in ascending order. So in some case to make cpufreq table
> > with descending order it needs an extra work.
> 
> Order of this table shouldn't matter at all in cpufreq layer..

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[PATCH v2 2/2] mfd: max77693: handle IRQs using regmap

[Robert Baldyga]

This patch modifies mfd driver to use regmap for handling interrupts.
It allows to simplify irq handling process. This modifications needed
to make small changes in function drivers, which use interrupts.

Signed-off-by: Robert Baldyga 
---
 drivers/extcon/extcon-max77693.c |   3 +-
 drivers/mfd/Kconfig  |   1 +
 drivers/mfd/Makefile |   2 +-
 drivers/mfd/max77693-irq.c   | 346 ---
 drivers/mfd/max77693.c   | 151 ++-
 include/linux/mfd/max77693-private.h |  47 -
 6 files changed, 191 insertions(+), 359 deletions(-)
 delete mode 100644 drivers/mfd/max77693-irq.c

diff --git a/drivers/extcon/extcon-max77693.c b/drivers/extcon/extcon-max77693.c
index 0b09bf3..725190a 100644
--- a/drivers/extcon/extcon-max77693.c
+++ b/drivers/extcon/extcon-max77693.c
@@ -1154,7 +1154,8 @@ static int max77693_muic_probe(struct platform_device 
*pdev)
struct max77693_muic_irq *muic_irq = _irqs[i];
unsigned int virq = 0;
 
-   virq = irq_create_mapping(max77693->irq_domain, muic_irq->irq);
+   virq = regmap_irq_get_virq(max77693->irq_data_muic,
+   muic_irq->irq);
if (!virq) {
ret = -EINVAL;
goto err_irq;
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 67141e8..9e479d0 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -372,6 +372,7 @@ config MFD_MAX77693
depends on I2C=y
select MFD_CORE
select REGMAP_I2C
+   select REGMAP_IRQ
help
  Say yes here to add support for Maxim Semiconductor MAX77693.
  This is a companion Power Management IC with Flash, Haptic, Charger,
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 6d0f65e..b0c55e4 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -114,7 +114,7 @@ obj-$(CONFIG_MFD_DA9063)+= da9063.o
 
 obj-$(CONFIG_MFD_MAX14577) += max14577.o
 obj-$(CONFIG_MFD_MAX77686) += max77686.o max77686-irq.o
-obj-$(CONFIG_MFD_MAX77693) += max77693.o max77693-irq.o
+obj-$(CONFIG_MFD_MAX77693) += max77693.o
 obj-$(CONFIG_MFD_MAX8907)  += max8907.o
 max8925-objs   := max8925-core.o max8925-i2c.o
 obj-$(CONFIG_MFD_MAX8925)  += max8925.o
diff --git a/drivers/mfd/max77693-irq.c b/drivers/mfd/max77693-irq.c
deleted file mode 100644
index 7d8f99f..000
--- a/drivers/mfd/max77693-irq.c
+++ /dev/null
@@ -1,346 +0,0 @@
-/*
- * max77693-irq.c - Interrupt controller support for MAX77693
- *
- * Copyright (C) 2012 Samsung Electronics Co.Ltd
- * SangYoung Son 
- *
- * This program is not provided / owned by Maxim Integrated Products.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- * This driver is based on max8997-irq.c
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-static const unsigned int max77693_mask_reg[] = {
-   [LED_INT] = MAX77693_LED_REG_FLASH_INT_MASK,
-   [TOPSYS_INT] = MAX77693_PMIC_REG_TOPSYS_INT_MASK,
-   [CHG_INT] = MAX77693_CHG_REG_CHG_INT_MASK,
-   [MUIC_INT1] = MAX77693_MUIC_REG_INTMASK1,
-   [MUIC_INT2] = MAX77693_MUIC_REG_INTMASK2,
-   [MUIC_INT3] = MAX77693_MUIC_REG_INTMASK3,
-};
-
-static struct regmap *max77693_get_regmap(struct max77693_dev *max77693,
-   enum max77693_irq_source src)
-{
-   switch (src) {
-   case LED_INT ... CHG_INT:
-   return max77693->regmap;
-   case MUIC_INT1 ... MUIC_INT3:
-   return max77693->regmap_muic;
-   default:
-   return ERR_PTR(-EINVAL);
-   }
-}
-
-struct max77693_irq_data {
-   int mask;
-   enum max77693_irq_source group;
-};
-
-#define DECLARE_IRQ(idx, _group, _mask)\
-   [(idx)] = { .group = (_group), .mask = (_mask) }
-static const struct max77693_irq_data max77693_irqs[] = {
-   DECLARE_IRQ(MAX77693_LED_IRQ_FLED2_OPEN,LED_INT, 1 << 0),
-   DECLARE_IRQ(MAX77693_LED_IRQ_FLED2_SHORT,   LED_INT, 1 << 1),
-   DECLARE_IRQ(MAX77693_LED_IRQ_FLED1_OPEN,LED_INT, 1 << 2),
-   DECLARE_IRQ(MAX77693_LED_IRQ_FLED1_SHORT,   LED_INT, 1 << 3),
-   

[PATCH v2 1/2] mfd: max77693: remove unnecessary wrapper functions

[Robert Baldyga]

This patch removes wrapper functions used to access regmap, and
make driver using regmap_*() functions instead.

Signed-off-by: Robert Baldyga 
---
 drivers/extcon/extcon-max77693.c | 32 ++---
 drivers/mfd/max77693-irq.c   | 50 +++-
 drivers/mfd/max77693.c   | 56 ++--
 drivers/regulator/max77693.c | 12 
 include/linux/mfd/max77693-private.h |  8 --
 5 files changed, 54 insertions(+), 104 deletions(-)

diff --git a/drivers/extcon/extcon-max77693.c b/drivers/extcon/extcon-max77693.c
index da268fb..0b09bf3 100644
--- a/drivers/extcon/extcon-max77693.c
+++ b/drivers/extcon/extcon-max77693.c
@@ -255,10 +255,10 @@ static int max77693_muic_set_debounce_time(struct 
max77693_muic_info *info,
case ADC_DEBOUNCE_TIME_10MS:
case ADC_DEBOUNCE_TIME_25MS:
case ADC_DEBOUNCE_TIME_38_62MS:
-   ret = max77693_update_reg(info->max77693->regmap_muic,
+   ret = regmap_update_bits(info->max77693->regmap_muic,
  MAX77693_MUIC_REG_CTRL3,
- time << CONTROL3_ADCDBSET_SHIFT,
- CONTROL3_ADCDBSET_MASK);
+ CONTROL3_ADCDBSET_MASK,
+ time << CONTROL3_ADCDBSET_SHIFT);
if (ret) {
dev_err(info->dev, "failed to set ADC debounce time\n");
return ret;
@@ -286,15 +286,15 @@ static int max77693_muic_set_path(struct 
max77693_muic_info *info,
u8 val, bool attached)
 {
int ret = 0;
-   u8 ctrl1, ctrl2 = 0;
+   unsigned int ctrl1, ctrl2 = 0;
 
if (attached)
ctrl1 = val;
else
ctrl1 = CONTROL1_SW_OPEN;
 
-   ret = max77693_update_reg(info->max77693->regmap_muic,
-   MAX77693_MUIC_REG_CTRL1, ctrl1, COMP_SW_MASK);
+   ret = regmap_update_bits(info->max77693->regmap_muic,
+   MAX77693_MUIC_REG_CTRL1, COMP_SW_MASK, ctrl1);
if (ret < 0) {
dev_err(info->dev, "failed to update MUIC register\n");
return ret;
@@ -305,9 +305,9 @@ static int max77693_muic_set_path(struct max77693_muic_info 
*info,
else
ctrl2 |= CONTROL2_LOWPWR_MASK;  /* LowPwr=1, CPEn=0 */
 
-   ret = max77693_update_reg(info->max77693->regmap_muic,
-   MAX77693_MUIC_REG_CTRL2, ctrl2,
-   CONTROL2_LOWPWR_MASK | CONTROL2_CPEN_MASK);
+   ret = regmap_update_bits(info->max77693->regmap_muic,
+   MAX77693_MUIC_REG_CTRL2,
+   CONTROL2_LOWPWR_MASK | CONTROL2_CPEN_MASK, ctrl2);
if (ret < 0) {
dev_err(info->dev, "failed to update MUIC register\n");
return ret;
@@ -969,8 +969,8 @@ static void max77693_muic_irq_work(struct work_struct *work)
if (info->irq == muic_irqs[i].virq)
irq_type = muic_irqs[i].irq;
 
-   ret = max77693_bulk_read(info->max77693->regmap_muic,
-   MAX77693_MUIC_REG_STATUS1, 2, info->status);
+   ret = regmap_bulk_read(info->max77693->regmap_muic,
+   MAX77693_MUIC_REG_STATUS1, info->status, 2);
if (ret) {
dev_err(info->dev, "failed to read MUIC register\n");
mutex_unlock(>mutex);
@@ -1042,8 +1042,8 @@ static int max77693_muic_detect_accessory(struct 
max77693_muic_info *info)
mutex_lock(>mutex);
 
/* Read STATUSx register to detect accessory */
-   ret = max77693_bulk_read(info->max77693->regmap_muic,
-   MAX77693_MUIC_REG_STATUS1, 2, info->status);
+   ret = regmap_bulk_read(info->max77693->regmap_muic,
+   MAX77693_MUIC_REG_STATUS1, info->status, 2);
if (ret) {
dev_err(info->dev, "failed to read MUIC register\n");
mutex_unlock(>mutex);
@@ -1095,7 +1095,7 @@ static int max77693_muic_probe(struct platform_device 
*pdev)
int delay_jiffies;
int ret;
int i;
-   u8 id;
+   unsigned int id;
 
info = devm_kzalloc(>dev, sizeof(struct max77693_muic_info),
   GFP_KERNEL);
@@ -1205,7 +1205,7 @@ static int max77693_muic_probe(struct platform_device 
*pdev)
enum max77693_irq_source irq_src
= MAX77693_IRQ_GROUP_NR;
 
-   max77693_write_reg(info->max77693->regmap_muic,
+   regmap_write(info->max77693->regmap_muic,
init_data[i].addr,
init_data[i].data);
 
@@ -1263,7 +1263,7 @@ static int max77693_muic_probe(struct platform_device 
*pdev)
 max77693_muic_set_path(info, info->path_uart, true);
 
/* Check revision 

[PATCH v2 0/2] mfd: max77693: improve regmap support

[Robert Baldyga]

This patchset modifies max77693 driver and associated function drivers
to improve regmap support. It removes unnecessary wrapper functions,
which make code more clean, and modifies IRQ handling to use regmap irq.

Best regards
Robert Baldyga
Samsung R Institute Poland

Changelog:

v2:
- change type of array given to regmap_bulk_read() from unsigned int to u8
- remove mfd_remove_devices() call from error handling, since it's not needed
- call disable_irq()/enable_irq() in suspend/resume regardless of wakeup source

v1: https://lkml.org/lkml/2014/4/28/298

Robert Baldyga (2):
  mfd: max77693: remove unnecessary wrapper functions
  mfd: max77693: handle IRQs using regmap

 drivers/extcon/extcon-max77693.c |  35 ++--
 drivers/mfd/Kconfig  |   1 +
 drivers/mfd/Makefile |   2 +-
 drivers/mfd/max77693-irq.c   | 336 ---
 drivers/mfd/max77693.c   | 203 ++---
 drivers/regulator/max77693.c |  12 +-
 include/linux/mfd/max77693-private.h |  55 --
 7 files changed, 213 insertions(+), 431 deletions(-)
 delete mode 100644 drivers/mfd/max77693-irq.c

-- 
1.9.1

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Re: [PATCH tip/core/rcu 2/3] documentation: Record rcu_dereference() value mishandling

[Pranith Kumar]

Minor nits below:

Other than that Acked-by: Pranith Kumar 

On Tue, Apr 29, 2014 at 1:04 AM, Andev  wrote:
> From: "Paul E. McKenney" 
>
> Recent LKML discussings (see http://lwn.net/Articles/586838/ and
> http://lwn.net/Articles/588300/ for the LWN writeups) brought out
> some ways of misusing the return value from rcu_dereference() that
> are not necessarily completely intuitive.  This commit therefore
> documents what can and cannot safely be done with these values.
>
> Signed-off-by: Paul E. McKenney 
snip
> +
> +   o   The pointer is never dereferenced after being compared.
> +   Since there are no subsequent dereferences, the compiler
> +   cannot use anything it learned from the comparison
> +   to reorder the non-existent subsequent dereferences.
> +   This sort of comparison occurs frequently when scanning
> +   RCU-protected circular linked lists.
> +
> +   o   The comparison is against a pointer pointer that

duplicate pointer, remove one

> +   references memory that was initialized "a long time ago."
> +   The reason this is safe is that even if misordering
> +   occurs, the misordering will not affect the accesses
> +   that follow the comparison.  So exactly how long ago is
> +   "a long time ago"?  Here are some possibilities:
snip
> +   o   All of the accesses following the comparison are stores,
> +   so that a control dependency preserves the needed ordering.
> +   That said, it is easy to get control dependencies wrong.
> +   Please see the "CONTROL DEPENDENCIES" section of
> +   Documentation/memory-barriers.txt for more details.
> +
> +   o   The pointers compared not-equal -and- the compiler does

add in "are " - The pointers compared are not-equal...

> +   not have enough information to deduce the value of the
> +   pointer.  Note that the volatile cast in rcu_dereference()
> +   will normally prevent the compiler from knowing too much.
> +
> +o  Disable any value-speculation optimizations that your compiler
> +   might provide, especially if you are making use of feedback-based
> +   optimizations that take data collected from prior runs.  Such
> +   value-speculation optimizations reorder operations by design.
> +
> +   There is one exception to this rule:  Value-speculation
> +   optimizations that leverage the branch-prediction hardware are
> +   safe on strongly ordered systems (such as x86), but not on weakly
> +   ordered systems (such as ARM or Power).  Choose your compiler
> +   command-line options wisely!
> +
> +
> +EXAMPLE OF AMPLIFIED RCU-USAGE BUG
> +
> +Because updaters can run concurrently with RCU readers, RCU readers can
> +see stale and/or inconsistent values.  If RCU readers need fresh or
> +consistent values, which they sometimes do, they need to take proper
> +precautions.  To see this, consider the following code fragment:
> +
> +   struct foo {
> +   int a;
> +   int b;
> +   int c;
> +   };
> +   struct foo *gp1;
> +   struct foo *gp2;
> +
> +   void updater(void)
> +   {
> +   struct foo *p;
> +
> +   p = kmalloc(...);
> +   if (p == NULL)
> +   deal_with_it();
> +   p->a = 42;  /* Each field in its own cache line. */
> +   p->b = 43;
> +   p->c = 44;
> +   rcu_assign_pointer(gp1, p);
> +   p->b = 143;
> +   p->c = 144;
> +   rcu_assign_pointer(gp2, p);
> +   }
> +
> +   void reader(void)
> +   {
> +   struct foo *p;
> +   struct foo *q;
> +   int r1, r2;
> +
> +   p = rcu_dereference(gp2);
> +   r1 = p->b;  /* Guaranteed to get 143. */
> +   q = rcu_dereference(gp1);
> +   if (p == q) {
> +   /* The compiler decides that q->c is same as p->c. */
> +   r2 = p->c; /* Could get 44 on weakly order system. */
> +   }
> +   }
> +
> +You might be surprised that the outcome (r1 == 143 && r2 == 44) is possible,
> +but you should not be.  After all, the updater might have been invoked
> +a second time between the time reader() loaded into "r1" and the time
> +that it loaded into "r2".  The fact that this same result can occur due
> +to some reordering from the compiler and CPUs is beside the point.
> +
> +But suppose that the reader needs a consistent view?
> +
> +Then one approach is to use locking, for example, as follows:
> +
> +   struct foo {
> +   int a;
> +   int b;
> +   int c;
> +   spinlock_t lock;
> +   };
> +   struct foo *gp1;
> +   struct foo *gp2;
> +
> +   void 

[RFC PATCH] regulator: virtual: Introduce a new virtual locker regulator type

[Inderpal Singh]

On some SoCs there could be requirements that two or more voltage
regulators need to maintain certain skew for proper functioning.

This patch implements a new vitual locker type regulator which can
have multiple output and input regulators. The real regulators will
be hidden under the virtual output regulators. The consumer of the
real regulators need not change anything. Only the name of the real
regulators need to be changed.

This patch has been tested on exynos5420 based smdk5420.

Signed-off-by: Doug Anderson 
Signed-off-by: Inderpal Singh 
---
 .../bindings/regulator/locker-regulator.txt|  36 ++
 drivers/regulator/Kconfig  |   9 +
 drivers/regulator/Makefile |   1 +
 drivers/regulator/locker.c | 472 +
 include/linux/regulator/locker.h   |  35 ++
 5 files changed, 553 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/regulator/locker-regulator.txt
 create mode 100644 drivers/regulator/locker.c
 create mode 100644 include/linux/regulator/locker.h

diff --git a/Documentation/devicetree/bindings/regulator/locker-regulator.txt 
b/Documentation/devicetree/bindings/regulator/locker-regulator.txt
new file mode 100644
index 000..1ddba0a
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/locker-regulator.txt
@@ -0,0 +1,36 @@
+Locker Voltage regulators
+
+Required properties:
+- compatible: Must be "regulator-locker";
+- Must have atleast 2 vinX-supply nodes
+- Must have atleast 2 vout nodes
+- Must have maximum-spread
+- The counting for vout and vinX-supplies starts from 1 as shown below
+
+Any property defined as part of the core regulator
+binding, defined in regulator.txt, can also be used.
+
+Example:
+
+   int-voltage-locker {
+   compatible = "regulator-locker";
+   vin1-supply = <_reg>; /* real vdd_arm */
+   vin2-supply = <_reg>; /* real vdd_int */
+   maximum-spread = <30>;
+   locker-regulators {
+   vout1 {
+   regulator-name = "vdd_arm";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <150>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+   vout2 {
+   regulator-name = "vdd_int";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+   };
+   };
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 65e5d7d..9efc4b8 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -54,6 +54,15 @@ config REGULATOR_USERSPACE_CONSUMER
 
  If unsure, say no.
 
+config REGULATOR_LOCKER_VOLTAGE
+   tristate "Locker voltage regulator support"
+   help
+ This driver provides support for virtual voltage regulators,
+ useful for systems which has requirements to maintain a skew
+ between 2 or more regulators.
+
+ If unsure, say no.
+
 config REGULATOR_88PM800
tristate "Marvell 88PM800 Power regulators"
depends on MFD_88PM800
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index c14696b2..6cde7af 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_OF) += of_regulator.o
 obj-$(CONFIG_REGULATOR_FIXED_VOLTAGE) += fixed.o
 obj-$(CONFIG_REGULATOR_VIRTUAL_CONSUMER) += virtual.o
 obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o
+obj-$(CONFIG_REGULATOR_LOCKER_VOLTAGE) += locker.o
 
 obj-$(CONFIG_REGULATOR_88PM800) += 88pm800.o
 obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o
diff --git a/drivers/regulator/locker.c b/drivers/regulator/locker.c
new file mode 100644
index 000..4a39f78
--- /dev/null
+++ b/drivers/regulator/locker.c
@@ -0,0 +1,472 @@
+/*
+ * locker.c
+ *
+ * Copyright  (C) 2014 Samsung Electronics
+ * Inderpal Singh 
+ * Doug Anderson 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define CHECK_ALGO_ERRORS 1
+
+/* Assume <= 99 MAX_REGULATORS */
+#define VIN_SUPPLY_TEMPLATE "vin%d-supply"
+#define VIN_TEMPLATE "vin%d"
+#define VOUT_TEMPLATE "vout%d"
+
+#define VIN_SUPPLY_SIZE (sizeof(VIN_SUPPLY_TEMPLATE))
+#define VIN_SIZE (sizeof(VIN_TEMPLATE))
+#define VOUT_SIZE (sizeof(VOUT_TEMPLATE))
+
+#define 

Re: [PATCH 1/2] PM / OPP: Use list_for_each_entry_reverse instead of list_for_each_entry

[Viresh Kumar]

On Tue, Apr 29, 2014 at 10:54 AM, Jonghwan Choi  wrote:
> Most of the cpufreq table is sorted in descending order.

Which part of kernel says that?

> But when cpufreq table is made from dev_pm_opp_init_cpufreq_table,
> it is sorted in ascending order. So in some case to make cpufreq table
> with descending order it needs an extra work.

Order of this table shouldn't matter at all in cpufreq layer..
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[PATCH 1/2] PM / OPP: Use list_for_each_entry_reverse instead of list_for_each_entry

[Jonghwan Choi]

Most of the cpufreq table is sorted in descending order.
But when cpufreq table is made from dev_pm_opp_init_cpufreq_table,
it is sorted in ascending order. So in some case to make cpufreq table
with descending order it needs an extra work.

Signed-off-by: Jonghwan Choi 
---
 drivers/base/power/opp.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/base/power/opp.c b/drivers/base/power/opp.c
index 2553867..8d81a46 100644
--- a/drivers/base/power/opp.c
+++ b/drivers/base/power/opp.c
@@ -649,7 +649,7 @@ int dev_pm_opp_init_cpufreq_table(struct device *dev,
return -ENOMEM;
}
 
-   list_for_each_entry(opp, _opp->opp_list, node) {
+   list_for_each_entry_reverse(opp, _opp->opp_list, node) {
if (opp->available) {
freq_table[i].driver_data = i;
freq_table[i].frequency = opp->rate / 1000;
-- 
1.7.10.4

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Re: [ANNOUNCE] 3.14-rt1

[Mike Galbraith]

On Mon, 2014-04-28 at 16:37 +0200, Mike Galbraith wrote: 

> > Seems that migrate_disable() must be called before taking the lock as
> > it is done in every other location.
> 
> And for tasklist_lock, seems you also MUST do that prior to trylock as
> well, else you'll run afoul of the hotplug beast.

Bah.  Futzing with dmesg while stress script is running is either a very
bad idea, or a very good test.  Both virgin 3.10-rt and 3.12-rt with new
bugs squashed will deadlock.

Too bad I kept on testing, I liked the notion that hotplug was solid ;-)

-Mike

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Ge ldp rob le m?

[Malgorzata Brandt]

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Mit freundlichem Gruß 

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Mitarbeiter im support


Sie haben diese Info bekommen, weil wir Ihre Registrierung von einem 
Drittanbieter erhalten haben. Wenn Sie sich aus unserem Verteiler streichen 
wollen, dann besuchen Sie unsere Seite. Die Funktion finden Sie in der 
Navigation.



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[PATCH v4 5/7] arm64: Add 4 levels of page tables definition with 4KB pages

[Jungseok Lee]

This patch adds hardware definition and types for 4 levels of
translation tables with 4KB pages.

Cc: Catalin Marinas 
Cc: Steve Capper 
Signed-off-by: Jungseok Lee 
Reviewed-by: Sungjinn Chung 
---
 arch/arm64/include/asm/pgtable-4level-hwdef.h |   50 +
 arch/arm64/include/asm/pgtable-4level-types.h |   71 +
 2 files changed, 121 insertions(+)
 create mode 100644 arch/arm64/include/asm/pgtable-4level-hwdef.h
 create mode 100644 arch/arm64/include/asm/pgtable-4level-types.h

diff --git a/arch/arm64/include/asm/pgtable-4level-hwdef.h 
b/arch/arm64/include/asm/pgtable-4level-hwdef.h
new file mode 100644
index 000..0ec84e2
--- /dev/null
+++ b/arch/arm64/include/asm/pgtable-4level-hwdef.h
@@ -0,0 +1,50 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+#ifndef __ASM_PGTABLE_4LEVEL_HWDEF_H
+#define __ASM_PGTABLE_4LEVEL_HWDEF_H
+
+#define PTRS_PER_PTE   512
+#define PTRS_PER_PMD   512
+#define PTRS_PER_PUD   512
+#define PTRS_PER_PGD   512
+
+/*
+ * PGDIR_SHIFT determines the size a top-level page table entry can map.
+ */
+#define PGDIR_SHIFT39
+#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
+#define PGDIR_MASK (~(PGDIR_SIZE-1))
+
+/*
+ * PUD_SHIFT determines the size the second level page table entry can map.
+ */
+#define PUD_SHIFT  30
+#define PUD_SIZE   (_AC(1, UL) << PUD_SHIFT)
+#define PUD_MASK   (~(PUD_SIZE-1))
+
+/*
+ * PMD_SHIFT determines the size the third level page table entry can map.
+ */
+#define PMD_SHIFT  21
+#define PMD_SIZE   (_AC(1, UL) << PMD_SHIFT)
+#define PMD_MASK   (~(PMD_SIZE-1))
+
+/*
+ * section address mask and size definitions.
+ */
+#define SECTION_SHIFT  21
+#define SECTION_SIZE   (_AC(1, UL) << SECTION_SHIFT)
+#define SECTION_MASK   (~(SECTION_SIZE-1))
+
+#endif
diff --git a/arch/arm64/include/asm/pgtable-4level-types.h 
b/arch/arm64/include/asm/pgtable-4level-types.h
new file mode 100644
index 000..7ad8dd2
--- /dev/null
+++ b/arch/arm64/include/asm/pgtable-4level-types.h
@@ -0,0 +1,71 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+#ifndef __ASM_PGTABLE_4LEVEL_TYPES_H
+#define __ASM_PGTABLE_4LEVEL_TYPES_H
+
+#include 
+
+typedef u64 pteval_t;
+typedef u64 pmdval_t;
+typedef u64 pudval_t;
+typedef u64 pgdval_t;
+
+#undef STRICT_MM_TYPECHECKS
+
+#ifdef STRICT_MM_TYPECHECKS
+
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct { pteval_t pte; } pte_t;
+typedef struct { pmdval_t pmd; } pmd_t;
+typedef struct { pudval_t pud; } pud_t;
+typedef struct { pgdval_t pgd; } pgd_t;
+typedef struct { pteval_t pgprot; } pgprot_t;
+
+#define pte_val(x) ((x).pte)
+#define pmd_val(x) ((x).pmd)
+#define pud_val(x) ((x).pud)
+#define pgd_val(x) ((x).pgd)
+#define pgprot_val(x)  ((x).pgprot)
+
+#define __pte(x)   ((pte_t) { (x) } )
+#define __pmd(x)   ((pmd_t) { (x) } )
+#define __pud(x)   ((pud_t) { (x) } )
+#define __pgd(x)   ((pgd_t) { (x) } )
+#define __pgprot(x)((pgprot_t) { (x) } )
+
+#else  /* !STRICT_MM_TYPECHECKS */
+
+typedef pteval_t pte_t;
+typedef pmdval_t pmd_t;
+typedef pudval_t pud_t;
+typedef pgdval_t pgd_t;
+typedef pteval_t pgprot_t;
+
+#define pte_val(x) (x)
+#define pmd_val(x) (x)
+#define pud_val(x) (x)
+#define pgd_val(x) (x)
+#define pgprot_val(x)  (x)
+
+#define __pte(x)   (x)
+#define __pmd(x)   (x)
+#define __pud(x)   (x)
+#define __pgd(x)   (x)
+#define __pgprot(x)(x)
+
+#endif /* STRICT_MM_TYPECHECKS */
+
+#endif /* __ASM_PGTABLE_4LEVEL_TYPES_H */
-- 
1.7.10.4


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[PATCH v4 3/7] arm64: Introduce a kernel configuration option for VA_BITS

[Jungseok Lee]

This patch adds a kernel configuration for VA_BITS.

It helps to prevent unnecessary #ifdef statements insertions
for VA_BITS when implementing different page sizes and level of
translation tables.

Cc: Catalin Marinas 
Cc: Steve Capper 
Signed-off-by: Jungseok Lee 
Reviewed-by: Sungjinn Chung 
---
 arch/arm64/Kconfig  |8 
 arch/arm64/include/asm/memory.h |6 +-
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index c7f5d65..7b8d429 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -186,6 +186,14 @@ config ARM64_3_LEVELS
 
 endchoice
 
+config ARM64_VA_BITS
+   int "Virtual address space size"
+   range 39 39 if ARM64_4K_PAGES && ARM64_3_LEVELS
+   range 42 42 if ARM64_64K_PAGES && ARM64_2_LEVELS
+   help
+ This feature is determined by a combination of page size and
+ level of translation tables.
+
 config CPU_BIG_ENDIAN
bool "Build big-endian kernel"
help
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index e94f945..f6e7480 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -41,11 +41,7 @@
  * The module space lives between the addresses given by TASK_SIZE
  * and PAGE_OFFSET - it must be within 128MB of the kernel text.
  */
-#ifdef CONFIG_ARM64_64K_PAGES
-#define VA_BITS(42)
-#else
-#define VA_BITS(39)
-#endif
+#define VA_BITS(CONFIG_ARM64_VA_BITS)
 #define PAGE_OFFSET(UL(0x) << (VA_BITS - 1))
 #define MODULES_END(PAGE_OFFSET)
 #define MODULES_VADDR  (MODULES_END - SZ_64M)
-- 
1.7.10.4


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[PATCH v4 7/7] arm64: KVM: Implement 4 levels of translation tables for HYP and stage2

[Jungseok Lee]

This patch adds 4 levels of translation tables implementation for both
HYP and stage2.

Both symmetric and asymmetric configurations for page size and translation
levels are are validated on Fast Models:

 1) 4KB  + 3 levels guest on 4KB  + 3 levels host

 2) 4KB  + 4 levels guest on 4KB  + 3 levels host

 3) 64KB + 2 levels guest on 4KB  + 3 levels host

 4) 4KB  + 3 levels guest on 4KB  + 4 levels host

 5) 4KB  + 4 levels guest on 4KB  + 4 levels host

 6) 64KB + 2 levels guest on 4KB  + 4 levels host

 7) 4KB  + 3 levels guest on 64KB + 2 levels host

 8) 4KB  + 4 levels guest on 64KB + 2 levels host

 9) 64KB + 2 levels guest on 64KB + 2 levels host

Cc: Marc Zyngier 
Cc: Christoffer Dall 
Signed-off-by: Jungseok Lee 
Reviewed-by: Sungjinn Chung 
---
 arch/arm/include/asm/kvm_mmu.h   |   10 +
 arch/arm/kvm/mmu.c   |   88 +-
 arch/arm64/include/asm/kvm_arm.h |   34 ---
 arch/arm64/include/asm/kvm_mmu.h |   12 ++
 4 files changed, 127 insertions(+), 17 deletions(-)

diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h
index 5c7aa3c..31eaaa6 100644
--- a/arch/arm/include/asm/kvm_mmu.h
+++ b/arch/arm/include/asm/kvm_mmu.h
@@ -37,6 +37,11 @@
  */
 #define TRAMPOLINE_VA  UL(CONFIG_VECTORS_BASE)
 
+/*
+ * MMU_CACHE_MIN_PAGES is the number of stage2 page table translation levels.
+ */
+#define MMU_CACHE_MIN_PAGES2
+
 #ifndef __ASSEMBLY__
 
 #include 
@@ -94,6 +99,11 @@ static inline void kvm_clean_pgd(pgd_t *pgd)
clean_dcache_area(pgd, PTRS_PER_S2_PGD * sizeof(pgd_t));
 }
 
+static inline void kvm_clean_pmd(pmd_t *pmd)
+{
+   clean_dcache_area(pmd, PTRS_PER_PMD * sizeof(pmd_t));
+}
+
 static inline void kvm_clean_pmd_entry(pmd_t *pmd)
 {
clean_pmd_entry(pmd);
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 80bb1e6..3ffbdfb 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -388,13 +388,44 @@ static int create_hyp_pmd_mappings(pud_t *pud, unsigned 
long start,
return 0;
 }
 
+static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
+  unsigned long end, unsigned long pfn,
+  pgprot_t prot)
+{
+   pud_t *pud;
+   pmd_t *pmd;
+   unsigned long addr, next;
+
+   addr = start;
+   do {
+   pud = pud_offset(pgd, addr);
+
+   if (pud_none_or_clear_bad(pud)) {
+   pmd = pmd_alloc_one(NULL, addr);
+   if (!pmd) {
+   kvm_err("Cannot allocate Hyp pmd\n");
+   return -ENOMEM;
+   }
+   pud_populate(NULL, pud, pmd);
+   get_page(virt_to_page(pud));
+   kvm_flush_dcache_to_poc(pud, sizeof(*pud));
+   }
+
+   next = pud_addr_end(addr, end);
+
+   create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
+   pfn += (next - addr) >> PAGE_SHIFT;
+   } while (addr = next, addr != end);
+
+   return 0;
+}
+
 static int __create_hyp_mappings(pgd_t *pgdp,
 unsigned long start, unsigned long end,
 unsigned long pfn, pgprot_t prot)
 {
pgd_t *pgd;
pud_t *pud;
-   pmd_t *pmd;
unsigned long addr, next;
int err = 0;
 
@@ -403,22 +434,23 @@ static int __create_hyp_mappings(pgd_t *pgdp,
end = PAGE_ALIGN(end);
do {
pgd = pgdp + pgd_index(addr);
-   pud = pud_offset(pgd, addr);
 
-   if (pud_none_or_clear_bad(pud)) {
-   pmd = pmd_alloc_one(NULL, addr);
-   if (!pmd) {
-   kvm_err("Cannot allocate Hyp pmd\n");
+   if (pgd_none(*pgd)) {
+   pud = pud_alloc_one(NULL, addr);
+   if (!pud) {
+   kvm_err("Cannot allocate Hyp pud\n");
err = -ENOMEM;
goto out;
}
-   pud_populate(NULL, pud, pmd);
-   get_page(virt_to_page(pud));
-   kvm_flush_dcache_to_poc(pud, sizeof(*pud));
+   pgd_populate(NULL, pgd, pud);
+   get_page(virt_to_page(pgd));
+   kvm_flush_dcache_to_poc(pgd, sizeof(*pgd));
}
 
next = pgd_addr_end(addr, end);
-   err = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
+
+   err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
+
if (err)
goto out;
pfn += (next - addr) >> PAGE_SHIFT;
@@ -563,6 +595,24 @@ void kvm_free_stage2_pgd(struct kvm *kvm)
kvm->arch.pgd = NULL;
 }
 
+static pud_t *stage2_get_pud(struct kvm 

[PATCH v4 6/7] arm64: mm: Implement 4 levels of translation tables

[Jungseok Lee]

This patch implements 4 levels of translation tables since 3 levels
of page tables with 4KB pages cannot support 40-bit physical address
space described in [1] due to the following issue.

It is a restriction that kernel logical memory map with 4KB + 3 levels
(0xffc0-0x) cannot cover RAM region from
544GB to 1024GB in [1]. Specifically, ARM64 kernel fails to create
mapping for this region in map_mem function since __phys_to_virt for
this region reaches to address overflow.

If SoC design follows the document, [1], over 32GB RAM would be placed
from 544GB. Even 64GB system is supposed to use the region from 544GB
to 576GB for only 32GB RAM. Naturally, it would reach to enable 4 levels
of page tables to avoid hacking __virt_to_phys and __phys_to_virt.

However, it is recommended 4 levels of page table should be only enabled
if memory map is too sparse or there is about 512GB RAM.

References
--
[1]: Principles of ARM Memory Maps, White Paper, Issue C

Cc: Catalin Marinas 
Cc: Steve Capper 
Signed-off-by: Jungseok Lee 
Reviewed-by: Sungjinn Chung 
---
 arch/arm64/Kconfig |7 +
 arch/arm64/include/asm/memblock.h  |6 +
 arch/arm64/include/asm/page.h  |4 ++-
 arch/arm64/include/asm/pgalloc.h   |   20 ++
 arch/arm64/include/asm/pgtable-hwdef.h |6 +++--
 arch/arm64/include/asm/pgtable.h   |   45 +++
 arch/arm64/include/asm/tlb.h   |9 +++
 arch/arm64/kernel/head.S   |   46 +---
 arch/arm64/kernel/traps.c  |5 
 arch/arm64/mm/fault.c  |1 +
 arch/arm64/mm/mmu.c|   16 ---
 11 files changed, 149 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7b8d429..6b01025 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -184,12 +184,19 @@ config ARM64_3_LEVELS
help
  This feature enables 3 levels of translation tables.
 
+config ARM64_4_LEVELS
+   bool "4 level"
+   depends on ARM64_4K_PAGES
+   help
+ This feature enables 4 levels of translation tables.
+
 endchoice
 
 config ARM64_VA_BITS
int "Virtual address space size"
range 39 39 if ARM64_4K_PAGES && ARM64_3_LEVELS
range 42 42 if ARM64_64K_PAGES && ARM64_2_LEVELS
+   range 48 48 if ARM64_4K_PAGES && ARM64_4_LEVELS
help
  This feature is determined by a combination of page size and
  level of translation tables.
diff --git a/arch/arm64/include/asm/memblock.h 
b/arch/arm64/include/asm/memblock.h
index 6afeed2..e4ac8bf 100644
--- a/arch/arm64/include/asm/memblock.h
+++ b/arch/arm64/include/asm/memblock.h
@@ -16,6 +16,12 @@
 #ifndef __ASM_MEMBLOCK_H
 #define __ASM_MEMBLOCK_H
 
+#ifndef CONFIG_ARM64_4_LEVELS
+#define MEMBLOCK_INITIAL_LIMIT PGDIR_SIZE
+#else
+#define MEMBLOCK_INITIAL_LIMIT PUD_SIZE
+#endif
+
 extern void arm64_memblock_init(void);
 
 #endif
diff --git a/arch/arm64/include/asm/page.h b/arch/arm64/include/asm/page.h
index 268e53d..83b5289 100644
--- a/arch/arm64/include/asm/page.h
+++ b/arch/arm64/include/asm/page.h
@@ -35,8 +35,10 @@
 
 #ifdef CONFIG_ARM64_2_LEVELS
 #include 
-#else
+#elif defined(CONFIG_ARM64_3_LEVELS)
 #include 
+#else
+#include 
 #endif
 
 extern void __cpu_clear_user_page(void *p, unsigned long user);
diff --git a/arch/arm64/include/asm/pgalloc.h b/arch/arm64/include/asm/pgalloc.h
index 4829837..8d745fa 100644
--- a/arch/arm64/include/asm/pgalloc.h
+++ b/arch/arm64/include/asm/pgalloc.h
@@ -26,6 +26,26 @@
 
 #define check_pgt_cache()  do { } while (0)
 
+#ifdef CONFIG_ARM64_4_LEVELS
+
+static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
+{
+   return (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT);
+}
+
+static inline void pud_free(struct mm_struct *mm, pud_t *pud)
+{
+   BUG_ON((unsigned long)pud & (PAGE_SIZE-1));
+   free_page((unsigned long)pud);
+}
+
+static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud)
+{
+   set_pgd(pgd, __pgd(__pa(pud) | PUD_TYPE_TABLE));
+}
+
+#endif  /* CONFIG_ARM64_4_LEVELS */
+
 #ifndef CONFIG_ARM64_2_LEVELS
 
 static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h 
b/arch/arm64/include/asm/pgtable-hwdef.h
index 9cd86c6..ba30053 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -18,8 +18,10 @@
 
 #ifdef CONFIG_ARM64_2_LEVELS
 #include 
-#else
+#elif defined(CONFIG_ARM64_3_LEVELS)
 #include 
+#else
+#include 
 #endif
 
 /*
@@ -27,7 +29,7 @@
  *
  * Level 1 descriptor (PUD).
  */
-
+#define PUD_TYPE_TABLE (_AT(pudval_t, 3) << 0)
 #define PUD_TABLE_BIT  (_AT(pgdval_t, 1) << 1)
 
 /*
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index a64ce5e..b27cc426 100644
--- 

[PATCH v4 4/7] arm64: Add a description on 48-bit address space with 4KB pages

[Jungseok Lee]

This patch adds memory layout and translation lookup information
about 48-bit address space with 4K pages. The description is based
on 4 levels of translation tables.

Cc: Catalin Marinas 
Cc: Steve Capper 
Signed-off-by: Jungseok Lee 
Reviewed-by: Sungjinn Chung 
---
 Documentation/arm64/memory.txt |   59 ++--
 1 file changed, 51 insertions(+), 8 deletions(-)

diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt
index d50fa61..8142709 100644
--- a/Documentation/arm64/memory.txt
+++ b/Documentation/arm64/memory.txt
@@ -8,10 +8,11 @@ This document describes the virtual memory layout used by the 
AArch64
 Linux kernel. The architecture allows up to 4 levels of translation
 tables with a 4KB page size and up to 3 levels with a 64KB page size.
 
-AArch64 Linux uses 3 levels of translation tables with the 4KB page
-configuration, allowing 39-bit (512GB) virtual addresses for both user
-and kernel. With 64KB pages, only 2 levels of translation tables are
-used but the memory layout is the same.
+AArch64 Linux uses 3 levels and 4 levels of translation tables with
+the 4KB page configuration, allowing 39-bit (512GB) and 48-bit (256TB)
+virtual addresses, respectively, for both user and kernel. With 64KB
+pages, only 2 levels of translation tables are used but the memory layout
+is the same.
 
 User addresses have bits 63:39 set to 0 while the kernel addresses have
 the same bits set to 1. TTBRx selection is given by bit 63 of the
@@ -21,7 +22,7 @@ The swapper_pgd_dir address is written to TTBR1 and never 
written to
 TTBR0.
 
 
-AArch64 Linux memory layout with 4KB pages:
+AArch64 Linux memory layout with 4KB pages + 3 levels:
 
 Start  End SizeUse
 ---
@@ -48,7 +49,34 @@ ffbffc00 ffbf  64MB  
modules
 ffc0    256GB  kernel logical 
memory map
 
 
-AArch64 Linux memory layout with 64KB pages:
+AArch64 Linux memory layout with 4KB pages + 4 levels:
+
+Start  End SizeUse
+---
+    256TB  user
+
+   7bfe~124TB  vmalloc
+
+7bff   7bff  64KB  [guard page]
+
+7c00   7dff   2TB  vmemmap
+
+7e00   7bbf  ~2TB  [guard, future 
vmmemap]
+
+7a00   7aff  16MB  PCI I/O space
+
+7b00   7bbf  12MB  [guard]
+
+7bc0   7bdf   2MB  earlyprintk 
device
+
+7be0   7bff   2MB  [guard]
+
+7c00   7fff  64MB  modules
+
+8000    128TB  kernel logical 
memory map
+
+
+AArch64 Linux memory layout with 64KB pages + 2 levels:
 
 Start  End SizeUse
 ---
@@ -75,7 +103,7 @@ fdfffc00 fdff  64MB  
modules
 fe00      2TB  kernel logical 
memory map
 
 
-Translation table lookup with 4KB pages:
+Translation table lookup with 4KB pages + 3 levels:
 
 +++++++++
 |6356|5548|4740|3932|3124|2316|15 8|7  0|
@@ -90,7 +118,22 @@ Translation table lookup with 4KB pages:
  +-> [63] TTBR0/1
 
 
-Translation table lookup with 64KB pages:
+Translation table lookup with 4KB pages + 4 levels:
+
++++++++++
+|6356|5548|4740|3932|3124|2316|15 8|7  0|
++++++++++
+ | | | | | |
+ | | | | | v
+ | | | | |   [11:0]  in-page offset
+ | | | | +-> [20:12] L3 index
+ | | | +---> [29:21] L2 index
+ | | +-> [38:30] L1 index
+ | +---> [47:39] L0 index
+ +-> [63] TTBR0/1
+
+
+Translation table lookup with 64KB pages + 2 levels:
 
 +++++++++
 |6356|5548|4740|3932|3124|2316|15 8|7  0|

[PATCH v4 0/7] Support 4 levels of translation tables for ARM64

[Jungseok Lee]

Hi All,

This v4 patchset supports 4 levels of tranlsation tables for ARM64.

Firstly, The patchset decouples page size from level of translation tables
as taking account into the comment from Catalin Marinas:
http://www.spinics.net/linux/lists/arm-kernel/msg319552.html

Then, it implements 4 levels of translation tables for native, HYP and
stage2 sides.

All ARMv8 and ARMv7 related changes are validated with FastModels+kvmtool and
A15+QEMU, respectively.

Changes since v1:
- fixed unmatched data types as per Steve's comment
- removed unnecessary #ifdef in arch/arm64/mm/* as per Steve's comment
- revised create_pgd_entry to deal with PUD entry as per Steve's comment
- introduced a macro for initial memblock limit as per Steve's comment
- dropped "Fix line length exceeding 80 characters" patch as per Marc's comment
- removed unnecessary #ifdef in arch/arm/kvm/mmu.c as per Marc's comment
- added a macro for a number of objects of as per Marc's comment

Changes since v2:
- revised some macros in a generic way as per Marc's comment
- added a 2 level option for kvm mmu cache allocation as per Marc's comment

Changes since v3:
- added #ifdef to decide swapper and idmap size as per Steve's comment
- introduced Steve's create_pgd_entry

Jungseok Lee (7):
  arm64: Use pr_* instead of printk
  arm64: Decouple page size from level of translation tables
  arm64: Introduce a kernel configuration option for VA_BITS
  arm64: Add a description on 48-bit address space with 4KB pages
  arm64: Add 4 levels of page tables definition with 4KB pages
  arm64: mm: Implement 4 levels of translation tables
  arm64: KVM: Implement 4 levels of translation tables for HYP and stage2

Documentation/arm64/memory.txt|   59 +--
arch/arm/include/asm/kvm_mmu.h|   10 ++
arch/arm/kvm/mmu.c|   88 ++---
arch/arm64/Kconfig|   51 +-
arch/arm64/include/asm/kvm_arm.h  |   34 +--
arch/arm64/include/asm/kvm_mmu.h  |   12 +++
arch/arm64/include/asm/memblock.h |6 ++
arch/arm64/include/asm/memory.h   |6 +-
arch/arm64/include/asm/page.h |6 +-
arch/arm64/include/asm/pgalloc.h  |   24 -
arch/arm64/include/asm/pgtable-4level-hwdef.h |   50 ++
arch/arm64/include/asm/pgtable-4level-types.h |   71 +
arch/arm64/include/asm/pgtable-hwdef.h|8 +-
arch/arm64/include/asm/pgtable.h  |   53 +-
arch/arm64/include/asm/tlb.h  |   11 ++-
arch/arm64/kernel/head.S  |   46 +++--
arch/arm64/kernel/traps.c |   19 ++--
arch/arm64/mm/fault.c |1 +
arch/arm64/mm/mmu.c   |   16 ++-
19 files changed, 508 insertions(+), 63 deletions(-)

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[PATCH v4 2/7] arm64: Decouple page size from level of translation tables

[Jungseok Lee]

This patch separates page size from level of translation tables in
configuration. It facilitates introduction of different options,
such as 4KB + 4 levels, 16KB + 4 levels and 64KB + 3 levels, easily.

Cc: Catalin Marinas 
Cc: Steve Capper 
Signed-off-by: Jungseok Lee 
Reviewed-by: Sungjinn Chung 
---
 arch/arm64/Kconfig |   36 +++-
 arch/arm64/include/asm/page.h  |2 +-
 arch/arm64/include/asm/pgalloc.h   |4 ++--
 arch/arm64/include/asm/pgtable-hwdef.h |2 +-
 arch/arm64/include/asm/pgtable.h   |8 +++
 arch/arm64/include/asm/tlb.h   |2 +-
 6 files changed, 44 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index e759af5..c7f5d65 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -144,14 +144,48 @@ endmenu
 
 menu "Kernel Features"
 
+choice
+   prompt "Page size"
+   default ARM64_4K_PAGES
+   help
+ Allows page size.
+
+config ARM64_4K_PAGES
+   bool "4KB"
+   help
+ This feature enables 4KB pages support.
+
 config ARM64_64K_PAGES
-   bool "Enable 64KB pages support"
+   bool "64KB"
help
  This feature enables 64KB pages support (4KB by default)
  allowing only two levels of page tables and faster TLB
  look-up. AArch32 emulation is not available when this feature
  is enabled.
 
+endchoice
+
+choice
+   prompt "Level of translation tables"
+   default ARM64_3_LEVELS if ARM64_4K_PAGES
+   default ARM64_2_LEVELS if ARM64_64K_PAGES
+   help
+ Allows level of translation tables.
+
+config ARM64_2_LEVELS
+   bool "2 level"
+   depends on ARM64_64K_PAGES
+   help
+ This feature enables 2 levels of translation tables.
+
+config ARM64_3_LEVELS
+   bool "3 level"
+   depends on ARM64_4K_PAGES
+   help
+ This feature enables 3 levels of translation tables.
+
+endchoice
+
 config CPU_BIG_ENDIAN
bool "Build big-endian kernel"
help
diff --git a/arch/arm64/include/asm/page.h b/arch/arm64/include/asm/page.h
index 46bf666..268e53d 100644
--- a/arch/arm64/include/asm/page.h
+++ b/arch/arm64/include/asm/page.h
@@ -33,7 +33,7 @@
 
 #ifndef __ASSEMBLY__
 
-#ifdef CONFIG_ARM64_64K_PAGES
+#ifdef CONFIG_ARM64_2_LEVELS
 #include 
 #else
 #include 
diff --git a/arch/arm64/include/asm/pgalloc.h b/arch/arm64/include/asm/pgalloc.h
index 9bea6e7..4829837 100644
--- a/arch/arm64/include/asm/pgalloc.h
+++ b/arch/arm64/include/asm/pgalloc.h
@@ -26,7 +26,7 @@
 
 #define check_pgt_cache()  do { } while (0)
 
-#ifndef CONFIG_ARM64_64K_PAGES
+#ifndef CONFIG_ARM64_2_LEVELS
 
 static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
 {
@@ -44,7 +44,7 @@ static inline void pud_populate(struct mm_struct *mm, pud_t 
*pud, pmd_t *pmd)
set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE));
 }
 
-#endif /* CONFIG_ARM64_64K_PAGES */
+#endif /* CONFIG_ARM64_2_LEVELS */
 
 extern pgd_t *pgd_alloc(struct mm_struct *mm);
 extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h 
b/arch/arm64/include/asm/pgtable-hwdef.h
index 5fc8a66..9cd86c6 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -16,7 +16,7 @@
 #ifndef __ASM_PGTABLE_HWDEF_H
 #define __ASM_PGTABLE_HWDEF_H
 
-#ifdef CONFIG_ARM64_64K_PAGES
+#ifdef CONFIG_ARM64_2_LEVELS
 #include 
 #else
 #include 
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 90c811f..a64ce5e 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -47,7 +47,7 @@ extern void __pmd_error(const char *file, int line, unsigned 
long val);
 extern void __pgd_error(const char *file, int line, unsigned long val);
 
 #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
-#ifndef CONFIG_ARM64_64K_PAGES
+#ifndef CONFIG_ARM64_2_LEVELS
 #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
 #endif
 #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
@@ -320,7 +320,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
  */
 #define mk_pte(page,prot)  pfn_pte(page_to_pfn(page),prot)
 
-#ifndef CONFIG_ARM64_64K_PAGES
+#ifndef CONFIG_ARM64_2_LEVELS
 
 #define pud_none(pud)  (!pud_val(pud))
 #define pud_bad(pud)   (!(pud_val(pud) & 2))
@@ -342,7 +342,7 @@ static inline pmd_t *pud_page_vaddr(pud_t pud)
return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
 }
 
-#endif /* CONFIG_ARM64_64K_PAGES */
+#endif /* CONFIG_ARM64_2_LEVELS */
 
 /* to find an entry in a page-table-directory */
 #define pgd_index(addr)(((addr) >> PGDIR_SHIFT) & 
(PTRS_PER_PGD - 1))
@@ -353,7 +353,7 @@ static inline pmd_t *pud_page_vaddr(pud_t pud)
 #define pgd_offset_k(addr) pgd_offset(_mm, addr)
 
 /* Find an entry in the second-level page table.. */

[PATCH v4 1/7] arm64: Use pr_* instead of printk

[Jungseok Lee]

This patch fixed the following checkpatch complaint as using pr_*
instead of printk.

WARNING: printk() should include KERN_ facility level

Cc: Catalin Marinas 
Signed-off-by: Jungseok Lee 
Reviewed-by: Sungjinn Chung 
---
 arch/arm64/kernel/traps.c |   14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 7ffaddd..0484e81 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -65,7 +65,7 @@ static void dump_mem(const char *lvl, const char *str, 
unsigned long bottom,
fs = get_fs();
set_fs(KERNEL_DS);
 
-   printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
+   pr_emerg("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
 
for (first = bottom & ~31; first < top; first += 32) {
unsigned long p;
@@ -83,7 +83,7 @@ static void dump_mem(const char *lvl, const char *str, 
unsigned long bottom,
sprintf(str + i * 9, " ");
}
}
-   printk("%s%04lx:%s\n", lvl, first & 0x, str);
+   pr_emerg("%s%04lx:%s\n", lvl, first & 0x, str);
}
 
set_fs(fs);
@@ -124,7 +124,7 @@ static void dump_instr(const char *lvl, struct pt_regs 
*regs)
break;
}
}
-   printk("%sCode: %s\n", lvl, str);
+   pr_emerg("%sCode: %s\n", lvl, str);
 
set_fs(fs);
 }
@@ -156,7 +156,7 @@ static void dump_backtrace(struct pt_regs *regs, struct 
task_struct *tsk)
frame.pc = thread_saved_pc(tsk);
}
 
-   printk("Call trace:\n");
+   pr_emerg("Call trace:\n");
while (1) {
unsigned long where = frame.pc;
int ret;
@@ -328,17 +328,17 @@ asmlinkage void bad_mode(struct pt_regs *regs, int 
reason, unsigned int esr)
 
 void __pte_error(const char *file, int line, unsigned long val)
 {
-   printk("%s:%d: bad pte %016lx.\n", file, line, val);
+   pr_crit("%s:%d: bad pte %016lx.\n", file, line, val);
 }
 
 void __pmd_error(const char *file, int line, unsigned long val)
 {
-   printk("%s:%d: bad pmd %016lx.\n", file, line, val);
+   pr_crit("%s:%d: bad pmd %016lx.\n", file, line, val);
 }
 
 void __pgd_error(const char *file, int line, unsigned long val)
 {
-   printk("%s:%d: bad pgd %016lx.\n", file, line, val);
+   pr_crit("%s:%d: bad pgd %016lx.\n", file, line, val);
 }
 
 void __init trap_init(void)
-- 
1.7.10.4


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Re: [PATCH] cpufreq: intel_pstate: Change the calculation of next pstate

[Viresh Kumar]

Cc'd Dirk,

On 28 April 2014 03:42, Stratos Karafotis  wrote:
> Currently the driver calculates the next pstate proportional to
> core_busy factor and reverse proportional to current pstate.
>
> Change the above method and calculate the next pstate independently
> of current pstate.

We must mention why the change is required.
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Re: [PATCH v2 5/5] cpufreq: Catch double invocations of cpufreq_freq_transition_begin/end

[Viresh Kumar]

On 29 April 2014 10:21, Viresh Kumar  wrote:
> Nice effort.
>
> On 29 April 2014 00:25, Srivatsa S. Bhat
>  wrote:
>> Now all such drivers have been fixed, but debugging this issue was not
>> very straight-forward (even lockdep didn't catch this). So let us add a
>> debug infrastructure to the cpufreq core to catch such issues more easily
>> in the future.
>
> BUT, I am not sure if we really need it :(
>
> I think we just got into the 'barrier' stuff as we had some doubts about it
> earlier and were quite sure that nothing else could go wrong. Otherwise
> the only problem could have been present was the second queuing
> from the same thread. And we will surely get stuck if that happens and
> we can't just miss that error..
>
>> Scenario 1: (Deadlock-free)
>> --
>>
>>  Task A Task B
>>
>> /* 1st freq transition */
>> Invoke _begin() {
>> ...
>> ...
>> }
>>
>> Change the frequency
>>
>> Got interrupt for successful
>> change of frequency.
>>
>> /* 1st freq transition */
>> Invoke _end() {
>> ...
>> ...
>> /* 2nd freq transition */   ...
>> Invoke _begin() {   ...
>> ... //waiting for B ...
>> ... //to finish _end()  }
>> ...
>> ...
>> }
>>
>>
>> This scenario is actually deadlock-free because Task A can wait inside the
>> second call to _begin() without self-deadlocking, because it is the
>> responsibility of Task B to finish the first sequence by invoking the
>> corresponding _end().

WTF, I was writing my mail and it just got send due to some stupid combination
of keys :( .. Sorry.

Also, this might not work as expected. Consider this scenario:

 /* 1st freq transition */
 Invoke _begin() {
 ...
 ...
 }

 Start Change of frequency and return
 back as there is no end from same thread.

 /* 2nd freq transition as there is nobody stopping us */
 Invoke _begin() {
 ... //waiting for B
 ... //to finish _end()
 ...
 ...
 }

  Got
interrupt for successful
  change
of frequency.

  /* 1st
freq transition */
  Invoke _end() {
 ...
 ...
 }

And your patch will probably break this ?
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Re: [PATCH v2 5/5] cpufreq: Catch double invocations of cpufreq_freq_transition_begin/end

[Viresh Kumar]

Nice effort.

On 29 April 2014 00:25, Srivatsa S. Bhat
 wrote:
> Now all such drivers have been fixed, but debugging this issue was not
> very straight-forward (even lockdep didn't catch this). So let us add a
> debug infrastructure to the cpufreq core to catch such issues more easily
> in the future.

BUT, I am not sure if we really need it :(

I think we just got into the 'barrier' stuff as we had some doubts about it
earlier and were quite sure that nothing else could go wrong. Otherwise
the only problem could have been present was the second queuing
from the same thread. And we will surely get stuck if that happens and
we can't just miss that error..

> Scenario 1: (Deadlock-free)
> --
>
>  Task A Task B
>
> /* 1st freq transition */
> Invoke _begin() {
> ...
> ...
> }
>
> Change the frequency
>
> Got interrupt for successful
> change of frequency.
>
> /* 1st freq transition */
> Invoke _end() {
> ...
> ...
> /* 2nd freq transition */   ...
> Invoke _begin() {   ...
> ... //waiting for B ...
> ... //to finish _end()  }
> ...
> ...
> }
>
>
> This scenario is actually deadlock-free because Task A can wait inside the
> second call to _begin() without self-deadlocking, because it is the
> responsibility of Task B to finish the first sequence by invoking the
> corresponding _end().
>
> By setting the value of 'transition_task' again explicitly in _end(), we
> ensure that the code won't print a false-positive warning in this case.
>
> However the same code successfully catches the following deadlock-prone
> scenario even in ASYNC_NOTIFICATION drivers:
>
> Scenario 2: (Deadlock-prone)
> --
>
>  Task A Task B
>
> /* 1st freq transition */
> Invoke _begin() {
> ...
> ...
> }
>
> /* 2nd freq transition */
> Invoke _begin() {
> ...
> ...
> }
>
> Change the frequency
>
>
> Here the bug is that Task A called the second _begin() *before* actually
> performing the 1st frequency transition. In other words, it failed to set
> Task B in motion for the 1st frequency transition, and hence it will
> self-deadlock. This is very similar to the case of drivers which do
> synchronous notification, and hence the debug infrastructure developed
> in this patch can catch this scenario easily.
>
> Signed-off-by: Srivatsa S. Bhat 
> ---
>
>  drivers/cpufreq/cpufreq.c |   12 
>  include/linux/cpufreq.h   |1 +
>  2 files changed, 13 insertions(+)
>
> diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
> index abda660..2c99a6c 100644
> --- a/drivers/cpufreq/cpufreq.c
> +++ b/drivers/cpufreq/cpufreq.c
> @@ -354,6 +354,10 @@ static void cpufreq_notify_post_transition(struct 
> cpufreq_policy *policy,
>  void cpufreq_freq_transition_begin(struct cpufreq_policy *policy,
> struct cpufreq_freqs *freqs)
>  {
> +
> +   /* Catch double invocations of _begin() which lead to self-deadlock */
> +   WARN_ON(current == policy->transition_task);
> +
>  wait:
> wait_event(policy->transition_wait, !policy->transition_ongoing);
>
> @@ -365,6 +369,7 @@ wait:
> }
>
> policy->transition_ongoing = true;
> +   policy->transition_task = current;
>
> spin_unlock(>transition_lock);
>
> @@ -378,9 +383,16 @@ void cpufreq_freq_transition_end(struct cpufreq_policy 
> *policy,
> if (unlikely(WARN_ON(!policy->transition_ongoing)))
> return;
>
> +   /*
> +* The task invoking _end() could be different from the one that
> +* invoked the _begin(). So set ->transition_task again here
> +* explicity.
> +*/
> +   policy->transition_task = current;
> cpufreq_notify_post_transition(policy, freqs, transition_failed);
>
> policy->transition_ongoing = false;
> +   policy->transition_task = NULL;
>
> wake_up(>transition_wait);
>  }
> diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
> index 5ae5100..8f44d79 100644
> --- a/include/linux/cpufreq.h
> +++ b/include/linux/cpufreq.h
> @@ -110,6 +110,7 @@ struct cpufreq_policy {
> booltransition_ongoing; /* Tracks transition 
> status */
> spinlock_t  transition_lock;
> wait_queue_head_t   transition_wait;
> +   struct task_struct  *transition_task; /* Task which is doing the 
> transition */
>  };
>
>  /* 

linux-next: manual merge of the akpm-current tree with Linus' tree

[Stephen Rothwell]

Hi Andrew,

Today's linux-next merge of the akpm-current tree got a conflict in
mm/vmacache.c between commit 50f5aa8a9b24 ("mm: don't pointlessly use
BUG_ON() for sanity check") from Linus' tree and commit 8beba5473820
("mm,vmacache: add debug data") from the akpm-current tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au

diff --cc mm/vmacache.c
index 1037a3bab505,61c38ae9f54b..
--- a/mm/vmacache.c
+++ b/mm/vmacache.c
@@@ -81,12 -93,11 +93,14 @@@ struct vm_area_struct *vmacache_find(st
for (i = 0; i < VMACACHE_SIZE; i++) {
struct vm_area_struct *vma = current->vmacache[i];
  
 -  if (vma && vma->vm_start <= addr && vma->vm_end > addr) {
 -  BUG_ON(vma->vm_mm != mm);
 +  if (!vma)
 +  continue;
 +  if (WARN_ON_ONCE(vma->vm_mm != mm))
 +  break;
-   if (vma->vm_start <= addr && vma->vm_end > addr)
++  if (vma->vm_start <= addr && vma->vm_end > addr) {
+   count_vm_vmacache_event(VMACACHE_FIND_HITS);
return vma;
+   }
}
  
return NULL;


pgpRbXIX5O7gk.pgp
Description: PGP signature

Re: [PATCH] x86-64: espfix for 64-bit mode *PROTOTYPE*

[H. Peter Anvin]

On 04/28/2014 08:45 PM, H. Peter Anvin wrote:
> 
> OK, so I found a bug in ldttest.c -- it sets CS to an LDT segment, but
> it never sets SS to an LDT segment.  This means that it should really
> have zero footprint versus the espfix code, and implies that we instead
> have another bug involved.  Why the espfix code should have any effect
> whatsoever is a mystery, however... if it indeed does?
> 
> I have uploaded a fixed ldttest.c, but it seems we might be chasing more
> than that...
> 

With the test fixed, the bug was easy to find: we can't compare against
__KERNEL_DS in the doublefault handler, because both SS and the image on
the stack have the stack segment set to zero (NULL).

With that both ldttest and run16 pass with the doublefault code, even
with randomization turned back on.

I have pushed out the fix.

There are still things that need fixing: we need to go through the
espfix path even when returning from NMI/MC (which fortunately can't
nest with taking an NMI/MC on the espfix path itself, since in that case
we will have been interrupted while running in the kernel with a kernel
stack.)

(Cc: Rostedt because of the NMI issue.)

-hpa

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Re: [PATCH 5/6] ARM: AM43xx: clk: Change the cpts ref clock source to dpll_core_m5 clk

[George Cherian]

Hi Richard,

On 4/28/2014 9:48 PM, Richard Cochran wrote:

On Mon, Apr 28, 2014 at 06:25:56PM +0530, George Cherian wrote:

In beagle bone white (AM335x)  CPTS has a choice of 2 clocksource
-dpll_core_m5_ck
-dpll_core_m4_ck
and by default  dpll_core_m5_ck is used. Where as in AM437x the
default clocksource used is dpll_core_m4_ck .

Is your patch changing the default clock for am335x?

No


If yes, it shouldn't.
If no, then the patch description should say so.

I am modifying the file

drivers/clk/ti/clk-43xx.c for am33xx its drivers/clk/ti/clk-33xx.c


Thanks,
Richard

  



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[PATCHv2 2/4] pwm: ftm-pwm: Clean up the code.

[Xiubo Li]

This patch intends to prepare for converting to direct regmap
API usage.

Signed-off-by: Xiubo Li 
---
 drivers/pwm/pwm-fsl-ftm.c | 13 ++---
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c
index 420169e..4a4ad58 100644
--- a/drivers/pwm/pwm-fsl-ftm.c
+++ b/drivers/pwm/pwm-fsl-ftm.c
@@ -21,11 +21,10 @@
 #include 
 
 #define FTM_SC 0x00
-#define FTM_SC_CLK_MASK0x3
-#define FTM_SC_CLK_SHIFT   3
-#define FTM_SC_CLK(c)  (((c) + 1) << FTM_SC_CLK_SHIFT)
+#define FTM_SC_CLK_MASK_SHIFT  3
+#define FTM_SC_CLK_MASK(3 << FTM_SC_CLK_MASK_SHIFT)
+#define FTM_SC_CLK(c)  (((c) + 1) << FTM_SC_CLK_MASK_SHIFT)
 #define FTM_SC_PS_MASK 0x7
-#define FTM_SC_PS_SHIFT0
 
 #define FTM_CNT0x04
 #define FTM_MOD0x08
@@ -258,7 +257,7 @@ static int fsl_pwm_config(struct pwm_chip *chip, struct 
pwm_device *pwm,
}
 
val = readl(fpc->base + FTM_SC);
-   val &= ~(FTM_SC_PS_MASK << FTM_SC_PS_SHIFT);
+   val &= ~FTM_SC_PS_MASK;
val |= fpc->clk_ps;
writel(val, fpc->base + FTM_SC);
writel(period - 1, fpc->base + FTM_MOD);
@@ -305,7 +304,7 @@ static int fsl_counter_clock_enable(struct fsl_pwm_chip 
*fpc)
 
/* select counter clock source */
val = readl(fpc->base + FTM_SC);
-   val &= ~(FTM_SC_CLK_MASK << FTM_SC_CLK_SHIFT);
+   val &= ~FTM_SC_CLK_MASK;
val |= FTM_SC_CLK(fpc->cnt_select);
writel(val, fpc->base + FTM_SC);
 
@@ -357,7 +356,7 @@ static void fsl_counter_clock_disable(struct fsl_pwm_chip 
*fpc)
 
/* no users left, disable PWM counter clock */
val = readl(fpc->base + FTM_SC);
-   val &= ~(FTM_SC_CLK_MASK << FTM_SC_CLK_SHIFT);
+   val &= ~FTM_SC_CLK_MASK;
writel(val, fpc->base + FTM_SC);
 
clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_CNTEN]);
-- 
1.8.4

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[PATCHv2 0/4] FTM PWM adds regmap and endianness support.

[Xiubo Li]

Convert to direct regmap API usage. Since the regmap core has already
support rich endianness modes of device, this patch convert to direct
regmap API usage, preparing to support big endianness for LS1 SoC.

Using the regmag framework will be more easy to support the endiannesses
switching of one same device driver on different SoCs.

The endianness scenarios are:
SoC |  CPU   | FTM-PWM | 'big-endian' property is needed?
||-|-
Vybird  |  LE|   LE| No
LS1 |  LE|   BE| Yes
LS2 |  LE|   LE| No



Changes in V2:
- Adds detail descriptions of these patches.


Xiubo Li (4):
  Documentation: Add 'big-endian' property for FTM PWM.
  pwm: ftm-pwm: Clean up the code.
  pwm: ftm-pwm: Convert to direct regmap API usage.
  pwm: ftm-pwm: Add big-endian support

 .../devicetree/bindings/pwm/pwm-fsl-ftm.txt| 12 ++-
 drivers/pwm/pwm-fsl-ftm.c  | 96 --
 2 files changed, 64 insertions(+), 44 deletions(-)

-- 
1.8.4

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[PATCHv2 3/4] pwm: ftm-pwm: Convert to direct regmap API usage.

[Xiubo Li]

Since the regmap core has already support rich endianness modes of
device, this patch convert to direct regmap API usage, preparing to
support big endianness for LS1 SoC.

Using the regmag framework will be more easy to support the endiannesses
switching of one same device driver on different SoCs.

Signed-off-by: Xiubo Li 
---
 drivers/pwm/pwm-fsl-ftm.c | 83 +--
 1 file changed, 44 insertions(+), 39 deletions(-)

diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c
index 4a4ad58..5d999c1 100644
--- a/drivers/pwm/pwm-fsl-ftm.c
+++ b/drivers/pwm/pwm-fsl-ftm.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define FTM_SC 0x00
@@ -82,7 +83,7 @@ struct fsl_pwm_chip {
unsigned int cnt_select;
unsigned int clk_ps;
 
-   void __iomem *base;
+   struct regmap *regmap;
 
int period_ns;
 
@@ -218,10 +219,11 @@ static unsigned long fsl_pwm_calculate_duty(struct 
fsl_pwm_chip *fpc,
unsigned long period_ns,
unsigned long duty_ns)
 {
-   unsigned long long val, duty;
+   unsigned long long duty;
+   u32 val;
 
-   val = readl(fpc->base + FTM_MOD);
-   duty = duty_ns * (val + 1);
+   regmap_read(fpc->regmap, FTM_MOD, );
+   duty = (unsigned long long)duty_ns * (val + 1);
do_div(duty, period_ns);
 
return (unsigned long)duty;
@@ -231,7 +233,7 @@ static int fsl_pwm_config(struct pwm_chip *chip, struct 
pwm_device *pwm,
  int duty_ns, int period_ns)
 {
struct fsl_pwm_chip *fpc = to_fsl_chip(chip);
-   u32 val, period, duty;
+   u32 period, duty;
 
mutex_lock(>lock);
 
@@ -256,11 +258,9 @@ static int fsl_pwm_config(struct pwm_chip *chip, struct 
pwm_device *pwm,
return -EINVAL;
}
 
-   val = readl(fpc->base + FTM_SC);
-   val &= ~FTM_SC_PS_MASK;
-   val |= fpc->clk_ps;
-   writel(val, fpc->base + FTM_SC);
-   writel(period - 1, fpc->base + FTM_MOD);
+   regmap_update_bits(fpc->regmap, FTM_SC, FTM_SC_PS_MASK,
+  fpc->clk_ps);
+   regmap_write(fpc->regmap, FTM_MOD, period - 1);
 
fpc->period_ns = period_ns;
}
@@ -269,8 +269,9 @@ static int fsl_pwm_config(struct pwm_chip *chip, struct 
pwm_device *pwm,
 
duty = fsl_pwm_calculate_duty(fpc, period_ns, duty_ns);
 
-   writel(FTM_CSC_MSB | FTM_CSC_ELSB, fpc->base + FTM_CSC(pwm->hwpwm));
-   writel(duty, fpc->base + FTM_CV(pwm->hwpwm));
+   regmap_write(fpc->regmap, FTM_CSC(pwm->hwpwm),
+FTM_CSC_MSB | FTM_CSC_ELSB);
+   regmap_write(fpc->regmap, FTM_CV(pwm->hwpwm), duty);
 
return 0;
 }
@@ -282,31 +283,28 @@ static int fsl_pwm_set_polarity(struct pwm_chip *chip,
struct fsl_pwm_chip *fpc = to_fsl_chip(chip);
u32 val;
 
-   val = readl(fpc->base + FTM_POL);
+   regmap_read(fpc->regmap, FTM_POL, );
 
if (polarity == PWM_POLARITY_INVERSED)
val |= BIT(pwm->hwpwm);
else
val &= ~BIT(pwm->hwpwm);
 
-   writel(val, fpc->base + FTM_POL);
+   regmap_write(fpc->regmap, FTM_POL, val);
 
return 0;
 }
 
 static int fsl_counter_clock_enable(struct fsl_pwm_chip *fpc)
 {
-   u32 val;
int ret;
 
if (fpc->use_count != 0)
return 0;
 
/* select counter clock source */
-   val = readl(fpc->base + FTM_SC);
-   val &= ~FTM_SC_CLK_MASK;
-   val |= FTM_SC_CLK(fpc->cnt_select);
-   writel(val, fpc->base + FTM_SC);
+   regmap_update_bits(fpc->regmap, FTM_SC, FTM_SC_CLK_MASK,
+  FTM_SC_CLK(fpc->cnt_select));
 
ret = clk_prepare_enable(fpc->clk[fpc->cnt_select]);
if (ret)
@@ -326,13 +324,10 @@ static int fsl_counter_clock_enable(struct fsl_pwm_chip 
*fpc)
 static int fsl_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 {
struct fsl_pwm_chip *fpc = to_fsl_chip(chip);
-   u32 val;
int ret;
 
mutex_lock(>lock);
-   val = readl(fpc->base + FTM_OUTMASK);
-   val &= ~BIT(pwm->hwpwm);
-   writel(val, fpc->base + FTM_OUTMASK);
+   regmap_update_bits(fpc->regmap, FTM_OUTMASK, BIT(pwm->hwpwm), 0);
 
ret = fsl_counter_clock_enable(fpc);
mutex_unlock(>lock);
@@ -342,8 +337,6 @@ static int fsl_pwm_enable(struct pwm_chip *chip, struct 
pwm_device *pwm)
 
 static void fsl_counter_clock_disable(struct fsl_pwm_chip *fpc)
 {
-   u32 val;
-
/*
 * already disabled, do nothing
 */
@@ -355,9 +348,7 @@ static void fsl_counter_clock_disable(struct fsl_pwm_chip 
*fpc)
return;
 
/* no users left, disable PWM counter clock */
-   val = readl(fpc->base + FTM_SC);
-   val &= ~FTM_SC_CLK_MASK;
-   

[PATCHv2 4/4] pwm: ftm-pwm: Add big-endian support

[Xiubo Li]

This add the big endianness support for the FTM PWM driver, which
will run on LS1 SoC.

Now for the following scenarios:
 SoC |  CPU   | FTM-PWM | 'big-endian' property is needed?
-||-|-
Vybird   |  LE|   LE| No
 LS1 |  LE|   BE| Yes
 LS2 |  LE|   LE| No

Signed-off-by: Xiubo Li 
---
 drivers/pwm/pwm-fsl-ftm.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c
index 5d999c1..9a82741 100644
--- a/drivers/pwm/pwm-fsl-ftm.c
+++ b/drivers/pwm/pwm-fsl-ftm.c
@@ -409,6 +409,7 @@ static struct regmap_config fsl_pwm_regmap_config = {
 
 static int fsl_pwm_probe(struct platform_device *pdev)
 {
+   struct device_node *np = pdev->dev.of_node;
struct fsl_pwm_chip *fpc;
struct resource *res;
void __iomem *base;
@@ -422,6 +423,11 @@ static int fsl_pwm_probe(struct platform_device *pdev)
 
fpc->chip.dev = >dev;
 
+   if (of_property_read_bool(np, "big-endian"))
+   fsl_pwm_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
+   else
+   fsl_pwm_regmap_config.val_format_endian = REGMAP_ENDIAN_NATIVE;
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(>dev, res);
if (IS_ERR(base))
-- 
1.8.4

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[PATCHv2 1/4] Documentation: Add 'big-endian' property for FTM PWM.

[Xiubo Li]

This add the big endianness usage in the binding docuementation, which
will run on LS1 SoC.

Now for the following scenarios:
SoC |  CPU   | FTM-PWM | 'big-endian' property is needed?
||-|-
Vybird  |  LE|   LE| No
LS1 |  LE|   BE| Yes
LS2 |  LE|   LE| No

Signed-off-by: Xiubo Li 
---
 Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt | 12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt 
b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
index 0bda229..346e2eb 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
@@ -1,5 +1,13 @@
 Freescale FlexTimer Module (FTM) PWM controller
 
+The endianness of the FTM PWM devices on different SoCs:
+SoC |  CPU   | FTM-PWM | 'big-endian' property is needed?
+||-|-
+Vybird  |  LE|   LE| No
+LS1 |  LE|   BE| Yes
+LS2 |  LE|   LE| No
+
+
 Required properties:
 - compatible: Should be "fsl,vf610-ftm-pwm".
 - reg: Physical base address and length of the controller's registers
@@ -16,7 +24,8 @@ Required properties:
 - pinctrl-names: Must contain a "default" entry.
 - pinctrl-NNN: One property must exist for each entry in pinctrl-names.
   See pinctrl/pinctrl-bindings.txt for details of the property values.
-
+- big-endian: One boolean property, for all the device registers, the BE mode
+  will be in use if it's present, or the LE mode will be in use.
 
 Example:
 
@@ -32,4 +41,5 @@ pwm0: pwm@40038000 {
< VF610_CLK_FTM0_EXT_FIX_EN>;
pinctrl-names = "default";
pinctrl-0 = <_pwm0_1>;
+   big-endian;
 };
-- 
1.8.4

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Re: [PATCH v5 0/8] Introduce new cpufreq helper macros

[Viresh Kumar]

On 26 April 2014 01:45, Stratos Karafotis  wrote:
> This patch set introduces two freq_table helper macros which
> can be used for iteration over cpufreq_frequency_table and
> makes the necessary changes to cpufreq core and drivers that
> use such an iteration procedure.
>
> The motivation was a usage of common procedure to iterate over
> cpufreq_frequency_table across all drivers and cpufreq core.
>
> This was tested on a x86_64 platform.
> Most files compiled successfully but unfortunately I was not
> able to compile sh_sir.c pasemi_cpufreq.c and ppc_cbe_cpufreq.c
> due to lack of cross compiler.
>
> Changelog
>
> v4 -> v5
> - Fix warnings in printk format specifier for 32 bit
>   architectures in freq_table.c, longhaul, pasemi, ppc_cbe

Doesn't look much has changed and so it stays as is:

Acked-by: Viresh Kumar 
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Re: [PATCH v3 6/7] arm64: mm: Implement 4 levels of translation tables

[Jungseok Lee]

On Monday, April 28, 2014 10:24 PM, Steve Capper wrote:
> On Sun, Apr 27, 2014 at 12:37:35PM +0900, Jungseok Lee wrote:
> > On Thursday, April 24, 2014 1:02 AM, Steve Capper wrote:
> > > On Fri, Apr 18, 2014 at 04:59:20PM +0900, Jungseok Lee wrote:
> 
> [ ... ]
> 
> > >
> > > This is overly complicated. For <4 levels we set x0 to be:
> > > ttbr1 + 2*PAGE_SIZE. For 4-levels, we set x0 to be ttbr1 +
> > > PAGE_SIZE, then inside the create_pgd_entry macro, we check the VA
> > > for FIXADDR_TOP then add another PAGE_SIZE. This is presumably done so 
> > > the same PUD is used for
> the swapper block map and the FIXADDR map.
> >
> > Is it too complicated to understand the logic?
> >
> > 1) For <4 levels:
> > PAGE_SIZE is added for FIXADDR map and x0 is passed to create pgd entry.
> > 2) For =4 levels:
> > PAGE_SIZE is added in the create_pgd_entry macro since FIXADDR map
> > info is needed to create pud entry.
> >
> > However, I agree that the code should be revised if other people feel
> > like it is a labyrinthine logic.
> >
> > > If you assume that the PUD always follows the PGD for 4-levels, then
> > > you can remove this #ifdef and the conditional VA logic in
> > > set_pgd_entry. To make the logic simpler for <4 levels, you could call 
> > > create_pud_entry in the
> middle of create_pgd_entry, then put down the actual pgd after.
> >
> > create_pud_entry should distinguish block map from FIXADDR map
> > although PUD always follows the PGD in case of 4 levels. If we would
> > like to avoid unnecessary #ifdef, the conditional logic should be
> > introduced in create_ pgd_entry macro.
> >
> > I cannot find the "best" way even though I've tried to figure it out.
> > I would like to find out the most clear and self-descriptive expression.
> >
> > Could you give an idea on how to remove both conditional VA logic and 
> > #ifdef?
> 
> 
> Hello Jungseok,
> I had the following logic in my head:
> It compiles and runs on the model, but I've not tried it in anger.

Hello Steve,
It works well as both host and guest on the model.

> =
> 
>   .macro create_pud_entry, pgd, tbl, virt, pud, tmp1, tmp2 #ifdef 
> CONFIG_ARM64_4_LEVELS
>   add \tbl, \tbl, #PAGE_SIZE  // bump tbl 1 page up.
>   // to make room for pud
>   add \pud, \pgd, #PAGE_SIZE  // pgd points to pud which
>   // follows pgd
>   lsr \tmp1, \virt, #PUD_SHIFT
>   and \tmp1, \tmp1, #PTRS_PER_PUD - 1 // PUD index
>   orr \tmp2, \tbl, #3 // PUD entry table type
>   str \tmp2, [\pud, \tmp1, lsl #3]
> #else
>   mov \pud, \tbl  // pgd points to section table
>   // directly for < 4 levels
> #endif
>   .endm
> 
> /*
>  * Macro to populate the PGD for the corresponding block entry in the next
>  * level (tbl) for the given virtual address.
>  *
>  * Preserves: pgd, virt
>  * Corrupts:  tmp1, tmp2, tmp3
>  * Returns:   tbl -> page where block mappings can be placed
>  *(changed to make room for pud with 4levels, preserved otherwise)
>  */
>   .macro  create_pgd_entry, pgd, tbl, virt, tmp1, tmp2, tmp3
>   create_pud_entry \pgd, \tbl, \virt, \tmp3, \tmp1, \tmp2
>   lsr \tmp1, \virt, #PGDIR_SHIFT
>   and \tmp1, \tmp1, #PTRS_PER_PGD - 1 // PGD index
>   orr \tmp2, \tmp3, #3// PGD entry table type
>   str \tmp2, [\pgd, \tmp1, lsl #3]
>   .endm
> 
> =
> 
> [Note I've changed the extra argument to create_pgd_entry to be at the end to 
> make it easier to diff
> callers]
> 
> So essentially, we bump up tbl if we are running with 4 levels of page table. 
> We put the pgd down
> after the pud, and this allows us to sneak a pud in after the pgd if we need 
> to, otherwise it points
> to the target for the section mapping.
> 
> Does this work for you? (I go cross-eyed with too much assembler, so could 
> have easily missed
> something).

It is a better description compared to my logic.
I fully understand your intention now.
It would be good to adopt your code instead of mine.

How about participating as an author of this part if you are okay?

I am posting v4 patches as soon as possible and then
figuring out a way to take you as an author of this head.S.

> >
> > > > +   create_pgd_entry x26, x0, x1, x5, x6, x7
> > > >
> > >
> > > So before this patch we have the following created by
> > > __create_page_tables:
> > >
> > > ++ <--- TEXT_OFFSET + PHYS_OFFSET
> > > | FIXADDR (pmd or pte)   |
> > > ++
> > > | block map (pmd or pte) |
> > > ++
> > > | PGDs for swapper   |
> > > ++ <--- TTBR1 swapper_pg_dir
> > > | block map for idmap  

Re: [PATCH 3.2 00/94] 3.2.58-rc1 review

[Guenter Roeck]

On 04/27/2014 06:11 PM, Ben Hutchings wrote:

This is the start of the stable review cycle for the 3.2.58 release.
There are 94 patches in this series, which will be posted as responses
to this one.  If anyone has any issues with these being applied, please
let me know.

Responses should be made by Wed Apr 30 08:00:00 UTC 2014.
Anything received after that time might be too late.



Build results:
total: 116 pass: 85 skipped: 22 fail: 9

Qemu tests all passed.

There are two new failures, i386:allyesconfig and i386:allmodconfig.

Error in both cases is:

drivers/cpufreq/powernow-k6.c: In function 'powernow_k6_cpu_init':
drivers/cpufreq/powernow-k6.c:218:22: error: 'struct cpufreq_frequency_table' 
has no member named 'driver_data'

Guenter

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Re: [PATCH 1/3] sched, balancing: Update rq->max_idle_balance_cost whenever newidle balance is attempted

[Preeti U Murthy]

On 04/28/2014 11:34 PM, Jason Low wrote:
> On Sun, 2014-04-27 at 14:01 +0530, Preeti Murthy wrote:
>> Hi Jason, Peter,
>>
>> The below patch looks good to me except for one point.
>>
>> In idle_balance() the below code snippet does not look right:
>>
>> - if (pulled_task || time_after(jiffies, this_rq->next_balance)) {
>> - /*
>> - * We are going idle. next_balance may be set based on
>> - * a busy processor. So reset next_balance.
>> - */
>> +out:
>> + /* Move the next balance forward */
>> + if (time_after(this_rq->next_balance, next_balance))
>>   this_rq->next_balance = next_balance;
>> - }
>>
>> By not checking this_rq->next_balance against jiffies,
>> we might end up not updating this parameter when it
>> has expired.
>>
>> So shouldn't it be:
>>
>> if (time_after(jiffies, this_rq->next_balance) ||
>>time_after(this_rq->next_balance, next_balance))
>> this_rq->next_balance = next_balance;
> 
> Hi Preeti,
> 
> If jiffies is after this_rq->next_balance, doesn't that mean that it's
> actually due for a periodic balance and we wouldn't need to modify it?
> In rebalance_domains(), we do load_balance if time_after_eq(jiffies,
> sd->last_balance + interval).

Right. So I missed the point that we don't really have a problem with
the rq->next_balance being expired. It will anyway ensure that in the
next call to rebalance_domains() load balancing will be done and that is
all we want. Thanks for pointing it out.

Regards
Preeti U Murthy
> 
>>
>> Besides this:
>> Reviewed-by: Preeti U Murthy 
> 
> Thanks for the review.
> 

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Re: [PATCH] x86-64: espfix for 64-bit mode *PROTOTYPE*

[H. Peter Anvin]

On 04/28/2014 08:45 PM, H. Peter Anvin wrote:
> 
> OK, so I found a bug in ldttest.c -- it sets CS to an LDT segment, but
> it never sets SS to an LDT segment.  This means that it should really
> have zero footprint versus the espfix code, and implies that we instead
> have another bug involved.  Why the espfix code should have any effect
> whatsoever is a mystery, however... if it indeed does?
> 
> I have uploaded a fixed ldttest.c, but it seems we might be chasing more
> than that...
> 

In particular, I was already wondered how we avoid an "upside down
swapgs" with a #GP on IRET.  The answer might be that we don't...

-hpa


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Re: [PATCH] x86-64: espfix for 64-bit mode *PROTOTYPE*

[H. Peter Anvin]

On 04/28/2014 07:38 PM, H. Peter Anvin wrote:
> On 04/28/2014 05:20 PM, Andrew Lutomirski wrote:
>>
>> ldttest segfaults on 3.13 and 3.14 for me.  It reboots (triple fault?)
>> on your branch.  It even said this:
>>
>> qemu-system-x86_64: 9pfs:virtfs_reset: One or more uncluncked fids
>> found during reset
>>
>> I have no idea what an uncluncked fd is :)
>>
> 
> It means 9p wasn't properly shut down.
> 

OK, so I found a bug in ldttest.c -- it sets CS to an LDT segment, but
it never sets SS to an LDT segment.  This means that it should really
have zero footprint versus the espfix code, and implies that we instead
have another bug involved.  Why the espfix code should have any effect
whatsoever is a mystery, however... if it indeed does?

I have uploaded a fixed ldttest.c, but it seems we might be chasing more
than that...

-hpa


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Re: [RFC] power_supply: Introduce generic psy charging driver

[Jenny Tc]

On Mon, Apr 28, 2014 at 07:56:06PM +0200, Pavel Machek wrote:
> On Mon 2014-04-28 22:24:36, Jenny Tc wrote:
> > Dmitry/Pavel,
> > 
> > Request your feedback on this. Fixed the comments from Pavel and waiting 
> > for 
> > your feedback on the changes
> 
> IIRC, my latest comments were "this is completely misdesigned, it is
> using strings and table searches where it should use pointers". Did
> that change?

Yes, that's changed.

> 
> -- 
> (english) http://www.livejournal.com/~pavelmachek
> (cesky, pictures) 
> http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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Re: [RFC] A new CPU load metric for power-efficient scheduler: CPU ConCurrency

[Yuyang Du]

> I'm a bit confused, do you have one global CC that tracks the number of
> tasks across all runqueues in the system or one for each cpu? There
> could be some contention when updating that value on larger systems if
> it one global CC. If they are separate, how do you then decide when to
> consolidate? 

Oh, we are getting down to business. Currently, CC is per CPU. To consolidate,
the formula is based on a heuristic. Because:

suppose we have 2 CPUs, their task concurrency over time is ('-' means no
task, 'x' having tasks):

1)
CPU0: ----- (CC[0])
CPU1: - (CC[1])

2)
CPU0: ----- (CC[0])
CPU1: ----- (CC[1])

If we consolidate CPU0 and CPU1, the consolidated CC will be: CC' = CC[0] +
CC[1] for case 1 and CC'' = (CC[0] + CC[1]) * 2 for case 2. For the cases
in between case 1 and 2 in terms of how xxx overlaps, the CC should be between
CC' and CC''. So, we uniformly use this condition to evaluate for
consolidation (suppose we consolidate m CPUs to n CPUs, m > n):

(CC[0] + CC[1] + ... + CC[m-2] + CC[m-1]) * (n + log(m-n)) >= How do you determine your "f" parameter? How fast is the reaction time?
> If you have had a period of consolidation and have a bunch of tasks
> waking up at the same time. How long will it be until you spread the
> load to all cpus?

Per CPU vs. per task? This is really not about who is (more) informative or
not, or why not both or not. It is about when you have task concurrency and
CPU utilization at the same time, and you must make a fast decision right now,
then what? Actually, it is also about how I want to position the whole CC
fuss. CC and the associated CPU workload consolidation can be regarded as
another "layer" beneath the current sophisticated load balancing, such that
this layer senses globally how many CPUs are needed and then do whatever it is
currently supposed to do in the needed CPUs. I think this is only a design
choice that is effective but simpler and less intrusive to just realize
consolidation/packing.

> It seems to me that you are loosing some important information by
> tracking per cpu and not per task. Also, your load balance behaviour is
> very sensitive to the choice of decay factor. We have that issue with
> the runqueue load tracking already. It reacts very slowly to load
> changes, so it can't really be used for periodic load-balancing
> decisions.

The current halflife is 1 period, and the period was 32ms, and now 64ms for
more aggressive consolidation.

Thanks,
Yuyang
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Re: [PATCH tip/core/rcu 0/3] Miscellaneous fixes for 3.16

[Josh Triplett]

On Mon, Apr 28, 2014 at 04:56:00PM -0700, Paul E. McKenney wrote:
> Hello!
> 
> This series provides miscellaneous fixes:
> 
> 1.Apply ACCESS_ONCE() to unprotected ->gp_flags accesses.
> 
> 2.Fix typo in comment, courtesy of Liu Ping Fan.
> 
> 3.Make RCU CPU stall warnings print grace-period numbers in
>   signed format to improve readability of stall-warning output.
> 
> 4.Make cpu_needs_another_gp() take future grace-period needs
>   into account.
> 
> 5.Remove unused ->preemptible field from the rcu_data structure,
>   courtesty of Iulia Manda.
> 
> 6.Apply ACCESS_ONCE() to unprotected ->jiffies_stall accesses,
>   courtesty of Iulia Manda.
> 
> 7.Make callers responsible for grace-period kthread wakeup in
>   order to avoid potential silent grace-period stalls.
> 
> 8.Remove "extern" from RCU function declarations, courtesy of
>   Iulia Manda.
> 
> 9.Apply ACCESS_ONCE() to additional ->jiffies_stall accesses,
>   courtesy of Himangi Saraogi.
> 
> 10.   Add event tracing to dyntick_save_progress_counter(), courtesy
>   of Andreea-Cristina Bernat.
> 
> 11.   Make rcu_init_one() use nr_cpu_ids instead of NR_CPUS for
>   data-structure setup limit check, courtesy of Himangi Saraogi.
> 
> 12.   Remove redundant kfree_call_rcu() definition by using the
>   rcu_state pointer, courtesy of Andreea-Cristina Bernat.
> 
> 13.   Merge rcu_sched_force_quiescent_state() definition with
>   rcu_force_quiescent_state() by using the rcu_state pointer,
>   courtesy of Andreea-Cristina Bernat.
> 
> 14.   Document RCU_INIT_POINTER()'s lack of ordering guarantees.
> 
> 15.   Automatically bind RCU's grace-period kthreads to timekeeping
>   CPU for NO_HZ_FULL builds.
> 
> 16.   Make large and small sysidle systems use equivalent state machine.
> 
> 17.   Remove duplicate resched_cpu() declaration, courtesy of
>   Pranith Kumar.
> 
> 18.   Replace deprecated __this_cpu_ptr() uses with raw_cpu_ptr(),
>   courtesy of Christoph Lameter.
> 
> 19.   Make softirq processing provide a quiescent state only once
>   per full pass over all softirqs rather than once per action,
>   courtesy of Eric Dumazet.

For all 19:
Reviewed-by: Josh Triplett 
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[PATCH] Input: implement managed polled input devices

[Dmitry Torokhov]

Managed resources are becoming more and more popular in drivers. Let's
implement managed polled input devices, to complement managed regular input
devices.

Similarly to managed regular input devices only one new call
devm_input_allocate_polled_device() is added and the rest of APIs is
modified to work with both managed and non-managed devices.

Signed-off-by: Dmitry Torokhov 
---
 drivers/input/input-polldev.c | 113 +-
 include/linux/input-polldev.h |   3 ++
 2 files changed, 115 insertions(+), 1 deletion(-)

diff --git a/drivers/input/input-polldev.c b/drivers/input/input-polldev.c
index 4b19190..27961fc 100644
--- a/drivers/input/input-polldev.c
+++ b/drivers/input/input-polldev.c
@@ -176,6 +176,90 @@ struct input_polled_dev *input_allocate_polled_device(void)
 }
 EXPORT_SYMBOL(input_allocate_polled_device);
 
+struct input_polled_devres {
+   struct input_polled_dev *polldev;
+};
+
+static int devm_input_polldev_match(struct device *dev, void *res, void *data)
+{
+   struct input_polled_devres *devres = res;
+
+   return devres->polldev == data;
+}
+
+static void devm_input_polldev_release(struct device *dev, void *res)
+{
+   struct input_polled_devres *devres = res;
+   struct input_polled_dev *polldev = devres->polldev;
+
+   dev_dbg(dev, "%s: dropping reference/freeing %s\n",
+   __func__, dev_name(>input->dev));
+
+   input_put_device(polldev->input);
+   kfree(polldev);
+}
+
+static void devm_input_polldev_unregister(struct device *dev, void *res)
+{
+   struct input_polled_devres *devres = res;
+   struct input_polled_dev *polldev = devres->polldev;
+
+   dev_dbg(dev, "%s: unregistering device %s\n",
+   __func__, dev_name(>input->dev));
+   input_unregister_device(polldev->input);
+
+   /*
+* Note that we are still holding extra reference to the input
+* device so it will stick around until devm_input_polldev_release()
+* is called.
+*/
+}
+
+/**
+ * devm_input_allocate_polled_device - allocate managed polled device
+ * @dev: device owning the polled device being created
+ *
+ * Returns prepared  input_polled_dev or %NULL.
+ *
+ * Managed polled input devices do not need to be explicitly unregistered
+ * or freed as it will be done automatically when owner device unbinds
+ * from * its driver (or binding fails). Once such managed polled device
+ * is allocated, it is ready to be set up and registered in the same
+ * fashion as regular polled input devices (using
+ * input_register_polled_device() function).
+ *
+ * If you want to manually unregister and free such managed polled devices,
+ * it can be still done by calling input_unregister_polled_device() and
+ * input_free_polled_device(), although it is rarely needed.
+ *
+ * NOTE: the owner device is set up as parent of input device and users
+ * should not override it.
+ */
+struct input_polled_dev *devm_input_allocate_polled_device(struct device *dev)
+{
+   struct input_polled_dev *polldev;
+   struct input_polled_devres *devres;
+
+   devres = devres_alloc(devm_input_polldev_release, sizeof(*devres),
+ GFP_KERNEL);
+   if (!devres)
+   return NULL;
+
+   polldev = input_allocate_polled_device();
+   if (!polldev) {
+   devres_free(devres);
+   return NULL;
+   }
+
+   polldev->input->dev.parent = dev;
+   polldev->devres_managed = true;
+
+   devres->polldev = polldev;
+   devres_add(dev, devres);
+
+   return polldev;
+}
+
 /**
  * input_free_polled_device - free memory allocated for polled device
  * @dev: device to free
@@ -186,7 +270,12 @@ EXPORT_SYMBOL(input_allocate_polled_device);
 void input_free_polled_device(struct input_polled_dev *dev)
 {
if (dev) {
-   input_free_device(dev->input);
+   if (dev->devres_managed)
+   WARN_ON(devres_destroy(dev->input->dev.parent,
+   devm_input_polldev_release,
+   devm_input_polldev_match,
+   dev));
+   input_put_device(dev->input);
kfree(dev);
}
 }
@@ -204,9 +293,19 @@ EXPORT_SYMBOL(input_free_polled_device);
  */
 int input_register_polled_device(struct input_polled_dev *dev)
 {
+   struct input_polled_devres *devres = NULL;
struct input_dev *input = dev->input;
int error;
 
+   if (dev->devres_managed) {
+   devres = devres_alloc(devm_input_polldev_unregister,
+ sizeof(*devres), GFP_KERNEL);
+   if (!devres)
+   return -ENOMEM;
+
+   devres->polldev = dev;
+   }
+
input_set_drvdata(input, dev);
INIT_DELAYED_WORK(>work, input_polled_device_work);
 
@@ -233,6 +332,12 @@ int 

Re: [PATCH v2 00/12] scsi/NCR5380: fix debugging macros and #include structure

[Michael Schmitz]

Finn,

On Tue, Apr 29, 2014 at 2:22 PM, Finn Thain  wrote:
>
> On Sat, 26 Apr 2014, James Bottomley wrote:
>
>> OK, so this is a pretty big change to an unmaintained driver.  I'll take
>> it if you're willing to maintain the driver afterwards ... in which case
>> I need another patch to add you to the MAINTAINERS file.
>
> Sure, I'm happy to support these patches and future work I plan to do on
> the driver.
>
> What additional responsibilities would come with adding my name the
> MAINTAINERS file?
>
> Perhaps Michael and Sam would be interested in sharing the role, for atari
> and sun3 NCR5380 drivers (?)

If you insist ...

(kidding - I"m OK with it if James thinks it's worth it)

Cheers,

  Michael

>
> I only have hardware to test mac_scsi but I can obtain a Domex DMX3191D
> PCI card on ebay.
>
> --
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Re: [PATCH 1/3] sched, balancing: Update rq->max_idle_balance_cost whenever newidle balance is attempted

[Preeti U Murthy]

On 04/28/2014 02:54 PM, Peter Zijlstra wrote:
> On Sun, Apr 27, 2014 at 02:01:45PM +0530, Preeti Murthy wrote:
>> Hi Jason, Peter,
>>
>> The below patch looks good to me except for one point.
>>
>> In idle_balance() the below code snippet does not look right:
>>
>> - if (pulled_task || time_after(jiffies, this_rq->next_balance)) {
>> - /*
>> - * We are going idle. next_balance may be set based on
>> - * a busy processor. So reset next_balance.
>> - */
>> +out:
>> + /* Move the next balance forward */
>> + if (time_after(this_rq->next_balance, next_balance))
>>   this_rq->next_balance = next_balance;
>> - }
>>
>> By not checking this_rq->next_balance against jiffies,
>> we might end up not updating this parameter when it
>> has expired.
>>
>> So shouldn't it be:
>>
>> if (time_after(jiffies, this_rq->next_balance) ||
>>time_after(this_rq->next_balance, next_balance))
>> this_rq->next_balance = next_balance;
> 
> So the reason I didn't do that is that nothing else does that either.
> Also, note that the value we set rq->next_balance to might itself
> already be expired. There is no guarantee that last_balance + interval
> is in the future.
> 
Hmm this makes sense. Thanks!

Regards
Preeti U Murthy

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Re: [PATCH v2 6/6] powerpc/perf/hv-24x7: catalog version number is be64, not be32

[Michael Ellerman]

On Sun, 2014-04-27 at 21:59 -0700, Cody P Schafer wrote:
> On 04/27/2014 09:47 PM, Benjamin Herrenschmidt wrote:
> > On Tue, 2014-04-15 at 10:10 -0700, Cody P Schafer wrote:
> >> The catalog version number was changed from a be32 (with proceeding
> >> 32bits of padding) to a be64, update the code to treat it as a be64
> >>
> >> Signed-off-by: Cody P Schafer 
> >> --
> >
> > Have you tested this ?
> >
> > It doesn't build for me:
> >
> > arch/powerpc/perf/hv-24x7.c: In function 'catalog_read':
> > arch/powerpc/perf/hv-24x7.c:223:3: error: format '%d' expects argument of 
> > type 'int', but argument 2 has type 'uint64_t' [-Werror=format]
> > cc1: all warnings being treated as errors
> 
> I have, and I wasn't initially sure how I managed to miss that 
> warning-as-error. On examination: My config (for some reason) has 
> CONFIG_PPC_DISABLE_WERROR=y set (probably because it's a variation of a 
> distro config).

Please test build with ppc64_defconfig at least.

cheers


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Re: [PATCH 1/5] staging: rtl8188eu: fix potential leak in rtw_wx_read32()

[Larry Finger]

On 04/28/2014 03:56 PM, Christian Engelmayer wrote:

Function rtw_wx_read32() dynamically allocates a temporary buffer that is not
freed in all error paths. Use a centralized exit path and make sure that all
memory is freed correctly. Detected by Coverity - CID 1077711.

Signed-off-by: Christian Engelmayer 


Acked-by: Larry Finger 

This Ack is valid for all 5 patches.

Larry


---
  drivers/staging/rtl8188eu/os_dep/ioctl_linux.c | 15 +--
  1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c 
b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c
index cf30a08..45b47e2 100644
--- a/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c
+++ b/drivers/staging/rtl8188eu/os_dep/ioctl_linux.c
@@ -2154,6 +2154,7 @@ static int rtw_wx_read32(struct net_device *dev,
u32 bytes;
u8 *ptmp;
int rv;
+   int ret = 0;

padapter = (struct adapter *)rtw_netdev_priv(dev);
p = >data;
@@ -2163,16 +2164,16 @@ static int rtw_wx_read32(struct net_device *dev,
return -ENOMEM;

if (copy_from_user(ptmp, p->pointer, len)) {
-   kfree(ptmp);
-   return -EFAULT;
+   ret = -EFAULT;
+   goto exit;
}

bytes = 0;
addr = 0;
rv = sscanf(ptmp, "%d,%x", , );
if (rv != 2) {
-   kfree(ptmp);
-   return -EINVAL;
+   ret = -EINVAL;
+   goto exit;
}

switch (bytes) {
@@ -2190,12 +2191,14 @@ static int rtw_wx_read32(struct net_device *dev,
break;
default:
DBG_88E(KERN_INFO "%s: usage> read [bytes],[address(hex)]\n", 
__func__);
-   return -EINVAL;
+   ret = -EINVAL;
+   goto exit;
}
DBG_88E(KERN_INFO "%s: addr = 0x%08X data =%s\n", __func__, addr, 
extra);

+exit:
kfree(ptmp);
-   return 0;
+   return ret;
  }

  static int rtw_wx_write32(struct net_device *dev,



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Re: [PATCH] usb: xhci: Correct last context entry calculation for Configure Endpoint

[Julius Werner]

*bump*

Sarah, Mathias, can we decide how to proceed with this? I think the
section Alan quoted is a pretty good argument in favor of my
interpretation (although of course this would not be the first time
that two sections of a spec contradict each other). But more
importantly, we have a case that just generates a clearly wrong Slot
Context right now (the one that only drops endpoints), and I see no
way how you could construct a correct Slot Context for that case with
Sarah's interpretation. We need to resolve that somehow.
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Re: [PATCH v2] rwsem: Support optimistic spinning

[Davidlohr Bueso]

On Mon, 2014-04-28 at 17:50 -0700, Tim Chen wrote:
> On Mon, 2014-04-28 at 16:10 -0700, Paul E. McKenney wrote:
> 
> > > +#ifdef CONFIG_SMP
> > > +static inline bool rwsem_can_spin_on_owner(struct rw_semaphore *sem)
> > > +{
> > > + int retval;
> > > + struct task_struct *owner;
> > > +
> > > + rcu_read_lock();
> > > + owner = ACCESS_ONCE(sem->owner);
> > 
> > OK, I'll bite...
> > 
> > Why ACCESS_ONCE() instead of rcu_dereference()?
> 
> We're using it as a speculative check on the sem->owner to see
> if the owner is running on the cpu.  The rcu_read_lock
> is used for ensuring that the owner->on_cpu memory is
> still valid.

Something worth documenting in the code, imho. I'll add it in an
eventual v3.

Thanks,
Davidlohr

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Re: [PATCH v2 2/5] x86/PCI: Support additional MMIO range capabilities

[Suravee Suthikulanit]

On 4/25/2014 5:24 PM, Myron Stowe wrote:

On Sun, Apr 20, 2014 at 1:59 AM, Borislav Petkov  wrote:

Drop Andreas' old email address from CC as it keeps bouncing.

On Sat, Apr 19, 2014 at 03:52:20PM +0200, Borislav Petkov wrote:

-static void __init pci_enable_pci_io_ecs(void)
+static void __init pci_enable_pci_io_ecs(u8 bus, u8 slot)
  {
  #ifdef CONFIG_AMD_NB
 unsigned int i, n;
+   u8 limit;

 for (n = i = 0; !n && amd_nb_bus_dev_ranges[i].dev_limit; ++i) {
-   u8 bus = amd_nb_bus_dev_ranges[i].bus;
-   u8 slot = amd_nb_bus_dev_ranges[i].dev_base;
-   u8 limit = amd_nb_bus_dev_ranges[i].dev_limit;
+   /* Try matching for the bus range */
+   if ((bus != amd_nb_bus_dev_ranges[i].bus) ||
+   (slot != amd_nb_bus_dev_ranges[i].dev_base))
+   continue;
+
+   limit = amd_nb_bus_dev_ranges[i].dev_limit;

+   /* Setup all northbridges within the range */
 for (; slot < limit; ++slot) {
 u32 val = read_pci_config(bus, slot, 3, 0);
-
-   if (!early_is_amd_nb(val))
+   if (!val)
 continue;

 val = read_pci_config(bus, slot, 3, 0x8c);
@@ -375,13 +457,14 @@ static void __init pci_enable_pci_io_ecs(void)
 val |= ENABLE_CF8_EXT_CFG >> 32;


What a fun shifting!

Maybe you should do

#define ENABLE_CF8_EXT_CFGBIT(46 - 32)

to show exactly what you mean and how the bit is defined in MSR NB_CFG1
and also show how the high 32-bits are mapped into F3x8c, while at it.

And then you can drop the shifting at the call site.


Ok, I see another fun with this ECS enabling:

There's a enable_pci_io_ecs() which enables ECS through the NB_CFG MSR
which is called as part of the notifier *and* there's a PCI write to
that same bit in pci_enable_pci_io_ecs() which iterates over all NBs.

So, AFAICT, we do it twice and the second time is not needed. Which
means, you probably can drop pci_enable_pci_io_ecs() completely and use
solely the notifier?


It does look as if there is some duplication with respect to setting
MSR_AMD64_NB_CFG's (which is aliased at D18F3x8c [1])
ENABLE_CF8_EXT_CFG enable bit but there are at least a couple of
differences.

enable_pci_io_ecs() only sets the bit on one NB whereas
pci_enable_pci_io_ecs iterates over all the NBs (as you mentioned
above).  The other difference has something to do with Xen; see the
origin of pci_enable_pci_io_ecs - commit 24d9b70b8.



Yes, no?


Suravee, Kim - either of you want to chime in here?


I believe the notifier is mainly for the cores which are initially 
offline, and then brought up online afterward.


Suravee

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[PATCHv3 0/3] clocksource: Add Freescale FlexTimer Module (FTM) timer support

[Xiubo Li]

Changes in V3:
- Fix the ftm_irq_disable.

Changes in V2:
- Add big-endian support.
- Add using pr_err instead of BUG_ON.
- Add more detail comment message of FTM.
- Add DT binding documentation.
- Remove some header files and macros not useful.


Xiubo Li (3):
  clocksource: ftm: Add FlexTimer Module (FTM) Timer devicetree
Documentation
  ARM: dts: vf610: Add Freescale FlexTimer Module timer node.
  clocksource: Add Freescale FlexTimer Module (FTM) timer support

 .../devicetree/bindings/timer/fsl,ftm-timer.txt|  31 ++
 arch/arm/boot/dts/vf610.dtsi   |  12 +
 drivers/clocksource/Kconfig|   5 +
 drivers/clocksource/Makefile   |   1 +
 drivers/clocksource/fsl_ftm_timer.c| 344 +
 5 files changed, 393 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/fsl,ftm-timer.txt
 create mode 100644 drivers/clocksource/fsl_ftm_timer.c

-- 
1.8.4

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[PATCHv3 1/3] clocksource: ftm: Add FlexTimer Module (FTM) Timer devicetree Documentation

[Xiubo Li]

The FTM binding could be used on Vybrid and LS1+, add a binding
document for it.

Signed-off-by: Xiubo Li 
Cc: Shawn Guo 
Cc: Jingchang Lu 
---
 .../devicetree/bindings/timer/fsl,ftm-timer.txt| 31 ++
 1 file changed, 31 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/fsl,ftm-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/fsl,ftm-timer.txt 
b/Documentation/devicetree/bindings/timer/fsl,ftm-timer.txt
new file mode 100644
index 000..aa8c402
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/fsl,ftm-timer.txt
@@ -0,0 +1,31 @@
+Freescale FlexTimer Module (FTM) Timer
+
+Required properties:
+
+- compatible : should be "fsl,ftm-timer"
+- reg : Specifies base physical address and size of the register sets for the
+  clock event device and clock source device.
+- interrupts : Should be the clock event device interrupt.
+- clocks : The clocks provided by the SoC to drive the timer, must contain an
+  entry for each entry in clock-names.
+- clock-names : Must include the following entries:
+  o "ftm-evt"
+  o "ftm-src"
+  o "ftm-evt-counter-en"
+  o "ftm-src-counter-en"
+- big-endian: One boolean property, the big endian mode will be in use if it is
+  present, or the little endian mode will be in use for all the device 
registers.
+
+Example:
+ftm: ftm@400b8000 {
+   compatible = "fsl,ftm-timer";
+   reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
+   interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
+   clock-names = "ftm-evt", "ftm-src",
+   "ftm-evt-counter-en", "ftm-src-counter-en";
+   clocks = < VF610_CLK_FTM2>,
+   < VF610_CLK_FTM3>,
+   < VF610_CLK_FTM2_EXT_FIX_EN>,
+   < VF610_CLK_FTM3_EXT_FIX_EN>;
+   big-endian;
+};
-- 
1.8.4

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[PATCHv3 3/3] clocksource: Add Freescale FlexTimer Module (FTM) timer support

[Xiubo Li]

The Freescale FlexTimer Module time reference is a 16-bit counter
that can be used as an unsigned or signed increase counter.

CNTIN defines the starting value of the count and MOD defines the
final value of the count. The value of CNTIN is loaded into the FTM
counter, and the counter increments until the value of MOD is reached,
at which point the counter is reloaded with the value of CNTIN. That's
also when an overflow interrupt will be generated.

Here using the 'evt' prefix or postfix as clock event device and
the 'src' as clock source device.

Signed-off-by: Xiubo Li 
Cc: Shawn Guo 
Cc: Jingchang Lu 
---
 drivers/clocksource/Kconfig |   5 +
 drivers/clocksource/Makefile|   1 +
 drivers/clocksource/fsl_ftm_timer.c | 344 
 3 files changed, 350 insertions(+)
 create mode 100644 drivers/clocksource/fsl_ftm_timer.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index cd6950f..28321c5 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -136,6 +136,11 @@ config CLKSRC_SAMSUNG_PWM
  for all devicetree enabled platforms. This driver will be
  needed only on systems that do not have the Exynos MCT available.
 
+config FSL_FTM_TIMER
+   bool
+   help
+ Support for Freescale FlexTimer Module (FTM) timer.
+
 config VF_PIT_TIMER
bool
help
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index c7ca50a..ce0a967 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_CADENCE_TTC_TIMER)   += cadence_ttc_timer.o
 obj-$(CONFIG_CLKSRC_EFM32) += time-efm32.o
 obj-$(CONFIG_CLKSRC_EXYNOS_MCT)+= exynos_mct.o
 obj-$(CONFIG_CLKSRC_SAMSUNG_PWM)   += samsung_pwm_timer.o
+obj-$(CONFIG_FSL_FTM_TIMER)+= fsl_ftm_timer.o
 obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o
 
 obj-$(CONFIG_ARM_ARCH_TIMER)   += arm_arch_timer.o
diff --git a/drivers/clocksource/fsl_ftm_timer.c 
b/drivers/clocksource/fsl_ftm_timer.c
new file mode 100644
index 000..7f6246a
--- /dev/null
+++ b/drivers/clocksource/fsl_ftm_timer.c
@@ -0,0 +1,344 @@
+/*
+ * Freescale FlexTimer Module (FTM) timer driver.
+ *
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define FTM_SC 0x00
+#define FTM_SC_CLK_SHIFT   3
+#define FTM_SC_CLK_MASK(0x3 << FTM_SC_CLK_SHIFT)
+#define FTM_SC_CLK(c)  ((c) << FTM_SC_CLK_SHIFT)
+#define FTM_SC_PS_MASK 0x7
+#define FTM_SC_TOIEBIT(6)
+#define FTM_SC_TOF BIT(7)
+
+#define FTM_CNT0x04
+#define FTM_MOD0x08
+#define FTM_CNTIN  0x4C
+
+static void __iomem *clksrc_base;
+static void __iomem *clkevt_base;
+static unsigned long peroidic_cyc;
+static unsigned long ps;
+bool big_endian;
+
+static inline u32 ftm_readl(void __iomem *addr)
+{
+   if (big_endian)
+   return ioread32be(addr);
+   else
+   return ioread32(addr);
+}
+
+static inline void ftm_writel(u32 val, void __iomem *addr)
+{
+   if (big_endian)
+   iowrite32be(val, addr);
+   else
+   iowrite32(val, addr);
+}
+
+static inline void ftm_counter_enable(void __iomem *base)
+{
+   u32 val;
+
+   /* select and enable counter clock source */
+   val = ftm_readl(base + FTM_SC);
+   val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
+   val |= ps | FTM_SC_CLK(1);
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_counter_disable(void __iomem *base)
+{
+   u32 val;
+
+   /* disable counter clock source */
+   val = ftm_readl(base + FTM_SC);
+   val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_irq_acknowledge(void __iomem *base)
+{
+   u32 val;
+
+   val = ftm_readl(base + FTM_SC);
+   val &= ~FTM_SC_TOF;
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_irq_enable(void __iomem *base)
+{
+   u32 val;
+
+   val = ftm_readl(base + FTM_SC);
+   val |= FTM_SC_TOIE;
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_irq_disable(void __iomem *base)
+{
+   u32 val;
+
+   val = ftm_readl(base + FTM_SC);
+   val &= ~FTM_SC_TOIE;
+   ftm_writel(val, base + FTM_SC);
+}
+
+static inline void ftm_reset_counter(void __iomem *base)
+{
+   /*
+* The CNT register contains the FTM counter value.
+* Reset clears the CNT register. Writing any value to COUNT
+* updates the counter with its initial value, CNTIN.
+*/
+   ftm_writel(0x00, base + 

[PATCHv3 2/3] ARM: dts: vf610: Add Freescale FlexTimer Module timer node.

[Xiubo Li]

Signed-off-by: Xiubo Li 
Cc: Shawn Guo 
Cc: Jingchang Lu 
---
 arch/arm/boot/dts/vf610.dtsi | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 107e2c0..7e30bb1 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -281,6 +281,18 @@
status = "disabled";
};
 
+   ftm: ftm@400b8000 {
+   compatible = "fsl,ftm-timer";
+   reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
+   interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
+   clock-names = "ftm-evt", "ftm-src",
+   "ftm-evt-counter-en", 
"ftm-src-counter-en";
+   clocks = < VF610_CLK_FTM2>,
+   < VF610_CLK_FTM3>,
+   < VF610_CLK_FTM2_EXT_FIX_EN>,
+   < VF610_CLK_FTM3_EXT_FIX_EN>;
+   };
+
fec0: ethernet@400d {
compatible = "fsl,mvf600-fec";
reg = <0x400d 0x1000>;
-- 
1.8.4

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Re: [PATCH v2 3/7] tty/serial: convert 8250 to generic earlycon

[Yinghai Lu]

On Mon, Apr 28, 2014 at 4:24 PM, Rob Herring  wrote:
> On Sat, Apr 26, 2014 at 1:29 AM, Yinghai Lu  wrote:
>
> Thanks for finding these. I missed them in my build tests. This should fix 
> them:
>
> diff --git a/drivers/tty/serial/8250/8250_early.c
> b/drivers/tty/serial/8250/8250_early.c
> index e83c9db..2094c3b 100644
> --- a/drivers/tty/serial/8250/8250_early.c
> +++ b/drivers/tty/serial/8250/8250_early.c
> @@ -156,6 +156,11 @@ static int __init early_serial8250_setup(struct
> earlycon_device *device,
>  EARLYCON_DECLARE(uart8250, early_serial8250_setup);
>  EARLYCON_DECLARE(uart, early_serial8250_setup);
>
> +int __init setup_early_serial8250_console(char *cmdline)
> +{
> +   return setup_earlycon(cmdline, "uart8250", early_serial8250_setup);
> +}
> +
>  int serial8250_find_port_for_earlycon(void)
>  {
> struct earlycon_device *device = early_device;

that only handle "uart8250,", may need to add more lines to handle "uart,"

+int __init setup_early_serial8250_console(char *cmdline)
+{
+   char *options;
+   options = strstr(cmdline, "uart8250,");
+   if (options)
+   return setup_earlycon(cmdline, "uart8250",
early_serial8250_setup);
+
+   options = strstr(cmdline, "uart,");
+   if (options)
+  return setup_earlycon(cmdline, "uart", early_serial8250_setup);
+
+  return 0;
+}
+

Thanks

Yinghai
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RE: PATCH: mvsas: add support for Supermicro AOC-SAS2LP-MV8

[Xiangliang Yu]

> Ben Hutchings already submitted a patch for this twice, which I cc'd you
> on:
> 
> http://marc.info/?t=13927720393
> 
> will you ack it?  
I can't find this mail in my mail box.

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[PATCH] dmapool: remove redundant NULL check for dev in dma_pool_create()

[Daeseok Youn]

"dev" cannot be NULL because it is already checked before
calling dma_pool_create().

Signed-off-by: Daeseok Youn 
---
If dev can be NULL, it has NULL deferencing when kmalloc_node()
is called after enabling CONFIG_NUMA.

 mm/dmapool.c |   26 +-
 1 files changed, 9 insertions(+), 17 deletions(-)

diff --git a/mm/dmapool.c b/mm/dmapool.c
index c69781e..38dfcdd 100644
--- a/mm/dmapool.c
+++ b/mm/dmapool.c
@@ -170,24 +170,16 @@ struct dma_pool *dma_pool_create(const char *name, struct 
device *dev,
retval->boundary = boundary;
retval->allocation = allocation;
 
-   if (dev) {
-   int ret;
+   INIT_LIST_HEAD(>pools);
 
-   mutex_lock(_lock);
-   if (list_empty(>dma_pools))
-   ret = device_create_file(dev, _attr_pools);
-   else
-   ret = 0;
-   /* note:  not currently insisting "name" be unique */
-   if (!ret)
-   list_add(>pools, >dma_pools);
-   else {
-   kfree(retval);
-   retval = NULL;
-   }
-   mutex_unlock(_lock);
+   mutex_lock(_lock);
+   if (list_empty(>dma_pools) &&
+   device_create_file(dev, _attr_pools)) {
+   kfree(retval);
+   return NULL;
} else
-   INIT_LIST_HEAD(>pools);
+   list_add(>pools, >dma_pools);
+   mutex_unlock(_lock);
 
return retval;
 }
-- 
1.7.4.4

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RE: PATCH: mvsas: add support for Supermicro AOC-SAS2LP-MV8

[Xiangliang Yu]

> Ben Hutchings already submitted a patch for this twice, which I cc'd you
> on:
> 
> http://marc.info/?t=13927720393
> 
> will you ack it?  PCI_VDEVICE() is a sort of take it or leave it macro.
> It's not important and it will look untidy and a bit confusing having a
> mix of open coding and macros, so I'd say convert all or none.
> 
Using open coding because PCI_VENDOR_ID_MARVELL_EXT was undefined before.
Now, we should use the macros instead of open coding.

> 
> 
> > > Add support for the AOC-SAS2LP-MV8 SAS-2 controller from SuperMicro.
> > > This controller has subdevice id 0x9485 instead of 0x9480, and apparently
> > > this simple patch is the only thing needed to make it work.
> > >
> > > # lspci -vn
> > > [...]
> > > 03:00.0 0104: 1b4b:9485 (rev 03)
> > >   Subsystem: 1b4b:9485
> > >   Flags: bus master, fast devsel, latency 0, IRQ 24
> > >   Memory at feba (64-bit, non-prefetchable) [size=128K]
> > >   Memory at febc (64-bit, non-prefetchable) [size=256K]
> > >   Expansion ROM at feb9 [disabled] [size=64K]
> > >   Capabilities: [40] Power Management version 3
> > >   Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
> > >   Capabilities: [70] Express Endpoint, MSI 00
> > >   Capabilities: [100] Advanced Error Reporting
> > >   Capabilities: [140] Virtual Channel
> > >   Kernel driver in use: mvsas
> > >   Kernel modules: mvsas
> > >
> > > Signed-off-by: Jan Kasprzak 
> > >
> > > diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c
> > > index 5ff978b..eacee48 100644
> > > --- a/drivers/scsi/mvsas/mv_init.c
> > > +++ b/drivers/scsi/mvsas/mv_init.c
> > > @@ -728,6 +728,15 @@ static struct pci_device_id mvs_pci_table[] = {
> > >   .class_mask = 0,
> > >   .driver_data= chip_9485,
> > >   },
> > > + {
> > > + .vendor = PCI_VENDOR_ID_MARVELL_EXT,
> > > + .device = 0x9485,
> > > + .subvendor  = PCI_ANY_ID,
> > > + .subdevice  = 0x9485,
> > > + .class  = 0,
> > > + .class_mask = 0,
> > > + .driver_data= chip_9485,
> > > + },
> > >   { PCI_VDEVICE(OCZ, 0x1021), chip_9485}, /* OCZ RevoDrive3 */
> > >   { PCI_VDEVICE(OCZ, 0x1022), chip_9485}, /* OCZ RevoDrive3/zDriveR4
> (exact
> > > model unknown) */
> > >   { PCI_VDEVICE(OCZ, 0x1040), chip_9485}, /* OCZ RevoDrive3/zDriveR4
> (exact
> > > model unknown) */
> > >
> > > --
> > > | Jan "Yenya" Kasprzak  
> |
> > > | New GPG 4096R/A45477D5 - see http://www.fi.muni.cz/~kas/pgp-rollover.txt
> |
> > > | http://www.fi.muni.cz/~kas/Journal:
> http://www.fi.muni.cz/~kas/blog/
> > > |
> > >   There's clearly a balance between "octopus merges are fine" and "Christ,
> > >   that's not an octopus, that's a Cthulhu merge". --Linus Torvalds
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
> > the body of a message to majord...@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 

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Re: [PATCH v2 2/5] x86/PCI: Support additional MMIO range capabilities

[Suravee Suthikulanit]

On 4/28/2014 4:19 PM, Myron Stowe wrote:

On Sat, Apr 19, 2014 at 7:52 AM, Borislav Petkov  wrote:

On Fri, Apr 18, 2014 at 08:53:23PM -0600, Myron Stowe wrote:

From: Suravee Suthikulpanit 


...


@@ -118,6 +154,12 @@ static int __init early_fill_mp_bus_info(void)

   pr_debug("Found AMD hostbridge at %x:%x.0\n", bus, slot);

+ /* We enable ECS mode prior to probing MMIO as MMIO related registers
+  * are in the ECS area.
+  */
+ pci_io_ecs_init(bus, slot);


Well, if enabling the ECS failed somehow, you probably want to save
yourself the _amd_read_pci_config() calls further down.

Which means:

* you should propagate an error code from that pci_io_ecs_init() function

* you can carve out the huge loop iterating over AMD_NB_F1_MMIO_RANGES
along with the pci ECS enablement call to pci_io_ecs_init into a
separate function and thus slim down that huge early_fill_mp_bus_info()
monster a bit.



Yes but this was not trivial since most, if not all, usages ignore any
return value.

I'm wanting to focus on just fixing the issue for the most part and
making as few changes as possible.  This is primarly due to:
   o  The lack of engagement by the AMD engineers (Suravee posted these
changes but has since been unresponsive),
   o  As Bjorn just mentioned, we would like to get rid of this entire
file (as we did in a similar manner with intel_bus) as it is just an
"endless treadmill" that needs attention with every new HW release,
   o  I want my name to be minimally related to this  ;)

[Suravee] Sorry for late reply and did not follow up on this patch in a 
timely manner.  Also, thank you Myron for helping to follow up with the 
patch set.


Regarding the error code from pci_io_ecs_init(), it is currently always 
return 0 (success).  I am not sure what error code should I 
check/propagate.  Let me know if I am missing something here.


..


-static int __init pci_io_ecs_init(void)
+static int __init pci_io_ecs_init(u8 bus, u8 slot)
  {
   int cpu;

@@ -389,9 +472,7 @@ static int __init pci_io_ecs_init(void)
  if (boot_cpu_data.x86 < 0x10)
   return 0;

- /* Try the PCI method first. */
- if (early_pci_allowed())
- pci_enable_pci_io_ecs();


Where did the if-check go?



Good catch.  I assume Suravee didn't drop this on purpose?


[SURAVEE] I dropped the "early_pci_allowed()" here since I have moved 
the calling of "pci_io_ecs_init()" into the "early_fill_mp_bus_info()" 
since I would like to enable PCI ecs access at earlier stage. The 
"early_fill_mp_bus_info() has already check for "early_pci_allowed()" 
already at the beginning of the function. So, this should not be needed 
here.


Suravee


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Re: [PATCH tip/core/rcu 0/3] Documentation changes for 3.16

[Josh Triplett]

On Mon, Apr 28, 2014 at 04:30:13PM -0700, Paul E. McKenney wrote:
> Hello!
> 
> This series provides a few documentation updates:
> 
> 1.Update sysfs patch for rcu_cpu_stall_suppress, courtesy of
>   Kirill Tkhai.
> 
> 2.Add a rcu_dereference.txt file documenting the proper care
>   and feeding of rcu_dereference() return values.
> 
> 3.Update the list of RCU API members in whatisRCU.txt.

For all three:

Reviewed-by: Josh Triplett 
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Re: [PATCH] x86-64: espfix for 64-bit mode *PROTOTYPE*

[H. Peter Anvin]

On 04/28/2014 07:38 PM, H. Peter Anvin wrote:
> On 04/28/2014 05:20 PM, Andrew Lutomirski wrote:
>>
>> ldttest segfaults on 3.13 and 3.14 for me.  It reboots (triple fault?)
>> on your branch.  It even said this:
>>
>> qemu-system-x86_64: 9pfs:virtfs_reset: One or more uncluncked fids
>> found during reset
>>
>> I have no idea what an uncluncked fd is :)
>>
> 
> It means 9p wasn't properly shut down.
> 

(A "fid" is like the 9p version of a file descriptor.  Sort of.)

-hpa


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RE: [PATCH 5/5] powercap/rapl: change floor frequency for vallewview

[R, Durgadoss]

Hi Jacob,

> -Original Message-
> From: Jacob Pan [mailto:jacob.jun@linux.intel.com]
> Sent: Monday, April 28, 2014 7:35 PM
> To: Linux PM; Wysocki, Rafael J; LKML
> Cc: David E. Box; Alan Cox; R, Durgadoss; Accardi, Kristen C; Jacob Pan
> Subject: [PATCH 5/5] powercap/rapl: change floor frequency for vallewview
> 
> RAPL power limit reduce power by limiting CPU P-state and
> other techniques. On Valleyview, RAPL power limit cannot
> go to LFM (low frequency mode) if we don't set the floor
> frequency via IOSF mailbox.
> 
> This patch enables setting of floor frquency such that
> RAPL power limit is more effective.
> 
> Signed-off-by: Jacob Pan 
> ---
>  drivers/powercap/intel_rapl.c | 27 +++
>  1 file changed, 19 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c
> index b1cda6f..13e4776 100644
> --- a/drivers/powercap/intel_rapl.c
> +++ b/drivers/powercap/intel_rapl.c
> @@ -32,6 +32,7 @@
> 
>  #include 
>  #include 
> +#include 
> 
>  /* bitmasks for RAPL MSRs, used by primitive access functions */
>  #define ENERGY_STATUS_MASK  0x
> @@ -336,11 +337,17 @@ static int find_nr_power_limit(struct rapl_domain *rd)
>   return i;
>  }
> 
> +#define VLV_CPU_POWER_BUDGET_CTL (0x2)
> +static const struct x86_cpu_id valleyview_id[] = {
> + { X86_VENDOR_INTEL, 6, 0x37},
> + {}
> +};

There are other platforms that have this FloorFreq register as well.
And those addresses are not '0x02'. So, we need to have a cpu_id based
table to define the address of the floor freq register as well.
[This is not specific to valleyview.]

Also, is there a plan to expose this floor freq ratio through Sysfs for
runtime configuration. ? May be through a standard thermal cooling device
interface ?

> +
>  static int set_domain_enable(struct powercap_zone *power_zone, bool mode)
>  {
>   struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
>   int nr_powerlimit;
> -
> + u32 mdata = 0;
>   if (rd->state & DOMAIN_STATE_BIOS_LOCKED)
>   return -EACCES;
>   get_online_cpus();
> @@ -350,7 +357,16 @@ static int set_domain_enable(struct powercap_zone
> *power_zone, bool mode)
>   /* always enable clamp such that p-state can go below OS requested
>* range. power capping priority over guranteed frequency.
>*/
> - rapl_write_data_raw(rd, PL1_CLAMP, mode);
> + if (x86_match_cpu(valleyview_id)) {
> + iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_PMC_READ,
> + VLV_CPU_POWER_BUDGET_CTL, );
> + mdata &= ~(0x7f << 8);
> + mdata |= 1 << 8;
> + iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_PMC_WRITE,
> + VLV_CPU_POWER_BUDGET_CTL, mdata);
> + } else
> + rapl_write_data_raw(rd, PL1_CLAMP, mode);
> +
>   /* some domains have pl2 */
>   if (nr_powerlimit > 1) {
>   rapl_write_data_raw(rd, PL2_ENABLE, mode);
> @@ -833,11 +849,6 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
>   return 0;
>  }
> 
> -static const struct x86_cpu_id energy_unit_quirk_ids[] = {
> - { X86_VENDOR_INTEL, 6, 0x37},/* Valleyview */
> - {}
> -};

Same thing here. There are other Atom platforms that need this
conversion quirk. So, please keep the table as is.

Thanks,
Durga

> -
>  static int rapl_check_unit(struct rapl_package *rp, int cpu)
>  {
>   u64 msr_val;
> @@ -859,7 +870,7 @@ static int rapl_check_unit(struct rapl_package *rp, int 
> cpu)
>*/
>   value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
>   /* some CPUs have different way to calculate energy unit */
> - if (x86_match_cpu(energy_unit_quirk_ids))
> + if (x86_match_cpu(valleyview_id))
>   rp->energy_unit_divisor = 100 / (1 << value);
>   else
>   rp->energy_unit_divisor = 1 << value;
> --
> 1.8.1.2

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Re: [PATCH] x86-64: espfix for 64-bit mode *PROTOTYPE*

[H. Peter Anvin]

On 04/28/2014 05:20 PM, Andrew Lutomirski wrote:
> 
> ldttest segfaults on 3.13 and 3.14 for me.  It reboots (triple fault?)
> on your branch.  It even said this:
> 
> qemu-system-x86_64: 9pfs:virtfs_reset: One or more uncluncked fids
> found during reset
> 
> I have no idea what an uncluncked fd is :)
> 

It means 9p wasn't properly shut down.

-hpa

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Re: [PATCH V3 2/2] powerpc/pseries: init fault_around_order for pseries

[Rusty Russell]

Madhavan Srinivasan  writes:
> diff --git a/arch/powerpc/platforms/pseries/setup.c 
> b/arch/powerpc/platforms/pseries/setup.c
> index 2db8cc6..c87e6b6 100644
> --- a/arch/powerpc/platforms/pseries/setup.c
> +++ b/arch/powerpc/platforms/pseries/setup.c
> @@ -74,6 +74,8 @@ int CMO_SecPSP = -1;
>  unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
>  EXPORT_SYMBOL(CMO_PageSize);
>  
> +extern unsigned int fault_around_order;
> +

It's considered bad form to do this.  Put the declaration in linux/mm.h.

Thanks,
Rusty.
PS.  But we're getting there! :)
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[PATCH] Input: remove race when instantiating polled device attributes

[Dmitry Torokhov]

Polled device's attributes controlling polling rate and whether polling is
enabled are attached to input device. We should have device core
instantiate them for us, so that they are created by the time new device
notification is sent to userspace, instead of doing it ourselves
afterwards.

Signed-off-by: Dmitry Torokhov 
---
 drivers/input/input-polldev.c | 19 +--
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/drivers/input/input-polldev.c b/drivers/input/input-polldev.c
index 7f161d9..4b19190 100644
--- a/drivers/input/input-polldev.c
+++ b/drivers/input/input-polldev.c
@@ -147,6 +147,11 @@ static struct attribute_group 
input_polldev_attribute_group = {
.attrs = sysfs_attrs
 };
 
+static const struct attribute_group *input_polldev_attribute_groups[] = {
+   _polldev_attribute_group,
+   NULL
+};
+
 /**
  * input_allocate_polled_device - allocate memory for polled device
  *
@@ -204,24 +209,21 @@ int input_register_polled_device(struct input_polled_dev 
*dev)
 
input_set_drvdata(input, dev);
INIT_DELAYED_WORK(>work, input_polled_device_work);
+
if (!dev->poll_interval)
dev->poll_interval = 500;
if (!dev->poll_interval_max)
dev->poll_interval_max = dev->poll_interval;
+
input->open = input_open_polled_device;
input->close = input_close_polled_device;
 
+   input->dev.groups = input_polldev_attribute_groups;
+
error = input_register_device(input);
if (error)
return error;
 
-   error = sysfs_create_group(>dev.kobj,
-  _polldev_attribute_group);
-   if (error) {
-   input_unregister_device(input);
-   return error;
-   }
-
/*
 * Take extra reference to the underlying input device so
 * that it survives call to input_unregister_polled_device()
@@ -245,9 +247,6 @@ EXPORT_SYMBOL(input_register_polled_device);
  */
 void input_unregister_polled_device(struct input_polled_dev *dev)
 {
-   sysfs_remove_group(>input->dev.kobj,
-  _polldev_attribute_group);
-
input_unregister_device(dev->input);
 }
 EXPORT_SYMBOL(input_unregister_polled_device);
-- 
1.9.0


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Payment Acknowledgement

[Mr. Walter Ntuli]

After my intensive search, I understand that you share same last name with our 
late client who passed on few years ago, and am seeking  your consent to 
present you as heir to his estate estimated 30.5mUSD.if you interest, please 
send your cell/phone, fax and names, for more details.
Mr. Walter Ntuli Sent from my iPad
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Re: [PATCH 7/7] x86: Add documentation for rd/wr fs/gs base

[Randy Dunlap]

On 04/28/14 15:12, Andi Kleen wrote:
> From: Andi Kleen 
> 
> Signed-off-by: Andi Kleen 
> ---
>  Documentation/x86/fsgs.txt | 73 
> ++
>  1 file changed, 73 insertions(+)
>  create mode 100644 Documentation/x86/fsgs.txt
> 
> diff --git a/Documentation/x86/fsgs.txt b/Documentation/x86/fsgs.txt
> new file mode 100644
> index 000..0a1755f
> --- /dev/null
> +++ b/Documentation/x86/fsgs.txt
> @@ -0,0 +1,73 @@
> +
> +Using FS and GS prefixes on x86_64-linux
> +
> +The x86 architecture supports segment prefixes per instruction to add an
> +offset to an address.  On 64bit x86, these are mostly nops, except for FS

 64-bit

> +and GS.
> +
> +This offers an efficient way to reference a global pointer.
> +
> +The compiler has to generate special code to use these base registers,
> +or they can be accessed with inline assembler.
> +
> + mov %gs:offset,%reg
> + mov %fs:offset,%reg
> +
> +FS is used to address the thread local segment (TLS), declared using
> +__thread.  The compiler the automatically generates the correct prefixes and

   then

> +relocations to access these values.
> +
> +FS is normally managed by the runtime code or the threading library.
> +
> +GS is freely available, but may need special (compiler or inline assembler)
> +code to use.
> +
> +Traditionally 64bit FS and GS could be set by the arch_prctl system call

 64-bit

> +
> + arch_prctl(ARCH_SET_GS, value)
> + arch_prctl(ARCH_SET_FS, value)
> +
> +[There was also an older method using modify_ldt(), inherited from 32bit,

  32-bit,

> +but this is not discussed here.]
> +
> +However using a syscall is problematic for user space threading libraries

   However,

> +that want to context switch in user space.
> +
> +Newer Intel CPUs (Ivy Bridge and later) added new instructions to directly
> +access these registers quickly from user context
> +
> + RDFSBASE %reg   read the FS base(or _readfsbase_u64)
> + RDGSBASE %reg   read the GS base(or _readgsbase_u64)
> +
> + WRFSBASE %reg   write the FS base   (or _writefsbase_u64)
> + WRGSBASE %reg   write the GS base   (or _writegsbase_u64)
> +
> +The instructions are supported by the CPU when the "fsgsbase" string is 
> shown in
> +/proc/cpuinfo (or directly retrieved through the CPUID instruction).
> +The instructions are only available to 64bit binaries.

  64-bit

> +
> +However the kernel needs to explicitely enable these instructions, as it

   However,explicitly

> +may otherwise not correctly context switch the state. Newer Linux
> +kernels enable this. When the kernel did not enable the instruction
> +they will fault.
> +
> +An FSGSBASE enabled kernel can be detected by checking the AT_HWCAP2
> +bitmask in the aux vector. When the HWCAP2_FSGSBASE bit is set the
> +kernel supports RDFSGSBASE.
> +
> + #include 
> + #include 
> +
> + /* Will be eventually in asm/hwcap.h */
> + #define HWCAP2_FSGSBASE(1 << 0)
> +
> +unsigned val = getauxval(AT_HWCAP2);
> +if (val & HWCAP2_FSGSBASE) {
> +asm("wrgsbase %0" :: "r" (ptr));
> +}
> +
> +Another requirement is that the FS or GS selector has to be zero
> +(is normally true unless changed explicitely)

explicitly).

> +
> +
> +Andi Kleen
> 


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[PATCH v4 10/10] staging: gdm72xx: Removed task from TODO list

[Michalis Pappas]

Removed line related to replacement of kernel_thread with kthread,
as issue was fixed on ff5e4a1d2702 ('Staging: gdm72xx: gdm_usb:
fix deprecated function kernel_thread')

Signed-off-by: Michalis Pappas 
---
 drivers/staging/gdm72xx/TODO | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/staging/gdm72xx/TODO b/drivers/staging/gdm72xx/TODO
index 5ab27fb..62d0cd6 100644
--- a/drivers/staging/gdm72xx/TODO
+++ b/drivers/staging/gdm72xx/TODO
@@ -1,3 +1,2 @@
 TODO:
-- Replace kernel_thread with kthread in gdm_usb.c
 - Clean up coding style to meet kernel standard.
-- 
1.8.4

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[PATCH v4 9/10] staging: gdm72xx: Indentation and other whitespace fixes.

[Michalis Pappas]

Indentation and other whitespace fixes.

Signed-off-by: Michalis Pappas 
---
 drivers/staging/gdm72xx/gdm_qos.c   |  2 +-
 drivers/staging/gdm72xx/gdm_sdio.c  | 14 +++---
 drivers/staging/gdm72xx/gdm_sdio.h  | 29 +
 drivers/staging/gdm72xx/gdm_usb.c   | 17 
 drivers/staging/gdm72xx/gdm_usb.h   | 11 +
 drivers/staging/gdm72xx/gdm_wimax.c | 21 +
 drivers/staging/gdm72xx/gdm_wimax.h | 21 -
 drivers/staging/gdm72xx/hci.h   | 87 +
 drivers/staging/gdm72xx/usb_ids.h   |  2 +-
 drivers/staging/gdm72xx/wm_ioctl.h  | 22 +-
 10 files changed, 97 insertions(+), 129 deletions(-)

diff --git a/drivers/staging/gdm72xx/gdm_qos.c 
b/drivers/staging/gdm72xx/gdm_qos.c
index 33df46a..eba3bfa 100644
--- a/drivers/staging/gdm72xx/gdm_qos.c
+++ b/drivers/staging/gdm72xx/gdm_qos.c
@@ -24,7 +24,7 @@
 #include "hci.h"
 #include "gdm_qos.h"
 
-#define B2H(x) __be16_to_cpu(x)
+#define B2H(x) __be16_to_cpu(x)
 
 #define MAX_FREE_LIST_CNT  32
 static struct {
diff --git a/drivers/staging/gdm72xx/gdm_sdio.c 
b/drivers/staging/gdm72xx/gdm_sdio.c
index 07be325..6d1de33 100644
--- a/drivers/staging/gdm72xx/gdm_sdio.c
+++ b/drivers/staging/gdm72xx/gdm_sdio.c
@@ -31,11 +31,11 @@
 #define MAX_NR_RX_BUF  4
 
 #define SDU_TX_BUF_SIZE2048
-#define TX_BUF_SIZE2048
+#define TX_BUF_SIZE2048
 #define TX_CHUNK_SIZE  (2048 - TYPE_A_HEADER_SIZE)
-#define RX_BUF_SIZE(25*1024)
+#define RX_BUF_SIZE(25*1024)
 
-#define TX_HZ  2000
+#define TX_HZ  2000
 #define TX_INTERVAL(100/TX_HZ)
 
 static int init_sdio(struct sdiowm_dev *sdev);
@@ -127,10 +127,10 @@ static void put_rx_struct(struct rx_cxt *rx, struct 
sdio_rx *r)
 static int init_sdio(struct sdiowm_dev *sdev)
 {
int ret = 0, i;
-   struct tx_cxt   *tx = >tx;
-   struct rx_cxt   *rx = >rx;
-   struct sdio_tx  *t;
-   struct sdio_rx  *r;
+   struct tx_cxt *tx = >tx;
+   struct rx_cxt *rx = >rx;
+   struct sdio_tx *t;
+   struct sdio_rx *r;
 
INIT_LIST_HEAD(>free_list);
INIT_LIST_HEAD(>sdu_list);
diff --git a/drivers/staging/gdm72xx/gdm_sdio.h 
b/drivers/staging/gdm72xx/gdm_sdio.h
index 216e98f..0c0e2cb 100644
--- a/drivers/staging/gdm72xx/gdm_sdio.h
+++ b/drivers/staging/gdm72xx/gdm_sdio.h
@@ -22,10 +22,8 @@
 struct sdio_tx {
struct list_headlist;
struct tx_cxt   *tx_cxt;
-
-   u8  *buf;
-   int len;
-
+   u8  *buf;
+   int len;
void (*callback)(void *cb_data);
void *cb_data;
 };
@@ -35,18 +33,15 @@ struct tx_cxt {
struct list_headsdu_list;
struct list_headhci_list;
struct timeval  sdu_stamp;
-
-   u8  *sdu_buf;
-
-   spinlock_t  lock;
-   int can_send;
-   int stop_sdu_tx;
+   u8  *sdu_buf;
+   spinlock_t  lock;
+   int can_send;
+   int stop_sdu_tx;
 };
 
 struct sdio_rx {
struct list_headlist;
struct rx_cxt   *rx_cxt;
-
void (*callback)(void *cb_data, void *data, int len);
void *cb_data;
 };
@@ -54,18 +49,14 @@ struct sdio_rx {
 struct rx_cxt {
struct list_headfree_list;
struct list_headreq_list;
-
-   u8  *rx_buf;
-
-   spinlock_t  lock;
+   u8  *rx_buf;
+   spinlock_t  lock;
 };
 
 struct sdiowm_dev {
struct sdio_func*func;
-
-   struct tx_cxt   tx;
-   struct rx_cxt   rx;
-
+   struct tx_cxt   tx;
+   struct rx_cxt   rx;
struct work_struct  ws;
 };
 
diff --git a/drivers/staging/gdm72xx/gdm_usb.c 
b/drivers/staging/gdm72xx/gdm_usb.c
index c7298d0..c59a7a4 100644
--- a/drivers/staging/gdm72xx/gdm_usb.c
+++ b/drivers/staging/gdm72xx/gdm_usb.c
@@ -27,6 +27,7 @@
 MODULE_DEVICE_TABLE(usb, id_table);
 
 #define TX_BUF_SIZE2048
+
 #if defined(CONFIG_WIMAX_GDM72XX_WIMAX2)
 #define RX_BUF_SIZE(128*1024)  /* For packet aggregation */
 #else
@@ -166,10 +167,10 @@ static void put_rx_struct(struct rx_cxt *rx, struct 
usb_rx *r)
 static int init_usb(struct usbwm_dev *udev)
 {
int ret = 0, i;
-   struct tx_cxt   *tx = >tx;
-   struct rx_cxt   *rx = >rx;
-   struct usb_tx   *t;
-   struct usb_rx   *r;
+   struct tx_cxt *tx = >tx;
+   struct rx_cxt *rx = >rx;
+   struct usb_tx *t;
+   struct usb_rx *r;
unsigned long flags;
 
INIT_LIST_HEAD(>free_list);
@@ -215,10 +216,10 @@ fail:
 
 static void release_usb(struct usbwm_dev *udev)
 {
-   struct tx_cxt   *tx = >tx;
-   struct rx_cxt   *rx = >rx;
-   struct usb_tx   *t, *t_next;
-   struct usb_rx   *r, *r_next;
+   struct tx_cxt *tx = >tx;
+ 

Re: [PATCH v2 00/12] scsi/NCR5380: fix debugging macros and #include structure

[Finn Thain]

On Sat, 26 Apr 2014, James Bottomley wrote:

> OK, so this is a pretty big change to an unmaintained driver.  I'll take 
> it if you're willing to maintain the driver afterwards ... in which case 
> I need another patch to add you to the MAINTAINERS file.

Sure, I'm happy to support these patches and future work I plan to do on 
the driver.

What additional responsibilities would come with adding my name the 
MAINTAINERS file?

Perhaps Michael and Sam would be interested in sharing the role, for atari 
and sun3 NCR5380 drivers (?)

I only have hardware to test mac_scsi but I can obtain a Domex DMX3191D 
PCI card on ebay.

--
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[PATCH v4 8/10] staging: gdm72xx: Whitespace fixes to conform to coding standards

[Michalis Pappas]

Whitespace fixes to conform to coding standards

Signed-off-by: Michalis Pappas 
---
 drivers/staging/gdm72xx/gdm_qos.c   | 72 ++---
 drivers/staging/gdm72xx/gdm_sdio.c  | 15 
 drivers/staging/gdm72xx/gdm_usb.c   | 43 --
 drivers/staging/gdm72xx/gdm_wimax.c | 61 +++
 drivers/staging/gdm72xx/gdm_wimax.h |  6 ++--
 drivers/staging/gdm72xx/netlink_k.c |  5 ++-
 drivers/staging/gdm72xx/netlink_k.h |  4 +--
 drivers/staging/gdm72xx/usb_boot.c  | 18 +-
 8 files changed, 101 insertions(+), 123 deletions(-)

diff --git a/drivers/staging/gdm72xx/gdm_qos.c 
b/drivers/staging/gdm72xx/gdm_qos.c
index 465f695..33df46a 100644
--- a/drivers/staging/gdm72xx/gdm_qos.c
+++ b/drivers/staging/gdm72xx/gdm_qos.c
@@ -47,8 +47,7 @@ static void *alloc_qos_entry(void)
 
spin_lock_irqsave(_free_list.lock, flags);
if (qos_free_list.cnt) {
-   entry = list_entry(qos_free_list.head.prev, struct qos_entry_s,
-   list);
+   entry = list_entry(qos_free_list.head.prev, struct qos_entry_s, 
list);
list_del(>list);
qos_free_list.cnt--;
spin_unlock_irqrestore(_free_list.lock, flags);
@@ -62,7 +61,7 @@ static void *alloc_qos_entry(void)
 
 static void free_qos_entry(void *entry)
 {
-   struct qos_entry_s *qentry = (struct qos_entry_s *) entry;
+   struct qos_entry_s *qentry = (struct qos_entry_s *)entry;
unsigned long flags;
 
spin_lock_irqsave(_free_list.lock, flags);
@@ -148,7 +147,7 @@ static u32 chk_ipv4_rule(struct gdm_wimax_csr_s *csr, u8 
*stream, u8 *port)
 
if (csr->classifier_rule_en) {
if (((stream[1] & csr->ip2s_mask) < csr->ip2s_lo) ||
-   ((stream[1] & csr->ip2s_mask) > csr->ip2s_hi))
+   ((stream[1] & csr->ip2s_mask) > csr->ip2s_hi))
return 1;
}
 
@@ -190,7 +189,7 @@ static u32 chk_ipv4_rule(struct gdm_wimax_csr_s *csr, u8 
*stream, u8 *port)
 
 static u32 get_qos_index(struct nic *nic, u8 *iph, u8 *tcpudph)
 {
-   u32 IP_ver, i;
+   u32 IP_ver, i;
struct qos_cb_s *qcb = >qos;
 
if (iph == NULL || tcpudph == NULL)
@@ -198,16 +197,16 @@ static u32 get_qos_index(struct nic *nic, u8 *iph, u8 
*tcpudph)
 
IP_ver = (iph[0]>>4)&0xf;
 
-   if (IP_ver == 4) {
-   for (i = 0; i < QOS_MAX; i++) {
-   if (qcb->csr[i].enabled) {
-   if (qcb->csr[i].classifier_rule_en) {
-   if (chk_ipv4_rule(>csr[i], iph,
-   tcpudph) == 0)
-   return i;
-   }
-   }
-   }
+   if (IP_ver != 4)
+   return -1;
+
+   for (i = 0; i < QOS_MAX; i++) {
+   if (!qcb->csr[i].enabled)
+   continue;
+   if (!qcb->csr[i].classifier_rule_en)
+   continue;
+   if (chk_ipv4_rule(>csr[i], iph, tcpudph) == 0)
+   return i;
}
 
return -1;
@@ -222,22 +221,20 @@ static u32 extract_qos_list(struct nic *nic, struct 
list_head *head)
INIT_LIST_HEAD(head);
 
for (i = 0; i < QOS_MAX; i++) {
-   if (qcb->csr[i].enabled) {
-   if (qcb->csr[i].qos_buf_count < qcb->qos_limit_size) {
-   if (!list_empty(>qos_list[i])) {
-   entry = list_entry(
-   qcb->qos_list[i].prev,
-   struct qos_entry_s, list);
-   list_move_tail(>list, head);
-   qcb->csr[i].qos_buf_count++;
-
-   if (!list_empty(>qos_list[i]))
-   netdev_warn(nic->netdev,
-   "Index(%d) is 
piled!!\n",
-   i);
-   }
-   }
-   }
+   if (!qcb->csr[i].enabled)
+   continue;
+   if (qcb->csr[i].qos_buf_count >= qcb->qos_limit_size)
+   continue;
+   if (list_empty(>qos_list[i]))
+   continue;
+
+   entry = list_entry(qcb->qos_list[i].prev, struct qos_entry_s, 
list);
+
+   list_move_tail(>list, head);
+   qcb->csr[i].qos_buf_count++;
+
+   if (!list_empty(>qos_list[i]))
+   netdev_warn(nic->netdev, "Index(%d) is piled!!\n", i);
}
 
return 0;
@@ -260,14 +257,14 @@ int gdm_qos_send_hci_pkt(struct sk_buff *skb, struct 
net_device *dev)
   

[PATCH v4 7/10] staging: gdm72xx: Removed commented-out code

[Michalis Pappas]

Removed commented-out code

Signed-off-by: Michalis Pappas 
---
 drivers/staging/gdm72xx/gdm_qos.h   | 17 -
 drivers/staging/gdm72xx/gdm_wimax.c |  4 
 drivers/staging/gdm72xx/gdm_wimax.h |  6 --
 drivers/staging/gdm72xx/usb_boot.c  | 17 +
 4 files changed, 1 insertion(+), 43 deletions(-)

diff --git a/drivers/staging/gdm72xx/gdm_qos.h 
b/drivers/staging/gdm72xx/gdm_qos.h
index 8f18119..6543cff 100644
--- a/drivers/staging/gdm72xx/gdm_qos.h
+++ b/drivers/staging/gdm72xx/gdm_qos.h
@@ -34,23 +34,6 @@
 #defineIEEE802_1QVLANID0x10
 
 struct gdm_wimax_csr_s {
-   /*  union{
-   U16 all;
-   struct _CS_CLASSIFIER_RULE_ENABLE{
-   IPTypeOfService:1,
-   Protocol:1,
-   IPMaskedSrcAddress:1,
-   IPMaskedDstAddress:1,
-   ProtocolSrcPortRange:1,
-   ProtocolDstPortRange:1,
-   DstMacAddr:1,
-   SrcMacAddr:1,
-   Ethertype:1,
-   IEEE802_1DUserPriority:1,
-   IEEE802_1QVLANID:1,
-   Reserved:5;
-   } fields;
-   } */
BOOLEAN enabled;
u32 SFID;
u8  qos_buf_count;
diff --git a/drivers/staging/gdm72xx/gdm_wimax.c 
b/drivers/staging/gdm72xx/gdm_wimax.c
index 814d2e4..3ccb083 100644
--- a/drivers/staging/gdm72xx/gdm_wimax.c
+++ b/drivers/staging/gdm72xx/gdm_wimax.c
@@ -862,10 +862,6 @@ static void prepare_rx_complete(void *arg, void *data, int 
len)
netdev_err(nic->netdev,
   "get_prepared_info failed(%d)\n", ret);
gdm_wimax_rcv_with_cb(nic, prepare_rx_complete, nic);
-   #if 0
-   /* Re-prepare WiMax device */
-   gdm_wimax_prepare_device(nic->netdev);
-   #endif
}
 }
 
diff --git a/drivers/staging/gdm72xx/gdm_wimax.h 
b/drivers/staging/gdm72xx/gdm_wimax.h
index 3013bdb..55212f5 100644
--- a/drivers/staging/gdm72xx/gdm_wimax.h
+++ b/drivers/staging/gdm72xx/gdm_wimax.h
@@ -23,10 +23,6 @@
 
 #define DRIVER_VERSION "3.2.3"
 
-/*#define ETH_P_IP 0x0800 */
-/*#define ETH_P_ARP0x0806 */
-/*#define ETH_P_IPV6   0x86DD */
-
 #define H2L(x) __cpu_to_le16(x)
 #define L2H(x) __le16_to_cpu(x)
 #define DH2L(x)__cpu_to_le32(x)
@@ -62,8 +58,6 @@ struct nic {
 
 };
 
-/*#define LOOPBACK_TEST */
-
 int register_wimax_device(struct phy_dev *phy_dev, struct device *pdev);
 int gdm_wimax_send_tx(struct sk_buff *skb, struct net_device *dev);
 void unregister_wimax_device(struct phy_dev *phy_dev);
diff --git a/drivers/staging/gdm72xx/usb_boot.c 
b/drivers/staging/gdm72xx/usb_boot.c
index 0d45eb6..8518a5a 100644
--- a/drivers/staging/gdm72xx/usb_boot.c
+++ b/drivers/staging/gdm72xx/usb_boot.c
@@ -169,14 +169,7 @@ int usb_boot(struct usb_device *usbdev, u16 pid)
memcpy(, firm->data, sizeof(hdr));
 
array_le32_to_cpu((u32 *), 19);
-#if 0
-   if (hdr.magic_code != 0x10767fff) {
-   dev_err(>dev, "Invalid magic code 0x%08x\n",
-   hdr.magic_code);
-   ret = -EINVAL;
-   goto out;
-   }
-#endif
+
if (hdr.count > MAX_IMG_CNT) {
dev_err(>dev, "Too many images. %d\n", hdr.count);
ret = -EINVAL;
@@ -201,14 +194,6 @@ int usb_boot(struct usb_device *usbdev, u16 pid)
memcpy(_info, firm->data + pos, sizeof(fw_info));
 
array_le32_to_cpu((u32 *)_info, 8);
-#if 0
-   if ((fw_info.id & 0xf000) != 0x10767000) {
-   dev_err(>dev, "Invalid FW id. 0x%08x\n",
-   fw_info.id);
-   ret = -EIO;
-   goto out;
-   }
-#endif
 
if ((fw_info.id & 0x) != pid)
continue;
-- 
1.8.4

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[PATCH v4 6/10] staging: gdm72xx: Fixed some braces to conform with coding style

[Michalis Pappas]

Fixed some braces to conform with coding style

Signed-off-by: Michalis Pappas 
---
 drivers/staging/gdm72xx/gdm_wimax.c | 16 
 drivers/staging/gdm72xx/netlink_k.c |  7 ---
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/drivers/staging/gdm72xx/gdm_wimax.c 
b/drivers/staging/gdm72xx/gdm_wimax.c
index 05ce2a2..814d2e4 100644
--- a/drivers/staging/gdm72xx/gdm_wimax.c
+++ b/drivers/staging/gdm72xx/gdm_wimax.c
@@ -263,9 +263,9 @@ static struct evt_entry *get_event_entry(void)
 {
struct evt_entry *e;
 
-   if (list_empty(_event.freeq))
+   if (list_empty(_event.freeq)) {
e = alloc_event_entry();
-   else {
+   } else {
e = list_entry(wm_event.freeq.next, struct evt_entry, list);
list_del(>list);
}
@@ -379,9 +379,9 @@ static int gdm_wimax_tx(struct sk_buff *skb, struct 
net_device *dev)
}
 
#if !defined(LOOPBACK_TEST)
-   if (!fsm)
+   if (!fsm) {
netdev_err(dev, "ASSERTION ERROR: fsm is NULL!!\n");
-   else if (fsm->m_status != M_CONNECTED) {
+   } else if (fsm->m_status != M_CONNECTED) {
netdev_emerg(dev, "ASSERTION ERROR: Device is NOT ready. 
status=%d\n",
 fsm->m_status);
kfree_skb(skb);
@@ -544,9 +544,9 @@ static void gdm_update_fsm(struct net_device *dev, struct 
fsm_s *new_fsm)
 
if (cur_fsm->m_status != new_fsm->m_status ||
cur_fsm->c_status != new_fsm->c_status) {
-   if (new_fsm->m_status == M_CONNECTED)
+   if (new_fsm->m_status == M_CONNECTED) {
netif_carrier_on(dev);
-   else if (cur_fsm->m_status == M_CONNECTED) {
+   } else if (cur_fsm->m_status == M_CONNECTED) {
netif_carrier_off(dev);
#if defined(CONFIG_WIMAX_GDM72XX_QOS)
gdm_qos_release_list(nic);
@@ -855,9 +855,9 @@ static void prepare_rx_complete(void *arg, void *data, int 
len)
int ret;
 
ret = gdm_wimax_get_prepared_info(nic->netdev, data, len);
-   if (ret == 1)
+   if (ret == 1) {
gdm_wimax_rcv_with_cb(nic, rx_complete, nic);
-   else {
+   } else {
if (ret < 0)
netdev_err(nic->netdev,
   "get_prepared_info failed(%d)\n", ret);
diff --git a/drivers/staging/gdm72xx/netlink_k.c 
b/drivers/staging/gdm72xx/netlink_k.c
index af7f1c1..52317c7 100644
--- a/drivers/staging/gdm72xx/netlink_k.c
+++ b/drivers/staging/gdm72xx/netlink_k.c
@@ -75,8 +75,9 @@ static void netlink_rcv_cb(struct sk_buff *skb)
netdev_err(skb->dev,
   "dev_get_by_index(%d) is not 
found.\n",
   ifindex);
-   } else
+   } else {
netdev_err(skb->dev, "Unregistered Callback\n");
+   }
}
 }
 
@@ -144,9 +145,9 @@ int netlink_send(struct sock *sock, int group, u16 type, 
void *msg, int len)
 
ret = netlink_broadcast(sock, skb, 0, group+1, GFP_ATOMIC);
 
-   if (!ret)
+   if (!ret) {
return len;
-   else {
+   } else {
if (ret != -ESRCH) {
pr_err("netlink_broadcast g=%d, t=%d, l=%d, r=%d\n",
   group, type, len, ret);
-- 
1.8.4

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[PATCH v4 5/10] staging: gdm72xx: Fixed some camelCase variables

[Michalis Pappas]

Fixed some camelCase variables

Signed-off-by: Michalis Pappas 
---
 drivers/staging/gdm72xx/gdm_qos.c | 31 +++
 1 file changed, 15 insertions(+), 16 deletions(-)

diff --git a/drivers/staging/gdm72xx/gdm_qos.c 
b/drivers/staging/gdm72xx/gdm_qos.c
index 519db48..465f695 100644
--- a/drivers/staging/gdm72xx/gdm_qos.c
+++ b/drivers/staging/gdm72xx/gdm_qos.c
@@ -142,24 +142,24 @@ void gdm_qos_release_list(void *nic_ptr)
free_qos_entry_list(_list);
 }
 
-static u32 chk_ipv4_rule(struct gdm_wimax_csr_s *csr, u8 *Stream, u8 *port)
+static u32 chk_ipv4_rule(struct gdm_wimax_csr_s *csr, u8 *stream, u8 *port)
 {
int i;
 
if (csr->classifier_rule_en) {
-   if (((Stream[1] & csr->ip2s_mask) < csr->ip2s_lo) ||
-   ((Stream[1] & csr->ip2s_mask) > csr->ip2s_hi))
+   if (((stream[1] & csr->ip2s_mask) < csr->ip2s_lo) ||
+   ((stream[1] & csr->ip2s_mask) > csr->ip2s_hi))
return 1;
}
 
if (csr->classifier_rule_en) {
-   if (Stream[9] != csr->protocol)
+   if (stream[9] != csr->protocol)
return 1;
}
 
if (csr->classifier_rule_en) {
for (i = 0; i < 4; i++) {
-   if ((Stream[12 + i] & csr->ipsrc_addrmask[i]) !=
+   if ((stream[12 + i] & csr->ipsrc_addrmask[i]) !=
(csr->ipsrc_addr[i] & csr->ipsrc_addrmask[i]))
return 1;
}
@@ -167,7 +167,7 @@ static u32 chk_ipv4_rule(struct gdm_wimax_csr_s *csr, u8 
*Stream, u8 *port)
 
if (csr->classifier_rule_en) {
for (i = 0; i < 4; i++) {
-   if ((Stream[16 + i] & csr->ipdst_addrmask[i]) !=
+   if ((stream[16 + i] & csr->ipdst_addrmask[i]) !=
(csr->ipdst_addr[i] & csr->ipdst_addrmask[i]))
return 1;
}
@@ -190,16 +190,15 @@ static u32 chk_ipv4_rule(struct gdm_wimax_csr_s *csr, u8 
*Stream, u8 *port)
 
 static u32 get_qos_index(struct nic *nic, u8 *iph, u8 *tcpudph)
 {
-   u32 IP_Ver, Header_Len, i;
+   u32 IP_ver, i;
struct qos_cb_s *qcb = >qos;
 
if (iph == NULL || tcpudph == NULL)
return -1;
 
-   IP_Ver = (iph[0]>>4)&0xf;
-   Header_Len = iph[0]&0xf;
+   IP_ver = (iph[0]>>4)&0xf;
 
-   if (IP_Ver == 4) {
+   if (IP_ver == 4) {
for (i = 0; i < QOS_MAX; i++) {
if (qcb->csr[i].enabled) {
if (qcb->csr[i].classifier_rule_en) {
@@ -336,16 +335,16 @@ void gdm_recv_qos_hci_packet(void *nic_ptr, u8 *buf, int 
size)
 {
struct nic *nic = nic_ptr;
u32 i, SFID, index, pos;
-   u8 subCmdEvt;
+   u8 sub_cmd_evt;
struct qos_cb_s *qcb = >qos;
struct qos_entry_s *entry, *n;
struct list_head send_list;
struct list_head free_list;
unsigned long flags;
 
-   subCmdEvt = (u8)buf[4];
+   sub_cmd_evt = (u8)buf[4];
 
-   if (subCmdEvt == QOS_REPORT) {
+   if (sub_cmd_evt == QOS_REPORT) {
spin_lock_irqsave(>qos_lock, flags);
for (i = 0; i < qcb->qos_list_cnt; i++) {
SFID = ((buf[(i*5)+6]<<24)&0xff00);
@@ -367,7 +366,7 @@ void gdm_recv_qos_hci_packet(void *nic_ptr, u8 *buf, int 
size)
return;
}
 
-   /* subCmdEvt == QOS_ADD || subCmdEvt == QOS_CHANG_DEL */
+   /* sub_cmd_evt == QOS_ADD || sub_cmd_evt == QOS_CHANG_DEL */
pos = 6;
SFID = ((buf[pos++]<<24)&0xff00);
SFID += ((buf[pos++]<<16)&0xff);
@@ -382,7 +381,7 @@ void gdm_recv_qos_hci_packet(void *nic_ptr, u8 *buf, int 
size)
return;
}
 
-   if (subCmdEvt == QOS_ADD) {
+   if (sub_cmd_evt == QOS_ADD) {
netdev_dbg(nic->netdev, "QOS_ADD SFID = 0x%x, index=%d\n",
   SFID, index);
 
@@ -423,7 +422,7 @@ void gdm_recv_qos_hci_packet(void *nic_ptr, u8 *buf, int 
size)
 
qcb->qos_limit_size = 254/qcb->qos_list_cnt;
spin_unlock_irqrestore(>qos_lock, flags);
-   } else if (subCmdEvt == QOS_CHANGE_DEL) {
+   } else if (sub_cmd_evt == QOS_CHANGE_DEL) {
netdev_dbg(nic->netdev, "QOS_CHANGE_DEL SFID = 0x%x, 
index=%d\n",
   SFID, index);
 
-- 
1.8.4

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[PATCH v4 4/10] staging: gdm72xx: Moved logical continuation to previous line to conform to coding style

[Michalis Pappas]

Moved logical continuation to previous line to conform to coding style

---
 drivers/staging/gdm72xx/gdm_usb.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/gdm72xx/gdm_usb.c 
b/drivers/staging/gdm72xx/gdm_usb.c
index 9ddf8f5..b9d7643 100644
--- a/drivers/staging/gdm72xx/gdm_usb.c
+++ b/drivers/staging/gdm72xx/gdm_usb.c
@@ -518,8 +518,8 @@ static void do_pm_control(struct work_struct *work)
usb_autopm_put_interface(udev->intf);
 
spin_lock_irqsave(>lock, flags);
-   if (!(udev->usbdev->state & USB_STATE_SUSPENDED)
-   && (!list_empty(>hci_list) || !list_empty(>sdu_list))) {
+   if (!(udev->usbdev->state & USB_STATE_SUSPENDED) &&
+(!list_empty(>hci_list) || !list_empty(>sdu_list))) {
struct usb_tx *t, *temp;
 
list_for_each_entry_safe(t, temp, >pending_list, p_list) {
-- 
1.8.4

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[PATCH v4 3/10] staging: gdm72xx: Modified struct allocation to match coding standards

[Michalis Pappas]

Modified struct allocation to match coding standards

---
 drivers/staging/gdm72xx/gdm_qos.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/staging/gdm72xx/gdm_qos.c 
b/drivers/staging/gdm72xx/gdm_qos.c
index 50d43ad..519db48 100644
--- a/drivers/staging/gdm72xx/gdm_qos.c
+++ b/drivers/staging/gdm72xx/gdm_qos.c
@@ -56,7 +56,7 @@ static void *alloc_qos_entry(void)
}
spin_unlock_irqrestore(_free_list.lock, flags);
 
-   entry = kmalloc(sizeof(struct qos_entry_s), GFP_ATOMIC);
+   entry = kmalloc(sizeof(*entry), GFP_ATOMIC);
return entry;
 }
 
-- 
1.8.4

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[PATCH v4 2/10] staging: gdm72xx: Replaced comparisons on jiffies values with wrap-safe functions

[Michalis Pappas]

Replaced comparisons on jiffies values with wrap-safe functions.

Signed-off-by: Michalis Pappas 
---
 drivers/staging/gdm72xx/gdm_usb.c   | 2 +-
 drivers/staging/gdm72xx/sdio_boot.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/gdm72xx/gdm_usb.c 
b/drivers/staging/gdm72xx/gdm_usb.c
index 20539d8..9ddf8f5 100644
--- a/drivers/staging/gdm72xx/gdm_usb.c
+++ b/drivers/staging/gdm72xx/gdm_usb.c
@@ -730,7 +730,7 @@ static int k_mode_thread(void *arg)
spin_unlock_irqrestore(_lock, flags2);
 
expire = jiffies + K_WAIT_TIME;
-   while (jiffies < expire)
+   while (time_before(jiffies, expire))
schedule_timeout(K_WAIT_TIME);
 
spin_lock_irqsave(>lock, flags);
diff --git a/drivers/staging/gdm72xx/sdio_boot.c 
b/drivers/staging/gdm72xx/sdio_boot.c
index cbe5dcf..2c02842 100644
--- a/drivers/staging/gdm72xx/sdio_boot.c
+++ b/drivers/staging/gdm72xx/sdio_boot.c
@@ -41,11 +41,11 @@ static u8 *tx_buf;
 
 static int ack_ready(struct sdio_func *func)
 {
-   unsigned long start = jiffies;
+   unsigned long wait = jiffies + HZ;
u8 val;
int ret;
 
-   while ((jiffies - start) < HZ) {
+   while (time_before(jiffies, wait)) {
val = sdio_readb(func, 0x13, );
if (val & 0x01)
return 1;
-- 
1.8.4

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[PATCH v4 1/10] staging: gdm72xx: Removed unnecessary extern declarations from header files

[Michalis Pappas]

Removed unnecessary extern declarations from header files

Signed-off-by: Michalis Pappas 
---
 drivers/staging/gdm72xx/gdm_wimax.h | 6 +++---
 drivers/staging/gdm72xx/sdio_boot.h | 2 +-
 drivers/staging/gdm72xx/usb_boot.h  | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/gdm72xx/gdm_wimax.h 
b/drivers/staging/gdm72xx/gdm_wimax.h
index 1fcfc85..3013bdb 100644
--- a/drivers/staging/gdm72xx/gdm_wimax.h
+++ b/drivers/staging/gdm72xx/gdm_wimax.h
@@ -64,8 +64,8 @@ struct nic {
 
 /*#define LOOPBACK_TEST */
 
-extern int register_wimax_device(struct phy_dev *phy_dev, struct device *pdev);
-extern int gdm_wimax_send_tx(struct sk_buff *skb, struct net_device *dev);
-extern void unregister_wimax_device(struct phy_dev *phy_dev);
+int register_wimax_device(struct phy_dev *phy_dev, struct device *pdev);
+int gdm_wimax_send_tx(struct sk_buff *skb, struct net_device *dev);
+void unregister_wimax_device(struct phy_dev *phy_dev);
 
 #endif
diff --git a/drivers/staging/gdm72xx/sdio_boot.h 
b/drivers/staging/gdm72xx/sdio_boot.h
index 373ac28..045c1f4 100644
--- a/drivers/staging/gdm72xx/sdio_boot.h
+++ b/drivers/staging/gdm72xx/sdio_boot.h
@@ -16,6 +16,6 @@
 
 struct sdio_func;
 
-extern int sdio_boot(struct sdio_func *func);
+int sdio_boot(struct sdio_func *func);
 
 #endif /* __SDIO_BOOT_H__ */
diff --git a/drivers/staging/gdm72xx/usb_boot.h 
b/drivers/staging/gdm72xx/usb_boot.h
index c715cd3..05308e2 100644
--- a/drivers/staging/gdm72xx/usb_boot.h
+++ b/drivers/staging/gdm72xx/usb_boot.h
@@ -16,7 +16,7 @@
 
 struct usb_device;
 
-extern int usb_boot(struct usb_device *usbdev, u16 pid);
-extern int usb_emergency(struct usb_device *usbdev);
+int usb_boot(struct usb_device *usbdev, u16 pid);
+int usb_emergency(struct usb_device *usbdev);
 
 #endif /* __USB_BOOT_H__ */
-- 
1.8.4

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[PATCH v4 0/3] staging: gdm72xx: Code cleanup

[Michalis Pappas]

Ok, I generated a new patchset based on running checkpatch.pl with the
--strict option, as well as any recommendations made earlier on this thread.

>From the following patches, both 8/10 and 9/10 involve whitespace fixes:
the former fixes issues reported by checkpatch.pl while the latter is
mostly indentation stuff found by inspecting the code, stray tabs etc. I
am sending them as separate patches in case one wants to keep only one
of them.

After applying the patches, the following issues are still reported by
checkpatch.pl. My comments follow:

ERROR: Macros with complex values should be enclosed in parenthesis
#34: FILE: usb_ids.h:34:
+#define USB_DEVICE_BOOTLOADER(vid, pid)\
+   {USB_DEVICE((vid), ((pid)_PID_MASK)|B_DOWNLOAD)},\
+   {USB_DEVICE((vid), ((pid)_PID_MASK)|B_DOWNLOAD|B_DIFF_DL_DRV)}

We agreed on that one already.

WARNING:LONG_LINE: line over 80 characters

This comes out in cases where I slightly bent the 80 chars rule to
improve readability. Should anyone complain that it doesn't fit their
terminal I promise I'll revert it back ;)

WARNING: unchecked sscanf return value
#295: FILE: gdm_wimax.c:295:
+   sscanf(e->dev->name, "wm%d", );

>From my understanding this should be ok. The value stored in e->dev>name
is generated by __dev_alloc_name which does all the necessary checks for
user supplied input etc, so it should be considered as a trusted value.

WARNING:SPACING: Missing a blank line after declarations

This is a false positive, as it refers to pointer-to-function
declarations withing structures.

CHECK:BRACES: Blank lines aren't necessary after an open brace '{'

I found it to be more readable the way it was, so I didn't touch it.

CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment

I am not sure what the locks are used for so I am unable to write a
comment on these.

Regards,

-Michalis
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Re: [PATCH v2 5/5] PCI: Remove redundant 'quirk_amd_nb_node'

[Suravee Suthikulanit]

On 4/21/2014 11:53 AM, Daniel J Blueman wrote:

Hi Myron,

On 04/20/2014 09:44 PM, Myron Stowe wrote:

On Sun, Apr 20, 2014 at 4:54 AM, Borislav Petkov  wrote:

On Fri, Apr 18, 2014 at 08:53:46PM -0600, Myron Stowe wrote:

With the amd_bus.c updates to support additional AMD processors
(11h, 12h,
14h 15h  and 16h) 'quirk_amd_nb_node' seems to be redundant.  This
patch
removes it.

Signed-off-by: Myron Stowe 


Good idea. Has this been tested, though? There are a bunch of places
using dev_to_node() which this quirk corrects, especially 'local_cpus'
in a bunch of sysfs nodes in the PCI hierarchy /sys/devices/pci*.


Borislav:

Thanks for the review, suggestions, and comments.

Just and FYI - I'll be gone until late in this coming week on a
backpacking trip in remote Utah.  I'll work your suggestions when I
get back.

With respect to this patch and testing.  Yes, I did test and it worked
for my situation.  I would like to hear from Daniel as I'm not exactly
sure what his last change was specific to.

Daniel: with the previous patches in this series applied do you still
need this quirk for your situation?


It's fine enough for us, since we'll always emit a PXM method for any
PCI host bridges (but roots), which gets correctly preserved with your
patches [1]. I don't have reason to suspect northbridges at bus 0,
devices 0x19 and later in each PCI domain having the wrong NUMA node is
going to cause any issues.

We could improve things by changing probe_pci_hostbridge to iterate all
PCI bus domains, but it's probably not a big deal to bail with one
warning, as we currently see multiple (which would become a lot on most
of our systems):

[3.155974] AMD-Bus: TOM: d800 aka 3456M
[3.160003]
[3.161496] AMD-Bus: WARNING: Failed to find root info for node 0x4,
link 0x0
[3.168625]
[3.170002]
[3.171492] AMD-Bus: WARNING: Failed to find root info for node 0x4,
link 0x0
[3.178614] AMD-Bus: WARNING: Failed to find root info for node 0x4,
link 0x0
[3.180003] AMD-Bus: TOM2: 0019 aka 102400M

Thanks,
   Daniel

-- [1] (two server NumaConnect system)

# lspci
:00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD/ATI] RD890
Northbridge only dual slot (2x16) PCI-e GFX Hydra part (rev 02)
:00:0d.0 PCI bridge: Advanced Micro Devices, Inc. [AMD/ATI] RD890
PCI to PCI bridge (external gfx1 port B)
:00:11.0 SATA controller: Advanced Micro Devices, Inc. [AMD/ATI]
SB7x0/SB8x0/SB9x0 SATA Controller [IDE mode]
:00:12.0 USB controller: Advanced Micro Devices, Inc. [AMD/ATI]
SB7x0/SB8x0/SB9x0 USB OHCI0 Controller
:00:12.1 USB controller: Advanced Micro Devices, Inc. [AMD/ATI]
SB7x0 USB OHCI1 Controller
:00:12.2 USB controller: Advanced Micro Devices, Inc. [AMD/ATI]
SB7x0/SB8x0/SB9x0 USB EHCI Controller
:00:13.0 USB controller: Advanced Micro Devices, Inc. [AMD/ATI]
SB7x0/SB8x0/SB9x0 USB OHCI0 Controller
:00:13.1 USB controller: Advanced Micro Devices, Inc. [AMD/ATI]
SB7x0 USB OHCI1 Controller
:00:13.2 USB controller: Advanced Micro Devices, Inc. [AMD/ATI]
SB7x0/SB8x0/SB9x0 USB EHCI Controller
:00:14.0 SMBus: Advanced Micro Devices, Inc. [AMD/ATI] SBx00 SMBus
Controller (rev 3d)
:00:14.1 IDE interface: Advanced Micro Devices, Inc. [AMD/ATI]
SB7x0/SB8x0/SB9x0 IDE Controller
:00:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD/ATI]
SB7x0/SB8x0/SB9x0 LPC host controller
:00:14.4 PCI bridge: Advanced Micro Devices, Inc. [AMD/ATI] SBx00
PCI to PCI Bridge
:00:14.5 USB controller: Advanced Micro Devices, Inc. [AMD/ATI]
SB7x0/SB8x0/SB9x0 USB OHCI2 Controller
:00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 0
:00:18.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 1
:00:18.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 2
:00:18.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 3
:00:18.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 4
:00:18.5 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 5
:00:19.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 0
:00:19.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 1
:00:19.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 2
:00:19.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 3
:00:19.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 4
:00:19.5 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 5
:00:1a.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 0
:00:1a.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 1
:00:1a.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h
Processor Function 2

Re: [Patch V2 0/9] I2C ACPI operation region handler support

[Lan Tianyu]

On 2014年04月29日 06:51, Rafael J. Wysocki wrote:
> On Monday, April 28, 2014 10:27:39 PM Lan Tianyu wrote:
>> ACPI 5.0 spec(5.5.2.4.5) defines GenericSerialBus(i2c, spi, uart) operation
>> region. It allows ACPI aml code able to access such kind of devices to
>> implement some ACPI standard method.
>>
>> On the Asus T100TA, Bios use GenericSerialBus operation region to access
>> i2c device to get battery info. So battery function depends on the I2C
>> operation region support. Here is the bug link.
>> https://bugzilla.kernel.org/show_bug.cgi?id=69011
>>
>> This patchset is to add I2C ACPI operation region handler support.
>>
>> Change Since V1:
>>Fix some code style and memory leak issues in Patch 7
> 
> Is it the only patch that has changed from v1?


I also remove a redundant semicolon in the PATCH 8. Sorry. I didn't
notice these patches are already in your tree. I will produce divergence
patches based on your bleeding-edge branch.


> 
> Rafael
> 


-- 
Best regards
Tianyu Lan
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Re: [PATCH v4 0/3] usb: chipidea: msm: Clean and fix glue layer driver

[Peter Chen]

On Mon, Apr 28, 2014 at 05:03:35PM +0300, Ivan T. Ivanov wrote:
> On Fri, 2014-04-25 at 03:10 +, Peter Chen wrote:
> >  
> > > 
> > > On Thu, 2014-04-24 at 08:38 +0800, Peter Chen wrote:
> > > > On Wed, Apr 23, 2014 at 03:28:01PM +0300, Ivan T. Ivanov wrote:
> > > > > From: "Ivan T. Ivanov" 
> > > > >
> > > > > This series intend to fix driver, which was broken for a while.
> > > > > It is used to create peripheral role device, which in coordination
> > > > > with phy-usb-msm driver could provide USB2.0 gadget support for
> > > > > Qualcomm targets.
> > > > >
> > > > > Changes since version 3.
> > > > >
> > > > >  - Fix typo in devicetree description file.
> > > > >
> > > > > Previews version can be found here:
> > > >
> > > > Since in your phy's patchset, you also access portsc which is in
> > > > chipidea register region, it is not a standard way.
> > > > In case, you will change something at chipidea driver in future when
> > > > you re-work your next revision phy's patchset, I do not send this
> > > > patchset to Greg right now.
> > > >
> > > 
> > > Did you see problems with _this_ particular patch set? There is no direct
> > > dependency between PHY patches and these changes.
> > > 
> >  
> > I have not seen problems for this patch set, if you make sure the current
> > phy operation (eg, "phy_type) at chipidea core does not affect you,
> > I am glad to accept this.
> 
> You mean phy_mode? Peripheral functionality is tested on top of
> current linus/master and it looks fine.
> 

Applied, thanks

-- 

Best Regards,
Peter Chen
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[PATCH 0/2] mmc: rtsx: revert support for mmc async request

[micky_ching]

From: Micky Ching 

The commit  have some problem,
using mutex_unlock() in atomic context, spinlock deadlock, it is hard to fix
these problem, and better to use a new method. So just remove it.

The commit  depends
on the previous patch. And mainly fix some problem for the previous patch. So
need remove.

Micky Ching (2):
  mmc: rtsx: Revert "mmc: rtsx: modify error handle and remove smatch
warnings"
  mmc: rtsx: Revert "mmc: rtsx: add support for pre_req and post_req"

 drivers/mfd/rtsx_pcr.c|  132 ---
 drivers/mmc/host/rtsx_pci_sdmmc.c |  459 +++--
 include/linux/mfd/rtsx_common.h   |1 -
 include/linux/mfd/rtsx_pci.h  |6 -
 4 files changed, 124 insertions(+), 474 deletions(-)

--
1.7.9.5
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[PATCH 1/2] mmc: rtsx: Revert "mmc: rtsx: modify error handle and remove smatch warnings"

[micky_ching]

From: Micky Ching 

This reverts commit 1f7b581b3ffcb2a8437397a02f4af89fa6934d08.

The patch depend on commit c42deffd5b53c9e583d83c7964854ede2f12410d
, but the previous
patch was discard. So we have to delete the patch.

Signed-off-by: Micky Ching 
---
 drivers/mmc/host/rtsx_pci_sdmmc.c |  119 +
 1 file changed, 54 insertions(+), 65 deletions(-)

diff --git a/drivers/mmc/host/rtsx_pci_sdmmc.c 
b/drivers/mmc/host/rtsx_pci_sdmmc.c
index 09340b9..76cfdcc 100644
--- a/drivers/mmc/host/rtsx_pci_sdmmc.c
+++ b/drivers/mmc/host/rtsx_pci_sdmmc.c
@@ -81,24 +81,25 @@ static inline void sd_clear_error(struct realtek_pci_sdmmc 
*host)
 }
 
 #ifdef DEBUG
-static inline void sd_print_reg(struct realtek_pci_sdmmc *host, u16 reg)
-{
-   u8 val = 0;
-
-   if (rtsx_pci_read_register(host->pcr, reg, ) < 0)
-   dev_dbg(sdmmc_dev(host), "read 0x%04x failed\n", reg);
-   else
-   dev_dbg(sdmmc_dev(host), "0x%04X: 0x%02x\n", reg, val);
-}
-
 static void sd_print_debug_regs(struct realtek_pci_sdmmc *host)
 {
+   struct rtsx_pcr *pcr = host->pcr;
u16 i;
+   u8 *ptr;
+
+   /* Print SD host internal registers */
+   rtsx_pci_init_cmd(pcr);
+   for (i = 0xFDA0; i <= 0xFDAE; i++)
+   rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0);
+   for (i = 0xFD52; i <= 0xFD69; i++)
+   rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0);
+   rtsx_pci_send_cmd(pcr, 100);
 
+   ptr = rtsx_pci_get_cmd_data(pcr);
for (i = 0xFDA0; i <= 0xFDAE; i++)
-   sd_print_reg(host, i);
+   dev_dbg(sdmmc_dev(host), "0x%04X: 0x%02x\n", i, *(ptr++));
for (i = 0xFD52; i <= 0xFD69; i++)
-   sd_print_reg(host, i);
+   dev_dbg(sdmmc_dev(host), "0x%04X: 0x%02x\n", i, *(ptr++));
 }
 #else
 #define sd_print_debug_regs(host)
@@ -124,27 +125,19 @@ static void sd_request_timeout(unsigned long host_addr)
spin_lock_irqsave(>lock, flags);
 
if (!host->mrq) {
-   dev_err(sdmmc_dev(host), "error: request not exist\n");
-   spin_unlock_irqrestore(>lock, flags);
-   return;
+   dev_err(sdmmc_dev(host), "error: no request exist\n");
+   goto out;
}
 
-   if (host->cmd && host->data)
-   dev_err(sdmmc_dev(host), "error: cmd and data conflict\n");
-
-   if (host->cmd) {
+   if (host->cmd)
host->cmd->error = -ETIMEDOUT;
-   dev_dbg(sdmmc_dev(host), "timeout for cmd %d\n",
-   host->cmd->opcode);
-   tasklet_schedule(>cmd_tasklet);
-   }
-
-   if (host->data) {
+   if (host->data)
host->data->error = -ETIMEDOUT;
-   dev_dbg(sdmmc_dev(host), "timeout for data transfer\n");
-   tasklet_schedule(>data_tasklet);
-   }
 
+   dev_dbg(sdmmc_dev(host), "timeout for request\n");
+
+out:
+   tasklet_schedule(>finish_tasklet);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -164,8 +157,7 @@ static void sd_finish_request(unsigned long host_addr)
mrq = host->mrq;
if (!mrq) {
dev_err(sdmmc_dev(host), "error: no request need finish\n");
-   spin_unlock_irqrestore(>lock, flags);
-   return;
+   goto out;
}
 
cmd = mrq->cmd;
@@ -175,6 +167,11 @@ static void sd_finish_request(unsigned long host_addr)
(mrq->stop && mrq->stop->error) ||
(cmd && cmd->error) || (data && data->error);
 
+   if (any_error) {
+   rtsx_pci_stop_cmd(pcr);
+   sd_clear_error(host);
+   }
+
if (data) {
if (any_error)
data->bytes_xfered = 0;
@@ -191,6 +188,7 @@ static void sd_finish_request(unsigned long host_addr)
host->cmd = NULL;
host->data = NULL;
 
+out:
spin_unlock_irqrestore(>lock, flags);
mutex_unlock(>pcr_mutex);
mmc_request_done(host->mmc, mrq);
@@ -375,11 +373,8 @@ static void sd_send_cmd(struct realtek_pci_sdmmc *host, 
struct mmc_command *cmd)
if (cmd->opcode == SD_SWITCH_VOLTAGE) {
err = rtsx_pci_write_register(pcr, SD_BUS_STAT,
0xFF, SD_CLK_TOGGLE_EN);
-   if (err < 0) {
-   rtsx_pci_write_register(pcr, SD_BUS_STAT,
-   SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
+   if (err < 0)
goto out;
-   }
}
 
rtsx_pci_init_cmd(pcr);
@@ -441,8 +436,7 @@ static void sd_get_rsp(unsigned long host_addr)
 
if (!cmd) {
dev_err(sdmmc_dev(host), "error: cmd not exist\n");
-   spin_unlock_irqrestore(>lock, flags);
-   return;
+   goto out;
}
 
spin_lock(>lock);
@@ -452,18 +446,16 @@ static void sd_get_rsp(unsigned long host_addr)
  

[PATCH 2/2] mmc: rtsx: Revert "mmc: rtsx: add support for pre_req and post_req"

[micky_ching]

From: Micky Ching 

This reverts commit c42deffd5b53c9e583d83c7964854ede2f12410d.

commit  did use
mutex_unlock() in tasklet, but mutex_unlock() can't used in
tasklet(atomic context). The driver need use mutex to avoid concurrency,
so we can't use tasklet here, the patch need to be removed.

The spinlock host->lock and pcr->lock may deadlock, one way to solve the
deadlock is remove host->lock in sd_isr_done_transfer(), but if using
workqueue the we can avoid using the spinlock and also avoid the problem.

Signed-off-by: Micky Ching 
---
 drivers/mfd/rtsx_pcr.c|  132 
 drivers/mmc/host/rtsx_pci_sdmmc.c |  418 ++---
 include/linux/mfd/rtsx_common.h   |1 -
 include/linux/mfd/rtsx_pci.h  |6 -
 4 files changed, 109 insertions(+), 448 deletions(-)

diff --git a/drivers/mfd/rtsx_pcr.c b/drivers/mfd/rtsx_pcr.c
index c9de3d5..1d15735 100644
--- a/drivers/mfd/rtsx_pcr.c
+++ b/drivers/mfd/rtsx_pcr.c
@@ -338,28 +338,58 @@ int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct 
scatterlist *sglist,
int num_sg, bool read, int timeout)
 {
struct completion trans_done;
-   int err = 0, count;
+   u8 dir;
+   int err = 0, i, count;
long timeleft;
unsigned long flags;
+   struct scatterlist *sg;
+   enum dma_data_direction dma_dir;
+   u32 val;
+   dma_addr_t addr;
+   unsigned int len;
+
+   dev_dbg(&(pcr->pci->dev), "--> %s: num_sg = %d\n", __func__, num_sg);
+
+   /* don't transfer data during abort processing */
+   if (pcr->remove_pci)
+   return -EINVAL;
+
+   if ((sglist == NULL) || (num_sg <= 0))
+   return -EINVAL;
 
-   count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read);
+   if (read) {
+   dir = DEVICE_TO_HOST;
+   dma_dir = DMA_FROM_DEVICE;
+   } else {
+   dir = HOST_TO_DEVICE;
+   dma_dir = DMA_TO_DEVICE;
+   }
+
+   count = dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dma_dir);
if (count < 1) {
dev_err(&(pcr->pci->dev), "scatterlist map failed\n");
return -EINVAL;
}
dev_dbg(&(pcr->pci->dev), "DMA mapping count: %d\n", count);
 
+   val = ((u32)(dir & 0x01) << 29) | TRIG_DMA | ADMA_MODE;
+   pcr->sgi = 0;
+   for_each_sg(sglist, sg, count, i) {
+   addr = sg_dma_address(sg);
+   len = sg_dma_len(sg);
+   rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1);
+   }
 
spin_lock_irqsave(>lock, flags);
 
pcr->done = _done;
pcr->trans_result = TRANS_NOT_READY;
init_completion(_done);
+   rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr);
+   rtsx_pci_writel(pcr, RTSX_HDBCTLR, val);
 
spin_unlock_irqrestore(>lock, flags);
 
-   rtsx_pci_dma_transfer(pcr, sglist, count, read);
-
timeleft = wait_for_completion_interruptible_timeout(
_done, msecs_to_jiffies(timeout));
if (timeleft <= 0) {
@@ -383,7 +413,7 @@ out:
pcr->done = NULL;
spin_unlock_irqrestore(>lock, flags);
 
-   rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read);
+   dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dma_dir);
 
if ((err < 0) && (err != -ENODEV))
rtsx_pci_stop_cmd(pcr);
@@ -395,73 +425,6 @@ out:
 }
 EXPORT_SYMBOL_GPL(rtsx_pci_transfer_data);
 
-int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
-   int num_sg, bool read)
-{
-   enum dma_data_direction dir = read ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
-
-   if (pcr->remove_pci)
-   return -EINVAL;
-
-   if ((sglist == NULL) || num_sg < 1)
-   return -EINVAL;
-
-   return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir);
-}
-EXPORT_SYMBOL_GPL(rtsx_pci_dma_map_sg);
-
-int rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
-   int num_sg, bool read)
-{
-   enum dma_data_direction dir = read ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
-
-   if (pcr->remove_pci)
-   return -EINVAL;
-
-   if (sglist == NULL || num_sg < 1)
-   return -EINVAL;
-
-   dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir);
-   return num_sg;
-}
-EXPORT_SYMBOL_GPL(rtsx_pci_dma_unmap_sg);
-
-int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
-   int sg_count, bool read)
-{
-   struct scatterlist *sg;
-   dma_addr_t addr;
-   unsigned int len;
-   int i;
-   u32 val;
-   u8 dir = read ? DEVICE_TO_HOST : HOST_TO_DEVICE;
-   unsigned long flags;
-
-   if (pcr->remove_pci)
-   return -EINVAL;
-
-   if ((sglist == NULL) || (sg_count < 1))
-   return -EINVAL;
-
-   val = ((u32)(dir & 0x01) << 29) | TRIG_DMA | ADMA_MODE;
-   pcr->sgi = 0;
-   for_each_sg(sglist, sg, sg_count, i) {
-  

[PATCHv5] ARM: EXYNOS: Support secondary CPU boot of Exynos4212

[Chanwoo Choi]

From: Kyungmin Park 

This patch fix the offset of CPU boot address and change parameter of smc call
of SMC_CMD_CPU1BOOT command for Exynos4212.

Signed-off-by: Kyungmin Park 
Signed-off-by: Chanwoo Choi 
Reviewed-by: Tomasz Figa 
---
Changes from v4:
- Post only this patch separated from following patchset[1]
[1] https://lkml.org/lkml/2014/4/24/873

 arch/arm/mach-exynos/firmware.c | 15 ++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 932129e..aa01c42 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -18,6 +18,8 @@
 
 #include 
 
+#include 
+
 #include "smc.h"
 
 static int exynos_do_idle(void)
@@ -28,13 +30,24 @@ static int exynos_do_idle(void)
 
 static int exynos_cpu_boot(int cpu)
 {
+   /*
+* The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
+* But, Exynos4212 has only one secondary CPU so second parameter
+* isn't used for informing secure firmware about CPU id.
+*/
+   if (soc_is_exynos4212())
+   cpu = 0;
+
exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
return 0;
 }
 
 static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
 {
-   void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
+   void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c;
+
+   if (!soc_is_exynos4212())
+   boot_reg += 4*cpu;
 
__raw_writel(boot_addr, boot_reg);
return 0;
-- 
1.8.0

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Re: PATCH: mvsas: add support for Supermicro AOC-SAS2LP-MV8

[James Bottomley]

On Mon, 2014-04-28 at 18:16 -0700, Xiangliang Yu wrote:
> Hi, Jan
> I think below change may be better:
> { PCI_VDEVICE(MARVELL_EXT, 0x9485), chip_9485 },

Ben Hutchings already submitted a patch for this twice, which I cc'd you
on:

http://marc.info/?t=13927720393

will you ack it?  PCI_VDEVICE() is a sort of take it or leave it macro.
It's not important and it will look untidy and a bit confusing having a
mix of open coding and macros, so I'd say convert all or none.

James


> > Add support for the AOC-SAS2LP-MV8 SAS-2 controller from SuperMicro.
> > This controller has subdevice id 0x9485 instead of 0x9480, and apparently
> > this simple patch is the only thing needed to make it work.
> > 
> > # lspci -vn
> > [...]
> > 03:00.0 0104: 1b4b:9485 (rev 03)
> > Subsystem: 1b4b:9485
> > Flags: bus master, fast devsel, latency 0, IRQ 24
> > Memory at feba (64-bit, non-prefetchable) [size=128K]
> > Memory at febc (64-bit, non-prefetchable) [size=256K]
> > Expansion ROM at feb9 [disabled] [size=64K]
> > Capabilities: [40] Power Management version 3
> > Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
> > Capabilities: [70] Express Endpoint, MSI 00
> > Capabilities: [100] Advanced Error Reporting
> > Capabilities: [140] Virtual Channel
> > Kernel driver in use: mvsas
> > Kernel modules: mvsas
> > 
> > Signed-off-by: Jan Kasprzak 
> > 
> > diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c
> > index 5ff978b..eacee48 100644
> > --- a/drivers/scsi/mvsas/mv_init.c
> > +++ b/drivers/scsi/mvsas/mv_init.c
> > @@ -728,6 +728,15 @@ static struct pci_device_id mvs_pci_table[] = {
> > .class_mask = 0,
> > .driver_data= chip_9485,
> > },
> > +   {
> > +   .vendor = PCI_VENDOR_ID_MARVELL_EXT,
> > +   .device = 0x9485,
> > +   .subvendor  = PCI_ANY_ID,
> > +   .subdevice  = 0x9485,
> > +   .class  = 0,
> > +   .class_mask = 0,
> > +   .driver_data= chip_9485,
> > +   },
> > { PCI_VDEVICE(OCZ, 0x1021), chip_9485}, /* OCZ RevoDrive3 */
> > { PCI_VDEVICE(OCZ, 0x1022), chip_9485}, /* OCZ RevoDrive3/zDriveR4 
> > (exact
> > model unknown) */
> > { PCI_VDEVICE(OCZ, 0x1040), chip_9485}, /* OCZ RevoDrive3/zDriveR4 
> > (exact
> > model unknown) */
> > 
> > --
> > | Jan "Yenya" Kasprzak   |
> > | New GPG 4096R/A45477D5 - see http://www.fi.muni.cz/~kas/pgp-rollover.txt |
> > | http://www.fi.muni.cz/~kas/Journal: http://www.fi.muni.cz/~kas/blog/
> > |
> >   There's clearly a balance between "octopus merges are fine" and "Christ,
> >   that's not an octopus, that's a Cthulhu merge". --Linus Torvalds
> --
> To unsubscribe from this list: send the line "unsubscribe linux-scsi" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html



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Re: [PATCH] staging: rtl8188eu: Use USB subsystem functions to check endpoint type

[navin patidar]

On Mon, Apr 28, 2014 at 2:55 PM, Dan Carpenter  wrote:
> On Sat, Apr 26, 2014 at 10:13:55PM +0530, navin patidar wrote:
>> Use inline functions provided by USB subsystem to check endpoint type,
>> instead of macros implemented by driver to do the same.
>>
>> Unnecessary debugging messages are also removed.
>>
>
> I like both these changes but they would have been so much easier to
> review if you deleted the debugging messagese in [patch 1/2] and then
> changed the endpoint functions in [patch 2/2].
>
>> @@ -183,60 +143,36 @@ static struct dvobj_priv *usb_dvobj_init(struct 
>> usb_interface *usb_intf)
>>   pdvobjpriv->nr_endpoint = piface_desc->bNumEndpoints;
>>
>>   for (i = 0; i < pdvobjpriv->nr_endpoint; i++) {
>> +
>
> Don't put a blank line here, btw.
>
>> + int ep_num;
>>   phost_endp = phost_iface->endpoint + i;
>
> Anyway, please resend because it needs to be broken into two patches.

dan, I just did that.

regards,
navin patidar
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[PATCH 2/2] staging: rtl8188eu: Use USB subsystem functions to check endpoint type

[navin patidar]

Use inline functions provided by USB subsystem to check endpoint type,
instead of inline functions implemented by driver to do the same.

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/os_dep/usb_intf.c |   57 +--
 1 file changed, 10 insertions(+), 47 deletions(-)

diff --git a/drivers/staging/rtl8188eu/os_dep/usb_intf.c 
b/drivers/staging/rtl8188eu/os_dep/usb_intf.c
index 8a52829..8ed2ac8 100644
--- a/drivers/staging/rtl8188eu/os_dep/usb_intf.c
+++ b/drivers/staging/rtl8188eu/os_dep/usb_intf.c
@@ -80,46 +80,6 @@ static struct rtw_usb_drv rtl8188e_usb_drv = {
 
 static struct rtw_usb_drv *usb_drv = _usb_drv;
 
-static inline int RT_usb_endpoint_dir_in(const struct usb_endpoint_descriptor 
*epd)
-{
-   return (epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN;
-}
-
-static inline int RT_usb_endpoint_dir_out(const struct usb_endpoint_descriptor 
*epd)
-{
-   return (epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT;
-}
-
-static inline int RT_usb_endpoint_xfer_int(const struct 
usb_endpoint_descriptor *epd)
-{
-   return (epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == 
USB_ENDPOINT_XFER_INT;
-}
-
-static inline int RT_usb_endpoint_xfer_bulk(const struct 
usb_endpoint_descriptor *epd)
-{
-   return (epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == 
USB_ENDPOINT_XFER_BULK;
-}
-
-static inline int RT_usb_endpoint_is_bulk_in(const struct 
usb_endpoint_descriptor *epd)
-{
-   return RT_usb_endpoint_xfer_bulk(epd) && RT_usb_endpoint_dir_in(epd);
-}
-
-static inline int RT_usb_endpoint_is_bulk_out(const struct 
usb_endpoint_descriptor *epd)
-{
-   return RT_usb_endpoint_xfer_bulk(epd) && RT_usb_endpoint_dir_out(epd);
-}
-
-static inline int usb_endpoint_is_int(const struct usb_endpoint_descriptor 
*epd)
-{
-   return RT_usb_endpoint_xfer_int(epd) && RT_usb_endpoint_dir_in(epd);
-}
-
-static inline int RT_usb_endpoint_num(const struct usb_endpoint_descriptor 
*epd)
-{
-   return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
-}
-
 static u8 rtw_init_intf_priv(struct dvobj_priv *dvobj)
 {
u8 rst = _SUCCESS;
@@ -183,21 +143,24 @@ static struct dvobj_priv *usb_dvobj_init(struct 
usb_interface *usb_intf)
pdvobjpriv->nr_endpoint = piface_desc->bNumEndpoints;
 
for (i = 0; i < pdvobjpriv->nr_endpoint; i++) {
+   int ep_num;
phost_endp = phost_iface->endpoint + i;
+
if (phost_endp) {
pendp_desc = _endp->desc;
+   ep_num = usb_endpoint_num(pendp_desc);
 
-   if (RT_usb_endpoint_is_bulk_in(pendp_desc)) {
-   pdvobjpriv->RtInPipe[pdvobjpriv->RtNumInPipes] 
= RT_usb_endpoint_num(pendp_desc);
+   if (usb_endpoint_is_bulk_in(pendp_desc)) {
+   pdvobjpriv->RtInPipe[pdvobjpriv->RtNumInPipes] 
= ep_num;
pdvobjpriv->RtNumInPipes++;
-   } else if (usb_endpoint_is_int(pendp_desc)) {
-   pdvobjpriv->RtInPipe[pdvobjpriv->RtNumInPipes] 
= RT_usb_endpoint_num(pendp_desc);
+   } else if (usb_endpoint_is_int_in(pendp_desc)) {
+   pdvobjpriv->RtInPipe[pdvobjpriv->RtNumInPipes] 
= ep_num;
pdvobjpriv->RtNumInPipes++;
-   } else if (RT_usb_endpoint_is_bulk_out(pendp_desc)) {
-   
pdvobjpriv->RtOutPipe[pdvobjpriv->RtNumOutPipes] = 
RT_usb_endpoint_num(pendp_desc);
+   } else if (usb_endpoint_is_bulk_out(pendp_desc)) {
+   
pdvobjpriv->RtOutPipe[pdvobjpriv->RtNumOutPipes] = ep_num;
pdvobjpriv->RtNumOutPipes++;
}
-   pdvobjpriv->ep_num[i] = RT_usb_endpoint_num(pendp_desc);
+   pdvobjpriv->ep_num[i] = ep_num;
}
}
 
-- 
1.7.10.4

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[PATCH 1/2] staging: rtl8188eu: Remove debugging messages from usb_dvobj_init()

[navin patidar]

Unnecessary debugging messages are removed from usb_dvobj_init().

Signed-off-by: navin patidar 
---
 drivers/staging/rtl8188eu/os_dep/usb_intf.c |   34 +++
 1 file changed, 3 insertions(+), 31 deletions(-)

diff --git a/drivers/staging/rtl8188eu/os_dep/usb_intf.c 
b/drivers/staging/rtl8188eu/os_dep/usb_intf.c
index 49a4ce4..8a52829 100644
--- a/drivers/staging/rtl8188eu/os_dep/usb_intf.c
+++ b/drivers/staging/rtl8188eu/os_dep/usb_intf.c
@@ -187,30 +187,13 @@ static struct dvobj_priv *usb_dvobj_init(struct 
usb_interface *usb_intf)
if (phost_endp) {
pendp_desc = _endp->desc;
 
-   DBG_88E("\nusb_endpoint_descriptor(%d):\n", i);
-   DBG_88E("bLength=%x\n", pendp_desc->bLength);
-   DBG_88E("bDescriptorType=%x\n",
-   pendp_desc->bDescriptorType);
-   DBG_88E("bEndpointAddress=%x\n",
-   pendp_desc->bEndpointAddress);
-   DBG_88E("wMaxPacketSize=%d\n",
-   le16_to_cpu(pendp_desc->wMaxPacketSize));
-   DBG_88E("bInterval=%x\n", pendp_desc->bInterval);
-
if (RT_usb_endpoint_is_bulk_in(pendp_desc)) {
-   DBG_88E("RT_usb_endpoint_is_bulk_in = %x\n",
-   RT_usb_endpoint_num(pendp_desc));
pdvobjpriv->RtInPipe[pdvobjpriv->RtNumInPipes] 
= RT_usb_endpoint_num(pendp_desc);
pdvobjpriv->RtNumInPipes++;
} else if (usb_endpoint_is_int(pendp_desc)) {
-   DBG_88E("usb_endpoint_is_int = %x, Interval = 
%x\n",
-   RT_usb_endpoint_num(pendp_desc),
-   pendp_desc->bInterval);
pdvobjpriv->RtInPipe[pdvobjpriv->RtNumInPipes] 
= RT_usb_endpoint_num(pendp_desc);
pdvobjpriv->RtNumInPipes++;
} else if (RT_usb_endpoint_is_bulk_out(pendp_desc)) {
-   DBG_88E("RT_usb_endpoint_is_bulk_out = %x\n",
-   RT_usb_endpoint_num(pendp_desc));

pdvobjpriv->RtOutPipe[pdvobjpriv->RtNumOutPipes] = 
RT_usb_endpoint_num(pendp_desc);
pdvobjpriv->RtNumOutPipes++;
}
@@ -218,25 +201,14 @@ static struct dvobj_priv *usb_dvobj_init(struct 
usb_interface *usb_intf)
}
}
 
-   DBG_88E("nr_endpoint=%d, in_num=%d, out_num=%d\n\n",
-   pdvobjpriv->nr_endpoint, pdvobjpriv->RtNumInPipes,
-   pdvobjpriv->RtNumOutPipes);
-
-   if (pusbd->speed == USB_SPEED_HIGH) {
+   if (pusbd->speed == USB_SPEED_HIGH)
pdvobjpriv->ishighspeed = true;
-   DBG_88E("USB_SPEED_HIGH\n");
-   } else {
+   else
pdvobjpriv->ishighspeed = false;
-   DBG_88E("NON USB_SPEED_HIGH\n");
-   }
 
-   if (rtw_init_intf_priv(pdvobjpriv) == _FAIL) {
-   RT_TRACE(_module_os_intfs_c_, _drv_err_,
-("\n Can't INIT rtw_init_intf_priv\n"));
+   if (rtw_init_intf_priv(pdvobjpriv) == _FAIL)
goto free_dvobj;
-   }
 
-   /* 3 misc */
sema_init(&(pdvobjpriv->usb_suspend_sema), 0);
rtw_reset_continual_urb_error(pdvobjpriv);
 
-- 
1.7.10.4

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RE: PATCH: mvsas: add support for Supermicro AOC-SAS2LP-MV8

[Xiangliang Yu]

Hi, Jan
I think below change may be better:
{ PCI_VDEVICE(MARVELL_EXT, 0x9485), chip_9485 },

> Add support for the AOC-SAS2LP-MV8 SAS-2 controller from SuperMicro.
> This controller has subdevice id 0x9485 instead of 0x9480, and apparently
> this simple patch is the only thing needed to make it work.
> 
> # lspci -vn
> [...]
> 03:00.0 0104: 1b4b:9485 (rev 03)
>   Subsystem: 1b4b:9485
>   Flags: bus master, fast devsel, latency 0, IRQ 24
>   Memory at feba (64-bit, non-prefetchable) [size=128K]
>   Memory at febc (64-bit, non-prefetchable) [size=256K]
>   Expansion ROM at feb9 [disabled] [size=64K]
>   Capabilities: [40] Power Management version 3
>   Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
>   Capabilities: [70] Express Endpoint, MSI 00
>   Capabilities: [100] Advanced Error Reporting
>   Capabilities: [140] Virtual Channel
>   Kernel driver in use: mvsas
>   Kernel modules: mvsas
> 
> Signed-off-by: Jan Kasprzak 
> 
> diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c
> index 5ff978b..eacee48 100644
> --- a/drivers/scsi/mvsas/mv_init.c
> +++ b/drivers/scsi/mvsas/mv_init.c
> @@ -728,6 +728,15 @@ static struct pci_device_id mvs_pci_table[] = {
>   .class_mask = 0,
>   .driver_data= chip_9485,
>   },
> + {
> + .vendor = PCI_VENDOR_ID_MARVELL_EXT,
> + .device = 0x9485,
> + .subvendor  = PCI_ANY_ID,
> + .subdevice  = 0x9485,
> + .class  = 0,
> + .class_mask = 0,
> + .driver_data= chip_9485,
> + },
>   { PCI_VDEVICE(OCZ, 0x1021), chip_9485}, /* OCZ RevoDrive3 */
>   { PCI_VDEVICE(OCZ, 0x1022), chip_9485}, /* OCZ RevoDrive3/zDriveR4 
> (exact
> model unknown) */
>   { PCI_VDEVICE(OCZ, 0x1040), chip_9485}, /* OCZ RevoDrive3/zDriveR4 
> (exact
> model unknown) */
> 
> --
> | Jan "Yenya" Kasprzak   |
> | New GPG 4096R/A45477D5 - see http://www.fi.muni.cz/~kas/pgp-rollover.txt |
> | http://www.fi.muni.cz/~kas/Journal: http://www.fi.muni.cz/~kas/blog/
> |
>   There's clearly a balance between "octopus merges are fine" and "Christ,
>   that's not an octopus, that's a Cthulhu merge". --Linus Torvalds
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Re: [PATCHSET 00/17] perf report: Add -F option for specifying output fields (v4)

[Namhyung Kim]

Hi Don,

On Mon, 28 Apr 2014 15:46:42 -0400, Don Zickus wrote:
> On Thu, Apr 24, 2014 at 05:00:15PM -0400, Don Zickus wrote:
>> On Thu, Apr 24, 2014 at 10:41:39PM +0900, Namhyung Kim wrote:
>> > Hi Don,
>> > 
>> > 2014-04-23 (수), 08:58 -0400, Don Zickus:
>> > > On Wed, Apr 23, 2014 at 03:15:35PM +0900, Namhyung Kim wrote:
>> > > > On Tue, 22 Apr 2014 17:16:47 -0400, Don Zickus wrote:
>> > > > > ./perf mem record -a grep -r foo /* > /dev/null
>> > > > > ./perf mem report -F overhead,symbol_daddr,pid -s symbol_daddr,pid 
>> > > > > --stdio 
>> > > > >
>> > > > > I was thinking I could sort everything based on the symbol_daddr and 
>> > > > > pid.
>> > > > > Then re-sort the output to display the highest 'symbol_daddr,pid' 
>> > > > > pair.
>> > > > > But it didn't seem to work that way.  Instead it seems like I get the
>> > > > > original sort just displayed in the -F format.
>> > > > 
>> > > > Could you please show me the output of your example?
>> > > 
>> > > 
>> > > # To display the perf.data header info, please use --header/--header-only
>> > > # options.
>> > > #
>> > > # Samples: 96K of event 'cpu/mem-loads/pp'
>> > > # Total weight : 1102938
>> > > # Sort order   : symbol_daddr,pid
>> > > #
>> > > # Overhead Data Symbol  Command:  Pid
>> > > #  
>> > > ..
>> > > #
>> > >  0.00%  [k] 0x8807a8c1cf80 grep:116437
>> > >  0.00%  [k] 0x8807a8c8cee0 grep:116437
>> > >  0.00%  [k] 0x8807a8dceea0 grep:116437
>> > >  0.01%  [k] 0x8807a9298dc0 grep:116437
>> > >  0.01%  [k] 0x8807a934be40 grep:116437
>> > >  0.00%  [k] 0x8807a9416ec0 grep:116437
>> > >  0.02%  [k] 0x8807a9735700 grep:116437
>> > >  0.00%  [k] 0x8807a98e9460 grep:116437
>> > >  0.02%  [k] 0x8807a9afc890 grep:116437
>> > >  0.00%  [k] 0x8807aa64feb0 grep:116437
>> > >  0.02%  [k] 0x8807aa6b0030 grep:116437
>> > 
>> > Hmm.. it seems that it's exactly sorted by the data symbol addresses, so
>> > I don't see any problem here.  What did you expect?  If you want to see
>> > those symbol_daddr,pid pair to be sorted by overhead, you can use the
>> > one of -F or -s option only.
>> 
>> Good question.  I guess I was hoping to see things sorted by overhead, but
>> as you said removing all the -F options gives me that.  I have been
>> distracted with other fires this week, I lost focus at what I was trying
>> to accomplish.
>> 
>> Let me figure that out again and try to come up with a more clear email
>> explaining what I was looking for (for myself at least :-) ).
>
> Ok.  I think I figured out what I need.  This might be quite long..

Great. :)

>
>
> Our orignal concept for the c2c tool was to sort hist entries into
> cachelines, filter in only the HITMs and stores and re-sort based on
> cachelines with the most weight.
>
> So using today's perf with a new search called 'cacheline' to achieve
> this (copy-n-pasted):

Maybe 'd'cacheline is a more appropriate name IMHO.

>
> 
> #define CACHE_LINESIZE   64
> #define CLINE_OFFSET_MSK (CACHE_LINESIZE - 1)
> #define CLADRS(a)((a) & ~(CLINE_OFFSET_MSK))
> #define CLOFFSET(a)  (int)((a) &  (CLINE_OFFSET_MSK))
>
> static int64_t
> sort__cacheline_cmp(struct hist_entry *left, struct hist_entry *right)
> {
>u64 l, r;
>struct map *l_map, *r_map;
>
>if (!left->mem_info)  return -1;
>if (!right->mem_info) return 1;
>
>/* group event types together */
>if (left->cpumode > right->cpumode) return -1;
>if (left->cpumode < right->cpumode) return 1;
>
>l_map = left->mem_info->daddr.map;
>r_map = right->mem_info->daddr.map;
>
>/* properly sort NULL maps to help combine them */
>if (!l_map && !r_map)
>goto addr;
>
>if (!l_map) return -1;
>if (!r_map) return 1;
>
>if (l_map->maj > r_map->maj) return -1;
>if (l_map->maj < r_map->maj) return 1;
>
>if (l_map->min > r_map->min) return -1;
>if (l_map->min < r_map->min) return 1;
>
>if (l_map->ino > r_map->ino) return -1;
>if (l_map->ino < r_map->ino) return 1;
>
>if (l_map->ino_generation > r_map->ino_generation) return -1;
>if (l_map->ino_generation < r_map->ino_generation) return 1;
>
>/*
> * Addresses with no major/minor numbers are assumed to be
> * anonymous in userspace.  Sort those on pid then address.
> *
> * The kernel and non-zero major/minor mapped areas are
> * assumed to be unity mapped.  Sort those on address.
> */
>
>if ((left->cpumode != PERF_RECORD_MISC_KERNEL) &&
>!l_map->maj && !l_map->min && !l_map->ino &&
>!l_map->ino_generation) {
>/* userspace anonymous */
>
>if (left->thread->pid_ > right->thread->pid_) return -1;
>if (left->thread->pid_ < 

Re: [PATCH 5/5] ARM: sunxi: Remove sun4i and sun7i machine definitions

[Olof Johansson]

On Wed, Apr 23, 2014 at 9:02 AM, Arnd Bergmann  wrote:
> On Wednesday 23 April 2014 17:04:36 Maxime Ripard wrote:
>>
>> -static void __init sunxi_dt_init(void)
>> -{
>> -   of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
>> -}
>> -
>> -static const char * const sunxi_board_dt_compat[] = {
>> -   "allwinner,sun4i-a10",
>> -   "allwinner,sun5i-a10s",
>> -   "allwinner,sun5i-a13",
>> -   NULL,
>> -};
>> -
>> -DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
>> -   .init_machine   = sunxi_dt_init,
>> -   .dt_compat  = sunxi_board_dt_compat,
>> -MACHINE_END
>> -
>>  static const char * const sun6i_board_dt_compat[] = {
>> "allwinner,sun6i-a31",
>> NULL,
>
> I'd like to hear more opinions on this. We could either rely
> on the generic code, or we could keep the entry with just
> the .dt_compat line and the name, so /proc/cpuinfo contains
> a meaningful platform name.
>
> Either approach works for me, but I think we should do this
> consistent across platforms. Olof, do you have an opinion?

In reality, today, most platforms still need some out-of-tree stuff
that usually goes into the mach directory on out of tree kernels. It
also gives a place to stick the Kconfig entries, it's been nice to
have them split out in per-platform Kconfigs instead of having them
all modify and conflict the shared one.

I know those aren't strong arguments to keep it, but given that all
other things are more or less equal, it's a good a reason as any.

But, I'm not picky either way.


-Olof
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[f2fs-dev][PATCH 3/3 v2] f2fs: fix to truncate inline data in inode page when setattr

[Chao Yu]

Previous we do not truncate inline data in inode page when setattr, so following
case could still read the inline data which has already truncated:

1.write inline data
2.ftruncate size to 0
3.ftruncate size to max inline data size
4.read from offset 0

This patch introduces truncate_inline_data() to fix this problem.

change log from v1:
 o fix a bug and do not truncate first page data after truncate inline data.

Signed-off-by: Chao Yu 
---
 fs/f2fs/f2fs.h   |1 +
 fs/f2fs/file.c   |3 +++
 fs/f2fs/inline.c |   18 ++
 3 files changed, 22 insertions(+)

diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index 2b67679..676a2c6 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -1410,5 +1410,6 @@ bool f2fs_may_inline(struct inode *);
 int f2fs_read_inline_data(struct inode *, struct page *);
 int f2fs_convert_inline_data(struct inode *, pgoff_t);
 int f2fs_write_inline_data(struct inode *, struct page *, unsigned int);
+void truncate_inline_data(struct inode *, u64);
 int recover_inline_data(struct inode *, struct page *);
 #endif
diff --git a/fs/f2fs/file.c b/fs/f2fs/file.c
index d99d173..1b27bd6 100644
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@ -332,6 +332,9 @@ static void truncate_partial_data_page(struct inode *inode, 
u64 from)
unsigned offset = from & (PAGE_CACHE_SIZE - 1);
struct page *page;
 
+   if (f2fs_has_inline_data(inode))
+   return truncate_inline_data(inode, from);
+
if (!offset)
return;
 
diff --git a/fs/f2fs/inline.c b/fs/f2fs/inline.c
index 3258c7c..d215dbb 100644
--- a/fs/f2fs/inline.c
+++ b/fs/f2fs/inline.c
@@ -176,6 +176,24 @@ int f2fs_write_inline_data(struct inode *inode,
return 0;
 }
 
+void truncate_inline_data(struct inode *inode, u64 from)
+{
+   struct f2fs_sb_info *sbi = F2FS_SB(inode->i_sb);
+   struct page *ipage;
+
+   if (from >= MAX_INLINE_DATA)
+   return;
+
+   ipage = get_node_page(sbi, inode->i_ino);
+   if (IS_ERR(ipage))
+   return;
+
+   zero_user_segment(ipage, INLINE_DATA_OFFSET + from,
+   INLINE_DATA_OFFSET + MAX_INLINE_DATA);
+   set_page_dirty(ipage);
+   f2fs_put_page(ipage, 1);
+}
+
 int recover_inline_data(struct inode *inode, struct page *npage)
 {
struct f2fs_sb_info *sbi = F2FS_SB(inode->i_sb);
-- 
1.7.9.5


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Re: [PATCH -V1 19/22] vfs: Cache richacl in struct inode

[Dave Chinner]

On Sun, Apr 27, 2014 at 09:44:50PM +0530, Aneesh Kumar K.V wrote:
> From: Andreas Gruenbacher 
> 
> Cache richacls in struct inode so that this doesn't have to be done
> individually in each filesystem.
> 
> Signed-off-by: Andreas Gruenbacher 
> Signed-off-by: Aneesh Kumar K.V 
> ---
>  fs/inode.c  | 25 ++-
>  include/linux/fs.h  | 12 +--
>  include/linux/richacl.h | 53 
> +
>  3 files changed, 83 insertions(+), 7 deletions(-)
> 
> diff --git a/fs/inode.c b/fs/inode.c
> index f96d2a6f88cc..b96a16d5c653 100644
> --- a/fs/inode.c
> +++ b/fs/inode.c
> @@ -18,6 +18,7 @@
>  #include  /* for inode_has_buffers */
>  #include 
>  #include 
> +#include 
>  #include "internal.h"
>  
>  /*
> @@ -185,7 +186,12 @@ int inode_init_always(struct super_block *sb, struct 
> inode *inode)
>   inode->i_mapping = mapping;
>   INIT_HLIST_HEAD(>i_dentry);  /* buggered by rcu freeing */
>  #ifdef CONFIG_FS_POSIX_ACL
> - inode->i_acl = inode->i_default_acl = ACL_NOT_CACHED;
> + if (IS_POSIXACL(inode))
> + inode->i_acl = inode->i_default_acl = ACL_NOT_CACHED;
> +#endif
> +#ifdef CONFIG_FS_RICHACL
> + if (IS_RICHACL(inode))
> + inode->i_richacl = ACL_NOT_CACHED;
>  #endif

That's just plain wrong. i think this is what Christoph didn't like.
An inode can have either a POSIX ACL or a RICH ACL, so there is no
need for multiple pointers in the inode for them.

>  
>  #ifdef CONFIG_FSNOTIFY
> @@ -240,10 +246,19 @@ void __destroy_inode(struct inode *inode)
>   }
>  
>  #ifdef CONFIG_FS_POSIX_ACL
> - if (inode->i_acl && inode->i_acl != ACL_NOT_CACHED)
> - posix_acl_release(inode->i_acl);
> - if (inode->i_default_acl && inode->i_default_acl != ACL_NOT_CACHED)
> - posix_acl_release(inode->i_default_acl);
> + if (IS_POSIXACL(inode)) {
> + if (inode->i_acl && inode->i_acl != ACL_NOT_CACHED)
> + posix_acl_release(inode->i_acl);
> + if (inode->i_default_acl &&
> + inode->i_default_acl != ACL_NOT_CACHED)
> + posix_acl_release(inode->i_default_acl);
> + }
> +#endif
> +#ifdef CONFIG_FS_RICHACL
> + if (IS_RICHACL(inode)) {
> + if (inode->i_richacl && inode->i_richacl != ACL_NOT_CACHED)
> + richacl_put(inode->i_richacl);
> + }
>  #endif

if (inode->i_acl && inode->i_acl != ACL_NOT_CACHED)
acl_release(inode->i_acl);

And all the mess of working out what acl needs releasing get taken
out of of this code.

> index 22d85798b520..95df64d21e55 100644
> --- a/include/linux/fs.h
> +++ b/include/linux/fs.h
> @@ -492,6 +492,7 @@ static inline int mapping_writably_mapped(struct 
> address_space *mapping)
>  #endif
>  
>  struct posix_acl;
> +struct richacl;
>  #define ACL_NOT_CACHED ((void *)(-1))
>  
>  #define IOP_FASTPERM 0x0001
> @@ -510,10 +511,17 @@ struct inode {
>   kgid_t  i_gid;
>   unsigned inti_flags;
>  
> + union {
>  #ifdef CONFIG_FS_POSIX_ACL
> - struct posix_acl*i_acl;
> - struct posix_acl*i_default_acl;
> + struct {
> + struct posix_acl *i_acl;
> + struct posix_acl *i_default_acl;
> + };
>  #endif
> +#ifdef CONFIG_FS_RICHACL
> + struct richacl  *i_richacl;
> +#endif
> + };

>  
>   const struct inode_operations   *i_op;
>   struct super_block  *i_sb;
> diff --git a/include/linux/richacl.h b/include/linux/richacl.h
> index 88f95d78b897..a7db341e4ee9 100644
> --- a/include/linux/richacl.h
> +++ b/include/linux/richacl.h
> @@ -191,6 +191,59 @@ richacl_put(struct richacl *acl)
>   kfree(acl);
>  }
>  
> +#ifdef CONFIG_FS_RICHACL
> +static inline struct richacl *get_cached_richacl(struct inode *inode)
> +{
> + struct richacl **p, *acl;
> +
> + p = >i_richacl;
> + acl = ACCESS_ONCE(*p);
> + if (acl) {
> + spin_lock(>i_lock);
> + acl = *p;
> + if (acl != ACL_NOT_CACHED)
> + acl = richacl_get(acl);
> + spin_unlock(>i_lock);
> + }
> + return acl;
> +}
> +
> +static inline void set_cached_richacl(struct inode *inode,
> +   struct richacl *acl)
> +{
> + struct richacl *old = NULL;
> + spin_lock(>i_lock);
> + old = inode->i_richacl;
> + inode->i_richacl = richacl_get(acl);
> + spin_unlock(>i_lock);
> + if (old != ACL_NOT_CACHED)
> + richacl_put(old);
> +}
> +
> +static inline void forget_cached_richacl(struct inode *inode)
> +{
> + struct richacl *old = NULL;
> + spin_lock(>i_lock);
> + old = inode->i_richacl;
> + inode->i_richacl = ACL_NOT_CACHED;
> + spin_unlock(>i_lock);
> + if (old != ACL_NOT_CACHED)
> + richacl_put(old);
> +}
> +
> +static inline int 

Re: [PATCH v2] rwsem: Support optimistic spinning

[Tim Chen]

On Mon, 2014-04-28 at 16:10 -0700, Paul E. McKenney wrote:

> > +#ifdef CONFIG_SMP
> > +static inline bool rwsem_can_spin_on_owner(struct rw_semaphore *sem)
> > +{
> > +   int retval;
> > +   struct task_struct *owner;
> > +
> > +   rcu_read_lock();
> > +   owner = ACCESS_ONCE(sem->owner);
> 
> OK, I'll bite...
> 
> Why ACCESS_ONCE() instead of rcu_dereference()?

We're using it as a speculative check on the sem->owner to see
if the owner is running on the cpu.  The rcu_read_lock
is used for ensuring that the owner->on_cpu memory is
still valid.

> 
> (My first question was "where is the update side", but this is covered
> by task_struct allocation and deallocation.)

Tim

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Re: [PATCH 2/3] perf tools: Cache dso data file descriptor

[Namhyung Kim]

Hi David,

On Mon, 28 Apr 2014 08:57:49 -0600, David Ahern wrote:
> On 4/28/14, 7:16 AM, Namhyung Kim wrote:
>> 2014-04-28 (월), 12:01 +0200, Jiri Olsa:
>>> On Sun, Apr 27, 2014 at 11:36:35PM +0900, Namhyung Kim wrote:
 2014-04-17 (목), 19:39 +0200, Jiri Olsa:
> Keeping the data file description open for the whole life
> of the dso object.

 I suspect there might be an issue for reporting very large data file
 with this approach - like open file limit?
>>>
>>> I've got as high as ~200 openned file descriptors for
>>> ~2GB data of system wide monitoring
>>>
>>> but right that could be an issue.. I wonder we could
>>> workaround this somehow, because the speed up is quite
>>> noticable
>>>
>>> how about we monitor number of openned dso file descriptor
>>> and once we cross this we close some portion of them
>>>
>>> or something along those lines ;-)
>>
>> Yeah, we'll need some way to control those eventually.
>
> Handle EMFILE failures. Find an "old" one and close it to let the new
> one succeed.

But it would make other open(), if any, fail anyway..  So I'd rather
limit the size of the dso cache to a reasonable size.

Thanks,
Namhyung
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[PATCH tip/core/rcu 05/45] torture: Rename RCU_INITRD to TORTURE_INITRD

[Paul E. McKenney]

From: "Paul E. McKenney" 

This commit makes the torture scripts a bit more RCU-independent.

Signed-off-by: Paul E. McKenney 
---
 tools/testing/selftests/rcutorture/bin/kvm-build.sh | 2 +-
 tools/testing/selftests/rcutorture/bin/kvm.sh   | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/tools/testing/selftests/rcutorture/bin/kvm-build.sh 
b/tools/testing/selftests/rcutorture/bin/kvm-build.sh
index 197901ec10bf..d8e68a5e4411 100755
--- a/tools/testing/selftests/rcutorture/bin/kvm-build.sh
+++ b/tools/testing/selftests/rcutorture/bin/kvm-build.sh
@@ -47,7 +47,7 @@ mkdir $T
 
 cat ${config_template} | grep -v CONFIG_RCU_TORTURE_TEST > $T/config
 cat << ___EOF___ >> $T/config
-CONFIG_INITRAMFS_SOURCE="$RCU_INITRD"
+CONFIG_INITRAMFS_SOURCE="$TORTURE_INITRD"
 CONFIG_VIRTIO_PCI=y
 CONFIG_VIRTIO_CONSOLE=y
 ___EOF___
diff --git a/tools/testing/selftests/rcutorture/bin/kvm.sh 
b/tools/testing/selftests/rcutorture/bin/kvm.sh
index 740676255c6a..a52a077ee258 100644
--- a/tools/testing/selftests/rcutorture/bin/kvm.sh
+++ b/tools/testing/selftests/rcutorture/bin/kvm.sh
@@ -38,7 +38,7 @@ dur=30
 dryrun=""
 KVM="`pwd`/tools/testing/selftests/rcutorture"; export KVM
 PATH=${KVM}/bin:$PATH; export PATH
-RCU_INITRD="$KVM/initrd"; export RCU_INITRD
+TORTURE_INITRD="$KVM/initrd"; export TORTURE_INITRD
 RCU_KMAKE_ARG=""; export RCU_KMAKE_ARG
 TORTURE_SUITE=rcu
 resdir=""
@@ -125,7 +125,7 @@ do
shift
;;
--no-initrd)
-   RCU_INITRD=""; export RCU_INITRD
+   TORTURE_INITRD=""; export TORTURE_INITRD
;;
--qemu-args)
checkarg --qemu-args "-qemu args" $# "$2" '^-' '^error'
@@ -367,7 +367,7 @@ then
echo KVPATH="$KVPATH; export KVPATH"
echo PATH="$PATH; export PATH"
echo RCU_BUILDONLY="$RCU_BUILDONLY; export RCU_BUILDONLY"
-   echo RCU_INITRD="$RCU_INITRD; export RCU_INITRD"
+   echo TORTURE_INITRD="$TORTURE_INITRD; export TORTURE_INITRD"
echo RCU_KMAKE_ARG="$RCU_KMAKE_ARG; export RCU_KMAKE_ARG"
echo RCU_QEMU_CMD="$RCU_QEMU_CMD; export RCU_QEMU_CMD"
echo RCU_QEMU_INTERACTIVE="$RCU_QEMU_INTERACTIVE; export 
RCU_QEMU_INTERACTIVE"
-- 
1.8.1.5

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[PATCH tip/core/rcu 01/45] rcutorture: Add forward-progress checking for writer

[Paul E. McKenney]

From: "Paul E. McKenney" 

The rcutorture output currently does not distinguish between stalls in
the RCU implementation and stalls in the rcu_torture_writer() kthreads.
This commit therefore adds some diagnostics to help distinguish between
these two conditions, at least for the non-SRCU implementations.  (SRCU
does not provide evidence of update-side forward progress by design.)

Signed-off-by: Paul E. McKenney 
---
 include/linux/rcupdate.h | 19 +++
 kernel/rcu/rcutorture.c  | 37 +
 kernel/rcu/tree.c| 18 ++
 3 files changed, 74 insertions(+)

diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 00a7fd61b3c6..a6c3898e141e 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -51,7 +51,17 @@ extern int rcu_expedited; /* for sysctl */
 extern int rcutorture_runnable; /* for sysctl */
 #endif /* #ifdef CONFIG_RCU_TORTURE_TEST */
 
+enum rcutorture_type {
+   RTORT_BUSTED,
+   RTORT_RCU,
+   RTORT_RCU_BH,
+   RTORT_RCU_SCHED,
+   RTORT_SRCU
+};
+
 #if defined(CONFIG_TREE_RCU) || defined(CONFIG_TREE_PREEMPT_RCU)
+void rcutorture_get_gp_data(enum rcutorture_type test_type, int *flags,
+   unsigned long *gpnum, unsigned long *completed);
 void rcutorture_record_test_transition(void);
 void rcutorture_record_progress(unsigned long vernum);
 void do_trace_rcu_torture_read(const char *rcutorturename,
@@ -60,6 +70,15 @@ void do_trace_rcu_torture_read(const char *rcutorturename,
   unsigned long c_old,
   unsigned long c);
 #else
+static inline void rcutorture_get_gp_data(enum rcutorture_type test_type,
+ int *flags,
+ unsigned long *gpnum,
+ unsigned long *completed)
+{
+   *flags = 0;
+   *gpnum = 0;
+   *completed = 0;
+}
 static inline void rcutorture_record_test_transition(void)
 {
 }
diff --git a/kernel/rcu/rcutorture.c b/kernel/rcu/rcutorture.c
index bd30bc61bc05..1110db210318 100644
--- a/kernel/rcu/rcutorture.c
+++ b/kernel/rcu/rcutorture.c
@@ -138,6 +138,15 @@ static long n_barrier_attempts;
 static long n_barrier_successes;
 static struct list_head rcu_torture_removed;
 
+static int rcu_torture_writer_state;
+#define RTWS_FIXED_DELAY   0
+#define RTWS_DELAY 1
+#define RTWS_REPLACE   2
+#define RTWS_DEF_FREE  3
+#define RTWS_EXP_SYNC  4
+#define RTWS_STUTTER   5
+#define RTWS_STOPPING  6
+
 #if defined(MODULE) || defined(CONFIG_RCU_TORTURE_TEST_RUNNABLE)
 #define RCUTORTURE_RUNNABLE_INIT 1
 #else
@@ -214,6 +223,7 @@ rcu_torture_free(struct rcu_torture *p)
  */
 
 struct rcu_torture_ops {
+   int ttype;
void (*init)(void);
int (*readlock)(void);
void (*read_delay)(struct torture_random_state *rrsp);
@@ -312,6 +322,7 @@ static void rcu_sync_torture_init(void)
 }
 
 static struct rcu_torture_ops rcu_ops = {
+   .ttype  = RTORT_RCU,
.init   = rcu_sync_torture_init,
.readlock   = rcu_torture_read_lock,
.read_delay = rcu_read_delay,
@@ -355,6 +366,7 @@ static void rcu_bh_torture_deferred_free(struct rcu_torture 
*p)
 }
 
 static struct rcu_torture_ops rcu_bh_ops = {
+   .ttype  = RTORT_RCU_BH,
.init   = rcu_sync_torture_init,
.readlock   = rcu_bh_torture_read_lock,
.read_delay = rcu_read_delay,  /* just reuse rcu's version. */
@@ -397,6 +409,7 @@ call_rcu_busted(struct rcu_head *head, void (*func)(struct 
rcu_head *rcu))
 }
 
 static struct rcu_torture_ops rcu_busted_ops = {
+   .ttype  = RTORT_BUSTED,
.init   = rcu_sync_torture_init,
.readlock   = rcu_torture_read_lock,
.read_delay = rcu_read_delay,  /* just reuse rcu's version. */
@@ -492,6 +505,7 @@ static void srcu_torture_synchronize_expedited(void)
 }
 
 static struct rcu_torture_ops srcu_ops = {
+   .ttype  = RTORT_SRCU,
.init   = rcu_sync_torture_init,
.readlock   = srcu_torture_read_lock,
.read_delay = srcu_read_delay,
@@ -527,6 +541,7 @@ static void rcu_sched_torture_deferred_free(struct 
rcu_torture *p)
 }
 
 static struct rcu_torture_ops sched_ops = {
+   .ttype  = RTORT_RCU_SCHED,
.init   = rcu_sync_torture_init,
.readlock   = sched_torture_read_lock,
.read_delay = rcu_read_delay,  /* just reuse rcu's version. */
@@ -699,12 +714,15 @@ rcu_torture_writer(void *arg)
set_user_nice(current, MAX_NICE);
 
do {
+   rcu_torture_writer_state = RTWS_FIXED_DELAY;
schedule_timeout_uninterruptible(1);
rp = rcu_torture_alloc();
if (rp == NULL)
continue;
rp->rtort_pipe_count 

[PATCH tip/core/rcu 02/45] torture: Remove obsolete builddir options

[Paul E. McKenney]

From: "Paul E. McKenney" 

The --builddir and --relbuilddir options were initially intended to handle
parallel tests.  However, since commit 43e38ab3d518 (Enable concurrent
rcutorture runs), the script manages multiple build directories as
needed for parallel testing.  This commit therefore removes these two
obsolete options.

Signed-off-by: Paul E. McKenney 
---
 tools/testing/selftests/rcutorture/bin/kvm.sh | 16 
 1 file changed, 16 deletions(-)

diff --git a/tools/testing/selftests/rcutorture/bin/kvm.sh 
b/tools/testing/selftests/rcutorture/bin/kvm.sh
index 5a78cbf55f06..37a60ef70df3 100644
--- a/tools/testing/selftests/rcutorture/bin/kvm.sh
+++ b/tools/testing/selftests/rcutorture/bin/kvm.sh
@@ -38,7 +38,6 @@ dur=30
 dryrun=""
 KVM="`pwd`/tools/testing/selftests/rcutorture"; export KVM
 PATH=${KVM}/bin:$PATH; export PATH
-builddir="${KVM}/b1"
 RCU_INITRD="$KVM/initrd"; export RCU_INITRD
 RCU_KMAKE_ARG=""; export RCU_KMAKE_ARG
 TORTURE_SUITE=rcu
@@ -53,7 +52,6 @@ kversion=""
 usage () {
echo "Usage: $scriptname optional arguments:"
echo "   --bootargs kernel-boot-arguments"
-   echo "   --builddir absolute-pathname"
echo "   --buildonly"
echo "   --configs \"config-file list\""
echo "   --cpus N"
@@ -67,7 +65,6 @@ usage () {
echo "   --no-initrd"
echo "   --qemu-args qemu-system-..."
echo "   --qemu-cmd qemu-system-..."
-   echo "   --relbuilddir relative-pathname"
echo "   --results absolute-pathname"
echo "   --torture rcu"
exit 1
@@ -81,12 +78,6 @@ do
RCU_BOOTARGS="$2"
shift
;;
-   --builddir)
-   checkarg --builddir "(absolute pathname)" "$#" "$2" '^/' 
'^error'
-   builddir=$2
-   gotbuilddir=1
-   shift
-   ;;
--buildonly)
RCU_BUILDONLY=1; export RCU_BUILDONLY
;;
@@ -146,13 +137,6 @@ do
RCU_QEMU_CMD="$2"; export RCU_QEMU_CMD
shift
;;
-   --relbuilddir)
-   checkarg --relbuilddir "(relative pathname)" "$#" "$2" 
'^[^/]*$' '^--'
-   relbuilddir=$2
-   gotrelbuilddir=1
-   builddir=${KVM}/${relbuilddir}
-   shift
-   ;;
--results)
checkarg --results "(absolute pathname)" "$#" "$2" '^/' '^error'
resdir=$2
-- 
1.8.1.5

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[PATCH tip/core/rcu 06/45] torture: Intensify locking test

[Paul E. McKenney]

From: "Paul E. McKenney" 

The current lock_torture_writer() spends too much time sleeping and not
enough time hammering locks, as in an eight-CPU test will often only be
utilizing a CPU or two.  This commit therefore makes lock_torture_writer()
sleep less and hammer more.

Signed-off-by: Paul E. McKenney 
---
 kernel/locking/locktorture.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/kernel/locking/locktorture.c b/kernel/locking/locktorture.c
index f26b1a18e34e..b0d3e3c50672 100644
--- a/kernel/locking/locktorture.c
+++ b/kernel/locking/locktorture.c
@@ -219,7 +219,8 @@ static int lock_torture_writer(void *arg)
set_user_nice(current, 19);
 
do {
-   schedule_timeout_uninterruptible(1);
+   if ((torture_random() & 0xf) == 0)
+   schedule_timeout_uninterruptible(1);
cur_ops->writelock();
if (WARN_ON_ONCE(lock_is_write_held))
lwsp->n_write_lock_fail++;
-- 
1.8.1.5

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[PATCH tip/core/rcu 13/45] torture: Rename RCU_QEMU_ARG to TORTURE_QEMU_ARG

[Paul E. McKenney]

From: "Paul E. McKenney" 

This commit makes the torture scripts a bit more RCU-independent.

Signed-off-by: Paul E. McKenney 
---
 tools/testing/selftests/rcutorture/bin/kvm.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/rcutorture/bin/kvm.sh 
b/tools/testing/selftests/rcutorture/bin/kvm.sh
index 1a4a68c76914..d397ecc55293 100644
--- a/tools/testing/selftests/rcutorture/bin/kvm.sh
+++ b/tools/testing/selftests/rcutorture/bin/kvm.sh
@@ -136,7 +136,7 @@ do
;;
--qemu-args)
checkarg --qemu-args "-qemu args" $# "$2" '^-' '^error'
-   RCU_QEMU_ARG="$2"
+   TORTURE_QEMU_ARG="$2"
shift
;;
--qemu-cmd)
@@ -274,7 +274,7 @@ awk < $T/cfgcpu.pack \
-v ncpus=$cpus \
-v rd=$resdir/$ds/ \
-v dur=$dur \
-   -v RCU_QEMU_ARG=$RCU_QEMU_ARG \
+   -v TORTURE_QEMU_ARG=$TORTURE_QEMU_ARG \
-v TORTURE_BOOTARGS=$TORTURE_BOOTARGS \
 'BEGIN {
i = 0;
@@ -312,7 +312,7 @@ function dump(first, pastlast)
print "touch " builddir ".wait";
print "mkdir " builddir " > /dev/null 2>&1 || :";
print "mkdir " rd cfr[jn] " || :";
-   print "kvm-test-1-run.sh " CONFIGDIR cf[j], builddir, rd 
cfr[jn], dur " \"" RCU_QEMU_ARG "\" \"" TORTURE_BOOTARGS "\" > " rd cfr[jn]  
"/kvm-test-1-run.sh.out 2>&1 &"
+   print "kvm-test-1-run.sh " CONFIGDIR cf[j], builddir, rd 
cfr[jn], dur " \"" TORTURE_QEMU_ARG "\" \"" TORTURE_BOOTARGS "\" > " rd cfr[jn] 
 "/kvm-test-1-run.sh.out 2>&1 &"
print "echo ", cfr[jn], cpusr[jn] ovf ": Waiting for build to 
complete. `date`";
print "echo ", cfr[jn], cpusr[jn] ovf ": Waiting for build to 
complete. `date` >> " rd "/log";
print "while test -f " builddir ".wait"
-- 
1.8.1.5

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linux-next: manual merge of the vfs tree with the f2fs tree

[Stephen Rothwell]

Hi Al,

Today's linux-next merge of the vfs tree got a conflict in fs/f2fs/file.c
between commit adeb670f1fee ("f2fs: introduce f2fs_seek_block to support
SEEK_{DATA, HOLE} in llseek") from the f2fs tree and commits 8eb02141b8a6
("switch simple generic_file_aio_read() users to ->read_iter()") and
e6552301fb08 ("write_iter variants of {__,}generic_file_aio_write()")
from the vfs tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au

diff --cc fs/f2fs/file.c
index b9f4fbf5c07e,e4ba4b93f96a..
--- a/fs/f2fs/file.c
+++ b/fs/f2fs/file.c
@@@ -802,11 -678,11 +802,11 @@@ long f2fs_compat_ioctl(struct file *fil
  #endif
  
  const struct file_operations f2fs_file_operations = {
 -  .llseek = generic_file_llseek,
 +  .llseek = f2fs_llseek,
-   .read   = do_sync_read,
-   .write  = do_sync_write,
-   .aio_read   = generic_file_aio_read,
-   .aio_write  = generic_file_aio_write,
+   .read   = new_sync_read,
+   .write  = new_sync_write,
+   .read_iter  = generic_file_read_iter,
+   .write_iter = generic_file_write_iter,
.open   = generic_file_open,
.mmap   = f2fs_file_mmap,
.fsync  = f2fs_sync_file,


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