Re: [PATCH RFC v2 08/12] soc: samsung: pm_domain: Add support for parent power domain

2014-11-24 Thread Ulf Hansson
On 24 November 2014 at 14:04, Amit Daniel Kachhap
 wrote:
> This patch adds supports for parent power domain. This will ensure
> invoking of parent/child power domain on/off in a correct sequence.
> In exynos7 SOC's, power domain controllers have parent and child
> hierarchy.
>
> Cc: Kukjin Kim 
> Signed-off-by: Amit Daniel Kachhap 
> ---
>  .../bindings/arm/exynos/power_domain.txt   |2 +
>  drivers/soc/samsung/pm_domains.c   |   43 
> +++-
>  2 files changed, 44 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt 
> b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
> index 00ebda1..0160bdc 100644
> --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
> +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
> @@ -24,6 +24,7 @@ Optional Properties:
> - pclkN, clkN: Pairs of parent of input clock and input clock to the
> devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
> are supported currently.
> +- parents: phandle of parent power domains.
>
>  Node of a device using power domains must have a samsung,power-domain 
> property
>  defined with a phandle to respective power domain.
> @@ -48,6 +49,7 @@ Example:
> mfc_pd: power-domain@10044060 {
> compatible = "samsung,exynos4210-pd", 
> "samsung,exynos7-pd-mfc";
> reg = <0x10044060 0x20>;
> +   parents = <_top>;
> #power-domain-cells = <0>;
> };

This seems like a good and generic approach to describe that a PM
domain could have a parent. I would suggest to rename it, such it
reflects its a PM domain binding though.

So, maybe we can add this as a common DT binding for the generic PM
domain instead of having it as Exynos specific?

Kind regards
Uffe
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[Patch Part3 v4 33/38] x86, irq: Move check of cfg->move_in_progress into send_cleanup_vector()

2014-11-24 Thread Jiang Liu
Move check of cfg->move_in_progress into send_cleanup_vector() to
prepare for simplifying struct irq_cfg.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/kernel/apic/vector.c   |   10 --
 arch/x86/platform/uv/uv_irq.c   |3 +--
 drivers/iommu/amd_iommu.c   |3 +--
 drivers/iommu/intel_irq_remapping.c |3 +--
 4 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 436a3400d9ac..a5ce2eef0528 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -495,7 +495,7 @@ static struct irq_chip lapic_controller = {
 };
 
 #ifdef CONFIG_SMP
-void send_cleanup_vector(struct irq_cfg *cfg)
+static void __send_cleanup_vector(struct irq_cfg *cfg)
 {
cpumask_var_t cleanup_mask;
 
@@ -513,6 +513,12 @@ void send_cleanup_vector(struct irq_cfg *cfg)
cfg->move_in_progress = 0;
 }
 
+void send_cleanup_vector(struct irq_cfg *cfg)
+{
+   if (cfg->move_in_progress)
+   __send_cleanup_vector(cfg);
+}
+
 asmlinkage __visible void smp_irq_move_cleanup_interrupt(void)
 {
unsigned vector, me;
@@ -583,7 +589,7 @@ static void __irq_complete_move(struct irq_cfg *cfg, 
unsigned vector)
me = smp_processor_id();
 
if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain))
-   send_cleanup_vector(cfg);
+   __send_cleanup_vector(cfg);
 }
 
 void irq_complete_move(struct irq_cfg *cfg)
diff --git a/arch/x86/platform/uv/uv_irq.c b/arch/x86/platform/uv/uv_irq.c
index c237ed34a498..b242e0aada19 100644
--- a/arch/x86/platform/uv/uv_irq.c
+++ b/arch/x86/platform/uv/uv_irq.c
@@ -63,8 +63,7 @@ uv_set_irq_affinity(struct irq_data *data, const struct 
cpumask *mask,
ret = parent->chip->irq_set_affinity(parent, mask, force);
if (ret >= 0) {
uv_program_mmr(cfg, data->chip_data);
-   if (cfg->move_in_progress)
-   send_cleanup_vector(cfg);
+   send_cleanup_vector(cfg);
}
 
return ret;
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 2e8bbe5e164d..a5c59b434c77 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -4331,8 +4331,7 @@ static int amd_ir_set_affinity(struct irq_data *data,
 * at the new destination. So, time to cleanup the previous
 * vector allocation.
 */
-   if (cfg->move_in_progress)
-   send_cleanup_vector(cfg);
+   send_cleanup_vector(cfg);
 
return IRQ_SET_MASK_OK_DONE;
 }
diff --git a/drivers/iommu/intel_irq_remapping.c 
b/drivers/iommu/intel_irq_remapping.c
index acff8493191e..f6da3b2651c0 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -997,8 +997,7 @@ intel_ir_set_affinity(struct irq_data *data, const struct 
cpumask *mask,
 * at the new destination. So, time to cleanup the previous
 * vector allocation.
 */
-   if (cfg->move_in_progress)
-   send_cleanup_vector(cfg);
+   send_cleanup_vector(cfg);
 
return IRQ_SET_MASK_OK_DONE;
 }
-- 
1.7.10.4

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[Patch Part3 v4 19/38] iommu/vt-d: Clean up unsued code

2014-11-24 Thread Jiang Liu
Now we have converted to hierarchy irqdomain, so clean up unused code.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 drivers/iommu/intel_irq_remapping.c |  187 +--
 1 file changed, 1 insertion(+), 186 deletions(-)

diff --git a/drivers/iommu/intel_irq_remapping.c 
b/drivers/iommu/intel_irq_remapping.c
index 95c44820c851..9a887ba87dc3 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -62,35 +62,6 @@ static struct irq_domain_ops intel_ir_domain_ops;
 
 static int __init parse_ioapics_under_ir(void);
 
-static struct irq_2_iommu *irq_2_iommu(unsigned int irq)
-{
-   struct irq_cfg *cfg = irq_cfg(irq);
-   return cfg ? >irq_2_iommu : NULL;
-}
-
-static int get_irte(int irq, struct irte *entry)
-{
-   struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
-   unsigned long flags;
-   int index;
-
-   if (!entry || !irq_iommu)
-   return -1;
-
-   raw_spin_lock_irqsave(_2_ir_lock, flags);
-
-   if (unlikely(!irq_iommu->iommu)) {
-   raw_spin_unlock_irqrestore(_2_ir_lock, flags);
-   return -1;
-   }
-
-   index = irq_iommu->irte_index + irq_iommu->sub_handle;
-   *entry = *(irq_iommu->iommu->ir_table->base + index);
-
-   raw_spin_unlock_irqrestore(_2_ir_lock, flags);
-   return 0;
-}
-
 static int alloc_irte(struct intel_iommu *iommu, int irq,
  struct irq_2_iommu *irq_iommu, u16 count)
 {
@@ -228,29 +199,6 @@ static int clear_entries(struct irq_2_iommu *irq_iommu)
return qi_flush_iec(iommu, index, irq_iommu->irte_mask);
 }
 
-static int free_irte(int irq)
-{
-   struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
-   unsigned long flags;
-   int rc;
-
-   if (!irq_iommu || irq_iommu->iommu == NULL)
-   return -1;
-
-   raw_spin_lock_irqsave(_2_ir_lock, flags);
-
-   rc = clear_entries(irq_iommu);
-
-   irq_iommu->iommu = NULL;
-   irq_iommu->irte_index = 0;
-   irq_iommu->sub_handle = 0;
-   irq_iommu->irte_mask = 0;
-
-   raw_spin_unlock_irqrestore(_2_ir_lock, flags);
-
-   return rc;
-}
-
 /*
  * source validation type
  */
@@ -925,8 +873,7 @@ error:
return -1;
 }
 
-static void prepare_irte(struct irte *irte, int vector,
-unsigned int dest)
+static void prepare_irte(struct irte *irte, int vector, unsigned int dest)
 {
memset(irte, 0, sizeof(*irte));
 
@@ -946,135 +893,6 @@ static void prepare_irte(struct irte *irte, int vector,
irte->redir_hint = 1;
 }
 
-static int intel_setup_ioapic_entry(int irq,
-   struct IO_APIC_route_entry *route_entry,
-   unsigned int destination, int vector,
-   struct io_apic_irq_attr *attr)
-{
-   int ioapic_id = mpc_ioapic_id(attr->ioapic);
-   struct intel_iommu *iommu;
-   struct IR_IO_APIC_route_entry *entry;
-   struct irte irte;
-   int index;
-
-   down_read(_global_lock);
-   iommu = map_ioapic_to_ir(ioapic_id);
-   if (!iommu) {
-   pr_warn("No mapping iommu for ioapic %d\n", ioapic_id);
-   index = -ENODEV;
-   } else {
-   index = alloc_irte(iommu, irq, irq_2_iommu(irq), 1);
-   if (index < 0) {
-   pr_warn("Failed to allocate IRTE for ioapic %d\n",
-   ioapic_id);
-   index = -ENOMEM;
-   }
-   }
-   up_read(_global_lock);
-   if (index < 0)
-   return index;
-
-   prepare_irte(, vector, destination);
-
-   /* Set source-id of interrupt request */
-   set_ioapic_sid(, ioapic_id);
-
-   modify_irte(irq_2_iommu(irq), );
-
-   apic_printk(APIC_VERBOSE, KERN_DEBUG "IOAPIC[%d]: "
-   "Set IRTE entry (P:%d FPD:%d Dst_Mode:%d "
-   "Redir_hint:%d Trig_Mode:%d Dlvry_Mode:%X "
-   "Avail:%X Vector:%02X Dest:%08X "
-   "SID:%04X SQ:%X SVT:%X)\n",
-   attr->ioapic, irte.present, irte.fpd, irte.dst_mode,
-   irte.redir_hint, irte.trigger_mode, irte.dlvry_mode,
-   irte.avail, irte.vector, irte.dest_id,
-   irte.sid, irte.sq, irte.svt);
-
-   entry = (struct IR_IO_APIC_route_entry *)route_entry;
-   memset(entry, 0, sizeof(*entry));
-
-   entry->index2   = (index >> 15) & 0x1;
-   entry->zero = 0;
-   entry->format   = 1;
-   entry->index= (index & 0x7fff);
-   /*
-* IO-APIC RTE will be configured with virtual vector.
-* irq handler will do the explicit EOI to the io-apic.
-*/
-   entry->vector   = attr->ioapic_pin;
-   entry->mask = 0;/* enable IRQ */
-   entry->trigger  = attr->trigger;
-   entry->polarity = attr->polarity;
-
-   /* Mask level triggered irqs.
-* Use 

Re: [PATCH v2] clk: Add PWM clock driver

2014-11-24 Thread Philipp Zabel
Hi Mike,

Am Montag, den 24.11.2014, 23:07 -0800 schrieb Mike Turquette:
> Quoting Philipp Zabel (2014-11-03 01:31:18)
> > Some board designers, when running out of clock output pads, decide to
> > (mis)use PWM output pads to provide a clock to external components.
> > This driver supports this practice by providing an adapter between the
> > PWM and clock bindings in the device tree. As the PWM bindings specify
> > the period in the device tree, this is a fixed clock.
> > 
> > Signed-off-by: Philipp Zabel 
> > ---
> > I'm resending this because last time the linux-pwm list was not in Cc:
> > So far I have not received any comments on the patch itself. I have used
> > it on a BoundaryDevices Nitrogen6X board to produce a master clock for
> > the OV5640 MIPI CSI-2 camera module.
> > 
> > Changes since v1:
> >  - none (rebased onto v3.18-rc3)
> 
> Hi Philipp,
> 
> Thanks for testing this. Is the Nitrogen6X board merged upstream? I'm OK
> with the patch but prefer to merge things when a consumer is ready to
> use it. I guess you are missing a patch to add the pwm-clock bits to the
> Nitrogen6X dts?

The Nitrogen6X board is merged upstream already, I used this dts patch
to register the clock:

diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi 
b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 7628049..e2e7a22 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -130,6 +130,18 @@
power-supply = <_3p3v>;
status = "okay";
};
+
+   mipi_mclk: mipi-mclk {
+   compatible = "pwm-clock";
+   clock-output-names = "mipi-mclk";
+   /* Note: since the PWM reference clock is 66 MHz, the highest
+* possible frequency with 50% duty cycle smaller than 27 MHz
+* is 16.5 MHz: < 0 61>;
+* But we can also do 22 MHz with 33% duty cycle:
+*/
+   pwms = < 0 46>; /* 22 MHz */
+   #clock-cells = <0>;
+   };
 };
 
  {
-- 
2.1.1

regards
Philipp

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[Patch Part3 v4 35/38] x86, irq: Refine the way to calculate NR_IRQS

2014-11-24 Thread Jiang Liu
Now we have made MSI independent of IOAPIC, so we need to refine the
way to calculate NR_IRQS to support configuration with MSI enabled but
IOAPIC disabled.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/irq_vectors.h |   18 +++---
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/arch/x86/include/asm/irq_vectors.h 
b/arch/x86/include/asm/irq_vectors.h
index 666c89ec4bd7..b26cb124a4f1 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -155,18 +155,22 @@ static inline int invalid_vm86_irq(int irq)
  * static arrays.
  */
 
-#define NR_IRQS_LEGACY   16
+#define NR_IRQS_LEGACY 16
 
-#define IO_APIC_VECTOR_LIMIT   ( 32 * MAX_IO_APICS )
+#define CPU_VECTOR_LIMIT   (64 * NR_CPUS)
+#define IO_APIC_VECTOR_LIMIT   (32 * MAX_IO_APICS)
 
-#ifdef CONFIG_X86_IO_APIC
-# define CPU_VECTOR_LIMIT  (64 * NR_CPUS)
-# define NR_IRQS   \
+#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_PCI_MSI)
+#define NR_IRQS\
(CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ?  \
(NR_VECTORS + CPU_VECTOR_LIMIT)  :  \
(NR_VECTORS + IO_APIC_VECTOR_LIMIT))
-#else /* !CONFIG_X86_IO_APIC: */
-# define NR_IRQS   NR_IRQS_LEGACY
+#elif defined(CONFIG_X86_IO_APIC)
+#defineNR_IRQS (NR_VECTORS + 
IO_APIC_VECTOR_LIMIT)
+#elif defined(CONFIG_PCI_MSI)
+#define NR_IRQS(NR_VECTORS + CPU_VECTOR_LIMIT)
+#else
+#define NR_IRQSNR_IRQS_LEGACY
 #endif
 
 #endif /* _ASM_X86_IRQ_VECTORS_H */
-- 
1.7.10.4

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[Patch Part3 v4 38/38] x86, irq: Add kernel parameter vector_alloc to set CPU vector allocation policy

2014-11-24 Thread Jiang Liu
Parameter vector_alloc should be set to an integer with:
bit 0:  enable allocating CPU vector from CPUs on device local node.
That's to allocate from cpumask_of_node(irq_data->node).
bit 1: enable the default policy, which is to allocate from
   apic->target_cpus().

When allocating vectors, it tries all enabled policies from lower bit
position to higher bit position.

This option could be use to optimize interrupt distribution on large
system such as NumaChip etc.

Signed-off-by: Jiang Liu 
Cc: Daniel J Blueman 
---
 Documentation/kernel-parameters.txt |6 ++
 arch/x86/kernel/apic/vector.c   |   11 +++
 2 files changed, 17 insertions(+)

diff --git a/Documentation/kernel-parameters.txt 
b/Documentation/kernel-parameters.txt
index 4c81a860cc2b..a175c5016954 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -3709,6 +3709,12 @@ bytes respectively. Such letter suffixes can also be 
entirely omitted.
vector= [IA-64,SMP]
vector=percpu: enable percpu vector domain
 
+   vector_alloc=   [x86,SMP]
+   vector_alloc=policy: policy is a bitmap, bit 0
+   for allocating CPU vector from CPUs on device local
+   node; bit 1 for the default policy to allocating from
+   apic->target_cpus(). All higher bits are reserved.
+
video=  [FB] Frame buffer configuration
See Documentation/fb/modedb.txt.
 
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 16de8906ee1e..1158843551c7 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -79,6 +79,17 @@ void set_vector_alloc_policy(unsigned int policy)
x86_vector_alloc_policy = policy | X86_VECTOR_POL_CALLER;
 }
 
+static int __init apic_parse_vector_policy(char *str)
+{
+   int policy;
+
+   if (get_option(, ) == 1)
+   set_vector_alloc_policy(policy);
+
+   return 1;
+}
+__setup("vector_alloc=", apic_parse_vector_policy);
+
 static struct apic_chip_data *alloc_apic_chip_data(int node)
 {
struct apic_chip_data *data;
-- 
1.7.10.4

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[Patch Part3 v4 36/38] ACPI, irq, x86: Kill private function mp_register_gsi()/ mp_unregister_gsi()

2014-11-24 Thread Jiang Liu
Function mp_register_gsi() is only called once, so fold it into caller
acpi_register_gsi_ioapic(). Do the same for mp_unregister_gsi().

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/kernel/acpi/boot.c |   57 ++-
 1 file changed, 18 insertions(+), 39 deletions(-)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 509a48f49fc7..e54a8d72ae6e 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -400,42 +400,6 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, 
int trigger,
return 0;
 }
 
-static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,
-  int polarity)
-{
-   int irq, node;
-   struct irq_alloc_info info;
-
-   if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
-   return gsi;
-
-   trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1;
-   polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1;
-   node = dev ? dev_to_node(dev) : NUMA_NO_NODE;
-   ioapic_set_alloc_attr(, node, trigger, polarity);
-   irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, );
-   if (irq < 0)
-   return irq;
-
-   /* Don't set up the ACPI SCI because it's already set up */
-   if (enable_update_mptable && acpi_gbl_FADT.sci_interrupt != gsi)
-   mp_config_acpi_gsi(dev, gsi, trigger, polarity);
-
-   return irq;
-}
-
-static void mp_unregister_gsi(u32 gsi)
-{
-   int irq;
-
-   if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
-   return;
-
-   irq = mp_map_gsi_to_irq(gsi, 0, NULL);
-   if (irq > 0)
-   mp_unmap_irq(irq);
-}
-
 static struct irq_domain_ops acpi_irqdomain_ops = {
.alloc = mp_irqdomain_alloc,
.free = mp_irqdomain_free,
@@ -657,10 +621,21 @@ static int acpi_register_gsi_ioapic(struct device *dev, 
u32 gsi,
int trigger, int polarity)
 {
int irq = gsi;
-
 #ifdef CONFIG_X86_IO_APIC
+   int node;
+   struct irq_alloc_info info;
+
+   node = dev ? dev_to_node(dev) : NUMA_NO_NODE;
+   trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1;
+   polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1;
+   ioapic_set_alloc_attr(, node, trigger, polarity);
+
mutex_lock(_ioapic_lock);
-   irq = mp_register_gsi(dev, gsi, trigger, polarity);
+   irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, );
+   /* Don't set up the ACPI SCI because it's already set up */
+   if (irq >= 0 && enable_update_mptable &&
+   acpi_gbl_FADT.sci_interrupt != gsi)
+   mp_config_acpi_gsi(dev, gsi, trigger, polarity);
mutex_unlock(_ioapic_lock);
 #endif
 
@@ -670,8 +645,12 @@ static int acpi_register_gsi_ioapic(struct device *dev, 
u32 gsi,
 static void acpi_unregister_gsi_ioapic(u32 gsi)
 {
 #ifdef CONFIG_X86_IO_APIC
+   int irq;
+
mutex_lock(_ioapic_lock);
-   mp_unregister_gsi(gsi);
+   irq = mp_map_gsi_to_irq(gsi, 0, NULL);
+   if (irq > 0)
+   mp_unmap_irq(irq);
mutex_unlock(_ioapic_lock);
 #endif
 }
-- 
1.7.10.4

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[Patch Part3 v4 32/38] x86, irq: Kill function apic_set_affinity()

2014-11-24 Thread Jiang Liu
Now there's no user of apic_set_affinity(), so kill it.
Also rename vector_set_affinity() to apic_set_affinity() for consistency.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/hw_irq.h |2 --
 arch/x86/kernel/apic/vector.c |   40 +++-
 2 files changed, 3 insertions(+), 39 deletions(-)

diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index ea9aebc65ff6..330445236484 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -198,8 +198,6 @@ static inline void irq_complete_move(struct irq_cfg *c) { }
 #endif
 
 extern void apic_ack_edge(struct irq_data *data);
-extern int apic_set_affinity(struct irq_data *data, const struct cpumask *mask,
-unsigned int *dest_id);
 #else  /*  CONFIG_X86_LOCAL_APIC */
 static inline void lock_vector_lock(void) {}
 static inline void unlock_vector_lock(void) {}
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index fba4958b6139..436a3400d9ac 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -463,42 +463,8 @@ void apic_ack_edge(struct irq_data *data)
ack_APIC_irq();
 }
 
-/*
- * Either sets data->affinity to a valid value, and returns
- * ->cpu_mask_to_apicid of that in dest_id, or returns -1 and
- * leaves data->affinity untouched.
- */
-int apic_set_affinity(struct irq_data *data, const struct cpumask *mask,
- unsigned int *dest_id)
-{
-   struct irq_cfg *cfg = irqd_cfg(data);
-   unsigned int irq = data->irq;
-   int err;
-
-   if (!config_enabled(CONFIG_SMP))
-   return -EPERM;
-
-   if (!cpumask_intersects(mask, cpu_online_mask))
-   return -EINVAL;
-
-   err = assign_irq_vector(irq, cfg, mask);
-   if (err)
-   return err;
-
-   err = apic->cpu_mask_to_apicid_and(mask, cfg->domain, dest_id);
-   if (err) {
-   if (assign_irq_vector(irq, cfg, data->affinity))
-   pr_err("Failed to recover vector for irq %d\n", irq);
-   return err;
-   }
-
-   cpumask_copy(data->affinity, mask);
-
-   return 0;
-}
-
-static int vector_set_affinity(struct irq_data *irq_data,
-  const struct cpumask *dest, bool force)
+static int apic_set_affinity(struct irq_data *irq_data,
+const struct cpumask *dest, bool force)
 {
int err;
int irq = irq_data->irq;
@@ -524,7 +490,7 @@ static int vector_set_affinity(struct irq_data *irq_data,
 
 static struct irq_chip lapic_controller = {
.irq_ack= apic_ack_edge,
-   .irq_set_affinity   = vector_set_affinity,
+   .irq_set_affinity   = apic_set_affinity,
.irq_retrigger  = apic_retrigger_irq,
 };
 
-- 
1.7.10.4

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[Patch Part3 v4 34/38] x86, irq: Move private data in struct irq_cfg into dedicated data structure

2014-11-24 Thread Jiang Liu
Several fields in struct irq_cfg are private to vector.c, so move it
into dedicated data structure. This helps to hide implementation
details.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/hw_irq.h |3 -
 arch/x86/kernel/apic/vector.c |  221 ++---
 2 files changed, 119 insertions(+), 105 deletions(-)

diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 330445236484..e7ae6eb84934 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -171,11 +171,8 @@ enum {
 };
 
 struct irq_cfg {
-   cpumask_var_t   domain;
-   cpumask_var_t   old_domain;
unsigned intdest_apicid;
u8  vector;
-   u8  move_in_progress : 1;
 };
 
 extern struct irq_domain *x86_vector_domain;
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index a5ce2eef0528..0e7c39beefed 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -21,11 +21,18 @@
 #include 
 #include 
 
+struct apic_chip_data {
+   struct irq_cfg  cfg;
+   cpumask_var_t   domain;
+   cpumask_var_t   old_domain;
+   u8  move_in_progress : 1;
+};
+
 struct irq_domain *x86_vector_domain;
 static DEFINE_RAW_SPINLOCK(vector_lock);
 static struct irq_chip lapic_controller;
 #ifdef CONFIG_X86_IO_APIC
-static struct irq_cfg *legacy_irq_cfgs[NR_IRQS_LEGACY];
+static struct apic_chip_data *legacy_irq_data[NR_IRQS_LEGACY];
 #endif
 
 void lock_vector_lock(void)
@@ -41,12 +48,7 @@ void unlock_vector_lock(void)
raw_spin_unlock(_lock);
 }
 
-struct irq_cfg *irq_cfg(unsigned int irq)
-{
-   return irqd_cfg(irq_get_irq_data(irq));
-}
-
-struct irq_cfg *irqd_cfg(struct irq_data *irq_data)
+static struct apic_chip_data *apic_chip_data(struct irq_data *irq_data)
 {
if (!irq_data)
return NULL;
@@ -57,36 +59,48 @@ struct irq_cfg *irqd_cfg(struct irq_data *irq_data)
return irq_data->chip_data;
 }
 
-static struct irq_cfg *alloc_irq_cfg(int node)
+struct irq_cfg *irqd_cfg(struct irq_data *irq_data)
+{
+   struct apic_chip_data *data = apic_chip_data(irq_data);
+
+   return data ? >cfg : NULL;
+}
+
+struct irq_cfg *irq_cfg(unsigned int irq)
 {
-   struct irq_cfg *cfg;
+   return irqd_cfg(irq_get_irq_data(irq));
+}
 
-   cfg = kzalloc_node(sizeof(*cfg), GFP_KERNEL, node);
-   if (!cfg)
+static struct apic_chip_data *alloc_apic_chip_data(int node)
+{
+   struct apic_chip_data *data;
+
+   data = kzalloc_node(sizeof(*data), GFP_KERNEL, node);
+   if (!data)
return NULL;
-   if (!zalloc_cpumask_var_node(>domain, GFP_KERNEL, node))
-   goto out_cfg;
-   if (!zalloc_cpumask_var_node(>old_domain, GFP_KERNEL, node))
+   if (!zalloc_cpumask_var_node(>domain, GFP_KERNEL, node))
+   goto out_data;
+   if (!zalloc_cpumask_var_node(>old_domain, GFP_KERNEL, node))
goto out_domain;
-   return cfg;
+   return data;
 out_domain:
-   free_cpumask_var(cfg->domain);
-out_cfg:
-   kfree(cfg);
+   free_cpumask_var(data->domain);
+out_data:
+   kfree(data);
return NULL;
 }
 
-static void free_irq_cfg(struct irq_cfg *cfg)
+static void free_apic_chip_data(struct apic_chip_data *data)
 {
-   if (cfg) {
-   free_cpumask_var(cfg->domain);
-   free_cpumask_var(cfg->old_domain);
-   kfree(cfg);
+   if (data) {
+   free_cpumask_var(data->domain);
+   free_cpumask_var(data->old_domain);
+   kfree(data);
}
 }
 
-static int
-__assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
+static int __assign_irq_vector(int irq, struct apic_chip_data *d,
+  const struct cpumask *mask)
 {
/*
 * NOTE! The local APIC isn't very good at handling
@@ -104,7 +118,7 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const 
struct cpumask *mask)
int cpu, err;
cpumask_var_t tmp_mask;
 
-   if (cfg->move_in_progress)
+   if (d->move_in_progress)
return -EBUSY;
 
if (!alloc_cpumask_var(_mask, GFP_ATOMIC))
@@ -112,26 +126,26 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const 
struct cpumask *mask)
 
/* Only try and allocate irqs on cpus that are present */
err = -ENOSPC;
-   cpumask_clear(cfg->old_domain);
+   cpumask_clear(d->old_domain);
cpu = cpumask_first_and(mask, cpu_online_mask);
while (cpu < nr_cpu_ids) {
int new_cpu, vector, offset;
 
apic->vector_allocation_domain(cpu, tmp_mask, mask);
 
-   if (cpumask_subset(tmp_mask, cfg->domain)) {
+   if (cpumask_subset(tmp_mask, d->domain)) {
err = 0;
-

[Patch Part3 v4 37/38] x86, irq: Introduce mechanism to support different vector allocation policies

2014-11-24 Thread Jiang Liu
Introduce mechanism to support different vector allocation policies,
so platform or user may choose the best suitable CPU vector allocation
policy. Currently two policies are supported:
1) allocate CPU vector from cpumask_of_node(dev_to_node(dev))
2) allocate from apic->target_cpus(), this is the default policy

Platform driver may call set_vector_alloc_policy() to choose the
preferred policies.

This mechanism may be used to support NumaConnect systems to allocate
CPU vectors from device local node.

We may also enhance to support per-cpu vector allocation if it's needed.

Signed-off-by: Jiang Liu 
Cc: Daniel J Blueman 
---
 arch/x86/include/asm/hw_irq.h |   12 
 arch/x86/kernel/apic/vector.c |   66 +++--
 2 files changed, 69 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index e7ae6eb84934..61807eed48a3 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -170,6 +170,17 @@ enum {
X86_IRQ_ALLOC_CONTIGOUS_VECTORS = 0x1,
 };
 
+enum {
+   /* Allocate vector from cpumask_of_node(dev_to_node(dev)) */
+   X86_VECTOR_POL_NODE = 0x1,
+   /* Allocate vector from apic->target_cpus() */
+   X86_VECTOR_POL_DEFAULT = 0x2,
+   /* Allocate vector from cpumask assigned by caller */
+   X86_VECTOR_POL_CALLER = 0x4,
+   X86_VECTOR_POL_MIN = X86_VECTOR_POL_NODE,
+   X86_VECTOR_POL_MAX = X86_VECTOR_POL_CALLER,
+};
+
 struct irq_cfg {
unsigned intdest_apicid;
u8  vector;
@@ -185,6 +196,7 @@ extern struct irq_cfg *irq_cfg(unsigned int irq);
 extern struct irq_cfg *irqd_cfg(struct irq_data *irq_data);
 extern void lock_vector_lock(void);
 extern void unlock_vector_lock(void);
+extern void set_vector_alloc_policy(unsigned int policy);
 extern void setup_vector_irq(int cpu);
 #ifdef CONFIG_SMP
 extern void send_cleanup_vector(struct irq_cfg *);
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 0e7c39beefed..16de8906ee1e 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -28,6 +28,8 @@ struct apic_chip_data {
u8  move_in_progress : 1;
 };
 
+static unsigned int x86_vector_alloc_policy = X86_VECTOR_POL_DEFAULT |
+ X86_VECTOR_POL_CALLER;
 struct irq_domain *x86_vector_domain;
 static DEFINE_RAW_SPINLOCK(vector_lock);
 static struct irq_chip lapic_controller;
@@ -71,6 +73,12 @@ struct irq_cfg *irq_cfg(unsigned int irq)
return irqd_cfg(irq_get_irq_data(irq));
 }
 
+void set_vector_alloc_policy(unsigned int policy)
+{
+   if (!WARN_ON((policy & (X86_VECTOR_POL_MAX - 1)) == 0))
+   x86_vector_alloc_policy = policy | X86_VECTOR_POL_CALLER;
+}
+
 static struct apic_chip_data *alloc_apic_chip_data(int node)
 {
struct apic_chip_data *data;
@@ -259,12 +267,6 @@ void copy_irq_alloc_info(struct irq_alloc_info *dst, 
struct irq_alloc_info *src)
memset(dst, 0, sizeof(*dst));
 }
 
-static inline const struct cpumask *
-irq_alloc_info_get_mask(struct irq_alloc_info *info)
-{
-   return (!info || !info->mask) ? apic->target_cpus() : info->mask;
-}
-
 static void x86_vector_free_irqs(struct irq_domain *domain,
 unsigned int virq, unsigned int nr_irqs)
 {
@@ -285,13 +287,59 @@ static void x86_vector_free_irqs(struct irq_domain 
*domain,
}
 }
 
+static int assign_irq_vector_policy(int irq, int node,
+   struct apic_chip_data *data,
+   struct irq_alloc_info *info)
+{
+   int err = -EBUSY;
+   unsigned int policy;
+   const struct cpumask *mask;
+
+   if (info && info->mask)
+   policy = X86_VECTOR_POL_CALLER;
+   else
+   policy = X86_VECTOR_POL_MIN;
+
+   for (; policy <= X86_VECTOR_POL_MAX; policy <<= 1) {
+   if (!(x86_vector_alloc_policy & policy))
+   continue;
+
+   switch (policy) {
+   case X86_VECTOR_POL_NODE:
+   if (node >= 0)
+   mask = cpumask_of_node(node);
+   else
+   mask = NULL;
+   break;
+   case X86_VECTOR_POL_DEFAULT:
+   mask = apic->target_cpus();
+   break;
+   case X86_VECTOR_POL_CALLER:
+   if (info && info->mask)
+   mask = info->mask;
+   else
+   mask = NULL;
+   break;
+   default:
+   mask = NULL;
+   break;
+   }
+   if (mask) {
+   err = assign_irq_vector(irq, data, mask);
+   if (!err)
+   

[Patch Part3 v4 31/38] x86, irq: Change functions only used in vector.c as static

2014-11-24 Thread Jiang Liu
Function {assign|clear}_irq_vector() and apic_retrigger_irq() are only
used in file vector.c, so change them as static.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/hw_irq.h |3 ---
 arch/x86/kernel/apic/vector.c |7 ---
 2 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index a88f5b325bf2..ea9aebc65ff6 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -188,8 +188,6 @@ extern struct irq_cfg *irq_cfg(unsigned int irq);
 extern struct irq_cfg *irqd_cfg(struct irq_data *irq_data);
 extern void lock_vector_lock(void);
 extern void unlock_vector_lock(void);
-extern int assign_irq_vector(int, struct irq_cfg *, const struct cpumask *);
-extern void clear_irq_vector(int irq, struct irq_cfg *cfg);
 extern void setup_vector_irq(int cpu);
 #ifdef CONFIG_SMP
 extern void send_cleanup_vector(struct irq_cfg *);
@@ -199,7 +197,6 @@ static inline void send_cleanup_vector(struct irq_cfg *c) { 
}
 static inline void irq_complete_move(struct irq_cfg *c) { }
 #endif
 
-extern int apic_retrigger_irq(struct irq_data *data);
 extern void apic_ack_edge(struct irq_data *data);
 extern int apic_set_affinity(struct irq_data *data, const struct cpumask *mask,
 unsigned int *dest_id);
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 8467ca47bd4a..fba4958b6139 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -185,7 +185,8 @@ next:
return err;
 }
 
-int assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
+static int assign_irq_vector(int irq, struct irq_cfg *cfg,
+const struct cpumask *mask)
 {
int err;
unsigned long flags;
@@ -196,7 +197,7 @@ int assign_irq_vector(int irq, struct irq_cfg *cfg, const 
struct cpumask *mask)
return err;
 }
 
-void clear_irq_vector(int irq, struct irq_cfg *cfg)
+static void clear_irq_vector(int irq, struct irq_cfg *cfg)
 {
int cpu, vector;
unsigned long flags;
@@ -441,7 +442,7 @@ void setup_vector_irq(int cpu)
__setup_vector_irq(cpu);
 }
 
-int apic_retrigger_irq(struct irq_data *data)
+static int apic_retrigger_irq(struct irq_data *data)
 {
struct irq_cfg *cfg = irqd_cfg(data);
unsigned long flags;
-- 
1.7.10.4

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[Patch Part3 v4 30/38] x86, irq: Kill unused alloc_irq_and_cfg_at()

2014-11-24 Thread Jiang Liu
There's no caller of alloc_irq_and_cfg_at() anymore, so kill it.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/hw_irq.h |1 -
 arch/x86/kernel/apic/vector.c |   21 -
 2 files changed, 22 deletions(-)

diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 1ce5f8164c64..a88f5b325bf2 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -186,7 +186,6 @@ extern void copy_irq_alloc_info(struct irq_alloc_info *dst,
struct irq_alloc_info *src);
 extern struct irq_cfg *irq_cfg(unsigned int irq);
 extern struct irq_cfg *irqd_cfg(struct irq_data *irq_data);
-extern struct irq_cfg *alloc_irq_and_cfg_at(unsigned int at, int node);
 extern void lock_vector_lock(void);
 extern void unlock_vector_lock(void);
 extern int assign_irq_vector(int, struct irq_cfg *, const struct cpumask *);
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 91a89500f88f..8467ca47bd4a 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -76,27 +76,6 @@ out_cfg:
return NULL;
 }
 
-struct irq_cfg *alloc_irq_and_cfg_at(unsigned int at, int node)
-{
-   int res = irq_alloc_desc_at(at, node);
-   struct irq_cfg *cfg;
-
-   if (res < 0) {
-   if (res != -EEXIST)
-   return NULL;
-   cfg = irq_cfg(at);
-   if (cfg)
-   return cfg;
-   }
-
-   cfg = alloc_irq_cfg(node);
-   if (cfg)
-   irq_set_chip_data(at, cfg);
-   else
-   irq_free_desc(at);
-   return cfg;
-}
-
 static void free_irq_cfg(struct irq_cfg *cfg)
 {
if (cfg) {
-- 
1.7.10.4

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[Patch Part3 v4 29/38] x86, irq: Use cached IOAPIC entry instead of reading from hardware

2014-11-24 Thread Jiang Liu
Use cahced IOAPIC entry instead of reading data from IOAPIC hardware
registers to improve performance.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/kernel/apic/io_apic.c |   78 +++-
 1 file changed, 21 insertions(+), 57 deletions(-)

diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index a915ee005148..8a6293311ee6 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -69,8 +69,13 @@
 int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity);
 
 /*
- *  Is the SiS APIC rmw bug present ?
+ * Is the SiS APIC rmw bug present ?
  *  -1 = don't know, 0 = no, 1 = yes
+ * When doing a read-modify-write operation on IOAPIC registers, older SiS APIC
+ * requires we rewrite the index register again where the read already set up
+ * the index register.
+ * The code to make use of sis_apic_bug has been removed, but we don't want to
+ * loss this knowledge.
  */
 int sis_apic_bug = -1;
 
@@ -290,22 +295,6 @@ static void io_apic_write(unsigned int apic, unsigned int 
reg,
writel(value, _apic->data);
 }
 
-/*
- * Re-write a value: to be used for read-modify-write
- * cycles where the read already set up the index register.
- *
- * Older SiS APIC requires we rewrite the index register
- */
-static void io_apic_modify(unsigned int apic, unsigned int reg,
-  unsigned int value)
-{
-   struct io_apic __iomem *io_apic = io_apic_base(apic);
-
-   if (sis_apic_bug)
-   writel(reg, _apic->index);
-   writel(value, _apic->data);
-}
-
 union entry_union {
struct { u32 w1, w2; };
struct IO_APIC_route_entry entry;
@@ -442,29 +431,23 @@ static void __init replace_pin_at_irq_node(struct 
mp_chip_data *data, int node,
add_pin_to_irq_node(data, node, newapic, newpin);
 }
 
-static void __io_apic_modify_irq(struct irq_pin_list *entry,
-int mask_and, int mask_or,
-void (*final)(struct irq_pin_list *entry))
-{
-   unsigned int reg, pin;
-
-   pin = entry->pin;
-   reg = io_apic_read(entry->apic, 0x10 + pin * 2);
-   reg &= mask_and;
-   reg |= mask_or;
-   io_apic_modify(entry->apic, 0x10 + pin * 2, reg);
-   if (final)
-   final(entry);
-}
-
 static void io_apic_modify_irq(struct mp_chip_data *data,
   int mask_and, int mask_or,
   void (*final)(struct irq_pin_list *entry))
 {
+   union entry_union eu;
struct irq_pin_list *entry;
 
-   for_each_irq_pin(entry, data->irq_2_pin)
-   __io_apic_modify_irq(entry, mask_and, mask_or, final);
+   eu.entry = data->entry;
+   eu.w1 &= mask_and;
+   eu.w1 |= mask_or;
+   data->entry = eu.entry;
+
+   for_each_irq_pin(entry, data->irq_2_pin) {
+   io_apic_write(entry->apic, 0x10 + 2 * entry->pin, eu.w1);
+   if (final)
+   final(entry);
+   }
 }
 
 static void io_apic_sync(struct irq_pin_list *entry)
@@ -1729,28 +1712,6 @@ static unsigned int startup_ioapic_irq(struct irq_data 
*data)
return was_pending;
 }
 
-static void __target_IO_APIC_irq(unsigned int irq, struct irq_cfg *cfg,
-struct mp_chip_data *data)
-{
-   int apic, pin;
-   struct irq_pin_list *entry;
-   u8 vector = cfg->vector;
-   unsigned int dest = SET_APIC_LOGICAL_ID(cfg->dest_apicid);
-
-   for_each_irq_pin(entry, data->irq_2_pin) {
-   unsigned int reg;
-
-   apic = entry->apic;
-   pin = entry->pin;
-
-   io_apic_write(apic, 0x11 + pin*2, dest);
-   reg = io_apic_read(apic, 0x10 + pin*2);
-   reg &= ~IO_APIC_REDIR_VECTOR_MASK;
-   reg |= vector;
-   io_apic_modify(apic, 0x10 + pin*2, reg);
-   }
-}
-
 atomic_t irq_mis_count;
 
 #ifdef CONFIG_GENERIC_PENDING_IRQ
@@ -1916,6 +1877,7 @@ static int ioapic_set_affinity(struct irq_data *irq_data,
 {
struct irq_data *parent = irq_data->parent_data;
struct mp_chip_data *data = irq_data->chip_data;
+   struct irq_pin_list *entry;
struct irq_cfg *cfg;
unsigned long flags;
int ret;
@@ -1926,7 +1888,9 @@ static int ioapic_set_affinity(struct irq_data *irq_data,
cfg = irqd_cfg(irq_data);
data->entry.dest = SET_APIC_LOGICAL_ID(cfg->dest_apicid);
data->entry.vector = cfg->vector;
-   __target_IO_APIC_irq(irq_data->irq, cfg, irq_data->chip_data);
+   for_each_irq_pin(entry, data->irq_2_pin)
+   __ioapic_write_entry(entry->apic, entry->pin,
+data->entry);
}
raw_spin_unlock_irqrestore(_lock, flags);
 
-- 
1.7.10.4

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[Patch Part3 v4 28/38] x86, irq: Clean up io_apic.h

2014-11-24 Thread Jiang Liu
Clean up io_apic.h by:
1) moving definition of struct mp_ioapic_gsi into io_apic.c
2) changing mp_pin_to_gsi() and mp_ioapic_gsi_routing() as static
3) killing unused MP_MAX_IOAPIC_PIN
4) killing useless forward declaration
5) killing useless comments

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h |   14 ++
 arch/x86/kernel/apic/io_apic.c |   23 ---
 2 files changed, 10 insertions(+), 27 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 21578af00243..b569ae098eb1 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -113,9 +113,6 @@ extern int nr_ioapics;
 
 extern int mpc_ioapic_id(int ioapic);
 extern unsigned int mpc_ioapic_addr(int ioapic);
-extern struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic);
-
-#define MP_MAX_IOAPIC_PIN 127
 
 /* # of MP IRQ source entries */
 extern int mp_irq_entries;
@@ -135,6 +132,8 @@ extern int noioapicquirk;
 /* -1 if "noapic" boot option passed */
 extern int noioapicreroute;
 
+extern u32 gsi_top;
+
 extern unsigned long io_apic_irqs;
 
 #define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1 << (x)) & io_apic_irqs))
@@ -146,7 +145,6 @@ extern unsigned long io_apic_irqs;
 #define io_apic_assign_pci_irqs \
(mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
 
-struct irq_cfg;
 extern void ioapic_insert_resources(void);
 extern int arch_early_ioapic_init(void);
 
@@ -174,15 +172,8 @@ struct ioapic_domain_cfg {
struct device_node  *dev;
 };
 
-struct mp_ioapic_gsi{
-   u32 gsi_base;
-   u32 gsi_end;
-};
-extern u32 gsi_top;
-
 extern int mp_find_ioapic(u32 gsi);
 extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
-extern u32 mp_pin_to_gsi(int ioapic, int pin);
 extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags,
 struct irq_alloc_info *info);
 extern void mp_unmap_irq(int irq);
@@ -231,7 +222,6 @@ static inline int arch_early_ioapic_init(void) { return 0; }
 static inline void print_IO_APICs(void) {}
 #define gsi_top (NR_IRQS_LEGACY)
 static inline int mp_find_ioapic(u32 gsi) { return 0; }
-static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; }
 static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags,
struct irq_alloc_info *info)
 {
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 7a3679e43b67..a915ee005148 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -63,7 +63,6 @@
 #definefor_each_ioapic_pin(idx, pin)   \
for_each_ioapic((idx))  \
for_each_pin((idx), (pin))
-
 #define for_each_irq_pin(entry, head) \
list_for_each_entry(entry, , list)
 
@@ -94,6 +93,11 @@ struct mp_chip_data {
bool isa_irq;
 };
 
+struct mp_ioapic_gsi {
+   u32 gsi_base;
+   u32 gsi_end;
+};
+
 static struct ioapic {
/*
 * # of IRQ routing registers
@@ -124,7 +128,7 @@ unsigned int mpc_ioapic_addr(int ioapic_idx)
return ioapics[ioapic_idx].mp_config.apicaddr;
 }
 
-struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic_idx)
+static inline struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic_idx)
 {
return [ioapic_idx].gsi_config;
 }
@@ -136,7 +140,7 @@ static inline int mp_ioapic_pin_count(int ioapic)
return gsi_cfg->gsi_end - gsi_cfg->gsi_base + 1;
 }
 
-u32 mp_pin_to_gsi(int ioapic, int pin)
+static inline u32 mp_pin_to_gsi(int ioapic, int pin)
 {
return mp_ioapic_gsi_routing(ioapic)->gsi_base + pin;
 }
@@ -1146,8 +1150,7 @@ static int pin_2_irq(int idx, int ioapic, int pin, 
unsigned int flags)
return  mp_map_pin_to_irq(gsi, idx, ioapic, pin, flags, NULL);
 }
 
-int mp_map_gsi_to_irq(u32 gsi, unsigned int flags,
- struct irq_alloc_info *info)
+int mp_map_gsi_to_irq(u32 gsi, unsigned int flags, struct irq_alloc_info *info)
 {
int ioapic, pin, idx;
 
@@ -1709,7 +1712,6 @@ static int __init timer_irq_works(void)
  * This is not complete - we should be able to fake
  * an edge even if it isn't on the 8259A...
  */
-
 static unsigned int startup_ioapic_irq(struct irq_data *data)
 {
int was_pending = 0, irq = data->irq;
@@ -1727,15 +1729,6 @@ static unsigned int startup_ioapic_irq(struct irq_data 
*data)
return was_pending;
 }
 
-/*
- * Level and edge triggered IO-APIC interrupts need different handling,
- * so we use two separate IRQ descriptors. Edge triggered IRQs can be
- * handled with the level-triggered descriptor, but that one has slightly
- * more overhead. Level-triggered interrupts cannot be handled with the
- * edge-triggered handler, without risking IRQ storms and other ugly
- * races.
- */
-
 static void __target_IO_APIC_irq(unsigned int irq, struct irq_cfg *cfg,
 struct mp_chip_data *data)
 {
-- 
1.7.10.4

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[Patch Part3 v4 26/38] x86, irq: Kill struct io_apic_irq_attr

2014-11-24 Thread Jiang Liu
Now there's no user of struct io_apic_irq_attr anymore, so kill it.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h |7 ---
 arch/x86/kernel/apic/io_apic.c |   10 --
 2 files changed, 17 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 3b54f0f9cbb7..1597c77725f9 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -157,13 +157,6 @@ extern int restore_ioapic_entries(void);
 extern void setup_ioapic_ids_from_mpc(void);
 extern void setup_ioapic_ids_from_mpc_nocheck(void);
 
-struct io_apic_irq_attr {
-   int ioapic;
-   int ioapic_pin;
-   int trigger;
-   int polarity;
-};
-
 enum ioapic_domain_type {
IOAPIC_DOMAIN_INVALID,
IOAPIC_DOMAIN_LEGACY,
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 69aa3b04448b..f0ef5832f527 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -2949,16 +2949,6 @@ int mp_ioapic_registered(u32 gsi_base)
return 0;
 }
 
-static inline void set_io_apic_irq_attr(struct io_apic_irq_attr *irq_attr,
-   int ioapic, int ioapic_pin,
-   int trigger, int polarity)
-{
-   irq_attr->ioapic= ioapic;
-   irq_attr->ioapic_pin= ioapic_pin;
-   irq_attr->trigger   = trigger;
-   irq_attr->polarity  = polarity;
-}
-
 static void mp_irqdomain_get_attr(u32 gsi, struct mp_chip_data *data,
  struct irq_alloc_info *info)
 {
-- 
1.7.10.4

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[Patch Part3 v4 25/38] x86, irq: Move irq_cfg.irq_2_pin into io_apic.c

2014-11-24 Thread Jiang Liu
Now only io_apic.c accesses struct irq_cfg.irq_2_pin, so move irq_2_pin
into struct mp_chip_data in io_apic.c to clean up struct irq_cfg further.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/hw_irq.h  |7 --
 arch/x86/kernel/apic/io_apic.c |  164 +++-
 arch/x86/kernel/apic/vector.c  |3 -
 3 files changed, 77 insertions(+), 97 deletions(-)

diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 494d541d2aee..1ce5f8164c64 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -176,13 +176,6 @@ struct irq_cfg {
unsigned intdest_apicid;
u8  vector;
u8  move_in_progress : 1;
-   union {
-#ifdef CONFIG_X86_IO_APIC
-   struct {
-   struct list_headirq_2_pin;
-   };
-#endif
-   };
 };
 
 extern struct irq_domain *x86_vector_domain;
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 2a10cb9f03bf..69aa3b04448b 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -80,7 +80,13 @@ static DEFINE_MUTEX(ioapic_mutex);
 static unsigned int ioapic_dynirq_base;
 static int ioapic_initialized;
 
+struct irq_pin_list {
+   struct list_head list;
+   int apic, pin;
+};
+
 struct mp_chip_data {
+   struct list_head irq_2_pin;
struct IO_APIC_route_entry entry;
int trigger;
int polarity;
@@ -212,16 +218,6 @@ void mp_save_irq(struct mpc_intsrc *m)
panic("Max # of irq sources exceeded!!\n");
 }
 
-struct irq_pin_list {
-   struct list_head list;
-   int apic, pin;
-};
-
-static struct irq_pin_list *alloc_irq_pin_list(int node)
-{
-   return kzalloc_node(sizeof(struct irq_pin_list), GFP_ATOMIC, node);
-}
-
 static void alloc_ioapic_saved_registers(int idx)
 {
size_t size;
@@ -376,16 +372,17 @@ static void ioapic_mask_entry(int apic, int pin)
  * shared ISA-space IRQs, so we have to support them. We are super
  * fast in the common case, and fast for shared ISA-space IRQs.
  */
-static int __add_pin_to_irq_node(struct irq_cfg *cfg, int node, int apic, int 
pin)
+static int __add_pin_to_irq_node(struct mp_chip_data *data,
+int node, int apic, int pin)
 {
struct irq_pin_list *entry;
 
/* don't allow duplicates */
-   for_each_irq_pin(entry, cfg->irq_2_pin)
+   for_each_irq_pin(entry, data->irq_2_pin)
if (entry->apic == apic && entry->pin == pin)
return 0;
 
-   entry = alloc_irq_pin_list(node);
+   entry = kzalloc_node(sizeof(struct irq_pin_list), GFP_ATOMIC, node);
if (!entry) {
pr_err("can not alloc irq_pin_list (%d,%d,%d)\n",
   node, apic, pin);
@@ -393,16 +390,16 @@ static int __add_pin_to_irq_node(struct irq_cfg *cfg, int 
node, int apic, int pi
}
entry->apic = apic;
entry->pin = pin;
+   list_add_tail(>list, >irq_2_pin);
 
-   list_add_tail(>list, >irq_2_pin);
return 0;
 }
 
-static void __remove_pin_from_irq(struct irq_cfg *cfg, int apic, int pin)
+static void __remove_pin_from_irq(struct mp_chip_data *data, int apic, int pin)
 {
struct irq_pin_list *tmp, *entry;
 
-   list_for_each_entry_safe(entry, tmp, >irq_2_pin, list)
+   list_for_each_entry_safe(entry, tmp, >irq_2_pin, list)
if (entry->apic == apic && entry->pin == pin) {
list_del(>list);
kfree(entry);
@@ -410,22 +407,23 @@ static void __remove_pin_from_irq(struct irq_cfg *cfg, 
int apic, int pin)
}
 }
 
-static void add_pin_to_irq_node(struct irq_cfg *cfg, int node, int apic, int 
pin)
+static void add_pin_to_irq_node(struct mp_chip_data *data,
+   int node, int apic, int pin)
 {
-   if (__add_pin_to_irq_node(cfg, node, apic, pin))
+   if (__add_pin_to_irq_node(data, node, apic, pin))
panic("IO-APIC: failed to add irq-pin. Can not proceed\n");
 }
 
 /*
  * Reroute an IRQ to a different pin.
  */
-static void __init replace_pin_at_irq_node(struct irq_cfg *cfg, int node,
+static void __init replace_pin_at_irq_node(struct mp_chip_data *data, int node,
   int oldapic, int oldpin,
   int newapic, int newpin)
 {
struct irq_pin_list *entry;
 
-   for_each_irq_pin(entry, cfg->irq_2_pin) {
+   for_each_irq_pin(entry, data->irq_2_pin) {
if (entry->apic == oldapic && entry->pin == oldpin) {
entry->apic = newapic;
entry->pin = newpin;
@@ -435,7 +433,7 @@ static void __init replace_pin_at_irq_node(struct irq_cfg 
*cfg, int node,
}
 
/* old apic/pin didn't exist, so just add new ones */
-   

[Patch Part3 v4 27/38] x86, irq: Kill x86_io_apic_ops.write and x86_io_apic_ops.modify

2014-11-24 Thread Jiang Liu
x86_io_apic_ops.write is always set to native_io_apic_write(),
and nobody overrides it. So get rid of the indirection by changing
native_io_apic_write() as io_apic_write() and killing
x86_io_apic_ops.write.

Do the same for x86_io_apic_ops.modify and native_io_apic_modify().

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h  |   13 -
 arch/x86/include/asm/x86_init.h |2 --
 arch/x86/kernel/apic/io_apic.c  |6 --
 arch/x86/kernel/x86_init.c  |2 --
 4 files changed, 4 insertions(+), 19 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 1597c77725f9..21578af00243 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -208,8 +208,6 @@ extern void disable_ioapic_support(void);
 
 extern void __init native_io_apic_init_mappings(void);
 extern unsigned int native_io_apic_read(unsigned int apic, unsigned int reg);
-extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned 
int val);
-extern void native_io_apic_modify(unsigned int apic, unsigned int reg, 
unsigned int val);
 extern void native_disable_io_apic(void);
 
 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
@@ -217,15 +215,6 @@ static inline unsigned int io_apic_read(unsigned int apic, 
unsigned int reg)
return x86_io_apic_ops.read(apic, reg);
 }
 
-static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned 
int value)
-{
-   x86_io_apic_ops.write(apic, reg, value);
-}
-static inline void io_apic_modify(unsigned int apic, unsigned int reg, 
unsigned int value)
-{
-   x86_io_apic_ops.modify(apic, reg, value);
-}
-
 extern void setup_IO_APIC(void);
 extern void enable_IO_APIC(void);
 extern void disable_IO_APIC(void);
@@ -266,8 +255,6 @@ static inline void mp_save_irq(struct mpc_intsrc *m) { };
 static inline void disable_ioapic_support(void) { }
 #define native_io_apic_init_mappings   NULL
 #define native_io_apic_readNULL
-#define native_io_apic_write   NULL
-#define native_io_apic_modify  NULL
 #define native_disable_io_apic NULL
 #endif
 
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 09d4dab9302f..844b37d55a44 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -182,8 +182,6 @@ struct x86_msi_ops {
 struct x86_io_apic_ops {
void(*init)   (void);
unsigned int(*read)   (unsigned int apic, unsigned int reg);
-   void(*write)  (unsigned int apic, unsigned int reg, 
unsigned int value);
-   void(*modify) (unsigned int apic, unsigned int reg, 
unsigned int value);
void(*disable)(void);
 };
 
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index f0ef5832f527..7a3679e43b67 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -277,7 +277,8 @@ unsigned int native_io_apic_read(unsigned int apic, 
unsigned int reg)
return readl(_apic->data);
 }
 
-void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned int 
value)
+static void io_apic_write(unsigned int apic, unsigned int reg,
+ unsigned int value)
 {
struct io_apic __iomem *io_apic = io_apic_base(apic);
 
@@ -291,7 +292,8 @@ void native_io_apic_write(unsigned int apic, unsigned int 
reg, unsigned int valu
  *
  * Older SiS APIC requires we rewrite the index register
  */
-void native_io_apic_modify(unsigned int apic, unsigned int reg, unsigned int 
value)
+static void io_apic_modify(unsigned int apic, unsigned int reg,
+  unsigned int value)
 {
struct io_apic __iomem *io_apic = io_apic_base(apic);
 
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index f612dc018fb6..633f07845099 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -141,7 +141,5 @@ void arch_restore_msi_irqs(struct pci_dev *dev)
 struct x86_io_apic_ops x86_io_apic_ops = {
.init   = native_io_apic_init_mappings,
.read   = native_io_apic_read,
-   .write  = native_io_apic_write,
-   .modify = native_io_apic_modify,
.disable= native_disable_io_apic,
 };
-- 
1.7.10.4

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Re: [PATCH 1/2] [drivers] staging/lustre: fix sparse warnings

2014-11-24 Thread Dan Carpenter
On Tue, Nov 25, 2014 at 08:35:42AM +0100, Zahari Doychev wrote:
> On Tue, Nov 25, 2014 at 02:40:36AM +0300, Dan Carpenter wrote:
> > On Mon, Nov 24, 2014 at 07:55:41PM +0100, Zahari Doychev wrote:
> > > --- a/drivers/staging/lustre/include/linux/lnet/lib-lnet.h
> > > +++ b/drivers/staging/lustre/include/linux/lnet/lib-lnet.h
> > > @@ -784,7 +784,8 @@ lnet_copy_iov2flat(int dlen, void *dest, unsigned int 
> > > doffset,
> > >  unsigned int nsiov, struct iovec *siov, unsigned int soffset,
> > >  unsigned int nob)
> > >  {
> > > - struct iovec diov = {/*.iov_base = */ dest, /*.iov_len = */ dlen};
> > > + struct iovec diov = {/*.iov_base = */ (void __user *)dest,
> > > +  /*.iov_len = */ dlen};
> > >  
> > 
> > Why can't we just make the comments into code by removing the /*
> > characters?  Remove the cast by declaring the data as __user data to
> > begin with instead of declaring it incorrectly and then casting to the
> > correct type later.
> 
> If I make the declarations right then I am moving the casts to other 
> functions.

Yeah.  It might introduce new warnings.  Don't stress about that.  Don't
add casts, we'll just fix it all later.  It's better to have warnings
instead of hiding them with casts.

regards,
dan carpenter

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[Patch Part3 v4 23/38] iommu/vt-d: Move struct irq_2_iommu into intel_irq_remapping.c

2014-11-24 Thread Jiang Liu
Now only intel_irq_remapping.c access irq_2_iommu, so move it from
hw_irq.h into intel_irq_remapping.c.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/hw_irq.h   |9 -
 drivers/iommu/intel_irq_remapping.c |7 +++
 2 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 88632ea75fe0..3520f71f168b 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -95,14 +95,6 @@ extern void trace_call_function_single_interrupt(void);
 #endif /* CONFIG_TRACING */
 
 #ifdef CONFIG_IRQ_REMAP
-/* Intel specific interrupt remapping information */
-struct irq_2_iommu {
-   struct intel_iommu *iommu;
-   u16 irte_index;
-   u16 sub_handle;
-   u8  irte_mask;
-};
-
 /* AMD specific interrupt remapping information */
 struct irq_2_irte {
u16 devid; /* Device ID for IRTE table */
@@ -194,7 +186,6 @@ struct irq_cfg {
u8  move_in_progress : 1;
 #ifdef CONFIG_IRQ_REMAP
union {
-   struct irq_2_iommu irq_2_iommu;
struct irq_2_irte  irq_2_irte;
};
 #endif
diff --git a/drivers/iommu/intel_irq_remapping.c 
b/drivers/iommu/intel_irq_remapping.c
index a2a46474c286..acff8493191e 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -32,6 +32,13 @@ struct hpet_scope {
unsigned int devfn;
 };
 
+struct irq_2_iommu {
+   struct intel_iommu *iommu;
+   u16 irte_index;
+   u16 sub_handle;
+   u8  irte_mask;
+};
+
 struct intel_ir_data {
struct irq_2_iommu  irq_2_iommu;
struct irte irte_entry;
-- 
1.7.10.4

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[Patch Part3 v4 24/38] iommu/amd: Move struct irq_2_irte into amd_iommu.c

2014-11-24 Thread Jiang Liu
Now only amd_iommu.c access irq_2_irte, so move it from hw_irq.h into
amd_iommu.c.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/hw_irq.h |   13 -
 drivers/iommu/amd_iommu.c |5 +
 2 files changed, 5 insertions(+), 13 deletions(-)

diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 3520f71f168b..494d541d2aee 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -94,14 +94,6 @@ extern void trace_call_function_single_interrupt(void);
 #define trace_kvm_posted_intr_ipi kvm_posted_intr_ipi
 #endif /* CONFIG_TRACING */
 
-#ifdef CONFIG_IRQ_REMAP
-/* AMD specific interrupt remapping information */
-struct irq_2_irte {
-   u16 devid; /* Device ID for IRTE table */
-   u16 index; /* Index into IRTE table*/
-};
-#endif /* CONFIG_IRQ_REMAP */
-
 struct irq_domain;
 
 #ifdef CONFIG_X86_LOCAL_APIC
@@ -184,11 +176,6 @@ struct irq_cfg {
unsigned intdest_apicid;
u8  vector;
u8  move_in_progress : 1;
-#ifdef CONFIG_IRQ_REMAP
-   union {
-   struct irq_2_irte  irq_2_irte;
-   };
-#endif
union {
 #ifdef CONFIG_X86_IO_APIC
struct {
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index cc4ac40ef7d1..2e8bbe5e164d 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -3855,6 +3855,11 @@ union irte {
} fields;
 };
 
+struct irq_2_irte {
+   u16 devid; /* Device ID for IRTE table */
+   u16 index; /* Index into IRTE table*/
+};
+
 struct amd_ir_data {
struct irq_2_irte   irq_2_irte;
union irte  irte_entry;
-- 
1.7.10.4

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[Patch Part3 v4 22/38] x86, irq: Kill irq_cfg.irq_remapped

2014-11-24 Thread Jiang Liu
Now there is no user of irq_cfg.irq_remapped, so kill it.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/hw_irq.h   |1 -
 drivers/iommu/amd_iommu.c   |1 -
 drivers/iommu/intel_irq_remapping.c |2 --
 3 files changed, 4 deletions(-)

diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index bbf90fe2a224..88632ea75fe0 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -193,7 +193,6 @@ struct irq_cfg {
u8  vector;
u8  move_in_progress : 1;
 #ifdef CONFIG_IRQ_REMAP
-   u8  remapped : 1;
union {
struct irq_2_iommu irq_2_iommu;
struct irq_2_irte  irq_2_irte;
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index e2b56b440ec2..cc4ac40ef7d1 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -4129,7 +4129,6 @@ static void irq_remapping_prepare_irte(struct amd_ir_data 
*data,
struct msi_msg *msg = >msi_entry;
struct IO_APIC_route_entry *entry;
 
-   irq_cfg->remapped = 1;
data->irq_2_irte.devid = devid;
data->irq_2_irte.index = index + sub_handle;
 
diff --git a/drivers/iommu/intel_irq_remapping.c 
b/drivers/iommu/intel_irq_remapping.c
index 9a887ba87dc3..a2a46474c286 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -66,7 +66,6 @@ static int alloc_irte(struct intel_iommu *iommu, int irq,
  struct irq_2_iommu *irq_iommu, u16 count)
 {
struct ir_table *table = iommu->ir_table;
-   struct irq_cfg *cfg = irq_cfg(irq);
unsigned int mask = 0;
unsigned long flags;
int index;
@@ -93,7 +92,6 @@ static int alloc_irte(struct intel_iommu *iommu, int irq,
if (index < 0) {
pr_warn("IR%d: can't allocate an IRTE\n", iommu->seq_id);
} else {
-   cfg->remapped = 1;
irq_iommu->iommu = iommu;
irq_iommu->irte_index =  index;
irq_iommu->sub_handle = 0;
-- 
1.7.10.4

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[Patch Part3 v4 20/38] iommu/amd: Clean up unsued code

2014-11-24 Thread Jiang Liu
Now we have converted to hierarchy irqdomain, so clean up unused code.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 drivers/iommu/amd_iommu.c |  144 -
 1 file changed, 144 deletions(-)

diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 38fb944d935b..e2b56b440ec2 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -3996,22 +3996,6 @@ out:
return index;
 }
 
-static int get_irte(u16 devid, int index, union irte *irte)
-{
-   struct irq_remap_table *table;
-   unsigned long flags;
-
-   table = get_irq_table(devid, false);
-   if (!table)
-   return -ENOMEM;
-
-   spin_lock_irqsave(>lock, flags);
-   irte->val = table->table[index];
-   spin_unlock_irqrestore(>lock, flags);
-
-   return 0;
-}
-
 static int modify_irte(u16 devid, int index, union irte irte)
 {
struct irq_remap_table *table;
@@ -4058,131 +4042,6 @@ static void free_irte(u16 devid, int index)
iommu_completion_wait(iommu);
 }
 
-static int setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry,
- unsigned int destination, int vector,
- struct io_apic_irq_attr *attr)
-{
-   struct irq_remap_table *table;
-   struct irq_2_irte *irte_info;
-   struct irq_cfg *cfg;
-   union irte irte;
-   int ioapic_id;
-   int index;
-   int devid;
-   int ret;
-
-   cfg = irq_cfg(irq);
-   if (!cfg)
-   return -EINVAL;
-
-   irte_info = >irq_2_irte;
-   ioapic_id = mpc_ioapic_id(attr->ioapic);
-   devid = get_ioapic_devid(ioapic_id);
-
-   if (devid < 0)
-   return devid;
-
-   table = get_irq_table(devid, true);
-   if (table == NULL)
-   return -ENOMEM;
-
-   index = attr->ioapic_pin;
-
-   /* Setup IRQ remapping info */
-   cfg->remapped = 1;
-   irte_info->devid  = devid;
-   irte_info->index  = index;
-
-   /* Setup IRTE for IOMMU */
-   irte.val= 0;
-   irte.fields.vector  = vector;
-   irte.fields.int_type= apic->irq_delivery_mode;
-   irte.fields.destination = destination;
-   irte.fields.dm  = apic->irq_dest_mode;
-   irte.fields.valid   = 1;
-
-   ret = modify_irte(devid, index, irte);
-   if (ret)
-   return ret;
-
-   /* Setup IOAPIC entry */
-   memset(entry, 0, sizeof(*entry));
-
-   entry->vector= index;
-   entry->mask  = 0;
-   entry->trigger   = attr->trigger;
-   entry->polarity  = attr->polarity;
-
-   /*
-* Mask level triggered irqs.
-*/
-   if (attr->trigger)
-   entry->mask = 1;
-
-   return 0;
-}
-
-static int set_affinity(struct irq_data *data, const struct cpumask *mask,
-   bool force)
-{
-   struct irq_2_irte *irte_info;
-   unsigned int dest, irq;
-   struct irq_cfg *cfg;
-   union irte irte;
-   int err;
-
-   if (!config_enabled(CONFIG_SMP))
-   return -1;
-
-   cfg   = irqd_cfg(data);
-   irq   = data->irq;
-   irte_info = >irq_2_irte;
-
-   if (!cpumask_intersects(mask, cpu_online_mask))
-   return -EINVAL;
-
-   if (get_irte(irte_info->devid, irte_info->index, ))
-   return -EBUSY;
-
-   if (assign_irq_vector(irq, cfg, mask))
-   return -EBUSY;
-
-   err = apic->cpu_mask_to_apicid_and(cfg->domain, mask, );
-   if (err) {
-   if (assign_irq_vector(irq, cfg, data->affinity))
-   pr_err("AMD-Vi: Failed to recover vector for irq %d\n", 
irq);
-   return err;
-   }
-
-   irte.fields.vector  = cfg->vector;
-   irte.fields.destination = dest;
-
-   modify_irte(irte_info->devid, irte_info->index, irte);
-
-   if (cfg->move_in_progress)
-   send_cleanup_vector(cfg);
-
-   cpumask_copy(data->affinity, mask);
-
-   return 0;
-}
-
-static int free_irq(int irq)
-{
-   struct irq_2_irte *irte_info;
-   struct irq_cfg *cfg;
-
-   cfg = irq_cfg(irq);
-   if (!cfg)
-   return -EINVAL;
-
-   irte_info = >irq_2_irte;
-
-   free_irte(irte_info->devid, irte_info->index);
-
-   return 0;
-}
-
 static int get_devid(struct irq_alloc_info *info)
 {
int devid = -1;
@@ -4256,9 +4115,6 @@ struct irq_remap_ops amd_iommu_irq_ops = {
.disable= amd_iommu_disable,
.reenable   = amd_iommu_reenable,
.enable_faulting= amd_iommu_enable_faulting,
-   .setup_ioapic_entry = setup_ioapic_entry,
-   .set_affinity   = set_affinity,
-   .free_irq   = free_irq,
.get_ir_irq_domain  = get_ir_irq_domain,
.get_irq_domain = get_irq_domain,
 };
-- 
1.7.10.4

--

[Patch Part3 v4 21/38] x86: irq_remapping: Clean up unused interfaces

2014-11-24 Thread Jiang Liu
Now we have converted to hierarchy irqdomain, so clean up unused
interfaces.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 drivers/iommu/irq_remapping.h |   16 
 1 file changed, 16 deletions(-)

diff --git a/drivers/iommu/irq_remapping.h b/drivers/iommu/irq_remapping.h
index 95b19a6ef16a..4bd791d72e5e 100644
--- a/drivers/iommu/irq_remapping.h
+++ b/drivers/iommu/irq_remapping.h
@@ -24,11 +24,7 @@
 
 #ifdef CONFIG_IRQ_REMAP
 
-struct IO_APIC_route_entry;
-struct io_apic_irq_attr;
 struct irq_data;
-struct cpumask;
-struct pci_dev;
 struct msi_msg;
 struct irq_domain;
 struct irq_alloc_info;
@@ -58,18 +54,6 @@ struct irq_remap_ops {
/* Enable fault handling */
int  (*enable_faulting)(void);
 
-   /* IO-APIC setup routine */
-   int (*setup_ioapic_entry)(int irq, struct IO_APIC_route_entry *,
- unsigned int, int,
- struct io_apic_irq_attr *);
-
-   /* Set the CPU affinity of a remapped interrupt */
-   int (*set_affinity)(struct irq_data *data, const struct cpumask *mask,
-   bool force);
-
-   /* Free an IRQ */
-   int (*free_irq)(int);
-
/* Get the irqdomain associated the IOMMU device */
struct irq_domain *(*get_ir_irq_domain)(struct irq_alloc_info *);
 
-- 
1.7.10.4

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[Patch Part3 v4 18/38] x86: irq_remapping: Clean up unsued code

2014-11-24 Thread Jiang Liu
Now we have converted to hierarchy irqdomain, so clean up unused code.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/irq_remapping.h |   23 --
 arch/x86/kernel/apic/vector.c|1 -
 drivers/iommu/irq_remapping.c|   36 --
 3 files changed, 60 deletions(-)

diff --git a/arch/x86/include/asm/irq_remapping.h 
b/arch/x86/include/asm/irq_remapping.h
index de8470b6f36a..6ba243126b3b 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -26,12 +26,7 @@
 #include 
 #include 
 
-struct IO_APIC_route_entry;
-struct io_apic_irq_attr;
-struct irq_chip;
 struct msi_msg;
-struct pci_dev;
-struct irq_cfg;
 struct irq_alloc_info;
 
 #ifdef CONFIG_IRQ_REMAP
@@ -44,13 +39,7 @@ extern int irq_remapping_enable(void);
 extern void irq_remapping_disable(void);
 extern int irq_remapping_reenable(int);
 extern int irq_remap_enable_fault_handling(void);
-extern void free_remapped_irq(int irq);
 extern void panic_if_irq_remap(const char *msg);
-extern bool setup_remapped_irq(int irq,
-  struct irq_cfg *cfg,
-  struct irq_chip *chip);
-
-void irq_remap_modify_chip_defaults(struct irq_chip *chip);
 
 extern struct irq_domain *
 irq_remapping_get_ir_irq_domain( struct irq_alloc_info *info);
@@ -77,23 +66,11 @@ static inline int irq_remapping_enable(void) { return 
-ENODEV; }
 static inline void irq_remapping_disable(void) { }
 static inline int irq_remapping_reenable(int eim) { return -ENODEV; }
 static inline int irq_remap_enable_fault_handling(void) { return -ENODEV; }
-static inline void free_remapped_irq(int irq) { }
 
 static inline void panic_if_irq_remap(const char *msg)
 {
 }
 
-static inline void irq_remap_modify_chip_defaults(struct irq_chip *chip)
-{
-}
-
-static inline bool setup_remapped_irq(int irq,
- struct irq_cfg *cfg,
- struct irq_chip *chip)
-{
-   return false;
-}
-
 static inline struct irq_domain *
 irq_remapping_get_ir_irq_domain(struct irq_alloc_info *info)
 {
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 31dc4a871673..ca30365507a0 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -283,7 +283,6 @@ static void x86_vector_free_irqs(struct irq_domain *domain,
for (i = 0; i < nr_irqs; i++) {
irq_data = irq_domain_get_irq_data(x86_vector_domain, virq + i);
if (irq_data && irq_data->chip_data) {
-   free_remapped_irq(virq);
clear_irq_vector(virq + i, irq_data->chip_data);
free_irq_cfg(irq_data->chip_data);
 #ifdef CONFIG_X86_IO_APIC
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index d175d6911821..3c3da04da8c5 100644
--- a/drivers/iommu/irq_remapping.c
+++ b/drivers/iommu/irq_remapping.c
@@ -26,11 +26,6 @@ int no_x2apic_optout;
 
 static struct irq_remap_ops *remap_ops;
 
-static bool irq_remapped(struct irq_cfg *cfg)
-{
-   return (cfg->remapped == 1);
-}
-
 static void irq_remapping_disable_io_apic(void)
 {
/*
@@ -160,17 +155,6 @@ int __init irq_remap_enable_fault_handling(void)
return remap_ops->enable_faulting();
 }
 
-void free_remapped_irq(int irq)
-{
-   struct irq_cfg *cfg = irq_cfg(irq);
-
-   if (!remap_ops || !remap_ops->free_irq)
-   return;
-
-   if (irq_remapped(cfg))
-   remap_ops->free_irq(irq);
-}
-
 void panic_if_irq_remap(const char *msg)
 {
if (irq_remapping_enabled)
@@ -195,26 +179,6 @@ void irq_remapping_print_chip(struct irq_data *data, 
struct seq_file *p)
seq_printf(p, " %s", data->chip->name);
 }
 
-static void ir_print_prefix(struct irq_data *data, struct seq_file *p)
-{
-   seq_printf(p, " IR-%s", data->chip->name);
-}
-
-void irq_remap_modify_chip_defaults(struct irq_chip *chip)
-{
-   chip->irq_print_chip = ir_print_prefix;
-   chip->irq_ack = ir_ack_apic_edge;
-}
-
-bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip)
-{
-   if (!irq_remapped(cfg))
-   return false;
-   irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
-   irq_remap_modify_chip_defaults(chip);
-   return true;
-}
-
 /**
  * irq_remapping_get_ir_irq_domain - Get the irqdomain associated with the 
IOMMU
  *  device serving request @info
-- 
1.7.10.4

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[Patch Part3 v4 17/38] x86: Clean up unused forward declarations in x86_init.h

2014-11-24 Thread Jiang Liu
Clean up unused forward declarations in x86_init.h.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/x86_init.h |6 --
 1 file changed, 6 deletions(-)

diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 4ada3d3a0e86..09d4dab9302f 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -171,7 +171,6 @@ struct x86_platform_ops {
 };
 
 struct pci_dev;
-struct msi_msg;
 
 struct x86_msi_ops {
int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
@@ -180,11 +179,6 @@ struct x86_msi_ops {
void (*restore_msi_irqs)(struct pci_dev *dev);
 };
 
-struct IO_APIC_route_entry;
-struct io_apic_irq_attr;
-struct irq_data;
-struct cpumask;
-
 struct x86_io_apic_ops {
void(*init)   (void);
unsigned int(*read)   (unsigned int apic, unsigned int reg);
-- 
1.7.10.4

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[Patch Part3 v4 15/38] x86, irq: Kill x86_io_apic_ops.eoi_ioapic_pin and related interfaces

2014-11-24 Thread Jiang Liu
Now there is no user of x86_io_apic_ops.eoi_ioapic_pin anymore, so kill
it.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h  |7 ---
 arch/x86/include/asm/x86_init.h |1 -
 arch/x86/kernel/apic/io_apic.c  |   20 
 arch/x86/kernel/x86_init.c  |1 -
 drivers/iommu/irq_remapping.c   |   19 ---
 5 files changed, 4 insertions(+), 44 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 5fba350fec1f..3b54f0f9cbb7 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -150,10 +150,6 @@ struct irq_cfg;
 extern void ioapic_insert_resources(void);
 extern int arch_early_ioapic_init(void);
 
-extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
-
-extern void native_eoi_ioapic_pin(int apic, int pin, int vector);
-
 extern int save_ioapic_entries(void);
 extern void mask_ioapic_entries(void);
 extern int restore_ioapic_entries(void);
@@ -237,8 +233,6 @@ static inline void io_apic_modify(unsigned int apic, 
unsigned int reg, unsigned
x86_io_apic_ops.modify(apic, reg, value);
 }
 
-extern void io_apic_eoi(unsigned int apic, unsigned int vector);
-
 extern void setup_IO_APIC(void);
 extern void enable_IO_APIC(void);
 extern void disable_IO_APIC(void);
@@ -282,7 +276,6 @@ static inline void disable_ioapic_support(void) { }
 #define native_io_apic_write   NULL
 #define native_io_apic_modify  NULL
 #define native_disable_io_apic NULL
-#define native_eoi_ioapic_pin  NULL
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index f9f83cfabcaa..4ada3d3a0e86 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -191,7 +191,6 @@ struct x86_io_apic_ops {
void(*write)  (unsigned int apic, unsigned int reg, 
unsigned int value);
void(*modify) (unsigned int apic, unsigned int reg, 
unsigned int value);
void(*disable)(void);
-   void(*eoi_ioapic_pin)(int apic, int pin, int vector);
 };
 
 extern struct x86_init_ops x86_init;
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 26fa504b57f6..2a10cb9f03bf 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -268,7 +268,7 @@ static __attribute_const__ struct io_apic __iomem 
*io_apic_base(int idx)
+ (mpc_ioapic_addr(idx) & ~PAGE_MASK);
 }
 
-void io_apic_eoi(unsigned int apic, unsigned int vector)
+static inline void io_apic_eoi(unsigned int apic, unsigned int vector)
 {
struct io_apic __iomem *io_apic = io_apic_base(apic);
writel(vector, _apic->eoi);
@@ -524,7 +524,7 @@ static void unmask_ioapic_irq(struct irq_data *data)
  * Otherwise, we simulate the EOI message manually by changing the trigger
  * mode to edge and then back to level, with RTE being masked during this.
  */
-void native_eoi_ioapic_pin(int apic, int pin, int vector)
+static void __eoi_ioapic_pin(int apic, int pin, int vector)
 {
if (mpc_ioapic_ver(apic) >= 0x20) {
io_apic_eoi(apic, vector);
@@ -555,19 +555,7 @@ void eoi_ioapic_pin(int vector, struct irq_cfg *cfg)
 
raw_spin_lock_irqsave(_lock, flags);
for_each_irq_pin(entry, cfg->irq_2_pin)
-   native_eoi_ioapic_pin(entry->apic, entry->pin, vector);
-   raw_spin_unlock_irqrestore(_lock, flags);
-}
-
-void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg)
-{
-   struct irq_pin_list *entry;
-   unsigned long flags;
-
-   raw_spin_lock_irqsave(_lock, flags);
-   for_each_irq_pin(entry, cfg->irq_2_pin)
-   x86_io_apic_ops.eoi_ioapic_pin(entry->apic, entry->pin,
-  cfg->vector);
+   __eoi_ioapic_pin(entry->apic, entry->pin, vector);
raw_spin_unlock_irqrestore(_lock, flags);
 }
 
@@ -603,7 +591,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned 
int pin)
ioapic_write_entry(apic, pin, entry);
}
raw_spin_lock_irqsave(_lock, flags);
-   native_eoi_ioapic_pin(apic, pin, entry.vector);
+   __eoi_ioapic_pin(apic, pin, entry.vector);
raw_spin_unlock_irqrestore(_lock, flags);
}
 
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index f7e8eab3a7c4..f612dc018fb6 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -144,5 +144,4 @@ struct x86_io_apic_ops x86_io_apic_ops = {
.write  = native_io_apic_write,
.modify = native_io_apic_modify,
.disable= native_disable_io_apic,
-   .eoi_ioapic_pin = native_eoi_ioapic_pin,
 };
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index 

[Patch Part3 v4 16/38] x86, irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ

2014-11-24 Thread Jiang Liu
There's no user of irq_alloc_hwirqs(), irq_alloc_hwirq(), irq_free_hwirqs()
and irq_free_hwirq() anymore, so kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ and
related code.

Signed-off-by: Jiang Liu 
---
 arch/x86/Kconfig  |1 -
 arch/x86/kernel/apic/vector.c |   34 --
 2 files changed, 35 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e05be74d713d..9d783a729298 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -881,7 +881,6 @@ config X86_UP_IOAPIC
 config X86_LOCAL_APIC
def_bool y
depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC || 
PCI_MSI
-   select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
select IRQ_DOMAIN_HIERARCHY
select PCI_MSI_IRQ_DOMAIN if PCI_MSI
 
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 4b8fad9aa685..31dc4a871673 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -660,40 +660,6 @@ void irq_force_complete_move(int irq)
 }
 #endif
 
-/*
- * Dynamic irq allocate and deallocation. Should be replaced by irq domains!
- */
-int arch_setup_hwirq(unsigned int irq, int node)
-{
-   struct irq_cfg *cfg;
-   unsigned long flags;
-   int ret;
-
-   cfg = alloc_irq_cfg(node);
-   if (!cfg)
-   return -ENOMEM;
-
-   raw_spin_lock_irqsave(_lock, flags);
-   ret = __assign_irq_vector(irq, cfg, apic->target_cpus());
-   raw_spin_unlock_irqrestore(_lock, flags);
-
-   if (!ret)
-   irq_set_chip_data(irq, cfg);
-   else
-   free_irq_cfg(cfg);
-   return ret;
-}
-
-void arch_teardown_hwirq(unsigned int irq)
-{
-   struct irq_cfg *cfg = irq_cfg(irq);
-
-   free_remapped_irq(irq);
-   clear_irq_vector(irq, cfg);
-   irq_set_chip_data(irq, NULL);
-   free_irq_cfg(cfg);
-}
-
 static void __init print_APIC_field(int base)
 {
int i;
-- 
1.7.10.4

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[Patch Part3 v4 13/38] x86, irq: Kill x86_io_apic_ops.setup_entry and related interfaces

2014-11-24 Thread Jiang Liu
Now there is no user of x86_io_apic_ops.setup_entry anymore, so kill it.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h   |4 
 arch/x86/include/asm/irq_remapping.h |   13 -
 arch/x86/include/asm/x86_init.h  |3 ---
 arch/x86/kernel/apic/io_apic.c   |   24 
 arch/x86/kernel/x86_init.c   |1 -
 drivers/iommu/irq_remapping.c|   13 -
 6 files changed, 58 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 8b4fc2d94bc1..0c66c4759987 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -150,9 +150,6 @@ struct irq_cfg;
 extern void ioapic_insert_resources(void);
 extern int arch_early_ioapic_init(void);
 
-extern int native_setup_ioapic_entry(int, struct IO_APIC_route_entry *,
-unsigned int, int,
-struct io_apic_irq_attr *);
 extern void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg);
 
 extern void native_eoi_ioapic_pin(int apic, int pin, int vector);
@@ -289,7 +286,6 @@ static inline void disable_ioapic_support(void) { }
 #define native_io_apic_modify  NULL
 #define native_disable_io_apic NULL
 #define native_ioapic_set_affinity NULL
-#define native_setup_ioapic_entry  NULL
 #define native_eoi_ioapic_pin  NULL
 #endif
 
diff --git a/arch/x86/include/asm/irq_remapping.h 
b/arch/x86/include/asm/irq_remapping.h
index 82507c560589..de8470b6f36a 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -44,11 +44,6 @@ extern int irq_remapping_enable(void);
 extern void irq_remapping_disable(void);
 extern int irq_remapping_reenable(int);
 extern int irq_remap_enable_fault_handling(void);
-extern int setup_ioapic_remapped_entry(int irq,
-  struct IO_APIC_route_entry *entry,
-  unsigned int destination,
-  int vector,
-  struct io_apic_irq_attr *attr);
 extern void free_remapped_irq(int irq);
 extern void panic_if_irq_remap(const char *msg);
 extern bool setup_remapped_irq(int irq,
@@ -82,14 +77,6 @@ static inline int irq_remapping_enable(void) { return 
-ENODEV; }
 static inline void irq_remapping_disable(void) { }
 static inline int irq_remapping_reenable(int eim) { return -ENODEV; }
 static inline int irq_remap_enable_fault_handling(void) { return -ENODEV; }
-static inline int setup_ioapic_remapped_entry(int irq,
- struct IO_APIC_route_entry *entry,
- unsigned int destination,
- int vector,
- struct io_apic_irq_attr *attr)
-{
-   return -ENODEV;
-}
 static inline void free_remapped_irq(int irq) { }
 
 static inline void panic_if_irq_remap(const char *msg)
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 2924bc88034a..0c690574efae 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -194,9 +194,6 @@ struct x86_io_apic_ops {
int (*set_affinity)(struct irq_data *data,
const struct cpumask *mask,
bool force);
-   int (*setup_entry)(int irq, struct IO_APIC_route_entry 
*entry,
-  unsigned int destination, int vector,
-  struct io_apic_irq_attr *attr);
void(*eoi_ioapic_pin)(int apic, int pin, int vector);
 };
 
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 42dc3ee37e89..c862f8299a3f 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1289,30 +1289,6 @@ static inline int IO_APIC_irq_trigger(int irq)
 }
 #endif
 
-int native_setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry,
- unsigned int destination, int vector,
- struct io_apic_irq_attr *attr)
-{
-   memset(entry, 0, sizeof(*entry));
-
-   entry->delivery_mode = apic->irq_delivery_mode;
-   entry->dest_mode = apic->irq_dest_mode;
-   entry->dest  = destination;
-   entry->vector= vector;
-   entry->mask  = 0;   /* enable IRQ */
-   entry->trigger   = attr->trigger;
-   entry->polarity  = attr->polarity;
-
-   /*
-* Mask level triggered irqs.
-* Use IRQ_DELAYED_DISABLE for edge triggered irqs.
-*/
-   if (attr->trigger)
-   entry->mask = 1;
-
-   return 0;
-}
-
 static void __init setup_IO_APIC_irqs(void)
 {
unsigned int ioapic, pin;
diff --git 

[Patch Part3 v4 11/38] x86, irq: Kill unused struct mp_pin_info

2014-11-24 Thread Jiang Liu
Now nobody makes use of struct mp_pin_info, so kill it.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/kernel/apic/io_apic.c |   30 +++---
 1 file changed, 3 insertions(+), 27 deletions(-)

diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 993a0303370f..551108e35cf0 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -88,13 +88,6 @@ struct mp_chip_data {
bool isa_irq;
 };
 
-struct mp_pin_info {
-   int trigger;
-   int polarity;
-   int set;
-   u32 count;
-};
-
 static struct ioapic {
/*
 * # of IRQ routing registers
@@ -110,7 +103,6 @@ static struct ioapic {
struct mp_ioapic_gsi  gsi_config;
struct ioapic_domain_cfg irqdomain_cfg;
struct irq_domain *irqdomain;
-   struct mp_pin_info *pin_info;
struct resource *iomem_res;
 } ioapics[MAX_IO_APICS];
 
@@ -156,11 +148,6 @@ static inline int mp_init_irq_at_boot(int ioapic, int irq)
return ioapic == 0 || (irq >= 0 && irq < nr_legacy_irqs());
 }
 
-static inline struct mp_pin_info *mp_pin_info(int ioapic_idx, int pin)
-{
-   return ioapics[ioapic_idx].pin_info + pin;
-}
-
 static inline struct irq_domain *mp_ioapic_irqdomain(int ioapic)
 {
return ioapics[ioapic].irqdomain;
@@ -2422,7 +2409,6 @@ out:
 
 static int mp_irqdomain_create(int ioapic)
 {
-   size_t size;
struct irq_alloc_info info;
struct irq_domain *parent;
int hwirqs = mp_ioapic_pin_count(ioapic);
@@ -2430,11 +2416,6 @@ static int mp_irqdomain_create(int ioapic)
struct ioapic_domain_cfg *cfg = >irqdomain_cfg;
struct mp_ioapic_gsi *gsi_cfg = mp_ioapic_gsi_routing(ioapic);
 
-   size = sizeof(struct mp_pin_info) * mp_ioapic_pin_count(ioapic);
-   ip->pin_info = kzalloc(size, GFP_KERNEL);
-   if (!ip->pin_info)
-   return -ENOMEM;
-
if (cfg->type == IOAPIC_DOMAIN_INVALID)
return 0;
 
@@ -2447,13 +2428,10 @@ static int mp_irqdomain_create(int ioapic)
 
ip->irqdomain = irq_domain_add_linear(cfg->dev, hwirqs, cfg->ops,
  (void *)(long)ioapic);
-   if (ip->irqdomain) {
-   ip->irqdomain->parent = parent;
-   } else {
-   kfree(ip->pin_info);
-   ip->pin_info = NULL;
+   if (!ip->irqdomain)
return -ENOMEM;
-   }
+
+   ip->irqdomain->parent = parent;
 
if (cfg->type == IOAPIC_DOMAIN_LEGACY ||
cfg->type == IOAPIC_DOMAIN_STRICT)
@@ -2469,8 +2447,6 @@ static void ioapic_destroy_irqdomain(int idx)
irq_domain_remove(ioapics[idx].irqdomain);
ioapics[idx].irqdomain = NULL;
}
-   kfree(ioapics[idx].pin_info);
-   ioapics[idx].pin_info = NULL;
 }
 
 void __init setup_IO_APIC(void)
-- 
1.7.10.4

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[Patch Part3 v4 12/38] x86, irq: Kill x86_io_apic_ops.print_entries and related interfaces

2014-11-24 Thread Jiang Liu
Now there is no user of x86_io_apic_ops.print_entries anymore, so kill
it.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h  |3 --
 arch/x86/include/asm/x86_init.h |1 -
 arch/x86/kernel/apic/io_apic.c  |   55 ---
 arch/x86/kernel/x86_init.c  |1 -
 drivers/iommu/intel_irq_remapping.c |7 -
 5 files changed, 67 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 3162a91f2b3d..8b4fc2d94bc1 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -225,8 +225,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, 
unsigned int reg);
 extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned 
int val);
 extern void native_io_apic_modify(unsigned int apic, unsigned int reg, 
unsigned int val);
 extern void native_disable_io_apic(void);
-extern void native_io_apic_print_entries(unsigned int apic, unsigned int 
nr_entries);
-extern void intel_ir_io_apic_print_entries(unsigned int apic, unsigned int 
nr_entries);
 extern int native_ioapic_set_affinity(struct irq_data *,
  const struct cpumask *,
  bool);
@@ -290,7 +288,6 @@ static inline void disable_ioapic_support(void) { }
 #define native_io_apic_write   NULL
 #define native_io_apic_modify  NULL
 #define native_disable_io_apic NULL
-#define native_io_apic_print_entries   NULL
 #define native_ioapic_set_affinity NULL
 #define native_setup_ioapic_entry  NULL
 #define native_eoi_ioapic_pin  NULL
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 1649bb9ca27c..2924bc88034a 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -191,7 +191,6 @@ struct x86_io_apic_ops {
void(*write)  (unsigned int apic, unsigned int reg, 
unsigned int value);
void(*modify) (unsigned int apic, unsigned int reg, 
unsigned int value);
void(*disable)(void);
-   void(*print_entries)(unsigned int apic, unsigned int 
nr_entries);
int (*set_affinity)(struct irq_data *data,
const struct cpumask *mask,
bool force);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 551108e35cf0..42dc3ee37e89 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1332,61 +1332,6 @@ static void __init setup_IO_APIC_irqs(void)
}
 }
 
-void native_io_apic_print_entries(unsigned int apic, unsigned int nr_entries)
-{
-   int i;
-
-   pr_debug(" NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:\n");
-
-   for (i = 0; i <= nr_entries; i++) {
-   struct IO_APIC_route_entry entry;
-
-   entry = ioapic_read_entry(apic, i);
-
-   pr_debug(" %02x %02X  ", i, entry.dest);
-   pr_cont("%1d%1d%1d   %1d   %1d"
-   "%1d%1d%02X\n",
-   entry.mask,
-   entry.trigger,
-   entry.irr,
-   entry.polarity,
-   entry.delivery_status,
-   entry.dest_mode,
-   entry.delivery_mode,
-   entry.vector);
-   }
-}
-
-void intel_ir_io_apic_print_entries(unsigned int apic,
-   unsigned int nr_entries)
-{
-   int i;
-
-   pr_debug(" NR Indx Fmt Mask Trig IRR Pol Stat Indx2 Zero Vect:\n");
-
-   for (i = 0; i <= nr_entries; i++) {
-   struct IR_IO_APIC_route_entry *ir_entry;
-   struct IO_APIC_route_entry entry;
-
-   entry = ioapic_read_entry(apic, i);
-
-   ir_entry = (struct IR_IO_APIC_route_entry *)
-
-   pr_debug(" %02x %04X ", i, ir_entry->index);
-   pr_cont("%1d   %1d%1d%1d   %1d   "
-   "%1d%1d %X%02X\n",
-   ir_entry->format,
-   ir_entry->mask,
-   ir_entry->trigger,
-   ir_entry->irr,
-   ir_entry->polarity,
-   ir_entry->delivery_status,
-   ir_entry->index2,
-   ir_entry->zero,
-   ir_entry->vector);
-   }
-}
-
 void ioapic_zap_locks(void)
 {
raw_spin_lock_init(_lock);
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index b094d691f2fe..d6f36c7594d7 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -144,7 +144,6 @@ struct x86_io_apic_ops x86_io_apic_ops = {
.write  = native_io_apic_write,
.modify = native_io_apic_modify,

[Patch Part3 v4 14/38] x86, irq: Kill x86_io_apic_ops.set_affinity and related interfaces

2014-11-24 Thread Jiang Liu
Now there is no user of x86_io_apic_ops.set_affinity anymore, so kill
it.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h  |4 
 arch/x86/include/asm/x86_init.h |3 ---
 arch/x86/kernel/apic/io_apic.c  |   25 +
 arch/x86/kernel/x86_init.c  |1 -
 drivers/iommu/irq_remapping.c   |   16 
 5 files changed, 1 insertion(+), 48 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 0c66c4759987..5fba350fec1f 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -222,9 +222,6 @@ extern unsigned int native_io_apic_read(unsigned int apic, 
unsigned int reg);
 extern void native_io_apic_write(unsigned int apic, unsigned int reg, unsigned 
int val);
 extern void native_io_apic_modify(unsigned int apic, unsigned int reg, 
unsigned int val);
 extern void native_disable_io_apic(void);
-extern int native_ioapic_set_affinity(struct irq_data *,
- const struct cpumask *,
- bool);
 
 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
 {
@@ -285,7 +282,6 @@ static inline void disable_ioapic_support(void) { }
 #define native_io_apic_write   NULL
 #define native_io_apic_modify  NULL
 #define native_disable_io_apic NULL
-#define native_ioapic_set_affinity NULL
 #define native_eoi_ioapic_pin  NULL
 #endif
 
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 0c690574efae..f9f83cfabcaa 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -191,9 +191,6 @@ struct x86_io_apic_ops {
void(*write)  (unsigned int apic, unsigned int reg, 
unsigned int value);
void(*modify) (unsigned int apic, unsigned int reg, 
unsigned int value);
void(*disable)(void);
-   int (*set_affinity)(struct irq_data *data,
-   const struct cpumask *mask,
-   bool force);
void(*eoi_ioapic_pin)(int apic, int pin, int vector);
 };
 
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index c862f8299a3f..26fa504b57f6 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1777,29 +1777,6 @@ static void __target_IO_APIC_irq(unsigned int irq, 
unsigned int dest, struct irq
}
 }
 
-int native_ioapic_set_affinity(struct irq_data *data,
-  const struct cpumask *mask,
-  bool force)
-{
-   unsigned int dest, irq = data->irq;
-   unsigned long flags;
-   int ret;
-
-   if (!config_enabled(CONFIG_SMP))
-   return -EPERM;
-
-   raw_spin_lock_irqsave(_lock, flags);
-   ret = apic_set_affinity(data, mask, );
-   if (!ret) {
-   /* Only the high 8 bits are valid. */
-   dest = SET_APIC_LOGICAL_ID(dest);
-   __target_IO_APIC_irq(irq, dest, irqd_cfg(data));
-   ret = IRQ_SET_MASK_OK_NOCOPY;
-   }
-   raw_spin_unlock_irqrestore(_lock, flags);
-   return ret;
-}
-
 atomic_t irq_mis_count;
 
 #ifdef CONFIG_GENERIC_PENDING_IRQ
@@ -2676,7 +2653,7 @@ void __init setup_ioapic_dest(void)
else
mask = apic->target_cpus();
 
-   x86_io_apic_ops.set_affinity(idata, mask, false);
+   irq_set_affinity(irq, mask);
}
 
 }
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 066cdaa6503e..f7e8eab3a7c4 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -144,6 +144,5 @@ struct x86_io_apic_ops x86_io_apic_ops = {
.write  = native_io_apic_write,
.modify = native_io_apic_modify,
.disable= native_disable_io_apic,
-   .set_affinity   = native_ioapic_set_affinity,
.eoi_ioapic_pin = native_eoi_ioapic_pin,
 };
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index 5768652eea57..13243ac9040f 100644
--- a/drivers/iommu/irq_remapping.c
+++ b/drivers/iommu/irq_remapping.c
@@ -26,10 +26,6 @@ int no_x2apic_optout;
 
 static struct irq_remap_ops *remap_ops;
 
-static int set_remapped_irq_affinity(struct irq_data *data,
-const struct cpumask *mask,
-bool force);
-
 static bool irq_remapped(struct irq_cfg *cfg)
 {
return (cfg->remapped == 1);
@@ -62,7 +58,6 @@ static void eoi_ioapic_pin_remapped(int apic, int pin, int 
vector)
 static void __init irq_remapping_modify_x86_ops(void)
 {
x86_io_apic_ops.disable = irq_remapping_disable_io_apic;
-   x86_io_apic_ops.set_affinity= set_remapped_irq_affinity;

[Patch Part3 v4 10/38] x86, irq: Kill unused old IOAPIC irqdomain interfaces

2014-11-24 Thread Jiang Liu
Now we have converted to hierarchy irqdomain, so kill unused old IOAPIC
irqdomain interfaces and code.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h |4 -
 arch/x86/kernel/apic/io_apic.c |  202 +---
 2 files changed, 1 insertion(+), 205 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 073b9c76abcb..3162a91f2b3d 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -204,9 +204,6 @@ extern int mp_register_ioapic(int id, u32 address, u32 
gsi_base,
  struct ioapic_domain_cfg *cfg);
 extern int mp_unregister_ioapic(u32 gsi_base);
 extern int mp_ioapic_registered(u32 gsi_base);
-extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
-   irq_hw_number_t hwirq);
-extern void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq);
 extern int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
  unsigned int nr_irqs, void *arg);
 extern void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,
@@ -218,7 +215,6 @@ extern void mp_irqdomain_deactivate(struct irq_domain 
*domain,
 extern int mp_irqdomain_ioapic_idx(struct irq_domain *domain);
 extern void ioapic_set_alloc_attr(struct irq_alloc_info *info,
  int node, int trigger, int polarity);
-extern int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node);
 
 extern void mp_save_irq(struct mpc_intsrc *m);
 
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 02db6044a384..993a0303370f 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -91,7 +91,6 @@ struct mp_chip_data {
 struct mp_pin_info {
int trigger;
int polarity;
-   int node;
int set;
u32 count;
 };
@@ -1303,30 +1302,6 @@ static inline int IO_APIC_irq_trigger(int irq)
 }
 #endif
 
-static void ioapic_register_intr(unsigned int irq, struct irq_cfg *cfg,
-unsigned long trigger)
-{
-   struct irq_chip *chip = _chip;
-   irq_flow_handler_t hdl;
-   bool fasteoi;
-
-   if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
-   trigger == IOAPIC_LEVEL) {
-   irq_set_status_flags(irq, IRQ_LEVEL);
-   fasteoi = true;
-   } else {
-   irq_clear_status_flags(irq, IRQ_LEVEL);
-   fasteoi = false;
-   }
-
-   if (setup_remapped_irq(irq, cfg, chip))
-   fasteoi = trigger != 0;
-
-   hdl = fasteoi ? handle_fasteoi_irq : handle_edge_irq;
-   irq_set_chip_and_handler_name(irq, chip, hdl,
- fasteoi ? "fasteoi" : "edge");
-}
-
 int native_setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry,
  unsigned int destination, int vector,
  struct io_apic_irq_attr *attr)
@@ -1351,48 +1326,6 @@ int native_setup_ioapic_entry(int irq, struct 
IO_APIC_route_entry *entry,
return 0;
 }
 
-static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,
-   struct io_apic_irq_attr *attr)
-{
-   struct IO_APIC_route_entry entry;
-   unsigned int dest;
-
-   if (!IO_APIC_IRQ(irq))
-   return;
-
-   if (assign_irq_vector(irq, cfg, apic->target_cpus()))
-   return;
-
-   if (apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus(),
-)) {
-   pr_warn("Failed to obtain apicid for ioapic %d, pin %d\n",
-   mpc_ioapic_id(attr->ioapic), attr->ioapic_pin);
-   clear_irq_vector(irq, cfg);
-
-   return;
-   }
-
-   apic_printk(APIC_VERBOSE,KERN_DEBUG
-   "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "
-   "IRQ %d Mode:%i Active:%i Dest:%d)\n",
-   attr->ioapic, mpc_ioapic_id(attr->ioapic), attr->ioapic_pin,
-   cfg->vector, irq, attr->trigger, attr->polarity, dest);
-
-   if (x86_io_apic_ops.setup_entry(irq, , dest, cfg->vector, attr)) {
-   pr_warn("Failed to setup ioapic entry for ioapic  %d, pin %d\n",
-   mpc_ioapic_id(attr->ioapic), attr->ioapic_pin);
-   clear_irq_vector(irq, cfg);
-
-   return;
-   }
-
-   ioapic_register_intr(irq, cfg, attr->trigger);
-   if (irq < nr_legacy_irqs())
-   legacy_pic->mask(irq);
-
-   ioapic_write_entry(attr->ioapic, attr->ioapic_pin, entry);
-}
-
 static void __init setup_IO_APIC_irqs(void)
 {
unsigned int ioapic, pin;
@@ -1412,46 +1345,6 @@ static void __init setup_IO_APIC_irqs(void)
}
 }
 
-/*
- * Set up the timer pin, possibly with the 8259A-master behind.
- */
-static void __init 

[Patch Part3 v4 09/38] x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces

2014-11-24 Thread Jiang Liu
Convert IOAPIC driver to support and use hierarchy irqdomain interfaces.
It's a little big, but it always break bisectings if we split it into
multiple patches.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/kernel/acpi/boot.c|   11 +-
 arch/x86/kernel/apic/io_apic.c |  301 +---
 arch/x86/kernel/devicetree.c   |   37 +--
 arch/x86/kernel/mpparse.c  |6 +-
 arch/x86/pci/intel_mid_pci.c   |2 -
 .../platform/intel-mid/device_libs/platform_wdt.c  |3 +-
 arch/x86/platform/intel-mid/sfi.c  |5 +-
 arch/x86/platform/sfi/sfi.c|5 +-
 8 files changed, 234 insertions(+), 136 deletions(-)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index ca640b1dded6..509a48f49fc7 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -412,11 +412,6 @@ static int mp_register_gsi(struct device *dev, u32 gsi, 
int trigger,
trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1;
polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1;
node = dev ? dev_to_node(dev) : NUMA_NO_NODE;
-   if (mp_set_gsi_attr(gsi, trigger, polarity, node)) {
-   pr_warn("Failed to set pin attr for GSI%d\n", gsi);
-   return -1;
-   }
-
ioapic_set_alloc_attr(, node, trigger, polarity);
irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, );
if (irq < 0)
@@ -442,8 +437,10 @@ static void mp_unregister_gsi(u32 gsi)
 }
 
 static struct irq_domain_ops acpi_irqdomain_ops = {
-   .map = mp_irqdomain_map,
-   .unmap = mp_irqdomain_unmap,
+   .alloc = mp_irqdomain_alloc,
+   .free = mp_irqdomain_free,
+   .activate = mp_irqdomain_activate,
+   .deactivate = mp_irqdomain_deactivate,
 };
 
 static int __init
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 721be8ce77c8..02db6044a384 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -233,7 +233,7 @@ struct irq_pin_list {
 
 static struct irq_pin_list *alloc_irq_pin_list(int node)
 {
-   return kzalloc_node(sizeof(struct irq_pin_list), GFP_KERNEL, node);
+   return kzalloc_node(sizeof(struct irq_pin_list), GFP_ATOMIC, node);
 }
 
 static void alloc_ioapic_saved_registers(int idx)
@@ -562,6 +562,17 @@ void native_eoi_ioapic_pin(int apic, int pin, int vector)
}
 }
 
+void eoi_ioapic_pin(int vector, struct irq_cfg *cfg)
+{
+   unsigned long flags;
+   struct irq_pin_list *entry;
+
+   raw_spin_lock_irqsave(_lock, flags);
+   for_each_irq_pin(entry, cfg->irq_2_pin)
+   native_eoi_ioapic_pin(entry->apic, entry->pin, vector);
+   raw_spin_unlock_irqrestore(_lock, flags);
+}
+
 void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg)
 {
struct irq_pin_list *entry;
@@ -605,9 +616,8 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned 
int pin)
entry.trigger = IOAPIC_LEVEL;
ioapic_write_entry(apic, pin, entry);
}
-
raw_spin_lock_irqsave(_lock, flags);
-   x86_io_apic_ops.eoi_ioapic_pin(apic, pin, entry.vector);
+   native_eoi_ioapic_pin(apic, pin, entry.vector);
raw_spin_unlock_irqrestore(_lock, flags);
}
 
@@ -1021,95 +1031,121 @@ static bool mp_check_pin_attr(int irq, struct 
irq_alloc_info *info)
   data->polarity == info->ioapic_polarity;
 }
 
-static int alloc_irq_from_domain(struct irq_domain *domain, u32 gsi, int pin,
+static int alloc_irq_from_domain(struct irq_domain *domain, int ioapic, u32 
gsi,
 struct irq_alloc_info *info)
 {
+   bool legacy = false;
int irq = -1;
-   int ioapic = mp_irqdomain_ioapic_idx(domain);
int type = ioapics[ioapic].irqdomain_cfg.type;
 
switch (type) {
case IOAPIC_DOMAIN_LEGACY:
/*
-* Dynamically allocate IRQ number for non-ISA IRQs in the 
first 16
-* GSIs on some weird platforms.
+* Dynamically allocate IRQ number for non-ISA IRQs in the first
+* 16 GSIs on some weird platforms.
 */
-   if (gsi < nr_legacy_irqs())
-   irq = irq_create_mapping(domain, pin);
-   else if (irq_create_strict_mappings(domain, gsi, pin, 1) == 0)
+   if (!ioapic_initialized || gsi >= nr_legacy_irqs())
irq = gsi;
+   legacy = irq >= 0 && irq < nr_legacy_irqs();
break;
case IOAPIC_DOMAIN_STRICT:
-   if (irq_create_strict_mappings(domain, gsi, pin, 1) == 0)
-   irq = gsi;
+   irq = gsi;
break;
case IOAPIC_DOMAIN_DYNAMIC:
-   irq = irq_create_mapping(domain, pin);
  

[Patch Part3 v4 04/38] x86, irq: Prepare IOAPIC interfaces to support hierarchy irqdomain

2014-11-24 Thread Jiang Liu
Introduce helper functions to manipulate struct irq_alloc_info for IOAPIC.
Also add extra parameter to IOAPIC interfaces to prepare for hierarchy
irqdomain. Function mp_set_gsi_attr() will be killed once we have
switched to hierarchy irqdomain.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h |   14 ++-
 arch/x86/kernel/acpi/boot.c|9 +++--
 arch/x86/kernel/apic/io_apic.c |   39 +---
 arch/x86/pci/intel_mid_pci.c   |4 +-
 .../platform/intel-mid/device_libs/platform_wdt.c  |4 +-
 arch/x86/platform/intel-mid/sfi.c  |9 +++--
 6 files changed, 56 insertions(+), 23 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 3207143f0a44..cdda8ed7592f 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -95,6 +95,8 @@ struct IR_IO_APIC_route_entry {
index   : 15;
 } __attribute__ ((packed));
 
+struct irq_alloc_info;
+
 #define IOAPIC_AUTO -1
 #define IOAPIC_EDGE 0
 #define IOAPIC_LEVEL1
@@ -194,7 +196,8 @@ extern u32 gsi_top;
 extern int mp_find_ioapic(u32 gsi);
 extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
 extern u32 mp_pin_to_gsi(int ioapic, int pin);
-extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags);
+extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags,
+struct irq_alloc_info *info);
 extern void mp_unmap_irq(int irq);
 extern int mp_register_ioapic(int id, u32 address, u32 gsi_base,
  struct ioapic_domain_cfg *cfg);
@@ -203,6 +206,8 @@ extern int mp_ioapic_registered(u32 gsi_base);
 extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
irq_hw_number_t hwirq);
 extern void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq);
+extern void ioapic_set_alloc_attr(struct irq_alloc_info *info,
+ int node, int trigger, int polarity);
 extern int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node);
 
 extern void mp_save_irq(struct mpc_intsrc *m);
@@ -253,7 +258,12 @@ static inline void print_IO_APICs(void) {}
 #define gsi_top (NR_IRQS_LEGACY)
 static inline int mp_find_ioapic(u32 gsi) { return 0; }
 static inline u32 mp_pin_to_gsi(int ioapic, int pin) { return UINT_MAX; }
-static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags) { return gsi; 
}
+static inline int mp_map_gsi_to_irq(u32 gsi, unsigned int flags,
+   struct irq_alloc_info *info)
+{
+   return gsi;
+}
+
 static inline void mp_unmap_irq(int irq) { }
 
 static inline int save_ioapic_entries(void)
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 4433a4be8171..ca640b1dded6 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -404,6 +404,7 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int 
trigger,
   int polarity)
 {
int irq, node;
+   struct irq_alloc_info info;
 
if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
return gsi;
@@ -416,7 +417,8 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int 
trigger,
return -1;
}
 
-   irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC);
+   ioapic_set_alloc_attr(, node, trigger, polarity);
+   irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, );
if (irq < 0)
return irq;
 
@@ -434,7 +436,7 @@ static void mp_unregister_gsi(u32 gsi)
if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
return;
 
-   irq = mp_map_gsi_to_irq(gsi, 0);
+   irq = mp_map_gsi_to_irq(gsi, 0, NULL);
if (irq > 0)
mp_unmap_irq(irq);
 }
@@ -618,7 +620,8 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
} else {
mutex_lock(_ioapic_lock);
irq = mp_map_gsi_to_irq(gsi,
-   IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK);
+   IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK,
+   NULL);
mutex_unlock(_ioapic_lock);
if (irq < 0)
return -1;
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 919afe772347..8b3b8560ebda 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -938,7 +938,19 @@ static int irq_trigger(int idx)
return trigger;
 }
 
-static int alloc_irq_from_domain(struct irq_domain *domain, u32 gsi, int pin)
+void ioapic_set_alloc_attr(struct irq_alloc_info *info, int node,
+  int trigger, int polarity)
+{
+   init_irq_alloc_info(info, NULL);
+   info->type = X86_IRQ_ALLOC_TYPE_IOAPIC;
+   info->ioapic_node = node;
+   info->ioapic_trigger = 

[Patch Part3 v4 08/38] x86, irq: Introduce helper functions to support hierarchy irqdomain for IOAPIC

2014-11-24 Thread Jiang Liu
Introduce several helper functions, which will be used to enable
hierarchy irqdomain for IOAPIC.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/kernel/apic/io_apic.c |   59 
 1 file changed, 59 insertions(+)

diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index b2618d48d572..721be8ce77c8 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -67,6 +67,8 @@
 #define for_each_irq_pin(entry, head) \
list_for_each_entry(entry, , list)
 
+int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity);
+
 /*
  *  Is the SiS APIC rmw bug present ?
  *  -1 = don't know, 0 = no, 1 = yes
@@ -82,6 +84,7 @@ struct mp_chip_data {
struct IO_APIC_route_entry entry;
int trigger;
int polarity;
+   u32 count;
bool isa_irq;
 };
 
@@ -945,6 +948,42 @@ void ioapic_set_alloc_attr(struct irq_alloc_info *info, 
int node,
info->ioapic_valid = 1;
 }
 
+static void ioapic_copy_alloc_attr(struct irq_alloc_info *dst,
+  struct irq_alloc_info *src,
+  u32 gsi, int ioapic_idx, int pin)
+{
+   int trigger, polarity;
+
+   copy_irq_alloc_info(dst, src);
+   dst->type = X86_IRQ_ALLOC_TYPE_IOAPIC;
+   dst->ioapic_id = mpc_ioapic_id(ioapic_idx);
+   dst->ioapic_pin = pin;
+   dst->ioapic_valid = 1;
+   if (src && src->ioapic_valid) {
+   dst->ioapic_node = src->ioapic_node;
+   dst->ioapic_trigger = src->ioapic_trigger;
+   dst->ioapic_polarity = src->ioapic_polarity;
+   } else {
+   dst->ioapic_node = NUMA_NO_NODE;
+   if (acpi_get_override_irq(gsi, , ) >= 0) {
+   dst->ioapic_trigger = trigger;
+   dst->ioapic_polarity = polarity;
+   } else {
+   /*
+* PCI interrupts are always polarity one level
+* triggered.
+*/
+   dst->ioapic_trigger = 1;
+   dst->ioapic_polarity = 1;
+   }
+   }
+}
+
+static int ioapic_alloc_attr_node(struct irq_alloc_info *info)
+{
+   return (info && info->ioapic_valid) ? info->ioapic_node : NUMA_NO_NODE;
+}
+
 static void mp_register_handler(unsigned int irq, unsigned long trigger)
 {
irq_flow_handler_t hdl;
@@ -962,6 +1001,26 @@ static void mp_register_handler(unsigned int irq, 
unsigned long trigger)
__irq_set_handler(irq, hdl, 0, fasteoi ? "fasteoi" : "edge");
 }
 
+static bool mp_check_pin_attr(int irq, struct irq_alloc_info *info)
+{
+   struct mp_chip_data *data = irq_get_chip_data(irq);
+
+   /*
+* setup_IO_APIC_irqs() programs all legacy IRQs with default trigger
+* and polarity attirbutes. So allow the first user to reprogram the
+* pin with real trigger and polarity attributes.
+*/
+   if (irq < nr_legacy_irqs() && data->count == 1) {
+   if (info->ioapic_trigger != data->trigger)
+   mp_register_handler(irq, data->trigger);
+   data->entry.trigger = data->trigger = info->ioapic_trigger;
+   data->entry.polarity = data->polarity = info->ioapic_polarity;
+   }
+
+   return data->trigger == info->ioapic_trigger &&
+  data->polarity == info->ioapic_polarity;
+}
+
 static int alloc_irq_from_domain(struct irq_domain *domain, u32 gsi, int pin,
 struct irq_alloc_info *info)
 {
-- 
1.7.10.4

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[Patch Part3 v4 05/38] x86, irq: Implement callbacks to enable hierarchy irqdomain on IOAPICs

2014-11-24 Thread Jiang Liu
Implement required callbacks to prepare for enabling hierarchy irqdomain
on IOAPICs. Later we will clean up IOAPIC code a lot by using hierarchy
irqdomain framework.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/include/asm/io_apic.h |   10 +++
 arch/x86/kernel/apic/io_apic.c |  159 +++-
 2 files changed, 166 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index cdda8ed7592f..073b9c76abcb 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -96,6 +96,7 @@ struct IR_IO_APIC_route_entry {
 } __attribute__ ((packed));
 
 struct irq_alloc_info;
+struct irq_data;
 
 #define IOAPIC_AUTO -1
 #define IOAPIC_EDGE 0
@@ -206,6 +207,15 @@ extern int mp_ioapic_registered(u32 gsi_base);
 extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
irq_hw_number_t hwirq);
 extern void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq);
+extern int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
+ unsigned int nr_irqs, void *arg);
+extern void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,
+ unsigned int nr_irqs);
+extern void mp_irqdomain_activate(struct irq_domain *domain,
+ struct irq_data *irq_data);
+extern void mp_irqdomain_deactivate(struct irq_domain *domain,
+   struct irq_data *irq_data);
+extern int mp_irqdomain_ioapic_idx(struct irq_domain *domain);
 extern void ioapic_set_alloc_attr(struct irq_alloc_info *info,
  int node, int trigger, int polarity);
 extern int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 8b3b8560ebda..e465171bcbf3 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -78,6 +78,13 @@ static DEFINE_MUTEX(ioapic_mutex);
 static unsigned int ioapic_dynirq_base;
 static int ioapic_initialized;
 
+struct mp_chip_data {
+   struct IO_APIC_route_entry entry;
+   int trigger;
+   int polarity;
+   bool isa_irq;
+};
+
 struct mp_pin_info {
int trigger;
int polarity;
@@ -949,11 +956,28 @@ void ioapic_set_alloc_attr(struct irq_alloc_info *info, 
int node,
info->ioapic_valid = 1;
 }
 
+static void mp_register_handler(unsigned int irq, unsigned long trigger)
+{
+   irq_flow_handler_t hdl;
+   bool fasteoi;
+
+   if (trigger) {
+   irq_set_status_flags(irq, IRQ_LEVEL);
+   fasteoi = true;
+   } else {
+   irq_clear_status_flags(irq, IRQ_LEVEL);
+   fasteoi = false;
+   }
+
+   hdl = fasteoi ? handle_fasteoi_irq : handle_edge_irq;
+   __irq_set_handler(irq, hdl, 0, fasteoi ? "fasteoi" : "edge");
+}
+
 static int alloc_irq_from_domain(struct irq_domain *domain, u32 gsi, int pin,
 struct irq_alloc_info *info)
 {
int irq = -1;
-   int ioapic = (int)(long)domain->host_data;
+   int ioapic = mp_irqdomain_ioapic_idx(domain);
int type = ioapics[ioapic].irqdomain_cfg.type;
 
switch (type) {
@@ -3026,7 +3050,7 @@ static inline void set_io_apic_irq_attr(struct 
io_apic_irq_attr *irq_attr,
 int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
 irq_hw_number_t hwirq)
 {
-   int ioapic = (int)(long)domain->host_data;
+   int ioapic = mp_irqdomain_ioapic_idx(domain);
struct mp_pin_info *info = mp_pin_info(ioapic, hwirq);
struct io_apic_irq_attr attr;
 
@@ -3064,7 +3088,7 @@ void mp_irqdomain_unmap(struct irq_domain *domain, 
unsigned int virq)
 {
struct irq_data *data = irq_get_irq_data(virq);
struct irq_cfg *cfg = irq_cfg(virq);
-   int ioapic = (int)(long)domain->host_data;
+   int ioapic = mp_irqdomain_ioapic_idx(domain);
int pin = (int)data->hwirq;
 
ioapic_mask_entry(ioapic, pin);
@@ -3073,6 +3097,130 @@ void mp_irqdomain_unmap(struct irq_domain *domain, 
unsigned int virq)
arch_teardown_hwirq(virq);
 }
 
+static void mp_irqdomain_get_attr(u32 gsi, struct mp_chip_data *data,
+struct irq_alloc_info *info)
+{
+   if (info && info->ioapic_valid) {
+   data->trigger = info->ioapic_trigger;
+   data->polarity = info->ioapic_polarity;
+   } else if (acpi_get_override_irq(gsi, >trigger,
+>polarity) < 0) {
+   /* PCI interrupts are always polarity one level triggered. */
+   data->trigger = 1;
+   data->polarity = 1;
+   }
+}
+
+static void mp_setup_entry(struct irq_cfg *cfg, struct mp_chip_data *data,
+  struct IO_APIC_route_entry *entry)
+{
+   

[Patch Part3 v4 06/38] x86, irq: Refine the way to allocate irq_cfg for legacy IRQs

2014-11-24 Thread Jiang Liu
To support legacy ISA IRQs, we need to preallocate irq_cfg structures
for legacy ISA IRQs. Refine the way to allocate irq_cfg for legacy ISA
IRQs, so it's more friend to hierarchy irqdomain implementation.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/kernel/apic/io_apic.c |   13 +
 arch/x86/kernel/apic/vector.c  |   42 +++-
 2 files changed, 42 insertions(+), 13 deletions(-)

diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index e465171bcbf3..74a0e95cfb3d 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -254,8 +254,7 @@ static void free_ioapic_saved_registers(int idx)
 
 int __init arch_early_ioapic_init(void)
 {
-   struct irq_cfg *cfg;
-   int i, node = cpu_to_node(0);
+   int i;
 
if (!nr_legacy_irqs())
io_apic_irqs = ~0UL;
@@ -263,16 +262,6 @@ int __init arch_early_ioapic_init(void)
for_each_ioapic(i)
alloc_ioapic_saved_registers(i);
 
-   /*
-* For legacy IRQ's, start with assigning irq0 to irq15 to
-* IRQ0_VECTOR to IRQ15_VECTOR for all cpu's.
-*/
-   for (i = 0; i < nr_legacy_irqs(); i++) {
-   cfg = alloc_irq_and_cfg_at(i, node);
-   cfg->vector = IRQ0_VECTOR + i;
-   cpumask_setall(cfg->domain);
-   }
-
return 0;
 }
 
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 609db1910fd3..4b8fad9aa685 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -24,6 +24,9 @@
 struct irq_domain *x86_vector_domain;
 static DEFINE_RAW_SPINLOCK(vector_lock);
 static struct irq_chip lapic_controller;
+#ifdef CONFIG_X86_IO_APIC
+static struct irq_cfg *legacy_irq_cfgs[NR_IRQS_LEGACY];
+#endif
 
 void lock_vector_lock(void)
 {
@@ -283,6 +286,10 @@ static void x86_vector_free_irqs(struct irq_domain *domain,
free_remapped_irq(virq);
clear_irq_vector(virq + i, irq_data->chip_data);
free_irq_cfg(irq_data->chip_data);
+#ifdef CONFIG_X86_IO_APIC
+   if (virq + i < nr_legacy_irqs())
+   legacy_irq_cfgs[virq + i] = NULL;
+#endif
irq_domain_reset_irq_data(irq_data);
}
}
@@ -308,7 +315,12 @@ static int x86_vector_alloc_irqs(struct irq_domain 
*domain, unsigned int virq,
for (i = 0; i < nr_irqs; i++) {
irq_data = irq_domain_get_irq_data(domain, virq + i);
BUG_ON(!irq_data);
-   cfg = alloc_irq_cfg(irq_data->node);
+#ifdef CONFIG_X86_IO_APIC
+   if (virq + i < nr_legacy_irqs() && legacy_irq_cfgs[virq + i])
+   cfg = legacy_irq_cfgs[virq + i];
+   else
+#endif
+   cfg = alloc_irq_cfg(irq_data->node);
if (!cfg) {
err = -ENOMEM;
goto error;
@@ -357,8 +369,36 @@ int __init arch_probe_nr_irqs(void)
return nr_legacy_irqs();
 }
 
+#ifdef CONFIG_X86_IO_APIC
+static void init_legacy_irqs(void)
+{
+   int i, node = cpu_to_node(0);
+   struct irq_cfg *cfg;
+
+   /*
+* For legacy IRQ's, start with assigning irq0 to irq15 to
+* IRQ0_VECTOR to IRQ15_VECTOR for all cpu's.
+*/
+   for (i = 0; i < nr_legacy_irqs(); i++) {
+   cfg = legacy_irq_cfgs[i] = alloc_irq_cfg(node);
+   BUG_ON(!cfg);
+   /*
+* For legacy IRQ's, start with assigning irq0 to irq15 to
+* IRQ0_VECTOR to IRQ15_VECTOR for all cpu's.
+*/
+   cfg->vector = IRQ0_VECTOR + i;
+   cpumask_setall(cfg->domain);
+   irq_set_chip_data(i, cfg);
+   }
+}
+#else
+static void init_legacy_irqs(void) { }
+#endif
+
 int __init arch_early_irq_init(void)
 {
+   init_legacy_irqs();
+
x86_vector_domain = irq_domain_add_tree(NULL, _vector_domain_ops,
NULL);
BUG_ON(x86_vector_domain == NULL);
-- 
1.7.10.4

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[Patch Part3 v4 07/38] x86, irq: Simplify the way to print IOAPIC entry

2014-11-24 Thread Jiang Liu
Simplify the way to print IOAPIC entry content, so we could kill
native_io_apic_print_entries(), intel_ir_io_apic_print_entries()
and x86_io_apic_ops.print_entries() later.

Signed-off-by: Jiang Liu 
Tested-by: Joerg Roedel 
---
 arch/x86/kernel/apic/io_apic.c |   30 --
 1 file changed, 28 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 74a0e95cfb3d..b2618d48d572 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1424,6 +1424,33 @@ void ioapic_zap_locks(void)
raw_spin_lock_init(_lock);
 }
 
+static void io_apic_print_entries(unsigned int apic, unsigned int nr_entries)
+{
+   int i;
+   char buf[256];
+   struct IO_APIC_route_entry entry;
+   struct IR_IO_APIC_route_entry *ir_entry = (void *)
+
+   printk(KERN_DEBUG "IOAPIC %d:\n", apic);
+   for (i = 0; i <= nr_entries; i++) {
+   entry = ioapic_read_entry(apic, i);
+   snprintf(buf, sizeof(buf),
+" pin%02x, %s, %s, %s, V(%02X), IRR(%1d), S(%1d)",
+i, entry.mask ? "enabled" : "disabled",
+entry.trigger ? "level" : "edge",
+entry.polarity ? "high" : "low",
+entry.vector, entry.irr, entry.delivery_status);
+   if (ir_entry->format)
+   printk(KERN_DEBUG "%s, remapped, I(%04X),  Z(%X)\n",
+  buf, (ir_entry->index << 15) | ir_entry->index,
+  ir_entry->zero);
+   else
+   printk(KERN_DEBUG "%s, %s, D(%02X), M(%1d)\n",
+  buf, entry.dest_mode ? "logical" : "physical",
+  entry.dest, entry.delivery_mode);
+   }
+}
+
 static void __init print_IO_APIC(int ioapic_idx)
 {
union IO_APIC_reg_00 reg_00;
@@ -1477,8 +1504,7 @@ static void __init print_IO_APIC(int ioapic_idx)
}
 
printk(KERN_DEBUG " IRQ redirection table:\n");
-
-   x86_io_apic_ops.print_entries(ioapic_idx, reg_01.bits.entries);
+   io_apic_print_entries(ioapic_idx, reg_01.bits.entries);
 }
 
 void __init print_IO_APICs(void)
-- 
1.7.10.4

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Re: Using kernel filesystems as userland libraries

2014-11-24 Thread xun ni
Hi, George:

   is there any reason to do this? we still need to copy files from
userspace to kernel.

Thanks,
Xun

2014-11-24 21:12 GMT+08:00 Nicolas George :
> Hi.
>
> With the libraries present in e2fsprogs, it is possible to open a plain file
> (or any other reasonable storage) as an EXT2 filesystem and manipulate files
> inside it.
>
> Is it possible to use the implementations in the kernel to do the same thing
> with any supported normal filesystem?
>
> Obviously, it is theoretically possible, but my question is whether it has
> been done in practice. I suppose it would require writing userland
> replacement for the kernel APIs (memory management, access to block devices,
> scheduling) and either rebuilding the kernel source as userland code or
> loading the modules directly.
>
> Regards,
>
> --
>   Nicolas George
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[Patch Part3 v4 02/38] x86, intel-mid, trivial: Refine code syntax for sfi_parse_mtmr()

2014-11-24 Thread Jiang Liu
Correctly indent code in function sfi_parse_mtmr().

Signed-off-by: Jiang Liu 
Tested-by: Andy Shevchenko 
---
 arch/x86/platform/intel-mid/sfi.c |   20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/x86/platform/intel-mid/sfi.c 
b/arch/x86/platform/intel-mid/sfi.c
index aa59f88868f8..9a16749935d4 100644
--- a/arch/x86/platform/intel-mid/sfi.c
+++ b/arch/x86/platform/intel-mid/sfi.c
@@ -95,16 +95,16 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table)
pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n",
totallen, (u32)pentry->phys_addr,
pentry->freq_hz, pentry->irq);
-   mp_irq.type = MP_INTSRC;
-   mp_irq.irqtype = mp_INT;
-/* triggering mode edge bit 2-3, active high polarity bit 0-1 */
-   mp_irq.irqflag = 5;
-   mp_irq.srcbus = MP_BUS_ISA;
-   mp_irq.srcbusirq = pentry->irq; /* IRQ */
-   mp_irq.dstapic = MP_APIC_ALL;
-   mp_irq.dstirq = pentry->irq;
-   mp_save_irq(_irq);
-   mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC);
+   mp_irq.type = MP_INTSRC;
+   mp_irq.irqtype = mp_INT;
+   /* triggering mode edge bit 2-3, active high polarity bit 0-1 */
+   mp_irq.irqflag = 5;
+   mp_irq.srcbus = MP_BUS_ISA;
+   mp_irq.srcbusirq = pentry->irq; /* IRQ */
+   mp_irq.dstapic = MP_APIC_ALL;
+   mp_irq.dstirq = pentry->irq;
+   mp_save_irq(_irq);
+   mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC);
}
 
return 0;
-- 
1.7.10.4

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[Patch Part3 v4 01/38] x86, intel-mid: Delay initialization of APB timer

2014-11-24 Thread Jiang Liu
From: Thomas Gleixner 

MID has no PIC, but depending on the platform it requires the
abt_timer, which is connected to irq0. The timer is set up at
late_time_init().

But, looking at the MID code it seems, that there is no reason to do
so. The only code which might need the timer working is the TSC
calibration code, but thats a non issue on MID as that is using its
own empty calibration function. And check_timer() is not invoked
either because MID has no PIC and therefor no legacy irqs.

So if you look at intel_mid_time_init() then you'll see that in the
ARAT case the timer setup is skipped already. So until the point where
x86_init.timers.setup_percpu_clockev() is called for the boot cpu
nothing really needs a timer on MID.

According to the MID code the apbt horror is only used for moorestown.
Medfield and later use the local apic timer without the apbt nonsense.

The best thing we can do is to drop moorestown support and get rid of
that apbt nonsense alltogether.

I don't think anyone deeply cares about it not being supported from
3.18 on. The number of devices which sport a moorestown should be
pretty limited and the only relevant use case of those is to act as a
pocket heater with short battery life time. Its pretty pointless to
update kernels on pocket heaters except for bragging reasons.

If someone at Intel really thinks that we need to keep moorestown
alive for other than documentary and sentimental reasons, then we can
move the apbt setup to x86_init.timers.setup_percpu_clockev(). At that
point the IOAPIC is setup already, so it should just work.

Signed-off-by: Thomas Gleixner 
Signed-off-by: Jiang Liu 
Tested-by: Andy Shevchenko 
---
 arch/x86/kernel/apb_timer.c |4 
 arch/x86/platform/intel-mid/intel-mid.c |   18 +-
 arch/x86/platform/intel-mid/sfi.c   |2 --
 3 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c
index b708738d016e..7cfdc5467922 100644
--- a/arch/x86/kernel/apb_timer.c
+++ b/arch/x86/kernel/apb_timer.c
@@ -179,10 +179,6 @@ static int __init apbt_clockevent_register(void)
 
 static void apbt_setup_irq(struct apbt_dev *adev)
 {
-   /* timer0 irq has been setup early */
-   if (adev->irq == 0)
-   return;
-
irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT);
irq_set_affinity(adev->irq, cpumask_of(adev->cpu));
 }
diff --git a/arch/x86/platform/intel-mid/intel-mid.c 
b/arch/x86/platform/intel-mid/intel-mid.c
index 1bbedc4b0f88..d8e23a622a33 100644
--- a/arch/x86/platform/intel-mid/intel-mid.c
+++ b/arch/x86/platform/intel-mid/intel-mid.c
@@ -81,26 +81,34 @@ static unsigned long __init intel_mid_calibrate_tsc(void)
return 0;
 }
 
+static void __init intel_mid_setup_bp_timer(void)
+{
+   apbt_time_init();
+   setup_boot_APIC_clock();
+}
+
 static void __init intel_mid_time_init(void)
 {
sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr);
+
switch (intel_mid_timer_options) {
case INTEL_MID_TIMER_APBT_ONLY:
break;
case INTEL_MID_TIMER_LAPIC_APBT:
-   x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;
+   /* Use apbt and local apic */
+   x86_init.timers.setup_percpu_clockev = intel_mid_setup_bp_timer;
x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;
-   break;
+   return;
default:
if (!boot_cpu_has(X86_FEATURE_ARAT))
break;
+   /* Lapic only, no apbt */
x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;
x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;
return;
}
-   /* we need at least one APB timer */
-   pre_init_apic_IRQ0();
-   apbt_time_init();
+
+   x86_init.timers.setup_percpu_clockev = apbt_time_init;
 }
 
 static void intel_mid_arch_setup(void)
diff --git a/arch/x86/platform/intel-mid/sfi.c 
b/arch/x86/platform/intel-mid/sfi.c
index c14ad34776c4..aa59f88868f8 100644
--- a/arch/x86/platform/intel-mid/sfi.c
+++ b/arch/x86/platform/intel-mid/sfi.c
@@ -95,8 +95,6 @@ int __init sfi_parse_mtmr(struct sfi_table_header *table)
pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n",
totallen, (u32)pentry->phys_addr,
pentry->freq_hz, pentry->irq);
-   if (!pentry->irq)
-   continue;
mp_irq.type = MP_INTSRC;
mp_irq.irqtype = mp_INT;
 /* triggering mode edge bit 2-3, active high polarity bit 0-1 */
-- 
1.7.10.4

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[Patch Part3 v4 00/38] Enable hierarchy irqdomian on x86 platforms

2014-11-24 Thread Jiang Liu
This is the last part to enable support of hierarchy domain on x86
platforms.

It first converts IOAPIC to support hierarchy irqdomain, then cleans
up all unused code and interfaces. It also introduces a kernel boot
parameter to configure CPU vector allocation policies.

It's based on my previous patch set at:
http://lkml.org/lkml/2014/11/25/10
And you may access it at:
https://github.com/jiangliu/linux.git irqdomain/p3v4

It has been tested on Intel 64-bit server and 32-bit laptop. Joerg has
helped to test on AMD platforms. It also passes Fengguang's 0day tests.
Helps are welcomed for testing:
1) Intel MID platform
2) Intel CE or OLPC platforms

Patch 1-3 kills pre_init_apic_IRQ0().
Patch 4-9 convert IOAPIC to use hierarch irqdomain
Patch 10-36 clean up code, unused interfaces etc.
Patch 37-38 introduces a mechanism to configure CPU vector allocation
policies.

V3->V4:
1) Rebase onto latest prerequisition patch sets

Jiang Liu (37):
  x86, intel-mid, trivial: Refine code syntax for sfi_parse_mtmr()
  x86, irq: Kill unused pre_init_apic_IRQ0()
  x86, irq: Prepare IOAPIC interfaces to support hierarchy irqdomain
  x86, irq: Implement callbacks to enable hierarchy irqdomain on
IOAPICs
  x86, irq: Refine the way to allocate irq_cfg for legacy IRQs
  x86, irq: Simplify the way to print IOAPIC entry
  x86, irq: Introduce helper functions to support hierarchy irqdomain
for IOAPIC
  x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces
  x86, irq: Kill unused old IOAPIC irqdomain interfaces
  x86, irq: Kill unused struct mp_pin_info
  x86, irq: Kill x86_io_apic_ops.print_entries and related interfaces
  x86, irq: Kill x86_io_apic_ops.setup_entry and related interfaces
  x86, irq: Kill x86_io_apic_ops.set_affinity and related interfaces
  x86, irq: Kill x86_io_apic_ops.eoi_ioapic_pin and related interfaces
  x86, irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
  x86: Clean up unused forward declarations in x86_init.h
  x86: irq_remapping: Clean up unsued code
  iommu/vt-d: Clean up unsued code
  iommu/amd: Clean up unsued code
  x86: irq_remapping: Clean up unused interfaces
  x86, irq: Kill irq_cfg.irq_remapped
  iommu/vt-d: Move struct irq_2_iommu into intel_irq_remapping.c
  iommu/amd: Move struct irq_2_irte into amd_iommu.c
  x86, irq: Move irq_cfg.irq_2_pin into io_apic.c
  x86, irq: Kill struct io_apic_irq_attr
  x86, irq: Kill x86_io_apic_ops.write and x86_io_apic_ops.modify
  x86, irq: Clean up io_apic.h
  x86, irq: Use cached IOAPIC entry instead of reading from hardware
  x86, irq: Kill unused alloc_irq_and_cfg_at()
  x86, irq: Change functions only used in vector.c as static
  x86, irq: Kill function apic_set_affinity()
  x86, irq: Move check of cfg->move_in_progress into
send_cleanup_vector()
  x86, irq: Move private data in struct irq_cfg into dedicated data
structure
  x86, irq: Refine the way to calculate NR_IRQS
  ACPI, irq, x86: Kill private function mp_register_gsi()/
mp_unregister_gsi()
  x86, irq: Introduce mechanism to support different vector allocation
policies
  x86, irq: Add kernel parameter vector_alloc to set CPU vector
allocation policy

Thomas Gleixner (1):
  x86, intel-mid: Delay initialization of APB timer

 Documentation/kernel-parameters.txt|6 +
 arch/x86/Kconfig   |1 -
 arch/x86/include/asm/hw_irq.h  |   51 +-
 arch/x86/include/asm/io_apic.h |   81 +-
 arch/x86/include/asm/irq_remapping.h   |   36 -
 arch/x86/include/asm/irq_vectors.h |   18 +-
 arch/x86/include/asm/x86_init.h|   16 -
 arch/x86/kernel/acpi/boot.c|   69 +-
 arch/x86/kernel/apb_timer.c|4 -
 arch/x86/kernel/apic/io_apic.c | 1071 +---
 arch/x86/kernel/apic/vector.c  |  416 
 arch/x86/kernel/devicetree.c   |   37 +-
 arch/x86/kernel/mpparse.c  |6 +-
 arch/x86/kernel/x86_init.c |6 -
 arch/x86/pci/intel_mid_pci.c   |6 +-
 .../platform/intel-mid/device_libs/platform_wdt.c  |5 +-
 arch/x86/platform/intel-mid/intel-mid.c|   18 +-
 arch/x86/platform/intel-mid/sfi.c  |   30 +-
 arch/x86/platform/sfi/sfi.c|5 +-
 arch/x86/platform/uv/uv_irq.c  |3 +-
 drivers/iommu/amd_iommu.c  |  153 +--
 drivers/iommu/intel_irq_remapping.c|  206 +---
 drivers/iommu/irq_remapping.c  |   84 --
 drivers/iommu/irq_remapping.h  |   16 -
 24 files changed, 874 insertions(+), 1470 deletions(-)

-- 
1.7.10.4

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[Patch Part3 v4 03/38] x86, irq: Kill unused pre_init_apic_IRQ0()

2014-11-24 Thread Jiang Liu
Now there's no user of pre_init_apic_IRQ0(), so kill it.

Signed-off-by: Jiang Liu 
Tested-by: Andy Shevchenko 
---
 arch/x86/include/asm/io_apic.h |1 -
 arch/x86/kernel/apic/io_apic.c |   17 -
 2 files changed, 18 deletions(-)

diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index bf006cce9418..3207143f0a44 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -204,7 +204,6 @@ extern int mp_irqdomain_map(struct irq_domain *domain, 
unsigned int virq,
irq_hw_number_t hwirq);
 extern void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq);
 extern int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, int node);
-extern void __init pre_init_apic_IRQ0(void);
 
 extern void mp_save_irq(struct mpc_intsrc *m);
 
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 51936be8ab13..919afe772347 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3088,20 +3088,3 @@ int mp_set_gsi_attr(u32 gsi, int trigger, int polarity, 
int node)
 
return ret;
 }
-
-/* Enable IOAPIC early just for system timer */
-void __init pre_init_apic_IRQ0(void)
-{
-   struct io_apic_irq_attr attr = { 0, 0, 0, 0 };
-
-   printk(KERN_INFO "Early APIC setup for system timer0\n");
-#ifndef CONFIG_SMP
-   physid_set_mask_of_physid(boot_cpu_physical_apicid,
-_cpu_present_map);
-#endif
-   setup_local_APIC();
-
-   io_apic_setup_irq_pin(0, 0, );
-   irq_set_chip_and_handler_name(0, _chip, handle_edge_irq,
- "edge");
-}
-- 
1.7.10.4

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Re: [PATCH v4 4/6] hw_random: fix unregister race.

2014-11-24 Thread Amos Kong
On Wed, Nov 12, 2014 at 02:33:00PM +1030, Rusty Russell wrote:
> Amos Kong  writes:
> > From: Rusty Russell 
> >
> > The previous patch added one potential problem: we can still be
> > reading from a hwrng when it's unregistered.  Add a wait for zero
> > in the hwrng_unregister path.
> >
> > v4: add cleanup_done flag to insure that cleanup is done
> 
> That's a bit weird.  The usual pattern would be to hold a reference
> until we're actually finished, but this reference is a bit weird.

The cleanup function is a callback function of kref_put(), we can't
use the same reference count inside cleanup function.
 
> We hold the mutex across cleanup, so we could grab that but we have to
> take care sleeping inside wait_event, otherwise Peter will have to fix
> my code again :)

We didn't hold rng_mutex inside cleanup_rng(), am I missing something?
 
> AFAICT the wake_woken() stuff isn't merged yet, so your patch will
> have to do for now.

Can you provide some patches/mail link here? I searched nothing about 
wake_woken.
 
> > @@ -98,6 +99,8 @@ static inline void cleanup_rng(struct kref *kref)
> >  
> > if (rng->cleanup)
> > rng->cleanup(rng);
> > +   rng->cleanup_done = true;
> > +   wake_up_all(_done);
> >  }
> >  
> >  static void set_current_rng(struct hwrng *rng)
> > @@ -536,6 +539,11 @@ void hwrng_unregister(struct hwrng *rng)
> > kthread_stop(hwrng_fill);
> > } else
> > mutex_unlock(_mutex);
> > +
> > +   /* Just in case rng is reading right now, wait. */
> > +   wait_event(rng_done, rng->cleanup_done &&
> > +  atomic_read(>ref.refcount) == 0);
> > +
> 
> The atomic_read() isn't necessary here.
> 
> However, you should probably init cleanup_done in hwrng_register().
> (Probably noone does unregister then register, but let's be clear).

Got it.
 
> Thanks,
> Rusty.
> 
> >  }
> >  EXPORT_SYMBOL_GPL(hwrng_unregister);
> >  
> > diff --git a/include/linux/hw_random.h b/include/linux/hw_random.h
> > index c212e71..7832e50 100644
> > --- a/include/linux/hw_random.h
> > +++ b/include/linux/hw_random.h
> > @@ -46,6 +46,7 @@ struct hwrng {
> > /* internal. */
> > struct list_head list;
> > struct kref ref;
> > +   bool cleanup_done;
> >  };
> >  
> >  /** Register a new Hardware Random Number Generator driver. */
> > -- 
> > 1.9.3

-- 
Amos.


signature.asc
Description: Digital signature


Re: 3.18-rc regression: drm/nouveau: use shared fences for readable objects

2014-11-24 Thread Maarten Lankhorst
Hey,

Op 22-11-14 om 21:16 schreef Michael Marineau:
> On Nov 22, 2014 11:45 AM, "Michael Marineau"  wrote:
>>
>> On Nov 22, 2014 8:56 AM, "Maarten Lankhorst" <
> maarten.lankho...@canonical.com> wrote:
>>> Hey,
>>>
>>> Op 22-11-14 om 01:19 schreef Michael Marineau:
 On Thu, Nov 20, 2014 at 12:53 AM, Maarten Lankhorst
  wrote:
> Op 20-11-14 om 05:06 schreef Michael Marineau:
>> On Wed, Nov 19, 2014 at 12:10 AM, Maarten Lankhorst
>>  wrote:
>>> Hey,
>>>
>>> On 19-11-14 07:43, Michael Marineau wrote:
 On 3.18-rc kernel's I have been intermittently experiencing GPU
 lockups shortly after startup, accompanied with one or both of the
 following errors:

 nouveau E[   PFIFO][:01:00.0] read fault at 0x000734a000 [PTE]
 from PBDMA0/HOST_CPU on channel 0x007faa3000 [unknown]
 nouveau E[ DRM] GPU lockup - switching to software fbcon

 I was able to trace the issue with bisect to commit
 809e9447b92ffe1346b2d6ec390e212d5307f61c "drm/nouveau: use shared
 fences for readable objects". The lockups appear to have cleared
> up
 since reverting that and a few related followup commits:

 809e9447: "drm/nouveau: use shared fences for readable objects"
 055dffdf: "drm/nouveau: bump driver patchlevel to 1.2.1"
 e3be4c23: "drm/nouveau: specify if interruptible wait is desired
> in
 nouveau_fence_sync"
 15a996bb: "drm/nouveau: assign fence_chan->name correctly"
>>> Weird. I'm not sure yet what causes it.
>>>
>>>
> http://cgit.freedesktop.org/~mlankhorst/linux/commit/?h=fixed-fences-for-bisect=86be4f216bbb9ea3339843a5658d4c21162c7ee2
>> Building a kernel from that commit gives me an entirely new
> behavior:
>> X hangs for at least 10-20 seconds at a time with brief moments of
>> responsiveness before hanging again while gitk on the kernel repo
>> loads. Otherwise the system is responsive. The head of that
>> fixed-fences-for-bisect branch (1c6aafb5) which is the "use shared
>> fences for readable objects" commit I originally bisected to does
>> feature the complete lockups I was seeing before.
> Ok for the sake of argument lets just assume they're separate bugs,
> and we should look at xorg
> hanging first.
>
> Is there anything in the dmesg when the hanging happens?
>
> And it's probably 15 seconds, if it's called through
> nouveau_fence_wait.
> Try changing else if (!ret) to else if (WARN_ON(!ret)) in that
> function, and see if you get some dmesg spam. :)
 Adding the WARN_ON to 86be4f21 repots the following:

 [ 1188.676073] [ cut here ]
 [ 1188.676161] WARNING: CPU: 1 PID: 474 at
 drivers/gpu/drm/nouveau/nouveau_fence.c:359
 nouveau_fence_wait.part.9+0x33/0x40 [nouveau]()
 [ 1188.676166] Modules linked in: rndis_host cdc_ether usbnet mii bnep
 ecb btusb bluetooth rfkill bridge stp llc hid_generic usb_storage
 joydev mousedev hid_apple usbhid bcm5974 nls_iso8859_1 nls_cp437 vfat
 fat nouveau snd_hda_codec_hdmi coretemp x86_pkg_temp_thermal
 intel_powerclamp kvm_intel kvm iTCO_wdt crct10dif_pclmul
 iTCO_vendor_support crc32c_intel evdev aesni_intel mac_hid aes_x86_64
 lrw glue_helper ablk_helper applesmc snd_hda_codec_cirrus cryptd
 input_polldev snd_hda_codec_generic mxm_wmi led_class wmi microcode
 hwmon snd_hda_intel ttm snd_hda_controller lpc_ich i2c_i801 mfd_core
 snd_hda_codec i2c_algo_bit snd_hwdep drm_kms_helper snd_pcm sbs drm
 apple_gmux i2ccore snd_timer snd agpgart mei_me soundcore sbshc mei
 video xhci_hcd usbcore usb_common apple_bl button battery ac efivars
 autofs4
 [ 1188.676300]  efivarfs
 [ 1188.676308] CPU: 1 PID: 474 Comm: Xorg Tainted: GW
 3.17.0-rc2-nvtest+ #147
 [ 1188.676313] Hardware name: Apple Inc.
 MacBookPro11,3/Mac-2BD1B31983FE1663, BIOS
 MBP112.88Z.0138.B11.1408291503 08/29/2014
 [ 1188.676316]  0009 88045daebce8 814f0c09
 
 [ 1188.676325]  88045daebd20 8104ea5d 88006a6c1468
 fff0
 [ 1188.676333]    88006a6c1000
 88045daebd30
 [ 1188.676341] Call Trace:
 [ 1188.676356]  [] dump_stack+0x4d/0x66
 [ 1188.676369]  [] warn_slowpath_common+0x7d/0xa0
 [ 1188.676377]  [] warn_slowpath_null+0x1a/0x20
 [ 1188.676439]  []
 nouveau_fence_wait.part.9+0x33/0x40 [nouveau]
 [ 1188.676496]  [] nouveau_fence_wait+0x16/0x30
> [nouveau]
 [ 1188.676552]  []
 nouveau_gem_ioctl_cpu_prep+0xef/0x1f0 [nouveau]
 [ 1188.676578]  [] drm_ioctl+0x1ec/0x660 [drm]
 [ 1188.676590]  [] ?
> _raw_spin_unlock_irqrestore+0x36/0x70
 [ 1188.676600]  [] ? trace_hardirqs_on+0xd/0x10
 [ 1188.676655]  [] nouveau_drm_ioctl+0x54/0xc0
> [nouveau]
 [ 1188.676663]  [] 

Re: [PATCH v8 2/6] arm64: ptrace: allow tracer to skip a system call

2014-11-24 Thread AKASHI Takahiro

On 11/21/2014 04:17 AM, Will Deacon wrote:

On Thu, Nov 20, 2014 at 05:13:04AM +, AKASHI Takahiro wrote:

On 11/20/2014 04:06 AM, Will Deacon wrote:

On Wed, Nov 19, 2014 at 08:46:19AM +, AKASHI Takahiro wrote:

Syscall(-1) will return -ENOSYS whether or not a syscallno is explicitly
replaced with -1 by a tracer, and, in this sense, it is *skipped*.


Ok, but now userspace sees -ENOSYS for a skipped system call in that case,
whereas it would usually see whatever the trace put in x0, right?


If you don't really like this behavior, how about this patch instead of my 
[2/6] patch?

diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 726b910..1ef57d0 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -668,8 +668,15 @@ ENDPROC(el0_svc)
   * switches, and waiting for our parent to respond.
   */
   __sys_trace:
+   cmp w8, #-1 // default errno for invalid
+   b.ne1f  // system call
+   mov x0, #-ENOSYS
+   str x0, [sp, #S_X0]
+1:
  mov x0, sp
  bl  syscall_trace_enter
+   cmp w0, #-1 // skip the syscall?
+   b.eq__sys_trace_return_skipped
  adr lr, __sys_trace_return  // return address
  uxtwscno, w0// syscall number (possibly 
new)
  mov x1, sp  // pointer to regs
@@ -684,6 +691,7 @@ __sys_trace:

   __sys_trace_return:
  str x0, [sp]// save returned x0
+__sys_trace_return_skipped:
  mov x0, sp
  bl  syscall_trace_exit
  b   ret_to_user

With this change, I believe, syscall(-1) returns -ENOSYS by default whether 
traced
or not, and still you can change a return value when tracing.
(But a drawback here is that a tracer will see -ENOSYS in x0 even at syscall 
entry
for syscall(-1).)


But it's exactly these drawbacks that I'm objected to. syscall(-1) shouldn't
be treated any differently to syscall(42) with respect to restarting,
exactly like x86.


Can you elaborate a bit more as to "restarting?"
We can't make any assumption about the number of arguments taken by *invalid* 
syscall(-1)
and so changing a value in x0 (or any other registers) doesn't make any 
difference.
()

-Takahiro AKASHI


Will


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Re: [PATCH 2/4] gpiolib: use const parameters when possible

2014-11-24 Thread Alexandre Courbot
On Wed, Nov 19, 2014 at 7:09 PM, Uwe Kleine-König
 wrote:
> Hello Alexandre,
>
> On Wed, Nov 19, 2014 at 06:07:50PM +0900, Alexandre Courbot wrote:
>>  On Wed, Nov 19, 2014 at 6:02 PM, Uwe Kleine-König
>>  wrote:
>> > I'd make gpiod_get_direction static and only use it to fill in
>> > /sys/kernel/debug/gpio.
>>
>> That's very tempting. I see only atmel_serial.c using this function,
>> and there is no gpio_get_direction() declared anywhere so no user of
>> this either. I'm not sure what I was thinking when I decided to export
>> it?
> In next there is also drivers/tty/serial/mxs-auart.c.

Ok. I think we can get rid of gpiod_get_direction() if
serial_mctrl_gpio implements its own way to query the direction (maybe
using a bitmap in the mctrl_gpios and a mctrl_gpio_get_direction()
function that queries that map). Using gpiod_get_direction() is just
too unreliable.

Janusz, since your change for mxs-auart is in -next, would you mind
amending it to do this? Then we could do the same for atmel_serial and
remove gpiod_get_direction() from the public GPIO interface. This
function would do more harm than good anyway.

Thanks!
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Re: Using kernel filesystems as userland libraries

2014-11-24 Thread Clemens Ladisch
Nicolas George wrote:
> With the libraries present in e2fsprogs, it is possible to open a plain file
> (or any other reasonable storage) as an EXT2 filesystem and manipulate files
> inside it.
>
> Is it possible to use the implementations in the kernel to do the same thing
> with any supported normal filesystem?

mount -o loop /plain/file /where/to/mount
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Re: [PATCH 1/2] [drivers] staging/lustre: fix sparse warnings

2014-11-24 Thread Zahari Doychev
On Tue, Nov 25, 2014 at 02:40:36AM +0300, Dan Carpenter wrote:
> On Mon, Nov 24, 2014 at 07:55:41PM +0100, Zahari Doychev wrote:
> > --- a/drivers/staging/lustre/include/linux/lnet/lib-lnet.h
> > +++ b/drivers/staging/lustre/include/linux/lnet/lib-lnet.h
> > @@ -784,7 +784,8 @@ lnet_copy_iov2flat(int dlen, void *dest, unsigned int 
> > doffset,
> >unsigned int nsiov, struct iovec *siov, unsigned int soffset,
> >unsigned int nob)
> >  {
> > -   struct iovec diov = {/*.iov_base = */ dest, /*.iov_len = */ dlen};
> > +   struct iovec diov = {/*.iov_base = */ (void __user *)dest,
> > +/*.iov_len = */ dlen};
> >  
> 
> Why can't we just make the comments into code by removing the /*
> characters?  Remove the cast by declaring the data as __user data to
> begin with instead of declaring it incorrectly and then casting to the
> correct type later.

If I make the declarations right then I am moving the casts to other functions.
I was not sure which one is better but it is not a problem I will fix this.

> 
> Also it's not allowed to send two patches with the exact same subject.
> Also the subject was sucky and too vague anyway.  :)

Sorry for that.

regards,
Zahari

> 
> regards,
> dan carpenter
> 
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Re: [PATCH RFC v2 07/12] PM / Domains: export pm_genpd_lookup_name

2014-11-24 Thread Ulf Hansson
On 24 November 2014 at 14:04, Amit Daniel Kachhap
 wrote:
> This API may be needed to set the power domain parent/child relationship
> in the power domain platform driver. The parent relationship is
> generally set after the child power domain is registered with the power
> domain subsystem. In this case, pm_genpd_lookup_name API might be
> useful.

I think this is a step in the wrong direction. Instead we should be
working on removing the "name" based APIs from genpd.

The proper way should be to pass the PM domain as a parameter to the
APIs instead.

Kind regards
Uffe

>
> Signed-off-by: Amit Daniel Kachhap 
> ---
>  drivers/base/power/domain.c |3 ++-
>  include/linux/pm_domain.h   |7 +++
>  2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
> index fb83d4a..b0e1c2f 100644
> --- a/drivers/base/power/domain.c
> +++ b/drivers/base/power/domain.c
> @@ -49,7 +49,7 @@
>  static LIST_HEAD(gpd_list);
>  static DEFINE_MUTEX(gpd_list_lock);
>
> -static struct generic_pm_domain *pm_genpd_lookup_name(const char 
> *domain_name)
> +struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
>  {
> struct generic_pm_domain *genpd = NULL, *gpd;
>
> @@ -66,6 +66,7 @@ static struct generic_pm_domain *pm_genpd_lookup_name(const 
> char *domain_name)
> mutex_unlock(_list_lock);
> return genpd;
>  }
> +EXPORT_SYMBOL_GPL(pm_genpd_lookup_name);
>
>  struct generic_pm_domain *dev_to_genpd(struct device *dev)
>  {
> diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
> index 2e0e06d..aedcec3 100644
> --- a/include/linux/pm_domain.h
> +++ b/include/linux/pm_domain.h
> @@ -150,6 +150,8 @@ extern int pm_genpd_name_poweron(const char *domain_name);
>
>  extern struct dev_power_governor simple_qos_governor;
>  extern struct dev_power_governor pm_domain_always_on_gov;
> +
> +extern struct generic_pm_domain *pm_genpd_lookup_name(const char 
> *domain_name);
>  #else
>
>  static inline struct generic_pm_domain_data *dev_gpd_data(struct device *dev)
> @@ -221,6 +223,11 @@ static inline int pm_genpd_name_poweron(const char 
> *domain_name)
>  {
> return -ENOSYS;
>  }
> +static inline
> +struct generic_pm_domain *pm_genpd_lookup_name(const char *domain_name)
> +{
> +   return NULL;
> +}
>  #define simple_qos_governor NULL
>  #define pm_domain_always_on_gov NULL
>  #endif
> --
> 1.7.9.5
>
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[PATCH v9 3/4] ARM: dts: add RK3288 suspend support

2014-11-24 Thread Chris Zhong
add pmu sram node for suspend, add global_pwroff pinctrl.
The pmu sram is used to store the resume code.
global_pwroff is held low level at work, it would be pull to high
when entering suspend. reference this in the board DTS file since
some boards need it.

Signed-off-by: Tony Xie 
Signed-off-by: Chris Zhong 
Reviewed-by: Doug Anderson 
Tested-by: Doug Anderson 

---

Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- change pmu_intmem@ff72 to sram@ff72

Changes in v5:
- change size to 4k

Changes in v4: None
Changes in v3: None
Changes in v2:
- put "rockchip,rk3288-pmu-sram" to first

 arch/arm/boot/dts/rk3288.dtsi | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index d83ca93..c11b44c 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -481,6 +481,11 @@
};
};
 
+   sram@ff72 {
+   compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
+   reg = <0xff72 0x1000>;
+   };
+
pmu: power-management@ff73 {
compatible = "rockchip,rk3288-pmu", "syscon";
reg = <0xff73 0x100>;
@@ -704,6 +709,12 @@
bias-disable;
};
 
+   sleep {
+   global_pwroff: global-pwroff {
+   rockchip,pins = <0 0 RK_FUNC_1 _pull_none>;
+   };
+   };
+
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <0 15 RK_FUNC_1 
_pull_none>,
-- 
1.9.1

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[PATCH v9 4/4] ARM: dts: rockchip: add suspend settings for rk3288-evb-rk808

2014-11-24 Thread Chris Zhong
Add suspend-voltages and necessary pin-states for suspend on
rk3288-evb-rk808 boards. global_pwroff would be pulled high when
RK3288 entering suspend, this pin is a sleep signal for RK808, so
RK808 could goto sleep mode, and some regulators would be disable.

Signed-off-by: Chris Zhong 

---

Changes in v9:
- update the subject and description

Changes in v8:
- set vdd_gpu to 1.0v during suspend
- add regulator-on-in-suspend before set suspend voltage

Changes in v7:
- add regulator-state-mem sub node for suspend

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/boot/dts/rk3288-evb-rk808.dts | 51 +-
 1 file changed, 50 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts 
b/arch/arm/boot/dts/rk3288-evb-rk808.dts
index d8c775e6..742bd89 100644
--- a/arch/arm/boot/dts/rk3288-evb-rk808.dts
+++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts
@@ -31,7 +31,7 @@
interrupt-parent = <>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
-   pinctrl-0 = <_int>;
+   pinctrl-0 = <_int _pwroff>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
@@ -50,6 +50,9 @@
regulator-min-microvolt = <75>;
regulator-max-microvolt = <135>;
regulator-name = "vdd_arm";
+   regulator-state-mem {
+   regulator-off-in-suspend;
+   };
};
 
vdd_gpu: DCDC_REG2 {
@@ -58,12 +61,20 @@
regulator-min-microvolt = <85>;
regulator-max-microvolt = <125>;
regulator-name = "vdd_gpu";
+   regulator-state-mem {
+   regulator-on-in-suspend;
+   regulator-suspend-microvolt = <100>;
+   };
};
 
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_ddr";
+   regulator-suspend-mem-enabled;
+   regulator-state-mem {
+   regulator-on-in-suspend;
+   };
};
 
vcc_io: DCDC_REG4 {
@@ -72,6 +83,10 @@
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
regulator-name = "vcc_io";
+   regulator-state-mem {
+   regulator-on-in-suspend;
+   regulator-suspend-microvolt = <330>;
+   };
};
 
vccio_pmu: LDO_REG1 {
@@ -80,6 +95,10 @@
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
regulator-name = "vccio_pmu";
+   regulator-state-mem {
+   regulator-on-in-suspend;
+   regulator-suspend-microvolt = <330>;
+   };
};
 
vcc_tp: LDO_REG2 {
@@ -88,6 +107,9 @@
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
regulator-name = "vcc_tp";
+   regulator-state-mem {
+   regulator-off-in-suspend;
+   };
};
 
vdd_10: LDO_REG3 {
@@ -96,6 +118,10 @@
regulator-min-microvolt = <100>;
regulator-max-microvolt = <100>;
regulator-name = "vdd_10";
+   regulator-state-mem {
+   regulator-on-in-suspend;
+   regulator-suspend-microvolt = <100>;
+   };
};
 
vcc18_lcd: LDO_REG4 {
@@ -104,6 +130,9 @@
regulator-min-microvolt = <180>;
regulator-max-microvolt = <180>;
regulator-name = "vcc18_lcd";
+

[PATCH v9 2/4] ARM: rockchip: Add pmu-sram binding

2014-11-24 Thread Chris Zhong
The pmu-sram is used to store resume code, suspend/resume need get the
address of it. Therefore add a binding and documentation for it.

Signed-off-by: Tony Xie 
Signed-off-by: Chris Zhong 
Reviewed-by: Doug Anderson 

---

Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- change pmu_intmem@ff72 to sram@ff72

Changes in v5:
- change the size of sram in example

Changes in v4: None
Changes in v3: None
Changes in v2: None

 .../devicetree/bindings/arm/rockchip/pmu-sram.txt| 16 
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt

diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt 
b/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
new file mode 100644
index 000..6b42fda
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
@@ -0,0 +1,16 @@
+Rockchip SRAM for pmu:
+--
+
+The sram of pmu is used to store the function of resume from maskrom(the 1st
+level loader). This is a common use of the "pmu-sram" because it keeps power
+even in low power states in the system.
+
+Required node properties:
+- compatible : should be "rockchip,rk3288-pmu-sram"
+- reg : physical base address and the size of the registers window
+
+Example:
+   sram@ff72 {
+   compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
+   reg = <0xff72 0x1000>;
+   };
-- 
1.9.1

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[PATCH v9 1/4] ARM: rockchip: add suspend and resume for RK3288

2014-11-24 Thread Chris Zhong
It's a basic version of suspend and resume for rockchip,
it only support RK3288 now.

Signed-off-by: Tony Xie 
Signed-off-by: Chris Zhong 
Signed-off-by: Doug Anderson 
Tested-by: Doug Anderson 
Reviewed-by: Doug Anderson 

---

Changes in v9:
- fold Doug's patches
- modify some print log

Changes in v8:
- use enum for define sleep mode
- move rk3288_config_bootdata to the front of sram memcpy

Changes in v7:
- get rid all of unused code

Changes in v6:
- get rid of the save/restore of SRAM
- doing the copy of resume code once at init time
- remove ROCKCHIP_ARM_OFF_LOGIC_DEEP from rk3288_fill_in_bootram
- add of_platform_populate in rockchip_dt_init

Changes in v5:
- use rk3288_bootram_sz for memcpy size
- fixed error of sram save and restore

Changes in v4:
- remove grf regmap

Changes in v3:
- move the pinmux of gpio6_c6 save and restore to pinctrl-rockchip

Changes in v2:
- add the regulator calls in prepare and finish.
- add the pinmux of gpio6_c6 save and restore

 arch/arm/mach-rockchip/Makefile   |   1 +
 arch/arm/mach-rockchip/pm.c   | 260 ++
 arch/arm/mach-rockchip/pm.h   |  99 +++
 arch/arm/mach-rockchip/rockchip.c |   2 +
 arch/arm/mach-rockchip/sleep.S|  73 +++
 5 files changed, 435 insertions(+)
 create mode 100644 arch/arm/mach-rockchip/pm.c
 create mode 100644 arch/arm/mach-rockchip/pm.h
 create mode 100644 arch/arm/mach-rockchip/sleep.S

diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index b29d8ea..5c3a9b2 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -1,4 +1,5 @@
 CFLAGS_platsmp.o := -march=armv7-a
 
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip.o
+obj-$(CONFIG_PM_SLEEP) += pm.o sleep.o
 obj-$(CONFIG_SMP) += headsmp.o platsmp.o
diff --git a/arch/arm/mach-rockchip/pm.c b/arch/arm/mach-rockchip/pm.c
new file mode 100644
index 000..50cb781
--- /dev/null
+++ b/arch/arm/mach-rockchip/pm.c
@@ -0,0 +1,260 @@
+/*
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Tony Xie 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "pm.h"
+
+/* These enum are option of low power mode */
+enum {
+   ROCKCHIP_ARM_OFF_LOGIC_NORMAL = 0,
+   ROCKCHIP_ARM_OFF_LOGIC_DEEP = 1,
+};
+
+struct rockchip_pm_data {
+   const struct platform_suspend_ops *ops;
+   int (*init)(struct device_node *np);
+};
+
+static void __iomem *rk3288_bootram_base;
+static phys_addr_t rk3288_bootram_phy;
+
+static struct regmap *pmu_regmap;
+static struct regmap *sgrf_regmap;
+
+static u32 rk3288_pmu_pwr_mode_con;
+static u32 rk3288_sgrf_soc_con0;
+
+static inline u32 rk3288_l2_config(void)
+{
+   u32 l2ctlr;
+
+   asm("mrc p15, 1, %0, c9, c0, 2" : "=r" (l2ctlr));
+   return l2ctlr;
+}
+
+static void rk3288_config_bootdata(void)
+{
+   rkpm_bootdata_cpusp = rk3288_bootram_phy + (SZ_4K - 8);
+   rkpm_bootdata_cpu_code = virt_to_phys(cpu_resume);
+
+   rkpm_bootdata_l2ctlr_f  = 1;
+   rkpm_bootdata_l2ctlr = rk3288_l2_config();
+}
+
+static void rk3288_slp_mode_set(int level)
+{
+   u32 mode_set, mode_set1;
+
+   regmap_read(sgrf_regmap, RK3288_SGRF_SOC_CON0, _sgrf_soc_con0);
+
+   regmap_read(pmu_regmap, RK3288_PMU_PWRMODE_CON,
+   _pmu_pwr_mode_con);
+
+   /* set bit 8 so that system will resume to FAST_BOOT_ADDR */
+   regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0,
+SGRF_FAST_BOOT_EN | SGRF_FAST_BOOT_EN_WRITE);
+
+   /* booting address of resuming system is from this register value */
+   regmap_write(sgrf_regmap, RK3288_SGRF_FAST_BOOT_ADDR,
+rk3288_bootram_phy);
+
+   regmap_write(pmu_regmap, RK3288_PMU_WAKEUP_CFG1,
+PMU_ARMINT_WAKEUP_EN);
+
+   mode_set = BIT(PMU_GLOBAL_INT_DISABLE) | BIT(PMU_L2FLUSH_EN) |
+  BIT(PMU_SREF0_ENTER_EN) | BIT(PMU_SREF1_ENTER_EN) |
+  BIT(PMU_DDR0_GATING_EN) | BIT(PMU_DDR1_GATING_EN) |
+  BIT(PMU_PWR_MODE_EN) | BIT(PMU_CHIP_PD_EN) |
+  BIT(PMU_SCU_EN);
+
+   mode_set1 = BIT(PMU_CLR_CORE) | BIT(PMU_CLR_CPUP);
+
+   if (level == ROCKCHIP_ARM_OFF_LOGIC_DEEP) {
+   /* arm off, logic deep sleep */
+   mode_set |= BIT(PMU_BUS_PD_EN) |
+   BIT(PMU_DDR1IO_RET_EN) | BIT(PMU_DDR0IO_RET_EN) |
+   

[PATCH v9 0/4] The 1st version of suspend for RK3288.

2014-11-24 Thread Chris Zhong
This suspend patch is only support cut off the power of cpu and some external
devices, since we still lack power_domain driver, so the other power rail
of rk3288 need keep power on.
I have tested it on rk3288-evb board, atop next-20141124. goto suspend by type
"echo mem > /sys/power/state", vdd_cpu is about 0mv by measuring, so it can be
determined in sleep mode, then press power button to wakeup it.

Changes in v9:
- fold Doug's patches
- modify some print log
- update the subject and description

Changes in v8:
- use enum for define sleep mode
- move rk3288_config_bootdata to the front of sram memcpy
- set vdd_gpu to 1.0v during suspend
- add regulator-on-in-suspend before set suspend voltage

Changes in v7:
- get rid all of unused code
- add regulator-state-mem sub node for suspend

Changes in v6:
- get rid of the save/restore of SRAM
- doing the copy of resume code once at init time
- remove ROCKCHIP_ARM_OFF_LOGIC_DEEP from rk3288_fill_in_bootram
- add of_platform_populate in rockchip_dt_init
- change pmu_intmem@ff72 to sram@ff72
- change pmu_intmem@ff72 to sram@ff72

Changes in v5:
- use rk3288_bootram_sz for memcpy size
- fixed error of sram save and restore
- change the size of sram in example
- change size to 4k

Changes in v4:
- remove grf regmap

Changes in v3:
- move the pinmux of gpio6_c6 save and restore to pinctrl-rockchip

Changes in v2:
- add the regulator calls in prepare and finish.
- add the pinmux of gpio6_c6 save and restore
- put "rockchip,rk3288-pmu-sram" to first

Chris Zhong (4):
  ARM: rockchip: add suspend and resume for RK3288
  ARM: rockchip: Add pmu-sram binding
  ARM: dts: add RK3288 suspend support
  ARM: dts: rockchip: add suspend settings for rk3288-evb-rk808

 .../devicetree/bindings/arm/rockchip/pmu-sram.txt  |  16 ++
 arch/arm/boot/dts/rk3288-evb-rk808.dts |  51 +++-
 arch/arm/boot/dts/rk3288.dtsi  |  11 +
 arch/arm/mach-rockchip/Makefile|   1 +
 arch/arm/mach-rockchip/pm.c| 260 +
 arch/arm/mach-rockchip/pm.h|  99 
 arch/arm/mach-rockchip/rockchip.c  |   2 +
 arch/arm/mach-rockchip/sleep.S |  73 ++
 8 files changed, 512 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu-sram.txt
 create mode 100644 arch/arm/mach-rockchip/pm.c
 create mode 100644 arch/arm/mach-rockchip/pm.h
 create mode 100644 arch/arm/mach-rockchip/sleep.S

-- 
1.9.1

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Re: [PATCH RFC v2 06/12] driver: soc: exynos-pmu: Add exynos7 power domain on/off ops

2014-11-24 Thread Ulf Hansson
On 24 November 2014 at 14:04, Amit Daniel Kachhap
 wrote:
> This patch uses the restructuring done in PD handlers and adds PD
> on/off/status handlers for exynos7. In this SoC, some extra settings
> need to be done prior to turning on/off power domains. Some of those
> settings are also different from different power domains so is uses
> the power domain compatible name feature to distinguish between power
> domains.
>
> Signed-off-by: Amit Daniel Kachhap 
> ---
>  drivers/soc/samsung/exynos-pmu.c|  105 
> +++
>  include/linux/soc/samsung/exynos-regs-pmu.h |   17 +
>  2 files changed, 122 insertions(+)
>
> diff --git a/drivers/soc/samsung/exynos-pmu.c 
> b/drivers/soc/samsung/exynos-pmu.c
> index e690f65..b9631d5 100644
> --- a/drivers/soc/samsung/exynos-pmu.c
> +++ b/drivers/soc/samsung/exynos-pmu.c
> @@ -1202,6 +1202,104 @@ static void exynos7_pmu_init(void)
> }
>  }
>
> +static int exynos7_pd_extraconf_base(const char *pd_name)
> +{
> +   if (!pd_name)
> +   return -EINVAL;
> +
> +   if (!strcmp("samsung,exynos7-pd-mfc", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_MFC_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-hevc", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_HEVC_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-mscl", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_MSCL_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-g2d", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_G2D_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-fsys0", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_FSYS0_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-fsys1", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_FSYS1_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-aud", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_AUD_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-disp", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_DISP_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-vpp", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_VPP_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-vpp", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_VPP_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-isp0", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_ISP0_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-isp1", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_ISP1_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-cam0", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_CAM0_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-cam1", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_CAM1_SYS_PWR_REG;
> +   else if (!strcmp("samsung,exynos7-pd-g3d", pd_name))
> +   return EXYNOS7_CLKRUN_CMU_CAM1_SYS_PWR_REG;

I think we should move away from using strings to find a matching PM
domain. Instead we should use a enum/define pointing to the PM domain
in an array of PM domains, or similar.

The UX500 SOC initial support for PM domains is queued for 3.19 and is
currently available in linux-next. You may want to get some
inspiration from that approach.

> +
> +   pr_err("%s: Unsupported power domain\n", pd_name);
> +   return 0;
> +}
> +
> +static int exynos7_pd_powerdown(const char *pd_name, void __iomem *pd_addr)
> +{

Considering the suggestion above and to move away from using strings
like this; this function could take a pointer to the PM domain instead
of a string and the __iomem, right!?

> +   int off_base = exynos7_pd_extraconf_base(pd_name);
> +
> +   if (!off_base)
> +   return -EINVAL;
> +
> +   /* Initialise the pd extraconf registers */
> +   pmu_raw_writel(0, off_base + EXYNOS7_CLKRUN_CMU_PD_SYS_PWR_REG);
> +   pmu_raw_writel(0, off_base + EXYNOS7_CLKSTOP_CMU_PD_SYS_PWR_REG);
> +   pmu_raw_writel(0, off_base + EXYNOS7_DISABLE_PLL_CMU_PD_SYS_PWR_REG);
> +   pmu_raw_writel(0, off_base + EXYNOS7_RESET_LOGIC_PD_SYS_PWR_REG);
> +   pmu_raw_writel(0, off_base + EXYNOS7_MEMORY_PD_SYS_PWR_REG);
> +   pmu_raw_writel(0, off_base + EXYNOS7_RESET_CMU_PD_SYS_PWR_REG);
> +
> +   if (!strcmp("samsung,exynos7-pd-fsys0", pd_name) ||
> +   !strcmp("samsung,exynos7-pd-fsys1", pd_name))
> +   pmu_raw_writel(1,
> +   off_base + 
> EXYNOS7_RESET_SLEEP_PD_SYS_PWR_REG);
> +
> +   if (!strcmp("samsung,exynos7-pd-aud", pd_name)) {
> +   pmu_raw_writel(0, EXYNOS7_PAD_RETENTION_AUD_SYS_PWR_REG);
> +   pmu_raw_writel(0, EXYNOS7_GPIO_MODE_AUD_SYS_PWR_REG);
> +   }
> +
> +   writel_relaxed((EXYNOS7_USE_PROLONGED_LOGIC_RESET |
> +   EXYNOS7_USE_SC_FEEDBACK), pd_addr + EXYNOS_PD_OPTION);
> +
> +   return 0;
> +}
> +
> +static int exynos7_pd_poweron(const char *pd_name, void 

[PATCH v5 2/7] fs: moved kernel_write to fs/read_write

2014-11-24 Thread Pieter Smith
kernel_write shares infrastructure with the read_write translation unit but not
with the splice translation unit. Grouping kernel_write with the read_write
translation unit is more logical. It also paves the way to compiling out the
splice group of syscalls for embedded systems that do not need them.

Signed-off-by: Pieter Smith 
---
 fs/read_write.c | 16 
 fs/splice.c | 16 
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/fs/read_write.c b/fs/read_write.c
index d9451ba..f4c8d8b 100644
--- a/fs/read_write.c
+++ b/fs/read_write.c
@@ -1191,3 +1191,19 @@ COMPAT_SYSCALL_DEFINE5(pwritev, compat_ulong_t, fd,
 }
 #endif
 
+ssize_t kernel_write(struct file *file, const char *buf, size_t count,
+   loff_t pos)
+{
+   mm_segment_t old_fs;
+   ssize_t res;
+
+   old_fs = get_fs();
+   set_fs(get_ds());
+   /* The cast to a user pointer is valid due to the set_fs() */
+   res = vfs_write(file, (__force const char __user *)buf, count, );
+   set_fs(old_fs);
+
+   return res;
+}
+EXPORT_SYMBOL(kernel_write);
+
diff --git a/fs/splice.c b/fs/splice.c
index c1a2861..44b201b 100644
--- a/fs/splice.c
+++ b/fs/splice.c
@@ -583,22 +583,6 @@ static ssize_t kernel_readv(struct file *file, const 
struct iovec *vec,
return res;
 }
 
-ssize_t kernel_write(struct file *file, const char *buf, size_t count,
-   loff_t pos)
-{
-   mm_segment_t old_fs;
-   ssize_t res;
-
-   old_fs = get_fs();
-   set_fs(get_ds());
-   /* The cast to a user pointer is valid due to the set_fs() */
-   res = vfs_write(file, (__force const char __user *)buf, count, );
-   set_fs(old_fs);
-
-   return res;
-}
-EXPORT_SYMBOL(kernel_write);
-
 ssize_t default_file_splice_read(struct file *in, loff_t *ppos,
 struct pipe_inode_info *pipe, size_t len,
 unsigned int flags)
-- 
2.1.0

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[PATCH v5 1/7] fs: move sendfile syscall into fs/splice

2014-11-24 Thread Pieter Smith
sendfile functionally forms part of the splice group of syscalls (splice,
vmsplice and tee). Grouping sendfile with splice paves the way to compiling out
the splice group of syscalls for embedded systems that do not need these.

add/remove: 0/0 grow/shrink: 7/2 up/down: 86/-61 (25)
function old new   delta
file_start_write  34  68 +34
file_end_write29  58 +29
sys_pwritev  115 122  +7
sys_preadv   115 122  +7
fdput_pos 29  36  +7
sys_pwrite64 115 116  +1
sys_pread64  115 116  +1
sys_tee  497 491  -6
sys_splice  10751020 -55

Signed-off-by: Pieter Smith 
---
 fs/read_write.c | 175 ---
 fs/splice.c | 178 
 2 files changed, 178 insertions(+), 175 deletions(-)

diff --git a/fs/read_write.c b/fs/read_write.c
index 7d9318c..d9451ba 100644
--- a/fs/read_write.c
+++ b/fs/read_write.c
@@ -1191,178 +1191,3 @@ COMPAT_SYSCALL_DEFINE5(pwritev, compat_ulong_t, fd,
 }
 #endif
 
-static ssize_t do_sendfile(int out_fd, int in_fd, loff_t *ppos,
-  size_t count, loff_t max)
-{
-   struct fd in, out;
-   struct inode *in_inode, *out_inode;
-   loff_t pos;
-   loff_t out_pos;
-   ssize_t retval;
-   int fl;
-
-   /*
-* Get input file, and verify that it is ok..
-*/
-   retval = -EBADF;
-   in = fdget(in_fd);
-   if (!in.file)
-   goto out;
-   if (!(in.file->f_mode & FMODE_READ))
-   goto fput_in;
-   retval = -ESPIPE;
-   if (!ppos) {
-   pos = in.file->f_pos;
-   } else {
-   pos = *ppos;
-   if (!(in.file->f_mode & FMODE_PREAD))
-   goto fput_in;
-   }
-   retval = rw_verify_area(READ, in.file, , count);
-   if (retval < 0)
-   goto fput_in;
-   count = retval;
-
-   /*
-* Get output file, and verify that it is ok..
-*/
-   retval = -EBADF;
-   out = fdget(out_fd);
-   if (!out.file)
-   goto fput_in;
-   if (!(out.file->f_mode & FMODE_WRITE))
-   goto fput_out;
-   retval = -EINVAL;
-   in_inode = file_inode(in.file);
-   out_inode = file_inode(out.file);
-   out_pos = out.file->f_pos;
-   retval = rw_verify_area(WRITE, out.file, _pos, count);
-   if (retval < 0)
-   goto fput_out;
-   count = retval;
-
-   if (!max)
-   max = min(in_inode->i_sb->s_maxbytes, 
out_inode->i_sb->s_maxbytes);
-
-   if (unlikely(pos + count > max)) {
-   retval = -EOVERFLOW;
-   if (pos >= max)
-   goto fput_out;
-   count = max - pos;
-   }
-
-   fl = 0;
-#if 0
-   /*
-* We need to debate whether we can enable this or not. The
-* man page documents EAGAIN return for the output at least,
-* and the application is arguably buggy if it doesn't expect
-* EAGAIN on a non-blocking file descriptor.
-*/
-   if (in.file->f_flags & O_NONBLOCK)
-   fl = SPLICE_F_NONBLOCK;
-#endif
-   file_start_write(out.file);
-   retval = do_splice_direct(in.file, , out.file, _pos, count, fl);
-   file_end_write(out.file);
-
-   if (retval > 0) {
-   add_rchar(current, retval);
-   add_wchar(current, retval);
-   fsnotify_access(in.file);
-   fsnotify_modify(out.file);
-   out.file->f_pos = out_pos;
-   if (ppos)
-   *ppos = pos;
-   else
-   in.file->f_pos = pos;
-   }
-
-   inc_syscr(current);
-   inc_syscw(current);
-   if (pos > max)
-   retval = -EOVERFLOW;
-
-fput_out:
-   fdput(out);
-fput_in:
-   fdput(in);
-out:
-   return retval;
-}
-
-SYSCALL_DEFINE4(sendfile, int, out_fd, int, in_fd, off_t __user *, offset, 
size_t, count)
-{
-   loff_t pos;
-   off_t off;
-   ssize_t ret;
-
-   if (offset) {
-   if (unlikely(get_user(off, offset)))
-   return -EFAULT;
-   pos = off;
-   ret = do_sendfile(out_fd, in_fd, , count, MAX_NON_LFS);
-   if (unlikely(put_user(pos, offset)))
-   return -EFAULT;
-   return ret;
-   }
-
-   return do_sendfile(out_fd, in_fd, NULL, count, 0);
-}
-
-SYSCALL_DEFINE4(sendfile64, int, out_fd, int, in_fd, loff_t __user *, offset, 
size_t, count)
-{
-   loff_t pos;
-   ssize_t ret;
-
-   

[PATCH v5 5/7] net/core: support compiling out splice

2014-11-24 Thread Pieter Smith
To implement splice support, net/core makes use of nosteal_pipe_buf_ops. This
struct is exported by fs/splice. The goal of the larger patch set is to
completely compile out fs/splice, so uses of the exported struct need to be
compiled out along with fs/splice.

This patch therefore compiles out splice support in net/core when
CONFIG_SYSCALL_SPLICE is undefined. The compiled out function skb_splice_bits
is transparently mocked out with a static inline. The greater patch set removes
userspace splice support so it cannot be called anyway.

Signed-off-by: Pieter Smith 
---
 include/linux/skbuff.h | 10 ++
 net/core/skbuff.c  | 11 +++
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index a59d934..5cd636b 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -2640,9 +2640,19 @@ int skb_copy_bits(const struct sk_buff *skb, int offset, 
void *to, int len);
 int skb_store_bits(struct sk_buff *skb, int offset, const void *from, int len);
 __wsum skb_copy_and_csum_bits(const struct sk_buff *skb, int offset, u8 *to,
  int len, __wsum csum);
+#ifdef CONFIG_SYSCALL_SPLICE
 int skb_splice_bits(struct sk_buff *skb, unsigned int offset,
struct pipe_inode_info *pipe, unsigned int len,
unsigned int flags);
+#else
+static inline int
+skb_splice_bits(struct sk_buff *skb, unsigned int offset,
+   struct pipe_inode_info *pipe, unsigned int len,
+   unsigned int flags)
+{
+   return -EPERM;
+}
+#endif
 void skb_copy_and_csum_dev(const struct sk_buff *skb, u8 *to);
 unsigned int skb_zerocopy_headlen(const struct sk_buff *from);
 int skb_zerocopy(struct sk_buff *to, struct sk_buff *from,
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index 61059a0..bb426d9 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -1678,7 +1678,8 @@ EXPORT_SYMBOL(skb_copy_bits);
  * Callback from splice_to_pipe(), if we need to release some pages
  * at the end of the spd in case we error'ed out in filling the pipe.
  */
-static void sock_spd_release(struct splice_pipe_desc *spd, unsigned int i)
+static void __maybe_unused sock_spd_release(struct splice_pipe_desc *spd,
+   unsigned int i)
 {
put_page(spd->pages[i]);
 }
@@ -1781,9 +1782,9 @@ static bool __splice_segment(struct page *page, unsigned 
int poff,
  * Map linear and fragment data from the skb to spd. It reports true if the
  * pipe is full or if we already spliced the requested length.
  */
-static bool __skb_splice_bits(struct sk_buff *skb, struct pipe_inode_info 
*pipe,
- unsigned int *offset, unsigned int *len,
- struct splice_pipe_desc *spd, struct sock *sk)
+static bool __maybe_unused __skb_splice_bits(struct sk_buff *skb, struct 
pipe_inode_info *pipe,
+unsigned int *offset, unsigned int 
*len,
+struct splice_pipe_desc *spd, 
struct sock *sk)
 {
int seg;
 
@@ -1821,6 +1822,7 @@ static bool __skb_splice_bits(struct sk_buff *skb, struct 
pipe_inode_info *pipe,
  * the frag list, if such a thing exists. We'd probably need to recurse to
  * handle that cleanly.
  */
+#ifdef CONFIG_SYSCALL_SPLICE
 int skb_splice_bits(struct sk_buff *skb, unsigned int offset,
struct pipe_inode_info *pipe, unsigned int tlen,
unsigned int flags)
@@ -1876,6 +1878,7 @@ done:
 
return ret;
 }
+#endif /* CONFIG_SYSCALL_SPLICE */
 
 /**
  * skb_store_bits - store bits from kernel buffer to skb
-- 
2.1.0

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[PATCH v5 3/7] fs/splice: support compiling out splice-family syscalls

2014-11-24 Thread Pieter Smith
Many embedded systems will not need the splice-family syscalls (splice,
vmsplice, tee and sendfile). Omitting them saves space.  This adds a new EXPERT
config option CONFIG_SYSCALL_SPLICE (default y) to support compiling them out.

The goal is to completely compile out fs/splice along with the syscalls. To
achieve this, the remaining patch-set will deal with fs/splice exports. As far
as possible, the impact on other device drivers will be minimized so as to
reduce the overal maintenance burden of CONFIG_SYSCALL_SPLICE.

The use of exported functions will be solved by transparently mocking them out
with static inlines. Uses of the exported pipe_buf_operations struct however
require direct modification in fs/fuse and net/core. The next two patches will
deal with this.

The last change required before fs/splice can be comipled out is making fs/nfsd
aware of the lacking splice support in file-systems when CONFIG_SYSCALL_SPLICE
is undefined.

The bloat benefit of this patch given a tinyconfig is:

add/remove: 0/16 grow/shrink: 2/5 up/down: 114/-3693 (-3579)
function old new   delta
splice_direct_to_actor   348 416 +68
splice_to_pipe   371 417 +46
splice_from_pipe_next107 106  -1
fdput 11   - -11
signal_pending39  26 -13
fdget 56  42 -14
user_page_pipe_buf_ops20   - -20
user_page_pipe_buf_steal  25   - -25
file_end_write58  29 -29
file_start_write  68  34 -34
pipe_to_user  43   - -43
wakeup_pipe_readers   54   - -54
do_splice_to  87   - -87
ipipe_prep.part   92   - -92
opipe_prep.part  119   --119
sys_sendfile 122   --122
sys_sendfile64   126   --126
sys_vmsplice 137   --137
vmsplice_to_user 205   --205
sys_tee  491   --491
do_sendfile  492   --492
vmsplice_to_pipe 558   --558
sys_splice  1020   -   -1020

Signed-off-by: Pieter Smith 
---
 fs/splice.c |  2 ++
 init/Kconfig| 10 ++
 kernel/sys_ni.c |  8 
 3 files changed, 20 insertions(+)

diff --git a/fs/splice.c b/fs/splice.c
index 44b201b..7c4c695 100644
--- a/fs/splice.c
+++ b/fs/splice.c
@@ -1316,6 +1316,7 @@ long do_splice_direct(struct file *in, loff_t *ppos, 
struct file *out,
return ret;
 }
 
+#ifdef CONFIG_SYSCALL_SPLICE
 static int splice_pipe_to_pipe(struct pipe_inode_info *ipipe,
   struct pipe_inode_info *opipe,
   size_t len, unsigned int flags);
@@ -2200,4 +2201,5 @@ COMPAT_SYSCALL_DEFINE4(sendfile64, int, out_fd, int, 
in_fd,
return do_sendfile(out_fd, in_fd, NULL, count, 0);
 }
 #endif
+#endif
 
diff --git a/init/Kconfig b/init/Kconfig
index d811d5f..dec9819 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1571,6 +1571,16 @@ config NTP
  system clock to an NTP server, you can disable this option to save
  space.
 
+config SYSCALL_SPLICE
+   bool "Enable splice/vmsplice/tee/sendfile syscalls" if EXPERT
+   default y
+   help
+ This option enables the splice, vmsplice, tee and sendfile syscalls. 
These
+ are used by applications to: move data between buffers and arbitrary 
file
+ descriptors; "copy" data between buffers; or copy data from userspace 
into
+ buffers. If building an embedded system where no applications use 
these
+ syscalls, you can disable this option to save space.
+
 config PCI_QUIRKS
default y
bool "Enable PCI quirk workarounds" if EXPERT
diff --git a/kernel/sys_ni.c b/kernel/sys_ni.c
index d2f5b00..25d5551 100644
--- a/kernel/sys_ni.c
+++ b/kernel/sys_ni.c
@@ -170,6 +170,14 @@ cond_syscall(sys_fstat);
 cond_syscall(sys_stat);
 cond_syscall(sys_uname);
 cond_syscall(sys_olduname);
+cond_syscall(sys_vmsplice);
+cond_syscall(sys_splice);
+cond_syscall(sys_tee);
+cond_syscall(sys_sendfile);
+cond_syscall(sys_sendfile64);
+cond_syscall(compat_sys_vmsplice);
+cond_syscall(compat_sys_sendfile);
+cond_syscall(compat_sys_sendfile64);
 
 /* arch-specific weak syscall entries */
 cond_syscall(sys_pciconfig_read);
-- 
2.1.0

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[PATCH v5 7/7] fs/splice: full support for compiling out splice

2014-11-24 Thread Pieter Smith
Entirely compile out splice translation unit when the system is configured
without splice family of syscalls (i.e. CONFIG_SYSCALL_SPLICE is undefined).

Exported fs/splice functions are transparently mocked out with static inlines.
Because userspace support for splice has already been removed by this
patch-set, the exported functions cannot be called anyway. Mocking them out
prevents a maintenance burden on file system drivers.

The bloat score resulting from this patch given a tinyconfig is:
add/remove: 0/25 grow/shrink: 0/5 up/down: 0/-4845 (-4845)
function old new   delta
pipe_to_null   4   -  -4
generic_pipe_buf_nosteal   6   -  -6
spd_release_page  10   - -10
PageUptodate  22  11 -11
lock_page 36  24 -12
page_cache_pipe_buf_release   16   - -16
splice_write_null 24   4 -20
page_cache_pipe_buf_ops   20   - -20
nosteal_pipe_buf_ops  20   - -20
default_pipe_buf_ops  20   - -20
generic_splice_sendpage   24   - -24
splice_shrink_spd 27   - -27
direct_splice_actor   47   - -47
default_file_splice_write 49   - -49
wakeup_pipe_writers   54   - -54
write_pipe_buf71   - -71
page_cache_pipe_buf_confirm   80   - -80
splice_grow_spd   87   - -87
splice_from_pipe  93   - -93
splice_from_pipe_next106   --106
pipe_to_sendpage 109   --109
page_cache_pipe_buf_steal114   --114
generic_file_splice_read 131   8-123
do_splice_direct 148   --148
__splice_from_pipe   246   --246
splice_direct_to_actor   416   --416
splice_to_pipe   417   --417
default_file_splice_read 688   --688
iter_file_splice_write   702   4-698
__generic_file_splice_read  1109   -   -1109

The bloat score for the entire CONFIG_SYSCALL_SPLICE patch-set is:
add/remove: 0/41 grow/shrink: 5/7 up/down: 23/-8422 (-8399)
function old new   delta
sys_pwritev  115 122  +7
sys_preadv   115 122  +7
fdput_pos 29  36  +7
sys_pwrite64 115 116  +1
sys_pread64  115 116  +1
pipe_to_null   4   -  -4
generic_pipe_buf_nosteal   6   -  -6
spd_release_page  10   - -10
fdput 11   - -11
PageUptodate  22  11 -11
lock_page 36  24 -12
signal_pending39  26 -13
fdget 56  42 -14
page_cache_pipe_buf_release   16   - -16
user_page_pipe_buf_ops20   - -20
splice_write_null 24   4 -20
page_cache_pipe_buf_ops   20   - -20
nosteal_pipe_buf_ops  20   - -20
default_pipe_buf_ops  20   - -20
generic_splice_sendpage   24   - -24
user_page_pipe_buf_steal  25   - -25
splice_shrink_spd 27   - -27
pipe_to_user  43   - -43
direct_splice_actor   47   - -47
default_file_splice_write 49   - -49
wakeup_pipe_writers   54   - -54
wakeup_pipe_readers   54   - -54
write_pipe_buf71   - -71
page_cache_pipe_buf_confirm   80   - -80
splice_grow_spd   87   - -87
do_splice_to  87   - -87
ipipe_prep.part   92   - -92
splice_from_pipe  93   - -93
splice_from_pipe_next107   --107
pipe_to_sendpage

[PATCH] gpio: remove const modifier from gpiod_get_direction()

2014-11-24 Thread Alexandre Courbot
Although gpiod_get_direction() can be considered side-effect free for
consumers, its internals involve setting or clearing bits in the
affected GPIO descriptor, for which we need to force-cast the const
descriptor parameter. This could lead to incorrect behavior is the
compiler decide to optimize here, so remove this const parameter. The
intent is to make gpiod_get_direction() private anyway, so it does not
really matter.

Reported-by: Uwe Kleine-König 
Signed-off-by: Alexandre Courbot 
---
 drivers/gpio/gpiolib-sysfs.c  | 2 +-
 drivers/gpio/gpiolib.c| 8 +++-
 include/linux/gpio/consumer.h | 2 +-
 3 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
index 781fbed00fc3..2ac1800b58bb 100644
--- a/drivers/gpio/gpiolib-sysfs.c
+++ b/drivers/gpio/gpiolib-sysfs.c
@@ -41,7 +41,7 @@ static DEFINE_MUTEX(sysfs_lock);
 static ssize_t gpio_direction_show(struct device *dev,
struct device_attribute *attr, char *buf)
 {
-   const struct gpio_desc  *desc = dev_get_drvdata(dev);
+   struct gpio_desc*desc = dev_get_drvdata(dev);
ssize_t status;
 
mutex_lock(_lock);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 5619922ebf44..0b271ef87c09 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -148,7 +148,7 @@ static int gpiochip_find_base(int ngpio)
  *
  * This function may sleep if gpiod_cansleep() is true.
  */
-int gpiod_get_direction(const struct gpio_desc *desc)
+int gpiod_get_direction(struct gpio_desc *desc)
 {
struct gpio_chip*chip;
unsignedoffset;
@@ -164,13 +164,11 @@ int gpiod_get_direction(const struct gpio_desc *desc)
if (status > 0) {
/* GPIOF_DIR_IN, or other positive */
status = 1;
-   /* FLAG_IS_OUT is just a cache of the result of get_direction(),
-* so it does not affect constness per se */
-   clear_bit(FLAG_IS_OUT, &((struct gpio_desc *)desc)->flags);
+   clear_bit(FLAG_IS_OUT, >flags);
}
if (status == 0) {
/* GPIOF_DIR_OUT */
-   set_bit(FLAG_IS_OUT, &((struct gpio_desc *)desc)->flags);
+   set_bit(FLAG_IS_OUT, >flags);
}
return status;
 }
diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h
index 83c0a61c605d..d54d158ca327 100644
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
@@ -66,7 +66,7 @@ __devm_gpiod_get_index_optional(struct device *dev, const 
char *con_id,
  unsigned int index, enum gpiod_flags flags);
 void devm_gpiod_put(struct device *dev, struct gpio_desc *desc);
 
-int gpiod_get_direction(const struct gpio_desc *desc);
+int gpiod_get_direction(struct gpio_desc *desc);
 int gpiod_direction_input(struct gpio_desc *desc);
 int gpiod_direction_output(struct gpio_desc *desc, int value);
 int gpiod_direction_output_raw(struct gpio_desc *desc, int value);
-- 
2.1.3

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[PATCH v5 6/7] fs/nfsd: support compiling out splice

2014-11-24 Thread Pieter Smith
The goal of the larger patch set is to completely compile out fs/splice, and
as a result, splice support for all file-systems. This patch ensures that
fs/nfsd falls back to non-splice fs support when CONFIG_SYSCALL_SPLICE is
undefined.

Signed-off-by: Pieter Smith 
---
 net/sunrpc/svc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/net/sunrpc/svc.c b/net/sunrpc/svc.c
index ca8a795..6cacc37 100644
--- a/net/sunrpc/svc.c
+++ b/net/sunrpc/svc.c
@@ -1084,7 +1084,7 @@ svc_process_common(struct svc_rqst *rqstp, struct kvec 
*argv, struct kvec *resv)
goto err_short_len;
 
/* Will be turned off only in gss privacy case: */
-   rqstp->rq_splice_ok = true;
+   rqstp->rq_splice_ok = IS_ENABLED(CONFIG_SPLICE_SYSCALL);
/* Will be turned off only when NFSv4 Sessions are used */
rqstp->rq_usedeferral = true;
rqstp->rq_dropme = false;
-- 
2.1.0

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[PATCH v5 4/7] fs/fuse: support compiling out splice

2014-11-24 Thread Pieter Smith
To implement splice support, fs/fuse makes use of nosteal_pipe_buf_ops. This
struct is exported by fs/splice. The goal of the larger patch set is to
completely compile out fs/splice, so uses of the exported struct need to be
compiled out along with fs/splice.

This patch therefore compiles out splice support in fs/fuse when
CONFIG_SYSCALL_SPLICE is undefined.

Signed-off-by: Pieter Smith 
---
 fs/fuse/dev.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c
index ca88731..e984302 100644
--- a/fs/fuse/dev.c
+++ b/fs/fuse/dev.c
@@ -1191,8 +1191,9 @@ __releases(fc->lock)
  * request_end().  Otherwise add it to the processing list, and set
  * the 'sent' flag.
  */
-static ssize_t fuse_dev_do_read(struct fuse_conn *fc, struct file *file,
-   struct fuse_copy_state *cs, size_t nbytes)
+static ssize_t __maybe_unused
+fuse_dev_do_read(struct fuse_conn *fc, struct file *file,
+struct fuse_copy_state *cs, size_t nbytes)
 {
int err;
struct fuse_req *req;
@@ -1291,6 +1292,7 @@ static ssize_t fuse_dev_read(struct kiocb *iocb, const 
struct iovec *iov,
return fuse_dev_do_read(fc, file, , iov_length(iov, nr_segs));
 }
 
+#ifdef CONFIG_SYSCALL_SPLICE
 static ssize_t fuse_dev_splice_read(struct file *in, loff_t *ppos,
struct pipe_inode_info *pipe,
size_t len, unsigned int flags)
@@ -1368,6 +1370,9 @@ out:
kfree(bufs);
return ret;
 }
+#else /* CONFIG_SYSCALL_SPLICE */
+#define fuse_dev_splice_read NULL
+#endif
 
 static int fuse_notify_poll(struct fuse_conn *fc, unsigned int size,
struct fuse_copy_state *cs)
-- 
2.1.0

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Re: linux-next: manual merge of the tiny tree with the tip tree

2014-11-24 Thread Josh Triplett
On Mon, Nov 24, 2014 at 10:30:10PM -0800, John Stultz wrote:
> On Mon, Nov 24, 2014 at 10:16 PM, Ingo Molnar  wrote:
> >
> > * Stephen Rothwell  wrote:
> >
> >> Hi Josh,
> >>
> >> Today's linux-next merge of the tiny tree got a conflict in
> >> kernel/time/Makefile between commit fd866e2b116b ("time: Rename
> >> udelay_test.c to test_udelay.c") from the tip tree and commit
> >> d1f6d68d03ea ("kernel: time: Compile out NTP support") from the tiny
> >> tree.
> >
> > So I think a timer subsystem commit d1f6d68d03ea with this
> > magnitude of linecount increase:
> >
> >  Signed-off-by: Catalina Mocanu 
> >  [josh: Handle CONFIG_COMPAT=y.]
> >  Reviewed-by: Josh Triplett 
> >  Signed-off-by: Josh Triplett 
> >  ---
> >   drivers/pps/Kconfig|  2 +-
> >   include/linux/timex.h  | 15 +--
> >   init/Kconfig   | 10 ++
> >   kernel/compat.c|  8 ++--
> >   kernel/sys_ni.c|  4 
> >   kernel/time/Makefile   |  3 ++-
> >   kernel/time/ntp_internal.h | 28 
> >   kernel/time/posix-timers.c |  2 ++
> >   kernel/time/time.c |  2 ++
> >   kernel/time/timekeeping.c  |  2 ++
> >   10 files changed, 70 insertions(+), 6 deletions(-)
> >
> > at minimum needs the ack of timer folks, before it can be
> > committed to Git. Or is the tiny tree plan to submit all
> > patches to the appropriate subsystem or gather acks, before
> > sending it upstream?
> 
> Yea.  From first glance d1f6d68d03ea looks fairly broken.
> 
> Returning 0 for ntp_tick_length() (which should be the current tick
> length in NTP_SCALE_SHIFT shifted ns), seems like it would cause major
> timekeeping problems.

Ouch, yeah; I'm impressed the kernel successfully booted that way (which
I did test).

Computing the tick_length to return seems to require a div_u64; is it
safe to initialize a static const with the result of calling div_u64, or
does the intializer need manual constant-folding to make the expression
compile-time computable?

Going by the logic in ntp_update_frequency, it looks like the stub
ntp_tick_length needs to return:

tick_length_base = 0;
tick_usec = TICK_USEC;
second_length = (u64)(tick_usec * NSEC_PER_USEC * USER_HZ) << NTP_SCALE_SHIFT;
new_base = div_u64(second_length, NTP_INTERVAL_FREQ);
tick_length += new_base - tick_length_base;

(tick_length starts out 0, gets new_base - 0 added initially, and every
subsequent time gets 0 added since tick_length_base won't change.)

Substituting and simplifying:

tick_length = new_base
= div_u64(second_length, NTP_INTERVAL_FREQ)
= div_u64((TICK_USEC * NSEC_PER_USEC * USER_HZ) << NTP_SCALE_SHIFT, 
NTP_INTERVAL_FREQ)

The numerator there could potentially be simplified, but I don't see an
obvious way around the division by NTP_INTERVAL_FREQ (defined as HZ).

- Josh Triplett
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[PATCH v5 0/7] kernel tinification: optionally compile out splice family of syscalls (splice, vmsplice, tee and sendfile)

2014-11-24 Thread Pieter Smith
REPO: https://github.com/smipi1/linux-tinification.git

BRANCH: tiny/config-syscall-splice

BACKGROUND: This patch-set forms part of the Linux Kernel Tinification effort (
  https://tiny.wiki.kernel.org/).

GOAL: Support compiling out the splice family of syscalls (splice, vmsplice,
  tee and sendfile) along with all supporting infrastructure if not needed.
  Many embedded systems will not need the splice-family syscalls. Omitting them
  saves space.

HISTORY:
  PATCH v5:
- Fix up commit log still refering to dropped __splice_p()

  PATCH v4:
- Drops __splice_p()
- Let nfsd fall back to non-splice support when splice is compiled out
- Style fixes
  
  PATCH v3:
- Fixup commit logs so that they are consistent with patch strategy
- Style fixes
  
  PATCH v2:
- Avoid the ifdef mess introduced in PATCH v1 by mocking out exported splice
  functions.

STRATEGY:
a. With the goal of eventually compiling out fs/splice.c, several functions
   that are only used in support of the the splice family of syscalls are moved
   into fs/splice.c from fs/read_write.c. The kernel_write function that is not
   used to support the splice syscalls is moved to fs/read_write.c.

b. Introduce an EXPERT kernel configuration option; CONFIG_SYSCALL_SPLICE; to
   compile out the splice family of syscalls. This removes all userspace uses
   of the splice infrastructure.

c. Splice exports an operations struct, nosteal_pipe_buf_ops. Eliminate the 
   uses of this struct when CONFIG_SYSCALL_SPLICE is undefined, so that splice
   can later be compiled out.

d. Let nfsd fall back to non-splice support when splice is compiled out.

e. Compile out fs/splice.c. Functions exported by fs/splice are mocked out with
   failing static inlines. This is done so as to all but eliminate the
   maintenance burden on file-system drivers.

RESULTS: A tinyconfig bloat-o-meter score for the entire patch-set:

add/remove: 0/41 grow/shrink: 5/7 up/down: 23/-8422 (-8399)
function old new   delta
sys_pwritev  115 122  +7
sys_preadv   115 122  +7
fdput_pos 29  36  +7
sys_pwrite64 115 116  +1
sys_pread64  115 116  +1
pipe_to_null   4   -  -4
generic_pipe_buf_nosteal   6   -  -6
spd_release_page  10   - -10
fdput 11   - -11
PageUptodate  22  11 -11
lock_page 36  24 -12
signal_pending39  26 -13
fdget 56  42 -14
page_cache_pipe_buf_release   16   - -16
user_page_pipe_buf_ops20   - -20
splice_write_null 24   4 -20
page_cache_pipe_buf_ops   20   - -20
nosteal_pipe_buf_ops  20   - -20
default_pipe_buf_ops  20   - -20
generic_splice_sendpage   24   - -24
user_page_pipe_buf_steal  25   - -25
splice_shrink_spd 27   - -27
pipe_to_user  43   - -43
direct_splice_actor   47   - -47
default_file_splice_write 49   - -49
wakeup_pipe_writers   54   - -54
wakeup_pipe_readers   54   - -54
write_pipe_buf71   - -71
page_cache_pipe_buf_confirm   80   - -80
splice_grow_spd   87   - -87
do_splice_to  87   - -87
ipipe_prep.part   92   - -92
splice_from_pipe  93   - -93
splice_from_pipe_next107   --107
pipe_to_sendpage 109   --109
page_cache_pipe_buf_steal114   --114
opipe_prep.part  119   --119
sys_sendfile 122   --122
generic_file_splice_read 131   8-123
sys_sendfile64   126   --126
sys_vmsplice 137   --137
do_splice_direct 148   --148
vmsplice_to_user 205   --205
__splice_from_pipe   246   --246
splice_direct_to_actor   348   --348
splice_to_pipe

Re: [PATCH v2 5/5] btrfs: enable swap file support

2014-11-24 Thread Brendan Hide

On 2014/11/25 00:03, Omar Sandoval wrote:

[snip]

The snapshot issue is a little tricker to resolve. I see a few options:

1. Just do the COW and hope for the best
2. As part of btrfs_swap_activate, COW any shared extents. If a snapshot
happens while a swap file is active, we'll fall back to 1.
3. Clobber any swap file extents which are in a snapshot, i.e., always use the
existing extent.

I'm partial to 3, as it's the simplest approach, and I don't think it makes
much sense for a swap file to be in a snapshot anyways. I'd appreciate any
comments that anyone might have.


Personally, 3 seems pragmatic - but not necessarily "correct". :-/

--
__
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http://swiftspirit.co.za/
http://www.webafrica.co.za/?AFF1E97

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Re: [PATCH v2 2/3] PM / devfreq: tegra: add devfreq driver for Tegra Activity Monitor

2014-11-24 Thread MyungJoo Ham
> The ACTMON block can monitor several counters, providing averaging and firing
> interrupts based on watermarking configuration. This implementation monitors
> the MCALL and MCCPU counters to choose an appropriate frequency for the
> external memory clock.
> 
> This patch is based on work by Alex Frid  and Mikko
> Perttunen .
> 
> Signed-off-by: Tomeu Vizoso 

Signed-off-by: MyungJoo Ham 

How are you going to integrate other two patches?
May I just go ahead with this patch only?


Cheers,
MyungJoo.

> 
> ---
> 
> v2:   * Use devfreq
> ---
>  drivers/devfreq/Kconfig |  10 +
>  drivers/devfreq/Makefile|   1 +
>  drivers/devfreq/tegra-devfreq.c | 718 
> 
>  3 files changed, 729 insertions(+)
>  create mode 100644 drivers/devfreq/tegra-devfreq.c
> 
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Re: [PATCH v2] clk: Add PWM clock driver

2014-11-24 Thread Mike Turquette
Quoting Philipp Zabel (2014-11-03 01:31:18)
> Some board designers, when running out of clock output pads, decide to
> (mis)use PWM output pads to provide a clock to external components.
> This driver supports this practice by providing an adapter between the
> PWM and clock bindings in the device tree. As the PWM bindings specify
> the period in the device tree, this is a fixed clock.
> 
> Signed-off-by: Philipp Zabel 
> ---
> I'm resending this because last time the linux-pwm list was not in Cc:
> So far I have not received any comments on the patch itself. I have used
> it on a BoundaryDevices Nitrogen6X board to produce a master clock for
> the OV5640 MIPI CSI-2 camera module.
> 
> Changes since v1:
>  - none (rebased onto v3.18-rc3)

Hi Philipp,

Thanks for testing this. Is the Nitrogen6X board merged upstream? I'm OK
with the patch but prefer to merge things when a consumer is ready to
use it. I guess you are missing a patch to add the pwm-clock bits to the
Nitrogen6X dts?

Regards,
Mike

> ---
>  .../devicetree/bindings/clock/pwm-clock.txt|  23 +
>  drivers/clk/Kconfig|   7 ++
>  drivers/clk/Makefile   |   1 +
>  drivers/clk/clk-pwm.c  | 110 
> +
>  4 files changed, 141 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/pwm-clock.txt
>  create mode 100644 drivers/clk/clk-pwm.c
> 
> diff --git a/Documentation/devicetree/bindings/clock/pwm-clock.txt 
> b/Documentation/devicetree/bindings/clock/pwm-clock.txt
> new file mode 100644
> index 000..d127d17
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/pwm-clock.txt
> @@ -0,0 +1,23 @@
> +Binding for an external clock signal driven by a PWM pin.
> +
> +This binding uses the common clock binding[1] and the common PWM binding[2].
> +
> +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
> +[2] Documentation/devicetree/bindings/pwm/pwm.txt
> +
> +Required properties:
> +- compatible : shall be "pwm-clock".
> +- #clock-cells : from common clock binding; shall be set to 0.
> +- pwms : from common PWM binding; this determines the clock frequency
> +  via the PWM period given in the pwm-specifier.
> +
> +Optional properties:
> +- clock-output-names : From common clock binding.
> +
> +Example:
> +   clock {
> +   compatible = "pwm-clock";
> +   #clock-cells = <0>;
> +   clock-output-names = "mipi_mclk";
> +   pwms = < 0 40>; /* 1 / 40 ns = 25 MHz */
> +   };
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index 455fd17..36a6918a 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -129,6 +129,13 @@ config COMMON_CLK_PALMAS
>   This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
>   using common clock framework.
>  
> +config COMMON_CLK_PWM
> +   bool "Clock driver for PWMs used as clock outputs"
> +   depends on PWM
> +   ---help---
> + Adapter driver so that any PWM output can be (mis)used as clock 
> signal
> + at 50% duty cycle.
> +
>  config COMMON_CLK_PXA
> def_bool COMMON_CLK && ARCH_PXA
> ---help---
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index d5fba5b..6a0c5cf 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -40,6 +40,7 @@ obj-$(CONFIG_ARCH_U300)   += clk-u300.o
>  obj-$(CONFIG_ARCH_VT8500)  += clk-vt8500.o
>  obj-$(CONFIG_COMMON_CLK_WM831X)+= clk-wm831x.o
>  obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o
> +obj-$(CONFIG_COMMON_CLK_PWM)   += clk-pwm.o
>  obj-$(CONFIG_COMMON_CLK_AT91)  += at91/
>  obj-$(CONFIG_ARCH_BCM_MOBILE)  += bcm/
>  obj-$(CONFIG_ARCH_BERLIN)  += berlin/
> diff --git a/drivers/clk/clk-pwm.c b/drivers/clk/clk-pwm.c
> new file mode 100644
> index 000..8f747b3
> --- /dev/null
> +++ b/drivers/clk/clk-pwm.c
> @@ -0,0 +1,110 @@
> +/*
> + * Copyright (C) 2014 Philipp Zabel, Pengutronix
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * PWM (mis)used as clock output
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +struct clk_pwm {
> +   struct clk_hw hw;
> +   struct pwm_device *pwm;
> +};
> +
> +#define to_clk_pwm(_hw) container_of(_hw, struct clk_pwm, hw)
> +
> +static int clk_pwm_enable(struct clk_hw *hw)
> +{
> +   struct clk_pwm *clk_pwm = to_clk_pwm(hw);
> +
> +   return pwm_enable(clk_pwm->pwm);
> +}
> +
> +static void clk_pwm_disable(struct clk_hw *hw)
> +{
> +   struct clk_pwm *clk_pwm = to_clk_pwm(hw);
> +
> +   pwm_disable(clk_pwm->pwm);
> +}
> +
> +static unsigned long clk_pwm_recalc_rate(struct clk_hw *hw,
> +  

RE: [PATCH v3 3/3] usb: phy: hold wakeupsource when USB is enumerated in peripheral mode

2014-11-24 Thread Peter Chen
 
> 
> usb: phy: hold wakeupsource when USB is enumerated in peripheral mode
> 
> Some systems require a mechanism to prevent system to enter into suspend
> state when USB is connected and enumerated in peripheral mode.
> 
> This patch provides an interface to hold a wakeupsource to prevent suspend.
> PHY drivers can use this interface when USB is connected and enumerated in
> peripheral mode.
> 
> A timed wakeupsource is temporarily held on USB disconnect events, to allow
> the rest of the system to react to the USB disconnection (dropping host
> sessions, updating charger status, etc.) prior to re-allowing suspend.
> 

Hi Kiran & Felipe,

Just two questions for this series

- Will it be the default behavior for all peripheral drivers?
- If the peripheral driver's PHY driver does not vbus event, how to support it?
For example, chipidea udc driver has its vbus interface at its controller 
register.

Peter

> Cc: Felipe Balbi 
> Cc: Greg Kroah-Hartman 
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-...@vger.kernel.org
> Cc: Android Kernel Team 
> Cc: John Stultz 
> Cc: Sumit Semwal 
> Cc: Arve Hjønnevåg 
> Cc: Benoit Goby 
> [Original patch in Android from Todd]
> Cc: Todd Poynor 
> Signed-off-by: Kiran Raparthy 
> ---
>  drivers/usb/phy/phy.c   | 29 +++--
>  include/linux/usb/phy.h |  5 +
>  2 files changed, 32 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/usb/phy/phy.c b/drivers/usb/phy/phy.c index
> b4066a0..8c87bc3 100644
> --- a/drivers/usb/phy/phy.c
> +++ b/drivers/usb/phy/phy.c
> @@ -331,6 +331,7 @@ int usb_add_phy(struct usb_phy *x, enum
> usb_phy_type type)
>   int ret = 0;
>   unsigned long   flags;
>   struct usb_phy  *phy;
> + char wsource_name[40];
> 
>   if (x->type != USB_PHY_TYPE_UNDEFINED) {
>   dev_err(x->dev, "not accepting initialized PHY %s\n", x->label);
> @@ -353,6 +354,10 @@ int usb_add_phy(struct usb_phy *x, enum
> usb_phy_type type)
>   x->type = type;
>   list_add_tail(>head, _list);
> 
> + snprintf(wsource_name, sizeof(wsource_name), "vbus-%s",
> + dev_name(x->dev));
> + wakeup_source_init(>wsource, wsource_name);
> +
>  out:
>   spin_unlock_irqrestore(_lock, flags);
>   return ret;
> @@ -404,6 +409,7 @@ void usb_remove_phy(struct usb_phy *x)
> 
>   spin_lock_irqsave(_lock, flags);
>   if (x) {
> + wakeup_source_trash(>wsource);
>   list_for_each_entry(phy_bind, _bind_list, list)
>   if (phy_bind->phy == x)
>   phy_bind->phy = NULL;
> @@ -448,13 +454,32 @@ int usb_bind_phy(const char *dev_name, u8 index,
> EXPORT_SYMBOL_GPL(usb_bind_phy);
> 
>  /**
> - * usb_phy_set_event - set event to phy event
> + * usb_phy_set_event - set event to phy event and
> + * hold/temporarily hold wakeupsource
>   * @x: the phy returned by usb_get_phy();
>   *
> - * This sets event to phy event
> + * This holds per-PHY wakeupsource/timed wakeupsource
>   */
>  void usb_phy_set_event(struct usb_phy *x, unsigned long event)  {
> +
>   x->last_event = event;
> +
> + switch (event) {
> + case USB_EVENT_ENUMERATED:
> + __pm_stay_awake(>wsource);
> + break;
> +
> + case USB_EVENT_NONE:
> + case USB_EVENT_ID:
> + case USB_EVENT_VBUS:
> + case USB_EVENT_CHARGER:
> + __pm_wakeup_event(>wsource,
> +   USB_PHY_DEFAULT_WAKEUP_SRC_TIMEOUT);
> + break;
> +
> + default:
> + break;
> + }
>  }
>  EXPORT_SYMBOL_GPL(usb_phy_set_event);
> diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h index
> f499c23..63a56bf 100644
> --- a/include/linux/usb/phy.h
> +++ b/include/linux/usb/phy.h
> @@ -12,6 +12,8 @@
>  #include 
>  #include 
> 
> +#define USB_PHY_DEFAULT_WAKEUP_SRC_TIMEOUT
>   msecs_to_jiffies(2000)
> +
>  enum usb_phy_interface {
>   USBPHY_INTERFACE_MODE_UNKNOWN,
>   USBPHY_INTERFACE_MODE_UTMI,
> @@ -88,6 +90,9 @@ struct usb_phy {
>   /* for notification of usb_phy_events */
>   struct atomic_notifier_head notifier;
> 
> + /* wakeup source */
> + struct wakeup_sourcewsource;
> +
>   /* to pass extra port status to the root hub */
>   u16 port_status;
>   u16 port_change;
> --
> 1.9.1
> 
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Re: [PATCH 1/1] platform: x86: Deletion of checks before backlight_device_unregister()

2014-11-24 Thread Darren Hart
On Mon, Nov 24, 2014 at 08:40:22PM +0100, SF Markus Elfring wrote:
> From: Markus Elfring 
> Date: Mon, 24 Nov 2014 20:30:29 +0100
> 
> The backlight_device_unregister() function tests whether its argument is NULL
> and then returns immediately. Thus the test around the call is not needed.
> 
> This issue was detected by using the Coccinelle software.
> 
> Signed-off-by: Markus Elfring 

Thanks Markus, queued.

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Re: [PATCH 1/1] Sony-laptop: Deletion of an unnecessary check before the function call "pci_dev_put"

2014-11-24 Thread Darren Hart
On Mon, Nov 24, 2014 at 10:04:16PM +0100, SF Markus Elfring wrote:
> From: Markus Elfring 
> Date: Mon, 24 Nov 2014 22:00:21 +0100
> 
> The pci_dev_put() function tests whether its argument is NULL
> and then returns immediately. Thus the test around the call
> is not needed.
> 
> This issue was detected by using the Coccinelle software.
> 
> Signed-off-by: Markus Elfring 

Thanks Markus, queued.

-- 
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Re: [PATCH] mm: add parameter to disable faultaround

2014-11-24 Thread Andrew Morton
On Tue, 25 Nov 2014 15:51:58 +0900 Chanho Min  wrote:

> The faultaround improves the file read performance, whereas pages which
> can be dropped by drop_caches are reduced. On some systems, The amount of
> freeable pages under memory pressure is more important than read
> performance.

The faultaround pages *are* freeable.  Perhaps you meant "free" here.

Please tell us a great deal about the problem which you are trying to
solve.  What sort of system, what sort of workload, what is bad about
the behaviour which you are observing, etc.


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[PATCH v8 7/8] regulator: sky81452: Modify Device Tree structure

2014-11-24 Thread gyungoh
From: Gyungoh Yoo 

Signed-off-by: Gyungoh Yoo 
---
Changes v8:
Changed the DT parsing of regulator using regulator_node and of_match

Changes v7:
Modified licensing text to GPLv2
Splitted Kconfig renaming from DT patch

Changes v6:
Added new line character at the end of line of dev_err()

Changes v5:
Changed DT for regulator : 'lout' node should be defined under 'regulator'
Removed compatible string
Modified to return EINVAL when of_node is NULL

Changes v4:
Removed MODULE_VERSION()
Modified license to GPLv2

Changes v3:
Modified to return ENODATA when of_node is NULL
Modified the messages in error cases

Changes v2:
Added 'compatible' attribute in the driver
Added message for exception or errors.

 drivers/regulator/sky81452-regulator.c | 46 +++---
 1 file changed, 9 insertions(+), 37 deletions(-)

diff --git a/drivers/regulator/sky81452-regulator.c 
b/drivers/regulator/sky81452-regulator.c
index 97aff0c..6478606 100644
--- a/drivers/regulator/sky81452-regulator.c
+++ b/drivers/regulator/sky81452-regulator.c
@@ -5,9 +5,8 @@
  * Author : Gyungoh Yoo 
  *
  * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2, or (at your option) any
- * later version.
+ * under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -52,6 +51,8 @@ static const struct regulator_linear_range 
sky81452_reg_ranges[] = {
 
 static const struct regulator_desc sky81452_reg = {
.name = "LOUT",
+   .of_match = of_match_ptr("lout"),
+   .regulators_node = of_match_ptr("regulator"),
.ops = _reg_ops,
.type = REGULATOR_VOLTAGE,
.owner = THIS_MODULE,
@@ -64,30 +65,6 @@ static const struct regulator_desc sky81452_reg = {
.enable_mask = SKY81452_LEN,
 };
 
-#ifdef CONFIG_OF
-static struct regulator_init_data *sky81452_reg_parse_dt(struct device *dev)
-{
-   struct regulator_init_data *init_data;
-   struct device_node *np;
-
-   np = of_get_child_by_name(dev->parent->of_node, "regulator");
-   if (unlikely(!np)) {
-   dev_err(dev, "regulator node not found");
-   return NULL;
-   }
-
-   init_data = of_get_regulator_init_data(dev, np);
-
-   of_node_put(np);
-   return init_data;
-}
-#else
-static struct regulator_init_data *sky81452_reg_parse_dt(struct device *dev)
-{
-   return ERR_PTR(-EINVAL);
-}
-#endif
-
 static int sky81452_reg_probe(struct platform_device *pdev)
 {
struct device *dev = >dev;
@@ -95,20 +72,16 @@ static int sky81452_reg_probe(struct platform_device *pdev)
struct regulator_config config = { };
struct regulator_dev *rdev;
 
-   if (!init_data) {
-   init_data = sky81452_reg_parse_dt(dev);
-   if (IS_ERR(init_data))
-   return PTR_ERR(init_data);
-   }
-
-   config.dev = dev;
+   config.dev = dev->parent;
config.init_data = init_data;
config.of_node = dev->of_node;
config.regmap = dev_get_drvdata(dev->parent);
 
rdev = devm_regulator_register(dev, _reg, );
-   if (IS_ERR(rdev))
+   if (IS_ERR(rdev)) {
+   dev_err(dev, "failed to register. err=%ld\n", PTR_ERR(rdev));
return PTR_ERR(rdev);
+   }
 
platform_set_drvdata(pdev, rdev);
 
@@ -126,5 +99,4 @@ module_platform_driver(sky81452_reg_driver);
 
 MODULE_DESCRIPTION("Skyworks SKY81452 Regulator driver");
 MODULE_AUTHOR("Gyungoh Yoo ");
-MODULE_LICENSE("GPL");
-MODULE_VERSION("1.0");
+MODULE_LICENSE("GPL v2");
-- 
1.9.1

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[PATCH v8 5/8] devicetree: Add vendor prefix for Skyworks Solutions, Inc.

2014-11-24 Thread gyungoh
From: Gyungoh Yoo 

Signed-off-by: Gyungoh Yoo 
---
Changes v8:
Nothing

Changes v7:
Nothing

Changes v6:
Nothing

Changes v5:
Nothing

Changes v4:
Nothing

Changes v3:
Nothing

Changes v2:
Added vendor prefix for Skyworks Solutions, Inc.

 Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt 
b/Documentation/devicetree/bindings/vendor-prefixes.txt
index a344ec2..68143f0 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -140,6 +140,7 @@ sii Seiko Instruments, Inc.
 silergySilergy Corp.
 sirf   SiRF Technology, Inc.
 sitronix   Sitronix Technology Corporation
+skyworks   Skyworks Solutions, Inc.
 smsc   Standard Microsystems Corporation
 snps   Synopsys, Inc.
 solidrun   SolidRun
-- 
1.9.1

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[PATCH v8 6/8] devicetree: i2c: Add SKY81452 to the Trivial Devices list

2014-11-24 Thread gyungoh
From: Gyungoh Yoo 

Signed-off-by: Gyungoh Yoo 
---
Changes v8:
Nothing

Changes v7:
Nothing

Changes v6:
Nothing

Changes v5:
Nothing

Changes v4:
Nothing

Changes v3:
Nothing

Changes v2:
Add SKY81452 to the Trivial Devices list

 Documentation/devicetree/bindings/i2c/trivial-devices.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt 
b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
index fbde415..122fa1e 100644
--- a/Documentation/devicetree/bindings/i2c/trivial-devices.txt
+++ b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
@@ -77,6 +77,7 @@ ramtron,24c64 i2c serial eeprom  (24cxx)
 ricoh,rs5c372a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
 samsung,24ad0xd1   S524AD0XF1 (128K/256K-bit Serial EEPROM for Low Power)
 sii,s35390a2-wire CMOS real-time clock
+skyworks,sky81452  Skyworks SKY81452: Six-Channel White LED Driver with 
Touch Panel Bias Supply
 st-micro,24c256i2c serial eeprom  (24cxx)
 stm,m41t00 Serial Access TIMEKEEPER
 stm,m41t62 Serial real-time clock (RTC) with alarm
-- 
1.9.1

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[PATCH v8 8/8] devicetree: regulator: sky81452: Modify Device Tree structure

2014-11-24 Thread gyungoh
From: Gyungoh Yoo 

Signed-off-by: Gyungoh Yoo 
---
Changes v8:
Nothing

Changes v7:
Nothing

Changes v6:
Nothing

Changes v5:
Changed DT for regulator : 'lout' node should be defined under 'regulator'
Removed compatible string from sky81452-regulator driver

Changes v4:
Nothing

Changes v3:
Nothing

Changes v2:
Added 'compatible' attribute in the driver

 .../devicetree/bindings/regulator/sky81452-regulator.txt   | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/regulator/sky81452-regulator.txt 
b/Documentation/devicetree/bindings/regulator/sky81452-regulator.txt
index 882455e..f9acbc1 100644
--- a/Documentation/devicetree/bindings/regulator/sky81452-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/sky81452-regulator.txt
@@ -1,6 +1,7 @@
 SKY81452 voltage regulator
 
 Required properties:
+- regulator node named lout.
 - any required generic properties defined in regulator.txt
 
 Optional properties:
@@ -9,8 +10,9 @@ Optional properties:
 Example:
 
regulator {
-   /* generic regulator properties */
-   regulator-name = "touch_en";
-   regulator-min-microvolt = <450>;
-   regulator-max-microvolt = <800>;
+   lout {
+   regulator-name = "sky81452-lout";
+   regulator-min-microvolt = <450>;
+   regulator-max-microvolt = <800>;
+   };
};
-- 
1.9.1

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[PATCH v8 4/8] devicetree: backlight: Add new SKY81452 backlight binding

2014-11-24 Thread gyungoh
From: Gyungoh Yoo 

Signed-off-by: Gyungoh Yoo 
---
Changes v8:
Renamed property names for backlight with vendor prefix
Modified gpio-enable property to generic property for GPIO
Made up the example for backlight DT

Changes v7:
Nothing

Changes v6:
Nothing

Changes v5:
Nothing

Changes v4:
Nothing

Changes v3:
Nothing

Changes v2:
Added reg attribute for I2C slave address

 .../video/backlight/sky81452-backlight.txt | 29 ++
 1 file changed, 29 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/video/backlight/sky81452-backlight.txt

diff --git 
a/Documentation/devicetree/bindings/video/backlight/sky81452-backlight.txt 
b/Documentation/devicetree/bindings/video/backlight/sky81452-backlight.txt
new file mode 100644
index 000..8daebf5
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/backlight/sky81452-backlight.txt
@@ -0,0 +1,29 @@
+SKY81452-backlight bindings
+
+Required properties:
+- compatible   : Must be "skyworks,sky81452-backlight"
+
+Optional properties:
+- name : Name of backlight device. Default is 'lcd-backlight'.
+- gpios: GPIO to use to EN pin.
+   See Documentation/devicetree/bindings/gpio/gpio.txt
+- skyworks,en-channels : Enable mask for current sink channel 1 to 6.
+- skyworks,ignore-pwm  : Ignore both PWM input
+- skyworks,dpwm-mode   : Enable DPWM dimming mode, otherwise Analog dimming.
+- skyworks,phase-shift : Enable phase shift mode
+- skyworks,ovp-level   : Over-voltage protection level.
+   Should be between 14 or 28V.
+- skyworks,short-detection-threshold   : It should be one of 4, 5, 6 and 7V.
+- skyworks,current-limit   : It should be 2300mA or 2750mA.
+
+Example:
+
+   backlight {
+   compatible = "skyworks,sky81452-backlight";
+   name = "pwm-backlight";
+   skyworks,en-channels = <0x3f>;
+   skyworks,ignore-pwm;
+   skyworks,phase-shift;
+   skyworks,ovp-level = <20>;
+   skyworks,current-limit = <2300>;
+   };
-- 
1.9.1

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[PATCH v8 2/8] backlight: Add support Skyworks SKY81452 backlight driver

2014-11-24 Thread gyungoh
From: Gyungoh Yoo 

Signed-off-by: Gyungoh Yoo 
---
Changes v8:
Renamed property names for backlight with vendor prefix
Modified gpio-enable property to generic property for GPIO

Changes v7:
Modified licensing text to GPLv2

Changes v6:
Added new line character at the end of line of dev_err()

Changes v5:
Move sky81452-backlight.h to include/linux/platform_data

Changes v4:
Reordering header files for readability
Removed calling to backlight_device_unregister()
Removed MODULE_VERSION()
Modified license to GPLv2

Changes v3:
Modified DBG messages

Changes v2:
Added 'compatible' attribute in the driver
Added message for exception or errors

 drivers/video/backlight/Kconfig  |  10 +
 drivers/video/backlight/Makefile |   1 +
 drivers/video/backlight/sky81452-backlight.c | 340 +++
 include/linux/platform_data/sky81452-backlight.h |  46 +++
 4 files changed, 397 insertions(+)
 create mode 100644 drivers/video/backlight/sky81452-backlight.c
 create mode 100644 include/linux/platform_data/sky81452-backlight.h

diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index 8d03924..2586fdd 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -409,6 +409,16 @@ config BACKLIGHT_PANDORA
  If you have a Pandora console, say Y to enable the
  backlight driver.
 
+config BACKLIGHT_SKY81452
+   tristate "Backlight driver for SKY81452"
+   depends on BACKLIGHT_CLASS_DEVICE && MFD_SKY81452
+   help
+ If you have a Skyworks SKY81452, say Y to enable the
+ backlight driver.
+
+ To compile this driver as a module, choose M here: the module will
+ be called sky81452-backlight
+
 config BACKLIGHT_TPS65217
tristate "TPS65217 Backlight"
depends on BACKLIGHT_CLASS_DEVICE && MFD_TPS65217
diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
index fcd50b73..d67073f 100644
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_BACKLIGHT_PANDORA)   += pandora_bl.o
 obj-$(CONFIG_BACKLIGHT_PCF50633)   += pcf50633-backlight.o
 obj-$(CONFIG_BACKLIGHT_PWM)+= pwm_bl.o
 obj-$(CONFIG_BACKLIGHT_SAHARA) += kb3886_bl.o
+obj-$(CONFIG_BACKLIGHT_SKY81452)   += sky81452-backlight.o
 obj-$(CONFIG_BACKLIGHT_TOSA)   += tosa_bl.o
 obj-$(CONFIG_BACKLIGHT_TPS65217)   += tps65217_bl.o
 obj-$(CONFIG_BACKLIGHT_WM831X) += wm831x_bl.o
diff --git a/drivers/video/backlight/sky81452-backlight.c 
b/drivers/video/backlight/sky81452-backlight.c
new file mode 100644
index 000..45e575f
--- /dev/null
+++ b/drivers/video/backlight/sky81452-backlight.c
@@ -0,0 +1,340 @@
+/*
+ * sky81452-backlight.cSKY81452 backlight driver
+ *
+ * Copyright 2014 Skyworks Solutions Inc.
+ * Author : Gyungoh Yoo 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* registers */
+#define SKY81452_REG0  0x00
+#define SKY81452_REG1  0x01
+#define SKY81452_REG2  0x02
+#define SKY81452_REG4  0x04
+#define SKY81452_REG5  0x05
+
+/* bit mask */
+#define SKY81452_CS0xFF
+#define SKY81452_EN0x3F
+#define SKY81452_IGPW  0x20
+#define SKY81452_PWMMD 0x10
+#define SKY81452_PHASE 0x08
+#define SKY81452_ILIM  0x04
+#define SKY81452_VSHRT 0x03
+#define SKY81452_OCP   0x80
+#define SKY81452_OTMP  0x40
+#define SKY81452_SHRT  0x3F
+#define SKY81452_OPN   0x3F
+
+#define SKY81452_DEFAULT_NAME "lcd-backlight"
+#define SKY81452_MAX_BRIGHTNESS(SKY81452_CS + 1)
+
+#define CTZ(b) __builtin_ctz(b)
+
+static int sky81452_bl_update_status(struct backlight_device *bd)
+{
+   const struct sky81452_bl_platform_data *pdata =
+   dev_get_platdata(bd->dev.parent);
+   const unsigned int brightness = (unsigned int)bd->props.brightness;
+   struct regmap *regmap = bl_get_data(bd);
+   int ret;
+
+   if (brightness > 0) {
+   ret = regmap_write(regmap, SKY81452_REG0, brightness - 1);
+   if (IS_ERR_VALUE(ret))
+   return ret;
+
+   return regmap_update_bits(regmap, SKY81452_REG1, SKY81452_EN,
+   pdata->enable << CTZ(SKY81452_EN));
+   }
+
+   return 

[PATCH v8 3/8] devicetree: mfd: Add new SKY81452 mfd binding

2014-11-24 Thread gyungoh
From: Gyungoh Yoo 

Signed-off-by: Gyungoh Yoo 
---
Changes v8:
Made up the example for backlight DT

Changes v7:
Nothing

Changes v6:
Nothing

Changes v5:
Changed DT for regulator : 'lout' node should be defined under 'regulator'
Removed compatible string from sky81452-regulator driver

Changes v4:
Nothing

Changes v3:
Nothing

Changes v2:
Added reg attribute for I2C slave address

 Documentation/devicetree/bindings/mfd/sky81452.txt | 36 ++
 1 file changed, 36 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/sky81452.txt

diff --git a/Documentation/devicetree/bindings/mfd/sky81452.txt 
b/Documentation/devicetree/bindings/mfd/sky81452.txt
new file mode 100644
index 000..ab71473
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/sky81452.txt
@@ -0,0 +1,36 @@
+SKY81452 bindings
+
+Required properties:
+- compatible   : Must be "skyworks,sky81452"
+- reg  : I2C slave address
+
+Required child nodes:
+- backlight: container node for backlight following the binding
+   in video/backlight/sky81452-backlight.txt
+- regulator: container node for regulators following the binding
+   in regulator/sky81452-regulator.txt
+
+Example:
+
+   sky81452@2c {
+   compatible = "skyworks,sky81452";
+   reg = <0x2c>;
+
+   backlight {
+   compatible = "skyworks,sky81452-backlight";
+   name = "pwm-backlight";
+   skyworks,en-channels = <0x3f>;
+   skyworks,ignore-pwm;
+   skyworks,phase-shift;
+   skyworks,ovp-level = <20>;
+   skyworks,current-limit = <2300>;
+   };
+
+   regulator {
+   lout {
+   regulator-name = "sky81452-lout";
+   regulator-min-microvolt = <450>;
+   regulator-max-microvolt = <800>;
+   };
+   };
+   };
-- 
1.9.1

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[PATCH v8 1/8] mfd: Add support for Skyworks SKY81452 driver

2014-11-24 Thread gyungoh
From: Gyungoh Yoo 

Signed-off-by: Gyungoh Yoo 
Acked-by: Lee Jones 
---
Changes v8:
Nothing

Changes v7:
Modified licensing text to GPLv2

Changes v6:
Added new line character at the end of line of dev_err()

Changes v5:
Move sky81452-backlight.h to include/linux/platform_data

Changes v4:
Removed MODULE_VERSION()
Modified license to GPLv2

Changes v3:
Fixed the backlight name from 'sky81452-bl' to 'sky81452-backlight'
Assigned mfd_cell.of_compatible for binding device node
Modified error messages

Changes v2:
Renamed CONFIG_SKY81452 to CONFIG_MFD_SKY81452
Changed the dependency from I2C=y to I2C, for CONFIG_MFD_SKY81452
Added message for exception or errors

 drivers/mfd/Kconfig  |  12 +
 drivers/mfd/Makefile |   1 +
 drivers/mfd/sky81452.c   | 108 +++
 include/linux/mfd/sky81452.h |  31 +
 4 files changed, 152 insertions(+)
 create mode 100644 drivers/mfd/sky81452.c
 create mode 100644 include/linux/mfd/sky81452.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 1456ea7..a54244c 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -693,6 +693,18 @@ config MFD_SM501_GPIO
 lines on the SM501. The platform data is used to supply the
 base number for the first GPIO line to register.
 
+config MFD_SKY81452
+   tristate "Skyworks Solutions SKY81452"
+   select MFD_CORE
+   select REGMAP_I2C
+   depends on I2C
+   help
+ This is the core driver for the Skyworks SKY81452 backlight and
+ voltage regulator device.
+
+ This driver can also be built as a module.  If so, the module
+ will be called sky81452.
+
 config MFD_SMSC
bool "SMSC ECE1099 series chips"
depends on I2C=y
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 8bd54b1..d9683ea 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -174,6 +174,7 @@ obj-$(CONFIG_MFD_STW481X)   += stw481x.o
 obj-$(CONFIG_MFD_IPAQ_MICRO)   += ipaq-micro.o
 obj-$(CONFIG_MFD_MENF21BMC)+= menf21bmc.o
 obj-$(CONFIG_MFD_HI6421_PMIC)  += hi6421-pmic-core.o
+obj-$(CONFIG_MFD_SKY81452) += sky81452.o
 
 intel-soc-pmic-objs:= intel_soc_pmic_core.o intel_soc_pmic_crc.o
 obj-$(CONFIG_INTEL_SOC_PMIC)   += intel-soc-pmic.o
diff --git a/drivers/mfd/sky81452.c b/drivers/mfd/sky81452.c
new file mode 100644
index 000..b0c9b04
--- /dev/null
+++ b/drivers/mfd/sky81452.c
@@ -0,0 +1,108 @@
+/*
+ * sky81452.c  SKY81452 MFD driver
+ *
+ * Copyright 2014 Skyworks Solutions Inc.
+ * Author : Gyungoh Yoo 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static const struct regmap_config sky81452_config = {
+   .reg_bits = 8,
+   .val_bits = 8,
+};
+
+static int sky81452_probe(struct i2c_client *client,
+   const struct i2c_device_id *id)
+{
+   struct device *dev = >dev;
+   const struct sky81452_platform_data *pdata = dev_get_platdata(dev);
+   struct mfd_cell cells[2];
+   struct regmap *regmap;
+   int ret;
+
+   if (!pdata) {
+   pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+   if (!pdata)
+   return -ENOMEM;
+   }
+
+   regmap = devm_regmap_init_i2c(client, _config);
+   if (IS_ERR(regmap)) {
+   dev_err(dev, "failed to initialize.err=%ld\n", PTR_ERR(regmap));
+   return PTR_ERR(regmap);
+   }
+
+   i2c_set_clientdata(client, regmap);
+
+   memset(cells, 0, sizeof(cells));
+   cells[0].name = "sky81452-backlight";
+   cells[0].of_compatible = "skyworks,sky81452-backlight";
+   cells[0].platform_data = pdata->bl_pdata;
+   cells[0].pdata_size = sizeof(*pdata->bl_pdata);
+   cells[1].name = "sky81452-regulator";
+   cells[1].platform_data = pdata->regulator_init_data;
+   cells[1].pdata_size = sizeof(*pdata->regulator_init_data);
+
+   ret = mfd_add_devices(dev, -1, cells, ARRAY_SIZE(cells), NULL, 0, NULL);
+   if (ret)
+   dev_err(dev, "failed to add child devices. err=%d\n", ret);
+
+   return ret;
+}
+
+static int sky81452_remove(struct i2c_client *client)
+{
+   mfd_remove_devices(>dev);
+   return 0;
+}
+
+static const struct i2c_device_id sky81452_ids[] = {
+   { "sky81452" },
+   { }
+};

[PATCH v8 0/8] Add Skyworks SKY81452 device drivers

2014-11-24 Thread gyungoh
From: Gyungoh Yoo 

This patch set includes regulator and backlight driver for SKY81452.
Also it includes documents for device tree and module.
The initial version of sky81452-regulator was applied. Fo this, incremental
patches are included.

v8:
Renamed property names for backlight with vendor prefix
Modified gpio-enable property to generic property for GPIO
Made up the example for backlight DT
Changed the DT parsing of regulator using regulator_node and of_match

v7:
Modified licensing text to GPLv2
Splitted Kconfig renaming from DT patch

v6:
Added new line character at the end of line of dev_err()

v5:
Changed DT for regulator : 'lout' node should be defined under 'regulator'
Removed compatible string from sky81452-regulator driver
Modified sky81452-regulator to return EINVAL when of_node is NULL
Move sky81452-backlight.h to include/linux/platform_data

v4:
Removed MODULE_VERSION()
Modified license to GPLv2
Removed calling to backlight_device_unregister() in sky81452-backlight

v3:
Cleaned-up DBG messages
Cleaned-up DT
Fixed the backlight name from 'sky81452-bl' to 'sky81452-backlight'
Assigned mfd_cell.of_compatible for binding device node
Modified error messages
Modified sky81452-regulator to return ENODATA when of_node is NULL

v2:
Split the patches for each sub-system
Added 'reg' attribute for I2C address in device tree documents
Added 'compatible' attribute in child drivers
Renamed CONFIG_SKY81452 to CONFIG_MFD_SKY81452
Changed the dependency from I2C=y to I2C, for CONFIG_MFD_SKY81452
Added message for exception or errors.
Added vendor prefix for Skyworks Solutions, Inc.
Add SKY81452 to the Trivial Devices list

Gyungoh Yoo (8):
  mfd: Add support for Skyworks SKY81452 driver
  backlight: Add support Skyworks SKY81452 backlight driver
  devicetree: mfd: Add new SKY81452 mfd binding
  devicetree: backlight: Add new SKY81452 backlight binding
  devicetree: Add vendor prefix for Skyworks Solutions, Inc.
  devicetree: i2c: Add SKY81452 to the Trivial Devices list
  regulator: sky81452: Modify Device Tree structure
  devicetree: regulator: sky81452: Modify Device Tree structure

 .../devicetree/bindings/i2c/trivial-devices.txt|   1 +
 Documentation/devicetree/bindings/mfd/sky81452.txt |  36 +++
 .../bindings/regulator/sky81452-regulator.txt  |  10 +-
 .../devicetree/bindings/vendor-prefixes.txt|   1 +
 .../video/backlight/sky81452-backlight.txt |  29 ++
 drivers/mfd/Kconfig|  12 +
 drivers/mfd/Makefile   |   1 +
 drivers/mfd/sky81452.c | 108 +++
 drivers/regulator/sky81452-regulator.c |  46 +--
 drivers/video/backlight/Kconfig|  10 +
 drivers/video/backlight/Makefile   |   1 +
 drivers/video/backlight/sky81452-backlight.c   | 340 +
 include/linux/mfd/sky81452.h   |  31 ++
 include/linux/platform_data/sky81452-backlight.h   |  46 +++
 14 files changed, 631 insertions(+), 41 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/mfd/sky81452.txt
 create mode 100644 
Documentation/devicetree/bindings/video/backlight/sky81452-backlight.txt
 create mode 100644 drivers/mfd/sky81452.c
 create mode 100644 drivers/video/backlight/sky81452-backlight.c
 create mode 100644 include/linux/mfd/sky81452.h
 create mode 100644 include/linux/platform_data/sky81452-backlight.h

-- 
1.9.1

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Re: [PATCH v2] toshiba_acpi: Fix regression caused by backlight extra check code

2014-11-24 Thread Darren Hart
On Mon, Nov 24, 2014 at 07:29:36PM -0700, Azael Avalos wrote:
> Bug 86521 uncovered that some TOS6208 devices also return
> non zero values on a write call to the backlight method,
> thus getting caught and bailed out by the extra check code.
> 
> This patch changes the set_lcd_brightness function to its
> "original" state by just adapting it to the new function
> format.
> 
> Signed-off-by: Azael Avalos 
> ---
> Changes since v1:
> - Simply revert the commit to its original state by just
>   adapting the code to the new function format
> 
> Darren,
> 
> This patch simply reverts the commit so the bug can be closed,
> I'll send a few patches later which will include the change
> needed to block the backlight on TOS1900 devices for review.

Queued.

Thanks Azael,

-- 
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Intel Open Source Technology Center
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[PATCH] mm: add parameter to disable faultaround

2014-11-24 Thread Chanho Min
The faultaround improves the file read performance, whereas pages which
can be dropped by drop_caches are reduced. On some systems, The amount of
freeable pages under memory pressure is more important than read
performance. So It prefers to be selectable.

This patch adds a new kernel cmdline parameter "nofaultaround"
for situations where users want to disable faultaround.

Signed-off-by: Chanho Min 
---
 mm/memory.c |   11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/mm/memory.c b/mm/memory.c
index 4879b42..c36a96f 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -2888,6 +2888,14 @@ static int __init fault_around_debugfs(void)
 late_initcall(fault_around_debugfs);
 #endif
 
+static bool enable_fault_around = true;
+static int __init disable_fault_around(char *s)
+{
+   enable_fault_around = false;
+   return 1;
+}
+__setup("nofaultaround", disable_fault_around);
+
 /*
  * do_fault_around() tries to map few pages around the fault address. The hope
  * is that the pages will be needed soon and this will lower the number of
@@ -2965,7 +2973,8 @@ static int do_read_fault(struct mm_struct *mm, struct 
vm_area_struct *vma,
 * if page by the offset is not ready to be mapped (cold cache or
 * something).
 */
-   if (vma->vm_ops->map_pages && !(flags & FAULT_FLAG_NONLINEAR) &&
+   if (enable_fault_around && vma->vm_ops->map_pages &&
+   !(flags & FAULT_FLAG_NONLINEAR) &&
fault_around_pages() > 1) {
pte = pte_offset_map_lock(mm, pmd, address, );
do_fault_around(vma, address, pte, pgoff, flags);
-- 
1.7.9.5

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Re: [PATCH] of: support passing console options with stdout-path

2014-11-24 Thread Sascha Hauer
On Tue, Nov 25, 2014 at 12:00:16AM +0100, Andrew Lunn wrote:
> On Mon, Nov 24, 2014 at 10:23:58PM +, Leif Lindholm wrote:
> > Support specifying console options (like with console=ttyXN,)
> > by appending them to the stdout-path property after a separating ':'.
> > 
> > Example:
> > stdout-path = "uart0:115200";
> > 
> > This patch also modifies of_find_node_by_path() to match only the
> > portion of the path before a ':'.
> 
> Hi Leif
> 
> These appears to somewhat conform to ePAPR, which says:
> 
>   A string that specifies the full path to the node representing
>   the device to be used for boot console output. If the character
>   ":" is present in the value it terminates the path.
> 
> So you can put any random junk after the :. However, are we going to
> have backward/forward compatibility problems, and problems with
> bootloaders? The current kernel code does not look for the :. So a new
> DT blob on an old kernel will not work so well.
> 
> More worrying, barebox does not support the : either. So there is a
> danger your bootloader suddenly goes silent after a dt blob update.

Since in barebox we use the upstream Kernel devicetrees it will be under
our control when they arrive, so we can add support for that ':'
before the new devicetrees arrive.

Sascha

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Re: linux-next: manual merge of the tiny tree with the tip tree

2014-11-24 Thread Josh Triplett
On Tue, Nov 25, 2014 at 07:16:45AM +0100, Ingo Molnar wrote:
> * Stephen Rothwell  wrote:
> > Hi Josh,
> > 
> > Today's linux-next merge of the tiny tree got a conflict in
> > kernel/time/Makefile between commit fd866e2b116b ("time: Rename
> > udelay_test.c to test_udelay.c") from the tip tree and commit
> > d1f6d68d03ea ("kernel: time: Compile out NTP support") from the tiny
> > tree.
> 
> So I think a timer subsystem commit d1f6d68d03ea with this 
> magnitude of linecount increase:
> 
>  Signed-off-by: Catalina Mocanu 
>  [josh: Handle CONFIG_COMPAT=y.]
>  Reviewed-by: Josh Triplett 
>  Signed-off-by: Josh Triplett 
>  ---
>   drivers/pps/Kconfig|  2 +-
>   include/linux/timex.h  | 15 +--
>   init/Kconfig   | 10 ++
>   kernel/compat.c|  8 ++--
>   kernel/sys_ni.c|  4 
>   kernel/time/Makefile   |  3 ++-
>   kernel/time/ntp_internal.h | 28 
>   kernel/time/posix-timers.c |  2 ++
>   kernel/time/time.c |  2 ++
>   kernel/time/timekeeping.c  |  2 ++
>   10 files changed, 70 insertions(+), 6 deletions(-)
> 
> at minimum needs the ack of timer folks, before it can be 
> committed to Git. Or is the tiny tree plan to submit all
> patches to the appropriate subsystem or gather acks, before 
> sending it upstream?

Yes, absolutely.  I planned to send out a tinification patch review
series later this week with all 10 current patches (both those reviewed
on LKML and those only reviewed elsewhere).

- Josh Triplett
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Re: [PATCHv3 08/16] clk: mvebu: add suspend/resume for gatable clocks

2014-11-24 Thread Thomas Petazzoni
Mike,

On Mon, 24 Nov 2014 22:07:00 -0800, Mike Turquette wrote:
> Quoting Thomas Petazzoni (2014-11-21 08:00:05)
> > This commit adds suspend/resume support for the gatable clock driver
> > used on Marvell EBU platforms. When getting out of suspend, the
> > Marvell EBU platforms go through the bootloader, which re-enables all
> > gatable clocks. However, upon resume, the clock framework will not
> > disable again all gatable clocks that are not used.
> > 
> > Therefore, if the clock driver does not save/restore the state of the
> > gatable clocks, all gatable clocks that are not claimed by any device
> > driver will remain enabled after a resume. This is why this driver
> > saves and restores the state of those clocks.
> > 
> > Since clocks aren't real devices, we don't have the normal ->suspend()
> > and ->resume() of the device model, and have to use the ->suspend()
> > and ->resume() hooks of the syscore_ops mechanism. This mechanism has
> > the unfortunate idea of not providing a way of passing private data,
> > which requires us to change the driver to make the assumption that
> > there is only once instance of the gatable clock control structure.
> > 
> > Signed-off-by: Thomas Petazzoni 
> > Cc: Mike Turquette 
> > Cc: linux-kernel@vger.kernel.org
> > Acked-by: Gregory CLEMENT 
> 
> Looks good to me. Which tree do you plan to take this through?

I don't have any specific plans. Jason, do you have other clk changes
for 3.19, which justify a pull request from you to Mike? Or could Mike
just take this patch in his tree? There is no build dependency between
this patch and the other patches in the series, so it can go through
whatever tree.

Thanks,

Thomas
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Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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Re: [PATCH v4 1/2] ARM: keystone: pm: switch to use generic pm domains

2014-11-24 Thread Mike Turquette
Quoting Arnd Bergmann (2014-11-24 02:50:28)
> On Friday 21 November 2014 20:58:01 Grygorii Strashko wrote:
> > Hi Kevin,
> > On 11/21/2014 10:06 AM, Geert Uytterhoeven wrote:
> > > On Fri, Nov 21, 2014 at 2:30 AM, Kevin Hilman  wrote:
> > >> Geert Uytterhoeven  writes:
> > >>
> > >> So now I'm confused about why the PM domain has to do anything special
> > >> if the presence/absence of the clocks is already handled by the DT.
> > > 
> > > Just adding a clock property to a device node in DT doesn't enable the 
> > > clock
> > > automatically, nor make it runtime-managed automatically.
> > > Compare this to e.g. pinctrl, where adding pinctrl properties to DT does 
> > > enable
> > > them automatically, without the driver for the device having to care 
> > > about it.
> > >
> > > Drivers interfacing external hardware typically do care about clocks, as 
> > > they
> > > have to program clock generators for the external hardware interface (e.g.
> > > driving spi or i2c buses at specific frequencies).
> 
> But is this a property of the driver or of the device? If this is true
> independent of the driver implementation, I don't see a problem with 
> the approach of linking to a power-domain that automatically manages
> all clocks for the devices that need this, and requires the driver to
> manage them itself when there are any clocks that can't be handled
> with the generic clk-power-domain implementation.
>  
> > 
> > In non-DT case, we have possibility to divide clocks on "fck" and "opt"
> > (The way it can be done is not convenient, but it is - .con_id).
> > 
> > For DT-case - no way now. Also, PM domains are not physically present on
> > Keystone 2 and GPD was selected as glue layer to integrate DT, pm_clk and
> > PM runtime all together (one big-fat-global PM domain :).
> > 
> > So, I was able to find only following way to define "fck" clocks in DT:
> >   clocks = <>, <>, <>;
> >   clock-names = "clk_pa", "clk_cpgmac", "cpsw_cpts_rft_clk";
> >   fck-clocks = <>, <>;
> > As you can see - this will lead to data duplication in DT (
> > 
> > Any propositions are welcome?
> > 
> > Unfortunately, It seems that if we would not able to find DT solution
> > then there will be following ways to move forward:
> > - "remove the power domain proxy from your drivers and use the clocks 
> > directly" 
> > ((c) Arnd Bergmann).
> > [As possibility - It can be allowed to use clk_pm APIs by drivers]
> > - continue using platform specific implementations.
> 
> Could the driver maybe identify the clocks that it wants to manage itself
> to the pm-domain code? If it's safe for a device to have the clock turned
> on at the default rate before loading the driver, any device that is connected
> to the simple clk-pm-domain code could have all its clocks start out as
> owned by the pm-domain, but then claim the clocks it needs to reprogram for
> itself and take them out of the pmdomain.

I was thinking along similar lines. The functional versus optional stuff
is really a property of the consuming device, not the clock signal
itself.

Instead of adding a new property to the clock binding (e.g. fck-clocks
or optional-clocks), could we simply wrap those lists of clocks in
another node? E.g:

mandatory-clocks {
   clocks = <>, <>;
   clock-names = "clk_pa", "clk_cpgmac";
}

clocks = <>, <>, <>;
   clocks = <>;
   clock-names = "cpsw_cpts_rft_clk";
}

I'm showing my DT ignorance on this one. I haven't really thought
through how these sub-nodes would work with of_clk_* handlers in
drivers/clk/clkdev.c.

Regards,
Mike

> 
> Arnd
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Re: [PATCH v3] sched/fair: Add advisory flag for borrowing a timeslice (was: Pre-emption control for userspace)

2014-11-24 Thread Davidlohr Bueso
On Mon, 2014-11-24 at 21:03 -0500, Rik van Riel wrote:
> I can see this "solution" help mostly with userspace spinlocks,
> which are relics of a past era that need to die. There is no
> way userspace spinlocks will not fail miserably on virtual
> machines, and it is time to get rid of them.

No, not really. Spinlocks are still very useful on bare metal.
Virtualization is not the only thing out there.

Thanks,
Davidlohr

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Re: [PATCH] mmc: dw_mmc: add quirk for data over interrupt timeout

2014-11-24 Thread Addy

Hi, Jaehoon

On 2014/11/20 18:01, Jaehoon Chung wrote:

Hi, Addy.

On 11/20/2014 06:33 PM, addy ke wrote:

Hi, Jaehoon

On 2014/11/19 13:56, addy ke wrote:

Hi Jaehoon

On 2014/11/19 09:22, Jaehoon Chung Wrote:

Hi, Addy.

On 11/18/2014 09:32 AM, Addy wrote:

On 2014年11月14日 21:18, Jaehoon Chung wrote:

Hi, Addy.

Did you use the DW_MCI_QUIRK_IDMAC_DTO?
I'm not sure, but i wonder if you get what result when you use above quirk.

DW_MCI_QUIRK_IDMAC_DTO is only for version2.0 or below.
 /*
  * DTO fix - version 2.10a and below, and only if internal DMA
  * is configured.
  */
 if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) {
 if (!pending &&
 ((mci_readl(host, STATUS) >> 17) & 0x1fff))
 pending |= SDMMC_INT_DATA_OVER;
 }

It meams that if interrupt comes, but pending = 0 && FIFO_COUNT(bit17-29) !=0,
then force to set SDMMC_INT_DATA_OVER.
But in our case, FIFO_COUNT = 0 (STATUS register value is 0xad06). This is
because that the card does not send data to host. So there is no interrupts 
come,
and interrupt handle function(dw_mci_interrupt) will not be called. So we need a
timer to handle this case.

So I think  SDMMC_INT_DATA_OVER is not suitable for this case, and we need a new
quirk.


And i will check more this patch at next week.

Thanks for your efforts.

Best Regards,
Jaehoon Chung

On 11/14/2014 10:05 PM, Addy Ke wrote:

From: Addy 

This patch add a new quirk to notify the driver to teminate
current transfer and report a data timeout to the core,
if data over interrupt does NOT come within the given time.

dw_mmc call mmc_request_done func to finish transfer depends on
data over interrupt. If data over interrupt does not come in
sending data state, the current transfer will be blocked.

But this case really exists, when driver reads tuning data from
card on rk3288-pink2 board. I measured waveforms by oscilloscope
and found that card clock was always on and data lines were always
holded high level in sending data state. This is the cause that
card does NOT send data to host.

According to synopsys designware databook, the timeout counter is
started only after the card clock is stopped.

So if card clock is always on, data read timeout interrupt will NOT come,
and if data lines are always holded high level, all data-related
interrupt such as start-bit error, data crc error, data over interrupt,
end-bit error, and so on, will NOT come too.

So driver can't get the current state, it can do nothing but wait for.

This patch is based on https://patchwork.kernel.org/patch/5227941/

Signed-off-by: Addy 
---
   drivers/mmc/host/dw_mmc.c  | 47 
+-
   include/linux/mmc/dw_mmc.h |  5 +
   2 files changed, 51 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index b4c3044..3960fc3 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -1448,6 +1448,17 @@ static int dw_mci_data_complete(struct dw_mci *host, 
struct mmc_data *data)
   return data->error;
   }
   +static inline void dw_mci_dto_start_monitor(struct dw_mci *host)
+{
+unsigned int data_tmout_clks;
+unsigned int data_tmout_ms;
+
+data_tmout_clks = (mci_readl(host, TMOUT) >> 8);
+data_tmout_ms = (data_tmout_clks * 1000 / host->bus_hz) + 250;

What's 250? And how about using the DIV_ROUND_UP?


250ms is only for more timeout.
maybe data timeout read from TMOUT register is enough.
So, I will remove 250.
new code:
data_tmout_clks = (mci_readl(host, TMOUT) >> 8);
data_tmout_ms = DIV_ROUND_UP(data_tmout_clks * 100, host->bus_hz);
Is right?


+
+mod_timer(>dto_timer, jiffies + msecs_to_jiffies(data_tmout_ms));
+}
+
   static void dw_mci_tasklet_func(unsigned long priv)
   {
   struct dw_mci *host = (struct dw_mci *)priv;
@@ -1522,8 +1533,11 @@ static void dw_mci_tasklet_func(unsigned long priv)
   }
 if (!test_and_clear_bit(EVENT_XFER_COMPLETE,
->pending_events))
+>pending_events)) {
+if (host->quirks & DW_MCI_QUIRK_DTO_TIMER)
+dw_mci_dto_start_monitor(host);

if timer is starting at only here, dw_mci_dto_start_monitor() doesn't need.


Ok, I will change it in the next patch.

   break;
+}
 set_bit(EVENT_XFER_COMPLETE, >completed_events);
   @@ -2115,6 +2129,9 @@ static irqreturn_t dw_mci_interrupt(int irq, void 
*dev_id)
   }
 if (pending & SDMMC_INT_DATA_OVER) {
+if (host->quirks & DW_MCI_QUIRK_DTO_TIMER)
+del_timer(>dto_timer);
+
   mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER);
   if (!host->data_status)
   host->data_status = pending;
@@ -2502,6 +2519,28 @@ ciu_out:
   return ret;
   }
   +static void dw_mci_dto_timer(unsigned long arg)
+{
+struct dw_mci *host = 

[tip:perf/urgent] x86/asm/traps: Disable tracing and kprobes in fixup_bad_iret and sync_regs

2014-11-24 Thread tip-bot for Andy Lutomirski
Commit-ID:  7ddc6a2199f1da405a2fb68c40db8899b1a8cd87
Gitweb: http://git.kernel.org/tip/7ddc6a2199f1da405a2fb68c40db8899b1a8cd87
Author: Andy Lutomirski 
AuthorDate: Mon, 24 Nov 2014 17:39:06 -0800
Committer:  Ingo Molnar 
CommitDate: Tue, 25 Nov 2014 07:26:55 +0100

x86/asm/traps: Disable tracing and kprobes in fixup_bad_iret and sync_regs

These functions can be executed on the int3 stack, so kprobes
are dangerous. Tracing is probably a bad idea, too.

Fixes: b645af2d5905 ("x86_64, traps: Rework bad_iret")
Signed-off-by: Andy Lutomirski 
Cc:  # Backport as far back as it would apply
Cc: Linus Torvalds 
Cc: Steven Rostedt 
Link: 
http://lkml.kernel.org/r/50e33d26adca60816f3ba968875801652507d0c4.1416870125.git.l...@amacapital.net
Signed-off-by: Ingo Molnar 
---
 arch/x86/kernel/traps.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index de801f2..07ab8e9 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -387,7 +387,7 @@ NOKPROBE_SYMBOL(do_int3);
  * for scheduling or signal handling. The actual stack switch is done in
  * entry.S
  */
-asmlinkage __visible struct pt_regs *sync_regs(struct pt_regs *eregs)
+asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
 {
struct pt_regs *regs = eregs;
/* Did already sync */
@@ -413,7 +413,7 @@ struct bad_iret_stack {
struct pt_regs regs;
 };
 
-asmlinkage __visible
+asmlinkage __visible notrace
 struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
 {
/*
@@ -436,6 +436,7 @@ struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack 
*s)
BUG_ON(!user_mode_vm(_stack->regs));
return new_stack;
 }
+NOKPROBE_SYMBOL(fixup_bad_iret);
 #endif
 
 /*
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Re: linux-next: manual merge of the tiny tree with the tip tree

2014-11-24 Thread John Stultz
On Mon, Nov 24, 2014 at 10:16 PM, Ingo Molnar  wrote:
>
> * Stephen Rothwell  wrote:
>
>> Hi Josh,
>>
>> Today's linux-next merge of the tiny tree got a conflict in
>> kernel/time/Makefile between commit fd866e2b116b ("time: Rename
>> udelay_test.c to test_udelay.c") from the tip tree and commit
>> d1f6d68d03ea ("kernel: time: Compile out NTP support") from the tiny
>> tree.
>
> So I think a timer subsystem commit d1f6d68d03ea with this
> magnitude of linecount increase:
>
>  Signed-off-by: Catalina Mocanu 
>  [josh: Handle CONFIG_COMPAT=y.]
>  Reviewed-by: Josh Triplett 
>  Signed-off-by: Josh Triplett 
>  ---
>   drivers/pps/Kconfig|  2 +-
>   include/linux/timex.h  | 15 +--
>   init/Kconfig   | 10 ++
>   kernel/compat.c|  8 ++--
>   kernel/sys_ni.c|  4 
>   kernel/time/Makefile   |  3 ++-
>   kernel/time/ntp_internal.h | 28 
>   kernel/time/posix-timers.c |  2 ++
>   kernel/time/time.c |  2 ++
>   kernel/time/timekeeping.c  |  2 ++
>   10 files changed, 70 insertions(+), 6 deletions(-)
>
> at minimum needs the ack of timer folks, before it can be
> committed to Git. Or is the tiny tree plan to submit all
> patches to the appropriate subsystem or gather acks, before
> sending it upstream?

Yea.  From first glance d1f6d68d03ea looks fairly broken.

Returning 0 for ntp_tick_length() (which should be the current tick
length in NTP_SCALE_SHIFT shifted ns), seems like it would cause major
timekeeping problems.

thanks
-john
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Re: Obsolete Fix Me in main.c due to not included header file

2014-11-24 Thread Ingo Molnar

* nick  wrote:

> Greeting Thomas and other maintainers, I am wondering why we 
> still need a fix me for including types.h,as this seems correct 
> and good according to my reading of the other header files this 
> file needs to function. Nick

So your first few mails were OK, but now you are coming close to 
a dozen emails in my mbox alone, and the thing is, there's over 
4,000 FIXME's in the kernel source:

  comet:~/tip> git grep -i FIXME | wc -l
  4415

These FIXME's are there to warn active developers about issues to 
work on - and they generally get removed when that code gets 
fixed or changes later on, typically without generating any 
separate commit. (Sometimes they don't get removed for a longer 
time - there's not much harm as eventually they will be removed.)

In other words: please stop this stream of mostly pointless 
emails! Instead of generating 4,000+ additional emails, please 
try to find some real bug to work on?

Thanks,

Ingo
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Re: [PATCH v2] ALSA: korg1212: cleanup of printk

2014-11-24 Thread Sudip Mukherjee
On Mon, Nov 24, 2014 at 09:25:10AM -0800, Joe Perches wrote:
> On Mon, 2014-11-24 at 18:08 +0100, Takashi Iwai wrote:
> > At Sun, 23 Nov 2014 13:40:51 +0530, Sudip Mukherjee wrote:
> []
> > > replaced all references of the debug messages via printk
> > > with dev_* macro (mostly dev_dbg).
> > > one reference was changed to pr_err as there the card might have been
> > > uninitialized.
> > > 
> > > this patch will generate warning from checkpatch about broken quoted
> > > strings. but that was not fixed intentionally to improve the
> > > readability.
> 
> I think it'd be easier to read and grep coalesced.
or maybe better will be individual dev_dbg calls 
> 
> []
> 
> > > in your review of v1, you said about some lines which are not ending
> > > with \n. but i was not able to find them. did i miss them somewhere?
> []
> > The problem is the one with multiple "\n", for example:
> > 
> > dev_dbg(korg1212->card->dev, "dspMemPhy = %08x U[%08x], "
> > "PlayDataPhy = %08x L[%08x]\n"
> > "korg1212: RecDataPhy = %08x L[%08x], "
> > "VolumeTablePhy = %08x L[%08x]\n"
> > "korg1212: RoutingTablePhy = %08x L[%08x], "
> > "AdatTimeCodePhy = %08x L[%08x]\n",
> 
> I think these should be individual dev_dbg calls
> 
>   dev_dbg(korg1212->card->dev, "dspMemPhy = %08x U[%08x]\n", val, val2)
>   dev_dbg(korg1212->card->dev, "PhyDataPhy = %08x L[%08x]\n", val, val2);
>   dev_dbg(korg1212->card->dev, "RecDataPhy = %08x L[%08x]\n", val, val2);
>   dev_dbg(korg1212->card->dev, "VolumeTablePhy = %08x L[%08x]\n", val, 
> val2);
> 
>   etc..
> 
> Another possibility is to use another macro like:
> 
> #define k1212_dbg(k1212, fmt, ...)\
>   dev_dbg((k)->card->dev, fmt, ##__VA_ARGS__)
> 
> and change all these to
> 
>   k1212_dbg(korg1212, "dspMemPhy = %08x U[%08x]\n", val, val2)
>   k1212_dbg(korg1212, "PhyDataPhy = %08x L[%08x]\n", val, val2);
>   k1212_dbg(korg1212, "RecDataPhy = %08x L[%08x]\n", val, val2);
>   k1212_dbg(korg1212, "VolumeTablePhy = %08x L[%08x]\n", val, val2);
> 
> etc.
> 
> > My biggest concern right now is, however, about the unnecessary code
> > increase by this patch.  Currently, most of debug prints were simply
> > not built, because of:
> > 
> > >  // 
> > > 
> > > -// Debug Stuff
> > > -// 
> > > 
> > > -#define K1212_DEBUG_LEVEL0
> > > -#if K1212_DEBUG_LEVEL > 0
> > > -#define K1212_DEBUG_PRINTK(fmt,args...)  printk(KERN_DEBUG fmt,##args)
> > > -#else
> > > -#define K1212_DEBUG_PRINTK(fmt,...)
> > > -#endif
> > > -#if K1212_DEBUG_LEVEL > 1
> > > -#define K1212_DEBUG_PRINTK_VERBOSE(fmt,args...)  printk(KERN_DEBUG 
> > > fmt,##args)
> > > -#else
> > > -#define K1212_DEBUG_PRINTK_VERBOSE(fmt,...)
> > > -#endif
> > 
> > With your patch, now all these codes are compiled.
> 
> Not really.
> 
> dev_dbg is a no-op unless DEBUG is #defined
> or CONFIG_DYNAMIC_DEBUG is set.
> 
> > I have no clear answer what would be the best in such a case.  I'd say
> > it really depends.  If they are just silly messages that can be
> > covered in a better way (like ftrace), just get rid of them.  If they
> > are intended for some good register dumps, then dev_dbg() might make
> > sense.
> 
> very true.
there are many dev_dbg which can be removed, they are just printing status 
message along with the statename of the card, and some dev_dbg is printing the 
arguments that the function has received.

in the exising file we already have the macro:
#define K1212_DEBUG_PRINTK(fmt,args...)printk(KERN_DEBUG fmt,##args)

we can just modify the macro to:
#define K1212_DEBUG_PRINTK(fmt,args...)dev_dbg(korg1212->card->dev, 
fmt,##args)

then we will have very little thing to change in the code. and concerns of 
Takashi about size will also be taken care of, and at the same time all printk 
will be cleared.

problems with this way:
1) macro name is little misleading - macro says printk, but we are using dev_dbg
2) if some one later wants to add something to this file, and doesnot want to 
use the variable name korg1212 in his function.

any suggestions ?

thanks
sudip
> 
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[tip:timers/core] time: Fix sign bug in NTP mult overflow warning

2014-11-24 Thread tip-bot for John Stultz
Commit-ID:  cb2aa63469f81426c7406227be70b628b42f7a05
Gitweb: http://git.kernel.org/tip/cb2aa63469f81426c7406227be70b628b42f7a05
Author: John Stultz 
AuthorDate: Mon, 24 Nov 2014 20:35:45 -0800
Committer:  Ingo Molnar 
CommitDate: Tue, 25 Nov 2014 07:18:34 +0100

time: Fix sign bug in NTP mult overflow warning

In commit 6067dc5a8c2b ("time: Avoid possible NTP adjustment
mult overflow") a new check was added to watch for adjustments
that could cause a mult overflow.

Unfortunately the check compares a signed with unsigned value
and ignored the case where the adjustment was negative, which
causes spurious warn-ons on some systems (and seems like it
would result in problematic time adjustments there as well, due
to the early return).

Thus this patch adds a check to make sure the adjustment is
positive before we check for an overflow, and resovles the issue
in my testing.

Reported-by: Fengguang Wu 
Debugged-by: pang.xunlei 
Signed-off-by: John Stultz 
Link: 
http://lkml.kernel.org/r/1416890145-30048-1-git-send-email-john.stu...@linaro.org
Signed-off-by: Ingo Molnar 
---
 kernel/time/timekeeping.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index 29a7d67..2dc0646 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -1330,7 +1330,7 @@ static __always_inline void 
timekeeping_apply_adjustment(struct timekeeper *tk,
 *
 * XXX - TODO: Doc ntp_error calculation.
 */
-   if (tk->tkr.mult + mult_adj < mult_adj) {
+   if ((mult_adj > 0) && (tk->tkr.mult + mult_adj < mult_adj)) {
/* NTP adjustment caused clocksource mult overflow */
WARN_ON_ONCE(1);
return;
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Re: linux-next: manual merge of the tiny tree with the tip tree

2014-11-24 Thread Ingo Molnar

* Stephen Rothwell  wrote:

> Hi Josh,
> 
> Today's linux-next merge of the tiny tree got a conflict in
> kernel/time/Makefile between commit fd866e2b116b ("time: Rename
> udelay_test.c to test_udelay.c") from the tip tree and commit
> d1f6d68d03ea ("kernel: time: Compile out NTP support") from the tiny
> tree.

So I think a timer subsystem commit d1f6d68d03ea with this 
magnitude of linecount increase:

 Signed-off-by: Catalina Mocanu 
 [josh: Handle CONFIG_COMPAT=y.]
 Reviewed-by: Josh Triplett 
 Signed-off-by: Josh Triplett 
 ---
  drivers/pps/Kconfig|  2 +-
  include/linux/timex.h  | 15 +--
  init/Kconfig   | 10 ++
  kernel/compat.c|  8 ++--
  kernel/sys_ni.c|  4 
  kernel/time/Makefile   |  3 ++-
  kernel/time/ntp_internal.h | 28 
  kernel/time/posix-timers.c |  2 ++
  kernel/time/time.c |  2 ++
  kernel/time/timekeeping.c  |  2 ++
  10 files changed, 70 insertions(+), 6 deletions(-)

at minimum needs the ack of timer folks, before it can be 
committed to Git. Or is the tiny tree plan to submit all
patches to the appropriate subsystem or gather acks, before 
sending it upstream?

Thanks,

Ingo

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Re: [PATCHv3 08/16] clk: mvebu: add suspend/resume for gatable clocks

2014-11-24 Thread Mike Turquette
Quoting Thomas Petazzoni (2014-11-21 08:00:05)
> This commit adds suspend/resume support for the gatable clock driver
> used on Marvell EBU platforms. When getting out of suspend, the
> Marvell EBU platforms go through the bootloader, which re-enables all
> gatable clocks. However, upon resume, the clock framework will not
> disable again all gatable clocks that are not used.
> 
> Therefore, if the clock driver does not save/restore the state of the
> gatable clocks, all gatable clocks that are not claimed by any device
> driver will remain enabled after a resume. This is why this driver
> saves and restores the state of those clocks.
> 
> Since clocks aren't real devices, we don't have the normal ->suspend()
> and ->resume() of the device model, and have to use the ->suspend()
> and ->resume() hooks of the syscore_ops mechanism. This mechanism has
> the unfortunate idea of not providing a way of passing private data,
> which requires us to change the driver to make the assumption that
> there is only once instance of the gatable clock control structure.
> 
> Signed-off-by: Thomas Petazzoni 
> Cc: Mike Turquette 
> Cc: linux-kernel@vger.kernel.org
> Acked-by: Gregory CLEMENT 

Looks good to me. Which tree do you plan to take this through?

Regards,
Mike

> ---
>  drivers/clk/mvebu/common.c | 32 ++--
>  1 file changed, 30 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/mvebu/common.c b/drivers/clk/mvebu/common.c
> index b7fcb46..0d4d121 100644
> --- a/drivers/clk/mvebu/common.c
> +++ b/drivers/clk/mvebu/common.c
> @@ -19,6 +19,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include "common.h"
>  
> @@ -177,14 +178,17 @@ struct clk_gating_ctrl {
> spinlock_t *lock;
> struct clk **gates;
> int num_gates;
> +   void __iomem *base;
> +   u32 saved_reg;
>  };
>  
>  #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
>  
> +static struct clk_gating_ctrl *ctrl;
> +
>  static struct clk *clk_gating_get_src(
> struct of_phandle_args *clkspec, void *data)
>  {
> -   struct clk_gating_ctrl *ctrl = (struct clk_gating_ctrl *)data;
> int n;
>  
> if (clkspec->args_count < 1)
> @@ -199,15 +203,35 @@ static struct clk *clk_gating_get_src(
> return ERR_PTR(-ENODEV);
>  }
>  
> +static int mvebu_clk_gating_suspend(void)
> +{
> +   ctrl->saved_reg = readl(ctrl->base);
> +   return 0;
> +}
> +
> +static void mvebu_clk_gating_resume(void)
> +{
> +   writel(ctrl->saved_reg, ctrl->base);
> +}
> +
> +static struct syscore_ops clk_gate_syscore_ops = {
> +   .suspend = mvebu_clk_gating_suspend,
> +   .resume = mvebu_clk_gating_resume,
> +};
> +
>  void __init mvebu_clk_gating_setup(struct device_node *np,
>const struct clk_gating_soc_desc *desc)
>  {
> -   struct clk_gating_ctrl *ctrl;
> struct clk *clk;
> void __iomem *base;
> const char *default_parent = NULL;
> int n;
>  
> +   if (ctrl) {
> +   pr_err("mvebu-clk-gating: cannot instantiate more than one 
> gatable clock device\n");
> +   return;
> +   }
> +
> base = of_iomap(np, 0);
> if (WARN_ON(!base))
> return;
> @@ -225,6 +249,8 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
> /* lock must already be initialized */
> ctrl->lock = _gating_lock;
>  
> +   ctrl->base = base;
> +
> /* Count, allocate, and register clock gates */
> for (n = 0; desc[n].name;)
> n++;
> @@ -246,6 +272,8 @@ void __init mvebu_clk_gating_setup(struct device_node *np,
>  
> of_clk_add_provider(np, clk_gating_get_src, ctrl);
>  
> +   register_syscore_ops(_gate_syscore_ops);
> +
> return;
>  gates_out:
> kfree(ctrl);
> -- 
> 2.1.0
> 
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linux-next: manual merge of the tiny tree with the tip tree

2014-11-24 Thread Stephen Rothwell
Hi Josh,

Today's linux-next merge of the tiny tree got a conflict in
kernel/time/Makefile between commit fd866e2b116b ("time: Rename
udelay_test.c to test_udelay.c") from the tip tree and commit
d1f6d68d03ea ("kernel: time: Compile out NTP support") from the tiny
tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au

diff --cc kernel/time/Makefile
index f622cf28628a,d07d4c9207b9..
--- a/kernel/time/Makefile
+++ b/kernel/time/Makefile
@@@ -13,7 -13,8 +13,8 @@@ obj-$(CONFIG_TICK_ONESHOT)+= 
tick-on
  obj-$(CONFIG_TICK_ONESHOT)+= tick-sched.o
  obj-$(CONFIG_TIMER_STATS) += timer_stats.o
  obj-$(CONFIG_DEBUG_FS)+= timekeeping_debug.o
 -obj-$(CONFIG_TEST_UDELAY) += udelay_test.o
 +obj-$(CONFIG_TEST_UDELAY) += test_udelay.o
+ obj-$(CONFIG_NTP) += ntp.o
  
  $(obj)/time.o: $(obj)/timeconst.h
  


pgp0IVsb_DjQW.pgp
Description: OpenPGP digital signature


Re: [PATCH 0/6] blk: introduce generic io stat accounting help function

2014-11-24 Thread Gu Zheng
On 11/24/2014 11:03 PM, Jens Axboe wrote:

> On 11/23/2014 08:05 PM, Gu Zheng wrote:
>> Many block drivers accounting io stat based on bio (e.g. NVMe...),
>> the blk_account_io_start/end() which is based on request
>> does not make sense to them, so here we introduce the similar help
>> function named generic_start/end_io_acct base on raw sectors, and it can
>> simplify some driver's open io accounting code.
>>
>> Gu Zheng (6):
>>blk: introduce generic io stat accounting help function
>>NVMe: use generic io stat accounting functions to simplify
>>  nvme_start/end_io_acct
>>md/bcache: use generic io stats accounting functions to simplify io
>>  stat accounting
>>drbd: use generic io stats accounting functions to simplify io stat
>>  accounting
>>md: use generic io stats accounting functions to simplify io stat
>>  accounting
>>block/rsxx: use generic io stats accounting functions to simplify io
>>  stat accounting
> 
> Thanks, this looks good. I'll apply it, except 2/6, since nvme no longer uses 
> them.

OK.

Thanks,
Gu

> 


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[Patch Part2 v6 05/27] x86, uv: Use new irqdomain interfaces to allocate/free IRQ

2014-11-24 Thread Jiang Liu
Use new irqdomain interfaces to allocate/free IRQ, so we could
kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later.

Signed-off-by: Jiang Liu 
---
 arch/x86/platform/uv/uv_irq.c |   27 +++
 1 file changed, 11 insertions(+), 16 deletions(-)

diff --git a/arch/x86/platform/uv/uv_irq.c b/arch/x86/platform/uv/uv_irq.c
index 0ce673645432..474912d03f40 100644
--- a/arch/x86/platform/uv/uv_irq.c
+++ b/arch/x86/platform/uv/uv_irq.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -130,24 +131,14 @@ static int
 arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
   unsigned long mmr_offset, int limit)
 {
-   const struct cpumask *eligible_cpu = cpumask_of(cpu);
struct irq_cfg *cfg = irq_cfg(irq);
unsigned long mmr_value;
struct uv_IO_APIC_route_entry *entry;
-   int mmr_pnode, err;
-   unsigned int dest;
+   int mmr_pnode;
 
BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) !=
sizeof(unsigned long));
 
-   err = assign_irq_vector(irq, cfg, eligible_cpu);
-   if (err != 0)
-   return err;
-
-   err = apic->cpu_mask_to_apicid_and(eligible_cpu, eligible_cpu, );
-   if (err != 0)
-   return err;
-
if (limit == UV_AFFINITY_CPU)
irq_set_status_flags(irq, IRQ_NO_BALANCING);
else
@@ -164,7 +155,7 @@ arch_enable_uv_irq(char *irq_name, unsigned int irq, int 
cpu, int mmr_blade,
entry->polarity = 0;
entry->trigger  = 0;
entry->mask = 0;
-   entry->dest = dest;
+   entry->dest = cfg->dest_apicid;
 
mmr_pnode = uv_blade_to_pnode(mmr_blade);
uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
@@ -238,9 +229,13 @@ uv_set_irq_affinity(struct irq_data *data, const struct 
cpumask *mask,
 int uv_setup_irq(char *irq_name, int cpu, int mmr_blade,
 unsigned long mmr_offset, int limit)
 {
-   int ret, irq = irq_alloc_hwirq(uv_blade_to_memory_nid(mmr_blade));
+   int ret, irq;
+   struct irq_alloc_info info;
 
-   if (!irq)
+   init_irq_alloc_info(, cpumask_of(cpu));
+   irq = irq_domain_alloc_irqs(NULL, 1, uv_blade_to_memory_nid(mmr_blade),
+   );
+   if (irq <= 0)
return -EBUSY;
 
ret = arch_enable_uv_irq(irq_name, irq, cpu, mmr_blade, mmr_offset,
@@ -248,7 +243,7 @@ int uv_setup_irq(char *irq_name, int cpu, int mmr_blade,
if (ret == irq)
uv_set_irq_2_mmr_info(irq, mmr_offset, mmr_blade);
else
-   irq_free_hwirq(irq);
+   irq_domain_free_irqs(irq, 1);
 
return ret;
 }
@@ -283,6 +278,6 @@ void uv_teardown_irq(unsigned int irq)
n = n->rb_right;
}
spin_unlock_irqrestore(_irq_lock, irqflags);
-   irq_free_hwirq(irq);
+   irq_domain_free_irqs(irq, 1);
 }
 EXPORT_SYMBOL_GPL(uv_teardown_irq);
-- 
1.7.10.4

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