Re: [PATCH -v4 2/2] printk: Add kernel parameter to control writes to /dev/kmsg

2016-07-16 Thread Borislav Petkov
On Sat, Jul 16, 2016 at 06:44:25PM +0800, Dave Young wrote:

...

> Mis-ratelimit cause critical userspace messages being lost, that is worse

The current setting is quite generous so that all critical messages
should land in dmesg. Besides, we don't ratelimit during boot. The idea
is that userspace should switch to a different logging facility once the
system is up... which userspace does reportedly.

IOW, /dev/kmsg should handle a relatively big logging amount without
ratelimiting.

> than use off as default. Suppose we turn off devkmsg by default distributions
> can still turn on it with sysctl and for us who do not want the flooding we 
> can
> use printk.devkmsg=off in kernel cmdline to override it.

That part I cannot parse.

> Of course if we turn off it by default we can print a warning to alert user.
> 
> BTW, for userspace messages maybe they should not go to same log buffer, maybe
> a separate log buffer for /dev/msg will be better.

See above.

-- 
Regards/Gruss,
Boris.

ECO tip #101: Trim your mails when you reply.
--


Re: [PATCH -v4 2/2] printk: Add kernel parameter to control writes to /dev/kmsg

2016-07-16 Thread Borislav Petkov
On Sat, Jul 16, 2016 at 06:44:25PM +0800, Dave Young wrote:

...

> Mis-ratelimit cause critical userspace messages being lost, that is worse

The current setting is quite generous so that all critical messages
should land in dmesg. Besides, we don't ratelimit during boot. The idea
is that userspace should switch to a different logging facility once the
system is up... which userspace does reportedly.

IOW, /dev/kmsg should handle a relatively big logging amount without
ratelimiting.

> than use off as default. Suppose we turn off devkmsg by default distributions
> can still turn on it with sysctl and for us who do not want the flooding we 
> can
> use printk.devkmsg=off in kernel cmdline to override it.

That part I cannot parse.

> Of course if we turn off it by default we can print a warning to alert user.
> 
> BTW, for userspace messages maybe they should not go to same log buffer, maybe
> a separate log buffer for /dev/msg will be better.

See above.

-- 
Regards/Gruss,
Boris.

ECO tip #101: Trim your mails when you reply.
--


[PATCH v2 3/9] hwmon: (core) Add voltage attribute support to new API

2016-07-16 Thread Guenter Roeck
Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: No change

 drivers/hwmon/hwmon.c | 21 +
 include/linux/hwmon.h | 35 +++
 2 files changed, 56 insertions(+)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index d780011cd063..5d88bf7f825a 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -252,6 +252,7 @@ static struct attribute *hwmon_genattr(struct device *dev,
 
 static const char * const hwmon_chip_attr_templates[] = {
[hwmon_chip_temp_reset_history] = "temp_reset_history",
+   [hwmon_chip_in_reset_history] = "in_reset_history",
[hwmon_chip_update_interval] = "update_interval",
[hwmon_chip_alarms] = "alarms",
 };
@@ -283,14 +284,34 @@ static const char * const hwmon_temp_attr_templates[] = {
[hwmon_temp_reset_history] = "temp%d_reset_history",
 };
 
+static const char * const hwmon_in_attr_templates[] = {
+   [hwmon_in_input] = "in%d_input",
+   [hwmon_in_min] = "in%d_min",
+   [hwmon_in_max] = "in%d_max",
+   [hwmon_in_lcrit] = "in%d_lcrit",
+   [hwmon_in_crit] = "in%d_crit",
+   [hwmon_in_average] = "in%d_average",
+   [hwmon_in_lowest] = "in%d_lowest",
+   [hwmon_in_highest] = "in%d_highest",
+   [hwmon_in_reset_history] = "in%d_reset_history",
+   [hwmon_in_label] = "in%d_label",
+   [hwmon_in_alarm] = "in%d_alarm",
+   [hwmon_in_min_alarm] = "in%d_min_alarm",
+   [hwmon_in_max_alarm] = "in%d_max_alarm",
+   [hwmon_in_lcrit_alarm] = "in%d_lcrit_alarm",
+   [hwmon_in_crit_alarm] = "in%d_crit_alarm",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
+   [hwmon_in] = hwmon_in_attr_templates,
 };
 
 static const int __templates_size[] = {
[hwmon_chip] = ARRAY_SIZE(hwmon_chip_attr_templates),
[hwmon_temp] = ARRAY_SIZE(hwmon_temp_attr_templates),
+   [hwmon_in] = ARRAY_SIZE(hwmon_in_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index 52e56d71d742..a01b8e3fc6f3 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -30,6 +30,7 @@ enum hwmon_sensor_types {
 
 enum hwmon_chip_attributes {
hwmon_chip_temp_reset_history,
+   hwmon_chip_in_reset_history,
hwmon_chip_register_tz,
hwmon_chip_update_interval,
hwmon_chip_alarms,
@@ -91,6 +92,40 @@ enum hwmon_temp_attributes {
 #define HWMON_T_HIGHESTBIT(hwmon_temp_highest)
 #define HWMON_T_RESET_HISTORY  BIT(hwmon_temp_reset_history)
 
+enum hwmon_in_attributes {
+   hwmon_in_input,
+   hwmon_in_min,
+   hwmon_in_max,
+   hwmon_in_lcrit,
+   hwmon_in_crit,
+   hwmon_in_average,
+   hwmon_in_lowest,
+   hwmon_in_highest,
+   hwmon_in_reset_history,
+   hwmon_in_label,
+   hwmon_in_alarm,
+   hwmon_in_min_alarm,
+   hwmon_in_max_alarm,
+   hwmon_in_lcrit_alarm,
+   hwmon_in_crit_alarm,
+};
+
+#define HWMON_I_INPUT  BIT(hwmon_in_input)
+#define HWMON_I_MINBIT(hwmon_in_min)
+#define HWMON_I_MAXBIT(hwmon_in_max)
+#define HWMON_I_LCRIT  BIT(hwmon_in_lcrit)
+#define HWMON_I_CRIT   BIT(hwmon_in_crit)
+#define HWMON_I_AVERAGEBIT(hwmon_in_average)
+#define HWMON_I_LOWEST BIT(hwmon_in_lowest)
+#define HWMON_I_HIGHESTBIT(hwmon_in_highest)
+#define HWMON_I_RESET_HISTORY  BIT(hwmon_in_reset_history)
+#define HWMON_I_LABEL  BIT(hwmon_in_label)
+#define HWMON_I_ALARM  BIT(hwmon_in_alarm)
+#define HWMON_I_MIN_ALARM  BIT(hwmon_in_min_alarm)
+#define HWMON_I_MAX_ALARM  BIT(hwmon_in_max_alarm)
+#define HWMON_I_LCRIT_ALARMBIT(hwmon_in_lcrit_alarm)
+#define HWMON_I_CRIT_ALARM BIT(hwmon_in_crit_alarm)
+
 /**
  * struct hwmon_ops - hwmon device operations
  * @is_visible: Callback to return attribute visibility. Mandatory.
-- 
2.5.0



[PATCH v2 8/9] hwmon: (core) Document new kernel API

2016-07-16 Thread Guenter Roeck
Describe the new registration API function as well as the data
structures it requires.

Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: Fixed typos

 Documentation/hwmon/hwmon-kernel-api.txt | 229 ++-
 1 file changed, 227 insertions(+), 2 deletions(-)

diff --git a/Documentation/hwmon/hwmon-kernel-api.txt 
b/Documentation/hwmon/hwmon-kernel-api.txt
index 2ecdbfc85ecf..f60a29ce7592 100644
--- a/Documentation/hwmon/hwmon-kernel-api.txt
+++ b/Documentation/hwmon/hwmon-kernel-api.txt
@@ -34,6 +34,19 @@ devm_hwmon_device_register_with_groups(struct device *dev,
   const char *name, void *drvdata,
   const struct attribute_group **groups);
 
+struct device *
+hwmon_device_register_with_info(struct device *dev,
+   const char *name, void *drvdata,
+   const struct hwmon_chip_info *info,
+   const struct attribute_group **groups);
+
+struct device *
+devm_hwmon_device_register_with_info(struct device *dev,
+const char *name,
+void *drvdata,
+const struct hwmon_chip_info *info,
+const struct attribute_group **groups);
+
 void hwmon_device_unregister(struct device *dev);
 void devm_hwmon_device_unregister(struct device *dev);
 
@@ -60,15 +73,227 @@ devm_hwmon_device_register_with_groups is similar to
 hwmon_device_register_with_groups. However, it is device managed, meaning the
 hwmon device does not have to be removed explicitly by the removal function.
 
+hwmon_device_register_with_info is the most comprehensive and preferred means
+to register a hardware monitoring device. It creates the standard sysfs
+attributes in the hardware monitoring core, letting the driver focus on reading
+from and writing to the chip instead of having to bother with sysfs attributes.
+Its parameters are described in more detail below.
+
+devm_hwmon_device_register_with_info is similar to
+hwmon_device_register_with_info. However, it is device managed, meaning the
+hwmon device does not have to be removed explicitly by the removal function.
+
 hwmon_device_unregister deregisters a registered hardware monitoring device.
 The parameter of this function is the pointer to the registered hardware
 monitoring device structure. This function must be called from the driver
 remove function if the hardware monitoring device was registered with
-hwmon_device_register or with hwmon_device_register_with_groups.
+hwmon_device_register, hwmon_device_register_with_groups, or
+hwmon_device_register_with_info.
 
 devm_hwmon_device_unregister does not normally have to be called. It is only
 needed for error handling, and only needed if the driver probe fails after
-the call to devm_hwmon_device_register_with_groups.
+the call to devm_hwmon_device_register_with_groups and if the automatic
+(device managed) removal would be too late.
+
+Using devm_hwmon_device_register_with_info()
+
+
+hwmon_device_register_with_info() registers a hardware monitoring device.
+The parameters to this function are
+
+struct device *dev Pointer to parent device
+const char *name   Device name
+void *drvdata  Driver private data
+const struct hwmon_chip_info *info
+   Pointer to chip description.
+const struct attribute_group **groups
+   Null-terminated list of additional sysfs attribute
+   groups.
+
+This function returns a pointer to the created hardware monitoring device
+on success and a negative error code for failure.
+
+The hwmon_chip_info structure looks as follows.
+
+struct hwmon_chip_info {
+   const struct hwmon_ops *ops;
+   const struct hwmon_channel_info **info;
+};
+
+It contains the following fields:
+
+* ops: Pointer to device operations.
+* info: NULL-terminated list of device channel descriptors.
+
+The list of hwmon operations is defined as:
+
+struct hwmon_ops {
+   umode_t (*is_visible)(const void *, enum hwmon_sensor_types type,
+ u32 attr, int);
+   int (*read)(struct device *, enum hwmon_sensor_types type,
+   u32 attr, int, long *);
+   int (*write)(struct device *, enum hwmon_sensor_types type,
+u32 attr, int, long);
+};
+
+It defines the following operations.
+
+* is_visible: Pointer to a function to return the file mode for each supported
+  attribute. This function is mandatory.
+
+* read: Pointer to a function for reading a value from the chip. This function
+  is optional, but must be provided if any readable attributes exist.
+
+* write: Pointer to a function for writing a value to the chip. This function 
is
+  optional, but must be provided if any writeable 

[PATCH v2 7/9] hwmon: (core) Add fan attribute support to new API

2016-07-16 Thread Guenter Roeck
Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: No change

 drivers/hwmon/hwmon.c | 16 
 include/linux/hwmon.h | 27 +++
 2 files changed, 43 insertions(+)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index f5de80a8bd1e..38c217e64d41 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -365,6 +365,20 @@ static const char * const hwmon_humidity_attr_templates[] 
= {
[hwmon_humidity_fault] = "humidity%d_fault",
 };
 
+static const char * const hwmon_fan_attr_templates[] = {
+   [hwmon_fan_input] = "fan%d_input",
+   [hwmon_fan_label] = "fan%d_label",
+   [hwmon_fan_min] = "fan%d_min",
+   [hwmon_fan_max] = "fan%d_max",
+   [hwmon_fan_div] = "fan%d_div",
+   [hwmon_fan_pulses] = "fan%d_pulses",
+   [hwmon_fan_target] = "fan%d_target",
+   [hwmon_fan_alarm] = "fan%d_alarm",
+   [hwmon_fan_min_alarm] = "fan%d_min_alarm",
+   [hwmon_fan_max_alarm] = "fan%d_max_alarm",
+   [hwmon_fan_fault] = "fan%d_fault",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
@@ -373,6 +387,7 @@ static const char * const *__templates[] = {
[hwmon_power] = hwmon_power_attr_templates,
[hwmon_energy] = hwmon_energy_attr_templates,
[hwmon_humidity] = hwmon_humidity_attr_templates,
+   [hwmon_fan] = hwmon_fan_attr_templates,
 };
 
 static const int __templates_size[] = {
@@ -383,6 +398,7 @@ static const int __templates_size[] = {
[hwmon_power] = ARRAY_SIZE(hwmon_power_attr_templates),
[hwmon_energy] = ARRAY_SIZE(hwmon_energy_attr_templates),
[hwmon_humidity] = ARRAY_SIZE(hwmon_humidity_attr_templates),
+   [hwmon_fan] = ARRAY_SIZE(hwmon_fan_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index 57d92f1d779b..74e89d45ff67 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -27,6 +27,7 @@ enum hwmon_sensor_types {
hwmon_power,
hwmon_energy,
hwmon_humidity,
+   hwmon_fan,
 };
 
 enum hwmon_chip_attributes {
@@ -245,6 +246,32 @@ enum hwmon_humidity_attributes {
 #define HWMON_H_ALARM  BIT(hwmon_humidity_alarm)
 #define HWMON_H_FAULT  BIT(hwmon_humidity_fault)
 
+enum hwmon_fan_attributes {
+   hwmon_fan_input,
+   hwmon_fan_label,
+   hwmon_fan_min,
+   hwmon_fan_max,
+   hwmon_fan_div,
+   hwmon_fan_pulses,
+   hwmon_fan_target,
+   hwmon_fan_alarm,
+   hwmon_fan_min_alarm,
+   hwmon_fan_max_alarm,
+   hwmon_fan_fault,
+};
+
+#define HWMON_F_INPUT  BIT(hwmon_fan_input)
+#define HWMON_F_LABEL  BIT(hwmon_fan_label)
+#define HWMON_F_MINBIT(hwmon_fan_min)
+#define HWMON_F_MAXBIT(hwmon_fan_max)
+#define HWMON_F_DIVBIT(hwmon_fan_div)
+#define HWMON_F_PULSES BIT(hwmon_fan_pulses)
+#define HWMON_F_TARGET BIT(hwmon_fan_target)
+#define HWMON_F_ALARM  BIT(hwmon_fan_alarm)
+#define HWMON_F_MIN_ALARM  BIT(hwmon_fan_min_alarm)
+#define HWMON_F_MAX_ALARM  BIT(hwmon_fan_max_alarm)
+#define HWMON_F_FAULT  BIT(hwmon_fan_fault)
+
 /**
  * struct hwmon_ops - hwmon device operations
  * @is_visible: Callback to return attribute visibility. Mandatory.
-- 
2.5.0



[PATCH v2 6/9] hwmon: (core) Add energy and humidity attribute support to new API

2016-07-16 Thread Guenter Roeck
Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: No change

 drivers/hwmon/hwmon.c | 20 
 include/linux/hwmon.h | 29 +
 2 files changed, 49 insertions(+)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index 7a5c8bba7dc2..f5de80a8bd1e 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -349,12 +349,30 @@ static const char * const hwmon_power_attr_templates[] = {
[hwmon_power_crit_alarm] = "power%d_crit_alarm",
 };
 
+static const char * const hwmon_energy_attr_templates[] = {
+   [hwmon_energy_input] = "energy%d_input",
+   [hwmon_energy_label] = "energy%d_label",
+};
+
+static const char * const hwmon_humidity_attr_templates[] = {
+   [hwmon_humidity_input] = "humidity%d_input",
+   [hwmon_humidity_label] = "humidity%d_label",
+   [hwmon_humidity_min] = "humidity%d_min",
+   [hwmon_humidity_min_hyst] = "humidity%d_min_hyst",
+   [hwmon_humidity_max] = "humidity%d_max",
+   [hwmon_humidity_max_hyst] = "humidity%d_max_hyst",
+   [hwmon_humidity_alarm] = "humidity%d_alarm",
+   [hwmon_humidity_fault] = "humidity%d_fault",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
[hwmon_in] = hwmon_in_attr_templates,
[hwmon_curr] = hwmon_curr_attr_templates,
[hwmon_power] = hwmon_power_attr_templates,
+   [hwmon_energy] = hwmon_energy_attr_templates,
+   [hwmon_humidity] = hwmon_humidity_attr_templates,
 };
 
 static const int __templates_size[] = {
@@ -363,6 +381,8 @@ static const int __templates_size[] = {
[hwmon_in] = ARRAY_SIZE(hwmon_in_attr_templates),
[hwmon_curr] = ARRAY_SIZE(hwmon_curr_attr_templates),
[hwmon_power] = ARRAY_SIZE(hwmon_power_attr_templates),
+   [hwmon_energy] = ARRAY_SIZE(hwmon_energy_attr_templates),
+   [hwmon_humidity] = ARRAY_SIZE(hwmon_humidity_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index d7e432ef7c2a..57d92f1d779b 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -26,6 +26,7 @@ enum hwmon_sensor_types {
hwmon_curr,
hwmon_power,
hwmon_energy,
+   hwmon_humidity,
 };
 
 enum hwmon_chip_attributes {
@@ -216,6 +217,34 @@ enum hwmon_power_attributes {
 #define HWMON_P_MAX_ALARM  BIT(hwmon_power_max_alarm)
 #define HWMON_P_CRIT_ALARM BIT(hwmon_power_crit_alarm)
 
+enum hwmon_energy_attributes {
+   hwmon_energy_input,
+   hwmon_energy_label,
+};
+
+#define HWMON_E_INPUT  BIT(hwmon_energy_input)
+#define HWMON_E_LABEL  BIT(hwmon_energy_label)
+
+enum hwmon_humidity_attributes {
+   hwmon_humidity_input,
+   hwmon_humidity_label,
+   hwmon_humidity_min,
+   hwmon_humidity_min_hyst,
+   hwmon_humidity_max,
+   hwmon_humidity_max_hyst,
+   hwmon_humidity_alarm,
+   hwmon_humidity_fault,
+};
+
+#define HWMON_H_INPUT  BIT(hwmon_humidity_input)
+#define HWMON_H_LABEL  BIT(hwmon_humidity_label)
+#define HWMON_H_MINBIT(hwmon_humidity_min)
+#define HWMON_H_MIN_HYST   BIT(hwmon_humidity_min_hyst)
+#define HWMON_H_MAXBIT(hwmon_humidity_max)
+#define HWMON_H_MAX_HYST   BIT(hwmon_humidity_max_hyst)
+#define HWMON_H_ALARM  BIT(hwmon_humidity_alarm)
+#define HWMON_H_FAULT  BIT(hwmon_humidity_fault)
+
 /**
  * struct hwmon_ops - hwmon device operations
  * @is_visible: Callback to return attribute visibility. Mandatory.
-- 
2.5.0



[PATCH v2 9/9] hwmon: (core) Add basic pwm attribute support to new API

2016-07-16 Thread Guenter Roeck
Add basic pwm attribute support (no auto attributes) to new API.

Signed-off-by: Guenter Roeck 
---
v2: Added patch

 Documentation/hwmon/hwmon-kernel-api.txt |  2 ++
 drivers/hwmon/hwmon.c|  9 +
 include/linux/hwmon.h| 13 +
 3 files changed, 24 insertions(+)

diff --git a/Documentation/hwmon/hwmon-kernel-api.txt 
b/Documentation/hwmon/hwmon-kernel-api.txt
index f60a29ce7592..ef9d74947f5c 100644
--- a/Documentation/hwmon/hwmon-kernel-api.txt
+++ b/Documentation/hwmon/hwmon-kernel-api.txt
@@ -168,6 +168,7 @@ It contains following fields:
   * hwmon_energy   Energy sensor
   * hwmon_humidity Humidity sensor
   * hwmon_fan  Fan speed sensor
+  * hwmon_pwm  PWM control
 
 * config: Pointer to a 0-terminated list of configuration values for each
   sensor of the given type. Each value is a combination of bit values
@@ -230,6 +231,7 @@ HWMON_P_Power attributes, for use with 
hwmon_power.
 HWMON_E_   Energy attributes, for use with hwmon_energy.
 HWMON_H_   Humidity attributes, for use with hwmon_humidity.
 HWMON_F_   Fan speed attributes, for use with hwmon_fan.
+HWMON_PWM_ PWM control attributes, for use with hwmon_pwm.
 
 Driver callback functions
 -
diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index 38c217e64d41..bd99732e415b 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -379,6 +379,13 @@ static const char * const hwmon_fan_attr_templates[] = {
[hwmon_fan_fault] = "fan%d_fault",
 };
 
+static const char * const hwmon_pwm_attr_templates[] = {
+   [hwmon_pwm_input] = "pwm%d",
+   [hwmon_pwm_enable] = "pwm%d_enable",
+   [hwmon_pwm_mode] = "pwm%d_mode",
+   [hwmon_pwm_freq] = "pwm%d_freq",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
@@ -388,6 +395,7 @@ static const char * const *__templates[] = {
[hwmon_energy] = hwmon_energy_attr_templates,
[hwmon_humidity] = hwmon_humidity_attr_templates,
[hwmon_fan] = hwmon_fan_attr_templates,
+   [hwmon_pwm] = hwmon_pwm_attr_templates,
 };
 
 static const int __templates_size[] = {
@@ -399,6 +407,7 @@ static const int __templates_size[] = {
[hwmon_energy] = ARRAY_SIZE(hwmon_energy_attr_templates),
[hwmon_humidity] = ARRAY_SIZE(hwmon_humidity_attr_templates),
[hwmon_fan] = ARRAY_SIZE(hwmon_fan_attr_templates),
+   [hwmon_pwm] = ARRAY_SIZE(hwmon_pwm_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index 74e89d45ff67..9d2f8bde7d12 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -28,6 +28,7 @@ enum hwmon_sensor_types {
hwmon_energy,
hwmon_humidity,
hwmon_fan,
+   hwmon_pwm,
 };
 
 enum hwmon_chip_attributes {
@@ -272,6 +273,18 @@ enum hwmon_fan_attributes {
 #define HWMON_F_MAX_ALARM  BIT(hwmon_fan_max_alarm)
 #define HWMON_F_FAULT  BIT(hwmon_fan_fault)
 
+enum hwmon_pwm_attributes {
+   hwmon_pwm_input,
+   hwmon_pwm_enable,
+   hwmon_pwm_mode,
+   hwmon_pwm_freq,
+};
+
+#define HWMON_PWM_INPUTBIT(hwmon_pwm_input)
+#define HWMON_PWM_ENABLE   BIT(hwmon_pwm_enable)
+#define HWMON_PWM_MODE BIT(hwmon_pwm_mode)
+#define HWMON_PWM_FREQ BIT(hwmon_pwm_freq)
+
 /**
  * struct hwmon_ops - hwmon device operations
  * @is_visible: Callback to return attribute visibility. Mandatory.
-- 
2.5.0



[PATCH v2 8/9] hwmon: (core) Document new kernel API

2016-07-16 Thread Guenter Roeck
Describe the new registration API function as well as the data
structures it requires.

Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: Fixed typos

 Documentation/hwmon/hwmon-kernel-api.txt | 229 ++-
 1 file changed, 227 insertions(+), 2 deletions(-)

diff --git a/Documentation/hwmon/hwmon-kernel-api.txt 
b/Documentation/hwmon/hwmon-kernel-api.txt
index 2ecdbfc85ecf..f60a29ce7592 100644
--- a/Documentation/hwmon/hwmon-kernel-api.txt
+++ b/Documentation/hwmon/hwmon-kernel-api.txt
@@ -34,6 +34,19 @@ devm_hwmon_device_register_with_groups(struct device *dev,
   const char *name, void *drvdata,
   const struct attribute_group **groups);
 
+struct device *
+hwmon_device_register_with_info(struct device *dev,
+   const char *name, void *drvdata,
+   const struct hwmon_chip_info *info,
+   const struct attribute_group **groups);
+
+struct device *
+devm_hwmon_device_register_with_info(struct device *dev,
+const char *name,
+void *drvdata,
+const struct hwmon_chip_info *info,
+const struct attribute_group **groups);
+
 void hwmon_device_unregister(struct device *dev);
 void devm_hwmon_device_unregister(struct device *dev);
 
@@ -60,15 +73,227 @@ devm_hwmon_device_register_with_groups is similar to
 hwmon_device_register_with_groups. However, it is device managed, meaning the
 hwmon device does not have to be removed explicitly by the removal function.
 
+hwmon_device_register_with_info is the most comprehensive and preferred means
+to register a hardware monitoring device. It creates the standard sysfs
+attributes in the hardware monitoring core, letting the driver focus on reading
+from and writing to the chip instead of having to bother with sysfs attributes.
+Its parameters are described in more detail below.
+
+devm_hwmon_device_register_with_info is similar to
+hwmon_device_register_with_info. However, it is device managed, meaning the
+hwmon device does not have to be removed explicitly by the removal function.
+
 hwmon_device_unregister deregisters a registered hardware monitoring device.
 The parameter of this function is the pointer to the registered hardware
 monitoring device structure. This function must be called from the driver
 remove function if the hardware monitoring device was registered with
-hwmon_device_register or with hwmon_device_register_with_groups.
+hwmon_device_register, hwmon_device_register_with_groups, or
+hwmon_device_register_with_info.
 
 devm_hwmon_device_unregister does not normally have to be called. It is only
 needed for error handling, and only needed if the driver probe fails after
-the call to devm_hwmon_device_register_with_groups.
+the call to devm_hwmon_device_register_with_groups and if the automatic
+(device managed) removal would be too late.
+
+Using devm_hwmon_device_register_with_info()
+
+
+hwmon_device_register_with_info() registers a hardware monitoring device.
+The parameters to this function are
+
+struct device *dev Pointer to parent device
+const char *name   Device name
+void *drvdata  Driver private data
+const struct hwmon_chip_info *info
+   Pointer to chip description.
+const struct attribute_group **groups
+   Null-terminated list of additional sysfs attribute
+   groups.
+
+This function returns a pointer to the created hardware monitoring device
+on success and a negative error code for failure.
+
+The hwmon_chip_info structure looks as follows.
+
+struct hwmon_chip_info {
+   const struct hwmon_ops *ops;
+   const struct hwmon_channel_info **info;
+};
+
+It contains the following fields:
+
+* ops: Pointer to device operations.
+* info: NULL-terminated list of device channel descriptors.
+
+The list of hwmon operations is defined as:
+
+struct hwmon_ops {
+   umode_t (*is_visible)(const void *, enum hwmon_sensor_types type,
+ u32 attr, int);
+   int (*read)(struct device *, enum hwmon_sensor_types type,
+   u32 attr, int, long *);
+   int (*write)(struct device *, enum hwmon_sensor_types type,
+u32 attr, int, long);
+};
+
+It defines the following operations.
+
+* is_visible: Pointer to a function to return the file mode for each supported
+  attribute. This function is mandatory.
+
+* read: Pointer to a function for reading a value from the chip. This function
+  is optional, but must be provided if any readable attributes exist.
+
+* write: Pointer to a function for writing a value to the chip. This function 
is
+  optional, but must be provided if any writeable attributes exist.
+
+Each sensor channel is 

[PATCH v2 7/9] hwmon: (core) Add fan attribute support to new API

2016-07-16 Thread Guenter Roeck
Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: No change

 drivers/hwmon/hwmon.c | 16 
 include/linux/hwmon.h | 27 +++
 2 files changed, 43 insertions(+)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index f5de80a8bd1e..38c217e64d41 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -365,6 +365,20 @@ static const char * const hwmon_humidity_attr_templates[] 
= {
[hwmon_humidity_fault] = "humidity%d_fault",
 };
 
+static const char * const hwmon_fan_attr_templates[] = {
+   [hwmon_fan_input] = "fan%d_input",
+   [hwmon_fan_label] = "fan%d_label",
+   [hwmon_fan_min] = "fan%d_min",
+   [hwmon_fan_max] = "fan%d_max",
+   [hwmon_fan_div] = "fan%d_div",
+   [hwmon_fan_pulses] = "fan%d_pulses",
+   [hwmon_fan_target] = "fan%d_target",
+   [hwmon_fan_alarm] = "fan%d_alarm",
+   [hwmon_fan_min_alarm] = "fan%d_min_alarm",
+   [hwmon_fan_max_alarm] = "fan%d_max_alarm",
+   [hwmon_fan_fault] = "fan%d_fault",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
@@ -373,6 +387,7 @@ static const char * const *__templates[] = {
[hwmon_power] = hwmon_power_attr_templates,
[hwmon_energy] = hwmon_energy_attr_templates,
[hwmon_humidity] = hwmon_humidity_attr_templates,
+   [hwmon_fan] = hwmon_fan_attr_templates,
 };
 
 static const int __templates_size[] = {
@@ -383,6 +398,7 @@ static const int __templates_size[] = {
[hwmon_power] = ARRAY_SIZE(hwmon_power_attr_templates),
[hwmon_energy] = ARRAY_SIZE(hwmon_energy_attr_templates),
[hwmon_humidity] = ARRAY_SIZE(hwmon_humidity_attr_templates),
+   [hwmon_fan] = ARRAY_SIZE(hwmon_fan_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index 57d92f1d779b..74e89d45ff67 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -27,6 +27,7 @@ enum hwmon_sensor_types {
hwmon_power,
hwmon_energy,
hwmon_humidity,
+   hwmon_fan,
 };
 
 enum hwmon_chip_attributes {
@@ -245,6 +246,32 @@ enum hwmon_humidity_attributes {
 #define HWMON_H_ALARM  BIT(hwmon_humidity_alarm)
 #define HWMON_H_FAULT  BIT(hwmon_humidity_fault)
 
+enum hwmon_fan_attributes {
+   hwmon_fan_input,
+   hwmon_fan_label,
+   hwmon_fan_min,
+   hwmon_fan_max,
+   hwmon_fan_div,
+   hwmon_fan_pulses,
+   hwmon_fan_target,
+   hwmon_fan_alarm,
+   hwmon_fan_min_alarm,
+   hwmon_fan_max_alarm,
+   hwmon_fan_fault,
+};
+
+#define HWMON_F_INPUT  BIT(hwmon_fan_input)
+#define HWMON_F_LABEL  BIT(hwmon_fan_label)
+#define HWMON_F_MINBIT(hwmon_fan_min)
+#define HWMON_F_MAXBIT(hwmon_fan_max)
+#define HWMON_F_DIVBIT(hwmon_fan_div)
+#define HWMON_F_PULSES BIT(hwmon_fan_pulses)
+#define HWMON_F_TARGET BIT(hwmon_fan_target)
+#define HWMON_F_ALARM  BIT(hwmon_fan_alarm)
+#define HWMON_F_MIN_ALARM  BIT(hwmon_fan_min_alarm)
+#define HWMON_F_MAX_ALARM  BIT(hwmon_fan_max_alarm)
+#define HWMON_F_FAULT  BIT(hwmon_fan_fault)
+
 /**
  * struct hwmon_ops - hwmon device operations
  * @is_visible: Callback to return attribute visibility. Mandatory.
-- 
2.5.0



[PATCH v2 6/9] hwmon: (core) Add energy and humidity attribute support to new API

2016-07-16 Thread Guenter Roeck
Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: No change

 drivers/hwmon/hwmon.c | 20 
 include/linux/hwmon.h | 29 +
 2 files changed, 49 insertions(+)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index 7a5c8bba7dc2..f5de80a8bd1e 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -349,12 +349,30 @@ static const char * const hwmon_power_attr_templates[] = {
[hwmon_power_crit_alarm] = "power%d_crit_alarm",
 };
 
+static const char * const hwmon_energy_attr_templates[] = {
+   [hwmon_energy_input] = "energy%d_input",
+   [hwmon_energy_label] = "energy%d_label",
+};
+
+static const char * const hwmon_humidity_attr_templates[] = {
+   [hwmon_humidity_input] = "humidity%d_input",
+   [hwmon_humidity_label] = "humidity%d_label",
+   [hwmon_humidity_min] = "humidity%d_min",
+   [hwmon_humidity_min_hyst] = "humidity%d_min_hyst",
+   [hwmon_humidity_max] = "humidity%d_max",
+   [hwmon_humidity_max_hyst] = "humidity%d_max_hyst",
+   [hwmon_humidity_alarm] = "humidity%d_alarm",
+   [hwmon_humidity_fault] = "humidity%d_fault",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
[hwmon_in] = hwmon_in_attr_templates,
[hwmon_curr] = hwmon_curr_attr_templates,
[hwmon_power] = hwmon_power_attr_templates,
+   [hwmon_energy] = hwmon_energy_attr_templates,
+   [hwmon_humidity] = hwmon_humidity_attr_templates,
 };
 
 static const int __templates_size[] = {
@@ -363,6 +381,8 @@ static const int __templates_size[] = {
[hwmon_in] = ARRAY_SIZE(hwmon_in_attr_templates),
[hwmon_curr] = ARRAY_SIZE(hwmon_curr_attr_templates),
[hwmon_power] = ARRAY_SIZE(hwmon_power_attr_templates),
+   [hwmon_energy] = ARRAY_SIZE(hwmon_energy_attr_templates),
+   [hwmon_humidity] = ARRAY_SIZE(hwmon_humidity_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index d7e432ef7c2a..57d92f1d779b 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -26,6 +26,7 @@ enum hwmon_sensor_types {
hwmon_curr,
hwmon_power,
hwmon_energy,
+   hwmon_humidity,
 };
 
 enum hwmon_chip_attributes {
@@ -216,6 +217,34 @@ enum hwmon_power_attributes {
 #define HWMON_P_MAX_ALARM  BIT(hwmon_power_max_alarm)
 #define HWMON_P_CRIT_ALARM BIT(hwmon_power_crit_alarm)
 
+enum hwmon_energy_attributes {
+   hwmon_energy_input,
+   hwmon_energy_label,
+};
+
+#define HWMON_E_INPUT  BIT(hwmon_energy_input)
+#define HWMON_E_LABEL  BIT(hwmon_energy_label)
+
+enum hwmon_humidity_attributes {
+   hwmon_humidity_input,
+   hwmon_humidity_label,
+   hwmon_humidity_min,
+   hwmon_humidity_min_hyst,
+   hwmon_humidity_max,
+   hwmon_humidity_max_hyst,
+   hwmon_humidity_alarm,
+   hwmon_humidity_fault,
+};
+
+#define HWMON_H_INPUT  BIT(hwmon_humidity_input)
+#define HWMON_H_LABEL  BIT(hwmon_humidity_label)
+#define HWMON_H_MINBIT(hwmon_humidity_min)
+#define HWMON_H_MIN_HYST   BIT(hwmon_humidity_min_hyst)
+#define HWMON_H_MAXBIT(hwmon_humidity_max)
+#define HWMON_H_MAX_HYST   BIT(hwmon_humidity_max_hyst)
+#define HWMON_H_ALARM  BIT(hwmon_humidity_alarm)
+#define HWMON_H_FAULT  BIT(hwmon_humidity_fault)
+
 /**
  * struct hwmon_ops - hwmon device operations
  * @is_visible: Callback to return attribute visibility. Mandatory.
-- 
2.5.0



[PATCH v2 9/9] hwmon: (core) Add basic pwm attribute support to new API

2016-07-16 Thread Guenter Roeck
Add basic pwm attribute support (no auto attributes) to new API.

Signed-off-by: Guenter Roeck 
---
v2: Added patch

 Documentation/hwmon/hwmon-kernel-api.txt |  2 ++
 drivers/hwmon/hwmon.c|  9 +
 include/linux/hwmon.h| 13 +
 3 files changed, 24 insertions(+)

diff --git a/Documentation/hwmon/hwmon-kernel-api.txt 
b/Documentation/hwmon/hwmon-kernel-api.txt
index f60a29ce7592..ef9d74947f5c 100644
--- a/Documentation/hwmon/hwmon-kernel-api.txt
+++ b/Documentation/hwmon/hwmon-kernel-api.txt
@@ -168,6 +168,7 @@ It contains following fields:
   * hwmon_energy   Energy sensor
   * hwmon_humidity Humidity sensor
   * hwmon_fan  Fan speed sensor
+  * hwmon_pwm  PWM control
 
 * config: Pointer to a 0-terminated list of configuration values for each
   sensor of the given type. Each value is a combination of bit values
@@ -230,6 +231,7 @@ HWMON_P_Power attributes, for use with 
hwmon_power.
 HWMON_E_   Energy attributes, for use with hwmon_energy.
 HWMON_H_   Humidity attributes, for use with hwmon_humidity.
 HWMON_F_   Fan speed attributes, for use with hwmon_fan.
+HWMON_PWM_ PWM control attributes, for use with hwmon_pwm.
 
 Driver callback functions
 -
diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index 38c217e64d41..bd99732e415b 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -379,6 +379,13 @@ static const char * const hwmon_fan_attr_templates[] = {
[hwmon_fan_fault] = "fan%d_fault",
 };
 
+static const char * const hwmon_pwm_attr_templates[] = {
+   [hwmon_pwm_input] = "pwm%d",
+   [hwmon_pwm_enable] = "pwm%d_enable",
+   [hwmon_pwm_mode] = "pwm%d_mode",
+   [hwmon_pwm_freq] = "pwm%d_freq",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
@@ -388,6 +395,7 @@ static const char * const *__templates[] = {
[hwmon_energy] = hwmon_energy_attr_templates,
[hwmon_humidity] = hwmon_humidity_attr_templates,
[hwmon_fan] = hwmon_fan_attr_templates,
+   [hwmon_pwm] = hwmon_pwm_attr_templates,
 };
 
 static const int __templates_size[] = {
@@ -399,6 +407,7 @@ static const int __templates_size[] = {
[hwmon_energy] = ARRAY_SIZE(hwmon_energy_attr_templates),
[hwmon_humidity] = ARRAY_SIZE(hwmon_humidity_attr_templates),
[hwmon_fan] = ARRAY_SIZE(hwmon_fan_attr_templates),
+   [hwmon_pwm] = ARRAY_SIZE(hwmon_pwm_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index 74e89d45ff67..9d2f8bde7d12 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -28,6 +28,7 @@ enum hwmon_sensor_types {
hwmon_energy,
hwmon_humidity,
hwmon_fan,
+   hwmon_pwm,
 };
 
 enum hwmon_chip_attributes {
@@ -272,6 +273,18 @@ enum hwmon_fan_attributes {
 #define HWMON_F_MAX_ALARM  BIT(hwmon_fan_max_alarm)
 #define HWMON_F_FAULT  BIT(hwmon_fan_fault)
 
+enum hwmon_pwm_attributes {
+   hwmon_pwm_input,
+   hwmon_pwm_enable,
+   hwmon_pwm_mode,
+   hwmon_pwm_freq,
+};
+
+#define HWMON_PWM_INPUTBIT(hwmon_pwm_input)
+#define HWMON_PWM_ENABLE   BIT(hwmon_pwm_enable)
+#define HWMON_PWM_MODE BIT(hwmon_pwm_mode)
+#define HWMON_PWM_FREQ BIT(hwmon_pwm_freq)
+
 /**
  * struct hwmon_ops - hwmon device operations
  * @is_visible: Callback to return attribute visibility. Mandatory.
-- 
2.5.0



[PATCH v2 3/9] hwmon: (core) Add voltage attribute support to new API

2016-07-16 Thread Guenter Roeck
Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: No change

 drivers/hwmon/hwmon.c | 21 +
 include/linux/hwmon.h | 35 +++
 2 files changed, 56 insertions(+)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index d780011cd063..5d88bf7f825a 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -252,6 +252,7 @@ static struct attribute *hwmon_genattr(struct device *dev,
 
 static const char * const hwmon_chip_attr_templates[] = {
[hwmon_chip_temp_reset_history] = "temp_reset_history",
+   [hwmon_chip_in_reset_history] = "in_reset_history",
[hwmon_chip_update_interval] = "update_interval",
[hwmon_chip_alarms] = "alarms",
 };
@@ -283,14 +284,34 @@ static const char * const hwmon_temp_attr_templates[] = {
[hwmon_temp_reset_history] = "temp%d_reset_history",
 };
 
+static const char * const hwmon_in_attr_templates[] = {
+   [hwmon_in_input] = "in%d_input",
+   [hwmon_in_min] = "in%d_min",
+   [hwmon_in_max] = "in%d_max",
+   [hwmon_in_lcrit] = "in%d_lcrit",
+   [hwmon_in_crit] = "in%d_crit",
+   [hwmon_in_average] = "in%d_average",
+   [hwmon_in_lowest] = "in%d_lowest",
+   [hwmon_in_highest] = "in%d_highest",
+   [hwmon_in_reset_history] = "in%d_reset_history",
+   [hwmon_in_label] = "in%d_label",
+   [hwmon_in_alarm] = "in%d_alarm",
+   [hwmon_in_min_alarm] = "in%d_min_alarm",
+   [hwmon_in_max_alarm] = "in%d_max_alarm",
+   [hwmon_in_lcrit_alarm] = "in%d_lcrit_alarm",
+   [hwmon_in_crit_alarm] = "in%d_crit_alarm",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
+   [hwmon_in] = hwmon_in_attr_templates,
 };
 
 static const int __templates_size[] = {
[hwmon_chip] = ARRAY_SIZE(hwmon_chip_attr_templates),
[hwmon_temp] = ARRAY_SIZE(hwmon_temp_attr_templates),
+   [hwmon_in] = ARRAY_SIZE(hwmon_in_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index 52e56d71d742..a01b8e3fc6f3 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -30,6 +30,7 @@ enum hwmon_sensor_types {
 
 enum hwmon_chip_attributes {
hwmon_chip_temp_reset_history,
+   hwmon_chip_in_reset_history,
hwmon_chip_register_tz,
hwmon_chip_update_interval,
hwmon_chip_alarms,
@@ -91,6 +92,40 @@ enum hwmon_temp_attributes {
 #define HWMON_T_HIGHESTBIT(hwmon_temp_highest)
 #define HWMON_T_RESET_HISTORY  BIT(hwmon_temp_reset_history)
 
+enum hwmon_in_attributes {
+   hwmon_in_input,
+   hwmon_in_min,
+   hwmon_in_max,
+   hwmon_in_lcrit,
+   hwmon_in_crit,
+   hwmon_in_average,
+   hwmon_in_lowest,
+   hwmon_in_highest,
+   hwmon_in_reset_history,
+   hwmon_in_label,
+   hwmon_in_alarm,
+   hwmon_in_min_alarm,
+   hwmon_in_max_alarm,
+   hwmon_in_lcrit_alarm,
+   hwmon_in_crit_alarm,
+};
+
+#define HWMON_I_INPUT  BIT(hwmon_in_input)
+#define HWMON_I_MINBIT(hwmon_in_min)
+#define HWMON_I_MAXBIT(hwmon_in_max)
+#define HWMON_I_LCRIT  BIT(hwmon_in_lcrit)
+#define HWMON_I_CRIT   BIT(hwmon_in_crit)
+#define HWMON_I_AVERAGEBIT(hwmon_in_average)
+#define HWMON_I_LOWEST BIT(hwmon_in_lowest)
+#define HWMON_I_HIGHESTBIT(hwmon_in_highest)
+#define HWMON_I_RESET_HISTORY  BIT(hwmon_in_reset_history)
+#define HWMON_I_LABEL  BIT(hwmon_in_label)
+#define HWMON_I_ALARM  BIT(hwmon_in_alarm)
+#define HWMON_I_MIN_ALARM  BIT(hwmon_in_min_alarm)
+#define HWMON_I_MAX_ALARM  BIT(hwmon_in_max_alarm)
+#define HWMON_I_LCRIT_ALARMBIT(hwmon_in_lcrit_alarm)
+#define HWMON_I_CRIT_ALARM BIT(hwmon_in_crit_alarm)
+
 /**
  * struct hwmon_ops - hwmon device operations
  * @is_visible: Callback to return attribute visibility. Mandatory.
-- 
2.5.0



[PATCH v2 1/9] hwmon: (core) Order include files alphabetically

2016-07-16 Thread Guenter Roeck
Ordering include files alphabetically makes it easier to add new ones.
Stop including linux/spinlock.h and linux/kdev_t.h since both are not
needed.

Signed-off-by: Guenter Roeck 
---
v2: Added patch

 drivers/hwmon/hwmon.c | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index a26c385a435b..649a68d119b4 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -12,16 +12,14 @@
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
-#include 
 #include 
 #include 
-#include 
-#include 
-#include 
-#include 
 #include 
-#include 
+#include 
+#include 
+#include 
 #include 
+#include 
 #include 
 
 #define HWMON_ID_PREFIX "hwmon"
-- 
2.5.0



[PATCH v2 0/9] hwmon: New hwmon registration API

2016-07-16 Thread Guenter Roeck
Up to now, each hwmon driver has to implement its own sysfs attributes.
This requires a lot of template code, and distracts from the driver's
core function to read and write chip registers.

To be able to reduce driver complexity, move sensor attribute handling
and thermal zone registration into the hwmon core. By using the new API,
driver size is typically reduced by 20-50% depending on driver complexity
and the number of sysfs attributes supported.

The first patch of the series is preparatory; it reorders include files
in the hwmon core to make it easier to add or remove individual include
files.

The secind patch of the series introduces the API as well as support
for temperature sensor attributes. Subsequent patches introduce support
for voltage, current, power, energy, humidity, fan speed, and basic pwm
attributes.

The series was tested by converting several drivers (lm75, lm90, tmp102,
tmp421, ltc4245, nct7904, max31790) to the new API. Testing was done with
real chips as well as with the hwmon driver module test code available
at https://github.com/groeck/module-tests.

v2:
- Add patch 1/9 (order include files alphabetically).
- Add patch 9/9 (pwm support).
- Document callback function parameters of struct hwmon_ops in
  include/linux/hwmon.h.
- Clarify that the is_visible() callback is mandatory.
- If an attribute has no template string, treat it as invisible, not as
  error. Affected are virtual attributes such as HWMON_C_REGISTER_TZ.
- Initialize device attribute read/write callback functions unconditionally.
- Cosmetic changes, including typo fixes and added newlines for readability.


[PATCH v2 1/9] hwmon: (core) Order include files alphabetically

2016-07-16 Thread Guenter Roeck
Ordering include files alphabetically makes it easier to add new ones.
Stop including linux/spinlock.h and linux/kdev_t.h since both are not
needed.

Signed-off-by: Guenter Roeck 
---
v2: Added patch

 drivers/hwmon/hwmon.c | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index a26c385a435b..649a68d119b4 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -12,16 +12,14 @@
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
-#include 
 #include 
 #include 
-#include 
-#include 
-#include 
-#include 
 #include 
-#include 
+#include 
+#include 
+#include 
 #include 
+#include 
 #include 
 
 #define HWMON_ID_PREFIX "hwmon"
-- 
2.5.0



[PATCH v2 0/9] hwmon: New hwmon registration API

2016-07-16 Thread Guenter Roeck
Up to now, each hwmon driver has to implement its own sysfs attributes.
This requires a lot of template code, and distracts from the driver's
core function to read and write chip registers.

To be able to reduce driver complexity, move sensor attribute handling
and thermal zone registration into the hwmon core. By using the new API,
driver size is typically reduced by 20-50% depending on driver complexity
and the number of sysfs attributes supported.

The first patch of the series is preparatory; it reorders include files
in the hwmon core to make it easier to add or remove individual include
files.

The secind patch of the series introduces the API as well as support
for temperature sensor attributes. Subsequent patches introduce support
for voltage, current, power, energy, humidity, fan speed, and basic pwm
attributes.

The series was tested by converting several drivers (lm75, lm90, tmp102,
tmp421, ltc4245, nct7904, max31790) to the new API. Testing was done with
real chips as well as with the hwmon driver module test code available
at https://github.com/groeck/module-tests.

v2:
- Add patch 1/9 (order include files alphabetically).
- Add patch 9/9 (pwm support).
- Document callback function parameters of struct hwmon_ops in
  include/linux/hwmon.h.
- Clarify that the is_visible() callback is mandatory.
- If an attribute has no template string, treat it as invisible, not as
  error. Affected are virtual attributes such as HWMON_C_REGISTER_TZ.
- Initialize device attribute read/write callback functions unconditionally.
- Cosmetic changes, including typo fixes and added newlines for readability.


[PATCH v2 5/9] hwmon: (core) Add power attribute support to new API

2016-07-16 Thread Guenter Roeck
Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: No change

 drivers/hwmon/hwmon.c | 30 
 include/linux/hwmon.h | 54 +++
 2 files changed, 84 insertions(+)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index bc5c1c95cc48..7a5c8bba7dc2 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -254,6 +254,7 @@ static const char * const hwmon_chip_attr_templates[] = {
[hwmon_chip_temp_reset_history] = "temp_reset_history",
[hwmon_chip_in_reset_history] = "in_reset_history",
[hwmon_chip_curr_reset_history] = "curr_reset_history",
+   [hwmon_chip_power_reset_history] = "power_reset_history",
[hwmon_chip_update_interval] = "update_interval",
[hwmon_chip_alarms] = "alarms",
 };
@@ -321,11 +322,39 @@ static const char * const hwmon_curr_attr_templates[] = {
[hwmon_curr_crit_alarm] = "curr%d_crit_alarm",
 };
 
+static const char * const hwmon_power_attr_templates[] = {
+   [hwmon_power_average] = "power%d_average",
+   [hwmon_power_average_interval] = "power%d_average_interval",
+   [hwmon_power_average_interval_max] = "power%d_interval_max",
+   [hwmon_power_average_interval_min] = "power%d_interval_min",
+   [hwmon_power_average_highest] = "power%d_average_highest",
+   [hwmon_power_average_lowest] = "power%d_average_lowest",
+   [hwmon_power_average_max] = "power%d_average_max",
+   [hwmon_power_average_min] = "power%d_average_min",
+   [hwmon_power_input] = "power%d_input",
+   [hwmon_power_input_highest] = "power%d_input_highest",
+   [hwmon_power_input_lowest] = "power%d_input_lowest",
+   [hwmon_power_reset_history] = "power%d_reset_history",
+   [hwmon_power_accuracy] = "power%d_accuracy",
+   [hwmon_power_cap] = "power%d_cap",
+   [hwmon_power_cap_hyst] = "power%d_cap_hyst",
+   [hwmon_power_cap_max] = "power%d_cap_max",
+   [hwmon_power_cap_min] = "power%d_cap_min",
+   [hwmon_power_max] = "power%d_max",
+   [hwmon_power_crit] = "power%d_crit",
+   [hwmon_power_label] = "power%d_label",
+   [hwmon_power_alarm] = "power%d_alarm",
+   [hwmon_power_cap_alarm] = "power%d_cap_alarm",
+   [hwmon_power_max_alarm] = "power%d_max_alarm",
+   [hwmon_power_crit_alarm] = "power%d_crit_alarm",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
[hwmon_in] = hwmon_in_attr_templates,
[hwmon_curr] = hwmon_curr_attr_templates,
+   [hwmon_power] = hwmon_power_attr_templates,
 };
 
 static const int __templates_size[] = {
@@ -333,6 +362,7 @@ static const int __templates_size[] = {
[hwmon_temp] = ARRAY_SIZE(hwmon_temp_attr_templates),
[hwmon_in] = ARRAY_SIZE(hwmon_in_attr_templates),
[hwmon_curr] = ARRAY_SIZE(hwmon_curr_attr_templates),
+   [hwmon_power] = ARRAY_SIZE(hwmon_power_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index 8781c2253b1d..d7e432ef7c2a 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -32,6 +32,7 @@ enum hwmon_chip_attributes {
hwmon_chip_temp_reset_history,
hwmon_chip_in_reset_history,
hwmon_chip_curr_reset_history,
+   hwmon_chip_power_reset_history,
hwmon_chip_register_tz,
hwmon_chip_update_interval,
hwmon_chip_alarms,
@@ -40,6 +41,7 @@ enum hwmon_chip_attributes {
 #define HWMON_C_TEMP_RESET_HISTORY BIT(hwmon_chip_temp_reset_history)
 #define HWMON_C_IN_RESET_HISTORY   BIT(hwmon_chip_in_reset_history)
 #define HWMON_C_CURR_RESET_HISTORY BIT(hwmon_chip_curr_reset_history)
+#define HWMON_C_POWER_RESET_HISTORYBIT(hwmon_chip_power_reset_history)
 #define HWMON_C_REGISTER_TZBIT(hwmon_chip_register_tz)
 #define HWMON_C_UPDATE_INTERVALBIT(hwmon_chip_update_interval)
 #define HWMON_C_ALARMS BIT(hwmon_chip_alarms)
@@ -162,6 +164,58 @@ enum hwmon_curr_attributes {
 #define HWMON_C_LCRIT_ALARMBIT(hwmon_curr_lcrit_alarm)
 #define HWMON_C_CRIT_ALARM BIT(hwmon_curr_crit_alarm)
 
+enum hwmon_power_attributes {
+   hwmon_power_average,
+   hwmon_power_average_interval,
+   hwmon_power_average_interval_max,
+   hwmon_power_average_interval_min,
+   hwmon_power_average_highest,
+   hwmon_power_average_lowest,
+   hwmon_power_average_max,
+   hwmon_power_average_min,
+   hwmon_power_input,
+   hwmon_power_input_highest,
+   hwmon_power_input_lowest,
+   hwmon_power_reset_history,
+   hwmon_power_accuracy,
+   hwmon_power_cap,
+   hwmon_power_cap_hyst,
+   hwmon_power_cap_max,
+   hwmon_power_cap_min,
+   hwmon_power_max,
+   hwmon_power_crit,
+   

[PATCH v2 2/9] hwmon: (core) New hwmon registration API

2016-07-16 Thread Guenter Roeck
Up to now, each hwmon driver has to implement its own sysfs attributes.
This requires a lot of template code, and distracts from the driver's core
function to read and write chip registers.

To be able to reduce driver complexity, move sensor attribute handling
and thermal zone registration into hwmon core. By using the new API,
driver code and data size is typically reduced by 20-70%, depending
on driver complexity and the number of sysfs attributes supported.

With this patch, the new API only supports thermal sensors. Support for
other sensor types will be added with subsequent patches.

Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2:
- Document callback function parameters of struct hwmon_ops in
  include/linux/hwmon.h.
- Clarify that the is_visible() callback is mandatory.
- Initialize device attribute read/write callback functions unconditionally.
- If an attribute has no template string, treat it as invisible, not as
  error. Affected are virtual attributes such as HWMON_C_REGISTER_TZ.
- Added newline to improve readability.

Review comments not addressed:
- Stick with u32 for attribute masks. We could use u64, but it is currently
  not needed, and changing it later would be straightforward.
- Do not use for_each_set_bit() to walk attribute masks.
  for_each_set_bit() expects a pointer to an unsigned long as argument,
  which would make it difficult to switch to u64 attribute masks if/when
  needed.

 drivers/hwmon/hwmon.c | 478 +++---
 include/linux/hwmon.h | 148 
 2 files changed, 599 insertions(+), 27 deletions(-)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index 649a68d119b4..d780011cd063 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -12,6 +12,7 @@
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
+#include 
 #include 
 #include 
 #include 
@@ -21,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define HWMON_ID_PREFIX "hwmon"
 #define HWMON_ID_FORMAT HWMON_ID_PREFIX "%d"
@@ -28,9 +30,35 @@
 struct hwmon_device {
const char *name;
struct device dev;
+   const struct hwmon_chip_info *chip;
+
+   struct attribute_group group;
+   const struct attribute_group **groups;
 };
+
 #define to_hwmon_device(d) container_of(d, struct hwmon_device, dev)
 
+struct hwmon_device_attribute {
+   struct device_attribute dev_attr;
+   const struct hwmon_ops *ops;
+   enum hwmon_sensor_types type;
+   u32 attr;
+   int index;
+};
+
+#define to_hwmon_attr(d) \
+   container_of(d, struct hwmon_device_attribute, dev_attr)
+
+/*
+ * Thermal zone information
+ * In addition to the reference to the hwmon device,
+ * also provides the sensor index.
+ */
+struct hwmon_thermal_data {
+   struct hwmon_device *hwdev; /* Reference to hwmon device */
+   int index;  /* sensor index */
+};
+
 static ssize_t
 show_name(struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -78,25 +106,279 @@ static struct class hwmon_class = {
 
 static DEFINE_IDA(hwmon_ida);
 
-/**
- * hwmon_device_register_with_groups - register w/ hwmon
- * @dev: the parent device
- * @name: hwmon name attribute
- * @drvdata: driver data to attach to created device
- * @groups: List of attribute groups to create
- *
- * hwmon_device_unregister() must be called when the device is no
- * longer needed.
- *
- * Returns the pointer to the new device.
- */
-struct device *
-hwmon_device_register_with_groups(struct device *dev, const char *name,
- void *drvdata,
- const struct attribute_group **groups)
+/* Thermal zone handling */
+
+static int hwmon_thermal_get_temp(void *data, int *temp)
+{
+   struct hwmon_thermal_data *tdata = data;
+   struct hwmon_device *hwdev = tdata->hwdev;
+   int ret;
+   long t;
+
+   ret = hwdev->chip->ops->read(>dev, hwmon_temp, hwmon_temp_input,
+tdata->index, );
+   if (ret < 0)
+   return ret;
+
+   *temp = t;
+
+   return 0;
+}
+
+static struct thermal_zone_of_device_ops hwmon_thermal_ops = {
+   .get_temp = hwmon_thermal_get_temp,
+};
+
+static int hwmon_thermal_add_sensor(struct device *dev,
+   struct hwmon_device *hwdev,
+   int index)
+{
+   struct hwmon_thermal_data *tdata;
+
+   tdata = devm_kzalloc(dev, sizeof(*tdata), GFP_KERNEL);
+   if (!tdata)
+   return -ENOMEM;
+
+   tdata->hwdev = hwdev;
+   tdata->index = index;
+
+   devm_thermal_zone_of_sensor_register(>dev, index, tdata,
+_thermal_ops);
+
+   return 0;
+}
+
+/* sysfs attribute management */
+
+static ssize_t hwmon_attr_show(struct device *dev,
+  struct device_attribute *devattr, char *buf)

[PATCH v2 5/9] hwmon: (core) Add power attribute support to new API

2016-07-16 Thread Guenter Roeck
Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: No change

 drivers/hwmon/hwmon.c | 30 
 include/linux/hwmon.h | 54 +++
 2 files changed, 84 insertions(+)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index bc5c1c95cc48..7a5c8bba7dc2 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -254,6 +254,7 @@ static const char * const hwmon_chip_attr_templates[] = {
[hwmon_chip_temp_reset_history] = "temp_reset_history",
[hwmon_chip_in_reset_history] = "in_reset_history",
[hwmon_chip_curr_reset_history] = "curr_reset_history",
+   [hwmon_chip_power_reset_history] = "power_reset_history",
[hwmon_chip_update_interval] = "update_interval",
[hwmon_chip_alarms] = "alarms",
 };
@@ -321,11 +322,39 @@ static const char * const hwmon_curr_attr_templates[] = {
[hwmon_curr_crit_alarm] = "curr%d_crit_alarm",
 };
 
+static const char * const hwmon_power_attr_templates[] = {
+   [hwmon_power_average] = "power%d_average",
+   [hwmon_power_average_interval] = "power%d_average_interval",
+   [hwmon_power_average_interval_max] = "power%d_interval_max",
+   [hwmon_power_average_interval_min] = "power%d_interval_min",
+   [hwmon_power_average_highest] = "power%d_average_highest",
+   [hwmon_power_average_lowest] = "power%d_average_lowest",
+   [hwmon_power_average_max] = "power%d_average_max",
+   [hwmon_power_average_min] = "power%d_average_min",
+   [hwmon_power_input] = "power%d_input",
+   [hwmon_power_input_highest] = "power%d_input_highest",
+   [hwmon_power_input_lowest] = "power%d_input_lowest",
+   [hwmon_power_reset_history] = "power%d_reset_history",
+   [hwmon_power_accuracy] = "power%d_accuracy",
+   [hwmon_power_cap] = "power%d_cap",
+   [hwmon_power_cap_hyst] = "power%d_cap_hyst",
+   [hwmon_power_cap_max] = "power%d_cap_max",
+   [hwmon_power_cap_min] = "power%d_cap_min",
+   [hwmon_power_max] = "power%d_max",
+   [hwmon_power_crit] = "power%d_crit",
+   [hwmon_power_label] = "power%d_label",
+   [hwmon_power_alarm] = "power%d_alarm",
+   [hwmon_power_cap_alarm] = "power%d_cap_alarm",
+   [hwmon_power_max_alarm] = "power%d_max_alarm",
+   [hwmon_power_crit_alarm] = "power%d_crit_alarm",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
[hwmon_in] = hwmon_in_attr_templates,
[hwmon_curr] = hwmon_curr_attr_templates,
+   [hwmon_power] = hwmon_power_attr_templates,
 };
 
 static const int __templates_size[] = {
@@ -333,6 +362,7 @@ static const int __templates_size[] = {
[hwmon_temp] = ARRAY_SIZE(hwmon_temp_attr_templates),
[hwmon_in] = ARRAY_SIZE(hwmon_in_attr_templates),
[hwmon_curr] = ARRAY_SIZE(hwmon_curr_attr_templates),
+   [hwmon_power] = ARRAY_SIZE(hwmon_power_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index 8781c2253b1d..d7e432ef7c2a 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -32,6 +32,7 @@ enum hwmon_chip_attributes {
hwmon_chip_temp_reset_history,
hwmon_chip_in_reset_history,
hwmon_chip_curr_reset_history,
+   hwmon_chip_power_reset_history,
hwmon_chip_register_tz,
hwmon_chip_update_interval,
hwmon_chip_alarms,
@@ -40,6 +41,7 @@ enum hwmon_chip_attributes {
 #define HWMON_C_TEMP_RESET_HISTORY BIT(hwmon_chip_temp_reset_history)
 #define HWMON_C_IN_RESET_HISTORY   BIT(hwmon_chip_in_reset_history)
 #define HWMON_C_CURR_RESET_HISTORY BIT(hwmon_chip_curr_reset_history)
+#define HWMON_C_POWER_RESET_HISTORYBIT(hwmon_chip_power_reset_history)
 #define HWMON_C_REGISTER_TZBIT(hwmon_chip_register_tz)
 #define HWMON_C_UPDATE_INTERVALBIT(hwmon_chip_update_interval)
 #define HWMON_C_ALARMS BIT(hwmon_chip_alarms)
@@ -162,6 +164,58 @@ enum hwmon_curr_attributes {
 #define HWMON_C_LCRIT_ALARMBIT(hwmon_curr_lcrit_alarm)
 #define HWMON_C_CRIT_ALARM BIT(hwmon_curr_crit_alarm)
 
+enum hwmon_power_attributes {
+   hwmon_power_average,
+   hwmon_power_average_interval,
+   hwmon_power_average_interval_max,
+   hwmon_power_average_interval_min,
+   hwmon_power_average_highest,
+   hwmon_power_average_lowest,
+   hwmon_power_average_max,
+   hwmon_power_average_min,
+   hwmon_power_input,
+   hwmon_power_input_highest,
+   hwmon_power_input_lowest,
+   hwmon_power_reset_history,
+   hwmon_power_accuracy,
+   hwmon_power_cap,
+   hwmon_power_cap_hyst,
+   hwmon_power_cap_max,
+   hwmon_power_cap_min,
+   hwmon_power_max,
+   hwmon_power_crit,
+   hwmon_power_label,
+   hwmon_power_alarm,
+ 

[PATCH v2 2/9] hwmon: (core) New hwmon registration API

2016-07-16 Thread Guenter Roeck
Up to now, each hwmon driver has to implement its own sysfs attributes.
This requires a lot of template code, and distracts from the driver's core
function to read and write chip registers.

To be able to reduce driver complexity, move sensor attribute handling
and thermal zone registration into hwmon core. By using the new API,
driver code and data size is typically reduced by 20-70%, depending
on driver complexity and the number of sysfs attributes supported.

With this patch, the new API only supports thermal sensors. Support for
other sensor types will be added with subsequent patches.

Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2:
- Document callback function parameters of struct hwmon_ops in
  include/linux/hwmon.h.
- Clarify that the is_visible() callback is mandatory.
- Initialize device attribute read/write callback functions unconditionally.
- If an attribute has no template string, treat it as invisible, not as
  error. Affected are virtual attributes such as HWMON_C_REGISTER_TZ.
- Added newline to improve readability.

Review comments not addressed:
- Stick with u32 for attribute masks. We could use u64, but it is currently
  not needed, and changing it later would be straightforward.
- Do not use for_each_set_bit() to walk attribute masks.
  for_each_set_bit() expects a pointer to an unsigned long as argument,
  which would make it difficult to switch to u64 attribute masks if/when
  needed.

 drivers/hwmon/hwmon.c | 478 +++---
 include/linux/hwmon.h | 148 
 2 files changed, 599 insertions(+), 27 deletions(-)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index 649a68d119b4..d780011cd063 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -12,6 +12,7 @@
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
+#include 
 #include 
 #include 
 #include 
@@ -21,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define HWMON_ID_PREFIX "hwmon"
 #define HWMON_ID_FORMAT HWMON_ID_PREFIX "%d"
@@ -28,9 +30,35 @@
 struct hwmon_device {
const char *name;
struct device dev;
+   const struct hwmon_chip_info *chip;
+
+   struct attribute_group group;
+   const struct attribute_group **groups;
 };
+
 #define to_hwmon_device(d) container_of(d, struct hwmon_device, dev)
 
+struct hwmon_device_attribute {
+   struct device_attribute dev_attr;
+   const struct hwmon_ops *ops;
+   enum hwmon_sensor_types type;
+   u32 attr;
+   int index;
+};
+
+#define to_hwmon_attr(d) \
+   container_of(d, struct hwmon_device_attribute, dev_attr)
+
+/*
+ * Thermal zone information
+ * In addition to the reference to the hwmon device,
+ * also provides the sensor index.
+ */
+struct hwmon_thermal_data {
+   struct hwmon_device *hwdev; /* Reference to hwmon device */
+   int index;  /* sensor index */
+};
+
 static ssize_t
 show_name(struct device *dev, struct device_attribute *attr, char *buf)
 {
@@ -78,25 +106,279 @@ static struct class hwmon_class = {
 
 static DEFINE_IDA(hwmon_ida);
 
-/**
- * hwmon_device_register_with_groups - register w/ hwmon
- * @dev: the parent device
- * @name: hwmon name attribute
- * @drvdata: driver data to attach to created device
- * @groups: List of attribute groups to create
- *
- * hwmon_device_unregister() must be called when the device is no
- * longer needed.
- *
- * Returns the pointer to the new device.
- */
-struct device *
-hwmon_device_register_with_groups(struct device *dev, const char *name,
- void *drvdata,
- const struct attribute_group **groups)
+/* Thermal zone handling */
+
+static int hwmon_thermal_get_temp(void *data, int *temp)
+{
+   struct hwmon_thermal_data *tdata = data;
+   struct hwmon_device *hwdev = tdata->hwdev;
+   int ret;
+   long t;
+
+   ret = hwdev->chip->ops->read(>dev, hwmon_temp, hwmon_temp_input,
+tdata->index, );
+   if (ret < 0)
+   return ret;
+
+   *temp = t;
+
+   return 0;
+}
+
+static struct thermal_zone_of_device_ops hwmon_thermal_ops = {
+   .get_temp = hwmon_thermal_get_temp,
+};
+
+static int hwmon_thermal_add_sensor(struct device *dev,
+   struct hwmon_device *hwdev,
+   int index)
+{
+   struct hwmon_thermal_data *tdata;
+
+   tdata = devm_kzalloc(dev, sizeof(*tdata), GFP_KERNEL);
+   if (!tdata)
+   return -ENOMEM;
+
+   tdata->hwdev = hwdev;
+   tdata->index = index;
+
+   devm_thermal_zone_of_sensor_register(>dev, index, tdata,
+_thermal_ops);
+
+   return 0;
+}
+
+/* sysfs attribute management */
+
+static ssize_t hwmon_attr_show(struct device *dev,
+  struct device_attribute *devattr, char *buf)
+{
+   struct hwmon_device_attribute 

[PATCH v2 4/9] hwmon: (core) Add current attribute support to new API

2016-07-16 Thread Guenter Roeck
Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: No change

 drivers/hwmon/hwmon.c | 21 +
 include/linux/hwmon.h | 36 
 2 files changed, 57 insertions(+)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index 5d88bf7f825a..bc5c1c95cc48 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -253,6 +253,7 @@ static struct attribute *hwmon_genattr(struct device *dev,
 static const char * const hwmon_chip_attr_templates[] = {
[hwmon_chip_temp_reset_history] = "temp_reset_history",
[hwmon_chip_in_reset_history] = "in_reset_history",
+   [hwmon_chip_curr_reset_history] = "curr_reset_history",
[hwmon_chip_update_interval] = "update_interval",
[hwmon_chip_alarms] = "alarms",
 };
@@ -302,16 +303,36 @@ static const char * const hwmon_in_attr_templates[] = {
[hwmon_in_crit_alarm] = "in%d_crit_alarm",
 };
 
+static const char * const hwmon_curr_attr_templates[] = {
+   [hwmon_curr_input] = "curr%d_input",
+   [hwmon_curr_min] = "curr%d_min",
+   [hwmon_curr_max] = "curr%d_max",
+   [hwmon_curr_lcrit] = "curr%d_lcrit",
+   [hwmon_curr_crit] = "curr%d_crit",
+   [hwmon_curr_average] = "curr%d_average",
+   [hwmon_curr_lowest] = "curr%d_lowest",
+   [hwmon_curr_highest] = "curr%d_highest",
+   [hwmon_curr_reset_history] = "curr%d_reset_history",
+   [hwmon_curr_label] = "curr%d_label",
+   [hwmon_curr_alarm] = "curr%d_alarm",
+   [hwmon_curr_min_alarm] = "curr%d_min_alarm",
+   [hwmon_curr_max_alarm] = "curr%d_max_alarm",
+   [hwmon_curr_lcrit_alarm] = "curr%d_lcrit_alarm",
+   [hwmon_curr_crit_alarm] = "curr%d_crit_alarm",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
[hwmon_in] = hwmon_in_attr_templates,
+   [hwmon_curr] = hwmon_curr_attr_templates,
 };
 
 static const int __templates_size[] = {
[hwmon_chip] = ARRAY_SIZE(hwmon_chip_attr_templates),
[hwmon_temp] = ARRAY_SIZE(hwmon_temp_attr_templates),
[hwmon_in] = ARRAY_SIZE(hwmon_in_attr_templates),
+   [hwmon_curr] = ARRAY_SIZE(hwmon_curr_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index a01b8e3fc6f3..8781c2253b1d 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -31,6 +31,7 @@ enum hwmon_sensor_types {
 enum hwmon_chip_attributes {
hwmon_chip_temp_reset_history,
hwmon_chip_in_reset_history,
+   hwmon_chip_curr_reset_history,
hwmon_chip_register_tz,
hwmon_chip_update_interval,
hwmon_chip_alarms,
@@ -38,6 +39,7 @@ enum hwmon_chip_attributes {
 
 #define HWMON_C_TEMP_RESET_HISTORY BIT(hwmon_chip_temp_reset_history)
 #define HWMON_C_IN_RESET_HISTORY   BIT(hwmon_chip_in_reset_history)
+#define HWMON_C_CURR_RESET_HISTORY BIT(hwmon_chip_curr_reset_history)
 #define HWMON_C_REGISTER_TZBIT(hwmon_chip_register_tz)
 #define HWMON_C_UPDATE_INTERVALBIT(hwmon_chip_update_interval)
 #define HWMON_C_ALARMS BIT(hwmon_chip_alarms)
@@ -126,6 +128,40 @@ enum hwmon_in_attributes {
 #define HWMON_I_LCRIT_ALARMBIT(hwmon_in_lcrit_alarm)
 #define HWMON_I_CRIT_ALARM BIT(hwmon_in_crit_alarm)
 
+enum hwmon_curr_attributes {
+   hwmon_curr_input,
+   hwmon_curr_min,
+   hwmon_curr_max,
+   hwmon_curr_lcrit,
+   hwmon_curr_crit,
+   hwmon_curr_average,
+   hwmon_curr_lowest,
+   hwmon_curr_highest,
+   hwmon_curr_reset_history,
+   hwmon_curr_label,
+   hwmon_curr_alarm,
+   hwmon_curr_min_alarm,
+   hwmon_curr_max_alarm,
+   hwmon_curr_lcrit_alarm,
+   hwmon_curr_crit_alarm,
+};
+
+#define HWMON_C_INPUT  BIT(hwmon_curr_input)
+#define HWMON_C_MINBIT(hwmon_curr_min)
+#define HWMON_C_MAXBIT(hwmon_curr_max)
+#define HWMON_C_LCRIT  BIT(hwmon_curr_lcrit)
+#define HWMON_C_CRIT   BIT(hwmon_curr_crit)
+#define HWMON_C_AVERAGEBIT(hwmon_curr_average)
+#define HWMON_C_LOWEST BIT(hwmon_curr_lowest)
+#define HWMON_C_HIGHESTBIT(hwmon_curr_highest)
+#define HWMON_C_RESET_HISTORY  BIT(hwmon_curr_reset_history)
+#define HWMON_C_LABEL  BIT(hwmon_curr_label)
+#define HWMON_C_ALARM  BIT(hwmon_curr_alarm)
+#define HWMON_C_MIN_ALARM  BIT(hwmon_curr_min_alarm)
+#define HWMON_C_MAX_ALARM  BIT(hwmon_curr_max_alarm)
+#define HWMON_C_LCRIT_ALARMBIT(hwmon_curr_lcrit_alarm)
+#define HWMON_C_CRIT_ALARM BIT(hwmon_curr_crit_alarm)
+
 /**
  * struct hwmon_ops - hwmon device operations
  * @is_visible: Callback to return attribute visibility. Mandatory.
-- 
2.5.0



[PATCH v2 4/9] hwmon: (core) Add current attribute support to new API

2016-07-16 Thread Guenter Roeck
Acked-by: Punit Agrawal 
Signed-off-by: Guenter Roeck 
---
v2: No change

 drivers/hwmon/hwmon.c | 21 +
 include/linux/hwmon.h | 36 
 2 files changed, 57 insertions(+)

diff --git a/drivers/hwmon/hwmon.c b/drivers/hwmon/hwmon.c
index 5d88bf7f825a..bc5c1c95cc48 100644
--- a/drivers/hwmon/hwmon.c
+++ b/drivers/hwmon/hwmon.c
@@ -253,6 +253,7 @@ static struct attribute *hwmon_genattr(struct device *dev,
 static const char * const hwmon_chip_attr_templates[] = {
[hwmon_chip_temp_reset_history] = "temp_reset_history",
[hwmon_chip_in_reset_history] = "in_reset_history",
+   [hwmon_chip_curr_reset_history] = "curr_reset_history",
[hwmon_chip_update_interval] = "update_interval",
[hwmon_chip_alarms] = "alarms",
 };
@@ -302,16 +303,36 @@ static const char * const hwmon_in_attr_templates[] = {
[hwmon_in_crit_alarm] = "in%d_crit_alarm",
 };
 
+static const char * const hwmon_curr_attr_templates[] = {
+   [hwmon_curr_input] = "curr%d_input",
+   [hwmon_curr_min] = "curr%d_min",
+   [hwmon_curr_max] = "curr%d_max",
+   [hwmon_curr_lcrit] = "curr%d_lcrit",
+   [hwmon_curr_crit] = "curr%d_crit",
+   [hwmon_curr_average] = "curr%d_average",
+   [hwmon_curr_lowest] = "curr%d_lowest",
+   [hwmon_curr_highest] = "curr%d_highest",
+   [hwmon_curr_reset_history] = "curr%d_reset_history",
+   [hwmon_curr_label] = "curr%d_label",
+   [hwmon_curr_alarm] = "curr%d_alarm",
+   [hwmon_curr_min_alarm] = "curr%d_min_alarm",
+   [hwmon_curr_max_alarm] = "curr%d_max_alarm",
+   [hwmon_curr_lcrit_alarm] = "curr%d_lcrit_alarm",
+   [hwmon_curr_crit_alarm] = "curr%d_crit_alarm",
+};
+
 static const char * const *__templates[] = {
[hwmon_chip] = hwmon_chip_attr_templates,
[hwmon_temp] = hwmon_temp_attr_templates,
[hwmon_in] = hwmon_in_attr_templates,
+   [hwmon_curr] = hwmon_curr_attr_templates,
 };
 
 static const int __templates_size[] = {
[hwmon_chip] = ARRAY_SIZE(hwmon_chip_attr_templates),
[hwmon_temp] = ARRAY_SIZE(hwmon_temp_attr_templates),
[hwmon_in] = ARRAY_SIZE(hwmon_in_attr_templates),
+   [hwmon_curr] = ARRAY_SIZE(hwmon_curr_attr_templates),
 };
 
 static int hwmon_num_channel_attrs(const struct hwmon_channel_info *info)
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
index a01b8e3fc6f3..8781c2253b1d 100644
--- a/include/linux/hwmon.h
+++ b/include/linux/hwmon.h
@@ -31,6 +31,7 @@ enum hwmon_sensor_types {
 enum hwmon_chip_attributes {
hwmon_chip_temp_reset_history,
hwmon_chip_in_reset_history,
+   hwmon_chip_curr_reset_history,
hwmon_chip_register_tz,
hwmon_chip_update_interval,
hwmon_chip_alarms,
@@ -38,6 +39,7 @@ enum hwmon_chip_attributes {
 
 #define HWMON_C_TEMP_RESET_HISTORY BIT(hwmon_chip_temp_reset_history)
 #define HWMON_C_IN_RESET_HISTORY   BIT(hwmon_chip_in_reset_history)
+#define HWMON_C_CURR_RESET_HISTORY BIT(hwmon_chip_curr_reset_history)
 #define HWMON_C_REGISTER_TZBIT(hwmon_chip_register_tz)
 #define HWMON_C_UPDATE_INTERVALBIT(hwmon_chip_update_interval)
 #define HWMON_C_ALARMS BIT(hwmon_chip_alarms)
@@ -126,6 +128,40 @@ enum hwmon_in_attributes {
 #define HWMON_I_LCRIT_ALARMBIT(hwmon_in_lcrit_alarm)
 #define HWMON_I_CRIT_ALARM BIT(hwmon_in_crit_alarm)
 
+enum hwmon_curr_attributes {
+   hwmon_curr_input,
+   hwmon_curr_min,
+   hwmon_curr_max,
+   hwmon_curr_lcrit,
+   hwmon_curr_crit,
+   hwmon_curr_average,
+   hwmon_curr_lowest,
+   hwmon_curr_highest,
+   hwmon_curr_reset_history,
+   hwmon_curr_label,
+   hwmon_curr_alarm,
+   hwmon_curr_min_alarm,
+   hwmon_curr_max_alarm,
+   hwmon_curr_lcrit_alarm,
+   hwmon_curr_crit_alarm,
+};
+
+#define HWMON_C_INPUT  BIT(hwmon_curr_input)
+#define HWMON_C_MINBIT(hwmon_curr_min)
+#define HWMON_C_MAXBIT(hwmon_curr_max)
+#define HWMON_C_LCRIT  BIT(hwmon_curr_lcrit)
+#define HWMON_C_CRIT   BIT(hwmon_curr_crit)
+#define HWMON_C_AVERAGEBIT(hwmon_curr_average)
+#define HWMON_C_LOWEST BIT(hwmon_curr_lowest)
+#define HWMON_C_HIGHESTBIT(hwmon_curr_highest)
+#define HWMON_C_RESET_HISTORY  BIT(hwmon_curr_reset_history)
+#define HWMON_C_LABEL  BIT(hwmon_curr_label)
+#define HWMON_C_ALARM  BIT(hwmon_curr_alarm)
+#define HWMON_C_MIN_ALARM  BIT(hwmon_curr_min_alarm)
+#define HWMON_C_MAX_ALARM  BIT(hwmon_curr_max_alarm)
+#define HWMON_C_LCRIT_ALARMBIT(hwmon_curr_lcrit_alarm)
+#define HWMON_C_CRIT_ALARM BIT(hwmon_curr_crit_alarm)
+
 /**
  * struct hwmon_ops - hwmon device operations
  * @is_visible: Callback to return attribute visibility. Mandatory.
-- 
2.5.0



Re: [PATCH] net/mlx5_core/health: Remove deprecated create_singlethread_workqueue

2016-07-16 Thread Leon Romanovsky
On Sat, Jul 16, 2016 at 01:29:20PM +0530, Bhaktipriya Shridhar wrote:
> The workqueue health->wq was used as per device private health thread.
> This was done so that system error handling could be processed
> concurrently.

Not exactly, AFAIK it was intended to perform delayed work and not
relevant to concurrency.

> The workqueue has a single workitem(>work) and
> hence doesn't require ordering. It is involved in handling the health of
> the deviceand is not being used on a memory reclaim path.
> Hence, the singlethreaded workqueue has been replaced with the use of
> system_wq.

Yes

> 
> System workqueues have been able to handle high level of concurrency
> for a long time now and hence it's not required to have a singlethreaded
> workqueue just to gain concurrency. Unlike a dedicated per-cpu workqueue
> created with create_singlethread_workqueue(), system_wq allows multiple
> work items to overlap executions even on the same CPU; however, a
> per-cpu workqueue doesn't have any CPU locality or global ordering
> guarantee unless the target CPU is explicitly specified and thus the
> increase of local concurrency shouldn't make any difference.

Not relevant.

> 
> Work item has been flushed in mlx5_health_cleanup() to ensure that
> there are no pending tasks while disconnecting the driver.
> 
> Signed-off-by: Bhaktipriya Shridhar 
> ---
>  drivers/net/ethernet/mellanox/mlx5/core/health.c | 7 ++-
>  1 file changed, 2 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/health.c 
> b/drivers/net/ethernet/mellanox/mlx5/core/health.c
> index 42d16b9..9acbccf 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/health.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/health.c
> @@ -267,7 +267,7 @@ static void poll_health(unsigned long data)
>   if (in_fatal(dev) && !health->sick) {
>   health->sick = true;
>   print_health_info(dev);
> - queue_work(health->wq, >work);
> + schedule_work(>work);
>   }
>  }
> 
> @@ -296,7 +296,7 @@ void mlx5_health_cleanup(struct mlx5_core_dev *dev)
>  {
>   struct mlx5_core_health *health = >priv.health;
> 
> - destroy_workqueue(health->wq);
> + flush_work(>work);
>  }
> 
>  int mlx5_health_init(struct mlx5_core_dev *dev)
> @@ -311,10 +311,7 @@ int mlx5_health_init(struct mlx5_core_dev *dev)
> 
>   strcpy(name, "mlx5_health");
>   strcat(name, dev_name(>pdev->dev));
> - health->wq = create_singlethread_workqueue(name);
>   kfree(name);

You need to remove "name" initialization/usage too.
It is not needed.

> - if (!health->wq)
> - return -ENOMEM;
> 
>   INIT_WORK(>work, health_care);
> 
> --
> 2.1.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-rdma" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html


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Re: [PATCH] net/mlx5_core/health: Remove deprecated create_singlethread_workqueue

2016-07-16 Thread Leon Romanovsky
On Sat, Jul 16, 2016 at 01:29:20PM +0530, Bhaktipriya Shridhar wrote:
> The workqueue health->wq was used as per device private health thread.
> This was done so that system error handling could be processed
> concurrently.

Not exactly, AFAIK it was intended to perform delayed work and not
relevant to concurrency.

> The workqueue has a single workitem(>work) and
> hence doesn't require ordering. It is involved in handling the health of
> the deviceand is not being used on a memory reclaim path.
> Hence, the singlethreaded workqueue has been replaced with the use of
> system_wq.

Yes

> 
> System workqueues have been able to handle high level of concurrency
> for a long time now and hence it's not required to have a singlethreaded
> workqueue just to gain concurrency. Unlike a dedicated per-cpu workqueue
> created with create_singlethread_workqueue(), system_wq allows multiple
> work items to overlap executions even on the same CPU; however, a
> per-cpu workqueue doesn't have any CPU locality or global ordering
> guarantee unless the target CPU is explicitly specified and thus the
> increase of local concurrency shouldn't make any difference.

Not relevant.

> 
> Work item has been flushed in mlx5_health_cleanup() to ensure that
> there are no pending tasks while disconnecting the driver.
> 
> Signed-off-by: Bhaktipriya Shridhar 
> ---
>  drivers/net/ethernet/mellanox/mlx5/core/health.c | 7 ++-
>  1 file changed, 2 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/net/ethernet/mellanox/mlx5/core/health.c 
> b/drivers/net/ethernet/mellanox/mlx5/core/health.c
> index 42d16b9..9acbccf 100644
> --- a/drivers/net/ethernet/mellanox/mlx5/core/health.c
> +++ b/drivers/net/ethernet/mellanox/mlx5/core/health.c
> @@ -267,7 +267,7 @@ static void poll_health(unsigned long data)
>   if (in_fatal(dev) && !health->sick) {
>   health->sick = true;
>   print_health_info(dev);
> - queue_work(health->wq, >work);
> + schedule_work(>work);
>   }
>  }
> 
> @@ -296,7 +296,7 @@ void mlx5_health_cleanup(struct mlx5_core_dev *dev)
>  {
>   struct mlx5_core_health *health = >priv.health;
> 
> - destroy_workqueue(health->wq);
> + flush_work(>work);
>  }
> 
>  int mlx5_health_init(struct mlx5_core_dev *dev)
> @@ -311,10 +311,7 @@ int mlx5_health_init(struct mlx5_core_dev *dev)
> 
>   strcpy(name, "mlx5_health");
>   strcat(name, dev_name(>pdev->dev));
> - health->wq = create_singlethread_workqueue(name);
>   kfree(name);

You need to remove "name" initialization/usage too.
It is not needed.

> - if (!health->wq)
> - return -ENOMEM;
> 
>   INIT_WORK(>work, health_care);
> 
> --
> 2.1.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-rdma" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html


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Re: [PATCH net] net: nb8800: Fix SKB leak in nb8800_receive()

2016-07-16 Thread David Miller
From: Florian Fainelli 
Date: Fri, 15 Jul 2016 16:41:16 -0700

> In case nb8800_receive() fails to allocate a fragment, we would leak the
> SKB freshly allocated and just return, instead, free it.
> 
> Reported-by: coverity (CID 1341750)
> Signed-off-by: Florian Fainelli 

Applied.


Re: [PATCH net] net: cavium: liquidio: Avoid dma_unmap_single on uninitialized ndata

2016-07-16 Thread David Miller
From: Florian Fainelli 
Date: Fri, 15 Jul 2016 16:42:16 -0700

> The label lio_xmit_failed is used 3 times through liquidio_xmit() but it
> always makes a call to dma_unmap_single() using potentially
> uninitialized variables from "ndata" variable. Out of the 3 gotos, 2 run
> after ndata has been initialized, and had a prior dma_map_single() call.
> 
> Fix this by adding a new error label: lio_xmit_dma_failed which does
> this dma_unmap_single() and then processed with the lio_xmit_failed
> fallthrough.
> 
> Fixes: f21fb3ed364bb ("Add support of Cavium Liquidio ethernet adapters")
> Reported-by: coverity (CID 1309740)
> Signed-off-by: Florian Fainelli 

Applied.


Re: [PATCH net] net: nb8800: Fix SKB leak in nb8800_receive()

2016-07-16 Thread David Miller
From: Florian Fainelli 
Date: Fri, 15 Jul 2016 16:41:16 -0700

> In case nb8800_receive() fails to allocate a fragment, we would leak the
> SKB freshly allocated and just return, instead, free it.
> 
> Reported-by: coverity (CID 1341750)
> Signed-off-by: Florian Fainelli 

Applied.


Re: [PATCH net] net: cavium: liquidio: Avoid dma_unmap_single on uninitialized ndata

2016-07-16 Thread David Miller
From: Florian Fainelli 
Date: Fri, 15 Jul 2016 16:42:16 -0700

> The label lio_xmit_failed is used 3 times through liquidio_xmit() but it
> always makes a call to dma_unmap_single() using potentially
> uninitialized variables from "ndata" variable. Out of the 3 gotos, 2 run
> after ndata has been initialized, and had a prior dma_map_single() call.
> 
> Fix this by adding a new error label: lio_xmit_dma_failed which does
> this dma_unmap_single() and then processed with the lio_xmit_failed
> fallthrough.
> 
> Fixes: f21fb3ed364bb ("Add support of Cavium Liquidio ethernet adapters")
> Reported-by: coverity (CID 1309740)
> Signed-off-by: Florian Fainelli 

Applied.


Re: [PATCH net] et131x: Fix logical vs bitwise check in et131x_tx_timeout()

2016-07-16 Thread David Miller
From: Florian Fainelli 
Date: Fri, 15 Jul 2016 16:40:22 -0700

> We should be using a logical check here instead of a bitwise operation
> to check if the device is closed already in et131x_tx_timeout().
> 
> Reported-by: coverity (CID 146498)
> Fixes: 38df6492eb511 ("et131x: Add PCIe gigabit ethernet driver et131x to 
> drivers/net")
> Signed-off-by: Florian Fainelli 

Applied.


Re: [PATCH net] et131x: Fix logical vs bitwise check in et131x_tx_timeout()

2016-07-16 Thread David Miller
From: Florian Fainelli 
Date: Fri, 15 Jul 2016 16:40:22 -0700

> We should be using a logical check here instead of a bitwise operation
> to check if the device is closed already in et131x_tx_timeout().
> 
> Reported-by: coverity (CID 146498)
> Fixes: 38df6492eb511 ("et131x: Add PCIe gigabit ethernet driver et131x to 
> drivers/net")
> Signed-off-by: Florian Fainelli 

Applied.


[GIT PULL] ARM: SoC fixes

2016-07-16 Thread Olof Johansson
Hi Linus,

The following changes since commit 33688abb2802ff3a230bd2441f765477b94cc89e:

  Linux 4.7-rc4 (2016-06-19 21:30:02 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git 
tags/armsoc-fixes

for you to fetch changes up to 5eb495349f5ec3b134f7341a2450392fc86d99d0:

  ARM: tegra: beaver: Allow SD card voltage to be changed (2016-07-06 22:21:40 
-0700)


ARM: SoC fixes

A handful of fixes before final release:

Marvell Armada:
 - One to fix a typo in the devicetree specifying memory ranges for the
   crypto engine
 - Two to deal with marking PCI and device-memory as strongly ordered to
   avoid hardware deadlocks, in particular when enabling above crypto driver.
 - Compile fix for PM

Allwinner:
 - DT clock fixes to deal with u-boot-enabled framebuffer (simplefb).
 - Make R8 (C.H.I.P. SoC) inherit system compatibility from A13 to
   make clocks register proper.

Tegra:
 - Fix SD card voltage setting on the Tegra3 Beaver dev board

Misc:
 - Two maintainers updates for STM32 and STi platforms.


Arnd Bergmann (3):
  ARM: mvebu: compile pm code conditionally
  Merge tag 'sunxi-fixes-for-4.7' of 
https://git.kernel.org/.../mripard/linux into fixes
  Merge tag 'mvebu-fixes-4.7-2' of git://git.infradead.org/linux-mvebu into 
fixes

Boris Brezillon (1):
  ARM: sunxi/dt: make the CHIP inherit from allwinner,sun5i-a13

Hans de Goede (2):
  ARM: dts: sunxi: Add pll3 to simplefb nodes clocks lists
  ARM: dts: sun7i: Fix pll3x2 and pll7x2 not having a parent clock

Lucas Stach (1):
  ARM: tegra: beaver: Allow SD card voltage to be changed

Maxime Coquelin (2):
  MAINTAINERS: update STM32 maintainers list
  MAINTAINERS: update STi maintainer list

Olof Johansson (1):
  Merge tag 'mvebu-fixes-4.7-1' of git://git.infradead.org/linux-mvebu into 
fixes

Thomas Petazzoni (3):
  ARM: mvebu: fix HW I/O coherency related deadlocks
  ARM: mvebu: map PCI I/O regions strongly ordered
  ARM: dts: armada-38x: fix MBUS_ID for crypto SRAM on Armada 385 Linksys

 MAINTAINERS   |  3 +--
 arch/arm/boot/dts/armada-385-linksys.dtsi |  4 ++--
 arch/arm/boot/dts/sun4i-a10.dtsi  | 21 -
 arch/arm/boot/dts/sun5i-a10s.dtsi | 11 ++-
 arch/arm/boot/dts/sun5i-r8-chip.dts   |  2 +-
 arch/arm/boot/dts/sun7i-a20.dtsi  | 13 -
 arch/arm/boot/dts/tegra30-beaver.dts  |  3 ++-
 arch/arm/mach-mvebu/Makefile  | 10 --
 arch/arm/mach-mvebu/coherency.c   | 23 +--
 9 files changed, 49 insertions(+), 41 deletions(-)


[GIT PULL] ARM: SoC fixes

2016-07-16 Thread Olof Johansson
Hi Linus,

The following changes since commit 33688abb2802ff3a230bd2441f765477b94cc89e:

  Linux 4.7-rc4 (2016-06-19 21:30:02 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git 
tags/armsoc-fixes

for you to fetch changes up to 5eb495349f5ec3b134f7341a2450392fc86d99d0:

  ARM: tegra: beaver: Allow SD card voltage to be changed (2016-07-06 22:21:40 
-0700)


ARM: SoC fixes

A handful of fixes before final release:

Marvell Armada:
 - One to fix a typo in the devicetree specifying memory ranges for the
   crypto engine
 - Two to deal with marking PCI and device-memory as strongly ordered to
   avoid hardware deadlocks, in particular when enabling above crypto driver.
 - Compile fix for PM

Allwinner:
 - DT clock fixes to deal with u-boot-enabled framebuffer (simplefb).
 - Make R8 (C.H.I.P. SoC) inherit system compatibility from A13 to
   make clocks register proper.

Tegra:
 - Fix SD card voltage setting on the Tegra3 Beaver dev board

Misc:
 - Two maintainers updates for STM32 and STi platforms.


Arnd Bergmann (3):
  ARM: mvebu: compile pm code conditionally
  Merge tag 'sunxi-fixes-for-4.7' of 
https://git.kernel.org/.../mripard/linux into fixes
  Merge tag 'mvebu-fixes-4.7-2' of git://git.infradead.org/linux-mvebu into 
fixes

Boris Brezillon (1):
  ARM: sunxi/dt: make the CHIP inherit from allwinner,sun5i-a13

Hans de Goede (2):
  ARM: dts: sunxi: Add pll3 to simplefb nodes clocks lists
  ARM: dts: sun7i: Fix pll3x2 and pll7x2 not having a parent clock

Lucas Stach (1):
  ARM: tegra: beaver: Allow SD card voltage to be changed

Maxime Coquelin (2):
  MAINTAINERS: update STM32 maintainers list
  MAINTAINERS: update STi maintainer list

Olof Johansson (1):
  Merge tag 'mvebu-fixes-4.7-1' of git://git.infradead.org/linux-mvebu into 
fixes

Thomas Petazzoni (3):
  ARM: mvebu: fix HW I/O coherency related deadlocks
  ARM: mvebu: map PCI I/O regions strongly ordered
  ARM: dts: armada-38x: fix MBUS_ID for crypto SRAM on Armada 385 Linksys

 MAINTAINERS   |  3 +--
 arch/arm/boot/dts/armada-385-linksys.dtsi |  4 ++--
 arch/arm/boot/dts/sun4i-a10.dtsi  | 21 -
 arch/arm/boot/dts/sun5i-a10s.dtsi | 11 ++-
 arch/arm/boot/dts/sun5i-r8-chip.dts   |  2 +-
 arch/arm/boot/dts/sun7i-a20.dtsi  | 13 -
 arch/arm/boot/dts/tegra30-beaver.dts  |  3 ++-
 arch/arm/mach-mvebu/Makefile  | 10 --
 arch/arm/mach-mvebu/coherency.c   | 23 +--
 9 files changed, 49 insertions(+), 41 deletions(-)


Re: [PATCH] net: usb: ax88172x: use phy_ethtool_{get|set}_link_ksettings

2016-07-16 Thread David Miller
From: Philippe Reynes 
Date: Fri, 15 Jul 2016 15:25:36 +0200

> There are two generics functions phy_ethtool_{get|set}_link_ksettings,
> so we can use them instead of defining the same code in the driver.
> 
> Signed-off-by: Philippe Reynes 

Applied.


Re: [PATCH] net: usb: ax88172x: use phy_ethtool_{get|set}_link_ksettings

2016-07-16 Thread David Miller
From: Philippe Reynes 
Date: Fri, 15 Jul 2016 15:25:36 +0200

> There are two generics functions phy_ethtool_{get|set}_link_ksettings,
> so we can use them instead of defining the same code in the driver.
> 
> Signed-off-by: Philippe Reynes 

Applied.


Re: [PATCH v1 0/3] Add Hisilicon MDIO bus driver and FEMAC driver

2016-07-16 Thread David Miller
From: Dongpo Li 
Date: Fri, 15 Jul 2016 16:26:32 +0800

> This patch set adds a Hisilicon MDIO bus driver and
> a Fast Ethernet MAC(FEMAC) driver.
> We also abstract a general interface "of_phy_get_and_connect"
> for PHY connect. User will have no bother with getting
> "phy-mode" and "phy-handle" any more.
> 
> Changes in v1:
> - Pass private data structure instead of struct mii_bus
>   in MDIO read and write operation.
> - Return the error which devm_clk_get() gives when MDIO probe.
> - Leave the clock unprepared and disabled on error when MDIO probe.
> - Abstract a general interface "of_phy_get_and_connect" for PHY connect.
> - Remove the "_reset" suffixes in "reset-names" property.
> - Enable tx per-packet interrupt when tx fifo full.
> - Remove pointless compatible and add SoC specific compatible.
> - Declare only one clock in MAC dts documentation.
> - Add standard unit suffixes for "phy-reset-delays".
> - Use a smaller NAPI poll weight 16 for our Fast Ethernet MAC.
> - Use phy_ethtool_{get|set}_link_ksettings for ethtool ops.
> - Use phydev from struct net_device in MAC driver.

Series applied, thanks.


Re: [PATCH v1 0/3] Add Hisilicon MDIO bus driver and FEMAC driver

2016-07-16 Thread David Miller
From: Dongpo Li 
Date: Fri, 15 Jul 2016 16:26:32 +0800

> This patch set adds a Hisilicon MDIO bus driver and
> a Fast Ethernet MAC(FEMAC) driver.
> We also abstract a general interface "of_phy_get_and_connect"
> for PHY connect. User will have no bother with getting
> "phy-mode" and "phy-handle" any more.
> 
> Changes in v1:
> - Pass private data structure instead of struct mii_bus
>   in MDIO read and write operation.
> - Return the error which devm_clk_get() gives when MDIO probe.
> - Leave the clock unprepared and disabled on error when MDIO probe.
> - Abstract a general interface "of_phy_get_and_connect" for PHY connect.
> - Remove the "_reset" suffixes in "reset-names" property.
> - Enable tx per-packet interrupt when tx fifo full.
> - Remove pointless compatible and add SoC specific compatible.
> - Declare only one clock in MAC dts documentation.
> - Add standard unit suffixes for "phy-reset-delays".
> - Use a smaller NAPI poll weight 16 for our Fast Ethernet MAC.
> - Use phy_ethtool_{get|set}_link_ksettings for ethtool ops.
> - Use phydev from struct net_device in MAC driver.

Series applied, thanks.


(.init.text+0x2b8): multiple definition of `plat_irq_setup'

2016-07-16 Thread kbuild test robot
Hi,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   47ef4ad2684d380dd6d596140fb79395115c3950
commit: 7480e0aabd5f9e6c3e3b72ed206e89284e90f11f sh: add device tree support 
and generic board using device tree
date:   4 months ago
config: sh-allyesconfig (attached as .config)
compiler: sh4-linux-gnu-gcc (Debian 5.3.1-8) 5.3.1 20160205
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 7480e0aabd5f9e6c3e3b72ed206e89284e90f11f
# save the attached .config to linux build tree
make.cross ARCH=sh 

All errors (new ones prefixed by >>):

   arch/sh/boards/built-in.o: In function `plat_irq_setup':
>> (.init.text+0x2b8): multiple definition of `plat_irq_setup'
   arch/sh/kernel/built-in.o:(.init.text+0x1250): first defined here
   arch/sh/boards/built-in.o: In function `arch_init_clk_ops':
>> (.init.text+0x294): multiple definition of `arch_init_clk_ops'
   arch/sh/kernel/built-in.o:(.init.text+0x1300): first defined here

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


(.init.text+0x2b8): multiple definition of `plat_irq_setup'

2016-07-16 Thread kbuild test robot
Hi,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   47ef4ad2684d380dd6d596140fb79395115c3950
commit: 7480e0aabd5f9e6c3e3b72ed206e89284e90f11f sh: add device tree support 
and generic board using device tree
date:   4 months ago
config: sh-allyesconfig (attached as .config)
compiler: sh4-linux-gnu-gcc (Debian 5.3.1-8) 5.3.1 20160205
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 7480e0aabd5f9e6c3e3b72ed206e89284e90f11f
# save the attached .config to linux build tree
make.cross ARCH=sh 

All errors (new ones prefixed by >>):

   arch/sh/boards/built-in.o: In function `plat_irq_setup':
>> (.init.text+0x2b8): multiple definition of `plat_irq_setup'
   arch/sh/kernel/built-in.o:(.init.text+0x1250): first defined here
   arch/sh/boards/built-in.o: In function `arch_init_clk_ops':
>> (.init.text+0x294): multiple definition of `arch_init_clk_ops'
   arch/sh/kernel/built-in.o:(.init.text+0x1300): first defined here

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


Re: [patch] mtd: maps: sa1100-flash: potential NULL dereference

2016-07-16 Thread Brian Norris
On Sat, Jul 16, 2016 at 12:00:41PM +0300, Dan Carpenter wrote:
> I like the Fixes tag because it was my invention.  :)  It's a separate
> thing from -stable.

Ha, nice. Well I have nothing against the tag, and nothing against this
patch. It's good to know that the Fixes tag is not (necessarily) a
request-for-stable tag.

> It's nice for reviewing so you can see the original intent of the patch
> you're fixing.  Also it forces you to find the original authors and CC
> them so hopefully they Ack the patch.  The other thing is it lets you
> collect data about which patches introduce bugs and how quickly they
> get fixed.  So for example, lwn.net recently had an article about bug
> that are backported into the -stable tree.

All good things. I know personally it's helpful when tracking down bugs,
or backporting drivers or features.

Regards,
Brian


Re: [patch] mtd: maps: sa1100-flash: potential NULL dereference

2016-07-16 Thread Brian Norris
On Sat, Jul 16, 2016 at 12:00:41PM +0300, Dan Carpenter wrote:
> I like the Fixes tag because it was my invention.  :)  It's a separate
> thing from -stable.

Ha, nice. Well I have nothing against the tag, and nothing against this
patch. It's good to know that the Fixes tag is not (necessarily) a
request-for-stable tag.

> It's nice for reviewing so you can see the original intent of the patch
> you're fixing.  Also it forces you to find the original authors and CC
> them so hopefully they Ack the patch.  The other thing is it lets you
> collect data about which patches introduce bugs and how quickly they
> get fixed.  So for example, lwn.net recently had an article about bug
> that are backported into the -stable tree.

All good things. I know personally it's helpful when tracking down bugs,
or backporting drivers or features.

Regards,
Brian


Re: [PATCH] mtd: nand: brcmnand: Change BUG_ON in brcmnand_send_cmd

2016-07-16 Thread Brian Norris
On Fri, Jul 08, 2016 at 10:36:39AM -0700, Florian Fainelli wrote:
> Change the BUG_ON() condition in brcmnand_send_cmd() which checks for
> the interrupt status "controller ready" bit to a WARN_ON.
> 
> There is no good reason to kill the system when this condition occur
> because we could have systems which listed the NAND controller as
> available (e.g: from Device Tree), but the NAND chip could be
> malfunctioning and not responding.
> 
> Signed-off-by: Florian Fainelli 

Applied to l2-mtd.git


Re: [PATCH] mtd: nand: brcmnand: Change BUG_ON in brcmnand_send_cmd

2016-07-16 Thread Brian Norris
On Fri, Jul 08, 2016 at 10:36:39AM -0700, Florian Fainelli wrote:
> Change the BUG_ON() condition in brcmnand_send_cmd() which checks for
> the interrupt status "controller ready" bit to a WARN_ON.
> 
> There is no good reason to kill the system when this condition occur
> because we could have systems which listed the NAND controller as
> available (e.g: from Device Tree), but the NAND chip could be
> malfunctioning and not responding.
> 
> Signed-off-by: Florian Fainelli 

Applied to l2-mtd.git


Re: [PATCH] vfs:Fix kmemleak in get_empty_filp on error path if security_file_alloc fails

2016-07-16 Thread Al Viro
On Sat, Jul 16, 2016 at 11:00:03PM -0400, Nicholas Krause wrote:
> This fixes the following kmemleak memory report spat:
> [  321.783718] ath9k :03:00.0 eth0: renamed from wlan0
> [  330.960024] atl1c :02:00.0 eth1: renamed from eth126
> [  391.831384] WARNING: kmemcheck: Caught 64-bit read from uninitialized 
> memory (8800a8ad8a00)
> [  392.678675] 
> 00acada80088feedcafe2800280088008afa90c8
> [  393.568962]  u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u 
> u
> [  394.461350]  ^
> [  395.305638] RIP: 0010:[]  [] 
> kmem_cache_alloc+0x70/0x120
> [  396.180025] RSP: 0018:8800a88ebd10  EFLAGS: 00010246
> [  397.037327] RAX: 8800a8ad8a00 RBX:  RCX: 
> 001d90e0
> [  397.889379] RDX: 00057898 RSI: 00057898 RDI: 
> 001d90e0
> [  398.735330] RBP: 8800a88ebd38 R08:  R09: 
> f580
> [  399.580699] R10: 0001 R11: 8801c294b000 R12: 
> 8800a8ad8a00
> [  400.426021] R13: 8119e308 R14: 8801c7003600 R15: 
> 024080c0
> [  401.271494] FS:  7f6073fc3780() GS:8801c740() 
> knlGS:
> [  402.117062] CS:  0010 DS:  ES:  CR0: 80050033
> [  402.955591] CR2: 8801c7060c90 CR3: a88f1000 CR4: 
> 000406f0
> [  403.807725]  [] get_empty_filp+0x58/0x1b0
> [  404.661980]  [] path_openat+0x26/0x9a0
> [  405.514128]  [] do_filp_open+0x79/0xd0
> [  406.358987]  [] do_sys_open+0x122/0x1f0
> [  407.194074]  [] SyS_open+0x19/0x20
> [  408.017053]  [] entry_SYSCALL_64_fastpath+0x18/0xa8
> [  408.844745]  [] 0x
> [  417.533148] Adding 1048572k swap on /dev/sda1.  Priority:-1 extents:1 
> across:1048572k SS
> This is easily fixed by moving the call to setting the file structure
> pointer's file count to 1 before the error check if security_file_alloc
> fails with atomic_long_set before this call in order to avoid the
> above spat. In addition this is required in order to avoid us
> freeing a file structure pointer with no reference i.e. has zero
> users in file_free on this zero path in order to avoid the kmemleak
> spat complaining about reading from uninitiliazied memory.
> 
> Signed-off-by: Nicholas Krause 
> ---
>  fs/file_table.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/fs/file_table.c b/fs/file_table.c
> index ad17e05..cbc6c37 100644
> --- a/fs/file_table.c
> +++ b/fs/file_table.c
> @@ -125,13 +125,13 @@ struct file *get_empty_filp(void)
>  
>   percpu_counter_inc(_files);
>   f->f_cred = get_cred(cred);
> + atomic_long_set(>f_count, 1);
>   error = security_file_alloc(f);
>   if (unlikely(error)) {
>   file_free(f);
>   return ERR_PTR(error);
>   }
>  
> - atomic_long_set(>f_count, 1);
>   rwlock_init(>f_owner.lock);
>   spin_lock_init(>f_lock);
>   mutex_init(>f_pos_lock);

NAK.  Analysis is complete garbage, and so's the patch; to start with, f
comes from kmem_cache_zalloc(), which *does* initialize the entire object
returned.  Moreover, neither file_free() nor security_file_alloc() are
accessing ->f_count anyway, so moving that assignment up doesn't change
anything whatsoever.  So if this changes behaviour, your reproducer is
unreliable.  OR, considering the very special origin of that patch, it hadn't
been tested at all.

For those who are not familiar with Nick - this is really a very special case,
with long history of posting utterly BS patches, nodding politely when people
explain what is wrong and proceeding to spew the same kind of garbage again
and again.  Not only clue-resistant, but has exhausted the patience even of
normally quite polite people (which I do not pretend to be)

Nick, if you are, for once, interested in something other than "participation,
no matter how useless", post the reproducer.


Re: [PATCH] vfs:Fix kmemleak in get_empty_filp on error path if security_file_alloc fails

2016-07-16 Thread Al Viro
On Sat, Jul 16, 2016 at 11:00:03PM -0400, Nicholas Krause wrote:
> This fixes the following kmemleak memory report spat:
> [  321.783718] ath9k :03:00.0 eth0: renamed from wlan0
> [  330.960024] atl1c :02:00.0 eth1: renamed from eth126
> [  391.831384] WARNING: kmemcheck: Caught 64-bit read from uninitialized 
> memory (8800a8ad8a00)
> [  392.678675] 
> 00acada80088feedcafe2800280088008afa90c8
> [  393.568962]  u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u 
> u
> [  394.461350]  ^
> [  395.305638] RIP: 0010:[]  [] 
> kmem_cache_alloc+0x70/0x120
> [  396.180025] RSP: 0018:8800a88ebd10  EFLAGS: 00010246
> [  397.037327] RAX: 8800a8ad8a00 RBX:  RCX: 
> 001d90e0
> [  397.889379] RDX: 00057898 RSI: 00057898 RDI: 
> 001d90e0
> [  398.735330] RBP: 8800a88ebd38 R08:  R09: 
> f580
> [  399.580699] R10: 0001 R11: 8801c294b000 R12: 
> 8800a8ad8a00
> [  400.426021] R13: 8119e308 R14: 8801c7003600 R15: 
> 024080c0
> [  401.271494] FS:  7f6073fc3780() GS:8801c740() 
> knlGS:
> [  402.117062] CS:  0010 DS:  ES:  CR0: 80050033
> [  402.955591] CR2: 8801c7060c90 CR3: a88f1000 CR4: 
> 000406f0
> [  403.807725]  [] get_empty_filp+0x58/0x1b0
> [  404.661980]  [] path_openat+0x26/0x9a0
> [  405.514128]  [] do_filp_open+0x79/0xd0
> [  406.358987]  [] do_sys_open+0x122/0x1f0
> [  407.194074]  [] SyS_open+0x19/0x20
> [  408.017053]  [] entry_SYSCALL_64_fastpath+0x18/0xa8
> [  408.844745]  [] 0x
> [  417.533148] Adding 1048572k swap on /dev/sda1.  Priority:-1 extents:1 
> across:1048572k SS
> This is easily fixed by moving the call to setting the file structure
> pointer's file count to 1 before the error check if security_file_alloc
> fails with atomic_long_set before this call in order to avoid the
> above spat. In addition this is required in order to avoid us
> freeing a file structure pointer with no reference i.e. has zero
> users in file_free on this zero path in order to avoid the kmemleak
> spat complaining about reading from uninitiliazied memory.
> 
> Signed-off-by: Nicholas Krause 
> ---
>  fs/file_table.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/fs/file_table.c b/fs/file_table.c
> index ad17e05..cbc6c37 100644
> --- a/fs/file_table.c
> +++ b/fs/file_table.c
> @@ -125,13 +125,13 @@ struct file *get_empty_filp(void)
>  
>   percpu_counter_inc(_files);
>   f->f_cred = get_cred(cred);
> + atomic_long_set(>f_count, 1);
>   error = security_file_alloc(f);
>   if (unlikely(error)) {
>   file_free(f);
>   return ERR_PTR(error);
>   }
>  
> - atomic_long_set(>f_count, 1);
>   rwlock_init(>f_owner.lock);
>   spin_lock_init(>f_lock);
>   mutex_init(>f_pos_lock);

NAK.  Analysis is complete garbage, and so's the patch; to start with, f
comes from kmem_cache_zalloc(), which *does* initialize the entire object
returned.  Moreover, neither file_free() nor security_file_alloc() are
accessing ->f_count anyway, so moving that assignment up doesn't change
anything whatsoever.  So if this changes behaviour, your reproducer is
unreliable.  OR, considering the very special origin of that patch, it hadn't
been tested at all.

For those who are not familiar with Nick - this is really a very special case,
with long history of posting utterly BS patches, nodding politely when people
explain what is wrong and proceeding to spew the same kind of garbage again
and again.  Not only clue-resistant, but has exhausted the patience even of
normally quite polite people (which I do not pretend to be)

Nick, if you are, for once, interested in something other than "participation,
no matter how useless", post the reproducer.


fs/xfs/xfs_ondisk.h:86:2: error: call to '__compiletime_assert_86' declared with attribute error: XFS: sizeof(xfs_dir2_data_unused_t) is wrong, expected 6

2016-07-16 Thread kbuild test robot
Hi,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   47ef4ad2684d380dd6d596140fb79395115c3950
commit: ab9d1e4f7b0217948a3b35a64178602ab30ff45d Merge branch 
'xfs-misc-fixes-4.6-3' into for-next
date:   4 months ago
config: openrisc-allmodconfig (attached as .config)
compiler: or32-linux-gcc (GCC) 4.5.1-or32-1.0rc1
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout ab9d1e4f7b0217948a3b35a64178602ab30ff45d
# save the attached .config to linux build tree
make.cross ARCH=openrisc 

All errors (new ones prefixed by >>):

   In file included from fs/xfs/xfs_super.c:48:0:
   In function 'xfs_check_ondisk_structs',
   inlined from 'init_xfs_fs' at fs/xfs/xfs_super.c:1862:26:
>> fs/xfs/xfs_ondisk.h:86:2: error: call to '__compiletime_assert_86' declared 
>> with attribute error: XFS: sizeof(xfs_dir2_data_unused_t) is wrong, expected 
>> 6
>> fs/xfs/xfs_ondisk.h:96:2: error: call to '__compiletime_assert_96' declared 
>> with attribute error: XFS: sizeof(xfs_dir2_sf_entry_t) is wrong, expected 3
>> fs/xfs/xfs_ondisk.h:97:2: error: call to '__compiletime_assert_97' declared 
>> with attribute error: XFS: sizeof(xfs_dir2_sf_hdr_t) is wrong, expected 10

vim +/__compiletime_assert_86 +86 fs/xfs/xfs_ondisk.h

30cbc591 Darrick J. Wong 2016-03-09   80
XFS_CHECK_STRUCT_SIZE(xfs_da_blkinfo_t, 12);
30cbc591 Darrick J. Wong 2016-03-09   81
XFS_CHECK_STRUCT_SIZE(xfs_da_intnode_t, 16);
30cbc591 Darrick J. Wong 2016-03-09   82
XFS_CHECK_STRUCT_SIZE(xfs_da_node_entry_t,  8);
30cbc591 Darrick J. Wong 2016-03-09   83
XFS_CHECK_STRUCT_SIZE(xfs_da_node_hdr_t,16);
30cbc591 Darrick J. Wong 2016-03-09   84
XFS_CHECK_STRUCT_SIZE(xfs_dir2_data_free_t, 4);
30cbc591 Darrick J. Wong 2016-03-09   85
XFS_CHECK_STRUCT_SIZE(xfs_dir2_data_hdr_t,  16);
30cbc591 Darrick J. Wong 2016-03-09  @86
XFS_CHECK_STRUCT_SIZE(xfs_dir2_data_unused_t,   6);
30cbc591 Darrick J. Wong 2016-03-09   87
XFS_CHECK_STRUCT_SIZE(xfs_dir2_free_hdr_t,  16);
30cbc591 Darrick J. Wong 2016-03-09   88
XFS_CHECK_STRUCT_SIZE(xfs_dir2_free_t,  16);
30cbc591 Darrick J. Wong 2016-03-09   89
XFS_CHECK_STRUCT_SIZE(xfs_dir2_ino4_t,  4);
30cbc591 Darrick J. Wong 2016-03-09   90
XFS_CHECK_STRUCT_SIZE(xfs_dir2_ino8_t,  8);
30cbc591 Darrick J. Wong 2016-03-09   91
XFS_CHECK_STRUCT_SIZE(xfs_dir2_inou_t,  8);
30cbc591 Darrick J. Wong 2016-03-09   92
XFS_CHECK_STRUCT_SIZE(xfs_dir2_leaf_entry_t,8);
30cbc591 Darrick J. Wong 2016-03-09   93
XFS_CHECK_STRUCT_SIZE(xfs_dir2_leaf_hdr_t,  16);
30cbc591 Darrick J. Wong 2016-03-09   94
XFS_CHECK_STRUCT_SIZE(xfs_dir2_leaf_t,  16);
30cbc591 Darrick J. Wong 2016-03-09   95
XFS_CHECK_STRUCT_SIZE(xfs_dir2_leaf_tail_t, 4);
30cbc591 Darrick J. Wong 2016-03-09  @96
XFS_CHECK_STRUCT_SIZE(xfs_dir2_sf_entry_t,  3);
30cbc591 Darrick J. Wong 2016-03-09  @97
XFS_CHECK_STRUCT_SIZE(xfs_dir2_sf_hdr_t,10);
30cbc591 Darrick J. Wong 2016-03-09   98
XFS_CHECK_STRUCT_SIZE(xfs_dir2_sf_off_t,2);
30cbc591 Darrick J. Wong 2016-03-09   99  
30cbc591 Darrick J. Wong 2016-03-09  100/* log structures */

:: The code at line 86 was first introduced by commit
:: 30cbc591c34e680e8b5d6d675ea49effe42a0570 xfs: check sizes of XFS on-disk 
structures at compile time

:: TO: Darrick J. Wong 
:: CC: Dave Chinner 

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


fs/xfs/xfs_ondisk.h:86:2: error: call to '__compiletime_assert_86' declared with attribute error: XFS: sizeof(xfs_dir2_data_unused_t) is wrong, expected 6

2016-07-16 Thread kbuild test robot
Hi,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   47ef4ad2684d380dd6d596140fb79395115c3950
commit: ab9d1e4f7b0217948a3b35a64178602ab30ff45d Merge branch 
'xfs-misc-fixes-4.6-3' into for-next
date:   4 months ago
config: openrisc-allmodconfig (attached as .config)
compiler: or32-linux-gcc (GCC) 4.5.1-or32-1.0rc1
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout ab9d1e4f7b0217948a3b35a64178602ab30ff45d
# save the attached .config to linux build tree
make.cross ARCH=openrisc 

All errors (new ones prefixed by >>):

   In file included from fs/xfs/xfs_super.c:48:0:
   In function 'xfs_check_ondisk_structs',
   inlined from 'init_xfs_fs' at fs/xfs/xfs_super.c:1862:26:
>> fs/xfs/xfs_ondisk.h:86:2: error: call to '__compiletime_assert_86' declared 
>> with attribute error: XFS: sizeof(xfs_dir2_data_unused_t) is wrong, expected 
>> 6
>> fs/xfs/xfs_ondisk.h:96:2: error: call to '__compiletime_assert_96' declared 
>> with attribute error: XFS: sizeof(xfs_dir2_sf_entry_t) is wrong, expected 3
>> fs/xfs/xfs_ondisk.h:97:2: error: call to '__compiletime_assert_97' declared 
>> with attribute error: XFS: sizeof(xfs_dir2_sf_hdr_t) is wrong, expected 10

vim +/__compiletime_assert_86 +86 fs/xfs/xfs_ondisk.h

30cbc591 Darrick J. Wong 2016-03-09   80
XFS_CHECK_STRUCT_SIZE(xfs_da_blkinfo_t, 12);
30cbc591 Darrick J. Wong 2016-03-09   81
XFS_CHECK_STRUCT_SIZE(xfs_da_intnode_t, 16);
30cbc591 Darrick J. Wong 2016-03-09   82
XFS_CHECK_STRUCT_SIZE(xfs_da_node_entry_t,  8);
30cbc591 Darrick J. Wong 2016-03-09   83
XFS_CHECK_STRUCT_SIZE(xfs_da_node_hdr_t,16);
30cbc591 Darrick J. Wong 2016-03-09   84
XFS_CHECK_STRUCT_SIZE(xfs_dir2_data_free_t, 4);
30cbc591 Darrick J. Wong 2016-03-09   85
XFS_CHECK_STRUCT_SIZE(xfs_dir2_data_hdr_t,  16);
30cbc591 Darrick J. Wong 2016-03-09  @86
XFS_CHECK_STRUCT_SIZE(xfs_dir2_data_unused_t,   6);
30cbc591 Darrick J. Wong 2016-03-09   87
XFS_CHECK_STRUCT_SIZE(xfs_dir2_free_hdr_t,  16);
30cbc591 Darrick J. Wong 2016-03-09   88
XFS_CHECK_STRUCT_SIZE(xfs_dir2_free_t,  16);
30cbc591 Darrick J. Wong 2016-03-09   89
XFS_CHECK_STRUCT_SIZE(xfs_dir2_ino4_t,  4);
30cbc591 Darrick J. Wong 2016-03-09   90
XFS_CHECK_STRUCT_SIZE(xfs_dir2_ino8_t,  8);
30cbc591 Darrick J. Wong 2016-03-09   91
XFS_CHECK_STRUCT_SIZE(xfs_dir2_inou_t,  8);
30cbc591 Darrick J. Wong 2016-03-09   92
XFS_CHECK_STRUCT_SIZE(xfs_dir2_leaf_entry_t,8);
30cbc591 Darrick J. Wong 2016-03-09   93
XFS_CHECK_STRUCT_SIZE(xfs_dir2_leaf_hdr_t,  16);
30cbc591 Darrick J. Wong 2016-03-09   94
XFS_CHECK_STRUCT_SIZE(xfs_dir2_leaf_t,  16);
30cbc591 Darrick J. Wong 2016-03-09   95
XFS_CHECK_STRUCT_SIZE(xfs_dir2_leaf_tail_t, 4);
30cbc591 Darrick J. Wong 2016-03-09  @96
XFS_CHECK_STRUCT_SIZE(xfs_dir2_sf_entry_t,  3);
30cbc591 Darrick J. Wong 2016-03-09  @97
XFS_CHECK_STRUCT_SIZE(xfs_dir2_sf_hdr_t,10);
30cbc591 Darrick J. Wong 2016-03-09   98
XFS_CHECK_STRUCT_SIZE(xfs_dir2_sf_off_t,2);
30cbc591 Darrick J. Wong 2016-03-09   99  
30cbc591 Darrick J. Wong 2016-03-09  100/* log structures */

:: The code at line 86 was first introduced by commit
:: 30cbc591c34e680e8b5d6d675ea49effe42a0570 xfs: check sizes of XFS on-disk 
structures at compile time

:: TO: Darrick J. Wong 
:: CC: Dave Chinner 

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


Re: [PATCH 1/2] wan/fsl_ucc_hdlc: remove reduplicative freed memory 'uhdlc_priv'

2016-07-16 Thread David Miller
From: Zhao Qiang 
Date: Fri, 15 Jul 2016 10:38:24 +0800

> 'uhdlc_priv' has freed twice, drop the first one.
> 
> Signed-off-by: Zhao Qiang 

Applied.


Re: [PATCH 1/2] wan/fsl_ucc_hdlc: remove reduplicative freed memory 'uhdlc_priv'

2016-07-16 Thread David Miller
From: Zhao Qiang 
Date: Fri, 15 Jul 2016 10:38:24 +0800

> 'uhdlc_priv' has freed twice, drop the first one.
> 
> Signed-off-by: Zhao Qiang 

Applied.


Re: [PATCH 2/2] wan/fsl_ucc_hdlc: rewrite error handling to make it clearer

2016-07-16 Thread David Miller
From: Zhao Qiang 
Date: Fri, 15 Jul 2016 10:38:25 +0800

> It was used err_xxx for labeled statement, it is
> not easy to understand, now use free_xxx for labeled
> statement.
> 
> Signed-off-by: Zhao Qiang 

Applied.


Re: [PATCH 2/2] wan/fsl_ucc_hdlc: rewrite error handling to make it clearer

2016-07-16 Thread David Miller
From: Zhao Qiang 
Date: Fri, 15 Jul 2016 10:38:25 +0800

> It was used err_xxx for labeled statement, it is
> not easy to understand, now use free_xxx for labeled
> statement.
> 
> Signed-off-by: Zhao Qiang 

Applied.


Re: [PATCH] rndis_host: Set random MAC for ZTE MF910

2016-07-16 Thread David Miller
From: Bjørn Mork 
Date: Fri, 15 Jul 2016 19:42:28 +0200

> David Laight  writes:
>> From: Bjørn Mork
>> Not only that, there certainly used to be manufacturers that used 'locally
>> administered' addresses on all their cards (as well as those that used 
>> unallocated
>> address blocks).
> 
> Sure. But is there any reason to care about those addresses?

And for that case, this patch we are discussing would be a bug fix.

I'm going to apply the "bp[0] & 0x02" patch.



Re: [PATCH] rndis_host: Set random MAC for ZTE MF910

2016-07-16 Thread David Miller
From: Bjørn Mork 
Date: Fri, 15 Jul 2016 19:42:28 +0200

> David Laight  writes:
>> From: Bjørn Mork
>> Not only that, there certainly used to be manufacturers that used 'locally
>> administered' addresses on all their cards (as well as those that used 
>> unallocated
>> address blocks).
> 
> Sure. But is there any reason to care about those addresses?

And for that case, this patch we are discussing would be a bug fix.

I'm going to apply the "bp[0] & 0x02" patch.



[PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

2016-07-16 Thread Scott Wood
From: yangbo lu 

Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
header file.  This SVR numberspace is used on some ARM chips as well as
PPC, and even to check for a PPC SVR multi-arch drivers would otherwise
need to ifdef the header inclusion and all references to the SVR symbols.

Signed-off-by: Yangbo Lu 
Acked-by: Wolfram Sang 
Acked-by: Stephen Boyd 
Acked-by: Joerg Roedel 
[scottwood: update description]
Signed-off-by: Scott Wood 
---
 arch/powerpc/kernel/cpu_setup_fsl_booke.S | 2 +-
 arch/powerpc/sysdev/fsl_pci.c | 2 +-
 drivers/clk/clk-qoriq.c   | 3 +--
 drivers/i2c/busses/i2c-mpc.c  | 2 +-
 drivers/iommu/fsl_pamu.c  | 3 +--
 drivers/net/ethernet/freescale/gianfar.c  | 2 +-
 arch/powerpc/include/asm/mpc85xx.h => include/linux/fsl/svr.h | 4 ++--
 7 files changed, 8 insertions(+), 10 deletions(-)
 rename arch/powerpc/include/asm/mpc85xx.h => include/linux/fsl/svr.h (97%)

diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S 
b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 462aed9..2b0284e 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -13,13 +13,13 @@
  *
  */
 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
-#include 
 
 _GLOBAL(__e500_icache_setup)
mfspr   r0, SPRN_L1CSR1
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 0ef9df4..0fd1895 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -37,7 +38,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 58566a17..4b6c438 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1149,8 +1150,6 @@ bad_args:
 }
 
 #ifdef CONFIG_PPC
-#include 
-
 static const u32 a4510_svrs[] __initconst = {
(SVR_P2040 << 8) | 0x10,/* P2040 1.0 */
(SVR_P2040 << 8) | 0x11,/* P2040 1.1 */
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 48ecffe..600704c 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -27,9 +27,9 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
-#include 
 #include 
 
 #define DRV_NAME "mpc-i2c"
diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c
index a34355f..af8fb27 100644
--- a/drivers/iommu/fsl_pamu.c
+++ b/drivers/iommu/fsl_pamu.c
@@ -21,11 +21,10 @@
 #include "fsl_pamu.h"
 
 #include 
+#include 
 #include 
 #include 
 
-#include 
-
 /* define indexes for each operation mapping scenario */
 #define OMI_QMAN0x00
 #define OMI_FMAN0x01
diff --git a/drivers/net/ethernet/freescale/gianfar.c 
b/drivers/net/ethernet/freescale/gianfar.c
index 2e6785b..450d31f 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -86,11 +86,11 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #ifdef CONFIG_PPC
 #include 
-#include 
 #endif
 #include 
 #include 
diff --git a/arch/powerpc/include/asm/mpc85xx.h b/include/linux/fsl/svr.h
similarity index 97%
rename from arch/powerpc/include/asm/mpc85xx.h
rename to include/linux/fsl/svr.h
index 213f3a8..8d13836 100644
--- a/arch/powerpc/include/asm/mpc85xx.h
+++ b/include/linux/fsl/svr.h
@@ -9,8 +9,8 @@
  * (at your option) any later version.
  */
 
-#ifndef __ASM_PPC_MPC85XX_H
-#define __ASM_PPC_MPC85XX_H
+#ifndef FSL_SVR_H
+#define FSL_SVR_H
 
 #define SVR_REV(svr)   ((svr) & 0xFF)  /* SOC design resision */
 #define SVR_MAJ(svr)   (((svr) >>  4) & 0xF)   /* Major revision field*/
-- 
2.7.4



[PATCH v11 2/5] dt: bindings: move guts devicetree doc out of powerpc directory

2016-07-16 Thread Scott Wood
From: Yangbo Lu 

Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
since it's used by not only PowerPC but also ARM. And add a specification
for 'little-endian' property.

Signed-off-by: Yangbo Lu 
Acked-by: Rob Herring 
Signed-off-by: Scott Wood 
---
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt | 3 +++
 1 file changed, 3 insertions(+)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt 
b/Documentation/devicetree/bindings/soc/fsl/guts.txt
similarity index 91%
rename from Documentation/devicetree/bindings/powerpc/fsl/guts.txt
rename to Documentation/devicetree/bindings/soc/fsl/guts.txt
index b71b203..07adca9 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/guts.txt
@@ -25,6 +25,9 @@ Recommended properties:
  - fsl,liodn-bits : Indicates the number of defined bits in the LIODN
registers, for those SOCs that have a PAMU device.
 
+ - little-endian : Indicates that the global utilities block is little
+   endian. The default is big endian.
+
 Examples:
global-utilities@e {/* global utilities block */
compatible = "fsl,mpc8548-guts";
-- 
2.7.4



[PATCH v11 0/5] soc: fsl: Add initial guts driver

2016-07-16 Thread Scott Wood
This patchset adds the beginnings of a driver to consolidate accesses to
the Freescale/NXP "global utilities" block.  Initially only access to SVR
(the system version register) is provided.  This register is needed by
various drivers, mainly for errata detection.  Access to SVR via
mfspr(SPRN_SVR) is now discouraged, especially in drivers that are
not PPC-specific.

I plan to send this via the PPC tree for this merge window, to provide a
base for using/extending the guts driver in various drivers in the next
cycle.

Scott Wood (1):
  powerpc/fsl-pci: Use fsl_guts_get_svr()

Yangbo Lu (2):
  dt: bindings: move guts devicetree doc out of powerpc directory
  soc: fsl: add GUTS driver for QorIQ platforms

yangbo lu (2):
  dt: bindings: update Freescale DCFG compatible
  powerpc/fsl: move mpc85xx.h to include/linux/fsl

 Documentation/devicetree/bindings/arm/fsl.txt  |   6 +-
 .../bindings/{powerpc => soc}/fsl/guts.txt |   3 +
 arch/powerpc/Kconfig   |   1 +
 arch/powerpc/kernel/cpu_setup_fsl_booke.S  |   2 +-
 arch/powerpc/platforms/85xx/common.c   |   2 -
 arch/powerpc/sysdev/fsl_pci.c  |   8 +-
 drivers/clk/clk-qoriq.c|   3 +-
 drivers/i2c/busses/i2c-mpc.c   |   2 +-
 drivers/iommu/fsl_pamu.c   |   3 +-
 drivers/net/ethernet/freescale/gianfar.c   |   2 +-
 drivers/soc/Kconfig|   2 +-
 drivers/soc/fsl/Kconfig|   8 ++
 drivers/soc/fsl/Makefile   |   1 +
 drivers/soc/fsl/guts.c | 113 ++
 include/linux/fsl/guts.h   | 126 +
 .../asm/mpc85xx.h => include/linux/fsl/svr.h   |   4 +-
 16 files changed, 223 insertions(+), 63 deletions(-)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)
 create mode 100644 drivers/soc/fsl/Kconfig
 create mode 100644 drivers/soc/fsl/guts.c
 rename arch/powerpc/include/asm/mpc85xx.h => include/linux/fsl/svr.h (97%)

-- 
2.7.4



[PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

2016-07-16 Thread Scott Wood
From: yangbo lu 

Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
header file.  This SVR numberspace is used on some ARM chips as well as
PPC, and even to check for a PPC SVR multi-arch drivers would otherwise
need to ifdef the header inclusion and all references to the SVR symbols.

Signed-off-by: Yangbo Lu 
Acked-by: Wolfram Sang 
Acked-by: Stephen Boyd 
Acked-by: Joerg Roedel 
[scottwood: update description]
Signed-off-by: Scott Wood 
---
 arch/powerpc/kernel/cpu_setup_fsl_booke.S | 2 +-
 arch/powerpc/sysdev/fsl_pci.c | 2 +-
 drivers/clk/clk-qoriq.c   | 3 +--
 drivers/i2c/busses/i2c-mpc.c  | 2 +-
 drivers/iommu/fsl_pamu.c  | 3 +--
 drivers/net/ethernet/freescale/gianfar.c  | 2 +-
 arch/powerpc/include/asm/mpc85xx.h => include/linux/fsl/svr.h | 4 ++--
 7 files changed, 8 insertions(+), 10 deletions(-)
 rename arch/powerpc/include/asm/mpc85xx.h => include/linux/fsl/svr.h (97%)

diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S 
b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 462aed9..2b0284e 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -13,13 +13,13 @@
  *
  */
 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
-#include 
 
 _GLOBAL(__e500_icache_setup)
mfspr   r0, SPRN_L1CSR1
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 0ef9df4..0fd1895 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -37,7 +38,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 58566a17..4b6c438 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1149,8 +1150,6 @@ bad_args:
 }
 
 #ifdef CONFIG_PPC
-#include 
-
 static const u32 a4510_svrs[] __initconst = {
(SVR_P2040 << 8) | 0x10,/* P2040 1.0 */
(SVR_P2040 << 8) | 0x11,/* P2040 1.1 */
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 48ecffe..600704c 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -27,9 +27,9 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
-#include 
 #include 
 
 #define DRV_NAME "mpc-i2c"
diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c
index a34355f..af8fb27 100644
--- a/drivers/iommu/fsl_pamu.c
+++ b/drivers/iommu/fsl_pamu.c
@@ -21,11 +21,10 @@
 #include "fsl_pamu.h"
 
 #include 
+#include 
 #include 
 #include 
 
-#include 
-
 /* define indexes for each operation mapping scenario */
 #define OMI_QMAN0x00
 #define OMI_FMAN0x01
diff --git a/drivers/net/ethernet/freescale/gianfar.c 
b/drivers/net/ethernet/freescale/gianfar.c
index 2e6785b..450d31f 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -86,11 +86,11 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #ifdef CONFIG_PPC
 #include 
-#include 
 #endif
 #include 
 #include 
diff --git a/arch/powerpc/include/asm/mpc85xx.h b/include/linux/fsl/svr.h
similarity index 97%
rename from arch/powerpc/include/asm/mpc85xx.h
rename to include/linux/fsl/svr.h
index 213f3a8..8d13836 100644
--- a/arch/powerpc/include/asm/mpc85xx.h
+++ b/include/linux/fsl/svr.h
@@ -9,8 +9,8 @@
  * (at your option) any later version.
  */
 
-#ifndef __ASM_PPC_MPC85XX_H
-#define __ASM_PPC_MPC85XX_H
+#ifndef FSL_SVR_H
+#define FSL_SVR_H
 
 #define SVR_REV(svr)   ((svr) & 0xFF)  /* SOC design resision */
 #define SVR_MAJ(svr)   (((svr) >>  4) & 0xF)   /* Major revision field*/
-- 
2.7.4



[PATCH v11 2/5] dt: bindings: move guts devicetree doc out of powerpc directory

2016-07-16 Thread Scott Wood
From: Yangbo Lu 

Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
since it's used by not only PowerPC but also ARM. And add a specification
for 'little-endian' property.

Signed-off-by: Yangbo Lu 
Acked-by: Rob Herring 
Signed-off-by: Scott Wood 
---
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt | 3 +++
 1 file changed, 3 insertions(+)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt 
b/Documentation/devicetree/bindings/soc/fsl/guts.txt
similarity index 91%
rename from Documentation/devicetree/bindings/powerpc/fsl/guts.txt
rename to Documentation/devicetree/bindings/soc/fsl/guts.txt
index b71b203..07adca9 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/guts.txt
@@ -25,6 +25,9 @@ Recommended properties:
  - fsl,liodn-bits : Indicates the number of defined bits in the LIODN
registers, for those SOCs that have a PAMU device.
 
+ - little-endian : Indicates that the global utilities block is little
+   endian. The default is big endian.
+
 Examples:
global-utilities@e {/* global utilities block */
compatible = "fsl,mpc8548-guts";
-- 
2.7.4



[PATCH v11 0/5] soc: fsl: Add initial guts driver

2016-07-16 Thread Scott Wood
This patchset adds the beginnings of a driver to consolidate accesses to
the Freescale/NXP "global utilities" block.  Initially only access to SVR
(the system version register) is provided.  This register is needed by
various drivers, mainly for errata detection.  Access to SVR via
mfspr(SPRN_SVR) is now discouraged, especially in drivers that are
not PPC-specific.

I plan to send this via the PPC tree for this merge window, to provide a
base for using/extending the guts driver in various drivers in the next
cycle.

Scott Wood (1):
  powerpc/fsl-pci: Use fsl_guts_get_svr()

Yangbo Lu (2):
  dt: bindings: move guts devicetree doc out of powerpc directory
  soc: fsl: add GUTS driver for QorIQ platforms

yangbo lu (2):
  dt: bindings: update Freescale DCFG compatible
  powerpc/fsl: move mpc85xx.h to include/linux/fsl

 Documentation/devicetree/bindings/arm/fsl.txt  |   6 +-
 .../bindings/{powerpc => soc}/fsl/guts.txt |   3 +
 arch/powerpc/Kconfig   |   1 +
 arch/powerpc/kernel/cpu_setup_fsl_booke.S  |   2 +-
 arch/powerpc/platforms/85xx/common.c   |   2 -
 arch/powerpc/sysdev/fsl_pci.c  |   8 +-
 drivers/clk/clk-qoriq.c|   3 +-
 drivers/i2c/busses/i2c-mpc.c   |   2 +-
 drivers/iommu/fsl_pamu.c   |   3 +-
 drivers/net/ethernet/freescale/gianfar.c   |   2 +-
 drivers/soc/Kconfig|   2 +-
 drivers/soc/fsl/Kconfig|   8 ++
 drivers/soc/fsl/Makefile   |   1 +
 drivers/soc/fsl/guts.c | 113 ++
 include/linux/fsl/guts.h   | 126 +
 .../asm/mpc85xx.h => include/linux/fsl/svr.h   |   4 +-
 16 files changed, 223 insertions(+), 63 deletions(-)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)
 create mode 100644 drivers/soc/fsl/Kconfig
 create mode 100644 drivers/soc/fsl/guts.c
 rename arch/powerpc/include/asm/mpc85xx.h => include/linux/fsl/svr.h (97%)

-- 
2.7.4



[PATCH v11 1/5] dt: bindings: update Freescale DCFG compatible

2016-07-16 Thread Scott Wood
From: yangbo lu 

Update Freescale DCFG compatible with 'fsl,-dcfg' instead
of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a,
ls1043a, and ls2080a.

Signed-off-by: Yangbo Lu 
Acked-by: Rob Herring 
Signed-off-by: Scott Wood 
---
 Documentation/devicetree/bindings/arm/fsl.txt | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/fsl.txt 
b/Documentation/devicetree/bindings/arm/fsl.txt
index dbbc095..713c1ae 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -119,7 +119,11 @@ Freescale DCFG
 configuration and status for the device. Such as setting the secondary
 core start address and release the secondary core from holdoff and startup.
   Required properties:
-  - compatible: should be "fsl,ls1021a-dcfg"
+  - compatible: should be "fsl,-dcfg"
+Possible compatibles:
+   "fsl,ls1021a-dcfg"
+   "fsl,ls1043a-dcfg"
+   "fsl,ls2080a-dcfg"
   - reg : should contain base address and length of DCFG memory-mapped 
registers
 
 Example:
-- 
2.7.4



[PATCH v11 5/5] powerpc/fsl-pci: Use fsl_guts_get_svr()

2016-07-16 Thread Scott Wood
Establish an initial user of fsl_guts_get_svr(), so that the code gets
some test coverage until users outside arch/powerpc can get converted.

Signed-off-by: Scott Wood 
---
 arch/powerpc/Kconfig  | 1 +
 arch/powerpc/sysdev/fsl_pci.c | 6 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index fcfe533..765df81 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -777,6 +777,7 @@ config FSL_PCI
bool
select PPC_INDIRECT_PCI
select PCI_QUIRKS
+   select FSL_GUTS
 
 config FSL_PMC
bool
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 0fd1895..9ba570cf 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -529,7 +530,10 @@ int fsl_add_bridge(struct platform_device *pdev, int 
is_primary)
struct device_node *dev;
struct ccsr_pci __iomem *pci;
u16 temp;
-   u32 svr = mfspr(SPRN_SVR);
+   u32 svr;
+
+   fsl_guts_init();
+   svr = fsl_guts_get_svr();
 
dev = pdev->dev.of_node;
 
-- 
2.7.4



[PATCH v11 3/5] soc: fsl: add GUTS driver for QorIQ platforms

2016-07-16 Thread Scott Wood
From: Yangbo Lu 

The global utilities block controls power management, I/O device
enabling, power-onreset(POR) configuration monitoring, alternate
function selection for multiplexed signals,and clock control.

This patch adds a driver to manage and access global utilities block.
Initially only reading SVR is supported.  Other guts accesses, such as
reading RCW, should eventually be moved into this driver as well.

Signed-off-by: Yangbo Lu 
[scottwood: minor cleanup]
Signed-off-by: Scott Wood 
---
 arch/powerpc/platforms/85xx/common.c |   2 -
 drivers/soc/Kconfig  |   2 +-
 drivers/soc/fsl/Kconfig  |   8 +++
 drivers/soc/fsl/Makefile |   1 +
 drivers/soc/fsl/guts.c   | 113 +++
 include/linux/fsl/guts.h | 126 ++-
 6 files changed, 201 insertions(+), 51 deletions(-)
 create mode 100644 drivers/soc/fsl/Kconfig
 create mode 100644 drivers/soc/fsl/guts.c

diff --git a/arch/powerpc/platforms/85xx/common.c 
b/arch/powerpc/platforms/85xx/common.c
index 28720a4..badd193 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -29,8 +29,6 @@ static const struct of_device_id mpc85xx_common_ids[] 
__initconst = {
{ .compatible = "fsl,srio", },
/* So that the DMA channel nodes can be probed individually: */
{ .compatible = "fsl,eloplus-dma", },
-   /* For the PMC driver */
-   { .compatible = "fsl,mpc8548-guts", },
/* Probably unnecessary? */
{ .compatible = "gpio-leds", },
/* For all PCI controllers */
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index cb58ef0..7106463 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -2,7 +2,7 @@ menu "SOC (System On Chip) specific Drivers"
 
 source "drivers/soc/bcm/Kconfig"
 source "drivers/soc/brcmstb/Kconfig"
-source "drivers/soc/fsl/qe/Kconfig"
+source "drivers/soc/fsl/Kconfig"
 source "drivers/soc/mediatek/Kconfig"
 source "drivers/soc/qcom/Kconfig"
 source "drivers/soc/rockchip/Kconfig"
diff --git a/drivers/soc/fsl/Kconfig b/drivers/soc/fsl/Kconfig
new file mode 100644
index 000..b313759
--- /dev/null
+++ b/drivers/soc/fsl/Kconfig
@@ -0,0 +1,8 @@
+#
+# Freescale SOC drivers
+#
+
+source "drivers/soc/fsl/qe/Kconfig"
+
+config FSL_GUTS
+   bool
diff --git a/drivers/soc/fsl/Makefile b/drivers/soc/fsl/Makefile
index 203307f..02afb7f 100644
--- a/drivers/soc/fsl/Makefile
+++ b/drivers/soc/fsl/Makefile
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_QUICC_ENGINE) += qe/
 obj-$(CONFIG_CPM)  += qe/
+obj-$(CONFIG_FSL_GUTS) += guts.o
diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
new file mode 100644
index 000..b534654
--- /dev/null
+++ b/drivers/soc/fsl/guts.c
@@ -0,0 +1,113 @@
+/*
+ * Freescale QorIQ Platforms GUTS Driver
+ *
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct guts {
+   struct ccsr_guts __iomem *regs;
+   bool little_endian;
+};
+
+static struct guts *guts;
+static DEFINE_MUTEX(guts_lock);
+
+u32 fsl_guts_get_svr(void)
+{
+   u32 svr = 0;
+
+   if (!guts || !guts->regs) {
+#ifdef CONFIG_PPC
+   svr =  mfspr(SPRN_SVR);
+#endif
+   return svr;
+   }
+
+   if (guts->little_endian)
+   svr = ioread32(>regs->svr);
+   else
+   svr = ioread32be(>regs->svr);
+
+   return svr;
+}
+EXPORT_SYMBOL(fsl_guts_get_svr);
+
+/*
+ * Table for matching compatible strings, for device tree
+ * guts node, for Freescale QorIQ SOCs.
+ */
+static const struct of_device_id guts_of_match[] = {
+   { .compatible = "fsl,qoriq-device-config-1.0", },
+   { .compatible = "fsl,qoriq-device-config-2.0", },
+   { .compatible = "fsl,p1010-guts", },
+   { .compatible = "fsl,p1020-guts", },
+   { .compatible = "fsl,p1021-guts", },
+   { .compatible = "fsl,p1022-guts", },
+   { .compatible = "fsl,p1023-guts", },
+   { .compatible = "fsl,p2020-guts", },
+   { .compatible = "fsl,bsc9131-guts", },
+   { .compatible = "fsl,bsc9132-guts", },
+   { .compatible = "fsl,mpc8536-guts", },
+   { .compatible = "fsl,mpc8544-guts", },
+   { .compatible = "fsl,mpc8548-guts", },
+   { .compatible = "fsl,mpc8568-guts", },
+   { .compatible = "fsl,mpc8569-guts", },
+   { .compatible = "fsl,mpc8572-guts", },
+   { .compatible = "fsl,ls1021a-dcfg", },
+   { .compatible = "fsl,ls1043a-dcfg", },
+   { .compatible = "fsl,ls2080a-dcfg", },
+   {}
+};
+
+int fsl_guts_init(void)
+{
+

[PATCH v11 1/5] dt: bindings: update Freescale DCFG compatible

2016-07-16 Thread Scott Wood
From: yangbo lu 

Update Freescale DCFG compatible with 'fsl,-dcfg' instead
of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a,
ls1043a, and ls2080a.

Signed-off-by: Yangbo Lu 
Acked-by: Rob Herring 
Signed-off-by: Scott Wood 
---
 Documentation/devicetree/bindings/arm/fsl.txt | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/fsl.txt 
b/Documentation/devicetree/bindings/arm/fsl.txt
index dbbc095..713c1ae 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -119,7 +119,11 @@ Freescale DCFG
 configuration and status for the device. Such as setting the secondary
 core start address and release the secondary core from holdoff and startup.
   Required properties:
-  - compatible: should be "fsl,ls1021a-dcfg"
+  - compatible: should be "fsl,-dcfg"
+Possible compatibles:
+   "fsl,ls1021a-dcfg"
+   "fsl,ls1043a-dcfg"
+   "fsl,ls2080a-dcfg"
   - reg : should contain base address and length of DCFG memory-mapped 
registers
 
 Example:
-- 
2.7.4



[PATCH v11 5/5] powerpc/fsl-pci: Use fsl_guts_get_svr()

2016-07-16 Thread Scott Wood
Establish an initial user of fsl_guts_get_svr(), so that the code gets
some test coverage until users outside arch/powerpc can get converted.

Signed-off-by: Scott Wood 
---
 arch/powerpc/Kconfig  | 1 +
 arch/powerpc/sysdev/fsl_pci.c | 6 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index fcfe533..765df81 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -777,6 +777,7 @@ config FSL_PCI
bool
select PPC_INDIRECT_PCI
select PCI_QUIRKS
+   select FSL_GUTS
 
 config FSL_PMC
bool
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 0fd1895..9ba570cf 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -529,7 +530,10 @@ int fsl_add_bridge(struct platform_device *pdev, int 
is_primary)
struct device_node *dev;
struct ccsr_pci __iomem *pci;
u16 temp;
-   u32 svr = mfspr(SPRN_SVR);
+   u32 svr;
+
+   fsl_guts_init();
+   svr = fsl_guts_get_svr();
 
dev = pdev->dev.of_node;
 
-- 
2.7.4



[PATCH v11 3/5] soc: fsl: add GUTS driver for QorIQ platforms

2016-07-16 Thread Scott Wood
From: Yangbo Lu 

The global utilities block controls power management, I/O device
enabling, power-onreset(POR) configuration monitoring, alternate
function selection for multiplexed signals,and clock control.

This patch adds a driver to manage and access global utilities block.
Initially only reading SVR is supported.  Other guts accesses, such as
reading RCW, should eventually be moved into this driver as well.

Signed-off-by: Yangbo Lu 
[scottwood: minor cleanup]
Signed-off-by: Scott Wood 
---
 arch/powerpc/platforms/85xx/common.c |   2 -
 drivers/soc/Kconfig  |   2 +-
 drivers/soc/fsl/Kconfig  |   8 +++
 drivers/soc/fsl/Makefile |   1 +
 drivers/soc/fsl/guts.c   | 113 +++
 include/linux/fsl/guts.h | 126 ++-
 6 files changed, 201 insertions(+), 51 deletions(-)
 create mode 100644 drivers/soc/fsl/Kconfig
 create mode 100644 drivers/soc/fsl/guts.c

diff --git a/arch/powerpc/platforms/85xx/common.c 
b/arch/powerpc/platforms/85xx/common.c
index 28720a4..badd193 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -29,8 +29,6 @@ static const struct of_device_id mpc85xx_common_ids[] 
__initconst = {
{ .compatible = "fsl,srio", },
/* So that the DMA channel nodes can be probed individually: */
{ .compatible = "fsl,eloplus-dma", },
-   /* For the PMC driver */
-   { .compatible = "fsl,mpc8548-guts", },
/* Probably unnecessary? */
{ .compatible = "gpio-leds", },
/* For all PCI controllers */
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index cb58ef0..7106463 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -2,7 +2,7 @@ menu "SOC (System On Chip) specific Drivers"
 
 source "drivers/soc/bcm/Kconfig"
 source "drivers/soc/brcmstb/Kconfig"
-source "drivers/soc/fsl/qe/Kconfig"
+source "drivers/soc/fsl/Kconfig"
 source "drivers/soc/mediatek/Kconfig"
 source "drivers/soc/qcom/Kconfig"
 source "drivers/soc/rockchip/Kconfig"
diff --git a/drivers/soc/fsl/Kconfig b/drivers/soc/fsl/Kconfig
new file mode 100644
index 000..b313759
--- /dev/null
+++ b/drivers/soc/fsl/Kconfig
@@ -0,0 +1,8 @@
+#
+# Freescale SOC drivers
+#
+
+source "drivers/soc/fsl/qe/Kconfig"
+
+config FSL_GUTS
+   bool
diff --git a/drivers/soc/fsl/Makefile b/drivers/soc/fsl/Makefile
index 203307f..02afb7f 100644
--- a/drivers/soc/fsl/Makefile
+++ b/drivers/soc/fsl/Makefile
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_QUICC_ENGINE) += qe/
 obj-$(CONFIG_CPM)  += qe/
+obj-$(CONFIG_FSL_GUTS) += guts.o
diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
new file mode 100644
index 000..b534654
--- /dev/null
+++ b/drivers/soc/fsl/guts.c
@@ -0,0 +1,113 @@
+/*
+ * Freescale QorIQ Platforms GUTS Driver
+ *
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct guts {
+   struct ccsr_guts __iomem *regs;
+   bool little_endian;
+};
+
+static struct guts *guts;
+static DEFINE_MUTEX(guts_lock);
+
+u32 fsl_guts_get_svr(void)
+{
+   u32 svr = 0;
+
+   if (!guts || !guts->regs) {
+#ifdef CONFIG_PPC
+   svr =  mfspr(SPRN_SVR);
+#endif
+   return svr;
+   }
+
+   if (guts->little_endian)
+   svr = ioread32(>regs->svr);
+   else
+   svr = ioread32be(>regs->svr);
+
+   return svr;
+}
+EXPORT_SYMBOL(fsl_guts_get_svr);
+
+/*
+ * Table for matching compatible strings, for device tree
+ * guts node, for Freescale QorIQ SOCs.
+ */
+static const struct of_device_id guts_of_match[] = {
+   { .compatible = "fsl,qoriq-device-config-1.0", },
+   { .compatible = "fsl,qoriq-device-config-2.0", },
+   { .compatible = "fsl,p1010-guts", },
+   { .compatible = "fsl,p1020-guts", },
+   { .compatible = "fsl,p1021-guts", },
+   { .compatible = "fsl,p1022-guts", },
+   { .compatible = "fsl,p1023-guts", },
+   { .compatible = "fsl,p2020-guts", },
+   { .compatible = "fsl,bsc9131-guts", },
+   { .compatible = "fsl,bsc9132-guts", },
+   { .compatible = "fsl,mpc8536-guts", },
+   { .compatible = "fsl,mpc8544-guts", },
+   { .compatible = "fsl,mpc8548-guts", },
+   { .compatible = "fsl,mpc8568-guts", },
+   { .compatible = "fsl,mpc8569-guts", },
+   { .compatible = "fsl,mpc8572-guts", },
+   { .compatible = "fsl,ls1021a-dcfg", },
+   { .compatible = "fsl,ls1043a-dcfg", },
+   { .compatible = "fsl,ls2080a-dcfg", },
+   {}
+};
+
+int fsl_guts_init(void)
+{
+   struct device_node *np;
+   int ret;
+
+   

core.c:undefined reference to `fpu_save'

2016-07-16 Thread kbuild test robot
Hi,

It's probably a bug fix that unveils the link errors.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   47ef4ad2684d380dd6d596140fb79395115c3950
commit: c60f169202c7643991a8b4bfeea60e06843d5b5a 
arch/mn10300/kernel/fpu-nofpu.c: needs asm/elf.h
date:   4 months ago
config: mn10300-allnoconfig (attached as .config)
compiler: am33_2.0-linux-gcc (GCC) 4.9.0
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout c60f169202c7643991a8b4bfeea60e06843d5b5a
# save the attached .config to linux build tree
make.cross ARCH=mn10300 

All errors (new ones prefixed by >>):

   kernel/built-in.o: In function `.L412':
>> core.c:(.sched.text+0x257): undefined reference to `fpu_save'

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


core.c:undefined reference to `fpu_save'

2016-07-16 Thread kbuild test robot
Hi,

It's probably a bug fix that unveils the link errors.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   47ef4ad2684d380dd6d596140fb79395115c3950
commit: c60f169202c7643991a8b4bfeea60e06843d5b5a 
arch/mn10300/kernel/fpu-nofpu.c: needs asm/elf.h
date:   4 months ago
config: mn10300-allnoconfig (attached as .config)
compiler: am33_2.0-linux-gcc (GCC) 4.9.0
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout c60f169202c7643991a8b4bfeea60e06843d5b5a
# save the attached .config to linux build tree
make.cross ARCH=mn10300 

All errors (new ones prefixed by >>):

   kernel/built-in.o: In function `.L412':
>> core.c:(.sched.text+0x257): undefined reference to `fpu_save'

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


[PATCH v11 03/27] powerpc/ptrace: Adapt gpr32_get, gpr32_set functions for transaction

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch splits gpr32_get, gpr32_set functions to accommodate
in transaction ptrace requests implemented in patches later in
the series.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
---
 arch/powerpc/kernel/ptrace.c | 64 +++-
 1 file changed, 51 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 060b140..38df7f0 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -674,24 +674,35 @@ static const struct user_regset_view user_ppc_native_view 
= {
 #ifdef CONFIG_PPC64
 #include 
 
-static int gpr32_get(struct task_struct *target,
+static int gpr32_get_common(struct task_struct *target,
 const struct user_regset *regset,
 unsigned int pos, unsigned int count,
-void *kbuf, void __user *ubuf)
+   void *kbuf, void __user *ubuf, bool tm_active)
 {
const unsigned long *regs = >thread.regs->gpr[0];
+   const unsigned long *ckpt_regs;
compat_ulong_t *k = kbuf;
compat_ulong_t __user *u = ubuf;
compat_ulong_t reg;
int i;
 
-   if (target->thread.regs == NULL)
-   return -EIO;
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+   ckpt_regs = >thread.ckpt_regs.gpr[0];
+#endif
+   if (tm_active) {
+   regs = ckpt_regs;
+   } else {
+   if (target->thread.regs == NULL)
+   return -EIO;
 
-   if (!FULL_REGS(target->thread.regs)) {
-   /* We have a partial register set.  Fill 14-31 with bogus 
values */
-   for (i = 14; i < 32; i++)
-   target->thread.regs->gpr[i] = NV_REG_POISON; 
+   if (!FULL_REGS(target->thread.regs)) {
+   /*
+* We have a partial register set.
+* Fill 14-31 with bogus values.
+*/
+   for (i = 14; i < 32; i++)
+   target->thread.regs->gpr[i] = NV_REG_POISON;
+   }
}
 
pos /= sizeof(reg);
@@ -731,20 +742,31 @@ static int gpr32_get(struct task_struct *target,
PT_REGS_COUNT * sizeof(reg), -1);
 }
 
-static int gpr32_set(struct task_struct *target,
+static int gpr32_set_common(struct task_struct *target,
 const struct user_regset *regset,
 unsigned int pos, unsigned int count,
-const void *kbuf, const void __user *ubuf)
+const void *kbuf, const void __user *ubuf, bool tm_active)
 {
unsigned long *regs = >thread.regs->gpr[0];
+   unsigned long *ckpt_regs;
const compat_ulong_t *k = kbuf;
const compat_ulong_t __user *u = ubuf;
compat_ulong_t reg;
 
-   if (target->thread.regs == NULL)
-   return -EIO;
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+   ckpt_regs = >thread.ckpt_regs.gpr[0];
+#endif
 
-   CHECK_FULL_REGS(target->thread.regs);
+   if (tm_active) {
+   regs = ckpt_regs;
+   } else {
+   regs = >thread.regs->gpr[0];
+
+   if (target->thread.regs == NULL)
+   return -EIO;
+
+   CHECK_FULL_REGS(target->thread.regs);
+   }
 
pos /= sizeof(reg);
count /= sizeof(reg);
@@ -804,6 +826,22 @@ static int gpr32_set(struct task_struct *target,
 (PT_TRAP + 1) * sizeof(reg), -1);
 }
 
+static int gpr32_get(struct task_struct *target,
+const struct user_regset *regset,
+unsigned int pos, unsigned int count,
+void *kbuf, void __user *ubuf)
+{
+   return gpr32_get_common(target, regset, pos, count, kbuf, ubuf, 0);
+}
+
+static int gpr32_set(struct task_struct *target,
+const struct user_regset *regset,
+unsigned int pos, unsigned int count,
+  

[PATCH v11 03/27] powerpc/ptrace: Adapt gpr32_get, gpr32_set functions for transaction

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch splits gpr32_get, gpr32_set functions to accommodate
in transaction ptrace requests implemented in patches later in
the series.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
---
 arch/powerpc/kernel/ptrace.c | 64 +++-
 1 file changed, 51 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 060b140..38df7f0 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -674,24 +674,35 @@ static const struct user_regset_view user_ppc_native_view 
= {
 #ifdef CONFIG_PPC64
 #include 
 
-static int gpr32_get(struct task_struct *target,
+static int gpr32_get_common(struct task_struct *target,
 const struct user_regset *regset,
 unsigned int pos, unsigned int count,
-void *kbuf, void __user *ubuf)
+   void *kbuf, void __user *ubuf, bool tm_active)
 {
const unsigned long *regs = >thread.regs->gpr[0];
+   const unsigned long *ckpt_regs;
compat_ulong_t *k = kbuf;
compat_ulong_t __user *u = ubuf;
compat_ulong_t reg;
int i;
 
-   if (target->thread.regs == NULL)
-   return -EIO;
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+   ckpt_regs = >thread.ckpt_regs.gpr[0];
+#endif
+   if (tm_active) {
+   regs = ckpt_regs;
+   } else {
+   if (target->thread.regs == NULL)
+   return -EIO;
 
-   if (!FULL_REGS(target->thread.regs)) {
-   /* We have a partial register set.  Fill 14-31 with bogus 
values */
-   for (i = 14; i < 32; i++)
-   target->thread.regs->gpr[i] = NV_REG_POISON; 
+   if (!FULL_REGS(target->thread.regs)) {
+   /*
+* We have a partial register set.
+* Fill 14-31 with bogus values.
+*/
+   for (i = 14; i < 32; i++)
+   target->thread.regs->gpr[i] = NV_REG_POISON;
+   }
}
 
pos /= sizeof(reg);
@@ -731,20 +742,31 @@ static int gpr32_get(struct task_struct *target,
PT_REGS_COUNT * sizeof(reg), -1);
 }
 
-static int gpr32_set(struct task_struct *target,
+static int gpr32_set_common(struct task_struct *target,
 const struct user_regset *regset,
 unsigned int pos, unsigned int count,
-const void *kbuf, const void __user *ubuf)
+const void *kbuf, const void __user *ubuf, bool tm_active)
 {
unsigned long *regs = >thread.regs->gpr[0];
+   unsigned long *ckpt_regs;
const compat_ulong_t *k = kbuf;
const compat_ulong_t __user *u = ubuf;
compat_ulong_t reg;
 
-   if (target->thread.regs == NULL)
-   return -EIO;
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+   ckpt_regs = >thread.ckpt_regs.gpr[0];
+#endif
 
-   CHECK_FULL_REGS(target->thread.regs);
+   if (tm_active) {
+   regs = ckpt_regs;
+   } else {
+   regs = >thread.regs->gpr[0];
+
+   if (target->thread.regs == NULL)
+   return -EIO;
+
+   CHECK_FULL_REGS(target->thread.regs);
+   }
 
pos /= sizeof(reg);
count /= sizeof(reg);
@@ -804,6 +826,22 @@ static int gpr32_set(struct task_struct *target,
 (PT_TRAP + 1) * sizeof(reg), -1);
 }
 
+static int gpr32_get(struct task_struct *target,
+const struct user_regset *regset,
+unsigned int pos, unsigned int count,
+void *kbuf, void __user *ubuf)
+{
+   return gpr32_get_common(target, regset, pos, count, kbuf, ubuf, 0);
+}
+
+static int gpr32_set(struct task_struct *target,
+const struct user_regset *regset,
+unsigned int pos, unsigned int count,
+const void *kbuf, const void __user *ubuf)
+{
+   return gpr32_set_common(target, regset, pos, count, kbuf, ubuf, 0);
+}
+
 /*
  * These are the regset flavors matching the CONFIG_PPC32 native set.
  */
-- 
1.8.3.1



[PATCH v11 01/27] elf: Add powerpc specific core note sections

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds twelve ELF core note sections for powerpc
architecture for various registers and register sets which
need to be accessed from ptrace interface and then gdb.
These additions include special purpose registers like TAR,
PPR, DSCR, TM running and checkpointed state for various
register sets, EBB related register set, performance monitor
register set etc. Addition of these new ELF core note
sections extends the existing ELF ABI on powerpc arch without
affecting it in any manner.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 include/uapi/linux/elf.h | 13 +
 1 file changed, 13 insertions(+)

diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
index cb4a72f..1be3c5f 100644
--- a/include/uapi/linux/elf.h
+++ b/include/uapi/linux/elf.h
@@ -381,6 +381,19 @@ typedef struct elf64_shdr {
 #define NT_PPC_VMX 0x100   /* PowerPC Altivec/VMX registers */
 #define NT_PPC_SPE 0x101   /* PowerPC SPE/EVR registers */
 #define NT_PPC_VSX 0x102   /* PowerPC VSX registers */
+#define NT_PPC_TAR 0x103   /* Target Address Register */
+#define NT_PPC_PPR 0x104   /* Program Priority Register */
+#define NT_PPC_DSCR0x105   /* Data Stream Control Register */
+#define NT_PPC_EBB 0x106   /* Event Based Branch Registers */
+#define NT_PPC_PMU 0x107   /* Performance Monitor Registers */
+#define NT_PPC_TM_CGPR 0x108   /* TM checkpointed GPR Registers */
+#define NT_PPC_TM_CFPR 0x109   /* TM checkpointed FPR Registers */
+#define NT_PPC_TM_CVMX 0x10a   /* TM checkpointed VMX Registers */
+#define NT_PPC_TM_CVSX 0x10b   /* TM checkpointed VSX Registers */
+#define NT_PPC_TM_SPR  0x10c   /* TM Special Purpose Registers */
+#define NT_PPC_TM_CTAR 0x10d   /* TM checkpointed Target Address 
Register */
+#define NT_PPC_TM_CPPR 0x10e   /* TM checkpointed Program Priority 
Register */
+#define NT_PPC_TM_CDSCR0x10f   /* TM checkpointed Data Stream 
Control Register */
 #define NT_386_TLS 0x200   /* i386 TLS slots (struct user_desc) */
 #define NT_386_IOPERM  0x201   /* x86 io permission bitmap (1=deny) */
 #define NT_X86_XSTATE  0x202   /* x86 extended state using xsave */
-- 
1.8.3.1



[PATCH v11 01/27] elf: Add powerpc specific core note sections

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds twelve ELF core note sections for powerpc
architecture for various registers and register sets which
need to be accessed from ptrace interface and then gdb.
These additions include special purpose registers like TAR,
PPR, DSCR, TM running and checkpointed state for various
register sets, EBB related register set, performance monitor
register set etc. Addition of these new ELF core note
sections extends the existing ELF ABI on powerpc arch without
affecting it in any manner.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 include/uapi/linux/elf.h | 13 +
 1 file changed, 13 insertions(+)

diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
index cb4a72f..1be3c5f 100644
--- a/include/uapi/linux/elf.h
+++ b/include/uapi/linux/elf.h
@@ -381,6 +381,19 @@ typedef struct elf64_shdr {
 #define NT_PPC_VMX 0x100   /* PowerPC Altivec/VMX registers */
 #define NT_PPC_SPE 0x101   /* PowerPC SPE/EVR registers */
 #define NT_PPC_VSX 0x102   /* PowerPC VSX registers */
+#define NT_PPC_TAR 0x103   /* Target Address Register */
+#define NT_PPC_PPR 0x104   /* Program Priority Register */
+#define NT_PPC_DSCR0x105   /* Data Stream Control Register */
+#define NT_PPC_EBB 0x106   /* Event Based Branch Registers */
+#define NT_PPC_PMU 0x107   /* Performance Monitor Registers */
+#define NT_PPC_TM_CGPR 0x108   /* TM checkpointed GPR Registers */
+#define NT_PPC_TM_CFPR 0x109   /* TM checkpointed FPR Registers */
+#define NT_PPC_TM_CVMX 0x10a   /* TM checkpointed VMX Registers */
+#define NT_PPC_TM_CVSX 0x10b   /* TM checkpointed VSX Registers */
+#define NT_PPC_TM_SPR  0x10c   /* TM Special Purpose Registers */
+#define NT_PPC_TM_CTAR 0x10d   /* TM checkpointed Target Address 
Register */
+#define NT_PPC_TM_CPPR 0x10e   /* TM checkpointed Program Priority 
Register */
+#define NT_PPC_TM_CDSCR0x10f   /* TM checkpointed Data Stream 
Control Register */
 #define NT_386_TLS 0x200   /* i386 TLS slots (struct user_desc) */
 #define NT_386_IOPERM  0x201   /* x86 io permission bitmap (1=deny) */
 #define NT_X86_XSTATE  0x202   /* x86 extended state using xsave */
-- 
1.8.3.1



[PATCH v11 20/27] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-tar.c   | 179 +
 2 files changed, 180 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index c794057..77d7a13 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar
+ptrace-tar ptrace-tm-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
new file mode 100644
index 000..d428ed9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -0,0 +1,179 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+volatile unsigned long *cptr, *pptr;
+
+
+void tm_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+   TSUSPEND
+   "li 0, 1;"
+   "stw 0, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+   [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
+   [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
+   [dscr_2]"i"(DSCR_2), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   

[PATCH v11 22/27] selftests/powerpc: Add ptrace tests for VSX, VMX registers

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.c  | 140 +++
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.h  | 121 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.S| 265 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 119 +
 5 files changed, 646 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 2916759..e3d9ceb 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
new file mode 100644
index 000..2017dd4
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
@@ -0,0 +1,140 @@
+/*
+ * Ptrace test for VMX/VSX registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+void loadvsx(void *p, int tmp);
+void storevsx(void *p, int tmp);
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+
+void vsx(void)
+{
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   loadvsx(fp_load, 0);
+   cptr[1] = 1;
+
+   while (!cptr[0]);
+   shmdt((void *) cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_new);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+   load_vsx_vmx(fp_load_new, vsx, vmx);
+
+   ret = write_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int ptrace_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load[i] = i + rand();
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load_new[i] = i + 2 * rand();
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+  

[PATCH v11 26/27] selftests/powerpc: Add .gitignore file for ptrace executables

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
---
 tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
 1 file changed, 11 insertions(+)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore

diff --git a/tools/testing/selftests/powerpc/ptrace/.gitignore 
b/tools/testing/selftests/powerpc/ptrace/.gitignore
new file mode 100644
index 000..bdf3566
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/.gitignore
@@ -0,0 +1,11 @@
+ptrace-ebb
+ptrace-gpr
+ptrace-tm-gpr
+ptrace-tm-spd-gpr
+ptrace-tar
+ptrace-tm-tar
+ptrace-tm-spd-tar
+ptrace-vsx
+ptrace-tm-vsx
+ptrace-tm-spd-vsx
+ptrace-tm-spr
-- 
1.8.3.1



[PATCH v11 20/27] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-tar.c   | 179 +
 2 files changed, 180 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index c794057..77d7a13 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar
+ptrace-tar ptrace-tm-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
new file mode 100644
index 000..d428ed9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -0,0 +1,179 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+volatile unsigned long *cptr, *pptr;
+
+
+void tm_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+   TSUSPEND
+   "li 0, 1;"
+   "stw 0, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+   [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
+   [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
+   [dscr_2]"i"(DSCR_2), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_tar(pid_t child)
+{
+   unsigned long regs[3];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tar_registers(child, regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   

[PATCH v11 22/27] selftests/powerpc: Add ptrace tests for VSX, VMX registers

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.c  | 140 +++
 .../testing/selftests/powerpc/ptrace/ptrace-vsx.h  | 121 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.S| 265 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 119 +
 5 files changed, 646 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 2916759..e3d9ceb 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
new file mode 100644
index 000..2017dd4
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
@@ -0,0 +1,140 @@
+/*
+ * Ptrace test for VMX/VSX registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+void loadvsx(void *p, int tmp);
+void storevsx(void *p, int tmp);
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+
+void vsx(void)
+{
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   loadvsx(fp_load, 0);
+   cptr[1] = 1;
+
+   while (!cptr[0]);
+   shmdt((void *) cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_new);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   memset(vsx, 0, sizeof(vsx));
+   memset(vmx, 0, sizeof(vmx));
+   load_vsx_vmx(fp_load_new, vsx, vmx);
+
+   ret = write_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int ptrace_vsx(void)
+{
+   pid_t pid;
+   int ret, status, i;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load[i] = i + rand();
+
+   for (i = 0; i < VEC_MAX; i++)
+   fp_load_new[i] = i + 2 * rand();
+
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   vsx();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   while (!pptr[1]);
+
+   ret = trace_vsx(pid);
+   if (ret) {
+   kill(pid, SIGTERM);
+   return TEST_FAIL;
+   }
+
+   pptr[0] = 1;
+   shmdt((void *)pptr);
+
+   ret = wait();
+   if (ret != pid) {
+  

[PATCH v11 26/27] selftests/powerpc: Add .gitignore file for ptrace executables

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
---
 tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
 1 file changed, 11 insertions(+)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore

diff --git a/tools/testing/selftests/powerpc/ptrace/.gitignore 
b/tools/testing/selftests/powerpc/ptrace/.gitignore
new file mode 100644
index 000..bdf3566
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/.gitignore
@@ -0,0 +1,11 @@
+ptrace-ebb
+ptrace-gpr
+ptrace-tm-gpr
+ptrace-tm-spd-gpr
+ptrace-tar
+ptrace-tm-tar
+ptrace-tm-spd-tar
+ptrace-vsx
+ptrace-tm-vsx
+ptrace-tm-spd-vsx
+ptrace-tm-spr
-- 
1.8.3.1



[PATCH v11 27/27] selftests/powerpc: Fix a build issue

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

Fixes the following build failure -

cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {
   ^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your code
cp_abort.c:97:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
---
 tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/powerpc/context_switch/cp_abort.c 
b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
index 5a5b55a..1ce7dce 100644
--- a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
+++ b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
@@ -67,7 +67,7 @@ int test_cp_abort(void)
/* 128 bytes for a full cache line */
char buf[128] __cacheline_aligned;
cpu_set_t cpuset;
-   int fd1[2], fd2[2], pid;
+   int fd1[2], fd2[2], pid, i;
char c;
 
/* only run this test on a P9 or later */
@@ -87,14 +87,14 @@ int test_cp_abort(void)
FAIL_IF(pid < 0);
 
if (!pid) {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((write(fd1[WRITE_FD], , 1)) != 1);
FAIL_IF((read(fd2[READ_FD], , 1)) != 1);
/* A paste succeeds if CR0 EQ bit is set */
FAIL_IF(paste(buf) & 0x2000);
}
} else {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((read(fd1[READ_FD], , 1)) != 1);
copy(buf);
FAIL_IF((write(fd2[WRITE_FD], , 1) != 1));
-- 
1.8.3.1



[PATCH v11 23/27] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-vsx.c   | 205 +
 2 files changed, 207 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index e3d9ceb..1b07649 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
new file mode 100644
index 000..0cc9cc3
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -0,0 +1,205 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+volatile unsigned long *cptr, *pptr;
+
+void loadvsx(void *p, int tmp);
+void storevsx(void *p, int tmp);
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+void tm_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "bl load_vsx;"
+   TSUSPEND
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r7", "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+   shmdt((void *)cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   exit(1);
+}
+
+int trace_tm_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = 

[PATCH v11 27/27] selftests/powerpc: Fix a build issue

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

Fixes the following build failure -

cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {
   ^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your code
cp_abort.c:97:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
   for (int i = 0; i < NUM_LOOPS; i++) {

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
---
 tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/powerpc/context_switch/cp_abort.c 
b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
index 5a5b55a..1ce7dce 100644
--- a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
+++ b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
@@ -67,7 +67,7 @@ int test_cp_abort(void)
/* 128 bytes for a full cache line */
char buf[128] __cacheline_aligned;
cpu_set_t cpuset;
-   int fd1[2], fd2[2], pid;
+   int fd1[2], fd2[2], pid, i;
char c;
 
/* only run this test on a P9 or later */
@@ -87,14 +87,14 @@ int test_cp_abort(void)
FAIL_IF(pid < 0);
 
if (!pid) {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((write(fd1[WRITE_FD], , 1)) != 1);
FAIL_IF((read(fd2[READ_FD], , 1)) != 1);
/* A paste succeeds if CR0 EQ bit is set */
FAIL_IF(paste(buf) & 0x2000);
}
} else {
-   for (int i = 0; i < NUM_LOOPS; i++) {
+   for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((read(fd1[READ_FD], , 1)) != 1);
copy(buf);
FAIL_IF((write(fd2[WRITE_FD], , 1) != 1));
-- 
1.8.3.1



[PATCH v11 23/27] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-vsx.c   | 205 +
 2 files changed, 207 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index e3d9ceb..1b07649 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
new file mode 100644
index 000..0cc9cc3
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -0,0 +1,205 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+volatile unsigned long *cptr, *pptr;
+
+void loadvsx(void *p, int tmp);
+void storevsx(void *p, int tmp);
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+void tm_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[1] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "bl load_vsx;"
+   TSUSPEND
+   "li 7, 1;"
+   "stw 7, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR), [cptr1] "r" ([1])
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r7", "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+   shmdt((void *)cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   exit(1);
+}
+
+int trace_tm_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx_ckpt(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load_ckpt);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx_ckpt(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, 

[PATCH v11 19/27] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../testing/selftests/powerpc/ptrace/ptrace-tar.c  | 158 ++
 .../testing/selftests/powerpc/ptrace/ptrace-tar.h  |  50 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 181 +
 4 files changed, 391 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index d0f000c..c794057 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
+ptrace-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
new file mode 100644
index 000..9af3fd7
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
@@ -0,0 +1,158 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr;
+volatile int *pptr;
+
+void tar(void)
+{
+   unsigned long reg[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   user_write, TAR_1, PPR_1, DSCR_1);
+
+   mtspr(SPRN_TAR, TAR_1);
+   mtspr(SPRN_PPR, PPR_1);
+   mtspr(SPRN_DSCR, DSCR_1);
+
+   cptr[2] = 1;
+
+   /* Wait on parent */
+   while (!cptr[0]);
+
+   reg[0] = mfspr(SPRN_TAR);
+   reg[1] = mfspr(SPRN_PPR);
+   reg[2] = mfspr(SPRN_DSCR);
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, reg[0], reg[1], reg[2]);
+
+   /* Unblock the parent now */
+   cptr[1] = 1;
+   shmdt((int *)cptr);
+
+   ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_tar(pid_t child)
+{
+   unsigned long reg[3];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tar_registers(child, reg);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, reg[0], reg[1], reg[2]);
+
+   ret = validate_tar_registers(reg, TAR_1, PPR_1, DSCR_1);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int trace_tar_write(pid_t child)
+{
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_tar_registers(child, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_running, TAR_2, PPR_2, DSCR_2);
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int ptrace_tar(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   shm_id = 

[PATCH v11 25/27] selftests/powerpc: Add ptrace tests for TM SPR registers

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spr.c   | 175 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h|  35 +
 3 files changed, 212 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 797840a..f34670e 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,7 +1,8 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
 ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
-ptrace-tm-spd-vsx
+ptrace-tm-spd-vsx ptrace-tm-spr
 
+include ../../lib.mk
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
new file mode 100644
index 000..9d7f37d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -0,0 +1,175 @@
+/*
+ * Ptrace test TM SPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+
+/* Tracee and tracer shared data */
+struct shared {
+   int flag;
+   struct tm_spr_regs regs;
+};
+unsigned long tfhar;
+
+int shm_id;
+volatile struct shared *cptr, *pptr;
+
+int shm_id1;
+volatile int *cptr1, *pptr1;
+
+#define TM_SCHED   0xde018c01
+#define TM_KVM_SCHED   0xe001ac01
+
+int validate_tm_spr(struct tm_spr_regs *regs)
+{
+   if (regs->tm_tfhar != (tfhar - 32))
+   return TEST_FAIL;
+
+   if ((regs->tm_texasr != TM_SCHED) && (regs->tm_texasr != TM_KVM_SCHED))
+   return TEST_FAIL;
+
+   if ((regs->tm_texasr == TM_KVM_SCHED) && (regs->tm_tfiar != 0))
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+void tm_spr(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (struct shared *)shmat(shm_id, NULL, 0);
+   cptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+trans:
+   cptr1[0] = 0;
+   asm __volatile__(
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   TSUSPEND
+   "li 8, 1;"
+   "sth 8, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "mflr 31;"
+   "bl 4f;"/* $ = TFHAR + 2 */
+   "4: ;"
+   "mflr %[tfhar];"
+   "mtlr 31;"
+
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [tfhar] "=r" (tfhar), [res] "=r" (result),
+   [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+   : [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11", "r31"
+   );
+
+   if (result) {
+   if (!cptr->flag)
+   goto trans;
+
+   ret = validate_tm_spr((struct tm_spr_regs *)>regs);
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   

[PATCH v11 18/27] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c   | 322 +
 2 files changed, 323 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 170683a..d0f000c 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,4 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
new file mode 100644
index 000..db3a57b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
@@ -0,0 +1,322 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+void store_gpr(unsigned long *addr);
+void store_fpr(float *addr);
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+float d = FPR_4;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+
+   "li 14, %[gpr_1];"
+   "li 15, %[gpr_1];"
+   "li 16, %[gpr_1];"
+   "li 17, %[gpr_1];"
+   "li 18, %[gpr_1];"
+   "li 19, %[gpr_1];"
+   "li 20, %[gpr_1];"
+   "li 21, %[gpr_1];"
+   "li 22, %[gpr_1];"
+   "li 23, %[gpr_1];"
+   "li 24, %[gpr_1];"
+   "li 25, %[gpr_1];"
+   "li 26, %[gpr_1];"
+   "li 27, %[gpr_1];"
+   "li 28, %[gpr_1];"
+   "li 29, %[gpr_1];"
+   "li 30, %[gpr_1];"
+   "li 31, %[gpr_1];"
+
+   "lfs 0, 0(%[flt_1]);"
+   "lfs 1, 0(%[flt_1]);"
+   "lfs 2, 0(%[flt_1]);"
+   "lfs 3, 0(%[flt_1]);"
+   "lfs 4, 0(%[flt_1]);"
+   "lfs 5, 0(%[flt_1]);"
+   "lfs 6, 0(%[flt_1]);"
+   "lfs 7, 0(%[flt_1]);"
+   "lfs 8, 0(%[flt_1]);"
+   "lfs 9, 0(%[flt_1]);"
+   "lfs 10, 0(%[flt_1]);"
+   "lfs 11, 0(%[flt_1]);"
+   "lfs 12, 0(%[flt_1]);"
+   "lfs 13, 0(%[flt_1]);"
+   "lfs 14, 0(%[flt_1]);"
+   "lfs 15, 0(%[flt_1]);"
+   "lfs 16, 0(%[flt_1]);"
+   "lfs 17, 0(%[flt_1]);"
+   "lfs 18, 0(%[flt_1]);"
+   "lfs 19, 0(%[flt_1]);"
+   "lfs 20, 0(%[flt_1]);"
+   "lfs 21, 0(%[flt_1]);"
+   "lfs 22, 0(%[flt_1]);"
+   "lfs 23, 0(%[flt_1]);"
+   "lfs 24, 0(%[flt_1]);"
+   "lfs 25, 0(%[flt_1]);"
+   "lfs 26, 0(%[flt_1]);"
+   "lfs 27, 0(%[flt_1]);"
+   "lfs 28, 0(%[flt_1]);"
+   "lfs 29, 0(%[flt_1]);"
+   "lfs 30, 0(%[flt_1]);"
+   "lfs 31, 0(%[flt_1]);"
+
+

[PATCH v11 21/27] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c   | 192 +
 2 files changed, 193 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 77d7a13..2916759 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
new file mode 100644
index 000..9e4cb03
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -0,0 +1,192 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+volatile int *cptr, *pptr;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+
+   TSUSPEND
+   "li 4, %[tar_3];"
+   "mtspr %[sprn_tar],  4;"/* TAR_3 */
+   "li 4, %[dscr_3];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_3 */
+   "or 6,6,6;" /* PPR_3 */
+   "bl wait_parent;"
+   TRESUME
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+   [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
+   [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
+   [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
+   [tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   

[PATCH v11 24/27] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c   | 218 +
 2 files changed, 220 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 1b07649..797840a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
+ptrace-tm-spd-vsx
 
 
 all: $(TEST_PROGS)
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
new file mode 100644
index 000..8a1a74b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -0,0 +1,218 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+volatile int *cptr, *pptr;
+
+void loadvsx(void *p, int tmp);
+void storevsx(void *p, int tmp);
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_new(void)
+{
+   loadvsx(fp_load_new, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "bl load_vsx_new;"
+   TSUSPEND
+   "bl load_vsx;"
+   "bl wait_parent;"
+   TRESUME
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+   shmdt((void *)cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   exit(1);
+}
+
+int trace_tm_spd_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return 

[PATCH v11 25/27] selftests/powerpc: Add ptrace tests for TM SPR registers

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spr.c   | 175 +
 tools/testing/selftests/powerpc/ptrace/ptrace.h|  35 +
 3 files changed, 212 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 797840a..f34670e 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,7 +1,8 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
 ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
-ptrace-tm-spd-vsx
+ptrace-tm-spd-vsx ptrace-tm-spr
 
+include ../../lib.mk
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
new file mode 100644
index 000..9d7f37d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -0,0 +1,175 @@
+/*
+ * Ptrace test TM SPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+
+/* Tracee and tracer shared data */
+struct shared {
+   int flag;
+   struct tm_spr_regs regs;
+};
+unsigned long tfhar;
+
+int shm_id;
+volatile struct shared *cptr, *pptr;
+
+int shm_id1;
+volatile int *cptr1, *pptr1;
+
+#define TM_SCHED   0xde018c01
+#define TM_KVM_SCHED   0xe001ac01
+
+int validate_tm_spr(struct tm_spr_regs *regs)
+{
+   if (regs->tm_tfhar != (tfhar - 32))
+   return TEST_FAIL;
+
+   if ((regs->tm_texasr != TM_SCHED) && (regs->tm_texasr != TM_KVM_SCHED))
+   return TEST_FAIL;
+
+   if ((regs->tm_texasr == TM_KVM_SCHED) && (regs->tm_tfiar != 0))
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+void tm_spr(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (struct shared *)shmat(shm_id, NULL, 0);
+   cptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+trans:
+   cptr1[0] = 0;
+   asm __volatile__(
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   TSUSPEND
+   "li 8, 1;"
+   "sth 8, 0(%[cptr1]);"
+   TRESUME
+   "b .;"
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "mflr 31;"
+   "bl 4f;"/* $ = TFHAR + 2 */
+   "4: ;"
+   "mflr %[tfhar];"
+   "mtlr 31;"
+
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [tfhar] "=r" (tfhar), [res] "=r" (result),
+   [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+   : [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11", "r31"
+   );
+
+   if (result) {
+   if (!cptr->flag)
+   goto trans;
+
+   ret = validate_tm_spr((struct tm_spr_regs *)>regs);
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt((void *)cptr);
+   shmdt((void *)cptr1);
+   exit(1);
+}
+
+int trace_tm_spr(pid_t child)
+{
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tm_spr(child, (struct tm_spr_regs *)>regs);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("TFHAR: %lx TEXASR: %lx TFIAR: %lx\n", pptr->regs.tm_tfhar,
+   pptr->regs.tm_texasr, pptr->regs.tm_tfiar);
+
+   pptr->flag = 1;
+   ret = stop_trace(child);
+   if 

[PATCH v11 18/27] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c   | 322 +
 2 files changed, 323 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 170683a..d0f000c 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,4 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
new file mode 100644
index 000..db3a57b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
@@ -0,0 +1,322 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr, *pptr;
+
+void store_gpr(unsigned long *addr);
+void store_fpr(float *addr);
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+float d = FPR_4;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_gpr(void)
+{
+   unsigned long gpr_buf[18];
+   unsigned long result, texasr;
+   float fpr_buf[32];
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+
+   "li 14, %[gpr_1];"
+   "li 15, %[gpr_1];"
+   "li 16, %[gpr_1];"
+   "li 17, %[gpr_1];"
+   "li 18, %[gpr_1];"
+   "li 19, %[gpr_1];"
+   "li 20, %[gpr_1];"
+   "li 21, %[gpr_1];"
+   "li 22, %[gpr_1];"
+   "li 23, %[gpr_1];"
+   "li 24, %[gpr_1];"
+   "li 25, %[gpr_1];"
+   "li 26, %[gpr_1];"
+   "li 27, %[gpr_1];"
+   "li 28, %[gpr_1];"
+   "li 29, %[gpr_1];"
+   "li 30, %[gpr_1];"
+   "li 31, %[gpr_1];"
+
+   "lfs 0, 0(%[flt_1]);"
+   "lfs 1, 0(%[flt_1]);"
+   "lfs 2, 0(%[flt_1]);"
+   "lfs 3, 0(%[flt_1]);"
+   "lfs 4, 0(%[flt_1]);"
+   "lfs 5, 0(%[flt_1]);"
+   "lfs 6, 0(%[flt_1]);"
+   "lfs 7, 0(%[flt_1]);"
+   "lfs 8, 0(%[flt_1]);"
+   "lfs 9, 0(%[flt_1]);"
+   "lfs 10, 0(%[flt_1]);"
+   "lfs 11, 0(%[flt_1]);"
+   "lfs 12, 0(%[flt_1]);"
+   "lfs 13, 0(%[flt_1]);"
+   "lfs 14, 0(%[flt_1]);"
+   "lfs 15, 0(%[flt_1]);"
+   "lfs 16, 0(%[flt_1]);"
+   "lfs 17, 0(%[flt_1]);"
+   "lfs 18, 0(%[flt_1]);"
+   "lfs 19, 0(%[flt_1]);"
+   "lfs 20, 0(%[flt_1]);"
+   "lfs 21, 0(%[flt_1]);"
+   "lfs 22, 0(%[flt_1]);"
+   "lfs 23, 0(%[flt_1]);"
+   "lfs 24, 0(%[flt_1]);"
+   "lfs 25, 0(%[flt_1]);"
+   "lfs 26, 0(%[flt_1]);"
+   "lfs 27, 0(%[flt_1]);"
+   "lfs 28, 0(%[flt_1]);"
+   "lfs 29, 0(%[flt_1]);"
+   "lfs 30, 0(%[flt_1]);"
+   "lfs 31, 0(%[flt_1]);"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 14, %[gpr_2];"
+   "li 15, %[gpr_2];"
+   "li 16, %[gpr_2];"
+   "li 17, %[gpr_2];"
+   "li 18, %[gpr_2];"
+   "li 19, %[gpr_2];"
+   "li 20, %[gpr_2];"
+   "li 21, %[gpr_2];"
+   "li 22, %[gpr_2];"
+   "li 23, %[gpr_2];"
+   "li 24, %[gpr_2];"
+   "li 25, %[gpr_2];"
+   

[PATCH v11 21/27] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   2 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c   | 192 +
 2 files changed, 193 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 77d7a13..2916759 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
new file mode 100644
index 000..9e4cb03
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -0,0 +1,192 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+volatile int *cptr, *pptr;
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_tar(void)
+{
+   unsigned long result, texasr;
+   unsigned long regs[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "li 4, %[tar_1];"
+   "mtspr %[sprn_tar],  4;"/* TAR_1 */
+   "li 4, %[dscr_1];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_1 */
+   "or 31,31,31;"  /* PPR_1*/
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "li 4, %[tar_2];"
+   "mtspr %[sprn_tar],  4;"/* TAR_2 */
+   "li 4, %[dscr_2];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_2 */
+   "or 1,1,1;" /* PPR_2 */
+
+   TSUSPEND
+   "li 4, %[tar_3];"
+   "mtspr %[sprn_tar],  4;"/* TAR_3 */
+   "li 4, %[dscr_3];"
+   "mtspr %[sprn_dscr], 4;"/* DSCR_3 */
+   "or 6,6,6;" /* PPR_3 */
+   "bl wait_parent;"
+   TRESUME
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   /* Transaction abort handler */
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+   [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
+   [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
+   [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
+   [tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
+   : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+   );
+
+   /* TM failed, analyse */
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+
+   regs[0] = mfspr(SPRN_TAR);
+   regs[1] = mfspr(SPRN_PPR);
+   regs[2] = mfspr(SPRN_DSCR);
+
+   shmdt();
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, regs[0], regs[1], regs[2]);
+
+   ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   shmdt();
+   exit(1);
+}
+
+int trace_tm_spd_tar(pid_t child)
+{
+   unsigned long regs[3];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   

[PATCH v11 24/27] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c   | 218 +
 2 files changed, 220 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index 1b07649..797840a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
 TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
+ptrace-tm-spd-vsx
 
 
 all: $(TEST_PROGS)
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
new file mode 100644
index 000..8a1a74b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -0,0 +1,218 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+volatile int *cptr, *pptr;
+
+void loadvsx(void *p, int tmp);
+void storevsx(void *p, int tmp);
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+   loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_new(void)
+{
+   loadvsx(fp_load_new, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+   loadvsx(fp_load_ckpt, 0);
+}
+
+__attribute__((used)) void wait_parent(void)
+{
+   cptr[2] = 1;
+   while (!cptr[1]);
+}
+
+void tm_spd_vsx(void)
+{
+   unsigned long result, texasr;
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+   cptr[2] = 0;
+   asm __volatile__(
+   "bl load_vsx_ckpt;"
+
+   "1: ;"
+   TBEGIN
+   "beq 2f;"
+
+   "bl load_vsx_new;"
+   TSUSPEND
+   "bl load_vsx;"
+   "bl wait_parent;"
+   TRESUME
+
+   TEND
+   "li 0, 0;"
+   "ori %[res], 0, 0;"
+   "b 3f;"
+
+   "2: ;"
+   "li 0, 1;"
+   "ori %[res], 0, 0;"
+   "mfspr %[texasr], %[sprn_texasr];"
+
+   "3: ;"
+   : [res] "=r" (result), [texasr] "=r" (texasr)
+   : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+   [sprn_texasr] "i"  (SPRN_TEXASR)
+   : "memory", "r0", "r1", "r2", "r3", "r4",
+   "r8", "r9", "r10", "r11"
+   );
+
+   if (result) {
+   if (!cptr[0])
+   goto trans;
+   shmdt((void *)cptr);
+
+   storevsx(fp_store, 0);
+   ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+   if (ret)
+   exit(1);
+   exit(0);
+   }
+   exit(1);
+}
+
+int trace_tm_spd_vsx(pid_t child)
+{
+   unsigned long vsx[VSX_MAX];
+   unsigned long vmx[VMX_MAX + 2][2];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vmx(child, vmx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vmx(vmx, fp_load);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_vsx_ckpt(child, vsx);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = validate_vsx(vsx, fp_load_ckpt);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = 

[PATCH v11 19/27] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/ptrace/Makefile|   3 +-
 .../testing/selftests/powerpc/ptrace/ptrace-tar.c  | 158 ++
 .../testing/selftests/powerpc/ptrace/ptrace-tar.h  |  50 ++
 tools/testing/selftests/powerpc/ptrace/ptrace.h| 181 +
 4 files changed, 391 insertions(+), 1 deletion(-)
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
 create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h

diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile 
b/tools/testing/selftests/powerpc/ptrace/Makefile
index d0f000c..c794057 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
+ptrace-tar
 
 all: $(TEST_PROGS)
 CFLAGS += -m64
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c 
b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
new file mode 100644
index 000..9af3fd7
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
@@ -0,0 +1,158 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+volatile int *cptr;
+volatile int *pptr;
+
+void tar(void)
+{
+   unsigned long reg[3];
+   int ret;
+
+   cptr = (int *)shmat(shm_id, NULL, 0);
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   user_write, TAR_1, PPR_1, DSCR_1);
+
+   mtspr(SPRN_TAR, TAR_1);
+   mtspr(SPRN_PPR, PPR_1);
+   mtspr(SPRN_DSCR, DSCR_1);
+
+   cptr[2] = 1;
+
+   /* Wait on parent */
+   while (!cptr[0]);
+
+   reg[0] = mfspr(SPRN_TAR);
+   reg[1] = mfspr(SPRN_PPR);
+   reg[2] = mfspr(SPRN_DSCR);
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   user_read, reg[0], reg[1], reg[2]);
+
+   /* Unblock the parent now */
+   cptr[1] = 1;
+   shmdt((int *)cptr);
+
+   ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   exit(1);
+   exit(0);
+}
+
+int trace_tar(pid_t child)
+{
+   unsigned long reg[3];
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = show_tar_registers(child, reg);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+   ptrace_read_running, reg[0], reg[1], reg[2]);
+
+   ret = validate_tar_registers(reg, TAR_1, PPR_1, DSCR_1);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int trace_tar_write(pid_t child)
+{
+   int ret;
+
+   ret = start_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   ret = write_tar_registers(child, TAR_2, PPR_2, DSCR_2);
+   if (ret)
+   return TEST_FAIL;
+
+   printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+   ptrace_write_running, TAR_2, PPR_2, DSCR_2);
+
+   ret = stop_trace(child);
+   if (ret)
+   return TEST_FAIL;
+
+   return TEST_PASS;
+}
+
+int ptrace_tar(void)
+{
+   pid_t pid;
+   int ret, status;
+
+   shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+   pid = fork();
+   if (pid < 0) {
+   perror("fork() failed");
+   return TEST_FAIL;
+   }
+
+   if (pid == 0)
+   tar();
+
+   if (pid) {
+   pptr = (int *)shmat(shm_id, NULL, 0);
+   pptr[0] = 0;
+   pptr[1] = 0;
+
+   while (!pptr[2]);
+   ret = trace_tar(pid);
+   if (ret)
+   return ret;
+
+

[PATCH v11 10/27] powerpc/ptrace: Enable support for NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch enables support for running TAR, PPR, DSCR registers
related ELF core notes NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR based
ptrace requests through PTRACE_GETREGSET, PTRACE_SETREGSET calls.
This is achieved through adding three new register sets REGSET_TAR,
REGSET_PPR, REGSET_DSCR in powerpc corresponding to the ELF core
note sections added in this regad. It implements the get, set and
active functions for all these new register sets added.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
---
 arch/powerpc/kernel/ptrace.c | 117 +++
 1 file changed, 117 insertions(+)

diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index f0dcfb5..1a091db 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1456,6 +1456,78 @@ static int tm_dscr_set(struct task_struct *target,
 }
 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 
+#ifdef CONFIG_PPC64
+static int ppr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyout(, , , ,
+   >thread.ppr, 0, sizeof(u64));
+   return ret;
+}
+
+static int ppr_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.ppr, 0, sizeof(u64));
+   return ret;
+}
+
+static int dscr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyout(, , , ,
+   >thread.dscr, 0, sizeof(u64));
+   return ret;
+}
+static int dscr_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.dscr, 0, sizeof(u64));
+   return ret;
+}
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
+static int tar_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyout(, , , ,
+   >thread.tar, 0, sizeof(u64));
+   return ret;
+}
+static int tar_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.tar, 0, sizeof(u64));
+   return ret;
+}
+#endif
 /*
  * These are our native regset flavors.
  */
@@ -1481,6 +1553,13 @@ enum powerpc_regset {
REGSET_TM_CPPR, /* TM checkpointed PPR register */
REGSET_TM_CDSCR,/* TM checkpointed DSCR register */
 #endif
+#ifdef CONFIG_PPC64
+   REGSET_PPR, /* PPR register */
+   REGSET_DSCR,/* DSCR register */
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
+   REGSET_TAR, /* TAR register */
+#endif
 };
 
 static const struct user_regset native_regsets[] = {
@@ -1557,6 +1636,25 @@ static const struct user_regset native_regsets[] = {
.active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
},
 #endif
+#ifdef CONFIG_PPC64
+   [REGSET_PPR] = {
+   .core_note_type = NT_PPC_PPR, .n = 1,
+   .size = 

[PATCH v11 07/27] powerpc/ptrace: Enable support for NT_PPC_CVSX

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch enables support for TM checkpointed VSX register
set ELF core note NT_PPC_CVSX based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding a register set REGSET_CVSX in powerpc
corresponding to the ELF core note section added. It
implements the get, set and active functions for this new
register set added.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 arch/powerpc/include/uapi/asm/elf.h |   1 +
 arch/powerpc/kernel/ptrace.c| 129 
 2 files changed, 130 insertions(+)

diff --git a/arch/powerpc/include/uapi/asm/elf.h 
b/arch/powerpc/include/uapi/asm/elf.h
index ecb4e84..1549172 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -92,6 +92,7 @@
 #define ELF_NGREG  48  /* includes nip, msr, lr, etc. */
 #define ELF_NFPREG 33  /* includes fpscr */
 #define ELF_NVMX   34  /* includes all vector registers */
+#define ELF_NVSX   32  /* includes all VSX registers */
 
 typedef unsigned long elf_greg_t64;
 typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index a2cf240..a824e491 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -65,6 +65,7 @@ struct pt_regs_offset {
 #define REG_OFFSET_END {.name = NULL, .offset = 0}
 
 #define TVSO(f)(offsetof(struct thread_vr_state, f))
+#define TFSO(f)(offsetof(struct thread_fp_state, f))
 
 static const struct pt_regs_offset regoffset_table[] = {
GPR_OFFSET_NAME(0),
@@ -1061,6 +1062,123 @@ static int tm_cvmx_set(struct task_struct *target,
 
return ret;
 }
+
+/**
+ * tm_cvsx_active - get active number of registers in CVSX
+ * @target:The target task.
+ * @regset:The user regset structure.
+ *
+ * This function checks for the active number of available
+ * regisers in transaction checkpointed VSX category.
+ */
+static int tm_cvsx_active(struct task_struct *target,
+   const struct user_regset *regset)
+{
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return 0;
+
+   flush_vsx_to_thread(target);
+   return target->thread.used_vsr ? regset->n : 0;
+}
+
+/**
+ * tm_cvsx_get - get CVSX registers
+ * @target:The target task.
+ * @regset:The user regset structure.
+ * @pos:   The buffer position.
+ * @count: Number of bytes to copy.
+ * @kbuf:  Kernel buffer to copy from.
+ * @ubuf:  User buffer to copy into.
+ *
+ * This function gets in transaction checkpointed VSX registers.
+ *
+ * When the transaction is active 'ckfp_state' holds the checkpointed
+ * values for the current transaction to fall back on if it aborts
+ * in between. This function gets those checkpointed VSX registers.
+ * The userspace interface buffer layout is as follows.
+ *
+ * struct data {
+ * u64 vsx[32];
+ *};
+ */
+static int tm_cvsx_get(struct task_struct *target,
+   const struct user_regset *regset,
+   unsigned int pos, unsigned int count,
+   void *kbuf, void __user *ubuf)
+{
+   u64 buf[32];
+   int ret, i;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   /* Flush the state */
+   flush_fp_to_thread(target);
+   flush_altivec_to_thread(target);
+   flush_tmregs_to_thread(target);
+   flush_vsx_to_thread(target);
+
+   for (i = 0; i < 32 ; i++)
+   buf[i] = target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
+   ret = user_regset_copyout(, , , ,
+ buf, 0, 32 * sizeof(double));
+
+   return ret;
+}
+
+/**
+ * tm_cvsx_set - set CFPR registers
+ * @target:The target task.
+ * 

[PATCH v11 12/27] powerpc/ptrace: Enable support for Performance Monitor registers

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch enables support for Performance monitor registers related
ELF core note NT_PPC_PMU based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding one new register sets REGSET_PMU in powerpc
corresponding to the ELF core note sections added in this
regard. It also implements the get, set and active functions
for this new register sets added.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 arch/powerpc/include/uapi/asm/elf.h |  3 +-
 arch/powerpc/kernel/ptrace.c| 75 +
 2 files changed, 77 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/uapi/asm/elf.h 
b/arch/powerpc/include/uapi/asm/elf.h
index 8c4d71a..3a9e44c 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -94,7 +94,8 @@
 #define ELF_NVMX   34  /* includes all vector registers */
 #define ELF_NVSX   32  /* includes all VSX registers */
 #define ELF_NTMSPRREG  3   /* include tfhar, tfiar, texasr */
-#define ELF_NEBB   3   /* includes ebbrr, ebbhr, bescr */
+#define ELF_NEBB   3   /* includes ebbrr, ebbhr, bescr */
+#define ELF_NPMU   5   /* includes siar, sdar, sier, mmcr2, mmcr0 */
 
 typedef unsigned long elf_greg_t64;
 typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 52c69ed..536643b 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1591,6 +1591,75 @@ static int ebb_set(struct task_struct *target,
 
return ret;
 }
+static int pmu_active(struct task_struct *target,
+const struct user_regset *regset)
+{
+   if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+   return -ENODEV;
+
+   return regset->n;
+}
+
+static int pmu_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   /* Build tests */
+   BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
+   BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
+   BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
+   BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
+
+   if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+   return -ENODEV;
+
+   return user_regset_copyout(, , , ,
+   >thread.siar, 0,
+   5 * sizeof(unsigned long));
+}
+
+static int pmu_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret = 0;
+
+   /* Build tests */
+   BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
+   BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
+   BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
+   BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
+
+   if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+   return -ENODEV;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.siar, 0,
+   sizeof(unsigned long));
+
+   if (!ret)
+   ret = user_regset_copyin(, , , ,
+   >thread.sdar, sizeof(unsigned long),
+   2 * sizeof(unsigned long));
+
+   if (!ret)
+   ret = user_regset_copyin(, , , ,
+   >thread.sier, 2 * sizeof(unsigned long),
+   3 * sizeof(unsigned long));
+
+   if (!ret)
+   ret = user_regset_copyin(, , , ,
+   >thread.mmcr2, 3 * sizeof(unsigned long),
+   4 * sizeof(unsigned long));
+
+   if (!ret)
+   ret = user_regset_copyin(, , , 

[PATCH v11 09/27] powerpc/ptrace: Enable NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch enables support for all three TM checkpointed SPR
states related ELF core note  NT_PPC_TM_CTAR, NT_PPC_TM_CPPR,
NT_PPC_TM_CDSCR based ptrace requests through PTRACE_GETREGSET,
PTRACE_SETREGSET calls. This is achieved through adding three
new register sets REGSET_TM_CTAR, REGSET_TM_CPPR and
REGSET_TM_CDSCR in powerpc corresponding to the ELF core note
sections added. It implements the get, set and active functions
for all these new register sets added.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
---
 arch/powerpc/kernel/ptrace.c | 178 +++
 1 file changed, 178 insertions(+)

diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 66bb46a..f0dcfb5 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1309,6 +1309,151 @@ static int tm_spr_set(struct task_struct *target,
 2 * sizeof(u64), 3 * sizeof(u64));
return ret;
 }
+
+static int tm_tar_active(struct task_struct *target,
+const struct user_regset *regset)
+{
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (MSR_TM_ACTIVE(target->thread.regs->msr))
+   return regset->n;
+
+   return 0;
+}
+
+static int tm_tar_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   ret = user_regset_copyout(, , , ,
+   >thread.tm_tar, 0, sizeof(u64));
+   return ret;
+}
+
+static int tm_tar_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.tm_tar, 0, sizeof(u64));
+   return ret;
+}
+
+static int tm_ppr_active(struct task_struct *target,
+const struct user_regset *regset)
+{
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (MSR_TM_ACTIVE(target->thread.regs->msr))
+   return regset->n;
+
+   return 0;
+}
+
+
+static int tm_ppr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   ret = user_regset_copyout(, , , ,
+   >thread.tm_ppr, 0, sizeof(u64));
+   return ret;
+}
+
+static int tm_ppr_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.tm_ppr, 0, sizeof(u64));
+   return ret;
+}
+
+static int tm_dscr_active(struct task_struct *target,
+const struct user_regset *regset)
+{
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (MSR_TM_ACTIVE(target->thread.regs->msr))
+   return regset->n;
+

[PATCH v11 14/27] selftests/powerpc: Use the new SPRN_DSCR_PRIV definiton

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/dscr/dscr.h | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h 
b/tools/testing/selftests/powerpc/dscr/dscr.h
index a36af1b..18ea223b 100644
--- a/tools/testing/selftests/powerpc/dscr/dscr.h
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -28,8 +28,6 @@
 
 #include "utils.h"
 
-#define SPRN_DSCR  0x11/* Privilege state SPR */
-#define SPRN_DSCR_USR  0x03/* Problem state SPR */
 #define THREADS100 /* Max threads */
 #define COUNT  100 /* Max iterations */
 #define DSCR_MAX   16  /* Max DSCR value */
@@ -48,14 +46,14 @@ inline unsigned long get_dscr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
 
return ret;
 }
 
 inline void set_dscr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
 }
 
 /* Problem state DSCR access */
@@ -63,14 +61,14 @@ inline unsigned long get_dscr_usr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
 
return ret;
 }
 
 inline void set_dscr_usr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
 }
 
 /* Default DSCR access */
-- 
1.8.3.1



[PATCH v11 10/27] powerpc/ptrace: Enable support for NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch enables support for running TAR, PPR, DSCR registers
related ELF core notes NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR based
ptrace requests through PTRACE_GETREGSET, PTRACE_SETREGSET calls.
This is achieved through adding three new register sets REGSET_TAR,
REGSET_PPR, REGSET_DSCR in powerpc corresponding to the ELF core
note sections added in this regad. It implements the get, set and
active functions for all these new register sets added.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
---
 arch/powerpc/kernel/ptrace.c | 117 +++
 1 file changed, 117 insertions(+)

diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index f0dcfb5..1a091db 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1456,6 +1456,78 @@ static int tm_dscr_set(struct task_struct *target,
 }
 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 
+#ifdef CONFIG_PPC64
+static int ppr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyout(, , , ,
+   >thread.ppr, 0, sizeof(u64));
+   return ret;
+}
+
+static int ppr_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.ppr, 0, sizeof(u64));
+   return ret;
+}
+
+static int dscr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyout(, , , ,
+   >thread.dscr, 0, sizeof(u64));
+   return ret;
+}
+static int dscr_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.dscr, 0, sizeof(u64));
+   return ret;
+}
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
+static int tar_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyout(, , , ,
+   >thread.tar, 0, sizeof(u64));
+   return ret;
+}
+static int tar_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.tar, 0, sizeof(u64));
+   return ret;
+}
+#endif
 /*
  * These are our native regset flavors.
  */
@@ -1481,6 +1553,13 @@ enum powerpc_regset {
REGSET_TM_CPPR, /* TM checkpointed PPR register */
REGSET_TM_CDSCR,/* TM checkpointed DSCR register */
 #endif
+#ifdef CONFIG_PPC64
+   REGSET_PPR, /* PPR register */
+   REGSET_DSCR,/* DSCR register */
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
+   REGSET_TAR, /* TAR register */
+#endif
 };
 
 static const struct user_regset native_regsets[] = {
@@ -1557,6 +1636,25 @@ static const struct user_regset native_regsets[] = {
.active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
},
 #endif
+#ifdef CONFIG_PPC64
+   [REGSET_PPR] = {
+   .core_note_type = NT_PPC_PPR, .n = 1,
+   .size = sizeof(u64), .align = sizeof(u64),
+   .get = ppr_get, .set = ppr_set
+   },
+   [REGSET_DSCR] = {
+   .core_note_type = NT_PPC_DSCR, .n = 1,
+   .size = sizeof(u64), .align = sizeof(u64),
+   .get = dscr_get, .set = dscr_set
+   },
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
+   [REGSET_TAR] = {
+   .core_note_type = NT_PPC_TAR, .n = 1,
+   .size = sizeof(u64), .align = sizeof(u64),
+  

[PATCH v11 07/27] powerpc/ptrace: Enable support for NT_PPC_CVSX

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch enables support for TM checkpointed VSX register
set ELF core note NT_PPC_CVSX based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding a register set REGSET_CVSX in powerpc
corresponding to the ELF core note section added. It
implements the get, set and active functions for this new
register set added.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 arch/powerpc/include/uapi/asm/elf.h |   1 +
 arch/powerpc/kernel/ptrace.c| 129 
 2 files changed, 130 insertions(+)

diff --git a/arch/powerpc/include/uapi/asm/elf.h 
b/arch/powerpc/include/uapi/asm/elf.h
index ecb4e84..1549172 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -92,6 +92,7 @@
 #define ELF_NGREG  48  /* includes nip, msr, lr, etc. */
 #define ELF_NFPREG 33  /* includes fpscr */
 #define ELF_NVMX   34  /* includes all vector registers */
+#define ELF_NVSX   32  /* includes all VSX registers */
 
 typedef unsigned long elf_greg_t64;
 typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index a2cf240..a824e491 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -65,6 +65,7 @@ struct pt_regs_offset {
 #define REG_OFFSET_END {.name = NULL, .offset = 0}
 
 #define TVSO(f)(offsetof(struct thread_vr_state, f))
+#define TFSO(f)(offsetof(struct thread_fp_state, f))
 
 static const struct pt_regs_offset regoffset_table[] = {
GPR_OFFSET_NAME(0),
@@ -1061,6 +1062,123 @@ static int tm_cvmx_set(struct task_struct *target,
 
return ret;
 }
+
+/**
+ * tm_cvsx_active - get active number of registers in CVSX
+ * @target:The target task.
+ * @regset:The user regset structure.
+ *
+ * This function checks for the active number of available
+ * regisers in transaction checkpointed VSX category.
+ */
+static int tm_cvsx_active(struct task_struct *target,
+   const struct user_regset *regset)
+{
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return 0;
+
+   flush_vsx_to_thread(target);
+   return target->thread.used_vsr ? regset->n : 0;
+}
+
+/**
+ * tm_cvsx_get - get CVSX registers
+ * @target:The target task.
+ * @regset:The user regset structure.
+ * @pos:   The buffer position.
+ * @count: Number of bytes to copy.
+ * @kbuf:  Kernel buffer to copy from.
+ * @ubuf:  User buffer to copy into.
+ *
+ * This function gets in transaction checkpointed VSX registers.
+ *
+ * When the transaction is active 'ckfp_state' holds the checkpointed
+ * values for the current transaction to fall back on if it aborts
+ * in between. This function gets those checkpointed VSX registers.
+ * The userspace interface buffer layout is as follows.
+ *
+ * struct data {
+ * u64 vsx[32];
+ *};
+ */
+static int tm_cvsx_get(struct task_struct *target,
+   const struct user_regset *regset,
+   unsigned int pos, unsigned int count,
+   void *kbuf, void __user *ubuf)
+{
+   u64 buf[32];
+   int ret, i;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   /* Flush the state */
+   flush_fp_to_thread(target);
+   flush_altivec_to_thread(target);
+   flush_tmregs_to_thread(target);
+   flush_vsx_to_thread(target);
+
+   for (i = 0; i < 32 ; i++)
+   buf[i] = target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
+   ret = user_regset_copyout(, , , ,
+ buf, 0, 32 * sizeof(double));
+
+   return ret;
+}
+
+/**
+ * tm_cvsx_set - set CFPR registers
+ * @target:The target task.
+ * @regset:The user regset structure.
+ * @pos:   The buffer position.
+ * @count: Number of bytes to copy.
+ * @kbuf:  Kernel buffer to copy into.
+ * @ubuf:  User buffer to copy from.
+ *
+ * This function sets in transaction checkpointed VSX registers.
+ *
+ * When the transaction is active 'fp_state' holds the checkpointed
+ * VSX register values for the current transaction to fall back on
+ * if it aborts in between. This function sets these checkpointed
+ * FPR registers. 

[PATCH v11 12/27] powerpc/ptrace: Enable support for Performance Monitor registers

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch enables support for Performance monitor registers related
ELF core note NT_PPC_PMU based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding one new register sets REGSET_PMU in powerpc
corresponding to the ELF core note sections added in this
regard. It also implements the get, set and active functions
for this new register sets added.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 arch/powerpc/include/uapi/asm/elf.h |  3 +-
 arch/powerpc/kernel/ptrace.c| 75 +
 2 files changed, 77 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/uapi/asm/elf.h 
b/arch/powerpc/include/uapi/asm/elf.h
index 8c4d71a..3a9e44c 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -94,7 +94,8 @@
 #define ELF_NVMX   34  /* includes all vector registers */
 #define ELF_NVSX   32  /* includes all VSX registers */
 #define ELF_NTMSPRREG  3   /* include tfhar, tfiar, texasr */
-#define ELF_NEBB   3   /* includes ebbrr, ebbhr, bescr */
+#define ELF_NEBB   3   /* includes ebbrr, ebbhr, bescr */
+#define ELF_NPMU   5   /* includes siar, sdar, sier, mmcr2, mmcr0 */
 
 typedef unsigned long elf_greg_t64;
 typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 52c69ed..536643b 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1591,6 +1591,75 @@ static int ebb_set(struct task_struct *target,
 
return ret;
 }
+static int pmu_active(struct task_struct *target,
+const struct user_regset *regset)
+{
+   if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+   return -ENODEV;
+
+   return regset->n;
+}
+
+static int pmu_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   /* Build tests */
+   BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
+   BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
+   BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
+   BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
+
+   if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+   return -ENODEV;
+
+   return user_regset_copyout(, , , ,
+   >thread.siar, 0,
+   5 * sizeof(unsigned long));
+}
+
+static int pmu_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret = 0;
+
+   /* Build tests */
+   BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
+   BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
+   BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
+   BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
+
+   if (!cpu_has_feature(CPU_FTR_ARCH_207S))
+   return -ENODEV;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.siar, 0,
+   sizeof(unsigned long));
+
+   if (!ret)
+   ret = user_regset_copyin(, , , ,
+   >thread.sdar, sizeof(unsigned long),
+   2 * sizeof(unsigned long));
+
+   if (!ret)
+   ret = user_regset_copyin(, , , ,
+   >thread.sier, 2 * sizeof(unsigned long),
+   3 * sizeof(unsigned long));
+
+   if (!ret)
+   ret = user_regset_copyin(, , , ,
+   >thread.mmcr2, 3 * sizeof(unsigned long),
+   4 * sizeof(unsigned long));
+
+   if (!ret)
+   ret = user_regset_copyin(, , , ,
+   >thread.mmcr0, 4 * sizeof(unsigned long),
+   5 * sizeof(unsigned long));
+   return ret;
+}
 #endif
 /*
  * These are our native regset flavors.
@@ -1624,6 +1693,7 @@ enum powerpc_regset {
 #ifdef CONFIG_PPC_BOOK3S_64
REGSET_TAR, /* TAR register */
REGSET_EBB, /* EBB registers */
+   REGSET_PMR, /* Performance Monitor Registers */
 #endif
 };
 
@@ -1724,6 +1794,11 @@ static const struct 

[PATCH v11 09/27] powerpc/ptrace: Enable NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

This patch enables support for all three TM checkpointed SPR
states related ELF core note  NT_PPC_TM_CTAR, NT_PPC_TM_CPPR,
NT_PPC_TM_CDSCR based ptrace requests through PTRACE_GETREGSET,
PTRACE_SETREGSET calls. This is achieved through adding three
new register sets REGSET_TM_CTAR, REGSET_TM_CPPR and
REGSET_TM_CDSCR in powerpc corresponding to the ELF core note
sections added. It implements the get, set and active functions
for all these new register sets added.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
---
 arch/powerpc/kernel/ptrace.c | 178 +++
 1 file changed, 178 insertions(+)

diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 66bb46a..f0dcfb5 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1309,6 +1309,151 @@ static int tm_spr_set(struct task_struct *target,
 2 * sizeof(u64), 3 * sizeof(u64));
return ret;
 }
+
+static int tm_tar_active(struct task_struct *target,
+const struct user_regset *regset)
+{
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (MSR_TM_ACTIVE(target->thread.regs->msr))
+   return regset->n;
+
+   return 0;
+}
+
+static int tm_tar_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   ret = user_regset_copyout(, , , ,
+   >thread.tm_tar, 0, sizeof(u64));
+   return ret;
+}
+
+static int tm_tar_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.tm_tar, 0, sizeof(u64));
+   return ret;
+}
+
+static int tm_ppr_active(struct task_struct *target,
+const struct user_regset *regset)
+{
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (MSR_TM_ACTIVE(target->thread.regs->msr))
+   return regset->n;
+
+   return 0;
+}
+
+
+static int tm_ppr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   ret = user_regset_copyout(, , , ,
+   >thread.tm_ppr, 0, sizeof(u64));
+   return ret;
+}
+
+static int tm_ppr_set(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   ret = user_regset_copyin(, , , ,
+   >thread.tm_ppr, 0, sizeof(u64));
+   return ret;
+}
+
+static int tm_dscr_active(struct task_struct *target,
+const struct user_regset *regset)
+{
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (MSR_TM_ACTIVE(target->thread.regs->msr))
+   return regset->n;
+
+   return 0;
+}
+
+static int tm_dscr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+   int ret;
+
+   if (!cpu_has_feature(CPU_FTR_TM))
+   return -ENODEV;
+
+   if (!MSR_TM_ACTIVE(target->thread.regs->msr))
+   return -ENODATA;
+
+   ret = user_regset_copyout(, , , ,

[PATCH v11 14/27] selftests/powerpc: Use the new SPRN_DSCR_PRIV definiton

2016-07-16 Thread wei . guo . simon
From: Anshuman Khandual 

Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: Shuah Khan 
Cc: Anton Blanchard 
Cc: Cyril Bur 
Cc: Anshuman Khandual 
Cc: Simon Guo 
Cc: Ulrich Weigand 
Cc: Michael Neuling 
Cc: Andrew Morton 
Cc: Kees Cook 
Cc: Rashmica Gupta 
Cc: Khem Raj 
Cc: Jessica Yu 
Cc: Jiri Kosina 
Cc: Miroslav Benes 
Cc: Suraj Jitindar Singh 
Cc: Chris Smart 
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Anshuman Khandual 
Signed-off-by: Simon Guo 
---
 tools/testing/selftests/powerpc/dscr/dscr.h | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h 
b/tools/testing/selftests/powerpc/dscr/dscr.h
index a36af1b..18ea223b 100644
--- a/tools/testing/selftests/powerpc/dscr/dscr.h
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -28,8 +28,6 @@
 
 #include "utils.h"
 
-#define SPRN_DSCR  0x11/* Privilege state SPR */
-#define SPRN_DSCR_USR  0x03/* Problem state SPR */
 #define THREADS100 /* Max threads */
 #define COUNT  100 /* Max iterations */
 #define DSCR_MAX   16  /* Max DSCR value */
@@ -48,14 +46,14 @@ inline unsigned long get_dscr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
 
return ret;
 }
 
 inline void set_dscr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
 }
 
 /* Problem state DSCR access */
@@ -63,14 +61,14 @@ inline unsigned long get_dscr_usr(void)
 {
unsigned long ret;
 
-   asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR));
+   asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
 
return ret;
 }
 
 inline void set_dscr_usr(unsigned long val)
 {
-   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR));
+   asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
 }
 
 /* Default DSCR access */
-- 
1.8.3.1



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