[PATCH BUGFIX] block, bfq: update wr_busy_queues if needed on a queue split

[Paolo Valente]

This commit fixes a bug triggered by a non-trivial sequence of
events. These events are briefly described in the next two
paragraphs. The impatiens, or those who are familiar with queue
merging and splitting, can jump directly to the last paragraph.

On each I/O-request arrival for a shared bfq_queue, i.e., for a
bfq_queue that is the result of the merge of two or more bfq_queues,
BFQ checks whether the shared bfq_queue has become seeky (i.e., if too
many random I/O requests have arrived for the bfq_queue; if the device
is non rotational, then random requests must be also small for the
bfq_queue to be tagged as seeky). If the shared bfq_queue is actually
detected as seeky, then a split occurs: the bfq I/O context of the
process that has issued the request is redirected from the shared
bfq_queue to a new non-shared bfq_queue. As a degenerate case, if the
shared bfq_queue actually happens to be shared only by one process
(because of previous splits), then no new bfq_queue is created: the
state of the shared bfq_queue is just changed from shared to non
shared.

Regardless of whether a brand new non-shared bfq_queue is created, or
the pre-existing shared bfq_queue is just turned into a non-shared
bfq_queue, several parameters of the non-shared bfq_queue are set
(restored) to the original values they had when the bfq_queue
associated with the bfq I/O context of the process (that has just
issued an I/O request) was merged with the shared bfq_queue. One of
these parameters is the weight-raising state.

If, on the split of a shared bfq_queue,
1) a pre-existing shared bfq_queue is turned into a non-shared
bfq_queue;
2) the previously shared bfq_queue happens to be busy;
3) the weight-raising state of the previously shared bfq_queue happens
to change;
the number of weight-raised busy queues changes. The field
wr_busy_queues must then be updated accordingly, but such an update
was missing. This commit adds the missing update.

Reported-by: Luca Miccio 
Signed-off-by: Paolo Valente 
---
 block/bfq-iosched.c | 24 +---
 1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/block/bfq-iosched.c b/block/bfq-iosched.c
index ed93da2..4731cfb 100644
--- a/block/bfq-iosched.c
+++ b/block/bfq-iosched.c
@@ -725,8 +725,12 @@ static void bfq_updated_next_req(struct bfq_data *bfqd,
 }
 
 static void
-bfq_bfqq_resume_state(struct bfq_queue *bfqq, struct bfq_io_cq *bic)
+bfq_bfqq_resume_state(struct bfq_queue *bfqq, struct bfq_data *bfqd,
+ struct bfq_io_cq *bic, bool bfq_already_existing)
 {
+   unsigned int old_wr_coeff;
+   bool busy = bfq_already_existing && bfq_bfqq_busy(bfqq);
+
if (bic->saved_idle_window)
bfq_mark_bfqq_idle_window(bfqq);
else
@@ -737,6 +741,9 @@ bfq_bfqq_resume_state(struct bfq_queue *bfqq, struct 
bfq_io_cq *bic)
else
bfq_clear_bfqq_IO_bound(bfqq);
 
+   if (unlikely(busy))
+   old_wr_coeff = bfqq->wr_coeff;
+
bfqq->ttime = bic->saved_ttime;
bfqq->wr_coeff = bic->saved_wr_coeff;
bfqq->wr_start_at_switch_to_srt = bic->saved_wr_start_at_switch_to_srt;
@@ -754,6 +761,14 @@ bfq_bfqq_resume_state(struct bfq_queue *bfqq, struct 
bfq_io_cq *bic)
 
/* make sure weight will be updated, however we got here */
bfqq->entity.prio_changed = 1;
+
+   if (likely(!busy))
+   return;
+
+   if (old_wr_coeff == 1 && bfqq->wr_coeff > 1)
+   bfqd->wr_busy_queues++;
+   else if (old_wr_coeff > 1 && bfqq->wr_coeff == 1)
+   bfqd->wr_busy_queues--;
 }
 
 static int bfqq_process_refs(struct bfq_queue *bfqq)
@@ -4402,7 +4417,7 @@ static int bfq_get_rq_private(struct request_queue *q, 
struct request *rq,
const int is_sync = rq_is_sync(rq);
struct bfq_queue *bfqq;
bool new_queue = false;
-   bool split = false;
+   bool bfqq_already_existing = false, split = false;
 
spin_lock_irq(>lock);
 
@@ -4432,6 +4447,8 @@ static int bfq_get_rq_private(struct request_queue *q, 
struct request *rq,
bfqq = bfq_get_bfqq_handle_split(bfqd, bic, bio,
 true, is_sync,
 NULL);
+   else
+   bfqq_already_existing = true;
}
}
 
@@ -4457,7 +4474,8 @@ static int bfq_get_rq_private(struct request_queue *q, 
struct request *rq,
 * queue: restore the idle window and the
 * possible weight raising period.
 */
-   bfq_bfqq_resume_state(bfqq, bic);
+   bfq_bfqq_resume_state(bfqq, bfqd, bic,
+ bfqq_already_existing);
}
}
 
-- 
2.10.0

[PATCH BUGFIX] block, bfq: update wr_busy_queues if needed on a queue split

[Paolo Valente]

This commit fixes a bug triggered by a non-trivial sequence of
events. These events are briefly described in the next two
paragraphs. The impatiens, or those who are familiar with queue
merging and splitting, can jump directly to the last paragraph.

On each I/O-request arrival for a shared bfq_queue, i.e., for a
bfq_queue that is the result of the merge of two or more bfq_queues,
BFQ checks whether the shared bfq_queue has become seeky (i.e., if too
many random I/O requests have arrived for the bfq_queue; if the device
is non rotational, then random requests must be also small for the
bfq_queue to be tagged as seeky). If the shared bfq_queue is actually
detected as seeky, then a split occurs: the bfq I/O context of the
process that has issued the request is redirected from the shared
bfq_queue to a new non-shared bfq_queue. As a degenerate case, if the
shared bfq_queue actually happens to be shared only by one process
(because of previous splits), then no new bfq_queue is created: the
state of the shared bfq_queue is just changed from shared to non
shared.

Regardless of whether a brand new non-shared bfq_queue is created, or
the pre-existing shared bfq_queue is just turned into a non-shared
bfq_queue, several parameters of the non-shared bfq_queue are set
(restored) to the original values they had when the bfq_queue
associated with the bfq I/O context of the process (that has just
issued an I/O request) was merged with the shared bfq_queue. One of
these parameters is the weight-raising state.

If, on the split of a shared bfq_queue,
1) a pre-existing shared bfq_queue is turned into a non-shared
bfq_queue;
2) the previously shared bfq_queue happens to be busy;
3) the weight-raising state of the previously shared bfq_queue happens
to change;
the number of weight-raised busy queues changes. The field
wr_busy_queues must then be updated accordingly, but such an update
was missing. This commit adds the missing update.

Reported-by: Luca Miccio 
Signed-off-by: Paolo Valente 
---
 block/bfq-iosched.c | 24 +---
 1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/block/bfq-iosched.c b/block/bfq-iosched.c
index ed93da2..4731cfb 100644
--- a/block/bfq-iosched.c
+++ b/block/bfq-iosched.c
@@ -725,8 +725,12 @@ static void bfq_updated_next_req(struct bfq_data *bfqd,
 }
 
 static void
-bfq_bfqq_resume_state(struct bfq_queue *bfqq, struct bfq_io_cq *bic)
+bfq_bfqq_resume_state(struct bfq_queue *bfqq, struct bfq_data *bfqd,
+ struct bfq_io_cq *bic, bool bfq_already_existing)
 {
+   unsigned int old_wr_coeff;
+   bool busy = bfq_already_existing && bfq_bfqq_busy(bfqq);
+
if (bic->saved_idle_window)
bfq_mark_bfqq_idle_window(bfqq);
else
@@ -737,6 +741,9 @@ bfq_bfqq_resume_state(struct bfq_queue *bfqq, struct 
bfq_io_cq *bic)
else
bfq_clear_bfqq_IO_bound(bfqq);
 
+   if (unlikely(busy))
+   old_wr_coeff = bfqq->wr_coeff;
+
bfqq->ttime = bic->saved_ttime;
bfqq->wr_coeff = bic->saved_wr_coeff;
bfqq->wr_start_at_switch_to_srt = bic->saved_wr_start_at_switch_to_srt;
@@ -754,6 +761,14 @@ bfq_bfqq_resume_state(struct bfq_queue *bfqq, struct 
bfq_io_cq *bic)
 
/* make sure weight will be updated, however we got here */
bfqq->entity.prio_changed = 1;
+
+   if (likely(!busy))
+   return;
+
+   if (old_wr_coeff == 1 && bfqq->wr_coeff > 1)
+   bfqd->wr_busy_queues++;
+   else if (old_wr_coeff > 1 && bfqq->wr_coeff == 1)
+   bfqd->wr_busy_queues--;
 }
 
 static int bfqq_process_refs(struct bfq_queue *bfqq)
@@ -4402,7 +4417,7 @@ static int bfq_get_rq_private(struct request_queue *q, 
struct request *rq,
const int is_sync = rq_is_sync(rq);
struct bfq_queue *bfqq;
bool new_queue = false;
-   bool split = false;
+   bool bfqq_already_existing = false, split = false;
 
spin_lock_irq(>lock);
 
@@ -4432,6 +4447,8 @@ static int bfq_get_rq_private(struct request_queue *q, 
struct request *rq,
bfqq = bfq_get_bfqq_handle_split(bfqd, bic, bio,
 true, is_sync,
 NULL);
+   else
+   bfqq_already_existing = true;
}
}
 
@@ -4457,7 +4474,8 @@ static int bfq_get_rq_private(struct request_queue *q, 
struct request *rq,
 * queue: restore the idle window and the
 * possible weight raising period.
 */
-   bfq_bfqq_resume_state(bfqq, bic);
+   bfq_bfqq_resume_state(bfqq, bfqd, bic,
+ bfqq_already_existing);
}
}
 
-- 
2.10.0

[PATCH v2] soc: ti: knav_dma: make of_device_ids const.

[Arvind Yadav]

of_device_ids are not supposed to change at runtime. All functions
working with of_device_ids provided by  work with const
of_device_ids. So mark the non-const structs as const.

File size before:
   textdata bss dec hex filename
   2234 608   82850 b22 drivers/soc/ti/knav_dma.o

File size after constify keystone_qmss_of_match.
   textdata bss dec hex filename
   2650 192   82850 b22 drivers/soc/ti/knav_dma.o

Signed-off-by: Arvind Yadav 
---
Changes in v1:
  Subject was wrong. It should be constify of_match.

 drivers/soc/ti/knav_dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/ti/knav_dma.c b/drivers/soc/ti/knav_dma.c
index ecebe2e..c8d1e3c 100644
--- a/drivers/soc/ti/knav_dma.c
+++ b/drivers/soc/ti/knav_dma.c
@@ -791,7 +791,7 @@ static int knav_dma_remove(struct platform_device *pdev)
return 0;
 }
 
-static struct of_device_id of_match[] = {
+static const struct of_device_id of_match[] = {
{ .compatible = "ti,keystone-navigator-dma", },
{},
 };
-- 
1.9.1

Re: [PATCHv2 1/3] x86/mm: Provide pmdp_establish() helper

[Martin Schwidefsky]

On Thu, 15 Jun 2017 17:52:22 +0300
"Kirill A. Shutemov"  wrote:

> We need an atomic way to setup pmd page table entry, avoiding races with
> CPU setting dirty/accessed bits. This is required to implement
> pmdp_invalidate() that doesn't loose these bits.
> 
> On PAE we have to use cmpxchg8b as we cannot assume what is value of new pmd 
> and
> setting it up half-by-half can expose broken corrupted entry to CPU.
> 
> Signed-off-by: Kirill A. Shutemov 
> Cc: Ingo Molnar 
> Cc: H. Peter Anvin 
> Cc: Thomas Gleixner 
> ---
>  arch/x86/include/asm/pgtable-3level.h | 18 ++
>  arch/x86/include/asm/pgtable.h| 14 ++
>  2 files changed, 32 insertions(+)
> 
> diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
> index f5af95a0c6b8..a924fc6a96b9 100644
> --- a/arch/x86/include/asm/pgtable.h
> +++ b/arch/x86/include/asm/pgtable.h
> @@ -1092,6 +1092,20 @@ static inline void pmdp_set_wrprotect(struct mm_struct 
> *mm,
>   clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
>  }
> 
> +#ifndef pmdp_establish
> +#define pmdp_establish pmdp_establish
> +static inline pmd_t pmdp_establish(pmd_t *pmdp, pmd_t pmd)
> +{
> + if (IS_ENABLED(CONFIG_SMP)) {
> + return xchg(pmdp, pmd);
> + } else {
> + pmd_t old = *pmdp;
> + *pmdp = pmd;
> + return old;
> + }
> +}
> +#endif
> +
>  /*
>   * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
>   *

For the s390 version of the pmdp_establish function we need the mm to be able
to do the TLB flush correctly. Can we please add a "struct vm_area_struct *vma"
argument to pmdp_establish analog to pmdp_invalidate?

The s390 patch would then look like this:
--
>From 4d4641249d5e826c21c522d149553e89d73fcd4f Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky 
Date: Mon, 19 Jun 2017 07:40:11 +0200
Subject: [PATCH] s390/mm: add pmdp_establish

Define the pmdp_establish function to replace a pmd entry with a new
one and return the old value.

Signed-off-by: Martin Schwidefsky 
---
 arch/s390/include/asm/pgtable.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index bb59a0aa3249..dedeecd5455c 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -1511,6 +1511,13 @@ static inline void pmdp_invalidate(struct vm_area_struct 
*vma,
pmdp_xchg_direct(vma->vm_mm, addr, pmdp, __pmd(_SEGMENT_ENTRY_EMPTY));
 }
 
+static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
+  pmd_t *pmdp, pmd_t pmd)
+{
+   return pmdp_xchg_direct(vma->vm_mm, addr, pmdp, pmd);
+}
+#define pmdp_establish pmdp_establish
+
 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
  unsigned long addr, pmd_t *pmdp)
-- 
2.11.2


-- 
blue skies,
   Martin.

"Reality continues to ruin my life." - Calvin.

[PATCH v2] soc: ti: knav_dma: make of_device_ids const.

[Arvind Yadav]

of_device_ids are not supposed to change at runtime. All functions
working with of_device_ids provided by  work with const
of_device_ids. So mark the non-const structs as const.

File size before:
   textdata bss dec hex filename
   2234 608   82850 b22 drivers/soc/ti/knav_dma.o

File size after constify keystone_qmss_of_match.
   textdata bss dec hex filename
   2650 192   82850 b22 drivers/soc/ti/knav_dma.o

Signed-off-by: Arvind Yadav 
---
Changes in v1:
  Subject was wrong. It should be constify of_match.

 drivers/soc/ti/knav_dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/ti/knav_dma.c b/drivers/soc/ti/knav_dma.c
index ecebe2e..c8d1e3c 100644
--- a/drivers/soc/ti/knav_dma.c
+++ b/drivers/soc/ti/knav_dma.c
@@ -791,7 +791,7 @@ static int knav_dma_remove(struct platform_device *pdev)
return 0;
 }
 
-static struct of_device_id of_match[] = {
+static const struct of_device_id of_match[] = {
{ .compatible = "ti,keystone-navigator-dma", },
{},
 };
-- 
1.9.1

Re: [PATCHv2 1/3] x86/mm: Provide pmdp_establish() helper

[Martin Schwidefsky]

On Thu, 15 Jun 2017 17:52:22 +0300
"Kirill A. Shutemov"  wrote:

> We need an atomic way to setup pmd page table entry, avoiding races with
> CPU setting dirty/accessed bits. This is required to implement
> pmdp_invalidate() that doesn't loose these bits.
> 
> On PAE we have to use cmpxchg8b as we cannot assume what is value of new pmd 
> and
> setting it up half-by-half can expose broken corrupted entry to CPU.
> 
> Signed-off-by: Kirill A. Shutemov 
> Cc: Ingo Molnar 
> Cc: H. Peter Anvin 
> Cc: Thomas Gleixner 
> ---
>  arch/x86/include/asm/pgtable-3level.h | 18 ++
>  arch/x86/include/asm/pgtable.h| 14 ++
>  2 files changed, 32 insertions(+)
> 
> diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
> index f5af95a0c6b8..a924fc6a96b9 100644
> --- a/arch/x86/include/asm/pgtable.h
> +++ b/arch/x86/include/asm/pgtable.h
> @@ -1092,6 +1092,20 @@ static inline void pmdp_set_wrprotect(struct mm_struct 
> *mm,
>   clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
>  }
> 
> +#ifndef pmdp_establish
> +#define pmdp_establish pmdp_establish
> +static inline pmd_t pmdp_establish(pmd_t *pmdp, pmd_t pmd)
> +{
> + if (IS_ENABLED(CONFIG_SMP)) {
> + return xchg(pmdp, pmd);
> + } else {
> + pmd_t old = *pmdp;
> + *pmdp = pmd;
> + return old;
> + }
> +}
> +#endif
> +
>  /*
>   * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
>   *

For the s390 version of the pmdp_establish function we need the mm to be able
to do the TLB flush correctly. Can we please add a "struct vm_area_struct *vma"
argument to pmdp_establish analog to pmdp_invalidate?

The s390 patch would then look like this:
--
>From 4d4641249d5e826c21c522d149553e89d73fcd4f Mon Sep 17 00:00:00 2001
From: Martin Schwidefsky 
Date: Mon, 19 Jun 2017 07:40:11 +0200
Subject: [PATCH] s390/mm: add pmdp_establish

Define the pmdp_establish function to replace a pmd entry with a new
one and return the old value.

Signed-off-by: Martin Schwidefsky 
---
 arch/s390/include/asm/pgtable.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index bb59a0aa3249..dedeecd5455c 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -1511,6 +1511,13 @@ static inline void pmdp_invalidate(struct vm_area_struct 
*vma,
pmdp_xchg_direct(vma->vm_mm, addr, pmdp, __pmd(_SEGMENT_ENTRY_EMPTY));
 }
 
+static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
+  pmd_t *pmdp, pmd_t pmd)
+{
+   return pmdp_xchg_direct(vma->vm_mm, addr, pmdp, pmd);
+}
+#define pmdp_establish pmdp_establish
+
 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
  unsigned long addr, pmd_t *pmdp)
-- 
2.11.2


-- 
blue skies,
   Martin.

"Reality continues to ruin my life." - Calvin.

[PATCH v2] macintosh: rack-meter: make of_device_ids const.

[Arvind Yadav]

of_device_ids are not supposed to change at runtime. All functions
working with of_device_ids provided by  work with const
of_device_ids. So mark the non-const structs as const.

File size before:
   textdata bss dec hex filename
407 576   0 983 3d7 drivers/macintosh/rack-meter.o

File size after constify rackmeter_match.
   textdata bss dec hex filename
807 176   0 983 3d7 drivers/macintosh/rack-meter.o

Signed-off-by: Arvind Yadav 
---
Changes in v1:
  Subject was wrong. It should be constify rackmeter_match.

 drivers/macintosh/rack-meter.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/macintosh/rack-meter.c b/drivers/macintosh/rack-meter.c
index e199fd6..35582eb 100644
--- a/drivers/macintosh/rack-meter.c
+++ b/drivers/macintosh/rack-meter.c
@@ -579,7 +579,7 @@ static int rackmeter_shutdown(struct macio_dev* mdev)
return 0;
 }
 
-static struct of_device_id rackmeter_match[] = {
+static const struct of_device_id rackmeter_match[] = {
{ .name = "i2s" },
{ }
 };
-- 
1.9.1

[PATCH v2] macintosh: rack-meter: make of_device_ids const.

[Arvind Yadav]

of_device_ids are not supposed to change at runtime. All functions
working with of_device_ids provided by  work with const
of_device_ids. So mark the non-const structs as const.

File size before:
   textdata bss dec hex filename
407 576   0 983 3d7 drivers/macintosh/rack-meter.o

File size after constify rackmeter_match.
   textdata bss dec hex filename
807 176   0 983 3d7 drivers/macintosh/rack-meter.o

Signed-off-by: Arvind Yadav 
---
Changes in v1:
  Subject was wrong. It should be constify rackmeter_match.

 drivers/macintosh/rack-meter.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/macintosh/rack-meter.c b/drivers/macintosh/rack-meter.c
index e199fd6..35582eb 100644
--- a/drivers/macintosh/rack-meter.c
+++ b/drivers/macintosh/rack-meter.c
@@ -579,7 +579,7 @@ static int rackmeter_shutdown(struct macio_dev* mdev)
return 0;
 }
 
-static struct of_device_id rackmeter_match[] = {
+static const struct of_device_id rackmeter_match[] = {
{ .name = "i2s" },
{ }
 };
-- 
1.9.1

Re: [PATCH v2 1/2] ip_tunnel: fix ip tunnel lookup in collect_md mode

[Pravin Shelar]

On Fri, Jun 16, 2017 at 8:27 PM, Haishuang Yan
 wrote:
> In collect_md mode, if the tun dev is down, it still can call
> ip_tunnel_rcv to receive on packets, and the rx statistics increase
> improperly.
>
> Fixes: 2e15ea390e6f ("ip_gre: Add support to collect tunnel metadata.")
> Cc: Pravin B Shelar 
> Signed-off-by: Haishuang Yan 
>
> ---
> Change since v2:
>   * Fix wrong recipient addresss
> ---
>  net/ipv4/ip_tunnel.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/net/ipv4/ip_tunnel.c b/net/ipv4/ip_tunnel.c
> index 0f1d876..a3caba1 100644
> --- a/net/ipv4/ip_tunnel.c
> +++ b/net/ipv4/ip_tunnel.c
> @@ -176,7 +176,7 @@ struct ip_tunnel *ip_tunnel_lookup(struct ip_tunnel_net 
> *itn,
> return cand;
>
> t = rcu_dereference(itn->collect_md_tun);
> -   if (t)
> +   if (t && (t->dev->flags & IFF_UP))
> return t;
>
It would be nice if we could increment drop count if tunnel device is not up.

Re: [PATCH v2 1/2] ip_tunnel: fix ip tunnel lookup in collect_md mode

[Pravin Shelar]

On Fri, Jun 16, 2017 at 8:27 PM, Haishuang Yan
 wrote:
> In collect_md mode, if the tun dev is down, it still can call
> ip_tunnel_rcv to receive on packets, and the rx statistics increase
> improperly.
>
> Fixes: 2e15ea390e6f ("ip_gre: Add support to collect tunnel metadata.")
> Cc: Pravin B Shelar 
> Signed-off-by: Haishuang Yan 
>
> ---
> Change since v2:
>   * Fix wrong recipient addresss
> ---
>  net/ipv4/ip_tunnel.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/net/ipv4/ip_tunnel.c b/net/ipv4/ip_tunnel.c
> index 0f1d876..a3caba1 100644
> --- a/net/ipv4/ip_tunnel.c
> +++ b/net/ipv4/ip_tunnel.c
> @@ -176,7 +176,7 @@ struct ip_tunnel *ip_tunnel_lookup(struct ip_tunnel_net 
> *itn,
> return cand;
>
> t = rcu_dereference(itn->collect_md_tun);
> -   if (t)
> +   if (t && (t->dev->flags & IFF_UP))
> return t;
>
It would be nice if we could increment drop count if tunnel device is not up.

Re: [patch v2 2/3] staging: speakup: check and convert dev name or ser to dev_t

[Greg Kroah-Hartman]

On Sun, Jun 18, 2017 at 10:33:35PM -0700, Joe Perches wrote:
> On Mon, 2017-06-19 at 09:15 +0800, Greg Kroah-Hartman wrote:
> > On Sun, Jun 18, 2017 at 09:58:27AM +0100, Okash Khawaja wrote:
> > > This patch adds functionality to validate and convert either a device
> > > name or 'ser' member of synth into dev_t.
> []
> > > --- a/drivers/staging/speakup/spk_ttyio.c
> []
> > > +int ser_to_dev(int ser, dev_t *dev_no)
> > > +{
> > > + if (ser < 0 || ser > (255 - 64)) {
> > > +pr_err("speakup: Invalid ser param. \
> > > + Must be between 0 and 191 inclusive.\n");
> > 
> > As Andy pointed out, never do this for a C string, it's not doing what
> > you think it is :)
> 
> Well, some guy.
> 
> > Worse case, do this like the following:
> > pr_err("speakup: Invalid ser param."
> > "Must be between 0 and 191 inclusive.\n");
> 
> Nope, now there's no space between param and Must.
> 
> Using string concatenation on multiple lines is error prone.

Ah, yes it is, see, I messed it up!  :)

Re: [patch v2 2/3] staging: speakup: check and convert dev name or ser to dev_t

[Greg Kroah-Hartman]

On Sun, Jun 18, 2017 at 10:33:35PM -0700, Joe Perches wrote:
> On Mon, 2017-06-19 at 09:15 +0800, Greg Kroah-Hartman wrote:
> > On Sun, Jun 18, 2017 at 09:58:27AM +0100, Okash Khawaja wrote:
> > > This patch adds functionality to validate and convert either a device
> > > name or 'ser' member of synth into dev_t.
> []
> > > --- a/drivers/staging/speakup/spk_ttyio.c
> []
> > > +int ser_to_dev(int ser, dev_t *dev_no)
> > > +{
> > > + if (ser < 0 || ser > (255 - 64)) {
> > > +pr_err("speakup: Invalid ser param. \
> > > + Must be between 0 and 191 inclusive.\n");
> > 
> > As Andy pointed out, never do this for a C string, it's not doing what
> > you think it is :)
> 
> Well, some guy.
> 
> > Worse case, do this like the following:
> > pr_err("speakup: Invalid ser param."
> > "Must be between 0 and 191 inclusive.\n");
> 
> Nope, now there's no space between param and Must.
> 
> Using string concatenation on multiple lines is error prone.

Ah, yes it is, see, I messed it up!  :)

Re: [patch v2 2/3] staging: speakup: check and convert dev name or ser to dev_t

[Okash Khawaja]

On Mon, Jun 19, 2017 at 09:15:33AM +0800, Greg Kroah-Hartman wrote:
> > +int ser_to_dev(int ser, dev_t *dev_no)
> > +{
> > +   if (ser < 0 || ser > (255 - 64)) {
> > +pr_err("speakup: Invalid ser param. \
> > +   Must be between 0 and 191 inclusive.\n");
> 
> As Andy pointed out, never do this for a C string, it's not doing what
> you think it is :)
Of course! I am sorry I should address such issues before submitting.
Will watch out more carefully next time.

> 
> Worse case, do this like the following:
>   pr_err("speakup: Invalid ser param."
>   "Must be between 0 and 191 inclusive.\n");
> 
> Also note, you are using spaces here in the patch, always run
> checkpatch.pl on your patches, so you don't get a grumpy maintainer
> telling you to run checkpatch.pl on your patches :)
Sure.

Thanks for the patience.

Okash

Re: [patch v2 2/3] staging: speakup: check and convert dev name or ser to dev_t

[Okash Khawaja]

On Mon, Jun 19, 2017 at 09:15:33AM +0800, Greg Kroah-Hartman wrote:
> > +int ser_to_dev(int ser, dev_t *dev_no)
> > +{
> > +   if (ser < 0 || ser > (255 - 64)) {
> > +pr_err("speakup: Invalid ser param. \
> > +   Must be between 0 and 191 inclusive.\n");
> 
> As Andy pointed out, never do this for a C string, it's not doing what
> you think it is :)
Of course! I am sorry I should address such issues before submitting.
Will watch out more carefully next time.

> 
> Worse case, do this like the following:
>   pr_err("speakup: Invalid ser param."
>   "Must be between 0 and 191 inclusive.\n");
> 
> Also note, you are using spaces here in the patch, always run
> checkpatch.pl on your patches, so you don't get a grumpy maintainer
> telling you to run checkpatch.pl on your patches :)
Sure.

Thanks for the patience.

Okash

linux-next: manual merge of the scsi tree with the block tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the scsi tree got a conflict in:

  drivers/scsi/scsi_lib.c

between commit:

  f660174e8bcd ("blk-mq: use the introduced blk_mq_unquiesce_queue()")

from the block tree and commits:

  551eb598e5ea ("scsi: Split scsi_internal_device_block()")
  66483a4a9f34 ("scsi: Introduce scsi_start_queue()")

from the scsi tree.

I fixed it up (I think - see below) and can carry the fix as
necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer
when your tree is submitted for merging.  You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/scsi/scsi_lib.c
index fb18ed284e55,41c19c75dab4..
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@@ -2959,10 -2989,7 +2974,7 @@@ int scsi_internal_device_block_nowait(s
 * request queue. 
 */
if (q->mq_ops) {
-   if (wait)
-   blk_mq_quiesce_queue(q);
-   else
-   blk_mq_quiesce_queue_nowait(q);
 -  blk_mq_stop_hw_queues(q);
++  blk_mq_quiesce_queue_nowait(q);
} else {
spin_lock_irqsave(q->queue_lock, flags);
blk_stop_queue(q);
@@@ -2973,31 -2998,77 +2983,77 @@@
  
return 0;
  }
- EXPORT_SYMBOL_GPL(scsi_internal_device_block);
-  
+ EXPORT_SYMBOL_GPL(scsi_internal_device_block_nowait);
+ 
  /**
-  * scsi_internal_device_unblock - resume a device after a block request
-  * @sdev: device to resume
-  * @new_state:state to set devices to after unblocking
+  * scsi_internal_device_block - try to transition to the SDEV_BLOCK state
+  * @sdev: device to block
+  *
+  * Pause SCSI command processing on the specified device and wait until all
+  * ongoing scsi_request_fn() / scsi_queue_rq() calls have finished. May sleep.
   *
-  * Called by scsi lld's or the midlayer to restart the device queue
-  * for the previously suspended scsi device.  Called from interrupt or
-  * normal process context.
+  * Returns zero if successful or a negative error code upon failure.
   *
-  * Returns zero if successful or error if not.
+  * Note:
+  * This routine transitions the device to the SDEV_BLOCK state (which must be
+  * a legal transition). When the device is in this state, command processing
+  * is paused until the device leaves the SDEV_BLOCK state. See also
+  * scsi_internal_device_unblock().
   *
-  * Notes:   
-  *This routine transitions the device to the SDEV_RUNNING state
-  *or to one of the offline states (which must be a legal transition)
-  *allowing the midlayer to goose the queue for this device.
+  * To do: avoid that scsi_send_eh_cmnd() calls queuecommand() after
+  * scsi_internal_device_block() has blocked a SCSI device and also
+  * remove the rport mutex lock and unlock calls from srp_queuecommand().
   */
- int
- scsi_internal_device_unblock(struct scsi_device *sdev,
-enum scsi_device_state new_state)
+ static int scsi_internal_device_block(struct scsi_device *sdev)
  {
-   struct request_queue *q = sdev->request_queue; 
+   struct request_queue *q = sdev->request_queue;
+   int err;
+ 
+   mutex_lock(>state_mutex);
+   err = scsi_internal_device_block_nowait(sdev);
+   if (err == 0) {
+   if (q->mq_ops)
+   blk_mq_quiesce_queue(q);
+   else
+   scsi_wait_for_queuecommand(sdev);
+   }
+   mutex_unlock(>state_mutex);
+ 
+   return err;
+ }
+  
+ void scsi_start_queue(struct scsi_device *sdev)
+ {
+   struct request_queue *q = sdev->request_queue;
unsigned long flags;
  
+   if (q->mq_ops) {
 -  blk_mq_start_stopped_hw_queues(q, false);
++  blk_mq_unquiesce_queue(q);
+   } else {
+   spin_lock_irqsave(q->queue_lock, flags);
+   blk_start_queue(q);
+   spin_unlock_irqrestore(q->queue_lock, flags);
+   }
+ }
+ 
+ /**
+  * scsi_internal_device_unblock_nowait - resume a device after a block request
+  * @sdev: device to resume
+  * @new_state:state to set the device to after unblocking
+  *
+  * Restart the device queue for a previously suspended SCSI device. Does not
+  * sleep.
+  *
+  * Returns zero if successful or a negative error code upon failure.
+  *
+  * Notes:
+  * This routine transitions the device to the SDEV_RUNNING state or to one of
+  * the offline states (which must be a legal transition) allowing the midlayer
+  * to goose the queue for this device.
+  */
+ int scsi_internal_device_unblock_nowait(struct scsi_device *sdev,
+   enum scsi_device_state new_state)
+ {
/*
 * Try to transition the scsi device to SDEV_RUNNING or one of the
   

linux-next: manual merge of the scsi tree with the block tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the scsi tree got a conflict in:

  drivers/scsi/scsi_lib.c

between commit:

  f660174e8bcd ("blk-mq: use the introduced blk_mq_unquiesce_queue()")

from the block tree and commits:

  551eb598e5ea ("scsi: Split scsi_internal_device_block()")
  66483a4a9f34 ("scsi: Introduce scsi_start_queue()")

from the scsi tree.

I fixed it up (I think - see below) and can carry the fix as
necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer
when your tree is submitted for merging.  You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/scsi/scsi_lib.c
index fb18ed284e55,41c19c75dab4..
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@@ -2959,10 -2989,7 +2974,7 @@@ int scsi_internal_device_block_nowait(s
 * request queue. 
 */
if (q->mq_ops) {
-   if (wait)
-   blk_mq_quiesce_queue(q);
-   else
-   blk_mq_quiesce_queue_nowait(q);
 -  blk_mq_stop_hw_queues(q);
++  blk_mq_quiesce_queue_nowait(q);
} else {
spin_lock_irqsave(q->queue_lock, flags);
blk_stop_queue(q);
@@@ -2973,31 -2998,77 +2983,77 @@@
  
return 0;
  }
- EXPORT_SYMBOL_GPL(scsi_internal_device_block);
-  
+ EXPORT_SYMBOL_GPL(scsi_internal_device_block_nowait);
+ 
  /**
-  * scsi_internal_device_unblock - resume a device after a block request
-  * @sdev: device to resume
-  * @new_state:state to set devices to after unblocking
+  * scsi_internal_device_block - try to transition to the SDEV_BLOCK state
+  * @sdev: device to block
+  *
+  * Pause SCSI command processing on the specified device and wait until all
+  * ongoing scsi_request_fn() / scsi_queue_rq() calls have finished. May sleep.
   *
-  * Called by scsi lld's or the midlayer to restart the device queue
-  * for the previously suspended scsi device.  Called from interrupt or
-  * normal process context.
+  * Returns zero if successful or a negative error code upon failure.
   *
-  * Returns zero if successful or error if not.
+  * Note:
+  * This routine transitions the device to the SDEV_BLOCK state (which must be
+  * a legal transition). When the device is in this state, command processing
+  * is paused until the device leaves the SDEV_BLOCK state. See also
+  * scsi_internal_device_unblock().
   *
-  * Notes:   
-  *This routine transitions the device to the SDEV_RUNNING state
-  *or to one of the offline states (which must be a legal transition)
-  *allowing the midlayer to goose the queue for this device.
+  * To do: avoid that scsi_send_eh_cmnd() calls queuecommand() after
+  * scsi_internal_device_block() has blocked a SCSI device and also
+  * remove the rport mutex lock and unlock calls from srp_queuecommand().
   */
- int
- scsi_internal_device_unblock(struct scsi_device *sdev,
-enum scsi_device_state new_state)
+ static int scsi_internal_device_block(struct scsi_device *sdev)
  {
-   struct request_queue *q = sdev->request_queue; 
+   struct request_queue *q = sdev->request_queue;
+   int err;
+ 
+   mutex_lock(>state_mutex);
+   err = scsi_internal_device_block_nowait(sdev);
+   if (err == 0) {
+   if (q->mq_ops)
+   blk_mq_quiesce_queue(q);
+   else
+   scsi_wait_for_queuecommand(sdev);
+   }
+   mutex_unlock(>state_mutex);
+ 
+   return err;
+ }
+  
+ void scsi_start_queue(struct scsi_device *sdev)
+ {
+   struct request_queue *q = sdev->request_queue;
unsigned long flags;
  
+   if (q->mq_ops) {
 -  blk_mq_start_stopped_hw_queues(q, false);
++  blk_mq_unquiesce_queue(q);
+   } else {
+   spin_lock_irqsave(q->queue_lock, flags);
+   blk_start_queue(q);
+   spin_unlock_irqrestore(q->queue_lock, flags);
+   }
+ }
+ 
+ /**
+  * scsi_internal_device_unblock_nowait - resume a device after a block request
+  * @sdev: device to resume
+  * @new_state:state to set the device to after unblocking
+  *
+  * Restart the device queue for a previously suspended SCSI device. Does not
+  * sleep.
+  *
+  * Returns zero if successful or a negative error code upon failure.
+  *
+  * Notes:
+  * This routine transitions the device to the SDEV_RUNNING state or to one of
+  * the offline states (which must be a legal transition) allowing the midlayer
+  * to goose the queue for this device.
+  */
+ int scsi_internal_device_unblock_nowait(struct scsi_device *sdev,
+   enum scsi_device_state new_state)
+ {
/*
 * Try to transition the scsi device to SDEV_RUNNING or one of the
   

Re: [PATCH v2] firmware: qcom_scm: Fix to allow COMPILE_TEST-ing

[Olof Johansson]

Hi,

On Thu, Jun 8, 2017 at 8:23 AM, Stanimir Varbanov
 wrote:
> Unfortunatly previous attempt to allow consumer drivers to
> use COMPILE_TEST option in Kconfig is not enough, because in the
> past the consumer drivers used 'depends on' Kconfig option but
> now they are using 'select' Kconfig option which means on non ARM
> arch'es compilation is triggered. Thus we need to move the ifdefery
> one level below by touching the private qcom_scm.h header.
>
> Cc: Stephen Boyd 
> Cc: Bjorn Andersson 
> Signed-off-by: Stanimir Varbanov 
> ---
> This is second version of the patch with comments addressed:
>  * proper identation for static inline functions
>  * to avoid duplicating defines group them on top of the header
>
> The first version has been part of the venus driver patchset
> v8 and can be found at:
> https://patchwork.kernel.org/patch/9704275/
>
>  drivers/firmware/Kconfig|   2 +-
>  drivers/firmware/qcom_scm.h | 122 
> 
>  include/linux/qcom_scm.h|  32 
>  3 files changed, 101 insertions(+), 55 deletions(-)
>
> diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
> index 6e4ed5a9c6fd..480578c3691a 100644
> --- a/drivers/firmware/Kconfig
> +++ b/drivers/firmware/Kconfig
> @@ -204,7 +204,7 @@ config FW_CFG_SYSFS_CMDLINE
>
>  config QCOM_SCM
> bool
> -   depends on ARM || ARM64
> +   depends on ARM || ARM64 || COMPILE_TEST
> select RESET_CONTROLLER
>
>  config QCOM_SCM_32
> diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
> index 9bea691f30fb..60689fc8a567 100644
> --- a/drivers/firmware/qcom_scm.h
> +++ b/drivers/firmware/qcom_scm.h
> @@ -16,31 +16,20 @@
>  #define QCOM_SCM_BOOT_ADDR 0x1
>  #define QCOM_SCM_BOOT_ADDR_MC  0x11
>  #define QCOM_SCM_SET_REMOTE_STATE  0xa
> -extern int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 
> id);
>
>  #define QCOM_SCM_FLAG_HLOS 0x01
>  #define QCOM_SCM_FLAG_COLDBOOT_MC  0x02
>  #define QCOM_SCM_FLAG_WARMBOOT_MC  0x04
> -extern int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
> -   const cpumask_t *cpus);
> -extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
>
>  #define QCOM_SCM_CMD_TERMINATE_PC  0x2
>  #define QCOM_SCM_FLUSH_FLAG_MASK   0x3
>  #define QCOM_SCM_CMD_CORE_HOTPLUGGED   0x10
> -extern void __qcom_scm_cpu_power_down(u32 flags);
>
>  #define QCOM_SCM_SVC_INFO  0x6
>  #define QCOM_IS_CALL_AVAIL_CMD 0x1
> -extern int __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
> -   u32 cmd_id);
>
>  #define QCOM_SCM_SVC_HDCP  0x11
>  #define QCOM_SCM_CMD_HDCP  0x01
> -extern int __qcom_scm_hdcp_req(struct device *dev,
> -   struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp);
> -
> -extern void __qcom_scm_init(void);
>
>  #define QCOM_SCM_SVC_PIL   0x2
>  #define QCOM_SCM_PAS_INIT_IMAGE_CMD0x1
> @@ -49,6 +38,27 @@ extern void __qcom_scm_init(void);
>  #define QCOM_SCM_PAS_SHUTDOWN_CMD  0x6
>  #define QCOM_SCM_PAS_IS_SUPPORTED_CMD  0x7
>  #define QCOM_SCM_PAS_MSS_RESET 0xa
> +
> +#define QCOM_SCM_SVC_MP0xc
> +#define QCOM_SCM_RESTORE_SEC_CFG   2
> +
> +#define QCOM_SCM_IOMMU_SECURE_PTBL_SIZE3
> +#define QCOM_SCM_IOMMU_SECURE_PTBL_INIT4
> +
> +#define QCOM_SCM_SVC_HDCP  0x11
> +#define QCOM_SCM_CMD_HDCP  0x01
> +
> +#if IS_ENABLED(CONFIG_ARM) || IS_ENABLED(CONFIG_ARM64)

This isn't right -- this should be IS_ENABLED(QCOM_SCM)

> +extern int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 
> id);
> +extern int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
> +   const cpumask_t *cpus);
> +extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
> +extern void __qcom_scm_cpu_power_down(u32 flags);
> +extern int __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
> +   u32 cmd_id);
> +extern int __qcom_scm_hdcp_req(struct device *dev,
> +   struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp);
> +extern void __qcom_scm_init(void);
>  extern bool __qcom_scm_pas_supported(struct device *dev, u32 peripheral);
>  extern int  __qcom_scm_pas_init_image(struct device *dev, u32 peripheral,
> dma_addr_t metadata_phys);
> @@ -57,6 +67,85 @@ extern int  __qcom_scm_pas_mem_setup(struct device *dev, 
> u32 peripheral,
>  extern int  __qcom_scm_pas_auth_and_reset(struct device *dev, u32 
> peripheral);
>  extern int  __qcom_scm_pas_shutdown(struct device *dev, u32 peripheral);
>  extern int  __qcom_scm_pas_mss_reset(struct device *dev, bool reset);
> +extern int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id,
> +  

Re: [PATCH v2] firmware: qcom_scm: Fix to allow COMPILE_TEST-ing

[Olof Johansson]

Hi,

On Thu, Jun 8, 2017 at 8:23 AM, Stanimir Varbanov
 wrote:
> Unfortunatly previous attempt to allow consumer drivers to
> use COMPILE_TEST option in Kconfig is not enough, because in the
> past the consumer drivers used 'depends on' Kconfig option but
> now they are using 'select' Kconfig option which means on non ARM
> arch'es compilation is triggered. Thus we need to move the ifdefery
> one level below by touching the private qcom_scm.h header.
>
> Cc: Stephen Boyd 
> Cc: Bjorn Andersson 
> Signed-off-by: Stanimir Varbanov 
> ---
> This is second version of the patch with comments addressed:
>  * proper identation for static inline functions
>  * to avoid duplicating defines group them on top of the header
>
> The first version has been part of the venus driver patchset
> v8 and can be found at:
> https://patchwork.kernel.org/patch/9704275/
>
>  drivers/firmware/Kconfig|   2 +-
>  drivers/firmware/qcom_scm.h | 122 
> 
>  include/linux/qcom_scm.h|  32 
>  3 files changed, 101 insertions(+), 55 deletions(-)
>
> diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
> index 6e4ed5a9c6fd..480578c3691a 100644
> --- a/drivers/firmware/Kconfig
> +++ b/drivers/firmware/Kconfig
> @@ -204,7 +204,7 @@ config FW_CFG_SYSFS_CMDLINE
>
>  config QCOM_SCM
> bool
> -   depends on ARM || ARM64
> +   depends on ARM || ARM64 || COMPILE_TEST
> select RESET_CONTROLLER
>
>  config QCOM_SCM_32
> diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
> index 9bea691f30fb..60689fc8a567 100644
> --- a/drivers/firmware/qcom_scm.h
> +++ b/drivers/firmware/qcom_scm.h
> @@ -16,31 +16,20 @@
>  #define QCOM_SCM_BOOT_ADDR 0x1
>  #define QCOM_SCM_BOOT_ADDR_MC  0x11
>  #define QCOM_SCM_SET_REMOTE_STATE  0xa
> -extern int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 
> id);
>
>  #define QCOM_SCM_FLAG_HLOS 0x01
>  #define QCOM_SCM_FLAG_COLDBOOT_MC  0x02
>  #define QCOM_SCM_FLAG_WARMBOOT_MC  0x04
> -extern int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
> -   const cpumask_t *cpus);
> -extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
>
>  #define QCOM_SCM_CMD_TERMINATE_PC  0x2
>  #define QCOM_SCM_FLUSH_FLAG_MASK   0x3
>  #define QCOM_SCM_CMD_CORE_HOTPLUGGED   0x10
> -extern void __qcom_scm_cpu_power_down(u32 flags);
>
>  #define QCOM_SCM_SVC_INFO  0x6
>  #define QCOM_IS_CALL_AVAIL_CMD 0x1
> -extern int __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
> -   u32 cmd_id);
>
>  #define QCOM_SCM_SVC_HDCP  0x11
>  #define QCOM_SCM_CMD_HDCP  0x01
> -extern int __qcom_scm_hdcp_req(struct device *dev,
> -   struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp);
> -
> -extern void __qcom_scm_init(void);
>
>  #define QCOM_SCM_SVC_PIL   0x2
>  #define QCOM_SCM_PAS_INIT_IMAGE_CMD0x1
> @@ -49,6 +38,27 @@ extern void __qcom_scm_init(void);
>  #define QCOM_SCM_PAS_SHUTDOWN_CMD  0x6
>  #define QCOM_SCM_PAS_IS_SUPPORTED_CMD  0x7
>  #define QCOM_SCM_PAS_MSS_RESET 0xa
> +
> +#define QCOM_SCM_SVC_MP0xc
> +#define QCOM_SCM_RESTORE_SEC_CFG   2
> +
> +#define QCOM_SCM_IOMMU_SECURE_PTBL_SIZE3
> +#define QCOM_SCM_IOMMU_SECURE_PTBL_INIT4
> +
> +#define QCOM_SCM_SVC_HDCP  0x11
> +#define QCOM_SCM_CMD_HDCP  0x01
> +
> +#if IS_ENABLED(CONFIG_ARM) || IS_ENABLED(CONFIG_ARM64)

This isn't right -- this should be IS_ENABLED(QCOM_SCM)

> +extern int __qcom_scm_set_remote_state(struct device *dev, u32 state, u32 
> id);
> +extern int __qcom_scm_set_warm_boot_addr(struct device *dev, void *entry,
> +   const cpumask_t *cpus);
> +extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
> +extern void __qcom_scm_cpu_power_down(u32 flags);
> +extern int __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
> +   u32 cmd_id);
> +extern int __qcom_scm_hdcp_req(struct device *dev,
> +   struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp);
> +extern void __qcom_scm_init(void);
>  extern bool __qcom_scm_pas_supported(struct device *dev, u32 peripheral);
>  extern int  __qcom_scm_pas_init_image(struct device *dev, u32 peripheral,
> dma_addr_t metadata_phys);
> @@ -57,6 +67,85 @@ extern int  __qcom_scm_pas_mem_setup(struct device *dev, 
> u32 peripheral,
>  extern int  __qcom_scm_pas_auth_and_reset(struct device *dev, u32 
> peripheral);
>  extern int  __qcom_scm_pas_shutdown(struct device *dev, u32 peripheral);
>  extern int  __qcom_scm_pas_mss_reset(struct device *dev, bool reset);
> +extern int __qcom_scm_restore_sec_cfg(struct device *dev, u32 device_id,
> + u32 spare);
> +extern int __qcom_scm_iommu_secure_ptbl_size(struct device *dev, u32 spare,
> + 

Re: [patch v2 2/3] staging: speakup: check and convert dev name or ser to dev_t

[Joe Perches]

On Mon, 2017-06-19 at 09:15 +0800, Greg Kroah-Hartman wrote:
> On Sun, Jun 18, 2017 at 09:58:27AM +0100, Okash Khawaja wrote:
> > This patch adds functionality to validate and convert either a device
> > name or 'ser' member of synth into dev_t.
[]
> > --- a/drivers/staging/speakup/spk_ttyio.c
[]
> > +int ser_to_dev(int ser, dev_t *dev_no)
> > +{
> > +   if (ser < 0 || ser > (255 - 64)) {
> > +pr_err("speakup: Invalid ser param. \
> > +   Must be between 0 and 191 inclusive.\n");
> 
> As Andy pointed out, never do this for a C string, it's not doing what
> you think it is :)

Well, some guy.

> Worse case, do this like the following:
>   pr_err("speakup: Invalid ser param."
>   "Must be between 0 and 191 inclusive.\n");

Nope, now there's no space between param and Must.

Using string concatenation on multiple lines is error prone.

Re: [patch v2 2/3] staging: speakup: check and convert dev name or ser to dev_t

[Joe Perches]

On Mon, 2017-06-19 at 09:15 +0800, Greg Kroah-Hartman wrote:
> On Sun, Jun 18, 2017 at 09:58:27AM +0100, Okash Khawaja wrote:
> > This patch adds functionality to validate and convert either a device
> > name or 'ser' member of synth into dev_t.
[]
> > --- a/drivers/staging/speakup/spk_ttyio.c
[]
> > +int ser_to_dev(int ser, dev_t *dev_no)
> > +{
> > +   if (ser < 0 || ser > (255 - 64)) {
> > +pr_err("speakup: Invalid ser param. \
> > +   Must be between 0 and 191 inclusive.\n");
> 
> As Andy pointed out, never do this for a C string, it's not doing what
> you think it is :)

Well, some guy.

> Worse case, do this like the following:
>   pr_err("speakup: Invalid ser param."
>   "Must be between 0 and 191 inclusive.\n");

Nope, now there's no space between param and Must.

Using string concatenation on multiple lines is error prone.

[PATCH] doc: Document suitability of IBM Verse for kernel development

[Stewart Smith]

IBM Verse is a web UI around Lotus Domino mail servers (much like
the Lotus Notes client talks to Domino servers).

For various reasons, it is not at all suitable for kernel development,
all of which have been raised (repeatedly) internally.

Signed-off-by: Stewart Smith 
---
 Documentation/process/email-clients.rst | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/process/email-clients.rst 
b/Documentation/process/email-clients.rst
index ac892b30815e..07faa5457bcb 100644
--- a/Documentation/process/email-clients.rst
+++ b/Documentation/process/email-clients.rst
@@ -167,6 +167,11 @@ Lotus Notes (GUI)
 
 Run away from it.
 
+IBM Verse (Web GUI)
+***
+
+See Lotus Notes.
+
 Mutt (TUI)
 **
 
-- 
2.9.4

[PATCH] doc: Document suitability of IBM Verse for kernel development

[Stewart Smith]

IBM Verse is a web UI around Lotus Domino mail servers (much like
the Lotus Notes client talks to Domino servers).

For various reasons, it is not at all suitable for kernel development,
all of which have been raised (repeatedly) internally.

Signed-off-by: Stewart Smith 
---
 Documentation/process/email-clients.rst | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/process/email-clients.rst 
b/Documentation/process/email-clients.rst
index ac892b30815e..07faa5457bcb 100644
--- a/Documentation/process/email-clients.rst
+++ b/Documentation/process/email-clients.rst
@@ -167,6 +167,11 @@ Lotus Notes (GUI)
 
 Run away from it.
 
+IBM Verse (Web GUI)
+***
+
+See Lotus Notes.
+
 Mutt (TUI)
 **
 
-- 
2.9.4

[PATCH] macintosh: rack-meter: make of_device_ids const.

[Arvind Yadav]

of_device_ids are not supposed to change at runtime. All functions
working with of_device_ids provided by  work with const
of_device_ids. So mark the non-const structs as const.

File size before:
   textdata bss dec hex filename
407 576   0 983 3d7 drivers/macintosh/rack-meter.o

File size after constify keystone_qmss_of_match.
   textdata bss dec hex filename
807 176   0 983 3d7 drivers/macintosh/rack-meter.o

Signed-off-by: Arvind Yadav 
---
 drivers/macintosh/rack-meter.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/macintosh/rack-meter.c b/drivers/macintosh/rack-meter.c
index e199fd6..35582eb 100644
--- a/drivers/macintosh/rack-meter.c
+++ b/drivers/macintosh/rack-meter.c
@@ -579,7 +579,7 @@ static int rackmeter_shutdown(struct macio_dev* mdev)
return 0;
 }
 
-static struct of_device_id rackmeter_match[] = {
+static const struct of_device_id rackmeter_match[] = {
{ .name = "i2s" },
{ }
 };
-- 
1.9.1

[PATCH] macintosh: rack-meter: make of_device_ids const.

[Arvind Yadav]

of_device_ids are not supposed to change at runtime. All functions
working with of_device_ids provided by  work with const
of_device_ids. So mark the non-const structs as const.

File size before:
   textdata bss dec hex filename
407 576   0 983 3d7 drivers/macintosh/rack-meter.o

File size after constify keystone_qmss_of_match.
   textdata bss dec hex filename
807 176   0 983 3d7 drivers/macintosh/rack-meter.o

Signed-off-by: Arvind Yadav 
---
 drivers/macintosh/rack-meter.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/macintosh/rack-meter.c b/drivers/macintosh/rack-meter.c
index e199fd6..35582eb 100644
--- a/drivers/macintosh/rack-meter.c
+++ b/drivers/macintosh/rack-meter.c
@@ -579,7 +579,7 @@ static int rackmeter_shutdown(struct macio_dev* mdev)
return 0;
 }
 
-static struct of_device_id rackmeter_match[] = {
+static const struct of_device_id rackmeter_match[] = {
{ .name = "i2s" },
{ }
 };
-- 
1.9.1

[Patch v5 01/12] [media] s5p-mfc: Rename IS_MFCV8 macro

[Smitha T Murthy]

This patch renames macro IS_MFCV8 to IS_MFCV8_PLUS so that the MFCv8
code can be resued for MFCv10.10 support. Since the MFCv8 specific code
holds good for MFC v10.10 also.

Signed-off-by: Smitha T Murthy 
Acked-by: Andrzej Hajda 
---
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c   |  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c|  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 18 +-
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 4220914..5fb2684 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -711,7 +711,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct 
vb2_queue *vq);
 #define IS_TWOPORT(dev)(dev->variant->port_num == 2 ? 1 : 0)
 #define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0)
 #define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
-#define IS_MFCV8(dev)  (dev->variant->version >= 0x80 ? 1 : 0)
+#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
 
 #define MFC_V5_BIT BIT(0)
 #define MFC_V6_BIT BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index 69ef9c2..3769d22 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -399,7 +399,7 @@ int s5p_mfc_wakeup(struct s5p_mfc_dev *dev)
s5p_mfc_clear_cmds(dev);
s5p_mfc_clean_dev_int_flags(dev);
/* 3. Send MFC wakeup command and wait for completion*/
-   if (IS_MFCV8(dev))
+   if (IS_MFCV8_PLUS(dev))
ret = s5p_mfc_v8_wait_wakeup(dev);
else
ret = s5p_mfc_wait_wakeup(dev);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 8937b0a..42e9351 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -1177,7 +1177,7 @@ void s5p_mfc_dec_init(struct s5p_mfc_ctx *ctx)
struct v4l2_format f;
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
ctx->src_fmt = find_format(, MFC_FMT_DEC);
-   if (IS_MFCV8(ctx->dev))
+   if (IS_MFCV8_PLUS(ctx->dev))
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M;
else if (IS_MFCV6_PLUS(ctx->dev))
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT_16X16;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 88dbb9c..fe14479 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -74,7 +74,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx 
*ctx)
  ctx->luma_size, ctx->chroma_size, ctx->mv_size);
mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
} else if (ctx->type == MFCINST_ENCODER) {
-   if (IS_MFCV8(dev))
+   if (IS_MFCV8_PLUS(dev))
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -89,7 +89,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx 
*ctx)
ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
-   if (IS_MFCV8(dev))
+   if (IS_MFCV8_PLUS(dev))
ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
ctx->img_width, ctx->img_height,
mb_width, mb_height),
@@ -110,7 +110,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
s5p_mfc_ctx *ctx)
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
-   if (IS_MFCV8(dev))
+   if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
mb_width,
@@ -167,7 +167,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
s5p_mfc_ctx *ctx)
ctx->bank1.size = ctx->scratch_buf_size;
break;
case S5P_MFC_CODEC_VP8_DEC:
-   if (IS_MFCV8(dev))
+   if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(
mb_width,
@@ -182,7 +182,7 @@ static int 

[Patch v5 01/12] [media] s5p-mfc: Rename IS_MFCV8 macro

[Smitha T Murthy]

This patch renames macro IS_MFCV8 to IS_MFCV8_PLUS so that the MFCv8
code can be resued for MFCv10.10 support. Since the MFCv8 specific code
holds good for MFC v10.10 also.

Signed-off-by: Smitha T Murthy 
Acked-by: Andrzej Hajda 
---
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c   |  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c|  2 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 18 +-
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 4220914..5fb2684 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -711,7 +711,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct 
vb2_queue *vq);
 #define IS_TWOPORT(dev)(dev->variant->port_num == 2 ? 1 : 0)
 #define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0)
 #define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
-#define IS_MFCV8(dev)  (dev->variant->version >= 0x80 ? 1 : 0)
+#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
 
 #define MFC_V5_BIT BIT(0)
 #define MFC_V6_BIT BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
index 69ef9c2..3769d22 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
@@ -399,7 +399,7 @@ int s5p_mfc_wakeup(struct s5p_mfc_dev *dev)
s5p_mfc_clear_cmds(dev);
s5p_mfc_clean_dev_int_flags(dev);
/* 3. Send MFC wakeup command and wait for completion*/
-   if (IS_MFCV8(dev))
+   if (IS_MFCV8_PLUS(dev))
ret = s5p_mfc_v8_wait_wakeup(dev);
else
ret = s5p_mfc_wait_wakeup(dev);
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 8937b0a..42e9351 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -1177,7 +1177,7 @@ void s5p_mfc_dec_init(struct s5p_mfc_ctx *ctx)
struct v4l2_format f;
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
ctx->src_fmt = find_format(, MFC_FMT_DEC);
-   if (IS_MFCV8(ctx->dev))
+   if (IS_MFCV8_PLUS(ctx->dev))
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M;
else if (IS_MFCV6_PLUS(ctx->dev))
f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT_16X16;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 88dbb9c..fe14479 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -74,7 +74,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx 
*ctx)
  ctx->luma_size, ctx->chroma_size, ctx->mv_size);
mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
} else if (ctx->type == MFCINST_ENCODER) {
-   if (IS_MFCV8(dev))
+   if (IS_MFCV8_PLUS(dev))
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -89,7 +89,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx 
*ctx)
ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
-   if (IS_MFCV8(dev))
+   if (IS_MFCV8_PLUS(dev))
ctx->me_buffer_size = ALIGN(S5P_FIMV_ME_BUFFER_SIZE_V8(
ctx->img_width, ctx->img_height,
mb_width, mb_height),
@@ -110,7 +110,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
s5p_mfc_ctx *ctx)
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
-   if (IS_MFCV8(dev))
+   if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(
mb_width,
@@ -167,7 +167,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
s5p_mfc_ctx *ctx)
ctx->bank1.size = ctx->scratch_buf_size;
break;
case S5P_MFC_CODEC_VP8_DEC:
-   if (IS_MFCV8(dev))
+   if (IS_MFCV8_PLUS(dev))
ctx->scratch_buf_size =
S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(
mb_width,
@@ -182,7 +182,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 

[Patch v5 02/12] [media] s5p-mfc: Adding initial support for MFC v10.10

[Smitha T Murthy]

Adding the support for MFC v10.10, with new register file and
necessary hw control, decoder, encoder and structural changes.

CC: Rob Herring 
CC: devicet...@vger.kernel.org
Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
Acked-by: Rob Herring 
---
 .../devicetree/bindings/media/s5p-mfc.txt  |  1 +
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h  | 36 ++
 drivers/media/platform/s5p-mfc/s5p_mfc.c   | 25 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h|  9 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c  |  4 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c   | 32 ---
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c   | 16 --
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c|  9 --
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h|  2 ++
 9 files changed, 101 insertions(+), 33 deletions(-)
 create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h

diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt 
b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index d3404b5..aa54c81 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -13,6 +13,7 @@ Required properties:
(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
+   (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
 
   - reg : Physical base address of the IP registers and length of memory
  mapped region.
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
new file mode 100644
index 000..1ca09d6
--- /dev/null
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -0,0 +1,36 @@
+/*
+ * Register definition file for Samsung MFC V10.x Interface (FIMV) driver
+ *
+ * Copyright (c) 2017 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _REGS_MFC_V10_H
+#define _REGS_MFC_V10_H
+
+#include 
+#include "regs-mfc-v8.h"
+
+/* MFCv10 register definitions*/
+#define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120
+#define S5P_FIMV_MFC_STATE_V10 0x7124
+
+/* MFCv10 Context buffer sizes */
+#define MFC_CTX_BUF_SIZE_V10   (30 * SZ_1K)
+#define MFC_H264_DEC_CTX_BUF_SIZE_V10  (2 * SZ_1M)
+#define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
+#define MFC_H264_ENC_CTX_BUF_SIZE_V10  (100 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
+
+/* MFCv10 variant defines */
+#define MAX_FW_SIZE_V10(SZ_1M)
+#define MAX_CPB_SIZE_V10   (3 * SZ_1M)
+#define MFC_VERSION_V100xA0
+#define MFC_NUM_PORTS_V10  1
+
+#endif /*_REGS_MFC_V10_H*/
+
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 43ca572..1b032f8 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1614,6 +1614,28 @@ static struct s5p_mfc_variant mfc_drvdata_v8_5433 = {
.num_clocks = 3,
 };
 
+static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
+   .dev_ctx= MFC_CTX_BUF_SIZE_V10,
+   .h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
+   .other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
+   .h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+   .other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
+};
+
+static struct s5p_mfc_buf_size buf_size_v10 = {
+   .fw = MAX_FW_SIZE_V10,
+   .cpb= MAX_CPB_SIZE_V10,
+   .priv   = _buf_size_v10,
+};
+
+static struct s5p_mfc_variant mfc_drvdata_v10 = {
+   .version= MFC_VERSION_V10,
+   .version_bit= MFC_V10_BIT,
+   .port_num   = MFC_NUM_PORTS_V10,
+   .buf_size   = _size_v10,
+   .fw_name[0] = "s5p-mfc-v10.fw",
+};
+
 static const struct of_device_id exynos_mfc_match[] = {
{
.compatible = "samsung,mfc-v5",
@@ -1630,6 +1652,9 @@ static const struct of_device_id exynos_mfc_match[] = {
}, {
.compatible = "samsung,exynos5433-mfc",
.data = _drvdata_v8_5433,
+   }, {
+   .compatible = "samsung,mfc-v10",
+   .data = _drvdata_v10,
},
{},
 };
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 5fb2684..eb0cf5e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -23,7 +23,7 @@
 #include 
 #include 
 #include "regs-mfc.h"
-#include 

[Patch v5 02/12] [media] s5p-mfc: Adding initial support for MFC v10.10

[Smitha T Murthy]

Adding the support for MFC v10.10, with new register file and
necessary hw control, decoder, encoder and structural changes.

CC: Rob Herring 
CC: devicet...@vger.kernel.org
Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
Acked-by: Rob Herring 
---
 .../devicetree/bindings/media/s5p-mfc.txt  |  1 +
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h  | 36 ++
 drivers/media/platform/s5p-mfc/s5p_mfc.c   | 25 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h|  9 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c  |  4 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c   | 32 ---
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c   | 16 --
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c|  9 --
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h|  2 ++
 9 files changed, 101 insertions(+), 33 deletions(-)
 create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h

diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt 
b/Documentation/devicetree/bindings/media/s5p-mfc.txt
index d3404b5..aa54c81 100644
--- a/Documentation/devicetree/bindings/media/s5p-mfc.txt
+++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt
@@ -13,6 +13,7 @@ Required properties:
(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
+   (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
 
   - reg : Physical base address of the IP registers and length of memory
  mapped region.
diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
new file mode 100644
index 000..1ca09d6
--- /dev/null
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -0,0 +1,36 @@
+/*
+ * Register definition file for Samsung MFC V10.x Interface (FIMV) driver
+ *
+ * Copyright (c) 2017 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _REGS_MFC_V10_H
+#define _REGS_MFC_V10_H
+
+#include 
+#include "regs-mfc-v8.h"
+
+/* MFCv10 register definitions*/
+#define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120
+#define S5P_FIMV_MFC_STATE_V10 0x7124
+
+/* MFCv10 Context buffer sizes */
+#define MFC_CTX_BUF_SIZE_V10   (30 * SZ_1K)
+#define MFC_H264_DEC_CTX_BUF_SIZE_V10  (2 * SZ_1M)
+#define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
+#define MFC_H264_ENC_CTX_BUF_SIZE_V10  (100 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
+
+/* MFCv10 variant defines */
+#define MAX_FW_SIZE_V10(SZ_1M)
+#define MAX_CPB_SIZE_V10   (3 * SZ_1M)
+#define MFC_VERSION_V100xA0
+#define MFC_NUM_PORTS_V10  1
+
+#endif /*_REGS_MFC_V10_H*/
+
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 43ca572..1b032f8 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1614,6 +1614,28 @@ static struct s5p_mfc_variant mfc_drvdata_v8_5433 = {
.num_clocks = 3,
 };
 
+static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
+   .dev_ctx= MFC_CTX_BUF_SIZE_V10,
+   .h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
+   .other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
+   .h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+   .other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
+};
+
+static struct s5p_mfc_buf_size buf_size_v10 = {
+   .fw = MAX_FW_SIZE_V10,
+   .cpb= MAX_CPB_SIZE_V10,
+   .priv   = _buf_size_v10,
+};
+
+static struct s5p_mfc_variant mfc_drvdata_v10 = {
+   .version= MFC_VERSION_V10,
+   .version_bit= MFC_V10_BIT,
+   .port_num   = MFC_NUM_PORTS_V10,
+   .buf_size   = _size_v10,
+   .fw_name[0] = "s5p-mfc-v10.fw",
+};
+
 static const struct of_device_id exynos_mfc_match[] = {
{
.compatible = "samsung,mfc-v5",
@@ -1630,6 +1652,9 @@ static const struct of_device_id exynos_mfc_match[] = {
}, {
.compatible = "samsung,exynos5433-mfc",
.data = _drvdata_v8_5433,
+   }, {
+   .compatible = "samsung,mfc-v10",
+   .data = _drvdata_v10,
},
{},
 };
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 5fb2684..eb0cf5e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -23,7 +23,7 @@
 #include 
 #include 
 #include "regs-mfc.h"
-#include "regs-mfc-v8.h"
+#include "regs-mfc-v10.h"
 
 #define S5P_MFC_NAME   "s5p-mfc"
 

[Patch v5 03/12] [media] s5p-mfc: Use min scratch buffer size as provided by F/W

[Smitha T Murthy]

After MFC v8.0, mfc f/w lets the driver know how much scratch buffer
size is required for decoder. If mfc f/w has the functionality,
E_MIN_SCRATCH_BUFFER_SIZE, driver can know how much scratch buffer size
is required for encoder too.

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 drivers/media/platform/s5p-mfc/regs-mfc-v8.h|  2 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c|  2 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c|  5 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|  4 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 68 ++---
 6 files changed, 65 insertions(+), 17 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
index 75f5f75..bd639ae 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
@@ -17,6 +17,7 @@
 
 /* Additional registers for v8 */
 #define S5P_FIMV_D_MVC_NUM_VIEWS_V80xf104
+#define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8  0xf108
 #define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8 0xf144
 #define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V80xf148
 #define S5P_FIMV_D_MV_BUFFER_SIZE_V8   0xf150
@@ -84,6 +85,7 @@
 
 #define S5P_FIMV_E_VBV_BUFFER_SIZE_V8  0xf78c
 #define S5P_FIMV_E_VBV_INIT_DELAY_V8   0xf790
+#define S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8   0xf894
 
 #define S5P_FIMV_E_ASPECT_RATIO_V8 0xfb4c
 #define S5P_FIMV_E_EXTENDED_SAR_V8 0xfb50
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 1b032f8..efc36b0 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -526,6 +526,8 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx,
dev);
ctx->mv_count = s5p_mfc_hw_call(dev->mfc_ops, get_mv_count,
dev);
+   ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+   get_min_scratch_buf_size, dev);
if (ctx->img_width == 0 || ctx->img_height == 0)
ctx->state = MFCINST_ERROR;
else
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index eb0cf5e..e65e1c3 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -713,6 +713,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct 
vb2_queue *vq);
 #define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
 #define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
 #define IS_MFCV10(dev) (dev->variant->version >= 0xA0 ? 1 : 0)
+#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev))
 
 #define MFC_V5_BIT BIT(0)
 #define MFC_V6_BIT BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 64b6b6d..eb5352a 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -813,6 +813,11 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
get_enc_dpb_count, dev);
if (ctx->pb_count < enc_pb_count)
ctx->pb_count = enc_pb_count;
+   if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) {
+   ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+   get_e_min_scratch_buf_size, dev);
+   ctx->bank1.size += ctx->scratch_buf_size;
+   }
ctx->state = MFCINST_HEAD_PRODUCED;
}
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 16d553f..e7a2d46 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -169,6 +169,7 @@ struct s5p_mfc_regs {
void __iomem *d_decoded_third_addr;/* only v7 */
void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
+   void __iomem *d_min_scratch_buffer_size; /* v10 */
 
/* encoder registers */
void __iomem *e_frame_width;
@@ -268,6 +269,7 @@ struct s5p_mfc_regs {
void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */
void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
+   void __iomem *e_min_scratch_buffer_size; /* v10 */
 };
 
 struct s5p_mfc_hw_ops {
@@ -311,6 +313,8 @@ struct s5p_mfc_hw_ops {
unsigned int (*get_pic_type_bot)(struct s5p_mfc_ctx *ctx);
unsigned int (*get_crop_info_h)(struct s5p_mfc_ctx *ctx);
unsigned int 

[Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC

[Smitha T Murthy]

Add V4L2 definition for HEVC compressed format

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 include/uapi/linux/videodev2.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 2b8feb8..488de3d 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -629,6 +629,7 @@ struct v4l2_pix_format {
 #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M 
Annex L compliant stream */
 #define V4L2_PIX_FMT_VP8  v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
 #define V4L2_PIX_FMT_VP9  v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
+#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
 
 /*  Vendor-specific formats   */
 #define V4L2_PIX_FMT_CPIA1v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
-- 
2.7.4

Re: [PATCH v2 2/2] crypto: engine - Permit to enqueue skcipher request

[Herbert Xu]

On Tue, Jun 06, 2017 at 03:44:17PM +0200, Corentin Labbe wrote:
> The crypto engine could actually only enqueue hash and ablkcipher request.
> This patch permit it to enqueue skcipher requets by adding all necessary
> functions.
> The only problem is that ablkcipher and skcipher id are the same, so
> only one cipher type is usable on the same crypto engine.
> 
> Signed-off-by: Corentin Labbe 

I think this should be done as part of the skcipher conversion rather
than as a standalone patch.

Thanks,
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

[Patch v5 03/12] [media] s5p-mfc: Use min scratch buffer size as provided by F/W

[Smitha T Murthy]

After MFC v8.0, mfc f/w lets the driver know how much scratch buffer
size is required for decoder. If mfc f/w has the functionality,
E_MIN_SCRATCH_BUFFER_SIZE, driver can know how much scratch buffer size
is required for encoder too.

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 drivers/media/platform/s5p-mfc/regs-mfc-v8.h|  2 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c|  2 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c|  5 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|  4 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 68 ++---
 6 files changed, 65 insertions(+), 17 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
index 75f5f75..bd639ae 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h
@@ -17,6 +17,7 @@
 
 /* Additional registers for v8 */
 #define S5P_FIMV_D_MVC_NUM_VIEWS_V80xf104
+#define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8  0xf108
 #define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8 0xf144
 #define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V80xf148
 #define S5P_FIMV_D_MV_BUFFER_SIZE_V8   0xf150
@@ -84,6 +85,7 @@
 
 #define S5P_FIMV_E_VBV_BUFFER_SIZE_V8  0xf78c
 #define S5P_FIMV_E_VBV_INIT_DELAY_V8   0xf790
+#define S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8   0xf894
 
 #define S5P_FIMV_E_ASPECT_RATIO_V8 0xfb4c
 #define S5P_FIMV_E_EXTENDED_SAR_V8 0xfb50
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index 1b032f8..efc36b0 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -526,6 +526,8 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx,
dev);
ctx->mv_count = s5p_mfc_hw_call(dev->mfc_ops, get_mv_count,
dev);
+   ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+   get_min_scratch_buf_size, dev);
if (ctx->img_width == 0 || ctx->img_height == 0)
ctx->state = MFCINST_ERROR;
else
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index eb0cf5e..e65e1c3 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -713,6 +713,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct 
vb2_queue *vq);
 #define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
 #define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
 #define IS_MFCV10(dev) (dev->variant->version >= 0xA0 ? 1 : 0)
+#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev))
 
 #define MFC_V5_BIT BIT(0)
 #define MFC_V6_BIT BIT(1)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index 64b6b6d..eb5352a 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -813,6 +813,11 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
get_enc_dpb_count, dev);
if (ctx->pb_count < enc_pb_count)
ctx->pb_count = enc_pb_count;
+   if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) {
+   ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops,
+   get_e_min_scratch_buf_size, dev);
+   ctx->bank1.size += ctx->scratch_buf_size;
+   }
ctx->state = MFCINST_HEAD_PRODUCED;
}
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index 16d553f..e7a2d46 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -169,6 +169,7 @@ struct s5p_mfc_regs {
void __iomem *d_decoded_third_addr;/* only v7 */
void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
+   void __iomem *d_min_scratch_buffer_size; /* v10 */
 
/* encoder registers */
void __iomem *e_frame_width;
@@ -268,6 +269,7 @@ struct s5p_mfc_regs {
void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */
void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */
void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */
+   void __iomem *e_min_scratch_buffer_size; /* v10 */
 };
 
 struct s5p_mfc_hw_ops {
@@ -311,6 +313,8 @@ struct s5p_mfc_hw_ops {
unsigned int (*get_pic_type_bot)(struct s5p_mfc_ctx *ctx);
unsigned int (*get_crop_info_h)(struct s5p_mfc_ctx *ctx);
unsigned int (*get_crop_info_v)(struct s5p_mfc_ctx *ctx);
+ 

[Patch v5 05/12] [media] videodev2.h: Add v4l2 definition for HEVC

[Smitha T Murthy]

Add V4L2 definition for HEVC compressed format

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 include/uapi/linux/videodev2.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 2b8feb8..488de3d 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -629,6 +629,7 @@ struct v4l2_pix_format {
 #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M 
Annex L compliant stream */
 #define V4L2_PIX_FMT_VP8  v4l2_fourcc('V', 'P', '8', '0') /* VP8 */
 #define V4L2_PIX_FMT_VP9  v4l2_fourcc('V', 'P', '9', '0') /* VP9 */
+#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C') /* HEVC */
 
 /*  Vendor-specific formats   */
 #define V4L2_PIX_FMT_CPIA1v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
-- 
2.7.4

Re: [PATCH v2 2/2] crypto: engine - Permit to enqueue skcipher request

[Herbert Xu]

On Tue, Jun 06, 2017 at 03:44:17PM +0200, Corentin Labbe wrote:
> The crypto engine could actually only enqueue hash and ablkcipher request.
> This patch permit it to enqueue skcipher requets by adding all necessary
> functions.
> The only problem is that ablkcipher and skcipher id are the same, so
> only one cipher type is usable on the same crypto engine.
> 
> Signed-off-by: Corentin Labbe 

I think this should be done as part of the skcipher conversion rather
than as a standalone patch.

Thanks,
-- 
Email: Herbert Xu 
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

[Patch v5 09/12] [media] s5p-mfc: Add VP9 decoder support

[Smitha T Murthy]

Add support for codec definition and corresponding buffer
requirements for VP9 decoder.

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  6 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c|  7 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|  2 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 26 +
 6 files changed, 45 insertions(+)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 953a073..6754477 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -18,6 +18,8 @@
 /* MFCv10 register definitions*/
 #define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120
 #define S5P_FIMV_MFC_STATE_V10 0x7124
+#define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10  0xF570
+#define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10  0xF574
 
 /* MFCv10 Context buffer sizes */
 #define MFC_CTX_BUF_SIZE_V10   (30 * SZ_1K)
@@ -34,8 +36,12 @@
 
 /* MFCv10 codec defines*/
 #define S5P_FIMV_CODEC_HEVC_DEC17
+#define S5P_FIMV_CODEC_VP9_DEC 18
 #define S5P_FIMV_CODEC_HEVC_ENC 26
 
+/* Decoder buffer size for MFC v10 */
+#define DEC_VP9_STATIC_BUFFER_SIZE 20480
+
 /* Encoder buffer size for MFC v10.0 */
 #define ENC_V100_BASE_SIZE(x, y) \
(((x + 3) * (y + 3) * 8) \
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 76eca67..102b47e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -104,6 +104,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_HEVC_DEC:
codec_type = S5P_FIMV_CODEC_HEVC_DEC;
break;
+   case S5P_MFC_CODEC_VP9_DEC:
+   codec_type = S5P_FIMV_CODEC_VP9_DEC;
+   break;
case S5P_MFC_CODEC_H264_ENC:
codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 828e07e..b49f220 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -73,6 +73,7 @@
 #define S5P_MFC_CODEC_VC1RCV_DEC   6
 #define S5P_MFC_CODEC_VP8_DEC  7
 #define S5P_MFC_CODEC_HEVC_DEC 17
+#define S5P_MFC_CODEC_VP9_DEC  18
 
 #define S5P_MFC_CODEC_H264_ENC 20
 #define S5P_MFC_CODEC_H264_MVC_ENC 21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 4749355..5cf4d99 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -151,6 +151,13 @@ static struct s5p_mfc_fmt formats[] = {
.num_planes = 1,
.versions   = MFC_V10_BIT,
},
+   {
+   .fourcc = V4L2_PIX_FMT_VP9,
+   .codec_mode = S5P_FIMV_CODEC_VP9_DEC,
+   .type   = MFC_FMT_DEC,
+   .num_planes = 1,
+   .versions   = MFC_V10_BIT,
+   },
 };
 
 #define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index e7a2d46..57f4560 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -170,6 +170,8 @@ struct s5p_mfc_regs {
void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
void __iomem *d_min_scratch_buffer_size; /* v10 */
+   void __iomem *d_static_buffer_addr; /* v10 */
+   void __iomem *d_static_buffer_size; /* v10 */
 
/* encoder registers */
void __iomem *e_frame_width;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index ed725db..f3d0a6f 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -226,6 +226,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
s5p_mfc_ctx *ctx)
ctx->scratch_buf_size +
(ctx->mv_count * ctx->mv_size);
break;
+   case S5P_MFC_CODEC_VP9_DEC:
+   mfc_debug(2, "Use min scratch buffer size\n");
+   ctx->bank1.size =
+   ctx->scratch_buf_size +
+   DEC_VP9_STATIC_BUFFER_SIZE;
+   break;
case S5P_MFC_CODEC_H264_ENC:
if (IS_MFCV10(dev)) {

[Patch v5 09/12] [media] s5p-mfc: Add VP9 decoder support

[Smitha T Murthy]

Add support for codec definition and corresponding buffer
requirements for VP9 decoder.

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  6 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c|  7 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|  2 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 26 +
 6 files changed, 45 insertions(+)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 953a073..6754477 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -18,6 +18,8 @@
 /* MFCv10 register definitions*/
 #define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120
 #define S5P_FIMV_MFC_STATE_V10 0x7124
+#define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10  0xF570
+#define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10  0xF574
 
 /* MFCv10 Context buffer sizes */
 #define MFC_CTX_BUF_SIZE_V10   (30 * SZ_1K)
@@ -34,8 +36,12 @@
 
 /* MFCv10 codec defines*/
 #define S5P_FIMV_CODEC_HEVC_DEC17
+#define S5P_FIMV_CODEC_VP9_DEC 18
 #define S5P_FIMV_CODEC_HEVC_ENC 26
 
+/* Decoder buffer size for MFC v10 */
+#define DEC_VP9_STATIC_BUFFER_SIZE 20480
+
 /* Encoder buffer size for MFC v10.0 */
 #define ENC_V100_BASE_SIZE(x, y) \
(((x + 3) * (y + 3) * 8) \
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 76eca67..102b47e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -104,6 +104,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_HEVC_DEC:
codec_type = S5P_FIMV_CODEC_HEVC_DEC;
break;
+   case S5P_MFC_CODEC_VP9_DEC:
+   codec_type = S5P_FIMV_CODEC_VP9_DEC;
+   break;
case S5P_MFC_CODEC_H264_ENC:
codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index 828e07e..b49f220 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -73,6 +73,7 @@
 #define S5P_MFC_CODEC_VC1RCV_DEC   6
 #define S5P_MFC_CODEC_VP8_DEC  7
 #define S5P_MFC_CODEC_HEVC_DEC 17
+#define S5P_MFC_CODEC_VP9_DEC  18
 
 #define S5P_MFC_CODEC_H264_ENC 20
 #define S5P_MFC_CODEC_H264_MVC_ENC 21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 4749355..5cf4d99 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -151,6 +151,13 @@ static struct s5p_mfc_fmt formats[] = {
.num_planes = 1,
.versions   = MFC_V10_BIT,
},
+   {
+   .fourcc = V4L2_PIX_FMT_VP9,
+   .codec_mode = S5P_FIMV_CODEC_VP9_DEC,
+   .type   = MFC_FMT_DEC,
+   .num_planes = 1,
+   .versions   = MFC_V10_BIT,
+   },
 };
 
 #define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
index e7a2d46..57f4560 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h
@@ -170,6 +170,8 @@ struct s5p_mfc_regs {
void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */
void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */
void __iomem *d_min_scratch_buffer_size; /* v10 */
+   void __iomem *d_static_buffer_addr; /* v10 */
+   void __iomem *d_static_buffer_size; /* v10 */
 
/* encoder registers */
void __iomem *e_frame_width;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index ed725db..f3d0a6f 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -226,6 +226,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
s5p_mfc_ctx *ctx)
ctx->scratch_buf_size +
(ctx->mv_count * ctx->mv_size);
break;
+   case S5P_MFC_CODEC_VP9_DEC:
+   mfc_debug(2, "Use min scratch buffer size\n");
+   ctx->bank1.size =
+   ctx->scratch_buf_size +
+   DEC_VP9_STATIC_BUFFER_SIZE;
+   break;
case S5P_MFC_CODEC_H264_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
@@ 

[Patch v5 07/12] Documentation: v4l: Documentation for HEVC v4l2 definition

[Smitha T Murthy]

Add V4L2 definition for HEVC compressed format which is also
known as H.265.

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst 
b/Documentation/media/uapi/v4l/pixfmt-013.rst
index 728d7ed..abec039 100644
--- a/Documentation/media/uapi/v4l/pixfmt-013.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
@@ -90,3 +90,8 @@ Compressed Formats
   - ``V4L2_PIX_FMT_VP9``
   - 'VP90'
   - VP9 video elementary stream.
+* .. _V4L2-PIX-FMT-HEVC:
+
+  - ``V4L2_PIX_FMT_HEVC``
+  - 'HEVC'
+  - HEVC/H.265 video elementary stream.
-- 
2.7.4

[Patch v5 07/12] Documentation: v4l: Documentation for HEVC v4l2 definition

[Smitha T Murthy]

Add V4L2 definition for HEVC compressed format which is also
known as H.265.

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 Documentation/media/uapi/v4l/pixfmt-013.rst | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Documentation/media/uapi/v4l/pixfmt-013.rst 
b/Documentation/media/uapi/v4l/pixfmt-013.rst
index 728d7ed..abec039 100644
--- a/Documentation/media/uapi/v4l/pixfmt-013.rst
+++ b/Documentation/media/uapi/v4l/pixfmt-013.rst
@@ -90,3 +90,8 @@ Compressed Formats
   - ``V4L2_PIX_FMT_VP9``
   - 'VP90'
   - VP9 video elementary stream.
+* .. _V4L2-PIX-FMT-HEVC:
+
+  - ``V4L2_PIX_FMT_HEVC``
+  - 'HEVC'
+  - HEVC/H.265 video elementary stream.
-- 
2.7.4

[Patch v5 06/12] [media] v4l2-ioctl: add HEVC format description

[Smitha T Murthy]

HEVC is a video coding format

Signed-off-by: Smitha T Murthy 
---
 drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c 
b/drivers/media/v4l2-core/v4l2-ioctl.c
index e5a2187..4f6f8d9 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1257,6 +1257,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_PIX_FMT_VC1_ANNEX_L:  descr = "VC-1 (SMPTE 412M Annex 
L)"; break;
case V4L2_PIX_FMT_VP8:  descr = "VP8"; break;
case V4L2_PIX_FMT_VP9:  descr = "VP9"; break;
+   case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break;
case V4L2_PIX_FMT_CPIA1:descr = "GSPCA CPiA YUV"; break;
case V4L2_PIX_FMT_WNVA: descr = "WNVA"; break;
case V4L2_PIX_FMT_SN9C10X:  descr = "GSPCA SN9C10X"; break;
-- 
2.7.4

[Patch v5 06/12] [media] v4l2-ioctl: add HEVC format description

[Smitha T Murthy]

HEVC is a video coding format

Signed-off-by: Smitha T Murthy 
---
 drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c 
b/drivers/media/v4l2-core/v4l2-ioctl.c
index e5a2187..4f6f8d9 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1257,6 +1257,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_PIX_FMT_VC1_ANNEX_L:  descr = "VC-1 (SMPTE 412M Annex 
L)"; break;
case V4L2_PIX_FMT_VP8:  descr = "VP8"; break;
case V4L2_PIX_FMT_VP9:  descr = "VP9"; break;
+   case V4L2_PIX_FMT_HEVC: descr = "HEVC"; break;
case V4L2_PIX_FMT_CPIA1:descr = "GSPCA CPiA YUV"; break;
case V4L2_PIX_FMT_WNVA: descr = "WNVA"; break;
case V4L2_PIX_FMT_SN9C10X:  descr = "GSPCA SN9C10X"; break;
-- 
2.7.4

[Patch v5 11/12] [media] s5p-mfc: Add support for HEVC encoder

[Smitha T Murthy]

Add HEVC encoder support and necessary registers, V4L2 CIDs,
and hevc encoder parameters

Signed-off-by: Smitha T Murthy 
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  28 +-
 drivers/media/platform/s5p-mfc/s5p_mfc.c|   1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |   3 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  53 ++-
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c| 521 
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|   8 +
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 168 
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |   8 +
 8 files changed, 788 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 6754477..7065b9d 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -20,13 +20,35 @@
 #define S5P_FIMV_MFC_STATE_V10 0x7124
 #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10  0xF570
 #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10  0xF574
+#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10  0xFBB0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10  0xFBB4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10  0xFBB8
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10  0xFBBC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10  0xFBC0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10  0xFBC4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10  0xFBC8
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V100xFD18
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V100xFD1C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V100xFD20
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V100xFD24
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V100xFD28
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V100xFD2C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V100xFD30
+#define S5P_FIMV_E_HEVC_OPTIONS_V100xFDD4
+#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8
+#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10   0xFDDC
+#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V100xFDE0
+#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10  0xFDE4
+#define S5P_FIMV_E_HEVC_NAL_CONTROL_V100xFDE8
 
 /* MFCv10 Context buffer sizes */
 #define MFC_CTX_BUF_SIZE_V10   (30 * SZ_1K)
 #define MFC_H264_DEC_CTX_BUF_SIZE_V10  (2 * SZ_1M)
 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
 #define MFC_H264_ENC_CTX_BUF_SIZE_V10  (100 * SZ_1K)
-#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
+#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10  (30 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10  (15 * SZ_1K)
 
 /* MFCv10 variant defines */
 #define MAX_FW_SIZE_V10(SZ_1M)
@@ -58,5 +80,9 @@
 #define ENC_V100_VP8_ME_SIZE(x, y) \
ENC_V100_BASE_SIZE(x, y)
 
+#define ENC_V100_HEVC_ME_SIZE(x, y)\
+   (((x + 3) * (y + 3) * 32)   \
++ ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
+
 #endif /*_REGS_MFC_V10_H*/
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index efc36b0..742c2b7 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1621,6 +1621,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
.h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
.other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
.h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+   .hevc_enc_ctx   = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
.other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
 };
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 102b47e..7521fce 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VP8_ENC:
codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
break;
+   case S5P_MFC_CODEC_HEVC_ENC:
+   codec_type = S5P_FIMV_CODEC_HEVC_ENC;
+   break;
default:
codec_type = S5P_FIMV_CODEC_NONE_V6;
}
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index b49f220..c1ae4f4 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -61,7 +61,7 @@
 #define MFC_ENC_CAP_PLANE_COUNT1
 #define MFC_ENC_OUT_PLANE_COUNT2
 #define STUFF_BYTE 4
-#define MFC_MAX_CTRLS  77
+#define MFC_MAX_CTRLS  128
 
 #define S5P_MFC_CODEC_NONE -1
 #define S5P_MFC_CODEC_H264_DEC  

[Patch v5 11/12] [media] s5p-mfc: Add support for HEVC encoder

[Smitha T Murthy]

Add HEVC encoder support and necessary registers, V4L2 CIDs,
and hevc encoder parameters

Signed-off-by: Smitha T Murthy 
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  28 +-
 drivers/media/platform/s5p-mfc/s5p_mfc.c|   1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |   3 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  53 ++-
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c| 521 
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|   8 +
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 168 
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |   8 +
 8 files changed, 788 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 6754477..7065b9d 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -20,13 +20,35 @@
 #define S5P_FIMV_MFC_STATE_V10 0x7124
 #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10  0xF570
 #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10  0xF574
+#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10  0xFBB0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10  0xFBB4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10  0xFBB8
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10  0xFBBC
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10  0xFBC0
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10  0xFBC4
+#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10  0xFBC8
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V100xFD18
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V100xFD1C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V100xFD20
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V100xFD24
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V100xFD28
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V100xFD2C
+#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V100xFD30
+#define S5P_FIMV_E_HEVC_OPTIONS_V100xFDD4
+#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8
+#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10   0xFDDC
+#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V100xFDE0
+#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10  0xFDE4
+#define S5P_FIMV_E_HEVC_NAL_CONTROL_V100xFDE8
 
 /* MFCv10 Context buffer sizes */
 #define MFC_CTX_BUF_SIZE_V10   (30 * SZ_1K)
 #define MFC_H264_DEC_CTX_BUF_SIZE_V10  (2 * SZ_1M)
 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
 #define MFC_H264_ENC_CTX_BUF_SIZE_V10  (100 * SZ_1K)
-#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
+#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10  (30 * SZ_1K)
+#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10  (15 * SZ_1K)
 
 /* MFCv10 variant defines */
 #define MAX_FW_SIZE_V10(SZ_1M)
@@ -58,5 +80,9 @@
 #define ENC_V100_VP8_ME_SIZE(x, y) \
ENC_V100_BASE_SIZE(x, y)
 
+#define ENC_V100_HEVC_ME_SIZE(x, y)\
+   (((x + 3) * (y + 3) * 32)   \
++ ((y * 128) + 1280) * DIV_ROUND_UP(x, 4))
+
 #endif /*_REGS_MFC_V10_H*/
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc.c
index efc36b0..742c2b7 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c
@@ -1621,6 +1621,7 @@ static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
.h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V10,
.other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
.h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V10,
+   .hevc_enc_ctx   = MFC_HEVC_ENC_CTX_BUF_SIZE_V10,
.other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
 };
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index 102b47e..7521fce 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VP8_ENC:
codec_type = S5P_FIMV_CODEC_VP8_ENC_V7;
break;
+   case S5P_MFC_CODEC_HEVC_ENC:
+   codec_type = S5P_FIMV_CODEC_HEVC_ENC;
+   break;
default:
codec_type = S5P_FIMV_CODEC_NONE_V6;
}
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index b49f220..c1ae4f4 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -61,7 +61,7 @@
 #define MFC_ENC_CAP_PLANE_COUNT1
 #define MFC_ENC_OUT_PLANE_COUNT2
 #define STUFF_BYTE 4
-#define MFC_MAX_CTRLS  77
+#define MFC_MAX_CTRLS  128
 
 #define S5P_MFC_CODEC_NONE -1
 #define S5P_MFC_CODEC_H264_DEC 0
@@ -80,6 +80,7 

[Patch v5 10/12] [media] v4l2: Add v4l2 control IDs for HEVC encoder

[Smitha T Murthy]

Add v4l2 controls for HEVC encoder

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++
 include/uapi/linux/v4l2-controls.h   |  84 
 2 files changed, 187 insertions(+)

diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c 
b/drivers/media/v4l2-core/v4l2-ctrls.c
index ec42872..6a7e732 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -479,6 +479,51 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
NULL,
};
 
+   static const char * const hevc_profile[] = {
+   "Main",
+   "Main Still Picture",
+   NULL,
+   };
+   static const char * const hevc_level[] = {
+   "1",
+   "2",
+   "2.1",
+   "3",
+   "3.1",
+   "4",
+   "4.1",
+   "5",
+   "5.1",
+   "5.2",
+   "6",
+   "6.1",
+   "6.2",
+   NULL,
+   };
+   static const char * const hevc_hierarchial_coding_type[] = {
+   "B",
+   "P",
+   NULL,
+   };
+   static const char * const hevc_refresh_type[] = {
+   "None",
+   "CRA",
+   "IDR",
+   NULL,
+   };
+   static const char * const hevc_size_of_length_field[] = {
+   "0",
+   "1",
+   "2",
+   "4",
+   NULL,
+   };
+   static const char * const hevc_tier_flag[] = {
+   "Main",
+   "High",
+   NULL,
+   };
+
 
switch (id) {
case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
@@ -574,6 +619,18 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
return dv_it_content_type;
case V4L2_CID_DETECT_MD_MODE:
return detect_md_mode;
+   case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+   return hevc_profile;
+   case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+   return hevc_level;
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
+   return hevc_hierarchial_coding_type;
+   case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+   return hevc_refresh_type;
+   case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+   return hevc_size_of_length_field;
+   case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
+   return hevc_tier_flag;
 
default:
return NULL;
@@ -775,6 +832,46 @@ const char *v4l2_ctrl_get_name(u32 id)
case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:return "VPX 
P-Frame QP Value";
case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:   return "VPX 
Profile";
 
+   /* HEVC controls */
+   case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:   return "HEVC 
I-Frame QP Value";
+   case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:   return "HEVC 
P-Frame QP Value";
+   case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:   return "HEVC 
B-Frame QP Value";
+   case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:   return "HEVC 
Minimum QP Value";
+   case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:   return "HEVC 
Maximum QP Value";
+   case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:  return "HEVC 
Profile";
+   case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:return "HEVC 
Level";
+   case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:return "HEVC 
Tier_flag";
+   case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:return "HEVC 
Frame Rate Resolution";
+   case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:  return "HEVC 
Maximum Coding Unit Depth";
+   case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE: return "HEVC 
Refresh Type";
+   case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED: return "HEVC 
Constant Intra Prediction";
+   case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:  return "HEVC 
Lossless Encoding";
+   case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:return "HEVC 
Wavefront";
+   case V4L2_CID_MPEG_VIDEO_HEVC_LF:   return "HEVC 
Loop Filter";
+   case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:return "HEVC LF 
Across Slice Boundary";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP:  return "HEVC QP 
Values";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: return "HEVC 
Hierarchical Coding Type";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER:return "HEVC 
Hierarchical Coding Layer";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP: return "HEVC 
Hierarchical Layer QP";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR:return "HEVC 
Hierarchical Lay 0 Bit Rate";
+   case 

[Patch v5 10/12] [media] v4l2: Add v4l2 control IDs for HEVC encoder

[Smitha T Murthy]

Add v4l2 controls for HEVC encoder

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 drivers/media/v4l2-core/v4l2-ctrls.c | 103 +++
 include/uapi/linux/v4l2-controls.h   |  84 
 2 files changed, 187 insertions(+)

diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c 
b/drivers/media/v4l2-core/v4l2-ctrls.c
index ec42872..6a7e732 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -479,6 +479,51 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
NULL,
};
 
+   static const char * const hevc_profile[] = {
+   "Main",
+   "Main Still Picture",
+   NULL,
+   };
+   static const char * const hevc_level[] = {
+   "1",
+   "2",
+   "2.1",
+   "3",
+   "3.1",
+   "4",
+   "4.1",
+   "5",
+   "5.1",
+   "5.2",
+   "6",
+   "6.1",
+   "6.2",
+   NULL,
+   };
+   static const char * const hevc_hierarchial_coding_type[] = {
+   "B",
+   "P",
+   NULL,
+   };
+   static const char * const hevc_refresh_type[] = {
+   "None",
+   "CRA",
+   "IDR",
+   NULL,
+   };
+   static const char * const hevc_size_of_length_field[] = {
+   "0",
+   "1",
+   "2",
+   "4",
+   NULL,
+   };
+   static const char * const hevc_tier_flag[] = {
+   "Main",
+   "High",
+   NULL,
+   };
+
 
switch (id) {
case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ:
@@ -574,6 +619,18 @@ const char * const *v4l2_ctrl_get_menu(u32 id)
return dv_it_content_type;
case V4L2_CID_DETECT_MD_MODE:
return detect_md_mode;
+   case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
+   return hevc_profile;
+   case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
+   return hevc_level;
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE:
+   return hevc_hierarchial_coding_type;
+   case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE:
+   return hevc_refresh_type;
+   case V4L2_CID_MPEG_VIDEO_HEVC_SIZE_OF_LENGTH_FIELD:
+   return hevc_size_of_length_field;
+   case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:
+   return hevc_tier_flag;
 
default:
return NULL;
@@ -775,6 +832,46 @@ const char *v4l2_ctrl_get_name(u32 id)
case V4L2_CID_MPEG_VIDEO_VPX_P_FRAME_QP:return "VPX 
P-Frame QP Value";
case V4L2_CID_MPEG_VIDEO_VPX_PROFILE:   return "VPX 
Profile";
 
+   /* HEVC controls */
+   case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP:   return "HEVC 
I-Frame QP Value";
+   case V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP:   return "HEVC 
P-Frame QP Value";
+   case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP:   return "HEVC 
B-Frame QP Value";
+   case V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP:   return "HEVC 
Minimum QP Value";
+   case V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP:   return "HEVC 
Maximum QP Value";
+   case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:  return "HEVC 
Profile";
+   case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:return "HEVC 
Level";
+   case V4L2_CID_MPEG_VIDEO_HEVC_TIER_FLAG:return "HEVC 
Tier_flag";
+   case V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION:return "HEVC 
Frame Rate Resolution";
+   case V4L2_CID_MPEG_VIDEO_HEVC_MAX_PARTITION_DEPTH:  return "HEVC 
Maximum Coding Unit Depth";
+   case V4L2_CID_MPEG_VIDEO_HEVC_REFRESH_TYPE: return "HEVC 
Refresh Type";
+   case V4L2_CID_MPEG_VIDEO_HEVC_CONST_INTRA_PRED: return "HEVC 
Constant Intra Prediction";
+   case V4L2_CID_MPEG_VIDEO_HEVC_LOSSLESS_CU:  return "HEVC 
Lossless Encoding";
+   case V4L2_CID_MPEG_VIDEO_HEVC_WAVEFRONT:return "HEVC 
Wavefront";
+   case V4L2_CID_MPEG_VIDEO_HEVC_LF:   return "HEVC 
Loop Filter";
+   case V4L2_CID_MPEG_VIDEO_HEVC_LF_SLICE_BOUNDARY:return "HEVC LF 
Across Slice Boundary";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP:  return "HEVC QP 
Values";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: return "HEVC 
Hierarchical Coding Type";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER:return "HEVC 
Hierarchical Coding Layer";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP: return "HEVC 
Hierarchical Layer QP";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR:return "HEVC 
Hierarchical Lay 0 Bit Rate";
+   case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: 

[Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs

[Smitha T Murthy]

Added V4l2 controls for HEVC encoder

Signed-off-by: Smitha T Murthy 
---
 Documentation/media/uapi/v4l/extended-controls.rst | 364 +
 1 file changed, 364 insertions(+)

diff --git a/Documentation/media/uapi/v4l/extended-controls.rst 
b/Documentation/media/uapi/v4l/extended-controls.rst
index abb1057..7767c70 100644
--- a/Documentation/media/uapi/v4l/extended-controls.rst
+++ b/Documentation/media/uapi/v4l/extended-controls.rst
@@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
 
 
+High Efficiency Video Coding (HEVC/H.265) Control Reference
+---
+
+The HEVC/H.265 controls include controls for encoding parameters of HEVC/H.265
+video codec.
+
+
+.. _hevc-control-id:
+
+HEVC/H.265 Control IDs
+^^
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (integer)``
+Minimum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (integer)``
+Maximum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (integer)``
+Quantization parameter for an I frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (integer)``
+Quantization parameter for a P frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (integer)``
+Quantization parameter for a B frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (boolean)``
+HIERARCHICAL_QP allows host to specify the quantization parameter values
+for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
+if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the control value
+to 1 enables setting of the QP values for the layers.
+
+.. _v4l2-hevc-hier-coding-type:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE``
+(enum)
+
+enum v4l2_mpeg_video_hevc_hier_coding_type -
+Selects the hierarchical coding type for encoding. Possible values are:
+
+.. raw:: latex
+
+\begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+:header-rows:  0
+:stub-columns: 0
+
+* - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
+  - Use the B frame for hierarchical coding.
+* - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
+  - Use the P frame for hierarchical coding.
+
+.. raw:: latex
+
+\end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
+Selects the hierarchical coding layer. In normal encoding
+(non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
+0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
+LAYER 1 and so on.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (integer)``
+Indicates the hierarchical coding layer quantization parameter.
+For HEVC it can have a value of 0-51. Hence in the control value passed
+the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
+will pass the layer(0-6) it is meant for.
+
+.. _v4l2-hevc-profile:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
+(enum)
+
+enum v4l2_mpeg_video_hevc_profile -
+Select the desired profile for HEVC encoder.
+
+.. raw:: latex
+
+\begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+:header-rows:  0
+:stub-columns: 0
+
+* - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
+  - Main profile.
+* - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
+  - Main still picture profile.
+
+.. raw:: latex
+
+\end{adjustbox}
+
+
+.. _v4l2-hevc-level:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
+(enum)
+
+enum v4l2_mpeg_video_hevc_level -
+Selects the desired level for HEVC encoder.
+
+.. raw:: latex
+
+\begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+:header-rows:  0
+:stub-columns: 0
+
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
+  - Level 1.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
+  - Level 2.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
+  - Level 2.1
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
+  - Level 3.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
+  - Level 3.1
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
+  - Level 4.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
+  - Level 4.1
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
+  - Level 5.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
+  - Level 5.1
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
+  - Level 5.2
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
+  - Level 6.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
+  - Level 6.1
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
+  - Level 6.2
+
+.. raw:: latex
+
+\end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (integer)``
+Indicates the number of evenly spaced subintervals, called ticks, within
+one second. This is a 16bit unsigned integer and has a maximum value up to
+0x.

[Patch v5 12/12] Documention: v4l: Documentation for HEVC CIDs

[Smitha T Murthy]

Added V4l2 controls for HEVC encoder

Signed-off-by: Smitha T Murthy 
---
 Documentation/media/uapi/v4l/extended-controls.rst | 364 +
 1 file changed, 364 insertions(+)

diff --git a/Documentation/media/uapi/v4l/extended-controls.rst 
b/Documentation/media/uapi/v4l/extended-controls.rst
index abb1057..7767c70 100644
--- a/Documentation/media/uapi/v4l/extended-controls.rst
+++ b/Documentation/media/uapi/v4l/extended-controls.rst
@@ -1960,6 +1960,370 @@ enum v4l2_vp8_golden_frame_sel -
 1, 2 and 3 corresponding to encoder profiles 0, 1, 2 and 3.
 
 
+High Efficiency Video Coding (HEVC/H.265) Control Reference
+---
+
+The HEVC/H.265 controls include controls for encoding parameters of HEVC/H.265
+video codec.
+
+
+.. _hevc-control-id:
+
+HEVC/H.265 Control IDs
+^^
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MIN_QP (integer)``
+Minimum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_MAX_QP (integer)``
+Maximum quantization parameter for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP (integer)``
+Quantization parameter for an I frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_P_FRAME_QP (integer)``
+Quantization parameter for a P frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP (integer)``
+Quantization parameter for a B frame for HEVC.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_QP (boolean)``
+HIERARCHICAL_QP allows host to specify the quantization parameter values
+for each temporal layer through HIERARCHICAL_QP_LAYER. This is valid only
+if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the control value
+to 1 enables setting of the QP values for the layers.
+
+.. _v4l2-hevc-hier-coding-type:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE``
+(enum)
+
+enum v4l2_mpeg_video_hevc_hier_coding_type -
+Selects the hierarchical coding type for encoding. Possible values are:
+
+.. raw:: latex
+
+\begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+:header-rows:  0
+:stub-columns: 0
+
+* - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B``
+  - Use the B frame for hierarchical coding.
+* - ``V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P``
+  - Use the P frame for hierarchical coding.
+
+.. raw:: latex
+
+\end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER (integer)``
+Selects the hierarchical coding layer. In normal encoding
+(non-hierarchial coding), it should be zero. Possible values are 0 ~ 6.
+0 indicates HIERARCHICAL CODING LAYER 0, 1 indicates HIERARCHICAL CODING
+LAYER 1 and so on.
+
+``V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER_QP (integer)``
+Indicates the hierarchical coding layer quantization parameter.
+For HEVC it can have a value of 0-51. Hence in the control value passed
+the LSB 16 bits will indicate the quantization parameter. The MSB 16 bit
+will pass the layer(0-6) it is meant for.
+
+.. _v4l2-hevc-profile:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_PROFILE``
+(enum)
+
+enum v4l2_mpeg_video_hevc_profile -
+Select the desired profile for HEVC encoder.
+
+.. raw:: latex
+
+\begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+:header-rows:  0
+:stub-columns: 0
+
+* - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN``
+  - Main profile.
+* - ``V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE``
+  - Main still picture profile.
+
+.. raw:: latex
+
+\end{adjustbox}
+
+
+.. _v4l2-hevc-level:
+
+``V4L2_CID_MPEG_VIDEO_HEVC_LEVEL``
+(enum)
+
+enum v4l2_mpeg_video_hevc_level -
+Selects the desired level for HEVC encoder.
+
+.. raw:: latex
+
+\begin{adjustbox}{width=\columnwidth}
+
+.. tabularcolumns:: |p{11.0cm}|p{10.0cm}|
+
+.. flat-table::
+:header-rows:  0
+:stub-columns: 0
+
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_1``
+  - Level 1.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2``
+  - Level 2.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1``
+  - Level 2.1
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3``
+  - Level 3.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1``
+  - Level 3.1
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4``
+  - Level 4.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1``
+  - Level 4.1
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5``
+  - Level 5.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1``
+  - Level 5.1
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2``
+  - Level 5.2
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6``
+  - Level 6.0
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1``
+  - Level 6.1
+* - ``V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2``
+  - Level 6.2
+
+.. raw:: latex
+
+\end{adjustbox}
+
+
+``V4L2_CID_MPEG_VIDEO_HEVC_FRAME_RATE_RESOLUTION (integer)``
+Indicates the number of evenly spaced subintervals, called ticks, within
+one second. This is a 16bit unsigned integer and has a maximum value up to
+0x.
+
+.. 

[Patch v5 08/12] [media] s5p-mfc: Add support for HEVC decoder

[Smitha T Murthy]

Add support for codec definition and corresponding buffer
requirements for HEVC decoder.

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c|  7 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 17 +++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  3 +++
 6 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 3f0dab3..953a073 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -33,6 +33,7 @@
 #define MFC_NUM_PORTS_V10  1
 
 /* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_DEC17
 #define S5P_FIMV_CODEC_HEVC_ENC 26
 
 /* Encoder buffer size for MFC v10.0 */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index b1b1491..76eca67 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VP8_DEC:
codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
break;
+   case S5P_MFC_CODEC_HEVC_DEC:
+   codec_type = S5P_FIMV_CODEC_HEVC_DEC;
+   break;
case S5P_MFC_CODEC_H264_ENC:
codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index e65e1c3..828e07e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -72,6 +72,7 @@
 #define S5P_MFC_CODEC_H263_DEC 5
 #define S5P_MFC_CODEC_VC1RCV_DEC   6
 #define S5P_MFC_CODEC_VP8_DEC  7
+#define S5P_MFC_CODEC_HEVC_DEC 17
 
 #define S5P_MFC_CODEC_H264_ENC 20
 #define S5P_MFC_CODEC_H264_MVC_ENC 21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 81de3029..4749355 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -144,6 +144,13 @@ static struct s5p_mfc_fmt formats[] = {
.num_planes = 1,
.versions   = MFC_V6PLUS_BITS,
},
+   {
+   .fourcc = V4L2_PIX_FMT_HEVC,
+   .codec_mode = S5P_FIMV_CODEC_HEVC_DEC,
+   .type   = MFC_FMT_DEC,
+   .num_planes = 1,
+   .versions   = MFC_V10_BIT,
+   },
 };
 
 #define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 83ea733..ed725db 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -220,6 +220,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
s5p_mfc_ctx *ctx)
S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
ctx->bank1.size = ctx->scratch_buf_size;
break;
+   case S5P_MFC_CODEC_HEVC_DEC:
+   mfc_debug(2, "Use min scratch buffer size\n");
+   ctx->bank1.size =
+   ctx->scratch_buf_size +
+   (ctx->mv_count * ctx->mv_size);
+   break;
case S5P_MFC_CODEC_H264_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
@@ -321,6 +327,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct 
s5p_mfc_ctx *ctx)
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
+   case S5P_MFC_CODEC_HEVC_DEC:
ctx->ctx.size = buf_size->h264_dec_ctx;
break;
case S5P_MFC_CODEC_MPEG4_DEC:
@@ -434,6 +441,10 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct 
s5p_mfc_ctx *ctx)
ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
ctx->img_height);
}
+   } else if (ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
+   ctx->mv_size = s5p_mfc_dec_hevc_mv_size(ctx->img_width,
+   ctx->img_height);
+   ctx->mv_size = ALIGN(ctx->mv_size, 32);
} else {
ctx->mv_size = 0;
}
@@ -515,7 +526,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct 
s5p_mfc_ctx *ctx)
buf_size1 -= ctx->scratch_buf_size;
 
if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC ||
-   

[Patch v5 08/12] [media] s5p-mfc: Add support for HEVC decoder

[Smitha T Murthy]

Add support for codec definition and corresponding buffer
requirements for HEVC decoder.

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |  3 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h |  1 +
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c|  7 +++
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 17 +++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  3 +++
 6 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 3f0dab3..953a073 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -33,6 +33,7 @@
 #define MFC_NUM_PORTS_V10  1
 
 /* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_DEC17
 #define S5P_FIMV_CODEC_HEVC_ENC 26
 
 /* Encoder buffer size for MFC v10.0 */
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
index b1b1491..76eca67 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c
@@ -101,6 +101,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx)
case S5P_MFC_CODEC_VP8_DEC:
codec_type = S5P_FIMV_CODEC_VP8_DEC_V6;
break;
+   case S5P_MFC_CODEC_HEVC_DEC:
+   codec_type = S5P_FIMV_CODEC_HEVC_DEC;
+   break;
case S5P_MFC_CODEC_H264_ENC:
codec_type = S5P_FIMV_CODEC_H264_ENC_V6;
break;
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 
b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
index e65e1c3..828e07e 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h
@@ -72,6 +72,7 @@
 #define S5P_MFC_CODEC_H263_DEC 5
 #define S5P_MFC_CODEC_VC1RCV_DEC   6
 #define S5P_MFC_CODEC_VP8_DEC  7
+#define S5P_MFC_CODEC_HEVC_DEC 17
 
 #define S5P_MFC_CODEC_H264_ENC 20
 #define S5P_MFC_CODEC_H264_MVC_ENC 21
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
index 81de3029..4749355 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
@@ -144,6 +144,13 @@ static struct s5p_mfc_fmt formats[] = {
.num_planes = 1,
.versions   = MFC_V6PLUS_BITS,
},
+   {
+   .fourcc = V4L2_PIX_FMT_HEVC,
+   .codec_mode = S5P_FIMV_CODEC_HEVC_DEC,
+   .type   = MFC_FMT_DEC,
+   .num_planes = 1,
+   .versions   = MFC_V10_BIT,
+   },
 };
 
 #define NUM_FORMATS ARRAY_SIZE(formats)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index 83ea733..ed725db 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -220,6 +220,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
s5p_mfc_ctx *ctx)
S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6);
ctx->bank1.size = ctx->scratch_buf_size;
break;
+   case S5P_MFC_CODEC_HEVC_DEC:
+   mfc_debug(2, "Use min scratch buffer size\n");
+   ctx->bank1.size =
+   ctx->scratch_buf_size +
+   (ctx->mv_count * ctx->mv_size);
+   break;
case S5P_MFC_CODEC_H264_ENC:
if (IS_MFCV10(dev)) {
mfc_debug(2, "Use min scratch buffer size\n");
@@ -321,6 +327,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct 
s5p_mfc_ctx *ctx)
switch (ctx->codec_mode) {
case S5P_MFC_CODEC_H264_DEC:
case S5P_MFC_CODEC_H264_MVC_DEC:
+   case S5P_MFC_CODEC_HEVC_DEC:
ctx->ctx.size = buf_size->h264_dec_ctx;
break;
case S5P_MFC_CODEC_MPEG4_DEC:
@@ -434,6 +441,10 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct 
s5p_mfc_ctx *ctx)
ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
ctx->img_height);
}
+   } else if (ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) {
+   ctx->mv_size = s5p_mfc_dec_hevc_mv_size(ctx->img_width,
+   ctx->img_height);
+   ctx->mv_size = ALIGN(ctx->mv_size, 32);
} else {
ctx->mv_size = 0;
}
@@ -515,7 +526,8 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct 
s5p_mfc_ctx *ctx)
buf_size1 -= ctx->scratch_buf_size;
 
if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC ||
-   ctx->codec_mode == 

[Patch v5 04/12] [media] s5p-mfc: Support MFCv10.10 buffer requirements

[Smitha T Murthy]

Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
for MFCv10.10.

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   | 19 +
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 95 +++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  2 +
 3 files changed, 95 insertions(+), 21 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 1ca09d6..3f0dab3 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -32,5 +32,24 @@
 #define MFC_VERSION_V100xA0
 #define MFC_NUM_PORTS_V10  1
 
+/* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_ENC 26
+
+/* Encoder buffer size for MFC v10.0 */
+#define ENC_V100_BASE_SIZE(x, y) \
+   (((x + 3) * (y + 3) * 8) \
+   +  ((y * 64) + 1280) * DIV_ROUND_UP(x, 8))
+
+#define ENC_V100_H264_ME_SIZE(x, y) \
+   (ENC_V100_BASE_SIZE(x, y) \
+   + (DIV_ROUND_UP(x * y, 64) * 32))
+
+#define ENC_V100_MPEG4_ME_SIZE(x, y) \
+   (ENC_V100_BASE_SIZE(x, y) \
+   + (DIV_ROUND_UP(x * y, 128) * 16))
+
+#define ENC_V100_VP8_ME_SIZE(x, y) \
+   ENC_V100_BASE_SIZE(x, y)
+
 #endif /*_REGS_MFC_V10_H*/
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index f1a8c53..83ea733 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -64,6 +64,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx 
*ctx)
 {
struct s5p_mfc_dev *dev = ctx->dev;
unsigned int mb_width, mb_height;
+   unsigned int lcu_width = 0, lcu_height = 0;
int ret;
 
mb_width = MB_WIDTH(ctx->img_width);
@@ -74,7 +75,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx 
*ctx)
  ctx->luma_size, ctx->chroma_size, ctx->mv_size);
mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
} else if (ctx->type == MFCINST_ENCODER) {
-   if (IS_MFCV8_PLUS(dev))
+   if (IS_MFCV10(dev)) {
+   ctx->tmv_buffer_size = 0;
+   } else if (IS_MFCV8_PLUS(dev))
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -82,13 +85,36 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
s5p_mfc_ctx *ctx)
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
-
-   ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
-   S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
-   S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
-   ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
-   S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
-   S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
+   if (IS_MFCV10(dev)) {
+   lcu_width = enc_lcu_width(ctx->img_width);
+   lcu_height = enc_lcu_height(ctx->img_height);
+   if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
+   ctx->luma_dpb_size =
+   ALIGN((mb_width * 16), 64)
+   * ALIGN((mb_height * 16), 32)
+   + 64;
+   ctx->chroma_dpb_size =
+   ALIGN((mb_width * 16), 64)
+   * (mb_height * 8)
+   + 64;
+   } else {
+   ctx->luma_dpb_size =
+   ALIGN((lcu_width * 32), 64)
+   * ALIGN((lcu_height * 32), 32)
+   + 64;
+   ctx->chroma_dpb_size =
+   ALIGN((lcu_width * 32), 64)
+   * (lcu_height * 16)
+   + 64;
+   }
+   } else {
+   ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
+   S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
+   S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
+   ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
+   S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,

[Patch v5 04/12] [media] s5p-mfc: Support MFCv10.10 buffer requirements

[Smitha T Murthy]

Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
for MFCv10.10.

Signed-off-by: Smitha T Murthy 
Reviewed-by: Andrzej Hajda 
---
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h   | 19 +
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 95 +++--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |  2 +
 3 files changed, 95 insertions(+), 21 deletions(-)

diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h 
b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
index 1ca09d6..3f0dab3 100644
--- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
+++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h
@@ -32,5 +32,24 @@
 #define MFC_VERSION_V100xA0
 #define MFC_NUM_PORTS_V10  1
 
+/* MFCv10 codec defines*/
+#define S5P_FIMV_CODEC_HEVC_ENC 26
+
+/* Encoder buffer size for MFC v10.0 */
+#define ENC_V100_BASE_SIZE(x, y) \
+   (((x + 3) * (y + 3) * 8) \
+   +  ((y * 64) + 1280) * DIV_ROUND_UP(x, 8))
+
+#define ENC_V100_H264_ME_SIZE(x, y) \
+   (ENC_V100_BASE_SIZE(x, y) \
+   + (DIV_ROUND_UP(x * y, 64) * 32))
+
+#define ENC_V100_MPEG4_ME_SIZE(x, y) \
+   (ENC_V100_BASE_SIZE(x, y) \
+   + (DIV_ROUND_UP(x * y, 128) * 16))
+
+#define ENC_V100_VP8_ME_SIZE(x, y) \
+   ENC_V100_BASE_SIZE(x, y)
+
 #endif /*_REGS_MFC_V10_H*/
 
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c 
b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
index f1a8c53..83ea733 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c
@@ -64,6 +64,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx 
*ctx)
 {
struct s5p_mfc_dev *dev = ctx->dev;
unsigned int mb_width, mb_height;
+   unsigned int lcu_width = 0, lcu_height = 0;
int ret;
 
mb_width = MB_WIDTH(ctx->img_width);
@@ -74,7 +75,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx 
*ctx)
  ctx->luma_size, ctx->chroma_size, ctx->mv_size);
mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count);
} else if (ctx->type == MFCINST_ENCODER) {
-   if (IS_MFCV8_PLUS(dev))
+   if (IS_MFCV10(dev)) {
+   ctx->tmv_buffer_size = 0;
+   } else if (IS_MFCV8_PLUS(dev))
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
@@ -82,13 +85,36 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct 
s5p_mfc_ctx *ctx)
ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 *
ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height),
S5P_FIMV_TMV_BUFFER_ALIGN_V6);
-
-   ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
-   S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
-   S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
-   ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
-   S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
-   S5P_FIMV_CHROMA_DPB_BUFFER_ALIGN_V6);
+   if (IS_MFCV10(dev)) {
+   lcu_width = enc_lcu_width(ctx->img_width);
+   lcu_height = enc_lcu_height(ctx->img_height);
+   if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) {
+   ctx->luma_dpb_size =
+   ALIGN((mb_width * 16), 64)
+   * ALIGN((mb_height * 16), 32)
+   + 64;
+   ctx->chroma_dpb_size =
+   ALIGN((mb_width * 16), 64)
+   * (mb_height * 8)
+   + 64;
+   } else {
+   ctx->luma_dpb_size =
+   ALIGN((lcu_width * 32), 64)
+   * ALIGN((lcu_height * 32), 32)
+   + 64;
+   ctx->chroma_dpb_size =
+   ALIGN((lcu_width * 32), 64)
+   * (lcu_height * 16)
+   + 64;
+   }
+   } else {
+   ctx->luma_dpb_size = ALIGN((mb_width * mb_height) *
+   S5P_FIMV_LUMA_MB_TO_PIXEL_V6,
+   S5P_FIMV_LUMA_DPB_BUFFER_ALIGN_V6);
+   ctx->chroma_dpb_size = ALIGN((mb_width * mb_height) *
+   S5P_FIMV_CHROMA_MB_TO_PIXEL_V6,
+   

[Patch v5 00/12] Add MFC v10.10 support

[Smitha T Murthy]

This patch series adds MFC v10.10 support. MFC v10.10 is used in some  
of Exynos7 variants.

This adds support for following:

* Add support for HEVC encoder and decoder
* Add support for VP9 decoder
* Update Documentation for control id definitions
* Update computation of min scratch buffer size requirement for V8 onwards

Changes since v4:
 - Addressed review comments by Sylwester Nawrocki.
 - Addressed review comments by Hans Verkuil.
 - Rebased on latest git://linuxtv.org/snawrocki/samsung.git
   for-v4.13/media/next and for-v4.12/media/next-2 branches,
   the same series of patches applies on both branches.
 - Applied r-o-b from Andrzej on respective patches.
 - Built and checked the Documentation.

Smitha T Murthy (12):
  [media] s5p-mfc: Rename IS_MFCV8 macro
  [media] s5p-mfc: Adding initial support for MFC v10.10
  [media] s5p-mfc: Use min scratch buffer size as provided by F/W
  [media] s5p-mfc: Support MFCv10.10 buffer requirements
  [media] videodev2.h: Add v4l2 definition for HEVC
  [media] v4l2-ioctl: add HEVC format description
  Documentation: v4l: Documentation for HEVC v4l2 definition
  [media] s5p-mfc: Add support for HEVC decoder
  [media] s5p-mfc: Add VP9 decoder support
  [media] v4l2: Add v4l2 control IDs for HEVC encoder
  [media] s5p-mfc: Add support for HEVC encoder
  Documention: v4l: Documentation for HEVC CIDs

 .../devicetree/bindings/media/s5p-mfc.txt  |   1 +
 Documentation/media/uapi/v4l/extended-controls.rst | 364 ++
 Documentation/media/uapi/v4l/pixfmt-013.rst|   5 +
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h  |  88 
 drivers/media/platform/s5p-mfc/regs-mfc-v8.h   |   2 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c   |  28 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c|   9 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h|  67 ++-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c  |   6 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c   |  48 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c   | 542 -
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h   |  14 +
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c| 383 +--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h|  15 +
 drivers/media/v4l2-core/v4l2-ctrls.c   | 103 
 drivers/media/v4l2-core/v4l2-ioctl.c   |   1 +
 include/uapi/linux/v4l2-controls.h |  84 
 include/uapi/linux/videodev2.h |   1 +
 18 files changed, 1684 insertions(+), 77 deletions(-)
 create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h

-- 
2.7.4

[Patch v5 00/12] Add MFC v10.10 support

[Smitha T Murthy]

This patch series adds MFC v10.10 support. MFC v10.10 is used in some  
of Exynos7 variants.

This adds support for following:

* Add support for HEVC encoder and decoder
* Add support for VP9 decoder
* Update Documentation for control id definitions
* Update computation of min scratch buffer size requirement for V8 onwards

Changes since v4:
 - Addressed review comments by Sylwester Nawrocki.
 - Addressed review comments by Hans Verkuil.
 - Rebased on latest git://linuxtv.org/snawrocki/samsung.git
   for-v4.13/media/next and for-v4.12/media/next-2 branches,
   the same series of patches applies on both branches.
 - Applied r-o-b from Andrzej on respective patches.
 - Built and checked the Documentation.

Smitha T Murthy (12):
  [media] s5p-mfc: Rename IS_MFCV8 macro
  [media] s5p-mfc: Adding initial support for MFC v10.10
  [media] s5p-mfc: Use min scratch buffer size as provided by F/W
  [media] s5p-mfc: Support MFCv10.10 buffer requirements
  [media] videodev2.h: Add v4l2 definition for HEVC
  [media] v4l2-ioctl: add HEVC format description
  Documentation: v4l: Documentation for HEVC v4l2 definition
  [media] s5p-mfc: Add support for HEVC decoder
  [media] s5p-mfc: Add VP9 decoder support
  [media] v4l2: Add v4l2 control IDs for HEVC encoder
  [media] s5p-mfc: Add support for HEVC encoder
  Documention: v4l: Documentation for HEVC CIDs

 .../devicetree/bindings/media/s5p-mfc.txt  |   1 +
 Documentation/media/uapi/v4l/extended-controls.rst | 364 ++
 Documentation/media/uapi/v4l/pixfmt-013.rst|   5 +
 drivers/media/platform/s5p-mfc/regs-mfc-v10.h  |  88 
 drivers/media/platform/s5p-mfc/regs-mfc-v8.h   |   2 +
 drivers/media/platform/s5p-mfc/s5p_mfc.c   |  28 ++
 drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c|   9 +
 drivers/media/platform/s5p-mfc/s5p_mfc_common.h|  67 ++-
 drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c  |   6 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_dec.c   |  48 +-
 drivers/media/platform/s5p-mfc/s5p_mfc_enc.c   | 542 -
 drivers/media/platform/s5p-mfc/s5p_mfc_opr.h   |  14 +
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c| 383 +--
 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h|  15 +
 drivers/media/v4l2-core/v4l2-ctrls.c   | 103 
 drivers/media/v4l2-core/v4l2-ioctl.c   |   1 +
 include/uapi/linux/v4l2-controls.h |  84 
 include/uapi/linux/videodev2.h |   1 +
 18 files changed, 1684 insertions(+), 77 deletions(-)
 create mode 100644 drivers/media/platform/s5p-mfc/regs-mfc-v10.h

-- 
2.7.4

Re: [PATCH] serial: 8250: 8250_omap: Fix race b/w dma completion and RX timeout

[Vignesh R]

On Saturday 17 June 2017 08:07 PM, Andy Shevchenko wrote:
> On Sat, 2017-06-17 at 19:22 +0530, Vignesh R wrote:
>> DMA RX completion handler for UART is called from a tasklet and hence
>> may be delayed depending on the system load. In meanwhile, there may
>> be
>> RX timeout interrupt which can get serviced first before DMA RX
>> completion handler is executed for the completed transfer.
>> omap_8250_rx_dma_flush() which is called on RX timeout interrupt makes
>> sure that the DMA RX buffer is pushed and then the FIFO is drained and
>> also queues a new DMA request. But, when DMA RX completion handler
>> executes, it will erroneously flush the currently queued DMA transfer
>> which sometimes results in data corruption and double queueing of DMA
>> RX
>> requests.
>>
>> Fix this by checking whether RX completion is for the currently queued
>> transfer or not. And also hold port lock when in DMA completion to
>> avoid
>> race wrt RX timeout handler preempting it.
> 
> 
>>  static void __dma_rx_complete(void *param)
>>  {
>> -__dma_rx_do_complete(param);
>> -omap_8250_rx_dma(param);
>> +struct uart_8250_port *p = param;
>> +struct uart_8250_dma *dma = p->dma;
>> +unsigned long flags;
>> +
>> +spin_lock_irqsave(>port.lock, flags);
>> +
>> +/*
>> + * If the completion is for the current cookie then handle
>> it,
>> + * else a previous RX timeout flush would have already pushed
>> + * data from DMA buffers, so exit.
>> + */
> 
>> +if (dma->rx_cookie != dma->rxchan->completed_cookie) {
> 
> Wouldn't be better to call DMAEngine API for that?
> dmaengine_tx_status() I suppose

Yeah, will update the patch. Thanks!



-- 
Regards
Vignesh

Re: [PATCH] serial: 8250: 8250_omap: Fix race b/w dma completion and RX timeout

[Vignesh R]

On Saturday 17 June 2017 08:07 PM, Andy Shevchenko wrote:
> On Sat, 2017-06-17 at 19:22 +0530, Vignesh R wrote:
>> DMA RX completion handler for UART is called from a tasklet and hence
>> may be delayed depending on the system load. In meanwhile, there may
>> be
>> RX timeout interrupt which can get serviced first before DMA RX
>> completion handler is executed for the completed transfer.
>> omap_8250_rx_dma_flush() which is called on RX timeout interrupt makes
>> sure that the DMA RX buffer is pushed and then the FIFO is drained and
>> also queues a new DMA request. But, when DMA RX completion handler
>> executes, it will erroneously flush the currently queued DMA transfer
>> which sometimes results in data corruption and double queueing of DMA
>> RX
>> requests.
>>
>> Fix this by checking whether RX completion is for the currently queued
>> transfer or not. And also hold port lock when in DMA completion to
>> avoid
>> race wrt RX timeout handler preempting it.
> 
> 
>>  static void __dma_rx_complete(void *param)
>>  {
>> -__dma_rx_do_complete(param);
>> -omap_8250_rx_dma(param);
>> +struct uart_8250_port *p = param;
>> +struct uart_8250_dma *dma = p->dma;
>> +unsigned long flags;
>> +
>> +spin_lock_irqsave(>port.lock, flags);
>> +
>> +/*
>> + * If the completion is for the current cookie then handle
>> it,
>> + * else a previous RX timeout flush would have already pushed
>> + * data from DMA buffers, so exit.
>> + */
> 
>> +if (dma->rx_cookie != dma->rxchan->completed_cookie) {
> 
> Wouldn't be better to call DMAEngine API for that?
> dmaengine_tx_status() I suppose

Yeah, will update the patch. Thanks!



-- 
Regards
Vignesh

Re: [RFC PATCH 0/3] provide imx rproc driver

[Sanchayan]

Hello Oleksij,

On 17-06-14 22:48:52, Oleksij Rempel wrote:
> Hallo all,
> 
> this is RFC patchset to provide remoteproc functionality on
> imx7d SoC.
> Since current kernel do not have devicetrees for board which
> I used for testing, this RFC patchset includes this too.
> 
> For testing I used this simple counter written in ASM:
> ==
> .syntax unified
> .text
> .thumb
> .int 0x1002 @ Initial SP value
> .int reset + 1
> 
> reset:
> 
> mov r0, #0x55
> ldr r1, =(0x40)
> 1:
> str r0, [r1]
> add r0, 1
> b   1b
> 
> /* Dummy data, required by remoteproc loader */
> /* Please FIXME, this part seem to be incorrect */
> .data
> .section .resource_table, "aw"
> .word   1, 0, 0, 0  /* struct resource_table base */
> .word   0   /* uint32_t offset[1] */
> 
> compiled with:
> ${CROSS}as -o imx7m4.o imx7m4.S
> ${CROSS}ld -Ttext=0x0 -o imx7m4.elf imx7m4.o
> cp imx7m4.elf /srv/nfs/sid-armhf/lib/firmware/rproc-imx_rproc-fw
> 
> Functionality was confirmed with current OpenOCD master.
> OpenOCD cfg file can be found here:
> https://github.com/olerem/openocd/blob/imx7-2017.06.14/tcl/target/imx7.cfg
> 
> Comment and suggestions are welcome.

Have you by chance also tried testing this with FreeRTOS code running on the
M4 side?

Regards,
Sanchayan.

> 
> Regards,
> Oleksij
> 
> Oleksij Rempel (3):
>   ARM: dts: imx7d: add imx7d-phyboard-zeta
>   remoteproc: imx_rproc: add a NXP/Freescale imx rproc driver
>   ARM: dts: imx7s: add rproc node
> 
>  arch/arm/boot/dts/Makefile|   1 +
>  arch/arm/boot/dts/imx7d-pba-c-09.dtsi | 272 
> ++
>  arch/arm/boot/dts/imx7d-peb-av-02.dtsi| 104 
>  arch/arm/boot/dts/imx7d-peb-eval-02.dtsi  | 130 ++
>  arch/arm/boot/dts/imx7d-phyboard-zeta.dts | 144 
>  arch/arm/boot/dts/imx7d-phycore-som.dtsi  | 272 
> ++
>  arch/arm/boot/dts/imx7d-pinfunc-lpsr.h|  76 +
>  arch/arm/boot/dts/imx7s.dtsi  |   9 +
>  drivers/remoteproc/Kconfig|   8 +
>  drivers/remoteproc/Makefile   |   1 +
>  drivers/remoteproc/imx_rproc.c| 264 +
>  11 files changed, 1281 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx7d-pba-c-09.dtsi
>  create mode 100644 arch/arm/boot/dts/imx7d-peb-av-02.dtsi
>  create mode 100644 arch/arm/boot/dts/imx7d-peb-eval-02.dtsi
>  create mode 100644 arch/arm/boot/dts/imx7d-phyboard-zeta.dts
>  create mode 100644 arch/arm/boot/dts/imx7d-phycore-som.dtsi
>  create mode 100644 arch/arm/boot/dts/imx7d-pinfunc-lpsr.h
>  create mode 100644 drivers/remoteproc/imx_rproc.c
> 
> -- 
> 2.11.0
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-remoteproc" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [RFC PATCH 0/3] provide imx rproc driver

[Sanchayan]

Hello Oleksij,

On 17-06-14 22:48:52, Oleksij Rempel wrote:
> Hallo all,
> 
> this is RFC patchset to provide remoteproc functionality on
> imx7d SoC.
> Since current kernel do not have devicetrees for board which
> I used for testing, this RFC patchset includes this too.
> 
> For testing I used this simple counter written in ASM:
> ==
> .syntax unified
> .text
> .thumb
> .int 0x1002 @ Initial SP value
> .int reset + 1
> 
> reset:
> 
> mov r0, #0x55
> ldr r1, =(0x40)
> 1:
> str r0, [r1]
> add r0, 1
> b   1b
> 
> /* Dummy data, required by remoteproc loader */
> /* Please FIXME, this part seem to be incorrect */
> .data
> .section .resource_table, "aw"
> .word   1, 0, 0, 0  /* struct resource_table base */
> .word   0   /* uint32_t offset[1] */
> 
> compiled with:
> ${CROSS}as -o imx7m4.o imx7m4.S
> ${CROSS}ld -Ttext=0x0 -o imx7m4.elf imx7m4.o
> cp imx7m4.elf /srv/nfs/sid-armhf/lib/firmware/rproc-imx_rproc-fw
> 
> Functionality was confirmed with current OpenOCD master.
> OpenOCD cfg file can be found here:
> https://github.com/olerem/openocd/blob/imx7-2017.06.14/tcl/target/imx7.cfg
> 
> Comment and suggestions are welcome.

Have you by chance also tried testing this with FreeRTOS code running on the
M4 side?

Regards,
Sanchayan.

> 
> Regards,
> Oleksij
> 
> Oleksij Rempel (3):
>   ARM: dts: imx7d: add imx7d-phyboard-zeta
>   remoteproc: imx_rproc: add a NXP/Freescale imx rproc driver
>   ARM: dts: imx7s: add rproc node
> 
>  arch/arm/boot/dts/Makefile|   1 +
>  arch/arm/boot/dts/imx7d-pba-c-09.dtsi | 272 
> ++
>  arch/arm/boot/dts/imx7d-peb-av-02.dtsi| 104 
>  arch/arm/boot/dts/imx7d-peb-eval-02.dtsi  | 130 ++
>  arch/arm/boot/dts/imx7d-phyboard-zeta.dts | 144 
>  arch/arm/boot/dts/imx7d-phycore-som.dtsi  | 272 
> ++
>  arch/arm/boot/dts/imx7d-pinfunc-lpsr.h|  76 +
>  arch/arm/boot/dts/imx7s.dtsi  |   9 +
>  drivers/remoteproc/Kconfig|   8 +
>  drivers/remoteproc/Makefile   |   1 +
>  drivers/remoteproc/imx_rproc.c| 264 +
>  11 files changed, 1281 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx7d-pba-c-09.dtsi
>  create mode 100644 arch/arm/boot/dts/imx7d-peb-av-02.dtsi
>  create mode 100644 arch/arm/boot/dts/imx7d-peb-eval-02.dtsi
>  create mode 100644 arch/arm/boot/dts/imx7d-phyboard-zeta.dts
>  create mode 100644 arch/arm/boot/dts/imx7d-phycore-som.dtsi
>  create mode 100644 arch/arm/boot/dts/imx7d-pinfunc-lpsr.h
>  create mode 100644 drivers/remoteproc/imx_rproc.c
> 
> -- 
> 2.11.0
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-remoteproc" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH] soc: ti: knav_dma: make of_device_ids const.

[Arvind Yadav]

of_device_ids are not supposed to change at runtime. All functions
working with of_device_ids provided by  work with const
of_device_ids. So mark the non-const structs as const.

File size before:
   textdata bss dec hex filename
   2234 608   82850 b22 drivers/soc/ti/knav_dma.o

File size after constify keystone_qmss_of_match.
   textdata bss dec hex filename
   2650 192   82850 b22 drivers/soc/ti/knav_dma.o

Signed-off-by: Arvind Yadav 
---
 drivers/soc/ti/knav_dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/ti/knav_dma.c b/drivers/soc/ti/knav_dma.c
index ecebe2e..c8d1e3c 100644
--- a/drivers/soc/ti/knav_dma.c
+++ b/drivers/soc/ti/knav_dma.c
@@ -791,7 +791,7 @@ static int knav_dma_remove(struct platform_device *pdev)
return 0;
 }
 
-static struct of_device_id of_match[] = {
+static const struct of_device_id of_match[] = {
{ .compatible = "ti,keystone-navigator-dma", },
{},
 };
-- 
1.9.1

[PATCH] soc: ti: knav_dma: make of_device_ids const.

[Arvind Yadav]

of_device_ids are not supposed to change at runtime. All functions
working with of_device_ids provided by  work with const
of_device_ids. So mark the non-const structs as const.

File size before:
   textdata bss dec hex filename
   2234 608   82850 b22 drivers/soc/ti/knav_dma.o

File size after constify keystone_qmss_of_match.
   textdata bss dec hex filename
   2650 192   82850 b22 drivers/soc/ti/knav_dma.o

Signed-off-by: Arvind Yadav 
---
 drivers/soc/ti/knav_dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/ti/knav_dma.c b/drivers/soc/ti/knav_dma.c
index ecebe2e..c8d1e3c 100644
--- a/drivers/soc/ti/knav_dma.c
+++ b/drivers/soc/ti/knav_dma.c
@@ -791,7 +791,7 @@ static int knav_dma_remove(struct platform_device *pdev)
return 0;
 }
 
-static struct of_device_id of_match[] = {
+static const struct of_device_id of_match[] = {
{ .compatible = "ti,keystone-navigator-dma", },
{},
 };
-- 
1.9.1

[PATCH v5 3/6] kernel/reboot.c: export pm_power_off_prepare

[Oleksij Rempel]

Export pm_power_off_prepare. It is needed to implement power off on
Freescale/NXP iMX6 based boards with external power management
integrated circuit (PMIC).

Signed-off-by: Oleksij Rempel 
---
 kernel/reboot.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/kernel/reboot.c b/kernel/reboot.c
index bd30a973fe94..a6903bf772c7 100644
--- a/kernel/reboot.c
+++ b/kernel/reboot.c
@@ -49,6 +49,7 @@ int reboot_force;
  */
 
 void (*pm_power_off_prepare)(void);
+EXPORT_SYMBOL(pm_power_off_prepare);
 
 /**
  * emergency_restart - reboot the system
-- 
2.11.0

[PATCH v5 6/6] ARM: dts: imx6: RIoTboard provide standby on power off option

[Oleksij Rempel]

This board, as well as some other boards with i.MX6 and a PMIC, uses a
"MPIC_STBY_REQ" line to notify the PMIC about a state change.
The PMIC is programmed for a specific state change before triggering the
line.
In this case, PMIC_STBY_REQ can be used for stand by, sleep
and power off modes.

Signed-off-by: Oleksij Rempel 
---
 arch/arm/boot/dts/imx6dl-riotboard.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts 
b/arch/arm/boot/dts/imx6dl-riotboard.dts
index 2cb72824e800..da9d0c102a31 100644
--- a/arch/arm/boot/dts/imx6dl-riotboard.dts
+++ b/arch/arm/boot/dts/imx6dl-riotboard.dts
@@ -90,6 +90,10 @@
status = "okay";
 };
 
+ {
+   fsl,pmic-stby-poweroff;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_enet>;
@@ -125,6 +129,7 @@
reg = <0x08>;
interrupt-parent = <>;
interrupts = <16 8>;
+   fsl,pmic-stby-poweroff;
 
regulators {
reg_vddcore: sw1ab {/* 
VDDARM_IN */
-- 
2.11.0

[PATCH v5 5/6] regulator: pfuze100-regulator: provide pm_power_off_prepare handler

[Oleksij Rempel]

On some boards the SoC can use one pin "PMIC_STBY_REQ" to notify th PMIC
about state changes. In this case internal state of PMIC must be
preconfigured for upcomming state change.
It works fine with the current regulator framework, except with the
power-off case.

This patch is providing an optional pm_power_off_prepare handler
which will configure standby state of the PMIC to disable all power lines.

In my power consumption test on RIoTBoard, I got the following results:
power off without this patch:   320 mA
power off with this patch:  2   mA
suspend to ram: 40  mA

Signed-off-by: Oleksij Rempel 
---
 drivers/regulator/pfuze100-regulator.c | 92 ++
 1 file changed, 92 insertions(+)

diff --git a/drivers/regulator/pfuze100-regulator.c 
b/drivers/regulator/pfuze100-regulator.c
index 63922a2167e5..f6c276ed91d8 100644
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define PFUZE_NUMREGS  128
@@ -42,11 +43,17 @@
 
 #define PFUZE100_COINVOL   0x1a
 #define PFUZE100_SW1ABVOL  0x20
+#define PFUZE100_SW1ABMODE 0x23
 #define PFUZE100_SW1CVOL   0x2e
+#define PFUZE100_SW1CMODE  0x31
 #define PFUZE100_SW2VOL0x35
+#define PFUZE100_SW2MODE   0x38
 #define PFUZE100_SW3AVOL   0x3c
+#define PFUZE100_SW3AMODE  0x3f
 #define PFUZE100_SW3BVOL   0x43
+#define PFUZE100_SW3BMODE  0x46
 #define PFUZE100_SW4VOL0x4a
+#define PFUZE100_SW4MODE   0x4d
 #define PFUZE100_SWBSTCON1 0x66
 #define PFUZE100_VREFDDRCON0x6a
 #define PFUZE100_VSNVSVOL  0x6b
@@ -57,6 +64,13 @@
 #define PFUZE100_VGEN5VOL  0x70
 #define PFUZE100_VGEN6VOL  0x71
 
+#define PFUZE100_SWxMODE_MASK  0xf
+#define PFUZE100_SWxMODE_APS_APS   0x8
+#define PFUZE100_SWxMODE_APS_OFF   0x4
+
+#define PFUZE100_VGENxLPWR BIT(6)
+#define PFUZE100_VGENxSTBY BIT(5)
+
 enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3 };
 
 struct pfuze_regulator {
@@ -489,6 +503,69 @@ static inline struct device_node *match_of_node(int index)
 }
 #endif
 
+static struct pfuze_chip *syspm_pfuze_chip;
+
+static void pfuze_power_off_prepare(void)
+{
+   dev_info(syspm_pfuze_chip->dev, "Configure standy mode for power off");
+
+   /* Switch from default mode: APS/APS to APS/Off */
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1ABMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1CMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW2MODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3AMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3BMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW4MODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN1VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN2VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN3VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN4VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN5VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN6VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+}
+
+static int pfuze_power_off_prepare_init(struct pfuze_chip *pfuze_chip)
+{
+   if (pfuze_chip->chip_id != PFUZE100) {
+   dev_warn(pfuze_chip->dev, "Requested pm_power_off_prepare 
handler for not supported chip\n");
+   return -ENODEV;
+   }
+
+   if (pm_power_off_prepare) {
+   dev_warn(pfuze_chip->dev, "pm_power_off_prepare is already 
registered.\n");
+   return -EBUSY;
+   }
+
+   if (syspm_pfuze_chip) {
+   dev_warn(pfuze_chip->dev, 

[PATCH v5 3/6] kernel/reboot.c: export pm_power_off_prepare

[Oleksij Rempel]

Export pm_power_off_prepare. It is needed to implement power off on
Freescale/NXP iMX6 based boards with external power management
integrated circuit (PMIC).

Signed-off-by: Oleksij Rempel 
---
 kernel/reboot.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/kernel/reboot.c b/kernel/reboot.c
index bd30a973fe94..a6903bf772c7 100644
--- a/kernel/reboot.c
+++ b/kernel/reboot.c
@@ -49,6 +49,7 @@ int reboot_force;
  */
 
 void (*pm_power_off_prepare)(void);
+EXPORT_SYMBOL(pm_power_off_prepare);
 
 /**
  * emergency_restart - reboot the system
-- 
2.11.0

[PATCH v5 6/6] ARM: dts: imx6: RIoTboard provide standby on power off option

[Oleksij Rempel]

This board, as well as some other boards with i.MX6 and a PMIC, uses a
"MPIC_STBY_REQ" line to notify the PMIC about a state change.
The PMIC is programmed for a specific state change before triggering the
line.
In this case, PMIC_STBY_REQ can be used for stand by, sleep
and power off modes.

Signed-off-by: Oleksij Rempel 
---
 arch/arm/boot/dts/imx6dl-riotboard.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts 
b/arch/arm/boot/dts/imx6dl-riotboard.dts
index 2cb72824e800..da9d0c102a31 100644
--- a/arch/arm/boot/dts/imx6dl-riotboard.dts
+++ b/arch/arm/boot/dts/imx6dl-riotboard.dts
@@ -90,6 +90,10 @@
status = "okay";
 };
 
+ {
+   fsl,pmic-stby-poweroff;
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_enet>;
@@ -125,6 +129,7 @@
reg = <0x08>;
interrupt-parent = <>;
interrupts = <16 8>;
+   fsl,pmic-stby-poweroff;
 
regulators {
reg_vddcore: sw1ab {/* 
VDDARM_IN */
-- 
2.11.0

[PATCH v5 5/6] regulator: pfuze100-regulator: provide pm_power_off_prepare handler

[Oleksij Rempel]

On some boards the SoC can use one pin "PMIC_STBY_REQ" to notify th PMIC
about state changes. In this case internal state of PMIC must be
preconfigured for upcomming state change.
It works fine with the current regulator framework, except with the
power-off case.

This patch is providing an optional pm_power_off_prepare handler
which will configure standby state of the PMIC to disable all power lines.

In my power consumption test on RIoTBoard, I got the following results:
power off without this patch:   320 mA
power off with this patch:  2   mA
suspend to ram: 40  mA

Signed-off-by: Oleksij Rempel 
---
 drivers/regulator/pfuze100-regulator.c | 92 ++
 1 file changed, 92 insertions(+)

diff --git a/drivers/regulator/pfuze100-regulator.c 
b/drivers/regulator/pfuze100-regulator.c
index 63922a2167e5..f6c276ed91d8 100644
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define PFUZE_NUMREGS  128
@@ -42,11 +43,17 @@
 
 #define PFUZE100_COINVOL   0x1a
 #define PFUZE100_SW1ABVOL  0x20
+#define PFUZE100_SW1ABMODE 0x23
 #define PFUZE100_SW1CVOL   0x2e
+#define PFUZE100_SW1CMODE  0x31
 #define PFUZE100_SW2VOL0x35
+#define PFUZE100_SW2MODE   0x38
 #define PFUZE100_SW3AVOL   0x3c
+#define PFUZE100_SW3AMODE  0x3f
 #define PFUZE100_SW3BVOL   0x43
+#define PFUZE100_SW3BMODE  0x46
 #define PFUZE100_SW4VOL0x4a
+#define PFUZE100_SW4MODE   0x4d
 #define PFUZE100_SWBSTCON1 0x66
 #define PFUZE100_VREFDDRCON0x6a
 #define PFUZE100_VSNVSVOL  0x6b
@@ -57,6 +64,13 @@
 #define PFUZE100_VGEN5VOL  0x70
 #define PFUZE100_VGEN6VOL  0x71
 
+#define PFUZE100_SWxMODE_MASK  0xf
+#define PFUZE100_SWxMODE_APS_APS   0x8
+#define PFUZE100_SWxMODE_APS_OFF   0x4
+
+#define PFUZE100_VGENxLPWR BIT(6)
+#define PFUZE100_VGENxSTBY BIT(5)
+
 enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3 };
 
 struct pfuze_regulator {
@@ -489,6 +503,69 @@ static inline struct device_node *match_of_node(int index)
 }
 #endif
 
+static struct pfuze_chip *syspm_pfuze_chip;
+
+static void pfuze_power_off_prepare(void)
+{
+   dev_info(syspm_pfuze_chip->dev, "Configure standy mode for power off");
+
+   /* Switch from default mode: APS/APS to APS/Off */
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1ABMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW1CMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW2MODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3AMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW3BMODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_SW4MODE,
+  PFUZE100_SWxMODE_MASK, PFUZE100_SWxMODE_APS_OFF);
+
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN1VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN2VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN3VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN4VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN5VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+   regmap_update_bits(syspm_pfuze_chip->regmap, PFUZE100_VGEN6VOL,
+  PFUZE100_VGENxLPWR | PFUZE100_VGENxSTBY,
+  PFUZE100_VGENxSTBY);
+}
+
+static int pfuze_power_off_prepare_init(struct pfuze_chip *pfuze_chip)
+{
+   if (pfuze_chip->chip_id != PFUZE100) {
+   dev_warn(pfuze_chip->dev, "Requested pm_power_off_prepare 
handler for not supported chip\n");
+   return -ENODEV;
+   }
+
+   if (pm_power_off_prepare) {
+   dev_warn(pfuze_chip->dev, "pm_power_off_prepare is already 
registered.\n");
+   return -EBUSY;
+   }
+
+   if (syspm_pfuze_chip) {
+   dev_warn(pfuze_chip->dev, "syspm_pfuze_chip is already 

[PATCH v5 1/6] ARM: imx6q: provide documentation for new fsl,pmic-stby-poweroff property

[Oleksij Rempel]

Signed-off-by: Oleksij Rempel 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/clock/imx6q-clock.txt | 8 
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt 
b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index 9252912a5b0e..8f93e1503e59 100644
--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
@@ -6,6 +6,14 @@ Required properties:
 - interrupts: Should contain CCM interrupt
 - #clock-cells: Should be <1>
 
+Optional properties:
+- fsl,pmic-stby-poweroff: Configure CCM to assert PMIC_STBY_REQ signal
+  on power off.
+  Use this property if the SoC should be powered off by external power
+  management IC (PMIC) triggered via PMIC_STBY_REQ signal.
+  Boards that are designed to initiate poweroff on PMIC_ON_REQ signal should
+  be using "syscon-poweroff" driver instead.
+
 The clock consumer should specify the desired clock by having the clock
 ID in its "clocks" phandle cell.  See include/dt-bindings/clock/imx6qdl-clock.h
 for the full list of i.MX6 Quad and DualLite clock IDs.
-- 
2.11.0

[PATCH v5 4/6] regulator: pfuze100: add fsl,pmic-stby-poweroff property

[Oleksij Rempel]

Document the new optional "fsl,pmic-stby-poweroff" property.

Signed-off-by: Oleksij Rempel 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/regulator/pfuze100.txt | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.txt 
b/Documentation/devicetree/bindings/regulator/pfuze100.txt
index 444c47831a40..197f1a52e960 100644
--- a/Documentation/devicetree/bindings/regulator/pfuze100.txt
+++ b/Documentation/devicetree/bindings/regulator/pfuze100.txt
@@ -4,6 +4,13 @@ Required properties:
 - compatible: "fsl,pfuze100", "fsl,pfuze200", "fsl,pfuze3000"
 - reg: I2C slave address
 
+Optional properties:
+- fsl,pmic-stby-poweroff: if present, configure the PMIC to shutdown all
+  power rails when PMIC_STBY_REQ line is asserted during the power off 
sequence.
+  Use this option if the SoC should be powered off by external power
+  management IC (PMIC) on PMIC_STBY_REQ signal.
+  As opposite to PMIC_STBY_REQ boards can implement PMIC_ON_REQ signal.
+
 Required child node:
 - regulators: This is the list of child nodes that specify the regulator
   initialization data for defined regulators. Please refer to below doc
-- 
2.11.0

[PATCH v5 1/6] ARM: imx6q: provide documentation for new fsl,pmic-stby-poweroff property

[Oleksij Rempel]

Signed-off-by: Oleksij Rempel 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/clock/imx6q-clock.txt | 8 
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt 
b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index 9252912a5b0e..8f93e1503e59 100644
--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
@@ -6,6 +6,14 @@ Required properties:
 - interrupts: Should contain CCM interrupt
 - #clock-cells: Should be <1>
 
+Optional properties:
+- fsl,pmic-stby-poweroff: Configure CCM to assert PMIC_STBY_REQ signal
+  on power off.
+  Use this property if the SoC should be powered off by external power
+  management IC (PMIC) triggered via PMIC_STBY_REQ signal.
+  Boards that are designed to initiate poweroff on PMIC_ON_REQ signal should
+  be using "syscon-poweroff" driver instead.
+
 The clock consumer should specify the desired clock by having the clock
 ID in its "clocks" phandle cell.  See include/dt-bindings/clock/imx6qdl-clock.h
 for the full list of i.MX6 Quad and DualLite clock IDs.
-- 
2.11.0

[PATCH v5 4/6] regulator: pfuze100: add fsl,pmic-stby-poweroff property

[Oleksij Rempel]

Document the new optional "fsl,pmic-stby-poweroff" property.

Signed-off-by: Oleksij Rempel 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/regulator/pfuze100.txt | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.txt 
b/Documentation/devicetree/bindings/regulator/pfuze100.txt
index 444c47831a40..197f1a52e960 100644
--- a/Documentation/devicetree/bindings/regulator/pfuze100.txt
+++ b/Documentation/devicetree/bindings/regulator/pfuze100.txt
@@ -4,6 +4,13 @@ Required properties:
 - compatible: "fsl,pfuze100", "fsl,pfuze200", "fsl,pfuze3000"
 - reg: I2C slave address
 
+Optional properties:
+- fsl,pmic-stby-poweroff: if present, configure the PMIC to shutdown all
+  power rails when PMIC_STBY_REQ line is asserted during the power off 
sequence.
+  Use this option if the SoC should be powered off by external power
+  management IC (PMIC) on PMIC_STBY_REQ signal.
+  As opposite to PMIC_STBY_REQ boards can implement PMIC_ON_REQ signal.
+
 Required child node:
 - regulators: This is the list of child nodes that specify the regulator
   initialization data for defined regulators. Please refer to below doc
-- 
2.11.0

[PATCH v5 0/6] provide power off support for iMX6 with external PMIC

[Oleksij Rempel]

This patch series is providing power off support for Freescale/NXP iMX6 based
boards with external power management integrated circuit (PMIC).

changes:
v5:
 - remove useless includes from pm-imx6.c patch
 - add Acked-by to "regulator: pfuze100: add fsl,pmic-stby-poweroff property"
   patch
v4:
 - update comment in "regulator: pfuze100: add fsl,pmic-stby-poweroff ..."
   patch
 - add Acked-by to "ARM: imx6q: provide documentation for new ..."
   patch

v3:
 - set pm_power_off_prepare = NULL on .remove.
 - documentation and spelling fixes.
 - use %pf instead of lookup_symbol_name.

Oleksij Rempel (6):
  ARM: imx6q: provide documentation for new fsl,pmic-stby-poweroff
property
  ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff"
is set
  kernel/reboot.c: export pm_power_off_prepare
  regulator: pfuze100: add fsl,pmic-stby-poweroff property
  regulator: pfuze100-regulator: provide pm_power_off_prepare handler
  ARM: dts: imx6: RIoTboard provide standby on power off option

 .../devicetree/bindings/clock/imx6q-clock.txt  |  8 ++
 .../devicetree/bindings/regulator/pfuze100.txt |  7 ++
 arch/arm/boot/dts/imx6dl-riotboard.dts |  5 ++
 arch/arm/mach-imx/pm-imx6.c| 25 ++
 drivers/regulator/pfuze100-regulator.c | 92 ++
 kernel/reboot.c|  1 +
 6 files changed, 138 insertions(+)

-- 
2.11.0

[PATCH v5 2/6] ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is set

[Oleksij Rempel]

One of the Freescale recommended sequences for power off with external
PMIC is the following:
...
3.  SoC is programming PMIC for power off when standby is asserted.
4.  In CCM STOP mode, Standby is asserted, PMIC gates SoC supplies.

See:
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf
page 5083

This patch implements step 4. of this sequence.

Signed-off-by: Oleksij Rempel 
---
 arch/arm/mach-imx/pm-imx6.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index e61b1d1027e1..cb76832935f0 100644
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -602,6 +602,28 @@ static void __init imx6_pm_common_init(const struct 
imx6_pm_socdata
   IMX6Q_GPR1_GINT);
 }
 
+static void imx6_pm_poweroff(void)
+{
+   imx6_set_lpm(STOP_POWER_OFF);
+   cpu_suspend(0, imx6q_suspend_finish);
+
+   mdelay(1000);
+
+   pr_emerg("Unable to poweroff system\n");
+}
+
+static int imx6_pm_poweroff_probe(void)
+{
+   if (pm_power_off) {
+   pr_warn("%s: pm_power_off already claimed  %p %pf!\n",
+   __func__, pm_power_off, pm_power_off);
+   return -EBUSY;
+   }
+
+   pm_power_off = imx6_pm_poweroff;
+   return 0;
+}
+
 void __init imx6_pm_ccm_init(const char *ccm_compat)
 {
struct device_node *np;
@@ -618,6 +640,9 @@ void __init imx6_pm_ccm_init(const char *ccm_compat)
val = readl_relaxed(ccm_base + CLPCR);
val &= ~BM_CLPCR_LPM;
writel_relaxed(val, ccm_base + CLPCR);
+
+   if (of_property_read_bool(np, "fsl,pmic-stby-poweroff"))
+   imx6_pm_poweroff_probe();
 }
 
 void __init imx6q_pm_init(void)
-- 
2.11.0

[PATCH v5 0/6] provide power off support for iMX6 with external PMIC

[Oleksij Rempel]

This patch series is providing power off support for Freescale/NXP iMX6 based
boards with external power management integrated circuit (PMIC).

changes:
v5:
 - remove useless includes from pm-imx6.c patch
 - add Acked-by to "regulator: pfuze100: add fsl,pmic-stby-poweroff property"
   patch
v4:
 - update comment in "regulator: pfuze100: add fsl,pmic-stby-poweroff ..."
   patch
 - add Acked-by to "ARM: imx6q: provide documentation for new ..."
   patch

v3:
 - set pm_power_off_prepare = NULL on .remove.
 - documentation and spelling fixes.
 - use %pf instead of lookup_symbol_name.

Oleksij Rempel (6):
  ARM: imx6q: provide documentation for new fsl,pmic-stby-poweroff
property
  ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff"
is set
  kernel/reboot.c: export pm_power_off_prepare
  regulator: pfuze100: add fsl,pmic-stby-poweroff property
  regulator: pfuze100-regulator: provide pm_power_off_prepare handler
  ARM: dts: imx6: RIoTboard provide standby on power off option

 .../devicetree/bindings/clock/imx6q-clock.txt  |  8 ++
 .../devicetree/bindings/regulator/pfuze100.txt |  7 ++
 arch/arm/boot/dts/imx6dl-riotboard.dts |  5 ++
 arch/arm/mach-imx/pm-imx6.c| 25 ++
 drivers/regulator/pfuze100-regulator.c | 92 ++
 kernel/reboot.c|  1 +
 6 files changed, 138 insertions(+)

-- 
2.11.0

[PATCH v5 2/6] ARM: imx6: register pm_power_off handler if "fsl,pmic-stby-poweroff" is set

[Oleksij Rempel]

One of the Freescale recommended sequences for power off with external
PMIC is the following:
...
3.  SoC is programming PMIC for power off when standby is asserted.
4.  In CCM STOP mode, Standby is asserted, PMIC gates SoC supplies.

See:
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf
page 5083

This patch implements step 4. of this sequence.

Signed-off-by: Oleksij Rempel 
---
 arch/arm/mach-imx/pm-imx6.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index e61b1d1027e1..cb76832935f0 100644
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -602,6 +602,28 @@ static void __init imx6_pm_common_init(const struct 
imx6_pm_socdata
   IMX6Q_GPR1_GINT);
 }
 
+static void imx6_pm_poweroff(void)
+{
+   imx6_set_lpm(STOP_POWER_OFF);
+   cpu_suspend(0, imx6q_suspend_finish);
+
+   mdelay(1000);
+
+   pr_emerg("Unable to poweroff system\n");
+}
+
+static int imx6_pm_poweroff_probe(void)
+{
+   if (pm_power_off) {
+   pr_warn("%s: pm_power_off already claimed  %p %pf!\n",
+   __func__, pm_power_off, pm_power_off);
+   return -EBUSY;
+   }
+
+   pm_power_off = imx6_pm_poweroff;
+   return 0;
+}
+
 void __init imx6_pm_ccm_init(const char *ccm_compat)
 {
struct device_node *np;
@@ -618,6 +640,9 @@ void __init imx6_pm_ccm_init(const char *ccm_compat)
val = readl_relaxed(ccm_base + CLPCR);
val &= ~BM_CLPCR_LPM;
writel_relaxed(val, ccm_base + CLPCR);
+
+   if (of_property_read_bool(np, "fsl,pmic-stby-poweroff"))
+   imx6_pm_poweroff_probe();
 }
 
 void __init imx6q_pm_init(void)
-- 
2.11.0

[PATCH] x86/mm: Don't reenter flush_tlb_func_common()

[Andy Lutomirski]

It was historically possible to have two concurrent TLB flushes
targeting the same CPU: one initiated locally and one initiated
remotely.  This can now cause an OOPS in leave_mm() at
arch/x86/mm/tlb.c:47:

if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
BUG();

with this call trace:
 flush_tlb_func_local arch/x86/mm/tlb.c:239 [inline]
 flush_tlb_mm_range+0x26d/0x370 arch/x86/mm/tlb.c:317

Without reentrancy, this OOPS is impossible: leave_mm() is only
called if we're not in TLBSTATE_OK, but then we're unexpectedly
in TLBSTATE_OK in leave_mm().

This can be caused by flush_tlb_func_remote() happening between
the two checks and calling leave_mm(), resulting in two consecutive
leave_mm() calls on the same CPU with no intervening switch_mm()
calls.

We never saw this OOPS before because the old leave_mm()
implementation didn't put us back in TLBSTATE_OK, so the assertion
didn't fire.

Nadav noticed the reentrancy issue in a different context, but
neither of us realized that it caused a problem yet.

Cc: Nadav Amit 
Cc: Dave Hansen 
Reported-by: "Levin, Alexander (Sasha Levin)" 
Fixes: 3d28ebceaffa ("x86/mm: Rework lazy TLB to track the actual loaded mm")
Signed-off-by: Andy Lutomirski 
---
 arch/x86/mm/tlb.c | 15 +--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 2a5e851f2035..f06239c6919f 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -208,6 +208,9 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct 
mm_struct *next,
 static void flush_tlb_func_common(const struct flush_tlb_info *f,
  bool local, enum tlb_flush_reason reason)
 {
+   /* This code cannot presently handle being reentered. */
+   VM_WARN_ON(!irqs_disabled());
+
if (this_cpu_read(cpu_tlbstate.state) != TLBSTATE_OK) {
leave_mm(smp_processor_id());
return;
@@ -313,8 +316,12 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned 
long start,
info.end = TLB_FLUSH_ALL;
}
 
-   if (mm == this_cpu_read(cpu_tlbstate.loaded_mm))
+   if (mm == this_cpu_read(cpu_tlbstate.loaded_mm)) {
+   local_irq_disable();
flush_tlb_func_local(, TLB_LOCAL_MM_SHOOTDOWN);
+   local_irq_enable();
+   }
+
if (cpumask_any_but(mm_cpumask(mm), cpu) < nr_cpu_ids)
flush_tlb_others(mm_cpumask(mm), );
put_cpu();
@@ -370,8 +377,12 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch 
*batch)
 
int cpu = get_cpu();
 
-   if (cpumask_test_cpu(cpu, >cpumask))
+   if (cpumask_test_cpu(cpu, >cpumask)) {
+   local_irq_disable();
flush_tlb_func_local(, TLB_LOCAL_SHOOTDOWN);
+   local_irq_enable();
+   }
+
if (cpumask_any_but(>cpumask, cpu) < nr_cpu_ids)
flush_tlb_others(>cpumask, );
cpumask_clear(>cpumask);
-- 
2.9.4

[PATCH] x86/mm: Don't reenter flush_tlb_func_common()

[Andy Lutomirski]

It was historically possible to have two concurrent TLB flushes
targeting the same CPU: one initiated locally and one initiated
remotely.  This can now cause an OOPS in leave_mm() at
arch/x86/mm/tlb.c:47:

if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
BUG();

with this call trace:
 flush_tlb_func_local arch/x86/mm/tlb.c:239 [inline]
 flush_tlb_mm_range+0x26d/0x370 arch/x86/mm/tlb.c:317

Without reentrancy, this OOPS is impossible: leave_mm() is only
called if we're not in TLBSTATE_OK, but then we're unexpectedly
in TLBSTATE_OK in leave_mm().

This can be caused by flush_tlb_func_remote() happening between
the two checks and calling leave_mm(), resulting in two consecutive
leave_mm() calls on the same CPU with no intervening switch_mm()
calls.

We never saw this OOPS before because the old leave_mm()
implementation didn't put us back in TLBSTATE_OK, so the assertion
didn't fire.

Nadav noticed the reentrancy issue in a different context, but
neither of us realized that it caused a problem yet.

Cc: Nadav Amit 
Cc: Dave Hansen 
Reported-by: "Levin, Alexander (Sasha Levin)" 
Fixes: 3d28ebceaffa ("x86/mm: Rework lazy TLB to track the actual loaded mm")
Signed-off-by: Andy Lutomirski 
---
 arch/x86/mm/tlb.c | 15 +--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 2a5e851f2035..f06239c6919f 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -208,6 +208,9 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct 
mm_struct *next,
 static void flush_tlb_func_common(const struct flush_tlb_info *f,
  bool local, enum tlb_flush_reason reason)
 {
+   /* This code cannot presently handle being reentered. */
+   VM_WARN_ON(!irqs_disabled());
+
if (this_cpu_read(cpu_tlbstate.state) != TLBSTATE_OK) {
leave_mm(smp_processor_id());
return;
@@ -313,8 +316,12 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned 
long start,
info.end = TLB_FLUSH_ALL;
}
 
-   if (mm == this_cpu_read(cpu_tlbstate.loaded_mm))
+   if (mm == this_cpu_read(cpu_tlbstate.loaded_mm)) {
+   local_irq_disable();
flush_tlb_func_local(, TLB_LOCAL_MM_SHOOTDOWN);
+   local_irq_enable();
+   }
+
if (cpumask_any_but(mm_cpumask(mm), cpu) < nr_cpu_ids)
flush_tlb_others(mm_cpumask(mm), );
put_cpu();
@@ -370,8 +377,12 @@ void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch 
*batch)
 
int cpu = get_cpu();
 
-   if (cpumask_test_cpu(cpu, >cpumask))
+   if (cpumask_test_cpu(cpu, >cpumask)) {
+   local_irq_disable();
flush_tlb_func_local(, TLB_LOCAL_SHOOTDOWN);
+   local_irq_enable();
+   }
+
if (cpumask_any_but(>cpumask, cpu) < nr_cpu_ids)
flush_tlb_others(>cpumask, );
cpumask_clear(>cpumask);
-- 
2.9.4

Re: [PATCH v2 00/10] PCID and improved laziness

[Andy Lutomirski]

On Sun, Jun 18, 2017 at 2:29 PM, Levin, Alexander (Sasha Levin)
 wrote:
> On Tue, Jun 13, 2017 at 09:56:18PM -0700, Andy Lutomirski wrote:
>>There are three performance benefits here:
>>
>>1. TLB flushing is slow.  (I.e. the flush itself takes a while.)
>>   This avoids many of them when switching tasks by using PCID.  In
>>   a stupid little benchmark I did, it saves about 100ns on my laptop
>>   per context switch.  I'll try to improve that benchmark.
>>
>>2. Mms that have been used recently on a given CPU might get to keep
>>   their TLB entries alive across process switches with this patch
>>   set.  TLB fills are pretty fast on modern CPUs, but they're even
>>   faster when they don't happen.
>>
>>3. Lazy TLB is way better.  We used to do two stupid things when we
>>   ran kernel threads: we'd send IPIs to flush user contexts on their
>>   CPUs and then we'd write to CR3 for no particular reason as an excuse
>>   to stop further IPIs.  With this patch, we do neither.
>>
>>This will, in general, perform suboptimally if paravirt TLB flushing
>>is in use (currently just Xen, I think, but Hyper-V is in the works).
>>The code is structured so we could fix it in one of two ways: we
>>could take a spinlock when touching the percpu state so we can update
>>it remotely after a paravirt flush, or we could be more careful about
>>our exactly how we access the state and use cmpxchg16b to do atomic
>>remote updates.  (On SMP systems without cmpxchg16b, we'd just skip
>>the optimization entirely.)
>
> Hey Andy,
>
> I've started seeing the following in -next:
>
> [ cut here ]
> kernel BUG at arch/x86/mm/tlb.c:47!

...

> Call Trace:
>  flush_tlb_func_local arch/x86/mm/tlb.c:239 [inline]
>  flush_tlb_mm_range+0x26d/0x370 arch/x86/mm/tlb.c:317
>  flush_tlb_page arch/x86/include/asm/tlbflush.h:253 [inline]

I think I see what's going on, and it should be fixed in the PCID
series.  I'll split out the fix.

Re: [PATCH v2 00/10] PCID and improved laziness

[Andy Lutomirski]

On Sun, Jun 18, 2017 at 2:29 PM, Levin, Alexander (Sasha Levin)
 wrote:
> On Tue, Jun 13, 2017 at 09:56:18PM -0700, Andy Lutomirski wrote:
>>There are three performance benefits here:
>>
>>1. TLB flushing is slow.  (I.e. the flush itself takes a while.)
>>   This avoids many of them when switching tasks by using PCID.  In
>>   a stupid little benchmark I did, it saves about 100ns on my laptop
>>   per context switch.  I'll try to improve that benchmark.
>>
>>2. Mms that have been used recently on a given CPU might get to keep
>>   their TLB entries alive across process switches with this patch
>>   set.  TLB fills are pretty fast on modern CPUs, but they're even
>>   faster when they don't happen.
>>
>>3. Lazy TLB is way better.  We used to do two stupid things when we
>>   ran kernel threads: we'd send IPIs to flush user contexts on their
>>   CPUs and then we'd write to CR3 for no particular reason as an excuse
>>   to stop further IPIs.  With this patch, we do neither.
>>
>>This will, in general, perform suboptimally if paravirt TLB flushing
>>is in use (currently just Xen, I think, but Hyper-V is in the works).
>>The code is structured so we could fix it in one of two ways: we
>>could take a spinlock when touching the percpu state so we can update
>>it remotely after a paravirt flush, or we could be more careful about
>>our exactly how we access the state and use cmpxchg16b to do atomic
>>remote updates.  (On SMP systems without cmpxchg16b, we'd just skip
>>the optimization entirely.)
>
> Hey Andy,
>
> I've started seeing the following in -next:
>
> [ cut here ]
> kernel BUG at arch/x86/mm/tlb.c:47!

...

> Call Trace:
>  flush_tlb_func_local arch/x86/mm/tlb.c:239 [inline]
>  flush_tlb_mm_range+0x26d/0x370 arch/x86/mm/tlb.c:317
>  flush_tlb_page arch/x86/include/asm/tlbflush.h:253 [inline]

I think I see what's going on, and it should be fixed in the PCID
series.  I'll split out the fix.

Re: [GIT PULL] firmware: arm_scpi: updates for v4.13

[Olof Johansson]

On Thu, Jun 15, 2017 at 12:28:59PM +0100, Sudeep Holla wrote:
> Hi ARM-SoC,
> 
> The cpufreq change is acked by maintainer and Rafael agreed to take it
> via ARM-SoC[1]. Please pull !
> 
> Regards,
> Sudeep
> 
> --
> 
> The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
> 
>   Linux 4.12-rc1 (2017-05-13 13:19:49 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux.git
> tags/scpi-updates-4.13
> 
> for you to fetch changes up to c0f2e21953324def9e2f8394406b557d7cb5af64:
> 
>   cpufreq: scpi: use new scpi_ops functions to remove duplicate code
> (2017-06-05 11:14:35 +0100)
> 
> 
> SCPI update for v4.13
> 
> Adds support to get DVFS transition latency and OPP for any device whose
> DVFS are managed by SCPI. This avoids code duplication in both cpufreq
> and devfreq SCPI drivers.

Merged, thanks.


-Olof

Re: [GIT PULL] firmware: arm_scpi: updates for v4.13

[Olof Johansson]

On Thu, Jun 15, 2017 at 12:28:59PM +0100, Sudeep Holla wrote:
> Hi ARM-SoC,
> 
> The cpufreq change is acked by maintainer and Rafael agreed to take it
> via ARM-SoC[1]. Please pull !
> 
> Regards,
> Sudeep
> 
> --
> 
> The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
> 
>   Linux 4.12-rc1 (2017-05-13 13:19:49 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux.git
> tags/scpi-updates-4.13
> 
> for you to fetch changes up to c0f2e21953324def9e2f8394406b557d7cb5af64:
> 
>   cpufreq: scpi: use new scpi_ops functions to remove duplicate code
> (2017-06-05 11:14:35 +0100)
> 
> 
> SCPI update for v4.13
> 
> Adds support to get DVFS transition latency and OPP for any device whose
> DVFS are managed by SCPI. This avoids code duplication in both cpufreq
> and devfreq SCPI drivers.

Merged, thanks.


-Olof

Re: [GIT PULL] ARM: dts: uniphier: UniPhier DT updates for v4.13

[Olof Johansson]

On Tue, Jun 13, 2017 at 12:41:04AM +0900, Masahiro Yamada wrote:
> Hi Arnd, Olof,
> 
> Here are UniPhier DT (32bit) updates for the v4.13 merge window.
> Please pull!
> 
> 
> The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
> 
>   Linux 4.12-rc1 (2017-05-13 13:19:49 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
> tags/uniphier-dt-v4.13
> 
> for you to fetch changes up to 73f9de0c7f5dd9eae6949135a7b316cb02365519:
> 
>   ARM: dts: uniphier: Add generic compatible string for I2C EEPROM
> (2017-06-10 01:10:41 +0900)
> 
> 
> UniPhier ARM SoC DT updates for v4.13
> 
> - fix W=1 build warnings
> - use SPDX License Identifier
> - add generic compatible string for I2C EEPROM

Thanks, merged.


-Olof

Re: [GIT PULL] ARM: dts: uniphier: UniPhier DT updates for v4.13

[Olof Johansson]

On Tue, Jun 13, 2017 at 12:41:04AM +0900, Masahiro Yamada wrote:
> Hi Arnd, Olof,
> 
> Here are UniPhier DT (32bit) updates for the v4.13 merge window.
> Please pull!
> 
> 
> The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
> 
>   Linux 4.12-rc1 (2017-05-13 13:19:49 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
> tags/uniphier-dt-v4.13
> 
> for you to fetch changes up to 73f9de0c7f5dd9eae6949135a7b316cb02365519:
> 
>   ARM: dts: uniphier: Add generic compatible string for I2C EEPROM
> (2017-06-10 01:10:41 +0900)
> 
> 
> UniPhier ARM SoC DT updates for v4.13
> 
> - fix W=1 build warnings
> - use SPDX License Identifier
> - add generic compatible string for I2C EEPROM

Thanks, merged.


-Olof

Re: [GIT PULL] arm64: dts: uniphier: UniPhier DT updates (64bit) for v4.13

[Olof Johansson]

On Tue, Jun 13, 2017 at 12:48:03AM +0900, Masahiro Yamada wrote:
> Hi Arnd, Olof,
> 
> Here are UniPhier DT (64bit) updates for the v4.13 merge window.
> Please pull!
> 
> The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
> 
>   Linux 4.12-rc1 (2017-05-13 13:19:49 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
> tags/uniphier-dt64-v4.13
> 
> for you to fetch changes up to 1b6d58acdb26de8995f854cbf8b0d7214eefd884:
> 
>   arm64: dts: uniphier: add support for LD20 Global board (2017-06-13
> 00:00:17 +0900)
> 
> 
> UniPhier ARM64 SoC DT updates for v4.13
> 
> - specify timing delay properties of eMMC
> - fix W=1 build warnings
> - increase memory reserve size
> - use SPDX License Identifier
> - add new board support (LD11/LD20 global)

Merged, thanks!

> 
> Kunihiko Hayashi (2):
>   arm64: dts: uniphier: add support for LD11 Global board
>   arm64: dts: uniphier: add support for LD20 Global board
> 
> Masahiro Yamada (5):
>   arm64: dts: uniphier: add input-delay properties to Cadence eMMC node
>   arm64: dts: uniphier: add cdns, phy-dll-delay-sdclk(-hsmmc) for eMMC
>   arm64: dts: uniphier: fix simple-bus unit address format error
>   arm64: dts: uniphier: reserve more memory for LD11/LD20
>   arm64: dts: uniphier: use SPDX-License-Identifier
> 
> Viresh Kumar (1):
>   arm64: dts: uniphier: Use - instead of @ for DT OPP entries
> 
>  arch/arm64/boot/dts/socionext/Makefile |  2 +
>  arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts | 70
> +++
>  arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts| 38 +--
>  arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi   | 61
> ++--
>  arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts | 52
> 
>  arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts| 38 +--
>  arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi   | 79
> ++-
>  7 files changed, 165 insertions(+), 175 deletions(-)
>  create mode 100644 arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
>  create mode 100644 arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts

Tip:

If you pipe your request-pull through cat, or redirect it to a file, it'll use
shorter lines for the diffstat to make them fit in email without linewrap.


-Olof

Re: [GIT PULL] arm64: dts: uniphier: UniPhier DT updates (64bit) for v4.13

[Olof Johansson]

On Tue, Jun 13, 2017 at 12:48:03AM +0900, Masahiro Yamada wrote:
> Hi Arnd, Olof,
> 
> Here are UniPhier DT (64bit) updates for the v4.13 merge window.
> Please pull!
> 
> The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
> 
>   Linux 4.12-rc1 (2017-05-13 13:19:49 -0700)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
> tags/uniphier-dt64-v4.13
> 
> for you to fetch changes up to 1b6d58acdb26de8995f854cbf8b0d7214eefd884:
> 
>   arm64: dts: uniphier: add support for LD20 Global board (2017-06-13
> 00:00:17 +0900)
> 
> 
> UniPhier ARM64 SoC DT updates for v4.13
> 
> - specify timing delay properties of eMMC
> - fix W=1 build warnings
> - increase memory reserve size
> - use SPDX License Identifier
> - add new board support (LD11/LD20 global)

Merged, thanks!

> 
> Kunihiko Hayashi (2):
>   arm64: dts: uniphier: add support for LD11 Global board
>   arm64: dts: uniphier: add support for LD20 Global board
> 
> Masahiro Yamada (5):
>   arm64: dts: uniphier: add input-delay properties to Cadence eMMC node
>   arm64: dts: uniphier: add cdns, phy-dll-delay-sdclk(-hsmmc) for eMMC
>   arm64: dts: uniphier: fix simple-bus unit address format error
>   arm64: dts: uniphier: reserve more memory for LD11/LD20
>   arm64: dts: uniphier: use SPDX-License-Identifier
> 
> Viresh Kumar (1):
>   arm64: dts: uniphier: Use - instead of @ for DT OPP entries
> 
>  arch/arm64/boot/dts/socionext/Makefile |  2 +
>  arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts | 70
> +++
>  arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts| 38 +--
>  arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi   | 61
> ++--
>  arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts | 52
> 
>  arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts| 38 +--
>  arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi   | 79
> ++-
>  7 files changed, 165 insertions(+), 175 deletions(-)
>  create mode 100644 arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
>  create mode 100644 arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts

Tip:

If you pipe your request-pull through cat, or redirect it to a file, it'll use
shorter lines for the diffstat to make them fit in email without linewrap.


-Olof

Re: [PATCH v4 27/28] soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating

[Andreas Färber]

Am 06.06.2017 um 02:54 schrieb Andreas Färber:
> Allow the SMP code to reuse PM domain code for CPU2/CPU3 wakeup.
> 
> Signed-off-by: Andreas Färber 
> ---
>  v4: new
>  
>  drivers/soc/actions/Kconfig  |  4 +++
>  drivers/soc/actions/Makefile |  1 +
>  drivers/soc/actions/owl-sps-helper.c | 51 
> 
>  drivers/soc/actions/owl-sps.c| 34 +++-
>  include/linux/soc/actions/owl-sps.h  | 11 
>  5 files changed, 70 insertions(+), 31 deletions(-)
>  create mode 100644 drivers/soc/actions/owl-sps-helper.c
>  create mode 100644 include/linux/soc/actions/owl-sps.h

Applied to linux-actions.git v4.13/soc branch:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.13/soc

Needs to get merged first so that arm branch can start using it.

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v4 27/28] soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating

[Andreas Färber]

Am 06.06.2017 um 02:54 schrieb Andreas Färber:
> Allow the SMP code to reuse PM domain code for CPU2/CPU3 wakeup.
> 
> Signed-off-by: Andreas Färber 
> ---
>  v4: new
>  
>  drivers/soc/actions/Kconfig  |  4 +++
>  drivers/soc/actions/Makefile |  1 +
>  drivers/soc/actions/owl-sps-helper.c | 51 
> 
>  drivers/soc/actions/owl-sps.c| 34 +++-
>  include/linux/soc/actions/owl-sps.h  | 11 
>  5 files changed, 70 insertions(+), 31 deletions(-)
>  create mode 100644 drivers/soc/actions/owl-sps-helper.c
>  create mode 100644 include/linux/soc/actions/owl-sps.h

Applied to linux-actions.git v4.13/soc branch:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.13/soc

Needs to get merged first so that arm branch can start using it.

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v4 25/28] ARM: dts: s500: Add SPS node

[Andreas Färber]

Am 06.06.2017 um 02:54 schrieb Andreas Färber:
> Add Smart Power System node for PM domains.
> 
> Signed-off-by: Andreas Färber 
> ---
>  v3 -> v4:
>  * Extended commit message
>  * Split off association of power-domains (avoids include/dt-bindings/ 
> dependency)
>  
>  v3: new
>  
>  arch/arm/boot/dts/s500.dtsi | 6 ++
>  1 file changed, 6 insertions(+)

Applied to linux-actions.git v4.13/dt branch:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.13/dt

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v4 25/28] ARM: dts: s500: Add SPS node

[Andreas Färber]

Am 06.06.2017 um 02:54 schrieb Andreas Färber:
> Add Smart Power System node for PM domains.
> 
> Signed-off-by: Andreas Färber 
> ---
>  v3 -> v4:
>  * Extended commit message
>  * Split off association of power-domains (avoids include/dt-bindings/ 
> dependency)
>  
>  v3: new
>  
>  arch/arm/boot/dts/s500.dtsi | 6 ++
>  1 file changed, 6 insertions(+)

Applied to linux-actions.git v4.13/dt branch:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.13/dt

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v5 22/26] MAINTAINERS: Update Actions Semi section with SPS

[Andreas Färber]

Am 19.06.2017 um 05:44 schrieb Andreas Färber:
> Add file patterns to cover the SPS power domain driver and DT binding.
> 
> Signed-off-by: Andreas Färber 
> ---
>  v4 -> v5:
>  * Rebased onto timer additions
>  * Added dt-bindings header file pattern
>  
>  v4: new
>  
>  MAINTAINERS | 4 
>  1 file changed, 4 insertions(+)

Applied to linux-actions.git v4.13/soc branch:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.13/soc

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v5 22/26] MAINTAINERS: Update Actions Semi section with SPS

[Andreas Färber]

Am 19.06.2017 um 05:44 schrieb Andreas Färber:
> Add file patterns to cover the SPS power domain driver and DT binding.
> 
> Signed-off-by: Andreas Färber 
> ---
>  v4 -> v5:
>  * Rebased onto timer additions
>  * Added dt-bindings header file pattern
>  
>  v4: new
>  
>  MAINTAINERS | 4 
>  1 file changed, 4 insertions(+)

Applied to linux-actions.git v4.13/soc branch:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.13/soc

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v5 21/26] soc: actions: Add Owl SPS

[Andreas Färber]

Am 19.06.2017 um 05:40 schrieb Andreas Färber:
> Implement S500 Smart Power System power-gating.
> For now flag PD_CPU2 and PD_CPU3 as always-on.
> 
> Based on LeMaker linux-actions tree.
> 
> Signed-off-by: Andreas Färber 
> ---
>  v4 -> v5:
>  * Updated for header file rename
>  
>  v3 -> v4:
>  * Added genpd_flags field and set GENPD_FLAG_ALWAYS_ON for CPU2/CPU3
>  * Added debug output
>  
>  v3: new
>  
>  drivers/soc/Kconfig   |   1 +
>  drivers/soc/Makefile  |   1 +
>  drivers/soc/actions/Kconfig   |  12 ++
>  drivers/soc/actions/Makefile  |   1 +
>  drivers/soc/actions/owl-sps.c | 252 
> ++
>  5 files changed, 267 insertions(+)
>  create mode 100644 drivers/soc/actions/Kconfig
>  create mode 100644 drivers/soc/actions/Makefile
>  create mode 100644 drivers/soc/actions/owl-sps.c

Applied to linux-actions.git v4.13/soc branch:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.13/soc

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v5 21/26] soc: actions: Add Owl SPS

[Andreas Färber]

Am 19.06.2017 um 05:40 schrieb Andreas Färber:
> Implement S500 Smart Power System power-gating.
> For now flag PD_CPU2 and PD_CPU3 as always-on.
> 
> Based on LeMaker linux-actions tree.
> 
> Signed-off-by: Andreas Färber 
> ---
>  v4 -> v5:
>  * Updated for header file rename
>  
>  v3 -> v4:
>  * Added genpd_flags field and set GENPD_FLAG_ALWAYS_ON for CPU2/CPU3
>  * Added debug output
>  
>  v3: new
>  
>  drivers/soc/Kconfig   |   1 +
>  drivers/soc/Makefile  |   1 +
>  drivers/soc/actions/Kconfig   |  12 ++
>  drivers/soc/actions/Makefile  |   1 +
>  drivers/soc/actions/owl-sps.c | 252 
> ++
>  5 files changed, 267 insertions(+)
>  create mode 100644 drivers/soc/actions/Kconfig
>  create mode 100644 drivers/soc/actions/Makefile
>  create mode 100644 drivers/soc/actions/owl-sps.c

Applied to linux-actions.git v4.13/soc branch:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.13/soc

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v5 20/26] dt-bindings: power: Add Owl SPS power domains

[Andreas Färber]

Am 19.06.2017 um 05:36 schrieb Andreas Färber:
> Define power domains for all non-reserved S500 power gates.
> 
> Acked-by: Rob Herring 
> Signed-off-by: Andreas Färber 
> ---
>  v4 -> v5:
>  * Renamed header file with owl- prefix for uniqueness
>  
>  v3 -> v4: Unchanged
>  
>  v3: new
>  
>  .../devicetree/bindings/power/actions,owl-sps.txt | 17 +
>  include/dt-bindings/power/owl-s500-powergate.h| 19 
> +++
>  2 files changed, 36 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/power/actions,owl-sps.txt
>  create mode 100644 include/dt-bindings/power/owl-s500-powergate.h

Due to include dependency applying to linux-actions.git v4.13/soc:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.13/soc

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v5 20/26] dt-bindings: power: Add Owl SPS power domains

[Andreas Färber]

Am 19.06.2017 um 05:36 schrieb Andreas Färber:
> Define power domains for all non-reserved S500 power gates.
> 
> Acked-by: Rob Herring 
> Signed-off-by: Andreas Färber 
> ---
>  v4 -> v5:
>  * Renamed header file with owl- prefix for uniqueness
>  
>  v3 -> v4: Unchanged
>  
>  v3: new
>  
>  .../devicetree/bindings/power/actions,owl-sps.txt | 17 +
>  include/dt-bindings/power/owl-s500-powergate.h| 19 
> +++
>  2 files changed, 36 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/power/actions,owl-sps.txt
>  create mode 100644 include/dt-bindings/power/owl-s500-powergate.h

Due to include dependency applying to linux-actions.git v4.13/soc:

https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.13/soc

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v3] ip6_tunnel: Correct tos value in collect_md mode

[David Miller]

From: Haishuang Yan 
Date: Sat, 17 Jun 2017 11:38:05 +0800

> Same as ip_gre, geneve and vxlan, use key->tos as traffic class value.
> 
> CC: Peter Dawson 
> Fixes: 0e9a709560db ("ip6_tunnel, ip6_gre: fix setting of DSCP on
> encapsulated packets”)
> Signed-off-by: Haishuang Yan 
> 
> ---
> Changes since v3:
>   * Add fixes information
>   * Remove obsoleted RT_TOS mask

Applied.

Re: [PATCH v3] ip6_tunnel: Correct tos value in collect_md mode

[David Miller]

From: Haishuang Yan 
Date: Sat, 17 Jun 2017 11:38:05 +0800

> Same as ip_gre, geneve and vxlan, use key->tos as traffic class value.
> 
> CC: Peter Dawson 
> Fixes: 0e9a709560db ("ip6_tunnel, ip6_gre: fix setting of DSCP on
> encapsulated packets”)
> Signed-off-by: Haishuang Yan 
> 
> ---
> Changes since v3:
>   * Add fixes information
>   * Remove obsoleted RT_TOS mask

Applied.

[PATCH] v4l2-core: Use kvmalloc() for potentially big allocations

[Tomasz Figa]

There are multiple places where arrays or otherwise variable sized
buffer are allocated through V4L2 core code, including things like
controls, memory pages, staging buffers for ioctls and so on. Such
allocations can potentially require an order > 0 allocation from the
page allocator, which is not guaranteed to be fulfilled and is likely to
fail on a system with severe memory fragmentation (e.g. a system with
very long uptime).

Since the memory being allocated is intended to be used by the CPU
exclusively, we can consider using vmalloc() as a fallback and this is
exactly what the recently merged kvmalloc() helpers do. A kmalloc() call
is still attempted, even for order > 0 allocations, but it is done
with __GFP_NORETRY and __GFP_NOWARN, with expectation of failing if
requested memory is not available instantly. Only then the vmalloc()
fallback is used. This should give us fast and more reliable allocations
even on systems with higher memory pressure and/or more fragmentation,
while still retaining the same performance level on systems not
suffering from such conditions.

While at it, replace explicit array size calculations on changed
allocations with kvmalloc_array().

Purposedly not touching videobuf1, as it is deprecated, has only few
users remaining and would rather be seen removed instead.

Signed-off-by: Tomasz Figa 
Acked-by: Marek Szyprowski 
Acked-by: Sakari Ailus 
---
Changes since RFC:
 - added explicit includes for ,
 - added Marek's and Sakari's Acked-by.
---
 drivers/media/v4l2-core/v4l2-async.c   |  5 +++--
 drivers/media/v4l2-core/v4l2-ctrls.c   | 26 ++
 drivers/media/v4l2-core/v4l2-event.c   |  8 +---
 drivers/media/v4l2-core/v4l2-ioctl.c   |  7 ---
 drivers/media/v4l2-core/v4l2-subdev.c  |  8 +---
 drivers/media/v4l2-core/videobuf2-dma-sg.c |  8 
 6 files changed, 35 insertions(+), 27 deletions(-)

diff --git a/drivers/media/v4l2-core/v4l2-async.c 
b/drivers/media/v4l2-core/v4l2-async.c
index cbd919d4edd2..46fc8baf8a17 100644
--- a/drivers/media/v4l2-core/v4l2-async.c
+++ b/drivers/media/v4l2-core/v4l2-async.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -209,7 +210,7 @@ void v4l2_async_notifier_unregister(struct 
v4l2_async_notifier *notifier)
if (!notifier->v4l2_dev)
return;
 
-   dev = kmalloc_array(n_subdev, sizeof(*dev), GFP_KERNEL);
+   dev = kvmalloc_array(n_subdev, sizeof(*dev), GFP_KERNEL);
if (!dev) {
dev_err(notifier->v4l2_dev->dev,
"Failed to allocate device cache!\n");
@@ -265,7 +266,7 @@ void v4l2_async_notifier_unregister(struct 
v4l2_async_notifier *notifier)
}
put_device(d);
}
-   kfree(dev);
+   kvfree(dev);
 
notifier->v4l2_dev = NULL;
 
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c 
b/drivers/media/v4l2-core/v4l2-ctrls.c
index 5aed7bd20ad2..1e6363a650c0 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -19,6 +19,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1745,8 +1746,9 @@ int v4l2_ctrl_handler_init_class(struct v4l2_ctrl_handler 
*hdl,
INIT_LIST_HEAD(>ctrls);
INIT_LIST_HEAD(>ctrl_refs);
hdl->nr_of_buckets = 1 + nr_of_controls_hint / 8;
-   hdl->buckets = kcalloc(hdl->nr_of_buckets, sizeof(hdl->buckets[0]),
-  GFP_KERNEL);
+   hdl->buckets = kvmalloc_array(hdl->nr_of_buckets,
+ sizeof(hdl->buckets[0]),
+ GFP_KERNEL | __GFP_ZERO);
hdl->error = hdl->buckets ? 0 : -ENOMEM;
return hdl->error;
 }
@@ -1773,9 +1775,9 @@ void v4l2_ctrl_handler_free(struct v4l2_ctrl_handler *hdl)
list_del(>node);
list_for_each_entry_safe(sev, next_sev, >ev_subs, node)
list_del(>node);
-   kfree(ctrl);
+   kvfree(ctrl);
}
-   kfree(hdl->buckets);
+   kvfree(hdl->buckets);
hdl->buckets = NULL;
hdl->cached = NULL;
hdl->error = 0;
@@ -2023,7 +2025,7 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct 
v4l2_ctrl_handler *hdl,
 is_array)
sz_extra += 2 * tot_ctrl_size;
 
-   ctrl = kzalloc(sizeof(*ctrl) + sz_extra, GFP_KERNEL);
+   ctrl = kvzalloc(sizeof(*ctrl) + sz_extra, GFP_KERNEL);
if (ctrl == NULL) {
handler_set_err(hdl, -ENOMEM);
return NULL;
@@ -2072,7 +2074,7 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct 
v4l2_ctrl_handler *hdl,
}
 
if (handler_new_ref(hdl, ctrl)) {
-   kfree(ctrl);
+   kvfree(ctrl);
return NULL;
}
mutex_lock(hdl->lock);
@@ -2842,8 +2844,8 @@ int 

[PATCH] v4l2-core: Use kvmalloc() for potentially big allocations

[Tomasz Figa]

There are multiple places where arrays or otherwise variable sized
buffer are allocated through V4L2 core code, including things like
controls, memory pages, staging buffers for ioctls and so on. Such
allocations can potentially require an order > 0 allocation from the
page allocator, which is not guaranteed to be fulfilled and is likely to
fail on a system with severe memory fragmentation (e.g. a system with
very long uptime).

Since the memory being allocated is intended to be used by the CPU
exclusively, we can consider using vmalloc() as a fallback and this is
exactly what the recently merged kvmalloc() helpers do. A kmalloc() call
is still attempted, even for order > 0 allocations, but it is done
with __GFP_NORETRY and __GFP_NOWARN, with expectation of failing if
requested memory is not available instantly. Only then the vmalloc()
fallback is used. This should give us fast and more reliable allocations
even on systems with higher memory pressure and/or more fragmentation,
while still retaining the same performance level on systems not
suffering from such conditions.

While at it, replace explicit array size calculations on changed
allocations with kvmalloc_array().

Purposedly not touching videobuf1, as it is deprecated, has only few
users remaining and would rather be seen removed instead.

Signed-off-by: Tomasz Figa 
Acked-by: Marek Szyprowski 
Acked-by: Sakari Ailus 
---
Changes since RFC:
 - added explicit includes for ,
 - added Marek's and Sakari's Acked-by.
---
 drivers/media/v4l2-core/v4l2-async.c   |  5 +++--
 drivers/media/v4l2-core/v4l2-ctrls.c   | 26 ++
 drivers/media/v4l2-core/v4l2-event.c   |  8 +---
 drivers/media/v4l2-core/v4l2-ioctl.c   |  7 ---
 drivers/media/v4l2-core/v4l2-subdev.c  |  8 +---
 drivers/media/v4l2-core/videobuf2-dma-sg.c |  8 
 6 files changed, 35 insertions(+), 27 deletions(-)

diff --git a/drivers/media/v4l2-core/v4l2-async.c 
b/drivers/media/v4l2-core/v4l2-async.c
index cbd919d4edd2..46fc8baf8a17 100644
--- a/drivers/media/v4l2-core/v4l2-async.c
+++ b/drivers/media/v4l2-core/v4l2-async.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -209,7 +210,7 @@ void v4l2_async_notifier_unregister(struct 
v4l2_async_notifier *notifier)
if (!notifier->v4l2_dev)
return;
 
-   dev = kmalloc_array(n_subdev, sizeof(*dev), GFP_KERNEL);
+   dev = kvmalloc_array(n_subdev, sizeof(*dev), GFP_KERNEL);
if (!dev) {
dev_err(notifier->v4l2_dev->dev,
"Failed to allocate device cache!\n");
@@ -265,7 +266,7 @@ void v4l2_async_notifier_unregister(struct 
v4l2_async_notifier *notifier)
}
put_device(d);
}
-   kfree(dev);
+   kvfree(dev);
 
notifier->v4l2_dev = NULL;
 
diff --git a/drivers/media/v4l2-core/v4l2-ctrls.c 
b/drivers/media/v4l2-core/v4l2-ctrls.c
index 5aed7bd20ad2..1e6363a650c0 100644
--- a/drivers/media/v4l2-core/v4l2-ctrls.c
+++ b/drivers/media/v4l2-core/v4l2-ctrls.c
@@ -19,6 +19,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1745,8 +1746,9 @@ int v4l2_ctrl_handler_init_class(struct v4l2_ctrl_handler 
*hdl,
INIT_LIST_HEAD(>ctrls);
INIT_LIST_HEAD(>ctrl_refs);
hdl->nr_of_buckets = 1 + nr_of_controls_hint / 8;
-   hdl->buckets = kcalloc(hdl->nr_of_buckets, sizeof(hdl->buckets[0]),
-  GFP_KERNEL);
+   hdl->buckets = kvmalloc_array(hdl->nr_of_buckets,
+ sizeof(hdl->buckets[0]),
+ GFP_KERNEL | __GFP_ZERO);
hdl->error = hdl->buckets ? 0 : -ENOMEM;
return hdl->error;
 }
@@ -1773,9 +1775,9 @@ void v4l2_ctrl_handler_free(struct v4l2_ctrl_handler *hdl)
list_del(>node);
list_for_each_entry_safe(sev, next_sev, >ev_subs, node)
list_del(>node);
-   kfree(ctrl);
+   kvfree(ctrl);
}
-   kfree(hdl->buckets);
+   kvfree(hdl->buckets);
hdl->buckets = NULL;
hdl->cached = NULL;
hdl->error = 0;
@@ -2023,7 +2025,7 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct 
v4l2_ctrl_handler *hdl,
 is_array)
sz_extra += 2 * tot_ctrl_size;
 
-   ctrl = kzalloc(sizeof(*ctrl) + sz_extra, GFP_KERNEL);
+   ctrl = kvzalloc(sizeof(*ctrl) + sz_extra, GFP_KERNEL);
if (ctrl == NULL) {
handler_set_err(hdl, -ENOMEM);
return NULL;
@@ -2072,7 +2074,7 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct 
v4l2_ctrl_handler *hdl,
}
 
if (handler_new_ref(hdl, ctrl)) {
-   kfree(ctrl);
+   kvfree(ctrl);
return NULL;
}
mutex_lock(hdl->lock);
@@ -2842,8 +2844,8 @@ int v4l2_g_ext_ctrls(struct v4l2_ctrl_handler *hdl, 
struct v4l2_ext_controls *cs

Re: [PATCH] pptp: Remove unused variable in pptp_release()

[David Miller]

From: Christos Gkekas 
Date: Sun, 18 Jun 2017 16:41:40 +0100

> Variable opt in pptp_release() is set but never used, thus needs to be
> removed.
> 
> Signed-off-by: Christos Gkekas 

Applied to net-next.

Re: [PATCH] pptp: Remove unused variable in pptp_release()

[David Miller]

From: Christos Gkekas 
Date: Sun, 18 Jun 2017 16:41:40 +0100

> Variable opt in pptp_release() is set but never used, thus needs to be
> removed.
> 
> Signed-off-by: Christos Gkekas 

Applied to net-next.

Re: [PATCH V3 net-next 6/8] net: hns3: Add MDIO support to HNS3 Ethernet driver for hip08 SoC

[Andrew Lunn]

On Sat, Jun 17, 2017 at 06:24:29PM +0100, Salil Mehta wrote:
> This patch adds the support of MDIO bus interface for HNS3 driver.
> Code provides various interfaces to start and stop the PHY layer
> and to read and write the MDIO bus or PHY.
> 
> Signed-off-by: Daode Huang 
> Signed-off-by: lipeng 
> Signed-off-by: Salil Mehta 
> Signed-off-by: Yisen Zhuang 
> ---
> Patch V3: Addressed Below comments:
>  1. Florian Fainelli: https://lkml.org/lkml/2017/6/13/963
>  2. Andrew Lunn: https://lkml.org/lkml/2017/6/13/1039

It is normal to say what you actually changed.

> Patch V2: Addressed below comments:
>  1. Florian Fainelli: https://lkml.org/lkml/2017/6/10/130
>  2. Andrew Lunn: https://lkml.org/lkml/2017/6/10/168
> Patch V1: Initial Submit
> ---
>  .../ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c| 249 
> +
>  1 file changed, 249 insertions(+)
>  create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
> 
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c 
> b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
> new file mode 100644
> index 000..5b21c50
> --- /dev/null
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
> @@ -0,0 +1,249 @@
> +/*
> + * Copyright (c) 2016~2017 Hisilicon Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include 
> +#include 
> +
> +#include "hclge_cmd.h"
> +#include "hclge_main.h"
> +
> +enum hclge_mdio_c22_op_seq {
> + HCLGE_MDIO_C22_WRITE = 1,
> + HCLGE_MDIO_C22_READ = 2
> +};
> +
> +#define HCLGE_MDIO_CTRL_START_BIT   BIT(0)
> +#define HCLGE_MDIO_CTRL_ST_MSK  GENMASK(2, 1)
> +#define HCLGE_MDIO_CTRL_ST_LSH  1
> +#define HCLGE_MDIO_IS_C22(c22)  (((c22) << HCLGE_MDIO_CTRL_ST_LSH) & \
> + HCLGE_MDIO_CTRL_ST_MSK)
> +
> +#define HCLGE_MDIO_CTRL_OP_MSK  GENMASK(4, 3)
> +#define HCLGE_MDIO_CTRL_OP_LSH  3
> +#define HCLGE_MDIO_CTRL_OP(access) \
> + (((access) << HCLGE_MDIO_CTRL_OP_LSH) & HCLGE_MDIO_CTRL_OP_MSK)
> +#define HCLGE_MDIO_CTRL_PRTAD_MSK   GENMASK(4, 0)
> +#define HCLGE_MDIO_CTRL_DEVAD_MSK   GENMASK(4, 0)

This all seems overly complex. How about

#define HCLGE_MDIO_CTRL_START_BIT   BIT(0)
#define HCLGE_MDIO_C22  BIT(1)
#define HCLGE_MDIO_WRITE(1 << 3)
#define HCLGE_MDIO_READ (2 << 3)
#define HCLGE_MDIO_C22_WRITE(HCLGE_MDIO_CTRL_START_BIT | 
HCLGE_MDIO_C22 | HCLGE_MDIO_WRITE)
#define HCLGE_MDIO_C22_READ (HCLGE_MDIO_CTRL_START_BIT | 
HCLGE_MDIO_C22 | HCLGE_MDIO_READ)
#define HCLGE_MDIO_C45_WRITE(HCLGE_MDIO_CTRL_START_BIT | 
HCLGE_MDIO_WRITE)
#define HCLGE_MDIO_C45_READ (HCLGE_MDIO_CTRL_START_BIT | 
HCLGE_MDIO_READ)

#define HCLGE_MDIO_STATUS_ERROR BIT(0)

Keep it simple, don't have more defines than what you need.

> +static int hclge_mdio_write(struct mii_bus *bus, int phy_id, int regnum,
> + u16 data)
> +{
> + struct hclge_dev *hdev = (struct hclge_dev *)bus->priv;
> + struct hclge_mdio_cfg_cmd *mdio_cmd;
> + enum hclge_cmd_status status;
> + struct hclge_desc desc;
> + u8 devad;
> +
> + if (!bus)
> + return -EINVAL;
> +
> + devad = ((regnum >> 16) & 0x1f);

So you have changed this to only support C22. Which means devad is not
needed, since that is c45 only.

> +
> + dev_dbg(>dev, "phy id=%d, devad=%d\n", phy_id, devad);
> +
> + hclge_cmd_setup_basic_desc(, HCLGE_OPC_MDIO_CONFIG, false);
> +
> + mdio_cmd = (struct hclge_mdio_cfg_cmd *)desc.data;
> +
> + mdio_cmd->prtad = phy_id & HCLGE_MDIO_CTRL_PRTAD_MSK;
> + mdio_cmd->data_wr = cpu_to_le16(data);
> + mdio_cmd->devad = devad & HCLGE_MDIO_CTRL_DEVAD_MSK;
> +
> + /* Write reg and data */
> + mdio_cmd->ctrl_bit = HCLGE_MDIO_IS_C22(1);

Passing the parameter is now pointless if you are only doing C22.

> + mdio_cmd->ctrl_bit |= HCLGE_MDIO_CTRL_OP(HCLGE_MDIO_C22_WRITE);
> + mdio_cmd->ctrl_bit |= HCLGE_MDIO_CTRL_START_BIT;

Given the above defines, this now becomes

mdio_cmd->ctrl_bit = HCLGE_MDIO_C22_WRITE;

> +
> + status = hclge_cmd_send(>hw, , 1);
> + if (status) {
> + dev_err(>pdev->dev,
> + "mdio write fail when sending cmd, status is %d.\n",
> + status);
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static int hclge_mdio_read(struct mii_bus *bus, int phy_id, int regnum)
> +{
> + struct hclge_dev *hdev = (struct hclge_dev *)bus->priv;
> + struct hclge_mdio_cfg_cmd *mdio_cmd;
> + enum hclge_cmd_status status;
> + struct hclge_desc desc;
> + u8 devad;
> +
> 

Re: [PATCH V3 net-next 6/8] net: hns3: Add MDIO support to HNS3 Ethernet driver for hip08 SoC

[Andrew Lunn]

On Sat, Jun 17, 2017 at 06:24:29PM +0100, Salil Mehta wrote:
> This patch adds the support of MDIO bus interface for HNS3 driver.
> Code provides various interfaces to start and stop the PHY layer
> and to read and write the MDIO bus or PHY.
> 
> Signed-off-by: Daode Huang 
> Signed-off-by: lipeng 
> Signed-off-by: Salil Mehta 
> Signed-off-by: Yisen Zhuang 
> ---
> Patch V3: Addressed Below comments:
>  1. Florian Fainelli: https://lkml.org/lkml/2017/6/13/963
>  2. Andrew Lunn: https://lkml.org/lkml/2017/6/13/1039

It is normal to say what you actually changed.

> Patch V2: Addressed below comments:
>  1. Florian Fainelli: https://lkml.org/lkml/2017/6/10/130
>  2. Andrew Lunn: https://lkml.org/lkml/2017/6/10/168
> Patch V1: Initial Submit
> ---
>  .../ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c| 249 
> +
>  1 file changed, 249 insertions(+)
>  create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
> 
> diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c 
> b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
> new file mode 100644
> index 000..5b21c50
> --- /dev/null
> +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c
> @@ -0,0 +1,249 @@
> +/*
> + * Copyright (c) 2016~2017 Hisilicon Limited.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#include 
> +#include 
> +
> +#include "hclge_cmd.h"
> +#include "hclge_main.h"
> +
> +enum hclge_mdio_c22_op_seq {
> + HCLGE_MDIO_C22_WRITE = 1,
> + HCLGE_MDIO_C22_READ = 2
> +};
> +
> +#define HCLGE_MDIO_CTRL_START_BIT   BIT(0)
> +#define HCLGE_MDIO_CTRL_ST_MSK  GENMASK(2, 1)
> +#define HCLGE_MDIO_CTRL_ST_LSH  1
> +#define HCLGE_MDIO_IS_C22(c22)  (((c22) << HCLGE_MDIO_CTRL_ST_LSH) & \
> + HCLGE_MDIO_CTRL_ST_MSK)
> +
> +#define HCLGE_MDIO_CTRL_OP_MSK  GENMASK(4, 3)
> +#define HCLGE_MDIO_CTRL_OP_LSH  3
> +#define HCLGE_MDIO_CTRL_OP(access) \
> + (((access) << HCLGE_MDIO_CTRL_OP_LSH) & HCLGE_MDIO_CTRL_OP_MSK)
> +#define HCLGE_MDIO_CTRL_PRTAD_MSK   GENMASK(4, 0)
> +#define HCLGE_MDIO_CTRL_DEVAD_MSK   GENMASK(4, 0)

This all seems overly complex. How about

#define HCLGE_MDIO_CTRL_START_BIT   BIT(0)
#define HCLGE_MDIO_C22  BIT(1)
#define HCLGE_MDIO_WRITE(1 << 3)
#define HCLGE_MDIO_READ (2 << 3)
#define HCLGE_MDIO_C22_WRITE(HCLGE_MDIO_CTRL_START_BIT | 
HCLGE_MDIO_C22 | HCLGE_MDIO_WRITE)
#define HCLGE_MDIO_C22_READ (HCLGE_MDIO_CTRL_START_BIT | 
HCLGE_MDIO_C22 | HCLGE_MDIO_READ)
#define HCLGE_MDIO_C45_WRITE(HCLGE_MDIO_CTRL_START_BIT | 
HCLGE_MDIO_WRITE)
#define HCLGE_MDIO_C45_READ (HCLGE_MDIO_CTRL_START_BIT | 
HCLGE_MDIO_READ)

#define HCLGE_MDIO_STATUS_ERROR BIT(0)

Keep it simple, don't have more defines than what you need.

> +static int hclge_mdio_write(struct mii_bus *bus, int phy_id, int regnum,
> + u16 data)
> +{
> + struct hclge_dev *hdev = (struct hclge_dev *)bus->priv;
> + struct hclge_mdio_cfg_cmd *mdio_cmd;
> + enum hclge_cmd_status status;
> + struct hclge_desc desc;
> + u8 devad;
> +
> + if (!bus)
> + return -EINVAL;
> +
> + devad = ((regnum >> 16) & 0x1f);

So you have changed this to only support C22. Which means devad is not
needed, since that is c45 only.

> +
> + dev_dbg(>dev, "phy id=%d, devad=%d\n", phy_id, devad);
> +
> + hclge_cmd_setup_basic_desc(, HCLGE_OPC_MDIO_CONFIG, false);
> +
> + mdio_cmd = (struct hclge_mdio_cfg_cmd *)desc.data;
> +
> + mdio_cmd->prtad = phy_id & HCLGE_MDIO_CTRL_PRTAD_MSK;
> + mdio_cmd->data_wr = cpu_to_le16(data);
> + mdio_cmd->devad = devad & HCLGE_MDIO_CTRL_DEVAD_MSK;
> +
> + /* Write reg and data */
> + mdio_cmd->ctrl_bit = HCLGE_MDIO_IS_C22(1);

Passing the parameter is now pointless if you are only doing C22.

> + mdio_cmd->ctrl_bit |= HCLGE_MDIO_CTRL_OP(HCLGE_MDIO_C22_WRITE);
> + mdio_cmd->ctrl_bit |= HCLGE_MDIO_CTRL_START_BIT;

Given the above defines, this now becomes

mdio_cmd->ctrl_bit = HCLGE_MDIO_C22_WRITE;

> +
> + status = hclge_cmd_send(>hw, , 1);
> + if (status) {
> + dev_err(>pdev->dev,
> + "mdio write fail when sending cmd, status is %d.\n",
> + status);
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static int hclge_mdio_read(struct mii_bus *bus, int phy_id, int regnum)
> +{
> + struct hclge_dev *hdev = (struct hclge_dev *)bus->priv;
> + struct hclge_mdio_cfg_cmd *mdio_cmd;
> + enum hclge_cmd_status status;
> + struct hclge_desc desc;
> + u8 devad;
> +
> + if (!bus)
> + return -EINVAL;
> +
> + devad = ((regnum >> 16) & GENMASK(4,