Re: [PATCH] Module argument to control whether intel-spi-pci attempts to turn the SPI flash chip writeable

2020-07-24 Thread Greg Kroah-Hartman
On Fri, Jul 24, 2020 at 06:28:53PM -0300, Daniel Gutson wrote:
> Currently, intel-spi has a module argument that controls whether the driver
> attempts to turn the SPI flash chip writeable. The default value
> is FALSE (don't try to make it writeable).
> However, this flag applies only for a number of devices, coming from the
> platform driver, whereas the devices detected through the PCI driver
> (intel-spi-pci) are not subject to this check since the configuration
> takes place in intel-spi-pci which doesn't have an argument.
> 
> That's why I propose this patch to add such argument to intel-spi-pci,
> so the user can control whether the driver tries to make the chip
> writeable or not, being the default FALSE as is the argument of
> intel-spi.
> 
> Signed-off-by: Daniel Gutson 
> ---
>  drivers/mtd/spi-nor/controllers/intel-spi-pci.c | 16 +++-
>  1 file changed, 11 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/controllers/intel-spi-pci.c 
> b/drivers/mtd/spi-nor/controllers/intel-spi-pci.c
> index 81329f680bec..77e57450f166 100644
> --- a/drivers/mtd/spi-nor/controllers/intel-spi-pci.c
> +++ b/drivers/mtd/spi-nor/controllers/intel-spi-pci.c
> @@ -24,6 +24,10 @@ static const struct intel_spi_boardinfo cnl_info = {
>   .type = INTEL_SPI_CNL,
>  };
>  
> +static bool writeable;
> +module_param(writeable, bool, 0);
> +MODULE_PARM_DESC(writeable, "Enable write access to SPI flash chip 
> (default=0)");

Ick, this isn't the 1990's, please do not add new module parameters,
they are a major pain to work with and only work on a global basis, not
on a per-device basis.

No user will remember how to use this, as it isn't documented anywhere
either.  Can you make this a sysfs attribute or something, or better
yet, make it "just work" depending on the device type?

thanks,

greg k-h


Re: Re: [PATCH] octeontx2-af: Fix use of uninitialized pointer bmap

2020-07-24 Thread dinghao . liu
> From: Dinghao Liu 
> Date: Fri, 24 Jul 2020 16:06:57 +0800
> 
> > If req->ctype does not match any of NIX_AQ_CTYPE_CQ,
> > NIX_AQ_CTYPE_SQ or NIX_AQ_CTYPE_RQ, pointer bmap will remain
> > uninitialized and be accessed in test_bit(), which can lead
> > to kernal crash.
> 
> This can never happen.
> 
> > Fix this by returning an error code if this case is triggered.
> > 
> > Signed-off-by: Dinghao Liu 
> 
> I strongly dislike changes like this.
> 
> Most callers of nix_lf_hwctx_disable() inside of rvu_nix.c set
> req->ctype to one of the handled values.
> 
> The only other case, rvu_mbox_handler_nix_hwctx_disable(), is a
> completely unused function and should be removed.
> 
> There is no functional problem in this code at all.
> 
> It is not possible show a code path where the stated problem can
> actually occur.

It's clear to me now. Thanks.

Regards,
Dinghao

Re: [PATCH] Fix coding style issues

2020-07-24 Thread Greg Kroah-Hartman
On Sat, Jul 25, 2020 at 01:55:19AM +0530, Anant Thazhemadam wrote:
> Coding style issues found were rectified
> 
> Signed-off-by: Anant Thazhemadam 
> ---
>  drivers/staging/rtl8188eu/core/rtw_security.c | 92 ++-
>  1 file changed, 47 insertions(+), 45 deletions(-)
> 
> diff --git a/drivers/staging/rtl8188eu/core/rtw_security.c 
> b/drivers/staging/rtl8188eu/core/rtw_security.c
> index 21f6652dd69f..3111f4a899ee 100644
> --- a/drivers/staging/rtl8188eu/core/rtw_security.c
> +++ b/drivers/staging/rtl8188eu/core/rtw_security.c
> @@ -127,8 +127,8 @@ static __le32 getcrc32(u8 *buf, int len)
>  }
>  
>  /*
> - Need to consider the fragment  situation
> -*/
> + *   Need to consider the fragment  situation
> + */
>  void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe)
>  {
>   int curfragnum, length;
> @@ -429,9 +429,9 @@ static const unsigned short Sbox1[2][256] = {  /* Sbox 
> for hash (can be in ROM)
>   0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
>   0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
>   0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
> -  },
> +},
>  
> -  {  /* second half of table is unsigned char-reversed version of first! */
> +{  /* second half of table is unsigned char-reversed version of first! */
>   0xA5C6, 0x84F8, 0x99EE, 0x8DF6, 0x0DFF, 0xBDD6, 0xB1DE, 0x5491,
>   0x5060, 0x0302, 0xA9CE, 0x7D56, 0x19E7, 0x62B5, 0xE64D, 0x9AEC,
>   0x458F, 0x9D1F, 0x4089, 0x87FA, 0x15EF, 0xEBB2, 0xC98E, 0x0BFB,
> @@ -464,26 +464,26 @@ static const unsigned short Sbox1[2][256] = {  /* Sbox 
> for hash (can be in ROM)
>   0xB62D, 0x223C, 0x9215, 0x20C9, 0x4987, 0xFFAA, 0x7850, 0x7AA5,
>   0x8F03, 0xF859, 0x8009, 0x171A, 0xDA65, 0x31D7, 0xC684, 0xB8D0,
>   0xC382, 0xB029, 0x775A, 0x111E, 0xCB7B, 0xFCA8, 0xD66D, 0x3A2C,
> -  }
> +}
>  };
>  
> - /*
> -**
> -* Routine: Phase 1 -- generate P1K, given TA, TK, IV32
> -*
> -* Inputs:
> -* tk[]  = temporal key[128 bits]
> -* ta[]  = transmitter's MAC address  [ 48 bits]
> -* iv32  = upper 32 bits of IV  [ 32 bits]
> -* Output:
> -* p1k[] = Phase 1 key  [ 80 bits]
> -*
> -* Note:
> -* This function only needs to be called every 2**16 packets,
> -* although in theory it could be called every packet.
> -*
> -**
> -*/
> +/*
> + **
> + * Routine: Phase 1 -- generate P1K, given TA, TK, IV32
> + *
> + * Inputs:
> + * tk[]  = temporal key   [128 bits]
> + * ta[]  = transmitter's MAC address [ 48 bits]
> + * iv32  = upper 32 bits of IV [ 32 bits]
> + * Output:
> + * p1k[] = Phase 1 key [ 80 bits]
> + *
> + * Note:
> + * This function only needs to be called every 2**16 packets,
> + * although in theory it could be called every packet.
> + *
> + **
> + */
>  static void phase1(u16 *p1k, const u8 *tk, const u8 *ta, u32 iv32)
>  {
>   int  i;
> @@ -507,28 +507,28 @@ static void phase1(u16 *p1k, const u8 *tk, const u8 
> *ta, u32 iv32)
>  }
>  
>  /*
> -**
> -* Routine: Phase 2 -- generate RC4KEY, given TK, P1K, IV16
> -*
> -* Inputs:
> -* tk[]  = Temporal key[128 bits]
> -* p1k[] = Phase 1 output key[ 80 bits]
> -* iv16  = low 16 bits of IV counter  [ 16 bits]
> -* Output:
> -* rc4key[]  = the key used to encrypt the packet   [128 bits]
> -*
> -* Note:
> -* The value {TA, IV32, IV16} for Phase1/Phase2 must be unique
> -* across all packets using the same key TK value. Then, for a
> -* given value of TK[], this TKIP48 construction guarantees that
> -* the final RC4KEY value is unique across all packets.
> -*
> -* Suggested implementation optimization: if PPK[] is "overlaid"
> -* appropriately on RC4KEY[], there is no need for the final
> -* for loop below that copies the PPK[] result into RC4KEY[].
> -*
> -**
> -*/
> + **
> + * Routine: Phase 2 -- generate RC4KEY, given TK, P1K, IV16
> + *
> + * Inputs:
> + * tk[]  = Temporal key   [128 bits]
> + * p1k[] = Phase 1 output key   [ 80 bits]
> + * iv16  = low 16 bits of IV counter [ 16 bits]
> + * Output:
> + * rc4key[]  = the key used to encrypt the packet   [128 bits]
> + *
> + * Note:
> + * The value {TA, IV32, IV16} for Phase1/Phase2 must be unique
> + * 

Re: [PATCH 14216/14216] ALSA: usb-audio: This patch for prevent auto wakeup from s3 trig by usb disconnect signal from Lenovo Thinkcentre TI024Gen3 USB-audio.

2020-07-24 Thread Greg KH
On Sat, Jul 25, 2020 at 12:01:55PM +0800, penghao wrote:
> From: "peng...@deepin.com" 
> 
>  TI024Gen3 USB-audio is controlled by TI024Gen3,when TI024Gens
>  enter sleep mode, USB-audio will disconnect from USB bus port,
>  so disabled the /sys/bus/usb/*/power/wakeup Fixesimmediately
>  wakup form s3 state

Why the indentation?

> 
> Signed-off-by: peng...@uniontech.com 
> Signed-off-by: peng...@deepin.com 

We need a name, not just an email address.

And where are the 14215 other patches in this patch series?


> ---
>  sound/usb/card.c | 7 +++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/sound/usb/card.c b/sound/usb/card.c
> index 2644a5ae2b75..969c3809e051 100644
> --- a/sound/usb/card.c
> +++ b/sound/usb/card.c
> @@ -640,6 +640,12 @@ static int usb_audio_probe(struct usb_interface *intf,
>   }
>   }
>   dev_set_drvdata(>dev, chip);
> + /*
> +  * ALSA: usb-audio: Add prevent wakeup from s3 state trig by lenovo
> +  * ThinkCentre TI024Gen3 USB-audio
> +  */
> + if ((usb_id->idVendor == 0x17ef) && (usb_id->idProduct == 0xa012))
> + device_set_wakeup_enable(>dev, 0);

Shouldn't there be a quirk for this type of device that can be used
instead?

thanks,

greg k-h


[tip:sched/urgent] BUILD SUCCESS 062d3f95b630113e1156a31f376ad36e25da29a7

2020-07-24 Thread kernel test robot
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git  
sched/urgent
branch HEAD: 062d3f95b630113e1156a31f376ad36e25da29a7  sched: Warn if garbage 
is passed to default_wake_function()

elapsed time: 949m

configs tested: 80
configs skipped: 1

The following configs have been built successfully.
More configs may be tested in the coming days.

arm defconfig
arm  allyesconfig
arm  allmodconfig
arm   allnoconfig
arm64allyesconfig
arm64   defconfig
arm64allmodconfig
arm64 allnoconfig
i386 allyesconfig
i386defconfig
i386  debian-10.3
i386  allnoconfig
ia64 allmodconfig
ia64defconfig
ia64  allnoconfig
ia64 allyesconfig
m68k allmodconfig
m68k  allnoconfig
m68k   sun3_defconfig
m68kdefconfig
m68k allyesconfig
nios2   defconfig
nios2allyesconfig
openriscdefconfig
c6x  allyesconfig
c6x   allnoconfig
openrisc allyesconfig
nds32   defconfig
nds32 allnoconfig
csky allyesconfig
cskydefconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
h8300allmodconfig
xtensa  defconfig
arc defconfig
arc  allyesconfig
sh   allmodconfig
shallnoconfig
microblazeallnoconfig
mips allyesconfig
mips  allnoconfig
mips allmodconfig
pariscallnoconfig
parisc  defconfig
parisc   allyesconfig
parisc   allmodconfig
powerpc defconfig
powerpc  allyesconfig
powerpc  rhel-kconfig
powerpc  allmodconfig
powerpc   allnoconfig
x86_64   randconfig-a014-20200724
x86_64   randconfig-a016-20200724
x86_64   randconfig-a015-20200724
x86_64   randconfig-a012-20200724
x86_64   randconfig-a013-20200724
x86_64   randconfig-a011-20200724
riscvallyesconfig
riscv allnoconfig
riscv   defconfig
riscvallmodconfig
s390 allyesconfig
s390  allnoconfig
s390 allmodconfig
s390defconfig
sparcallyesconfig
sparc   defconfig
sparc64 defconfig
sparc64   allnoconfig
sparc64  allyesconfig
sparc64  allmodconfig
x86_64   rhel
x86_64lkp
x86_64  fedora-25
x86_64rhel-7.6-kselftests
x86_64   rhel-8.3
x86_64  kexec

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


Re: [PATCH 3/4] RISC-V: Do not rely on initrd_start/end computed during early dt parsing

2020-07-24 Thread Atish Patra
On Fri, Jul 24, 2020 at 10:12 PM Palmer Dabbelt  wrote:
>
> On Wed, 15 Jul 2020 16:30:08 PDT (-0700), Atish Patra wrote:
> > Currently, initrd_start/end are computed during early_init_dt_scan
> > but used during arch_setup. We will get the following panic if initrd is 
> > used
> > and CONFIG_DEBUG_VIRTUAL is turned on.
> >
> > [0.00] [ cut here ]
> > [0.00] kernel BUG at arch/riscv/mm/physaddr.c:33!
> > [0.00] Kernel BUG [#1]
> > [0.00] Modules linked in:
> > [0.00] CPU: 0 PID: 0 Comm: swapper Not tainted 
> > 5.8.0-rc4-00015-ged0b226fed02 #886
> > [0.00] epc: ffe0002058d2 ra : ffe053f0 sp : 
> > ffe001001f40
> > [0.00]  gp : ffe00106e250 tp : ffe001009d40 t0 : 
> > ffe00107ee28
> > [0.00]  t1 :  t2 : ffe000a2e880 s0 : 
> > ffe001001f50
> > [0.00]  s1 : ffe0001383e8 a0 : ffe00c087e00 a1 : 
> > 8020
> > [0.00]  a2 : 010bf000 a3 : ffe00106f3c8 a4 : 
> > ffe0010bf000
> > [0.00]  a5 : ffe0 a6 : 0006 a7 : 
> > 0001
> > [0.00]  s2 : ffe00106f068 s3 : ffe00106f070 s4 : 
> > 8020
> > [0.00]  s5 : 8220 s6 :  s7 : 
> > 
> > [0.00]  s8 : 80011010 s9 : 80012700 s10: 
> > 
> > [0.00]  s11:  t3 : 0001fe30 t4 : 
> > 0001fe30
> > [0.00]  t5 :  t6 : ffe00107c471
> > [0.00] status: 0100 badaddr:  cause: 
> > 0003
> > [0.00] random: get_random_bytes called from 
> > print_oops_end_marker+0x22/0x46 with crng_init=0
> >
> > To avoid the error, initrd_start/end can be computed from 
> > phys_initrd_start/size
> > in setup itself. It also improves the initrd placement by aligning the start
> > and size with the page size.
> >
> > Fixes: 6435f773d81f (riscv: mm: add support for CONFIG_DEBUG_VIRTUAL)
> > Signed-off-by: Atish Patra 
> > ---
> >  arch/riscv/mm/init.c | 33 +++--
> >  1 file changed, 27 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> > index 8d22973bde40..f818a47a72d1 100644
> > --- a/arch/riscv/mm/init.c
> > +++ b/arch/riscv/mm/init.c
> > @@ -95,19 +95,40 @@ void __init mem_init(void)
> >  #ifdef CONFIG_BLK_DEV_INITRD
> >  static void __init setup_initrd(void)
> >  {
> > + phys_addr_t start;
> >   unsigned long size;
> >
> > - if (initrd_start >= initrd_end) {
> > - pr_info("initrd not found or empty");
> > + /* Ignore the virtul address computed during device tree parsing */
> > + initrd_start = initrd_end = 0;
> > +
> > + if (!phys_initrd_size)
> > + return;
> > + /*
> > +  * Round the memory region to page boundaries as per free_initrd_mem()
> > +  * This allows us to detect whether the pages overlapping the initrd
> > +  * are in use, but more importantly, reserves the entire set of pages
> > +  * as we don't want these pages allocated for other purposes.
> > +  */
> > + start = round_down(phys_initrd_start, PAGE_SIZE);
> > + size = phys_initrd_size + (phys_initrd_start - start);
> > + size = round_up(size, PAGE_SIZE);
> > +
> > + if (!memblock_is_region_memory(start, size)) {
> > + pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region",
> > +(u64)start, size);
> >   goto disable;
> >   }
> > - if (__pa_symbol(initrd_end) > PFN_PHYS(max_low_pfn)) {
> > - pr_err("initrd extends beyond end of memory");
> > +
> > + if (memblock_is_region_reserved(start, size)) {
> > + pr_err("INITRD: 0x%08llx+0x%08lx overlaps in-use memory 
> > region\n",
> > +(u64)start, size);
> >   goto disable;
> >   }
> >
> > - size = initrd_end - initrd_start;
> > - memblock_reserve(__pa_symbol(initrd_start), size);
> > + memblock_reserve(start, size);
> > + /* Now convert initrd to virtual addresses */
> > + initrd_start = (unsigned long)__va(phys_initrd_start);
> > + initrd_end = initrd_start + phys_initrd_size;
> >   initrd_below_start_ok = 1;
> >
> >   pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",
>
> I'm going to put this one on fixes, but I don't think that's the right:
> DEBUG_VIRTUAL just catches the bug, but as far as I can tell it's been there
> since the beginning.  I'm going to replace this with
>
> Fixes: 76d2a0493a17 ("RISC-V: Init and Halt Code")
>
> It's not going to apply back that far, but we can always backport it where it
> fails.
>

Yeah. That's that reason I didn't want to go that far.
I am afraid Greg may be not too happy with the stable tree compilation
failures (if there are any) :)

> Thanks!
>
> 

Re: [PATCH 1/4] RISC-V: Setup exception vector early

2020-07-24 Thread Atish Patra
On Fri, Jul 24, 2020 at 10:12 PM Palmer Dabbelt  wrote:
>
> On Wed, 15 Jul 2020 16:30:06 PDT (-0700), Atish Patra wrote:
> > The trap vector is set only in trap_init which may be too late in some
> > cases. Early ioremap/efi spits many warning messages which may be useful.
> >
> > Setup the trap vector early so that any warning/bug can be handled before
> > generic code invokes trap_init.
> >
> > Signed-off-by: Atish Patra 
> > ---
> >  arch/riscv/kernel/head.S| 10 --
> >  arch/riscv/kernel/smpboot.c |  1 -
> >  arch/riscv/kernel/traps.c   |  8 +---
> >  3 files changed, 9 insertions(+), 10 deletions(-)
> >
> > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> > index 7ed1b22950fd..d0c5c316e9bb 100644
> > --- a/arch/riscv/kernel/head.S
> > +++ b/arch/riscv/kernel/head.S
> > @@ -77,10 +77,16 @@ relocate:
> >   csrw CSR_SATP, a0
> >  .align 2
> >  1:
> > - /* Set trap vector to spin forever to help debug */
> > - la a0, .Lsecondary_park
> > + /* Set trap vector to exception handler */
> > + la a0, handle_exception
> >   csrw CSR_TVEC, a0
> >
> > + /*
> > +  * Set sup0 scratch register to 0, indicating to exception vector that
> > +  * we are presently executing in kernel.
> > +  */
> > + csrw CSR_SCRATCH, zero
> > +
> >   /* Reload the global pointer */
> >  .option push
> >  .option norelax
> > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> > index 4e9922790f6e..5a9c127a380e 100644
> > --- a/arch/riscv/kernel/smpboot.c
> > +++ b/arch/riscv/kernel/smpboot.c
> > @@ -154,7 +154,6 @@ asmlinkage __visible void smp_callin(void)
> >   mmgrab(mm);
> >   current->active_mm = mm;
> >
> > - trap_init();
> >   notify_cpu_starting(smp_processor_id());
> >   update_siblings_masks(smp_processor_id());
> >   set_cpu_online(smp_processor_id(), 1);
> > diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
> > index 7d95cce5e47c..ad14f4466d92 100644
> > --- a/arch/riscv/kernel/traps.c
> > +++ b/arch/riscv/kernel/traps.c
> > @@ -174,13 +174,7 @@ int is_valid_bugaddr(unsigned long pc)
> >  }
> >  #endif /* CONFIG_GENERIC_BUG */
> >
> > +/* stvec & scratch is already set from head.S */
> >  void trap_init(void)
> >  {
> > - /*
> > -  * Set sup0 scratch register to 0, indicating to exception vector
> > -  * that we are presently executing in the kernel
> > -  */
> > - csr_write(CSR_SCRATCH, 0);
> > - /* Set the exception vector address */
> > - csr_write(CSR_TVEC, _exception);
> >  }
>
> While I think these are all actual fixes, it's pretty late in the cycle here 
> so
> I'm going to a bit on the careful side and only take the patches that actually
> manifest as bugs in the current port.  Assuming this doesn't manifest until
> early_ioremap is enabled (and we don't do that yet), I've put it on for-next.
>

Yeah. early_ioremap is part of the UEFI series. So this can go into for-next.
Thanks.

> LMK if I'm wrong about this, or the following ones.
>
> Thanks!
>
> ___
> linux-riscv mailing list
> linux-ri...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv



-- 
Regards,
Atish


Re: [PATCH] lockdep: Introduce CONFIG_LOCKDEP_LARGE

2020-07-24 Thread Tetsuo Handa
On 2020/07/25 13:48, Dmitry Vyukov wrote:
>> diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c
>> index 29a8de4..85ba7eb 100644
>> --- a/kernel/locking/lockdep.c
>> +++ b/kernel/locking/lockdep.c
>> @@ -1349,7 +1349,11 @@ static int add_lock_to_list(struct lock_class *this,
>>  /*
>>   * For good efficiency of modular, we use power of 2
>>   */
>> +#ifdef CONFIG_LOCKDEP_LARGE
>> +#define MAX_CIRCULAR_QUEUE_SIZE8192UL
>> +#else
>>  #define MAX_CIRCULAR_QUEUE_SIZE4096UL
> 
> Maybe this number should be the config value? So that we don't ever
> return here to introduce "VERY_LARGE" :)

They can be "tiny, small, medium, compact, large and huge". Yeah, it's a joke. 
:-)

> Also somebody may use it to _reduce_ size of the table for a smaller kernel.

Maybe. But my feeling is that it is very rare that the kernel actually deadlocks
as soon as lockdep warned the possibility of deadlock.

Since syzbot runs many instances in parallel, a lot of CPU resource is spent for
checking the same dependency tree. However, the possibility of deadlock can be
warned for only locks held within each kernel boot, and it is impossible to hold
all locks with one kernel boot.

Then, it might be nice if lockdep can audit only "which lock was held from which
context and what backtrace" and export that log like KCOV data (instead of 
evaluating
the possibility of deadlock), and rebuild the whole dependency (and evaluate the
possibility of deadlock) across multiple kernel boots in userspace.

> 
>> +#endif
>>  #define CQ_MASK(MAX_CIRCULAR_QUEUE_SIZE-1)



Re: [PATCH] amdgpu_dm: fix nonblocking atomic commit use-after-free

2020-07-24 Thread Mazin Rezk
On Saturday, July 25, 2020 12:59 AM, Duncan <1i5t5.dun...@cox.net> wrote:

> On Sat, 25 Jul 2020 03:03:52 +
> Mazin Rezk mn...@protonmail.com wrote:
>
> > > Am 24.07.20 um 19:33 schrieb Kees Cook:
> > >
> > > > There was a fix to disable the async path for this driver that
> > > > worked around the bug too, yes? That seems like a safer and more
> > > > focused change that doesn't revert the SLUB defense for all
> > > > users, and would actually provide a complete, I think, workaround
> >
> > That said, I haven't seen the async disabling patch. If you could
> > link to it, I'd be glad to test it out and perhaps we can use that
> > instead.
>
> I'm confused. Not to put words in Kees' mouth; /I/ am confused (which
> admittedly could well be just because I make no claims to be a
> coder and am simply reading the bug and thread, but I'd appreciate some
> "unconfusing" anyway).
>
> My interpretation of the "async disabling" reference was that it was to
> comment #30 on the bug:
>
> https://bugzilla.kernel.org/show_bug.cgi?id=207383#c30
>
> ... which (if I'm not confused on this point too) appears to be yours.
> There it was stated...
>
> > > > >
>
> I've also found that this bug exclusively occurs when commit_work is on
> the workqueue. After forcing drm_atomic_helper_commit to run all of the
> commits without adding to the workqueue and running the OS, the issue
> seems to have disappeared.
> 
>
> Would not forcing all commits to run directly, without placing them on
> the workqueue, be "async disabling"? That's what I /thought/ he was
> referencing.

Oh, I thought he was referring to a different patch. Kees, could I get
your confirmation on this?

The change I made actually affected all of the DRM code, although this could
easily be changed to be specific to amdgpu. (By forcing blocking on
amdgpu_dm's non-blocking commit code)

That said, I'd still need to test further because I only did test it for a
couple of hours then. Although it should work in theory.

>
> OTOH your base/context swap idea sounds like a possibly "less
> disturbance" workaround, if it works, and given the point in the
> commit cycle... (But if it's out Sunday it's likely too late to test
> and get it in now anyway; if it's another week, tho...)

The base/context swap idea should make the use-after-free behave how it
did in 5.6. Since the bug doesn't cause an issue in 5.6, it's less of a
"less disturbance" workaround and more of a "no disturbance" workaround.

Thanks,
Mazin Rezk

>
> 
>
> Duncan - No HTML messages please; they are filtered as spam.
> "Every nonfree program has a lord, a master --
> and if you use the program, he is your master." Richard Stallman




Re: [PATCH v6 3/4] RISC-V: Remove CLINT related code from timer and arch

2020-07-24 Thread Atish Patra
On Fri, Jul 24, 2020 at 12:19 AM Anup Patel  wrote:
>
> Right now the RISC-V timer driver is convoluted to support:
> 1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for
>clocksource and SBI timer calls for clockevent device.
> 2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO
>counter register for clocksource and CLINT MMIO compare register
>for clockevent device.
>
> We now have a separate CLINT timer driver which also provide CLINT
> based IPI operations so let's remove CLINT MMIO related code from
> arch/riscv directory and RISC-V timer driver.
>
> Signed-off-by: Anup Patel 
> Tested-by: Emil Renner Berhing 
> Acked-by: Daniel Lezcano 
> ---
>  arch/riscv/Kconfig  |  2 +-
>  arch/riscv/Kconfig.socs |  2 +
>  arch/riscv/configs/nommu_virt_defconfig |  7 +--
>  arch/riscv/include/asm/clint.h  | 14 --
>  arch/riscv/include/asm/timex.h  | 28 +++
>  arch/riscv/kernel/Makefile  |  2 +-
>  arch/riscv/kernel/clint.c   | 63 -
>  arch/riscv/kernel/setup.c   |  2 -
>  arch/riscv/kernel/smp.c |  1 -
>  arch/riscv/kernel/smpboot.c |  1 -
>  drivers/clocksource/Kconfig |  3 +-
>  drivers/clocksource/timer-riscv.c   | 17 +--
>  12 files changed, 16 insertions(+), 126 deletions(-)
>  delete mode 100644 arch/riscv/include/asm/clint.h
>  delete mode 100644 arch/riscv/kernel/clint.c
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index fedb4a72b29a..57a72ae23d10 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -74,7 +74,7 @@ config RISCV
> select PCI_DOMAINS_GENERIC if PCI
> select PCI_MSI if PCI
> select RISCV_INTC
> -   select RISCV_TIMER
> +   select RISCV_TIMER if RISCV_SBI
> select SPARSEMEM_STATIC if 32BIT
> select SPARSE_IRQ
> select SYSCTL_EXCEPTION_TRACE
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 6c88148f1b9b..8a55f6156661 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -12,6 +12,7 @@ config SOC_SIFIVE
>
>  config SOC_VIRT
> bool "QEMU Virt Machine"
> +   select CLINT_TIMER if RISCV_M_MODE
> select POWER_RESET
> select POWER_RESET_SYSCON
> select POWER_RESET_SYSCON_POWEROFF
> @@ -24,6 +25,7 @@ config SOC_VIRT
>  config SOC_KENDRYTE
> bool "Kendryte K210 SoC"
> depends on !MMU
> +   select CLINT_TIMER if RISCV_M_MODE
> select SERIAL_SIFIVE if TTY
> select SERIAL_SIFIVE_CONSOLE if TTY
> select SIFIVE_PLIC
> diff --git a/arch/riscv/configs/nommu_virt_defconfig 
> b/arch/riscv/configs/nommu_virt_defconfig
> index cf74e179bf90..cf9388184aa3 100644
> --- a/arch/riscv/configs/nommu_virt_defconfig
> +++ b/arch/riscv/configs/nommu_virt_defconfig
> @@ -26,6 +26,7 @@ CONFIG_EXPERT=y
>  CONFIG_SLOB=y
>  # CONFIG_SLAB_MERGE_DEFAULT is not set
>  # CONFIG_MMU is not set
> +CONFIG_SOC_VIRT=y
>  CONFIG_MAXPHYSMEM_2GB=y
>  CONFIG_SMP=y
>  CONFIG_CMDLINE="root=/dev/vda rw earlycon=uart8250,mmio,0x1000,115200n8 
> console=ttyS0"
> @@ -48,7 +49,6 @@ CONFIG_VIRTIO_BLK=y
>  # CONFIG_SERIO is not set
>  # CONFIG_LEGACY_PTYS is not set
>  # CONFIG_LDISC_AUTOLOAD is not set
> -# CONFIG_DEVMEM is not set
>  CONFIG_SERIAL_8250=y
>  # CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
>  CONFIG_SERIAL_8250_CONSOLE=y
> @@ -56,16 +56,13 @@ CONFIG_SERIAL_8250_NR_UARTS=1
>  CONFIG_SERIAL_8250_RUNTIME_UARTS=1
>  CONFIG_SERIAL_OF_PLATFORM=y
>  # CONFIG_HW_RANDOM is not set
> +# CONFIG_DEVMEM is not set
>  # CONFIG_HWMON is not set
> -# CONFIG_LCD_CLASS_DEVICE is not set
> -# CONFIG_BACKLIGHT_CLASS_DEVICE is not set

Why these changes are in the diff ?

>  # CONFIG_VGA_CONSOLE is not set
>  # CONFIG_HID is not set
>  # CONFIG_USB_SUPPORT is not set
>  CONFIG_VIRTIO_MMIO=y
>  CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
> -CONFIG_SIFIVE_PLIC=y
> -# CONFIG_VALIDATE_FS_PARSER is not set
>  CONFIG_EXT2_FS=y
>  # CONFIG_DNOTIFY is not set
>  # CONFIG_INOTIFY_USER is not set
> diff --git a/arch/riscv/include/asm/clint.h b/arch/riscv/include/asm/clint.h
> deleted file mode 100644
> index adaba98a7d6c..
> --- a/arch/riscv/include/asm/clint.h
> +++ /dev/null
> @@ -1,14 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0 */
> -#ifndef _ASM_RISCV_CLINT_H
> -#define _ASM_RISCV_CLINT_H 1
> -
> -#include 
> -#include 
> -
> -#ifdef CONFIG_RISCV_M_MODE
> -void clint_init_boot_cpu(void);
> -#else /* CONFIG_RISCV_M_MODE */
> -#define clint_init_boot_cpu()  do { } while (0)
> -#endif /* CONFIG_RISCV_M_MODE */
> -
> -#endif /* _ASM_RISCV_CLINT_H */
> diff --git a/arch/riscv/include/asm/timex.h b/arch/riscv/include/asm/timex.h
> index bad2a7c2cda5..a3fb85d505d4 100644
> --- a/arch/riscv/include/asm/timex.h
> +++ b/arch/riscv/include/asm/timex.h
> @@ -7,41 +7,27 @@
>  #define _ASM_RISCV_TIMEX_H
>
>  #include 
> -#include 
>
>  typedef 

Re: [PATCH v3 00/19] Introduce partial kernel_read_file() support

2020-07-24 Thread Scott Branden

On 2020-07-24 2:36 p.m., Kees Cook wrote:

v3:
- add reviews/acks
- add "IMA: Add support for file reads without contents" patch
- trim CC list, in case that's why vger ignored v2
v2: [missing from lkml archives! (CC list too long?) repeating changes here]
- fix issues in firmware test suite
- add firmware partial read patches
- various bug fixes/cleanups
v1: https://lore.kernel.org/lkml/20200717174309.1164575-1-keesc...@chromium.org/

Hi,

Here's my tree for adding partial read support in kernel_read_file(),
which fixes a number of issues along the way. It's got Scott's firmware
and IMA patches ported and everything tests cleanly for me (even with
CONFIG_IMA_APPRAISE=y).

I think the intention is for this to go via Greg's tree since Scott's
driver code will depend on it?

v3 of this patch series looks good and passes all of my tests.
Remaining patches
Acked-by: Scott Branden 

I have added latest bcm-vk driver code to Kees' patch series and added 
it here:

https://github.com/sbranden/linux/tree/kernel_read_file_for_kees_v3

If everyone finds Kees' patch series acceptable then the 3 patches 
adding the bcm-vk driver
need to be added to the series.  I can send the 3 patches out separately 
and then
the two patch series can be combined in Greg or someone's tree if that 
works?
Or if an in-kernel user beyond kernel selftest is needed for 
request_partial_firmware_into_buf
in Kees' patch series then another PATCH v4 needs to be sent out 
including the bcm-vk driver.


Thanks,

-Kees


Kees Cook (15):


Thanks for help Kees, it's works now.

   test_firmware: Test platform fw loading on non-EFI systems
   selftest/firmware: Add selftest timeout in settings
   firmware_loader: EFI firmware loader must handle pre-allocated buffer
   fs/kernel_read_file: Remove FIRMWARE_PREALLOC_BUFFER enum
   fs/kernel_read_file: Remove FIRMWARE_EFI_EMBEDDED enum
   fs/kernel_read_file: Split into separate source file
   fs/kernel_read_file: Remove redundant size argument
   fs/kernel_read_file: Switch buffer size arg to size_t
   fs/kernel_read_file: Add file_size output argument
   LSM: Introduce kernel_post_load_data() hook
   firmware_loader: Use security_post_load_data()
   module: Call security_kernel_post_load_data()
   LSM: Add "contents" flag to kernel_read_file hook
   fs/kernel_file_read: Add "offset" arg for partial reads
   firmware: Store opt_flags in fw_priv

Scott Branden (4):
   fs/kernel_read_file: Split into separate include file
   IMA: Add support for file reads without contents
   firmware: Add request_partial_firmware_into_buf()
   test_firmware: Test partial read support

  drivers/base/firmware_loader/fallback.c   |  19 +-
  drivers/base/firmware_loader/fallback.h   |   5 +-
  .../base/firmware_loader/fallback_platform.c  |  16 +-
  drivers/base/firmware_loader/firmware.h   |   7 +-
  drivers/base/firmware_loader/main.c   | 143 ++---
  drivers/firmware/efi/embedded-firmware.c  |  21 +-
  drivers/firmware/efi/embedded-firmware.h  |  19 ++
  fs/Makefile   |   3 +-
  fs/exec.c | 132 +---
  fs/kernel_read_file.c | 189 ++
  include/linux/efi_embedded_fw.h   |  13 --
  include/linux/firmware.h  |  12 ++
  include/linux/fs.h|  39 
  include/linux/ima.h   |  19 +-
  include/linux/kernel_read_file.h  |  55 +
  include/linux/lsm_hook_defs.h |   6 +-
  include/linux/lsm_hooks.h |  12 ++
  include/linux/security.h  |  19 +-
  kernel/kexec.c|   2 +-
  kernel/kexec_file.c   |  19 +-
  kernel/module.c   |  24 ++-
  lib/test_firmware.c   | 159 +--
  security/integrity/digsig.c   |   8 +-
  security/integrity/ima/ima_fs.c   |  10 +-
  security/integrity/ima/ima_main.c |  70 +--
  security/integrity/ima/ima_policy.c   |   1 +
  security/loadpin/loadpin.c|  17 +-
  security/security.c   |  26 ++-
  security/selinux/hooks.c  |   8 +-
  .../selftests/firmware/fw_filesystem.sh   |  91 +
  tools/testing/selftests/firmware/settings |   8 +
  tools/testing/selftests/kselftest/runner.sh   |   6 +-
  32 files changed, 860 insertions(+), 318 deletions(-)
  create mode 100644 drivers/firmware/efi/embedded-firmware.h
  create mode 100644 fs/kernel_read_file.c
  create mode 100644 include/linux/kernel_read_file.h
  create mode 100644 tools/testing/selftests/firmware/settings





[PATCH 0/3] Add RTC related clocks for Ingenic SoCs.

2020-07-24 Thread Zhou Yanjie
1.Add RTC related clocks bindings for the JZ4780 SoC,
  the X1000 SoC, and the X1830 SoC.
2.Add "_CLK_EXCLK_DIV512" and "_CLK_RTC" for
  the JZ4780 SoC, the X1000 SoC, and the X1830 SoC.

周琰杰 (Zhou Yanjie) (3):
  dt-bindings: clock: Add RTC related clocks for Ingenic SoCs.
  dt-bindings: clock: Add tabs to align code.
  clk: Ingenic: Add RTC related clocks for Ingenic SoCs.

 drivers/clk/ingenic/jz4780-cgu.c   |  12 +++
 drivers/clk/ingenic/x1000-cgu.c|  13 +++
 drivers/clk/ingenic/x1830-cgu.c|  13 +++
 include/dt-bindings/clock/jz4780-cgu.h | 144 +
 include/dt-bindings/clock/x1000-cgu.h  |   2 +
 include/dt-bindings/clock/x1830-cgu.h  |   2 +
 6 files changed, 115 insertions(+), 71 deletions(-)

-- 
2.11.0



[PATCH 1/3] dt-bindings: clock: Add RTC related clocks for Ingenic SoCs.

2020-07-24 Thread Zhou Yanjie
Add RTC related clocks bindings for the JZ4780 SoC, the X1000 SoC,
and the X1830 SoC from Ingenic.

Tested-by: 周正 (Zhou Zheng) 
Signed-off-by: 周琰杰 (Zhou Yanjie) 
---
 include/dt-bindings/clock/jz4780-cgu.h | 2 ++
 include/dt-bindings/clock/x1000-cgu.h  | 2 ++
 include/dt-bindings/clock/x1830-cgu.h  | 2 ++
 3 files changed, 6 insertions(+)

diff --git a/include/dt-bindings/clock/jz4780-cgu.h 
b/include/dt-bindings/clock/jz4780-cgu.h
index 1859ce53ee38..cb07a0978301 100644
--- a/include/dt-bindings/clock/jz4780-cgu.h
+++ b/include/dt-bindings/clock/jz4780-cgu.h
@@ -85,5 +85,7 @@
 #define JZ4780_CLK_DES 70
 #define JZ4780_CLK_X2D 71
 #define JZ4780_CLK_CORE1   72
+#define JZ4780_CLK_EXCLK_DIV51273
+#define JZ4780_CLK_RTC 74
 
 #endif /* __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ */
diff --git a/include/dt-bindings/clock/x1000-cgu.h 
b/include/dt-bindings/clock/x1000-cgu.h
index 0367c8c02e16..f187e0719fd3 100644
--- a/include/dt-bindings/clock/x1000-cgu.h
+++ b/include/dt-bindings/clock/x1000-cgu.h
@@ -48,5 +48,7 @@
 #define X1000_CLK_SSI  33
 #define X1000_CLK_OST  34
 #define X1000_CLK_PDMA 35
+#define X1000_CLK_EXCLK_DIV512 36
+#define X1000_CLK_RTC  37
 
 #endif /* __DT_BINDINGS_CLOCK_X1000_CGU_H__ */
diff --git a/include/dt-bindings/clock/x1830-cgu.h 
b/include/dt-bindings/clock/x1830-cgu.h
index 801e1d09c881..88455376a950 100644
--- a/include/dt-bindings/clock/x1830-cgu.h
+++ b/include/dt-bindings/clock/x1830-cgu.h
@@ -51,5 +51,7 @@
 #define X1830_CLK_TCU  36
 #define X1830_CLK_DTRNG37
 #define X1830_CLK_OST  38
+#define X1830_CLK_EXCLK_DIV512 39
+#define X1830_CLK_RTC  40
 
 #endif /* __DT_BINDINGS_CLOCK_X1830_CGU_H__ */
-- 
2.11.0



Re: [PATCH 4/4] riscv: Parse all memory blocks to remove unusable memory

2020-07-24 Thread Palmer Dabbelt

On Wed, 15 Jul 2020 16:30:09 PDT (-0700), Atish Patra wrote:

Currently, maximum physical memory allowed is equal to -PAGE_OFFSET.
That's why we remove any memory blocks spanning beyond that size. However,
it is done only for memblock containing linux kernel which will not work
if there are multiple memblocks.

Process all memory blocks to figure out how much memory needs to be removed
and remove at the end instead of updating the memblock list in place.

Signed-off-by: Atish Patra 
---
 arch/riscv/mm/init.c | 31 +--
 1 file changed, 17 insertions(+), 14 deletions(-)

diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index f818a47a72d1..79e9d55bdf1a 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -147,26 +147,29 @@ void __init setup_bootmem(void)
 {
struct memblock_region *reg;
phys_addr_t mem_size = 0;
+   phys_addr_t total_mem = 0;
+   phys_addr_t mem_start, end = 0;
phys_addr_t vmlinux_end = __pa_symbol(&_end);
phys_addr_t vmlinux_start = __pa_symbol(&_start);

/* Find the memory region containing the kernel */
for_each_memblock(memory, reg) {
-   phys_addr_t end = reg->base + reg->size;
-
-   if (reg->base <= vmlinux_start && vmlinux_end <= end) {
-   mem_size = min(reg->size, (phys_addr_t)-PAGE_OFFSET);
-
-   /*
-* Remove memblock from the end of usable area to the
-* end of region
-*/
-   if (reg->base + mem_size < end)
-   memblock_remove(reg->base + mem_size,
-   end - reg->base - mem_size);
-   }
+   end = reg->base + reg->size;
+   if (!total_mem)
+   mem_start = reg->base;
+   if (reg->base <= vmlinux_start && vmlinux_end <= end)
+   BUG_ON(reg->size == 0);
+   total_mem = total_mem + reg->size;
}
-   BUG_ON(mem_size == 0);
+
+   /*
+* Remove memblock from the end of usable area to the
+* end of region
+*/
+   mem_size = min(total_mem, (phys_addr_t)-PAGE_OFFSET);
+   if (mem_start + mem_size < end)
+   memblock_remove(mem_start + mem_size,
+   end - mem_start - mem_size);

/* Reserve from the start of the kernel to the end of the kernel */
memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);


Thanks, this one is also on fixes.


Re: [PATCH 3/4] RISC-V: Do not rely on initrd_start/end computed during early dt parsing

2020-07-24 Thread Palmer Dabbelt

On Wed, 15 Jul 2020 16:30:08 PDT (-0700), Atish Patra wrote:

Currently, initrd_start/end are computed during early_init_dt_scan
but used during arch_setup. We will get the following panic if initrd is used
and CONFIG_DEBUG_VIRTUAL is turned on.

[0.00] [ cut here ]
[0.00] kernel BUG at arch/riscv/mm/physaddr.c:33!
[0.00] Kernel BUG [#1]
[0.00] Modules linked in:
[0.00] CPU: 0 PID: 0 Comm: swapper Not tainted 
5.8.0-rc4-00015-ged0b226fed02 #886
[0.00] epc: ffe0002058d2 ra : ffe053f0 sp : ffe001001f40
[0.00]  gp : ffe00106e250 tp : ffe001009d40 t0 : 
ffe00107ee28
[0.00]  t1 :  t2 : ffe000a2e880 s0 : 
ffe001001f50
[0.00]  s1 : ffe0001383e8 a0 : ffe00c087e00 a1 : 
8020
[0.00]  a2 : 010bf000 a3 : ffe00106f3c8 a4 : 
ffe0010bf000
[0.00]  a5 : ffe0 a6 : 0006 a7 : 
0001
[0.00]  s2 : ffe00106f068 s3 : ffe00106f070 s4 : 
8020
[0.00]  s5 : 8220 s6 :  s7 : 

[0.00]  s8 : 80011010 s9 : 80012700 s10: 

[0.00]  s11:  t3 : 0001fe30 t4 : 
0001fe30
[0.00]  t5 :  t6 : ffe00107c471
[0.00] status: 0100 badaddr:  cause: 
0003
[0.00] random: get_random_bytes called from 
print_oops_end_marker+0x22/0x46 with crng_init=0

To avoid the error, initrd_start/end can be computed from phys_initrd_start/size
in setup itself. It also improves the initrd placement by aligning the start
and size with the page size.

Fixes: 6435f773d81f (riscv: mm: add support for CONFIG_DEBUG_VIRTUAL)
Signed-off-by: Atish Patra 
---
 arch/riscv/mm/init.c | 33 +++--
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 8d22973bde40..f818a47a72d1 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -95,19 +95,40 @@ void __init mem_init(void)
 #ifdef CONFIG_BLK_DEV_INITRD
 static void __init setup_initrd(void)
 {
+   phys_addr_t start;
unsigned long size;

-   if (initrd_start >= initrd_end) {
-   pr_info("initrd not found or empty");
+   /* Ignore the virtul address computed during device tree parsing */
+   initrd_start = initrd_end = 0;
+
+   if (!phys_initrd_size)
+   return;
+   /*
+* Round the memory region to page boundaries as per free_initrd_mem()
+* This allows us to detect whether the pages overlapping the initrd
+* are in use, but more importantly, reserves the entire set of pages
+* as we don't want these pages allocated for other purposes.
+*/
+   start = round_down(phys_initrd_start, PAGE_SIZE);
+   size = phys_initrd_size + (phys_initrd_start - start);
+   size = round_up(size, PAGE_SIZE);
+
+   if (!memblock_is_region_memory(start, size)) {
+   pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region",
+  (u64)start, size);
goto disable;
}
-   if (__pa_symbol(initrd_end) > PFN_PHYS(max_low_pfn)) {
-   pr_err("initrd extends beyond end of memory");
+
+   if (memblock_is_region_reserved(start, size)) {
+   pr_err("INITRD: 0x%08llx+0x%08lx overlaps in-use memory 
region\n",
+  (u64)start, size);
goto disable;
}

-   size = initrd_end - initrd_start;
-   memblock_reserve(__pa_symbol(initrd_start), size);
+   memblock_reserve(start, size);
+   /* Now convert initrd to virtual addresses */
+   initrd_start = (unsigned long)__va(phys_initrd_start);
+   initrd_end = initrd_start + phys_initrd_size;
initrd_below_start_ok = 1;

pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",


I'm going to put this one on fixes, but I don't think that's the right:
DEBUG_VIRTUAL just catches the bug, but as far as I can tell it's been there
since the beginning.  I'm going to replace this with

Fixes: 76d2a0493a17 ("RISC-V: Init and Halt Code")

It's not going to apply back that far, but we can always backport it where it
fails.

Thanks!


[PATCH 3/3] clk: Ingenic: Add RTC related clocks for Ingenic SoCs.

2020-07-24 Thread Zhou Yanjie
The RTC unit in the Ingenic SoCs has two clock sources, one
is from an external 32.768kHz clock, and the other is from an
external 24MHz/48MHz main clock that is divided by 512. The
choice of these two clocks is controlled by the ERCS bit in
the OPCR register. The RNG unit will also use this clock.

Tested-by: 周正 (Zhou Zheng) 
Signed-off-by: 周琰杰 (Zhou Yanjie) 
---
 drivers/clk/ingenic/jz4780-cgu.c | 12 
 drivers/clk/ingenic/x1000-cgu.c  | 13 +
 drivers/clk/ingenic/x1830-cgu.c  | 13 +
 3 files changed, 38 insertions(+)

diff --git a/drivers/clk/ingenic/jz4780-cgu.c b/drivers/clk/ingenic/jz4780-cgu.c
index 6c5b8029cc8a..288e9694285b 100644
--- a/drivers/clk/ingenic/jz4780-cgu.c
+++ b/drivers/clk/ingenic/jz4780-cgu.c
@@ -516,6 +516,18 @@ static const struct ingenic_cgu_clk_info 
jz4780_cgu_clocks[] = {
.gate = { CGU_REG_CLKGR0, 1 },
},
 
+   [JZ4780_CLK_EXCLK_DIV512] = {
+   "exclk_div512", CGU_CLK_FIXDIV,
+   .parents = { JZ4780_CLK_EXCLK },
+   .fixdiv = { 512 },
+   },
+
+   [JZ4780_CLK_RTC] = {
+   "rtc_ercs", CGU_CLK_MUX | CGU_CLK_GATE,
+   .parents = { JZ4780_CLK_EXCLK_DIV512, JZ4780_CLK_RTCLK },
+   .mux = { CGU_REG_OPCR, 2, 1},
+   },
+
/* Gate-only clocks */
 
[JZ4780_CLK_NEMC] = {
diff --git a/drivers/clk/ingenic/x1000-cgu.c b/drivers/clk/ingenic/x1000-cgu.c
index 453f3323cb99..3cc37466ce6b 100644
--- a/drivers/clk/ingenic/x1000-cgu.c
+++ b/drivers/clk/ingenic/x1000-cgu.c
@@ -278,6 +278,19 @@ static const struct ingenic_cgu_clk_info 
x1000_cgu_clocks[] = {
.mux = { CGU_REG_SSICDR, 30, 1 },
},
 
+   [X1000_CLK_EXCLK_DIV512] = {
+   "exclk_div512", CGU_CLK_FIXDIV,
+   .parents = { X1000_CLK_EXCLK },
+   .fixdiv = { 512 },
+   },
+
+   [X1000_CLK_RTC] = {
+   "rtc_ercs", CGU_CLK_MUX | CGU_CLK_GATE,
+   .parents = { X1000_CLK_EXCLK_DIV512, X1000_CLK_RTCLK },
+   .mux = { CGU_REG_OPCR, 2, 1},
+   .gate = { CGU_REG_CLKGR, 27 },
+   },
+
/* Gate-only clocks */
 
[X1000_CLK_EMC] = {
diff --git a/drivers/clk/ingenic/x1830-cgu.c b/drivers/clk/ingenic/x1830-cgu.c
index a1b2ff0ee487..950aee243364 100644
--- a/drivers/clk/ingenic/x1830-cgu.c
+++ b/drivers/clk/ingenic/x1830-cgu.c
@@ -329,6 +329,19 @@ static const struct ingenic_cgu_clk_info 
x1830_cgu_clocks[] = {
.mux = { CGU_REG_SSICDR, 29, 1 },
},
 
+   [X1830_CLK_EXCLK_DIV512] = {
+   "exclk_div512", CGU_CLK_FIXDIV,
+   .parents = { X1830_CLK_EXCLK },
+   .fixdiv = { 512 },
+   },
+
+   [X1830_CLK_RTC] = {
+   "rtc_ercs", CGU_CLK_MUX | CGU_CLK_GATE,
+   .parents = { X1830_CLK_EXCLK_DIV512, X1830_CLK_RTCLK },
+   .mux = { CGU_REG_OPCR, 2, 1},
+   .gate = { CGU_REG_CLKGR0, 29 },
+   },
+
/* Gate-only clocks */
 
[X1830_CLK_EMC] = {
-- 
2.11.0



[PATCH 2/3] dt-bindings: clock: Add tabs to align code.

2020-07-24 Thread Zhou Yanjie
The "JZ4780_CLK_LCD0PIXCLK" and the "JZ4780_CLK_LCD1PIXCLK"
in the "jz4780.h" and the new added "JZ4780_CLK_EXCLK_DIV512"
in the previous patch is too long, add tabs to other lines
to align them.

Tested-by: 周正 (Zhou Zheng) 
Signed-off-by: 周琰杰 (Zhou Yanjie) 
---
 include/dt-bindings/clock/jz4780-cgu.h | 144 -
 1 file changed, 72 insertions(+), 72 deletions(-)

diff --git a/include/dt-bindings/clock/jz4780-cgu.h 
b/include/dt-bindings/clock/jz4780-cgu.h
index cb07a0978301..85cf8eb5081b 100644
--- a/include/dt-bindings/clock/jz4780-cgu.h
+++ b/include/dt-bindings/clock/jz4780-cgu.h
@@ -12,80 +12,80 @@
 #ifndef __DT_BINDINGS_CLOCK_JZ4780_CGU_H__
 #define __DT_BINDINGS_CLOCK_JZ4780_CGU_H__
 
-#define JZ4780_CLK_EXCLK   0
-#define JZ4780_CLK_RTCLK   1
-#define JZ4780_CLK_APLL2
-#define JZ4780_CLK_MPLL3
-#define JZ4780_CLK_EPLL4
-#define JZ4780_CLK_VPLL5
-#define JZ4780_CLK_OTGPHY  6
-#define JZ4780_CLK_SCLKA   7
-#define JZ4780_CLK_CPUMUX  8
-#define JZ4780_CLK_CPU 9
-#define JZ4780_CLK_L2CACHE 10
-#define JZ4780_CLK_AHB011
-#define JZ4780_CLK_AHB2PMUX12
-#define JZ4780_CLK_AHB213
-#define JZ4780_CLK_PCLK14
-#define JZ4780_CLK_DDR 15
-#define JZ4780_CLK_VPU 16
-#define JZ4780_CLK_I2SPLL  17
-#define JZ4780_CLK_I2S 18
+#define JZ4780_CLK_EXCLK   0
+#define JZ4780_CLK_RTCLK   1
+#define JZ4780_CLK_APLL2
+#define JZ4780_CLK_MPLL3
+#define JZ4780_CLK_EPLL4
+#define JZ4780_CLK_VPLL5
+#define JZ4780_CLK_OTGPHY  6
+#define JZ4780_CLK_SCLKA   7
+#define JZ4780_CLK_CPUMUX  8
+#define JZ4780_CLK_CPU 9
+#define JZ4780_CLK_L2CACHE 10
+#define JZ4780_CLK_AHB011
+#define JZ4780_CLK_AHB2PMUX12
+#define JZ4780_CLK_AHB213
+#define JZ4780_CLK_PCLK14
+#define JZ4780_CLK_DDR 15
+#define JZ4780_CLK_VPU 16
+#define JZ4780_CLK_I2SPLL  17
+#define JZ4780_CLK_I2S 18
 #define JZ4780_CLK_LCD0PIXCLK  19
 #define JZ4780_CLK_LCD1PIXCLK  20
-#define JZ4780_CLK_MSCMUX  21
-#define JZ4780_CLK_MSC022
-#define JZ4780_CLK_MSC123
-#define JZ4780_CLK_MSC224
-#define JZ4780_CLK_UHC 25
-#define JZ4780_CLK_SSIPLL  26
-#define JZ4780_CLK_SSI 27
-#define JZ4780_CLK_CIMMCLK 28
-#define JZ4780_CLK_PCMPLL  29
-#define JZ4780_CLK_PCM 30
-#define JZ4780_CLK_GPU 31
-#define JZ4780_CLK_HDMI32
-#define JZ4780_CLK_BCH 33
-#define JZ4780_CLK_NEMC34
-#define JZ4780_CLK_OTG035
-#define JZ4780_CLK_SSI036
-#define JZ4780_CLK_SMB037
-#define JZ4780_CLK_SMB138
-#define JZ4780_CLK_SCC 39
-#define JZ4780_CLK_AIC 40
-#define JZ4780_CLK_TSSI0   41
-#define JZ4780_CLK_OWI 42
-#define JZ4780_CLK_KBC 43
-#define JZ4780_CLK_SADC44
-#define JZ4780_CLK_UART0   45
-#define JZ4780_CLK_UART1   46
-#define JZ4780_CLK_UART2   47
-#define JZ4780_CLK_UART3   48
-#define JZ4780_CLK_SSI149
-#define JZ4780_CLK_SSI250
-#define JZ4780_CLK_PDMA51
-#define JZ4780_CLK_GPS 52
-#define JZ4780_CLK_MAC 53
-#define JZ4780_CLK_SMB254
-#define JZ4780_CLK_CIM 55
-#define JZ4780_CLK_LCD 56
-#define JZ4780_CLK_TVE 57
-#define JZ4780_CLK_IPU 58
-#define JZ4780_CLK_DDR059
-#define JZ4780_CLK_DDR160
-#define JZ4780_CLK_SMB361
-#define JZ4780_CLK_TSSI1   62
-#define JZ4780_CLK_COMPRESS63
-#define JZ4780_CLK_AIC164
-#define JZ4780_CLK_GPVLC   65
-#define JZ4780_CLK_OTG166
-#define JZ4780_CLK_UART4   67
-#define JZ4780_CLK_AHBMON  68
-#define JZ4780_CLK_SMB469
-#define JZ4780_CLK_DES 70
-#define JZ4780_CLK_X2D 71
-#define JZ4780_CLK_CORE1   72
+#define JZ4780_CLK_MSCMUX  21
+#define JZ4780_CLK_MSC022
+#define JZ4780_CLK_MSC123
+#define JZ4780_CLK_MSC224
+#define JZ4780_CLK_UHC 25
+#define JZ4780_CLK_SSIPLL  26
+#define JZ4780_CLK_SSI 27
+#define JZ4780_CLK_CIMMCLK 28
+#define JZ4780_CLK_PCMPLL  29
+#define JZ4780_CLK_PCM 30
+#define JZ4780_CLK_GPU 31
+#define JZ4780_CLK_HDMI32
+#define JZ4780_CLK_BCH 33
+#define JZ4780_CLK_NEMC34

Re: [PATCH 1/4] RISC-V: Setup exception vector early

2020-07-24 Thread Palmer Dabbelt

On Wed, 15 Jul 2020 16:30:06 PDT (-0700), Atish Patra wrote:

The trap vector is set only in trap_init which may be too late in some
cases. Early ioremap/efi spits many warning messages which may be useful.

Setup the trap vector early so that any warning/bug can be handled before
generic code invokes trap_init.

Signed-off-by: Atish Patra 
---
 arch/riscv/kernel/head.S| 10 --
 arch/riscv/kernel/smpboot.c |  1 -
 arch/riscv/kernel/traps.c   |  8 +---
 3 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 7ed1b22950fd..d0c5c316e9bb 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -77,10 +77,16 @@ relocate:
csrw CSR_SATP, a0
 .align 2
 1:
-   /* Set trap vector to spin forever to help debug */
-   la a0, .Lsecondary_park
+   /* Set trap vector to exception handler */
+   la a0, handle_exception
csrw CSR_TVEC, a0

+   /*
+* Set sup0 scratch register to 0, indicating to exception vector that
+* we are presently executing in kernel.
+*/
+   csrw CSR_SCRATCH, zero
+
/* Reload the global pointer */
 .option push
 .option norelax
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 4e9922790f6e..5a9c127a380e 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -154,7 +154,6 @@ asmlinkage __visible void smp_callin(void)
mmgrab(mm);
current->active_mm = mm;

-   trap_init();
notify_cpu_starting(smp_processor_id());
update_siblings_masks(smp_processor_id());
set_cpu_online(smp_processor_id(), 1);
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index 7d95cce5e47c..ad14f4466d92 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@ -174,13 +174,7 @@ int is_valid_bugaddr(unsigned long pc)
 }
 #endif /* CONFIG_GENERIC_BUG */

+/* stvec & scratch is already set from head.S */
 void trap_init(void)
 {
-   /*
-* Set sup0 scratch register to 0, indicating to exception vector
-* that we are presently executing in the kernel
-*/
-   csr_write(CSR_SCRATCH, 0);
-   /* Set the exception vector address */
-   csr_write(CSR_TVEC, _exception);
 }


While I think these are all actual fixes, it's pretty late in the cycle here so
I'm going to a bit on the careful side and only take the patches that actually
manifest as bugs in the current port.  Assuming this doesn't manifest until
early_ioremap is enabled (and we don't do that yet), I've put it on for-next.

LMK if I'm wrong about this, or the following ones.

Thanks!


Re: [PATCH 2/4] RISC-V: Set maximum number of mapped pages correctly

2020-07-24 Thread Palmer Dabbelt

On Wed, 15 Jul 2020 16:30:07 PDT (-0700), Atish Patra wrote:

Currently, maximum number of mapper pages are set to the pfn calculated
from the memblock size of the memblock containing kernel. This will work
until that memblock spans the entire memory. However, it will be set to
a wrong value if there are multiple memblocks defined in kernel
(e.g. with efi runtime services).

Set the the maximum value to the pfn calculated from dram size.

Signed-off-by: Atish Patra 
---
 arch/riscv/mm/init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index f4adb3684f3d..8d22973bde40 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -150,9 +150,9 @@ void __init setup_bootmem(void)
/* Reserve from the start of the kernel to the end of the kernel */
memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);

-   set_max_mapnr(PFN_DOWN(mem_size));
max_pfn = PFN_DOWN(memblock_end_of_DRAM());
max_low_pfn = max_pfn;
+   set_max_mapnr(max_low_pfn);

 #ifdef CONFIG_BLK_DEV_INITRD
setup_initrd();


This one I'm putting on fixes, as there's nothing preventing us from having
multiple memory regions in a current boot and this seems very safe.


[GIT] Networking

2020-07-24 Thread David Miller


1) Fix RCU locaking in iwlwifi, from Johannes Berg.

2) mt76 can access uninitialized NAPI struct, from Felix Fietkau.

3) Fix race in updating pause settings in bnxt_en, from Vasundhara Volam.

4) Propagate error return properly during unbind failures in ax88172a,
   from George Kennedy.

5) Fix memleak in adf7242_probe, from Liu Jian.

6) smc_drv_probe() can leak, from Wang Hai.

7) Don't muck with the carrier state if register_netdevice() fails in
   the bonding driver, from Taehee Yoo.

8) Fix memleak in dpaa_eth_probe, from Liu Jian.

9) Need to check skb_put_padto() return value in hsr_fill_tag(), from
   Murali Karicheri.

10) Don't lose ionic RSS hash settings across FW update, from Shannon
Nelson.

11) Fix clobbered SKB control block in act_ct, from Wen Xu.

12) Missing newlink in "tx_timeout" sysfs output, from Xiongfeng Wang.

13) IS_UDPLITE cleanup a long time ago, incorrectly handled transformations
involving UDPLITE_RECV_CC.  From Miaohe Lin.

14) Unbalanced locking in netdevsim, from Taehee Yoo.

15) Suppress false-positive error messages in qed driver, from
Alexander Lobakin.

16) Out of bounds read in ax25_connect and ax25_sendmsg, from Peilin Ye.

17) Missing SKB release in cxgb4's uld_send(), from Navid Emamdoost.

18) Uninitialized value in geneve_changelink(), from Cong Wang.

19) Fix deadlock in xen-netfront, from Andera Righi.

19) flush_backlog() frees skbs with IRQs disabled, so should use
dev_kfree_skb_irq() instead of kfree_skb().  From Subash Abhinov
Kasiviswanathan.

Please pull, thanks a lot!

The following changes since commit 1df0d8960499e58963fd6c8ac75e544f2b417b29:

  Merge tag 'libnvdimm-fix-v5.8-rc5' of 
git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm (2020-07-10 
21:23:10 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 

for you to fetch changes up to 8754e1379e7089516a449821f88e1fe1ebbae5e1:

  drivers/net/wan: lapb: Corrected the usage of skb_cow (2020-07-24 20:17:42 
-0700)


Alessio Bonfiglio (1):
  iwlwifi: Make some Killer Wireless-AC 1550 cards work again

Alexander A. Klimov (1):
  net: ieee802154: adf7242: Replace HTTP links with HTTPS ones

Alexander Lobakin (2):
  qed: suppress "don't support RoCE & iWARP" flooding on HW init
  qed: suppress false-positives interrupt error messages on HW init

Alexandre Belloni (1):
  net: macb: use phy_interface_mode_is_rgmii everywhere

Andrea Righi (1):
  xen-netfront: fix potential deadlock in xennet_remove()

Bixuan Cui (1):
  net: neterion: vxge: reduce stack usage in VXGE_COMPLETE_VPATH_TX

Christophe JAILLET (1):
  hippi: Fix a size used in a 'pci_free_consistent()' in an error handling 
path

Claudiu Manoil (1):
  enetc: Remove the mdio bus on PF probe bailout

Cong Wang (3):
  bonding: check return value of register_netdevice() in bond_newlink()
  geneve: fix an uninitialized value in geneve_changelink()
  qrtr: orphan socket in qrtr_release()

Dan Carpenter (1):
  AX.25: Prevent integer overflows in connect and sendmsg

David Howells (1):
  rxrpc: Fix sendmsg() returning EPIPE due to recvmsg() returning ENODATA

David S. Miller (13):
  Merge branch 'bnxt_en-fixes'
  Merge tag 'wireless-drivers-2020-07-13' of 
git://git.kernel.org/.../kvalo/wireless-drivers
  Merge branch 'bcmgenet-WAKE_FILTER'
  Merge branch 'net-smc-fixes'
  Merge tag 'ieee802154-for-davem-2020-07-20' of 
git://git.kernel.org/.../sschmidt/wpan
  Merge branch 'smc-fixes'
  Merge branch 'ionic-locking-and-filter-fixes'
  Merge branch 'udp-Fix-reuseport-selection-with-connected-sockets'
  Merge branch 'hns3-fixes'
  Merge branch 'qed-suppress-irrelevant-error-messages-on-HW-init'
  Merge branch 'sctp-shrink-stream-outq-in-the-right-place'
  Merge git://git.kernel.org/.../pablo/nf
  Merge tag 'wireless-drivers-2020-07-24' of 
git://git.kernel.org/.../kvalo/wireless-drivers

Doug Berger (3):
  net: bcmgenet: test MPD_EN when resuming
  net: bcmgenet: test RBUF_ACPI_EN when resuming
  net: bcmgenet: restore HFB filters on resume

Egor Pomozov (1):
  net: atlantic: fix PTP on AQC10X

Felix Fietkau (2):
  mt76: mt76x02: do not access uninitialized NAPI structs
  mt76: mt7615: fix EEPROM buffer size

Florian Westphal (1):
  netfilter: nf_tables: fix nat hook table deletion

Geert Uytterhoeven (1):
  usb: hso: Fix debug compile warning on sparc32

George Kennedy (1):
  ax88172a: fix ax88172a_unbind() failures

Guillaume Nault (1):
  Documentation: bareudp: update iproute2 sample commands

Hauke Mehrtens (1):
  ath10k: Fix NULL pointer dereference in AHB device probe

Helmut Grohne (1):
  net: dsa: microchip: call phy_remove_link_mode during probe

Herbert Xu (1):
  flow_offload: Move rhashtable inclusion to the source file

Huang Guobin (1):
   

Re: INFO: task hung in synchronize_rcu (3)

2020-07-24 Thread syzbot
syzbot has bisected this issue to:

commit 5a781ccbd19e4664babcbe4b4ead7aa2b9283d22
Author: Vinicius Costa Gomes 
Date:   Sat Sep 29 00:59:43 2018 +

tc: Add support for configuring the taprio scheduler

bisection log:  https://syzkaller.appspot.com/x/bisect.txt?x=149057ef10
start commit:   4fa640dc Merge tag 'vfio-v5.8-rc7' of git://github.com/awi..
git tree:   upstream
final oops: https://syzkaller.appspot.com/x/report.txt?x=169057ef10
console output: https://syzkaller.appspot.com/x/log.txt?x=129057ef10
kernel config:  https://syzkaller.appspot.com/x/.config?x=f87a5e4232fdb267
dashboard link: https://syzkaller.appspot.com/bug?extid=0c6da80218456f1edc36
userspace arch: i386
syz repro:  https://syzkaller.appspot.com/x/repro.syz?x=14e2a43710
C reproducer:   https://syzkaller.appspot.com/x/repro.c?x=13af00e890

Reported-by: syzbot+0c6da80218456f1ed...@syzkaller.appspotmail.com
Fixes: 5a781ccbd19e ("tc: Add support for configuring the taprio scheduler")

For information about bisection process see: https://goo.gl/tpsmEJ#bisection


Re: [PATCH] amdgpu_dm: fix nonblocking atomic commit use-after-free

2020-07-24 Thread Duncan
On Sat, 25 Jul 2020 03:03:52 +
Mazin Rezk  wrote:

> > Am 24.07.20 um 19:33 schrieb Kees Cook:
> >  
> > > There was a fix to disable the async path for this driver that
> > > worked around the bug too, yes? That seems like a safer and more
> > > focused change that doesn't revert the SLUB defense for all
> > > users, and would actually provide a complete, I think, workaround
> 
> That said, I haven't seen the async disabling patch. If you could
> link to it, I'd be glad to test it out and perhaps we can use that
> instead.

I'm confused.  Not to put words in Kees' mouth; /I/ am confused (which
admittedly could well be just because I make no claims to be a
coder and am simply reading the bug and thread, but I'd appreciate some
"unconfusing" anyway).

My interpretation of the "async disabling" reference was that it was to
comment #30 on the bug:

https://bugzilla.kernel.org/show_bug.cgi?id=207383#c30

... which (if I'm not confused on this point too) appears to be yours.
There it was stated...


I've also found that this bug exclusively occurs when commit_work is on
the workqueue. After forcing drm_atomic_helper_commit to run all of the
commits without adding to the workqueue and running the OS, the issue
seems to have disappeared.


Would not forcing all commits to run directly, without placing them on
the workqueue, be "async disabling"?  That's what I /thought/ he was
referencing.

OTOH your base/context swap idea sounds like a possibly "less
disturbance" workaround, if it works, and given the point in the
commit cycle... (But if it's out Sunday it's likely too late to test
and get it in now anyway; if it's another week, tho...)

-- 
Duncan - No HTML messages please; they are filtered as spam.
"Every nonfree program has a lord, a master --
and if you use the program, he is your master."  Richard Stallman


Re: [PATCH v6 4/4] dt-bindings: timer: Add CLINT bindings

2020-07-24 Thread Atish Patra
On Fri, Jul 24, 2020 at 12:19 AM Anup Patel  wrote:
>
> We add DT bindings documentation for CLINT device.
>
> Signed-off-by: Anup Patel 
> Reviewed-by: Palmer Dabbelt 
> Tested-by: Emil Renner Berhing 
> ---
>  .../bindings/timer/sifive,clint.yaml  | 60 +++
>  1 file changed, 60 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/sifive,clint.yaml
>
> diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml 
> b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> new file mode 100644
> index ..2a0e9cd9fbcf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml
> @@ -0,0 +1,60 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/sifive,clint.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SiFive Core Local Interruptor
> +
> +maintainers:
> +  - Palmer Dabbelt 
> +  - Anup Patel 
> +
> +description:
> +  SiFive (and other RISC-V) SOCs include an implementation of the SiFive
> +  Core Local Interruptor (CLINT) for M-mode timer and M-mode inter-processor
> +  interrupts. It directly connects to the timer and inter-processor interrupt
> +  lines of various HARTs (or CPUs) so RISC-V per-HART (or per-CPU) local
> +  interrupt controller is the parent interrupt controller for CLINT device.
> +  The clock frequency of CLINT is specified via "timebase-frequency" DT
> +  property of "/cpus" DT node. The "timebase-frequency" DT property is
> +  described in Documentation/devicetree/bindings/riscv/cpus.yaml
> +
> +properties:
> +  compatible:
> +items:
> +  - const: sifive,fu540-c000-clint
> +  - const: sifive,clint0
> +
> +description:
> +  Should be "sifive,-clint" and "sifive,clint".
> +  Supported compatible strings are -
> +  "sifive,fu540-c000-clint" for the SiFive CLINT v0 as integrated
> +  onto the SiFive FU540 chip, and "sifive,clint0" for the SiFive
> +  CLINT v0 IP block with no chip integration tweaks.
> +  Please refer to sifive-blocks-ip-versioning.txt for details
> +
> +  reg:
> +maxItems: 1
> +
> +  interrupts-extended:
> +minItems: 1
> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts-extended
> +
> +examples:
> +  - |
> +timer@200 {
> +  compatible = "sifive,fu540-c000-clint", "sifive,clint0";
> +  interrupts-extended = < 3  7
> +  3  7
> +  3  7
> +  3  7>;
> +   reg = <0x200 0x1>;
> +};
> +...
> --
> 2.25.1
>
>
> ___
> linux-riscv mailing list
> linux-ri...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv


Reviewed-by: Atish Patra 

-- 
Regards,
Atish


Re: [PATCH v6 2/4] clocksource/drivers: Add CLINT timer driver

2020-07-24 Thread Atish Patra
On Fri, Jul 24, 2020 at 12:19 AM Anup Patel  wrote:
>
> We add a separate CLINT timer driver for Linux RISC-V M-mode (i.e.
> RISC-V NoMMU kernel).
>
> The CLINT MMIO device provides three things:
> 1. 64bit free running counter register
> 2. 64bit per-CPU time compare registers
> 3. 32bit per-CPU inter-processor interrupt registers
>
> Unlike other timer devices, CLINT provides IPI registers along with
> timer registers. To use CLINT IPI registers, the CLINT timer driver
> provides IPI related callbacks to arch/riscv.
>
> Signed-off-by: Anup Patel 
> Tested-by: Emil Renner Berhing 
> Acked-by: Daniel Lezcano 
> ---
>  drivers/clocksource/Kconfig   |   9 ++
>  drivers/clocksource/Makefile  |   1 +
>  drivers/clocksource/timer-clint.c | 226 ++
>  include/linux/cpuhotplug.h|   1 +
>  4 files changed, 237 insertions(+)
>  create mode 100644 drivers/clocksource/timer-clint.c
>
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index 91418381fcd4..41f1c147c178 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -658,6 +658,15 @@ config RISCV_TIMER
>   is accessed via both the SBI and the rdcycle instruction.  This is
>   required for all RISC-V systems.
>
> +config CLINT_TIMER
> +   bool "CLINT Timer for the RISC-V platform" if COMPILE_TEST
> +   depends on GENERIC_SCHED_CLOCK && RISCV
> +   select TIMER_PROBE
> +   select TIMER_OF
> +   help
> + This option enables the CLINT timer for RISC-V systems.  The CLINT
> + driver is usually used for NoMMU RISC-V systems.
> +
>  config CSKY_MP_TIMER
> bool "SMP Timer for the C-SKY platform" if COMPILE_TEST
> depends on CSKY
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index bdda1a2e4097..18e700e703a0 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -87,6 +87,7 @@ obj-$(CONFIG_CLKSRC_ST_LPC)   += clksrc_st_lpc.o
>  obj-$(CONFIG_X86_NUMACHIP) += numachip.o
>  obj-$(CONFIG_ATCPIT100_TIMER)  += timer-atcpit100.o
>  obj-$(CONFIG_RISCV_TIMER)  += timer-riscv.o
> +obj-$(CONFIG_CLINT_TIMER)  += timer-clint.o
>  obj-$(CONFIG_CSKY_MP_TIMER)+= timer-mp-csky.o
>  obj-$(CONFIG_GX6605S_TIMER)+= timer-gx6605s.o
>  obj-$(CONFIG_HYPERV_TIMER) += hyperv_timer.o
> diff --git a/drivers/clocksource/timer-clint.c 
> b/drivers/clocksource/timer-clint.c
> new file mode 100644
> index ..8eeafa82c03d
> --- /dev/null
> +++ b/drivers/clocksource/timer-clint.c
> @@ -0,0 +1,226 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2020 Western Digital Corporation or its affiliates.
> + *
> + * Most of the M-mode (i.e. NoMMU) RISC-V systems usually have a
> + * CLINT MMIO timer device.
> + */
> +
> +#define pr_fmt(fmt) "clint: " fmt
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define CLINT_IPI_OFF  0
> +#define CLINT_TIMER_CMP_OFF0x4000
> +#define CLINT_TIMER_VAL_OFF0xbff8
> +
> +/* CLINT manages IPI and Timer for RISC-V M-mode  */
> +static u32 __iomem *clint_ipi_base;
> +static u64 __iomem *clint_timer_cmp;
> +static u64 __iomem *clint_timer_val;
> +static unsigned long clint_timer_freq;
> +static unsigned int clint_timer_irq;
> +
> +static void clint_send_ipi(const struct cpumask *target)
> +{
> +   unsigned int cpu;
> +
> +   for_each_cpu(cpu, target)
> +   writel(1, clint_ipi_base + cpuid_to_hartid_map(cpu));
> +}
> +
> +static void clint_clear_ipi(void)
> +{
> +   writel(0, clint_ipi_base + cpuid_to_hartid_map(smp_processor_id()));
> +}
> +
> +static struct riscv_ipi_ops clint_ipi_ops = {
> +   .ipi_inject = clint_send_ipi,
> +   .ipi_clear = clint_clear_ipi,
> +};
> +
> +#ifdef CONFIG_64BIT
> +#define clint_get_cycles() readq_relaxed(clint_timer_val)
> +#else
> +#define clint_get_cycles() readl_relaxed(clint_timer_val)
> +#define clint_get_cycles_hi()  readl_relaxed(((u32 *)clint_timer_val) + 1)
> +#endif
> +
> +#ifdef CONFIG_64BIT
> +static u64 notrace clint_get_cycles64(void)
> +{
> +   return clint_get_cycles();
> +}
> +#else /* CONFIG_64BIT */
> +static u64 notrace clint_get_cycles64(void)
> +{
> +   u32 hi, lo;
> +
> +   do {
> +   hi = clint_get_cycles_hi();
> +   lo = clint_get_cycles();
> +   } while (hi != clint_get_cycles_hi());
> +
> +   return ((u64)hi << 32) | lo;
> +}
> +#endif /* CONFIG_64BIT */
> +
> +static u64 clint_rdtime(struct clocksource *cs)
> +{
> +   return clint_get_cycles64();
> +}
> +
> +static struct clocksource clint_clocksource = {
> +   .name   = "clint_clocksource",
> +   .rating = 300,
> +   .mask   = CLOCKSOURCE_MASK(64),
> +   .flags  = 

INFO: task hung in ovs_dp_cmd_del

2020-07-24 Thread syzbot
Hello,

syzbot found the following issue on:

HEAD commit:e0145983 Merge branch 'fix-bpf_get_stack-with-PEBS'
git tree:   bpf-next
console output: https://syzkaller.appspot.com/x/log.txt?x=16ce401f10
kernel config:  https://syzkaller.appspot.com/x/.config?x=2b7b67c0c1819c87
dashboard link: https://syzkaller.appspot.com/bug?extid=1d3e60b5f711ff9872f4
compiler:   gcc (GCC) 10.1.0-syz 20200507

Unfortunately, I don't have any reproducer for this issue yet.

IMPORTANT: if you fix the issue, please add the following tag to the commit:
Reported-by: syzbot+1d3e60b5f711ff987...@syzkaller.appspotmail.com

INFO: task syz-executor.1:18190 blocked for more than 143 seconds.
  Not tainted 5.8.0-rc4-syzkaller #0
"echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
syz-executor.1  D28320 18190   6934 0x4004
Call Trace:
 context_switch kernel/sched/core.c:3453 [inline]
 __schedule+0x8e1/0x1eb0 kernel/sched/core.c:4178
 schedule+0xd0/0x2a0 kernel/sched/core.c:4253
 schedule_preempt_disabled+0xf/0x20 kernel/sched/core.c:4312
 __mutex_lock_common kernel/locking/mutex.c:1033 [inline]
 __mutex_lock+0x3e2/0x10d0 kernel/locking/mutex.c:1103
 ovs_lock net/openvswitch/datapath.c:105 [inline]
 ovs_dp_cmd_del+0x4a/0x270 net/openvswitch/datapath.c:1780
 genl_family_rcv_msg_doit net/netlink/genetlink.c:669 [inline]
 genl_family_rcv_msg net/netlink/genetlink.c:714 [inline]
 genl_rcv_msg+0x61d/0x980 net/netlink/genetlink.c:731
 netlink_rcv_skb+0x15a/0x430 net/netlink/af_netlink.c:2470
 genl_rcv+0x24/0x40 net/netlink/genetlink.c:742
 netlink_unicast_kernel net/netlink/af_netlink.c:1304 [inline]
 netlink_unicast+0x533/0x7d0 net/netlink/af_netlink.c:1330
 netlink_sendmsg+0x856/0xd90 net/netlink/af_netlink.c:1919
 sock_sendmsg_nosec net/socket.c:651 [inline]
 sock_sendmsg+0xcf/0x120 net/socket.c:671
 sys_sendmsg+0x6e8/0x810 net/socket.c:2363
 ___sys_sendmsg+0xf3/0x170 net/socket.c:2417
 __sys_sendmsg+0xe5/0x1b0 net/socket.c:2450
 do_syscall_64+0x60/0xe0 arch/x86/entry/common.c:384
 entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x45c1f9
Code: Bad RIP value.
RSP: 002b:7f18d3135c78 EFLAGS: 0246 ORIG_RAX: 002e
RAX: ffda RBX: 0002b3c0 RCX: 0045c1f9
RDX:  RSI: 20c0 RDI: 0003
RBP: 0078bfe0 R08:  R09: 
R10:  R11: 0246 R12: 0078bfac
R13: 7ffef201616f R14: 7f18d31369c0 R15: 0078bfac

Showing all locks held in the system:
3 locks held by kworker/1:1/27:
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: 
arch_atomic64_set arch/x86/include/asm/atomic64_64.h:34 [inline]
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: atomic64_set 
include/asm-generic/atomic-instrumented.h:856 [inline]
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: atomic_long_set 
include/asm-generic/atomic-long.h:41 [inline]
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: set_work_data 
kernel/workqueue.c:616 [inline]
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: 
set_work_pool_and_clear_pending kernel/workqueue.c:643 [inline]
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: 
process_one_work+0x82b/0x1670 kernel/workqueue.c:2240
 #1: c9e17da8 
((work_completion)(&(>masks_rebalance)->work)){+.+.}-{0:0}, at: 
process_one_work+0x85f/0x1670 kernel/workqueue.c:2244
 #2: 8aa5e968 (ovs_mutex){+.+.}-{3:3}, at: ovs_lock 
net/openvswitch/datapath.c:105 [inline]
 #2: 8aa5e968 (ovs_mutex){+.+.}-{3:3}, at: 
ovs_dp_masks_rebalance+0x18/0x80 net/openvswitch/datapath.c:2355
1 lock held by khungtaskd/1148:
 #0: 89bc0ec0 (rcu_read_lock){}-{1:2}, at: 
debug_show_all_locks+0x53/0x260 kernel/locking/lockdep.c:5779
3 locks held by kworker/0:11/2521:
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: 
arch_atomic64_set arch/x86/include/asm/atomic64_64.h:34 [inline]
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: atomic64_set 
include/asm-generic/atomic-instrumented.h:856 [inline]
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: atomic_long_set 
include/asm-generic/atomic-long.h:41 [inline]
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: set_work_data 
kernel/workqueue.c:616 [inline]
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: 
set_work_pool_and_clear_pending kernel/workqueue.c:643 [inline]
 #0: 8880aa026d38 ((wq_completion)events){+.+.}-{0:0}, at: 
process_one_work+0x82b/0x1670 kernel/workqueue.c:2240
 #1: c90007b87da8 
((work_completion)(&(>masks_rebalance)->work)){+.+.}-{0:0}, at: 
process_one_work+0x85f/0x1670 kernel/workqueue.c:2244
 #2: 8aa5e968 (ovs_mutex){+.+.}-{3:3}, at: ovs_lock 
net/openvswitch/datapath.c:105 [inline]
 #2: 8aa5e968 (ovs_mutex){+.+.}-{3:3}, at: 
ovs_dp_masks_rebalance+0x18/0x80 net/openvswitch/datapath.c:2355
3 locks held by 

Re: [PATCH] lockdep: Introduce CONFIG_LOCKDEP_LARGE

2020-07-24 Thread Dmitry Vyukov
On Sat, Jul 25, 2020 at 3:30 AM Tetsuo Handa
 wrote:
>
> Since syzkaller continues various test cases until the kernel crashes,
> syzkaller tends to examine more locking dependencies than normal systems.
> As a result, syzbot is reporting that the fuzz testing was terminated
> due to hitting upper limits lockdep can track [1] [2] [3].
>
> Like CONFIG_LOCKDEP_SMALL which halves the upper limits, let's introduce
> CONFIG_LOCKDEP_LARGE which doubles the upper limits.
>
> [1] 
> https://syzkaller.appspot.com/bug?id=3d97ba93fb3566000c1c59691ea427370d33ea1b
> [2] 
> https://syzkaller.appspot.com/bug?id=381cb436fe60dc03d7fd2a092b46d7f09542a72a
> [3] 
> https://syzkaller.appspot.com/bug?id=a588183ac34c1437fc0785e8f220e88282e5a29f
>
> Reported-by: syzbot 
> Reported-by: syzbot 
> Reported-by: syzbot 
> Signed-off-by: Tetsuo Handa 
> ---
>  kernel/locking/lockdep.c   | 4 
>  kernel/locking/lockdep_internals.h | 5 +
>  lib/Kconfig.debug  | 8 
>  3 files changed, 17 insertions(+)
>
> diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c
> index 29a8de4..85ba7eb 100644
> --- a/kernel/locking/lockdep.c
> +++ b/kernel/locking/lockdep.c
> @@ -1349,7 +1349,11 @@ static int add_lock_to_list(struct lock_class *this,
>  /*
>   * For good efficiency of modular, we use power of 2
>   */
> +#ifdef CONFIG_LOCKDEP_LARGE
> +#define MAX_CIRCULAR_QUEUE_SIZE8192UL
> +#else
>  #define MAX_CIRCULAR_QUEUE_SIZE4096UL

Maybe this number should be the config value? So that we don't ever
return here to introduce "VERY_LARGE" :)
Also somebody may use it to _reduce_ size of the table for a smaller kernel.

> +#endif
>  #define CQ_MASK(MAX_CIRCULAR_QUEUE_SIZE-1)
>
>  /*
> diff --git a/kernel/locking/lockdep_internals.h 
> b/kernel/locking/lockdep_internals.h
> index baca699..00a3ec3 100644
> --- a/kernel/locking/lockdep_internals.h
> +++ b/kernel/locking/lockdep_internals.h
> @@ -93,6 +93,11 @@ enum {
>  #define MAX_LOCKDEP_CHAINS_BITS15
>  #define MAX_STACK_TRACE_ENTRIES262144UL
>  #define STACK_TRACE_HASH_SIZE  8192
> +#elif defined(CONFIG_LOCKDEP_LARGE)
> +#define MAX_LOCKDEP_ENTRIES65536UL
> +#define MAX_LOCKDEP_CHAINS_BITS17
> +#define MAX_STACK_TRACE_ENTRIES1048576UL
> +#define STACK_TRACE_HASH_SIZE  32768
>  #else
>  #define MAX_LOCKDEP_ENTRIES32768UL
>
> diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
> index 9ad9210..69ba624 100644
> --- a/lib/Kconfig.debug
> +++ b/lib/Kconfig.debug
> @@ -1266,6 +1266,14 @@ config LOCKDEP
>  config LOCKDEP_SMALL
> bool
>
> +config LOCKDEP_LARGE
> +   bool "Use larger buffer for tracking more locking dependencies"
> +   depends on LOCKDEP && !LOCKDEP_SMALL
> +   help
> + If you say Y here, the upper limits the lock dependency engine uses 
> will
> + be doubled. Useful for fuzz testing which tends to test many 
> complecated
> + dependencies than normal systems.
> +
>  config DEBUG_LOCKDEP
> bool "Lock dependency engine debugging"
> depends on DEBUG_KERNEL && LOCKDEP
> --
> 1.8.3.1
>


Re: [PATCH v5 00/12] Initial MStar/Sigmastar ARMv7 SoC support

2020-07-24 Thread Daniel Palmer
Hi Arnd,

Thanks.

There is one small fix for the v5 set. One of the DTS file names got
broken when I rebased on a different machine.
I'll send a patch for that later today.

Cheer,

Daniel

On Fri, 24 Jul 2020 at 23:37, Arnd Bergmann  wrote:
>
> On Fri, Jul 10, 2020 at 11:46 AM Daniel Palmer  wrote:
> >
> > This patch set adds initial support for MStar/Sigmastar's
> > Armv7 based SoCs. There is just enough here to get to a shell
> > with an initramfs but support for a lot of the hardware is
> > in progress and will follow.
> >
> > MStar also shipped chips with MIPS cores and ARM9 etc which
> > are incompatible so I've tried to make the distinction in the
> > code that this is strictly for the Armv7 based chips.
> >
> > Sorry for the spamming this. I just really want to make some
> > progress on this because I'm worried the other bits that are
> > needed for these SoCs (Really old AT91 support in macb and
> > the fotg210 usb host) will be lost or stop working in the meantime.
> > This already happened in u-boot.
>
> Hi Daniel,
>
> I just found the series again after looking through some backlog,
> and noticing I missed your submission from July 10. This looks
> all good to me now, so I've merged the series into the arm/newsoc
> branch that already contains added support for the keembay and
> sparx5 SoCs.
>
> If you require any changes to this, please send incremental
> patches against the soc tree, and submit it to s...@kernel.org
> so it makes it gets into patchwork.
>
>Arnd


[PATCH v2 14/18] tools: gpio: rename nlines to num_lines

2020-07-24 Thread Kent Gibson
Rename nlines to num_lines to be consistent with other usage for fields
describing the number of entries in an array.

Signed-off-by: Kent Gibson 
---
 tools/gpio/gpio-utils.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/tools/gpio/gpio-utils.c b/tools/gpio/gpio-utils.c
index 16a5d9cb9da2..d527980bcb94 100644
--- a/tools/gpio/gpio-utils.c
+++ b/tools/gpio/gpio-utils.c
@@ -38,7 +38,7 @@
  * such as "gpiochip0"
  * @lines: An array desired lines, specified by offset
  * index for the associated GPIO device.
- * @nline: The number of lines to request.
+ * @num_lines: The number of lines to request.
  * @flag:  The new flag for requsted gpio. Reference
  * "linux/gpio.h" for the meaning of flag.
  * @data:  Default value will be set to gpio when flag is
@@ -56,7 +56,7 @@
  * On failure return the errno.
  */
 int gpiotools_request_linehandle(const char *device_name, unsigned int *lines,
-unsigned int nlines, unsigned int flag,
+unsigned int num_lines, unsigned int flag,
 struct gpiohandle_data *data,
 const char *consumer_label)
 {
@@ -78,12 +78,12 @@ int gpiotools_request_linehandle(const char *device_name, 
unsigned int *lines,
goto exit_free_name;
}
 
-   for (i = 0; i < nlines; i++)
+   for (i = 0; i < num_lines; i++)
req.lineoffsets[i] = lines[i];
 
req.flags = flag;
strcpy(req.consumer_label, consumer_label);
-   req.lines = nlines;
+   req.lines = num_lines;
if (flag & GPIOHANDLE_REQUEST_OUTPUT)
memcpy(req.default_values, data, sizeof(req.default_values));
 
@@ -194,20 +194,20 @@ int gpiotools_get(const char *device_name, unsigned int 
line)
  * such as "gpiochip0".
  * @lines: An array desired lines, specified by offset
  * index for the associated GPIO device.
- * @nline: The number of lines to request.
+ * @num_lines: The number of lines to request.
  * @data:  The array of values get from gpiochip.
  *
  * Return: On success return 0;
  * On failure return the errno.
  */
 int gpiotools_gets(const char *device_name, unsigned int *lines,
-  unsigned int nlines, struct gpiohandle_data *data)
+  unsigned int num_lines, struct gpiohandle_data *data)
 {
int fd;
int ret;
int ret_close;
 
-   ret = gpiotools_request_linehandle(device_name, lines, nlines,
+   ret = gpiotools_request_linehandle(device_name, lines, num_lines,
   GPIOHANDLE_REQUEST_INPUT, data,
   CONSUMER);
if (ret < 0)
@@ -245,7 +245,7 @@ int gpiotools_set(const char *device_name, unsigned int 
line,
  * such as "gpiochip0".
  * @lines: An array desired lines, specified by offset
  * index for the associated GPIO device.
- * @nline: The number of lines to request.
+ * @num_lines: The number of lines to request.
  * @data:  The array of values set to gpiochip, must be
  * 0(low) or 1(high).
  *
@@ -253,11 +253,11 @@ int gpiotools_set(const char *device_name, unsigned int 
line,
  * On failure return the errno.
  */
 int gpiotools_sets(const char *device_name, unsigned int *lines,
-  unsigned int nlines, struct gpiohandle_data *data)
+  unsigned int num_lines, struct gpiohandle_data *data)
 {
int ret;
 
-   ret = gpiotools_request_linehandle(device_name, lines, nlines,
+   ret = gpiotools_request_linehandle(device_name, lines, num_lines,
   GPIOHANDLE_REQUEST_OUTPUT, data,
   CONSUMER);
if (ret < 0)
-- 
2.27.0



[PATCH v2 18/18] tools: gpio: add multi-line monitoring to gpio-event-mon

2020-07-24 Thread Kent Gibson
Extend gpio-event-mon to support monitoring multiple lines.
This would require multiple lineevent requests to implement using uAPI v1,
but can be performed with a single line request using uAPI v2.

Signed-off-by: Kent Gibson 
---
 tools/gpio/gpio-event-mon.c | 41 -
 1 file changed, 31 insertions(+), 10 deletions(-)

diff --git a/tools/gpio/gpio-event-mon.c b/tools/gpio/gpio-event-mon.c
index b64427d78942..e22cbf631e49 100644
--- a/tools/gpio/gpio-event-mon.c
+++ b/tools/gpio/gpio-event-mon.c
@@ -26,7 +26,8 @@
 #include "gpio-utils.h"
 
 int monitor_device(const char *device_name,
-  unsigned int line,
+  unsigned int *lines,
+  unsigned int num_lines,
   struct gpioline_config *config,
   unsigned int loops)
 {
@@ -47,7 +48,7 @@ int monitor_device(const char *device_name,
goto exit_free_name;
}
 
-   ret = gpiotools_request_line(device_name, , 1, config,
+   ret = gpiotools_request_line(device_name, lines, num_lines, config,
 "gpio-event-mon");
if (ret < 0)
goto exit_device_close;
@@ -63,9 +64,23 @@ int monitor_device(const char *device_name,
goto exit_line_close;
}
 
-   fprintf(stdout, "Monitoring line %d on %s\n", line, device_name);
-   fprintf(stdout, "Initial line value: %d\n",
-   gpiotools_test_bit(values.bits, 0));
+   if (num_lines == 1) {
+   fprintf(stdout, "Monitoring line %d on %s\n", lines[0], 
device_name);
+   fprintf(stdout, "Initial line value: %d\n",
+   gpiotools_test_bit(values.bits, 0));
+   } else {
+   fprintf(stdout, "Monitoring lines %d", lines[0]);
+   for (i = 1; i < num_lines - 1; i++)
+   fprintf(stdout, ", %d", lines[i]);
+   fprintf(stdout, " and %d on %s\n", lines[i], device_name);
+   fprintf(stdout, "Initial line values: %d",
+   gpiotools_test_bit(values.bits, 0));
+   for (i = 1; i < num_lines - 1; i++)
+   fprintf(stdout, ", %d",
+   gpiotools_test_bit(values.bits, i));
+   fprintf(stdout, " and %d\n",
+   gpiotools_test_bit(values.bits, i));
+   }
 
while (1) {
struct gpioline_event event;
@@ -124,7 +139,7 @@ void print_usage(void)
fprintf(stderr, "Usage: gpio-event-mon [options]...\n"
"Listen to events on GPIO lines, 0->1 1->0\n"
"  -n   Listen on GPIOs on a named device (must be 
stated)\n"
-   "  -o  Offset to monitor\n"
+   "  -o  Offset of line to monitor (may be repeated)\n"
"  -d Set line as open drain\n"
"  -s Set line as open source\n"
"  -r Listen for rising edges\n"
@@ -145,7 +160,8 @@ void print_usage(void)
 int main(int argc, char **argv)
 {
const char *device_name = NULL;
-   unsigned int line = -1;
+   unsigned int lines[GPIOLINES_MAX];
+   unsigned int num_lines = 0;
unsigned int loops = 0;
struct gpioline_config config;
int c, attr;
@@ -161,7 +177,12 @@ int main(int argc, char **argv)
device_name = optarg;
break;
case 'o':
-   line = strtoul(optarg, NULL, 10);
+   if (num_lines >= GPIOLINES_MAX) {
+   print_usage();
+   return -1;
+   }
+   lines[num_lines] = strtoul(optarg, NULL, 10);
+   num_lines++;
break;
case 'b':
attr = config.num_attrs;
@@ -189,7 +210,7 @@ int main(int argc, char **argv)
}
}
 
-   if (!device_name || line == -1) {
+   if (!device_name || num_lines == 0) {
print_usage();
return -1;
}
@@ -198,5 +219,5 @@ int main(int argc, char **argv)
   "falling edges\n");
config.flags |= EDGE_FLAGS;
}
-   return monitor_device(device_name, line, , loops);
+   return monitor_device(device_name, lines, num_lines, , loops);
 }
-- 
2.27.0



[PATCH v2 17/18] tools: gpio: add debounce support to gpio-event-mon

2020-07-24 Thread Kent Gibson
Add support for debouncing monitored lines to gpio-event-mon.

Signed-off-by: Kent Gibson 
---
 tools/gpio/gpio-event-mon.c | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/tools/gpio/gpio-event-mon.c b/tools/gpio/gpio-event-mon.c
index 5da980f78881..b64427d78942 100644
--- a/tools/gpio/gpio-event-mon.c
+++ b/tools/gpio/gpio-event-mon.c
@@ -129,11 +129,12 @@ void print_usage(void)
"  -s Set line as open source\n"
"  -r Listen for rising edges\n"
"  -f Listen for falling edges\n"
+   "  -b  Debounce the line with period n microseconds\n"
" [-c ]Do  loops (optional, infinite loop if not 
stated)\n"
"  -? This helptext\n"
"\n"
"Example:\n"
-   "gpio-event-mon -n gpiochip0 -o 4 -r -f\n"
+   "gpio-event-mon -n gpiochip0 -o 4 -r -f -b 1\n"
);
 }
 
@@ -147,11 +148,11 @@ int main(int argc, char **argv)
unsigned int line = -1;
unsigned int loops = 0;
struct gpioline_config config;
-   int c;
+   int c, attr;
 
memset(, 0, sizeof(config));
config.flags = GPIOLINE_FLAG_V2_INPUT;
-   while ((c = getopt(argc, argv, "c:n:o:dsrf?")) != -1) {
+   while ((c = getopt(argc, argv, "c:n:o:b:dsrf?")) != -1) {
switch (c) {
case 'c':
loops = strtoul(optarg, NULL, 10);
@@ -162,6 +163,14 @@ int main(int argc, char **argv)
case 'o':
line = strtoul(optarg, NULL, 10);
break;
+   case 'b':
+   attr = config.num_attrs;
+   config.num_attrs++;
+   gpiotools_set_bit(config.attrs[attr].mask, 0);
+   config.attrs[attr].attr.id = GPIOLINE_ATTR_ID_DEBOUNCE;
+   config.attrs[attr].attr.debounce_period =
+   strtoul(optarg, NULL, 10);
+   break;
case 'd':
config.flags |= GPIOLINE_FLAG_V2_OPEN_DRAIN;
break;
-- 
2.27.0



[PATCH v2 16/18] tools: gpio: port gpio-event-mon to v2 uAPI

2020-07-24 Thread Kent Gibson
Port the gpio-event-mon tool to the latest GPIO uAPI.

Signed-off-by: Kent Gibson 
---
 tools/gpio/gpio-event-mon.c | 89 +++--
 1 file changed, 45 insertions(+), 44 deletions(-)

diff --git a/tools/gpio/gpio-event-mon.c b/tools/gpio/gpio-event-mon.c
index 1a303a81aeef..5da980f78881 100644
--- a/tools/gpio/gpio-event-mon.c
+++ b/tools/gpio/gpio-event-mon.c
@@ -23,17 +23,16 @@
 #include 
 #include 
 #include 
+#include "gpio-utils.h"
 
 int monitor_device(const char *device_name,
   unsigned int line,
-  uint32_t handleflags,
-  uint32_t eventflags,
+  struct gpioline_config *config,
   unsigned int loops)
 {
-   struct gpioevent_request req;
-   struct gpiohandle_data data;
+   struct gpioline_values values;
char *chrdev_name;
-   int fd;
+   int cfd, lfd;
int ret;
int i = 0;
 
@@ -41,44 +40,37 @@ int monitor_device(const char *device_name,
if (ret < 0)
return -ENOMEM;
 
-   fd = open(chrdev_name, 0);
-   if (fd == -1) {
+   cfd = open(chrdev_name, 0);
+   if (cfd == -1) {
ret = -errno;
fprintf(stderr, "Failed to open %s\n", chrdev_name);
goto exit_free_name;
}
 
-   req.lineoffset = line;
-   req.handleflags = handleflags;
-   req.eventflags = eventflags;
-   strcpy(req.consumer_label, "gpio-event-mon");
-
-   ret = ioctl(fd, GPIO_GET_LINEEVENT_IOCTL, );
-   if (ret == -1) {
-   ret = -errno;
-   fprintf(stderr, "Failed to issue GET EVENT "
-   "IOCTL (%d)\n",
-   ret);
-   goto exit_close_error;
-   }
+   ret = gpiotools_request_line(device_name, , 1, config,
+"gpio-event-mon");
+   if (ret < 0)
+   goto exit_device_close;
+   else
+   lfd = ret;
 
/* Read initial states */
-   ret = ioctl(req.fd, GPIOHANDLE_GET_LINE_VALUES_IOCTL, );
-   if (ret == -1) {
-   ret = -errno;
-   fprintf(stderr, "Failed to issue GPIOHANDLE GET LINE "
-   "VALUES IOCTL (%d)\n",
+   ret = gpiotools_get_values(lfd, );
+   if (ret < 0) {
+   fprintf(stderr,
+   "Failed to issue GPIO LINE GET VALUES IOCTL (%d)\n",
ret);
-   goto exit_close_error;
+   goto exit_line_close;
}
 
fprintf(stdout, "Monitoring line %d on %s\n", line, device_name);
-   fprintf(stdout, "Initial line value: %d\n", data.values[0]);
+   fprintf(stdout, "Initial line value: %d\n",
+   gpiotools_test_bit(values.bits, 0));
 
while (1) {
-   struct gpioevent_data event;
+   struct gpioline_event event;
 
-   ret = read(req.fd, , sizeof(event));
+   ret = read(lfd, , sizeof(event));
if (ret == -1) {
if (errno == -EAGAIN) {
fprintf(stderr, "nothing available\n");
@@ -96,12 +88,14 @@ int monitor_device(const char *device_name,
ret = -EIO;
break;
}
-   fprintf(stdout, "GPIO EVENT %llu: ", event.timestamp);
+   fprintf(stdout, "GPIO EVENT at %llu on line %d (%d|%d) ",
+   event.timestamp, event.offset, event.line_seqno,
+   event.seqno);
switch (event.id) {
-   case GPIOEVENT_EVENT_RISING_EDGE:
+   case GPIOLINE_EVENT_RISING_EDGE:
fprintf(stdout, "rising edge");
break;
-   case GPIOEVENT_EVENT_FALLING_EDGE:
+   case GPIOLINE_EVENT_FALLING_EDGE:
fprintf(stdout, "falling edge");
break;
default:
@@ -114,8 +108,11 @@ int monitor_device(const char *device_name,
break;
}
 
-exit_close_error:
-   if (close(fd) == -1)
+exit_line_close:
+   if (close(lfd) == -1)
+   perror("Failed to close line file");
+exit_device_close:
+   if (close(cfd) == -1)
perror("Failed to close GPIO character device file");
 exit_free_name:
free(chrdev_name);
@@ -140,15 +137,20 @@ void print_usage(void)
);
 }
 
+#define EDGE_FLAGS \
+   (GPIOLINE_FLAG_V2_EDGE_RISING | \
+GPIOLINE_FLAG_V2_EDGE_FALLING)
+
 int main(int argc, char **argv)
 {
const char *device_name = NULL;
unsigned int line = -1;
unsigned int loops = 0;
-   uint32_t handleflags = GPIOHANDLE_REQUEST_INPUT;
-   uint32_t eventflags = 0;
+   struct gpioline_config config;
int c;
 
+   memset(, 0, sizeof(config));
+   config.flags = GPIOLINE_FLAG_V2_INPUT;

[PATCH v2 15/18] tools: gpio: port gpio-hammer to v2 uAPI

2020-07-24 Thread Kent Gibson
Port the gpio-hammer tool to the latest GPIO uAPI.

Signed-off-by: Kent Gibson 
---
 tools/gpio/gpio-hammer.c |  27 +-
 tools/gpio/gpio-utils.c  | 109 +--
 tools/gpio/gpio-utils.h  |  48 +
 3 files changed, 112 insertions(+), 72 deletions(-)

diff --git a/tools/gpio/gpio-hammer.c b/tools/gpio/gpio-hammer.c
index 9fd926e8cb52..1ab58f8fc03e 100644
--- a/tools/gpio/gpio-hammer.c
+++ b/tools/gpio/gpio-hammer.c
@@ -25,23 +25,25 @@
 int hammer_device(const char *device_name, unsigned int *lines, int nlines,
  unsigned int loops)
 {
-   struct gpiohandle_data data;
+   struct gpioline_values values;
+   struct gpioline_config config;
char swirr[] = "-\\|/";
int fd;
int ret;
int i, j;
unsigned int iteration = 0;
 
-   memset(, 0, sizeof(data.values));
-   ret = gpiotools_request_linehandle(device_name, lines, nlines,
-  GPIOHANDLE_REQUEST_OUTPUT, ,
-  "gpio-hammer");
+   memset(, 0, sizeof(config));
+   config.flags = GPIOLINE_FLAG_V2_OUTPUT;
+
+   ret = gpiotools_request_line(device_name, lines, nlines,
+, "gpio-hammer");
if (ret < 0)
goto exit_error;
else
fd = ret;
 
-   ret = gpiotools_get_values(fd, );
+   ret = gpiotools_get_values(fd, );
if (ret < 0)
goto exit_close_error;
 
@@ -53,7 +55,7 @@ int hammer_device(const char *device_name, unsigned int 
*lines, int nlines,
}
fprintf(stdout, "] on %s, initial states: [", device_name);
for (i = 0; i < nlines; i++) {
-   fprintf(stdout, "%d", data.values[i]);
+   fprintf(stdout, "%d", gpiotools_test_bit(values.bits, i));
if (i != (nlines - 1))
fprintf(stdout, ", ");
}
@@ -64,14 +66,14 @@ int hammer_device(const char *device_name, unsigned int 
*lines, int nlines,
while (1) {
/* Invert all lines so we blink */
for (i = 0; i < nlines; i++)
-   data.values[i] = !data.values[i];
+   gpiotools_change_bit(values.bits, i);
 
-   ret = gpiotools_set_values(fd, );
+   ret = gpiotools_set_values(fd, );
if (ret < 0)
goto exit_close_error;
 
/* Re-read values to get status */
-   ret = gpiotools_get_values(fd, );
+   ret = gpiotools_get_values(fd, );
if (ret < 0)
goto exit_close_error;
 
@@ -82,7 +84,8 @@ int hammer_device(const char *device_name, unsigned int 
*lines, int nlines,
 
fprintf(stdout, "[");
for (i = 0; i < nlines; i++) {
-   fprintf(stdout, "%d: %d", lines[i], data.values[i]);
+   fprintf(stdout, "%d: %d", lines[i],
+   gpiotools_test_bit(values.bits, i));
if (i != (nlines - 1))
fprintf(stdout, ", ");
}
@@ -97,7 +100,7 @@ int hammer_device(const char *device_name, unsigned int 
*lines, int nlines,
ret = 0;
 
 exit_close_error:
-   gpiotools_release_linehandle(fd);
+   gpiotools_release_line(fd);
 exit_error:
return ret;
 }
diff --git a/tools/gpio/gpio-utils.c b/tools/gpio/gpio-utils.c
index d527980bcb94..435d4fc64644 100644
--- a/tools/gpio/gpio-utils.c
+++ b/tools/gpio/gpio-utils.c
@@ -33,34 +33,31 @@
  * release these lines.
  */
 /**
- * gpiotools_request_linehandle() - request gpio lines in a gpiochip
+ * gpiotools_request_line() - request gpio lines in a gpiochip
  * @device_name:   The name of gpiochip without prefix "/dev/",
  * such as "gpiochip0"
  * @lines: An array desired lines, specified by offset
  * index for the associated GPIO device.
  * @num_lines: The number of lines to request.
- * @flag:  The new flag for requsted gpio. Reference
- * "linux/gpio.h" for the meaning of flag.
- * @data:  Default value will be set to gpio when flag is
- * GPIOHANDLE_REQUEST_OUTPUT.
- * @consumer_label:The name of consumer, such as "sysfs",
+ * @config:The new config for requested gpio. Reference
+ * "linux/gpio.h" for config details.
+ * @consumer:  The name of consumer, such as "sysfs",
  * "powerkey". This is useful for other users to
  * know who is using.
  *
  * Request gpio lines through the ioctl provided by chardev. User
  * could call gpiotools_set_values() and gpiotools_get_values() to
  * read and write respectively through the returned fd. Call
- * gpiotools_release_linehandle() to release these 

[PATCH v2 08/18] gpiolib: cdev: support GPIOLINE_SET_CONFIG_IOCTL

2020-07-24 Thread Kent Gibson
Add support for GPIOLINE_SET_CONFIG_IOCTL, the uAPI v2
line set config ioctl.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 91 +
 1 file changed, 91 insertions(+)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index 8caebb460557..9d944ca0ff59 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -417,6 +418,8 @@ struct edge_detector {
  * @seqno: the sequence number for edge events generated on all lines in
  * this line request.  Note that this is not used when @num_descs is 1, as
  * the line_seqno is then the same and is cheaper to calculate.
+ * @config_mutex: mutex for serializing ioctl() calls to ensure consistency
+ * of configuration, partiuclarly multi-step accesses to desc flags.
  * @edets: an array of edge detectors, of size @num_descs
  * @descs: the GPIO descriptors held by this line request, with @num_descs
  * elements.
@@ -428,6 +431,7 @@ struct line {
wait_queue_head_t wait;
DECLARE_KFIFO_PTR(events, struct gpioline_event);
atomic_t seqno;
+   struct mutex config_mutex;
struct edge_detector *edets;
/* descs must be last so it can be dynamically sized */
struct gpio_desc *descs[];
@@ -709,6 +713,30 @@ static int gpioline_config_validate(struct gpioline_config 
*lc, int num_lines)
return 0;
 }
 
+static int gpioline_config_change_validate(struct line *line,
+  struct gpioline_config *lc)
+{
+   int i;
+   u64 flags;
+   struct gpio_desc *desc;
+
+   for (i = 0; i < line->num_descs; i++) {
+   desc = line->descs[i];
+   flags = gpioline_config_flags(lc, i);
+   /* disallow edge detection changes */
+   if (line->edets[i].flags != (flags & GPIOLINE_EDGE_FLAGS))
+   return -EINVAL;
+
+   if (line->edets[i].flags) {
+   /* disallow polarity changes */
+   if (test_bit(FLAG_ACTIVE_LOW, >flags) !=
+   ((flags & GPIOLINE_FLAG_V2_ACTIVE_LOW) != 0))
+   return -EINVAL;
+   }
+   }
+   return 0;
+}
+
 static void gpioline_config_flags_to_desc_flags(u64 flags,
unsigned long *flagsp)
 {
@@ -757,6 +785,66 @@ static long line_get_values(struct line *line, void __user 
*ip)
return 0;
 }
 
+static long line_set_config_locked(struct line *line,
+  struct gpioline_config *lc)
+{
+   struct gpio_desc *desc;
+   int i, ret;
+   u64 flags;
+
+   ret = gpioline_config_change_validate(line, lc);
+   if (ret)
+   return ret;
+
+   for (i = 0; i < line->num_descs; i++) {
+   desc = line->descs[i];
+   flags = gpioline_config_flags(lc, i);
+
+   gpioline_config_flags_to_desc_flags(flags, >flags);
+   /*
+* Lines have to be requested explicitly for input
+* or output, else the line will be treated "as is".
+*/
+   if (flags & GPIOLINE_FLAG_V2_OUTPUT) {
+   int val = gpioline_config_output_value(lc, i);
+
+   edge_detector_stop(>edets[i]);
+   ret = gpiod_direction_output(desc, val);
+   if (ret)
+   return ret;
+   } else if (flags & GPIOLINE_FLAG_V2_INPUT) {
+   ret = gpiod_direction_input(desc);
+   if (ret)
+   return ret;
+   }
+
+   blocking_notifier_call_chain(>gdev->notifier,
+GPIOLINE_CHANGED_CONFIG, desc);
+   }
+   return 0;
+}
+
+static long line_set_config(struct line *line, void __user *ip)
+{
+   struct gpioline_config lc;
+   int ret;
+
+   if (copy_from_user(, ip, sizeof(lc)))
+   return -EFAULT;
+
+   ret = gpioline_config_validate(, line->num_descs);
+   if (ret)
+   return ret;
+
+   mutex_lock(>config_mutex);
+
+   ret = line_set_config_locked(line, );
+
+   mutex_unlock(>config_mutex);
+
+   return ret;
+}
+
 static long line_ioctl(struct file *file, unsigned int cmd,
   unsigned long arg)
 {
@@ -765,6 +853,8 @@ static long line_ioctl(struct file *file, unsigned int cmd,
 
if (cmd == GPIOLINE_GET_VALUES_IOCTL)
return line_get_values(line, ip);
+   else if (cmd == GPIOLINE_SET_CONFIG_IOCTL)
+   return line_set_config(line, ip);
 
return -EINVAL;
 }
@@ -937,6 +1027,7 @@ static int line_create(struct gpio_device *gdev, void 
__user *ip)
}
}
 
+   

[PATCH v2 05/18] gpiolib: cdev: support GPIO_GET_LINE_IOCTL and GPIOLINE_GET_VALUES_IOCTL

2020-07-24 Thread Kent Gibson
Add support for requesting lines using the GPIO_GET_LINE_IOCTL, and
returning their current values using GPIOLINE_GET_VALUES_IOCTL.

Signed-off-by: Kent Gibson 
---

The struct line implementation is based on the V1 struct linehandle
implementation.

The line_ioctl() is a simple wrapper around line_get_values() here, but
will be extended with other ioctls in subsequent patches.

 drivers/gpio/gpiolib-cdev.c | 389 
 1 file changed, 389 insertions(+)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index e6c9b78adfc2..0908ae117b7d 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -1,7 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0
 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -34,6 +36,7 @@
  * GPIO line handle management
  */
 
+#ifdef CONFIG_GPIO_CDEV_V1
 /**
  * struct linehandle_state - contains the state of a userspace handle
  * @gdev: the GPIO device the handle pertains to
@@ -376,6 +379,366 @@ static int linehandle_create(struct gpio_device *gdev, 
void __user *ip)
linehandle_free(lh);
return ret;
 }
+#endif /* CONFIG_GPIO_CDEV_V1 */
+
+/**
+ * struct line - contains the state of a userspace line request
+ * @gdev: the GPIO device the line request pertains to
+ * @label: consumer label used to tag descriptors
+ * @num_descs: the number of descriptors held in the descs array
+ * @descs: the GPIO descriptors held by this line request, with @num_descs
+ * elements.
+ */
+struct line {
+   struct gpio_device *gdev;
+   const char *label;
+   u32 num_descs;
+   /* descs must be last so it can be dynamically sized */
+   struct gpio_desc *descs[];
+};
+
+static bool padding_not_zeroed(__u32 *padding, int pad_size)
+{
+   int i, sum = 0;
+
+   for (i = 0; i < pad_size; i++)
+   sum |= padding[i];
+
+   return sum;
+}
+
+#define GPIOLINE_BIAS_FLAGS \
+   (GPIOLINE_FLAG_V2_BIAS_PULL_UP | \
+GPIOLINE_FLAG_V2_BIAS_PULL_DOWN | \
+GPIOLINE_FLAG_V2_BIAS_DISABLED)
+
+#define GPIOLINE_DIRECTION_FLAGS \
+   (GPIOLINE_FLAG_V2_INPUT | \
+GPIOLINE_FLAG_V2_OUTPUT)
+
+#define GPIOLINE_DRIVE_FLAGS \
+   (GPIOLINE_FLAG_V2_OPEN_DRAIN | \
+GPIOLINE_FLAG_V2_OPEN_SOURCE)
+
+#define GPIOLINE_VALID_FLAGS \
+   (GPIOLINE_FLAG_V2_ACTIVE_LOW | \
+GPIOLINE_DIRECTION_FLAGS | \
+GPIOLINE_DRIVE_FLAGS | \
+GPIOLINE_BIAS_FLAGS)
+
+static u64 gpioline_config_flags(struct gpioline_config *lc, int line_idx)
+{
+   int i;
+
+   for (i = lc->num_attrs - 1; i >= 0; i--) {
+   if ((lc->attrs[i].attr.id == GPIOLINE_ATTR_ID_FLAGS) &&
+   test_bit(line_idx, (unsigned long *)lc->attrs[i].mask))
+   return lc->attrs[i].attr.flags;
+   }
+   return lc->flags;
+}
+
+static int gpioline_config_output_value(struct gpioline_config *lc,
+   int line_idx)
+{
+   int i;
+
+   for (i = lc->num_attrs - 1; i >= 0; i--) {
+   if ((lc->attrs[i].attr.id == GPIOLINE_ATTR_ID_OUTPUT_VALUES) &&
+   test_bit(line_idx, (unsigned long *)lc->attrs[i].mask))
+   return test_bit(line_idx,
+   (unsigned long *)lc->attrs[i].attr.values.bits);
+   }
+   return 0;
+}
+
+static int gpioline_flags_validate(u64 flags)
+{
+   /* Return an error if an unknown flag is set */
+   if (flags & ~GPIOLINE_VALID_FLAGS)
+   return -EINVAL;
+
+   /*
+* Do not allow both INPUT & OUTPUT flags to be set as they are
+* contradictory.
+*/
+   if ((flags & GPIOLINE_FLAG_V2_INPUT) &&
+   (flags & GPIOLINE_FLAG_V2_OUTPUT))
+   return -EINVAL;
+
+   /*
+* Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If
+* the hardware actually supports enabling both at the same time the
+* electrical result would be disastrous.
+*/
+   if ((flags & GPIOLINE_FLAG_V2_OPEN_DRAIN) &&
+   (flags & GPIOLINE_FLAG_V2_OPEN_SOURCE))
+   return -EINVAL;
+
+   /* Drive requires explicit output direction. */
+   if ((flags & GPIOLINE_DRIVE_FLAGS) &&
+   !(flags & GPIOLINE_FLAG_V2_OUTPUT))
+   return -EINVAL;
+
+   /* Bias requies explicit direction. */
+   if ((flags & GPIOLINE_BIAS_FLAGS) &&
+   !(flags & GPIOLINE_DIRECTION_FLAGS))
+   return -EINVAL;
+
+   /* Only one bias flag can be set. */
+   if (((flags & GPIOLINE_FLAG_V2_BIAS_DISABLED) &&
+(flags & (GPIOLINE_FLAG_V2_BIAS_PULL_DOWN |
+  GPIOLINE_FLAG_V2_BIAS_PULL_UP))) ||
+   ((flags & GPIOLINE_FLAG_V2_BIAS_PULL_DOWN) &&
+(flags & GPIOLINE_FLAG_V2_BIAS_PULL_UP)))
+   return -EINVAL;
+
+   return 0;
+}
+
+static int gpioline_config_validate(struct 

[PATCH v2 07/18] gpiolib: cdev: support edge detection for uAPI v2

2020-07-24 Thread Kent Gibson
Add support for edge detection to lines requested using
GPIO_GET_LINE_IOCTL.

Signed-off-by: Kent Gibson 
---

The edge_detector implementation is based on the V1 lineevent implementation.

 drivers/gpio/gpiolib-cdev.c | 314 +++-
 drivers/gpio/gpiolib.c  |   2 +
 drivers/gpio/gpiolib.h  |   2 +
 3 files changed, 317 insertions(+), 1 deletion(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index 1f282207fb70..8caebb460557 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -381,11 +381,43 @@ static int linehandle_create(struct gpio_device *gdev, 
void __user *ip)
 }
 #endif /* CONFIG_GPIO_CDEV_V1 */
 
+/**
+ * struct edge_detector - contains the state of a line edge detector
+ * @line: the corresponding line request
+ * @irq: the interrupt triggered in response to events on this GPIO
+ * @flags: the flags, GPIOLINE_FLAG_V2_EDGE_RISING and/or
+ * GPIOLINE_FLAG_V2_EDGE_FALLING, indicating the edge detection applied
+ * @timestamp: cache for the timestamp storing it between hardirq and IRQ
+ * thread, used to bring the timestamp close to the actual event
+ * @seqno: the seqno for the current edge event in the sequence of events
+ * for the corresponding line request. Ths is drawn from the @line.
+ * @line_seqno: the seqno for the current edge event in the sequence of
+ * events for this line.
+ */
+struct edge_detector {
+   struct line *line;
+   unsigned int irq;
+   u64 flags;
+   /*
+* timestamp and seqno are shared by edge_irq_handler() and
+* edge_irq_thread() which are themselves mutually exclusive.
+*/
+   u64 timestamp;
+   u32 seqno;
+   u32 line_seqno;
+};
+
 /**
  * struct line - contains the state of a userspace line request
  * @gdev: the GPIO device the line request pertains to
  * @label: consumer label used to tag descriptors
  * @num_descs: the number of descriptors held in the descs array
+ * @wait: wait queue that handles blocking reads of events
+ * @events: KFIFO for the GPIO events
+ * @seqno: the sequence number for edge events generated on all lines in
+ * this line request.  Note that this is not used when @num_descs is 1, as
+ * the line_seqno is then the same and is cheaper to calculate.
+ * @edets: an array of edge detectors, of size @num_descs
  * @descs: the GPIO descriptors held by this line request, with @num_descs
  * elements.
  */
@@ -393,10 +425,147 @@ struct line {
struct gpio_device *gdev;
const char *label;
u32 num_descs;
+   wait_queue_head_t wait;
+   DECLARE_KFIFO_PTR(events, struct gpioline_event);
+   atomic_t seqno;
+   struct edge_detector *edets;
/* descs must be last so it can be dynamically sized */
struct gpio_desc *descs[];
 };
 
+static inline struct gpio_desc *edge_detector_desc(
+   const struct edge_detector *edet)
+{
+   return edet->line->descs[edet - >line->edets[0]];
+}
+
+static irqreturn_t edge_irq_thread(int irq, void *p)
+{
+   struct edge_detector *edet = p;
+   struct line *line = edet->line;
+   struct gpio_desc *desc = edge_detector_desc(edet);
+   struct gpioline_event le;
+   int ret;
+
+   /* Do not leak kernel stack to userspace */
+   memset(, 0, sizeof(le));
+
+   /*
+* We may be running from a nested threaded interrupt in which case
+* we didn't get the timestamp from edge_irq_handler().
+*/
+   if (!edet->timestamp) {
+   le.timestamp = ktime_get_ns();
+   if (line->num_descs != 1)
+   edet->seqno = atomic_inc_return(>seqno);
+   } else {
+   le.timestamp = edet->timestamp;
+   }
+   edet->timestamp = 0;
+
+   if (edet->flags == (GPIOLINE_FLAG_V2_EDGE_RISING |
+   GPIOLINE_FLAG_V2_EDGE_FALLING)) {
+   int level = gpiod_get_value_cansleep(desc);
+
+   if (level)
+   /* Emit low-to-high event */
+   le.id = GPIOLINE_EVENT_RISING_EDGE;
+   else
+   /* Emit high-to-low event */
+   le.id = GPIOLINE_EVENT_FALLING_EDGE;
+   } else if (edet->flags == GPIOLINE_FLAG_V2_EDGE_RISING) {
+   /* Emit low-to-high event */
+   le.id = GPIOLINE_EVENT_RISING_EDGE;
+   } else if (edet->flags == GPIOLINE_FLAG_V2_EDGE_FALLING) {
+   /* Emit high-to-low event */
+   le.id = GPIOLINE_EVENT_FALLING_EDGE;
+   } else {
+   return IRQ_NONE;
+   }
+   edet->line_seqno++;
+   le.line_seqno = edet->line_seqno;
+   le.seqno = (line->num_descs == 1) ? le.line_seqno : edet->seqno;
+   le.offset = gpio_chip_hwgpio(desc);
+
+   ret = kfifo_in_spinlocked_noirqsave(>events, ,
+   1, >wait.lock);
+   if (ret)
+   wake_up_poll(>wait, EPOLLIN);

[PATCH v2 13/18] tools: gpio: port gpio-watch to v2 uAPI

2020-07-24 Thread Kent Gibson
Port the gpio-watch tool to the latest GPIO uAPI.

Signed-off-by: Kent Gibson 
---
 tools/gpio/gpio-watch.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/tools/gpio/gpio-watch.c b/tools/gpio/gpio-watch.c
index 5cea24fddfa7..0dd5a04ab250 100644
--- a/tools/gpio/gpio-watch.c
+++ b/tools/gpio/gpio-watch.c
@@ -21,8 +21,8 @@
 
 int main(int argc, char **argv)
 {
-   struct gpioline_info_changed chg;
-   struct gpioline_info req;
+   struct gpioline_info_changed_v2 chg;
+   struct gpioline_info_v2 req;
struct pollfd pfd;
int fd, i, j, ret;
char *event, *end;
@@ -40,11 +40,11 @@ int main(int argc, char **argv)
for (i = 0, j = 2; i < argc - 2; i++, j++) {
memset(, 0, sizeof(req));
 
-   req.line_offset = strtoul(argv[j], , 0);
+   req.offset = strtoul(argv[j], , 0);
if (*end != '\0')
goto err_usage;
 
-   ret = ioctl(fd, GPIO_GET_LINEINFO_WATCH_IOCTL, );
+   ret = ioctl(fd, GPIO_GET_LINEINFO_WATCH_V2_IOCTL, );
if (ret) {
perror("unable to set up line watch");
return EXIT_FAILURE;
@@ -87,7 +87,7 @@ int main(int argc, char **argv)
}
 
printf("line %u: %s at %llu\n",
-  chg.info.line_offset, event, chg.timestamp);
+  chg.info.offset, event, chg.timestamp);
}
}
 
-- 
2.27.0



[PATCH v2 12/18] tools: gpio: port lsgpio to v2 uAPI

2020-07-24 Thread Kent Gibson
Port the lsgpio tool to the latest GPIO uAPI.

Signed-off-by: Kent Gibson 
---
 tools/gpio/lsgpio.c | 102 
 1 file changed, 47 insertions(+), 55 deletions(-)

diff --git a/tools/gpio/lsgpio.c b/tools/gpio/lsgpio.c
index b08d7a5e779b..0a993d535707 100644
--- a/tools/gpio/lsgpio.c
+++ b/tools/gpio/lsgpio.c
@@ -23,58 +23,50 @@
 
 #include "gpio-utils.h"
 
-struct gpio_flag {
-   char *name;
-   unsigned long mask;
-};
-
-struct gpio_flag flagnames[] = {
-   {
-   .name = "kernel",
-   .mask = GPIOLINE_FLAG_KERNEL,
-   },
-   {
-   .name = "output",
-   .mask = GPIOLINE_FLAG_IS_OUT,
-   },
-   {
-   .name = "active-low",
-   .mask = GPIOLINE_FLAG_ACTIVE_LOW,
-   },
-   {
-   .name = "open-drain",
-   .mask = GPIOLINE_FLAG_OPEN_DRAIN,
-   },
-   {
-   .name = "open-source",
-   .mask = GPIOLINE_FLAG_OPEN_SOURCE,
-   },
-   {
-   .name = "pull-up",
-   .mask = GPIOLINE_FLAG_BIAS_PULL_UP,
-   },
-   {
-   .name = "pull-down",
-   .mask = GPIOLINE_FLAG_BIAS_PULL_DOWN,
-   },
-   {
-   .name = "bias-disabled",
-   .mask = GPIOLINE_FLAG_BIAS_DISABLE,
-   },
-};
-
-void print_flags(unsigned long flags)
+static void print_attributes(struct gpioline_info_v2 *info)
 {
int i;
-   int printed = 0;
-
-   for (i = 0; i < ARRAY_SIZE(flagnames); i++) {
-   if (flags & flagnames[i].mask) {
-   if (printed)
-   fprintf(stdout, " ");
-   fprintf(stdout, "%s", flagnames[i].name);
-   printed++;
-   }
+   const char *field_format = "%s";
+
+   if (info->flags & GPIOLINE_FLAG_V2_USED) {
+   fprintf(stdout, field_format, "used");
+   field_format = ", %s";
+   }
+
+   if (info->flags & GPIOLINE_FLAG_V2_OUTPUT)
+   fprintf(stdout, field_format, "output");
+   else
+   fprintf(stdout, field_format, "input");
+
+   field_format = ", %s";
+
+   if (info->flags & GPIOLINE_FLAG_V2_ACTIVE_LOW)
+   fprintf(stdout, field_format, "active-low");
+
+   if (info->flags & GPIOLINE_FLAG_V2_OPEN_DRAIN)
+   fprintf(stdout, field_format, "open-drain");
+   if (info->flags & GPIOLINE_FLAG_V2_OPEN_SOURCE)
+   fprintf(stdout, field_format, "open-source");
+
+   if (info->flags & GPIOLINE_FLAG_V2_BIAS_DISABLED)
+   fprintf(stdout, field_format, "bias-disabled");
+   if (info->flags == GPIOLINE_FLAG_V2_BIAS_PULL_UP)
+   fprintf(stdout, field_format, "pull-up");
+   if (info->flags == GPIOLINE_FLAG_V2_BIAS_PULL_DOWN)
+   fprintf(stdout, field_format, "pull-down");
+
+   if ((info->flags & GPIOLINE_FLAG_V2_EDGE_RISING) &&
+   (info->flags & GPIOLINE_FLAG_V2_EDGE_FALLING))
+   fprintf(stdout, field_format, "both-edges");
+   else if (info->flags & GPIOLINE_FLAG_V2_EDGE_RISING)
+   fprintf(stdout, field_format, "rising-edge");
+   else if (info->flags & GPIOLINE_FLAG_V2_EDGE_FALLING)
+   fprintf(stdout, field_format, "falling-edge");
+
+   for (i = 0; i < info->num_attrs; i++) {
+   if (info->attrs[i].id == GPIOLINE_ATTR_ID_DEBOUNCE)
+   fprintf(stdout, ", debounce_period=%dusec",
+   info->attrs[0].debounce_period);
}
 }
 
@@ -109,18 +101,18 @@ int list_device(const char *device_name)
 
/* Loop over the lines and print info */
for (i = 0; i < cinfo.lines; i++) {
-   struct gpioline_info linfo;
+   struct gpioline_info_v2 linfo;
 
memset(, 0, sizeof(linfo));
-   linfo.line_offset = i;
+   linfo.offset = i;
 
-   ret = ioctl(fd, GPIO_GET_LINEINFO_IOCTL, );
+   ret = ioctl(fd, GPIO_GET_LINEINFO_V2_IOCTL, );
if (ret == -1) {
ret = -errno;
perror("Failed to issue LINEINFO IOCTL\n");
goto exit_close_error;
}
-   fprintf(stdout, "\tline %2d:", linfo.line_offset);
+   fprintf(stdout, "\tline %2d:", linfo.offset);
if (linfo.name[0])
fprintf(stdout, " \"%s\"", linfo.name);
else
@@ -131,7 +123,7 @@ int list_device(const char *device_name)
fprintf(stdout, " unused");
if (linfo.flags) {
fprintf(stdout, " [");
-   print_flags(linfo.flags);
+   print_attributes();
fprintf(stdout, "]");
}
fprintf(stdout, "\n");
-- 

[PATCH v2 11/18] gpio: uapi: document uAPI v1 as deprecated

2020-07-24 Thread Kent Gibson
Update uAPI documentation to deprecate v1 structs and ioctls.

Signed-off-by: Kent Gibson 
---
 include/uapi/linux/gpio.h | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/include/uapi/linux/gpio.h b/include/uapi/linux/gpio.h
index 3f6db33014f0..92a74c245534 100644
--- a/include/uapi/linux/gpio.h
+++ b/include/uapi/linux/gpio.h
@@ -278,6 +278,9 @@ struct gpioline_event {
 
 /*
  *  ABI v1
+ *
+ * This version of the ABI is deprecated and will be removed in the future.
+ * Use the latest version if the ABI, defined above, instead.
  */
 
 /* Informational flags */
@@ -301,6 +304,9 @@ struct gpioline_event {
  * @consumer: a functional name for the consumer of this GPIO line as set by
  * whatever is using it, will be empty if there is no current user but may
  * also be empty if the consumer doesn't set this up
+ *
+ * This struct part of ABI v1 and is deprecated.
+ * Use struct gpioline_info_v2 instead.
  */
 struct gpioline_info {
__u32 line_offset;
@@ -325,6 +331,9 @@ struct gpioline_info {
  * guarantee there are no implicit holes between it and subsequent members.
  * The 20-byte padding at the end makes sure we don't add any implicit padding
  * at the end of the structure on 64-bit architectures.
+ *
+ * This struct part of ABI v1 and is deprecated.
+ * Use struct gpioline_info_changed_v2 instead.
  */
 struct gpioline_info_changed {
struct gpioline_info info;
@@ -364,6 +373,9 @@ struct gpioline_info_changed {
  * @fd: if successful this field will contain a valid anonymous file handle
  * after a GPIO_GET_LINEHANDLE_IOCTL operation, zero or negative value
  * means error
+ *
+ * This struct part of ABI v1 and is deprecated.
+ * Use struct gpioline_request instead.
  */
 struct gpiohandle_request {
__u32 lineoffsets[GPIOHANDLES_MAX];
@@ -383,6 +395,9 @@ struct gpiohandle_request {
  * this specifies the default output value, should be 0 (low) or
  * 1 (high), anything else than 0 or 1 will be interpreted as 1 (high)
  * @padding: reserved for future use and should be zero filled
+ *
+ * This struct part of ABI v1 and is deprecated.
+ * Use struct gpioline_config instead.
  */
 struct gpiohandle_config {
__u32 flags;
@@ -395,6 +410,9 @@ struct gpiohandle_config {
  * @values: when getting the state of lines this contains the current
  * state of a line, when setting the state of lines these should contain
  * the desired target state
+ *
+ * This struct part of ABI v1 and is deprecated.
+ * Use struct gpioline_values instead.
  */
 struct gpiohandle_data {
__u8 values[GPIOHANDLES_MAX];
@@ -418,6 +436,9 @@ struct gpiohandle_data {
  * @fd: if successful this field will contain a valid anonymous file handle
  * after a GPIO_GET_LINEEVENT_IOCTL operation, zero or negative value
  * means error
+ *
+ * This struct part of ABI v1 and is deprecated.
+ * Use struct gpioline_request instead.
  */
 struct gpioevent_request {
__u32 lineoffset;
@@ -437,6 +458,9 @@ struct gpioevent_request {
  * struct gpioevent_data - The actual event being pushed to userspace
  * @timestamp: best estimate of time of event occurrence, in nanoseconds
  * @id: event identifier
+ *
+ * This struct part of ABI v1 and is deprecated.
+ * Use struct gpioline_event instead.
  */
 struct gpioevent_data {
__u64 timestamp;
@@ -461,6 +485,8 @@ struct gpioevent_data {
 
 /*
  * v1 ioctl()s
+ *
+ * These ioctl()s are deprecated.  Use the v2 equivalent instead.
  */
 #define GPIO_GET_LINEINFO_IOCTL _IOWR(0xB4, 0x02, struct gpioline_info)
 #define GPIO_GET_LINEHANDLE_IOCTL _IOWR(0xB4, 0x03, struct gpiohandle_request)
-- 
2.27.0



[PATCH v2 09/18] gpiolib: cdev: support GPIOLINE_SET_VALUES_IOCTL

2020-07-24 Thread Kent Gibson
Add support for the GPIOLINE_SET_VALUES_IOCTL.

Signed-off-by: Kent Gibson 
---
 drivers/gpio/gpiolib-cdev.c | 66 +
 1 file changed, 66 insertions(+)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index 4822cb10aa40..0482a16388a0 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -785,6 +785,70 @@ static long line_get_values(struct line *line, void __user 
*ip)
return 0;
 }
 
+static long line_set_values_locked(struct line *line,
+  struct gpioline_set_values *lsv)
+{
+   unsigned long *vals = (unsigned long *)lsv->bits;
+   unsigned long *mask = (unsigned long *)lsv->mask;
+   struct gpio_desc **descs;
+   int ret, i, didx, num_set = 0;
+
+   for (i = 0; i < line->num_descs; i++) {
+   if (test_bit(i, mask)) {
+   if (!test_bit(FLAG_IS_OUT, >descs[i]->flags))
+   return -EPERM;
+   num_set++;
+   }
+   }
+   if (num_set == 0)
+   return -EINVAL;
+
+   if (num_set == line->num_descs)
+   /* Reuse the array setting function */
+   return gpiod_set_array_value_complex(false,
+true,
+line->num_descs,
+line->descs,
+NULL,
+vals);
+
+   /* build compacted desc array and values */
+   descs = kmalloc_array(num_set, sizeof(*descs), GFP_KERNEL);
+   for (didx = 0, i = 0; i < line->num_descs; i++) {
+   if (test_bit(i, mask)) {
+   descs[didx] = line->descs[i];
+   assign_bit(didx, vals, test_bit(i, vals));
+   didx++;
+   }
+   }
+   ret = gpiod_set_array_value_complex(false,
+   true,
+   num_set,
+   descs,
+   NULL,
+   vals);
+
+   kfree(descs);
+   return ret;
+}
+
+static long line_set_values(struct line *line, void __user *ip)
+{
+   struct gpioline_set_values lsv;
+   int ret;
+
+   if (copy_from_user(, ip, sizeof(lsv)))
+   return -EFAULT;
+
+   mutex_lock(>config_mutex);
+
+   ret = line_set_values_locked(line, );
+
+   mutex_unlock(>config_mutex);
+
+   return ret;
+}
+
 static long line_set_config_locked(struct line *line,
   struct gpioline_config *lc)
 {
@@ -853,6 +917,8 @@ static long line_ioctl(struct file *file, unsigned int cmd,
 
if (cmd == GPIOLINE_GET_VALUES_IOCTL)
return line_get_values(line, ip);
+   else if (cmd == GPIOLINE_SET_VALUES_IOCTL)
+   return line_set_values(line, ip);
else if (cmd == GPIOLINE_SET_CONFIG_IOCTL)
return line_set_config(line, ip);
 
-- 
2.27.0



[PATCH v2 06/18] gpiolib: cdev: support GPIO_GET_LINEINFO_V2_IOCTL and GPIO_GET_LINEINFO_WATCH_V2_IOCTL

2020-07-24 Thread Kent Gibson
Add support for GPIO_GET_LINEINFO_V2_IOCTL and
GPIO_GET_LINEINFO_WATCH_V2_IOCTL.

Signed-off-by: Kent Gibson 
---

The core of this change is the event kfifo switching to contain
struct gpioline_info_changed_v2, instead of V1 as V2 is richer.

The two uAPI versions are mostly independent - other than where they both
provide line info changes via reads on the chip fd.  As the info change
structs differ between V1 and V2, the infowatch implementation tracks which
version of the infowatch ioctl, either GPIO_GET_LINEINFO_WATCH_IOCTL or
GPIO_GET_LINEINFO_WATCH_V2_IOCTL, initiates the initial watch and returns
the corresponding info change struct to the read.  The version supported
on that fd locks to that version on the first watch request, so subsequent
watches from that process must use the same uAPI version.

drivers/gpio/gpiolib-cdev.c | 187 +++-
 1 file changed, 164 insertions(+), 23 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index 0908ae117b7d..1f282207fb70 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -1108,10 +1108,52 @@ static int lineevent_create(struct gpio_device *gdev, 
void __user *ip)
return ret;
 }
 
+static void gpioline_info_v2_to_v1(struct gpioline_info_v2 *info_v2,
+  struct gpioline_info *info_v1)
+{
+   int flagsv2 = info_v2->flags;
+
+   strncpy(info_v1->name, info_v2->name, sizeof(info_v1->name));
+   strncpy(info_v1->consumer, info_v2->consumer,
+   sizeof(info_v1->consumer));
+   info_v1->line_offset = info_v2->offset;
+   info_v1->flags = 0;
+
+   if (flagsv2 & GPIOLINE_FLAG_V2_USED)
+   info_v1->flags |= GPIOLINE_FLAG_KERNEL;
+
+   if (flagsv2 & GPIOLINE_FLAG_V2_OUTPUT)
+   info_v1->flags |= GPIOLINE_FLAG_IS_OUT;
+
+   if (flagsv2 & GPIOLINE_FLAG_V2_ACTIVE_LOW)
+   info_v1->flags |= GPIOLINE_FLAG_ACTIVE_LOW;
+
+   if (flagsv2 & GPIOLINE_FLAG_V2_OPEN_DRAIN)
+   info_v1->flags |= GPIOLINE_FLAG_OPEN_DRAIN;
+   if (flagsv2 & GPIOLINE_FLAG_V2_OPEN_SOURCE)
+   info_v1->flags |= GPIOLINE_FLAG_OPEN_SOURCE;
+
+   if (flagsv2 & GPIOLINE_FLAG_V2_BIAS_PULL_UP)
+   info_v1->flags |= GPIOLINE_FLAG_BIAS_PULL_UP;
+   if (flagsv2 & GPIOLINE_FLAG_V2_BIAS_PULL_DOWN)
+   info_v1->flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN;
+   if (flagsv2 & GPIOLINE_FLAG_V2_BIAS_DISABLED)
+   info_v1->flags |= GPIOLINE_FLAG_BIAS_DISABLE;
+}
+
+static void gpioline_info_changed_v2_to_v1(
+   struct gpioline_info_changed_v2 *lic_v2,
+   struct gpioline_info_changed *lic_v1)
+{
+   gpioline_info_v2_to_v1(_v2->info, _v1->info);
+   lic_v1->timestamp = lic_v2->timestamp;
+   lic_v1->event_type = lic_v2->event_type;
+}
+
 #endif /* CONFIG_GPIO_CDEV_V1 */
 
 static void gpio_desc_to_lineinfo(struct gpio_desc *desc,
- struct gpioline_info *info)
+ struct gpioline_info_v2 *info)
 {
struct gpio_chip *gc = desc->gdev->chip;
bool ok_for_pinctrl;
@@ -1125,7 +1167,7 @@ static void gpio_desc_to_lineinfo(struct gpio_desc *desc,
 * lock common to both frameworks?
 */
ok_for_pinctrl =
-   pinctrl_gpio_can_use_line(gc->base + info->line_offset);
+   pinctrl_gpio_can_use_line(gc->base + info->offset);
 
spin_lock_irqsave(_lock, flags);
 
@@ -1154,23 +1196,27 @@ static void gpio_desc_to_lineinfo(struct gpio_desc 
*desc,
test_bit(FLAG_EXPORT, >flags) ||
test_bit(FLAG_SYSFS, >flags) ||
!ok_for_pinctrl)
-   info->flags |= GPIOLINE_FLAG_KERNEL;
+   info->flags |= GPIOLINE_FLAG_V2_USED;
+
if (test_bit(FLAG_IS_OUT, >flags))
-   info->flags |= GPIOLINE_FLAG_IS_OUT;
+   info->flags |= GPIOLINE_FLAG_V2_OUTPUT;
+   else
+   info->flags |= GPIOLINE_FLAG_V2_INPUT;
+
if (test_bit(FLAG_ACTIVE_LOW, >flags))
-   info->flags |= GPIOLINE_FLAG_ACTIVE_LOW;
+   info->flags |= GPIOLINE_FLAG_V2_ACTIVE_LOW;
+
if (test_bit(FLAG_OPEN_DRAIN, >flags))
-   info->flags |= (GPIOLINE_FLAG_OPEN_DRAIN |
-   GPIOLINE_FLAG_IS_OUT);
+   info->flags |= GPIOLINE_FLAG_V2_OPEN_DRAIN;
if (test_bit(FLAG_OPEN_SOURCE, >flags))
-   info->flags |= (GPIOLINE_FLAG_OPEN_SOURCE |
-   GPIOLINE_FLAG_IS_OUT);
+   info->flags |= GPIOLINE_FLAG_V2_OPEN_SOURCE;
+
if (test_bit(FLAG_BIAS_DISABLE, >flags))
-   info->flags |= GPIOLINE_FLAG_BIAS_DISABLE;
+   info->flags |= GPIOLINE_FLAG_V2_BIAS_DISABLED;
if (test_bit(FLAG_PULL_DOWN, >flags))
-   info->flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN;
+   info->flags |= 

[PATCH v2 10/18] gpiolib: cdev: support setting debounce

2020-07-24 Thread Kent Gibson
Add support for setting debounce on a line via the GPIO uAPI.
Where debounce is not supported by hardware, a software debounce is
provided.

Signed-off-by: Kent Gibson 
---

The implementation of the software debouncer waits for the line to be
stable for the debounce period before determining if a level change,
and a corresponding edge event, has occurred.  This provides maximum
protection against glitches, but also introduces a debounce_period
latency to edge events.

The software debouncer is integrated with the edge detection as it
utilises the line interrupt, and integration is simpler than getting
the two to interwork.  Where software debounce AND edge detection is
required, the debouncer provides both.

Due to the tight integration between the debouncer and edge detection,
and to avoid particular corner cases, it is not allowed to alter the
debounce value if edge detection is enabled.  Changing the debounce with
edge detection enabled is a very unlikely use case, so it is preferable
to disallow it rather than complicate the code to allow it.
Should the user wish to alter the debounce value in such cases they will
need to release and re-request the line.

Changes since v1:
 - improve documentation on fields shared by threads.
 - use READ_ONCE/WRITE_ONCE for shared fields rather than atomic_t
   which was overkill.


 drivers/gpio/gpiolib-cdev.c | 261 +++-
 drivers/gpio/gpiolib.h  |   4 +
 2 files changed, 260 insertions(+), 5 deletions(-)

diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c
index 9f2f3336c62a..b6761d267a7d 100644
--- a/drivers/gpio/gpiolib-cdev.c
+++ b/drivers/gpio/gpiolib-cdev.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -22,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "gpiolib.h"
@@ -394,6 +396,9 @@ static int linehandle_create(struct gpio_device *gdev, void 
__user *ip)
  * for the corresponding line request. Ths is drawn from the @line.
  * @line_seqno: the seqno for the current edge event in the sequence of
  * events for this line.
+ * @work: the worker that implements software debouncing
+ * @sw_debounced: flag indicating if the software debouncer is active
+ * @level: the current debounced physical level of the line
  */
 struct edge_detector {
struct line *line;
@@ -405,7 +410,27 @@ struct edge_detector {
 */
u64 timestamp;
u32 seqno;
+   /*
+* line_seqno is used by either edge_irq_thread() or
+* debounce_work_func() which are themselves mutually exclusive.
+*/
u32 line_seqno;
+   /*
+* -- debouncer specific fields --
+*/
+   struct delayed_work work;
+   /*
+* sw_debounce is shared by line_set_config(), which is the only
+* setter, and line_ioctl(), which can live with a slightly stale
+* value.
+*/
+   unsigned int sw_debounced;
+   /*
+* level is shared by debounce_work_func(), which is the only
+* setter, and line_ioctl() which can live with a slightly stale
+* value.
+*/
+   unsigned int level;
 };
 
 /**
@@ -523,6 +548,10 @@ static int edge_detector_start(struct edge_detector *edet)
int ret, irq, irqflags = 0;
struct gpio_desc *desc;
 
+   if (READ_ONCE(edet->sw_debounced))
+   /* debouncer is setup and will provide edge detection */
+   return 0;
+
desc = edge_detector_desc(edet);
irq = gpiod_to_irq(desc);
 
@@ -554,17 +583,212 @@ static int edge_detector_start(struct edge_detector 
*edet)
return 0;
 }
 
+/*
+ * returns the current debounced logical value.
+ */
+static int debounced_value(struct edge_detector *edet)
+{
+   int value;
+
+   /*
+* minor race - debouncer may be stopped here, so edge_detector_stop
+* must leave the value unchanged so the following will read the level
+* from when the debouncer was last running.
+*/
+   value = READ_ONCE(edet->level);
+
+   if (test_bit(FLAG_ACTIVE_LOW, _detector_desc(edet)->flags))
+   value = !value;
+
+   return value;
+}
+
+static irqreturn_t debounce_irq_handler(int irq, void *p)
+{
+   struct edge_detector *edet = p;
+   struct gpio_desc *desc = edge_detector_desc(edet);
+
+   mod_delayed_work(system_wq,
+>work,
+usecs_to_jiffies(READ_ONCE(desc->debounce_period)));
+
+   return IRQ_HANDLED;
+}
+
+static void debounce_work_func(struct work_struct *work)
+{
+   struct gpioline_event le;
+   int ret, level;
+   struct edge_detector *edet =
+   container_of(work, struct edge_detector, work.work);
+   struct gpio_desc *desc = edge_detector_desc(edet);
+   struct line *line;
+
+   level = gpiod_get_raw_value_cansleep(desc);
+   if (level < 0) {
+   

[PATCH v2 03/18] gpiolib: make cdev a build option

2020-07-24 Thread Kent Gibson
Make the gpiolib-cdev module a build option.  This allows the CDEV
interface to be removed from the kernel to reduce kernel size in
applications where is it not required, and provides the parent for
other other CDEV interface specific build options to follow.

Suggested-by: Bartosz Golaszewski 
Signed-off-by: Kent Gibson 
---
 drivers/gpio/Kconfig| 16 ++--
 drivers/gpio/Makefile   |  2 +-
 drivers/gpio/gpiolib-cdev.h | 15 +++
 3 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 8030fd91a3cc..b5bb9efc1092 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -66,8 +66,20 @@ config GPIO_SYSFS
 
  This ABI is deprecated. If you want to use GPIO from userspace,
  use the character device /dev/gpiochipN with the appropriate
- ioctl() operations instead. The character device is always
- available.
+ ioctl() operations instead.
+
+config GPIO_CDEV
+   bool "/dev/gpiochipN (character device interface)"
+   default y
+   help
+ Say Y here to add the character device /dev/gpiochipN interface
+ for GPIOs. The character device allows userspace to control GPIOs
+ using ioctl() operations.
+
+ Only say N is you are sure that the GPIO character device is not
+ required.
+
+ If unsure, say Y.
 
 config GPIO_GENERIC
depends on HAS_IOMEM # Only for IOMEM drivers
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 4f9abff4f2dc..7c24c8d77068 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -7,8 +7,8 @@ obj-$(CONFIG_GPIOLIB)   += gpiolib.o
 obj-$(CONFIG_GPIOLIB)  += gpiolib-devres.o
 obj-$(CONFIG_GPIOLIB)  += gpiolib-legacy.o
 obj-$(CONFIG_GPIOLIB)  += gpiolib-devprop.o
-obj-$(CONFIG_GPIOLIB)  += gpiolib-cdev.o
 obj-$(CONFIG_OF_GPIO)  += gpiolib-of.o
+obj-$(CONFIG_GPIO_CDEV)+= gpiolib-cdev.o
 obj-$(CONFIG_GPIO_SYSFS)   += gpiolib-sysfs.o
 obj-$(CONFIG_GPIO_ACPI)+= gpiolib-acpi.o
 
diff --git a/drivers/gpio/gpiolib-cdev.h b/drivers/gpio/gpiolib-cdev.h
index 973578e7ad10..19a4e3d57120 100644
--- a/drivers/gpio/gpiolib-cdev.h
+++ b/drivers/gpio/gpiolib-cdev.h
@@ -5,7 +5,22 @@
 
 #include 
 
+#ifdef CONFIG_GPIO_CDEV
+
 int gpiolib_cdev_register(struct gpio_device *gdev, dev_t devt);
 void gpiolib_cdev_unregister(struct gpio_device *gdev);
 
+#else
+
+static inline int gpiolib_cdev_register(struct gpio_device *gdev, dev_t devt)
+{
+   return 0;
+}
+
+static inline void gpiolib_cdev_unregister(struct gpio_device *gdev)
+{
+}
+
+#endif /* CONFIG_GPIO_CDEV */
+
 #endif /* GPIOLIB_CDEV_H */
-- 
2.27.0



[PATCH v2 04/18] gpiolib: add build option for CDEV v1 ABI

2020-07-24 Thread Kent Gibson
Add a build option to allow the removal of the CDEV v1 ABI.

Suggested-by: Bartosz Golaszewski 
Signed-off-by: Kent Gibson 
---

This patch is before the V2 implementation, and is non-functional until
that patch, as some parts of that patch would be written slightly
differently if removing V1 was not considered.
Adding this patch after that would necessitate revisiting the V2 changes,
so this ordering results in two simpler patches.

 drivers/gpio/Kconfig | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index b5bb9efc1092..d9775998a997 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -81,6 +81,18 @@ config GPIO_CDEV
 
  If unsure, say Y.
 
+config GPIO_CDEV_V1
+   bool "Support GPIO ABI Version 1"
+   default y
+   depends on GPIO_CDEV
+   help
+ Say Y here to support version 1 of the GPIO CDEV ABI.
+
+ This ABI version is deprecated and will be removed in the future.
+ Please use the latest ABI for new developments.
+
+ If unsure, say Y.
+
 config GPIO_GENERIC
depends on HAS_IOMEM # Only for IOMEM drivers
tristate
-- 
2.27.0



[PATCH v2 02/18] gpio: uapi: define uAPI v2

2020-07-24 Thread Kent Gibson
Add a new version of the uAPI to address existing 32/64-bit alignment
issues, add support for debounce and event sequence numbers, and provide
some future proofing by adding padding reserved for future use.

The alignment issue relates to the gpioevent_data, which packs to different
sizes on 32-bit and 64-bit platforms. That creates problems for 32-bit apps
running on 64-bit kernels.  The patch addresses that particular issue, and
the problem more generally, by adding pad fields that explicitly pad
structs out to 64-bit boundaries, so they will pack to the same size now,
and even if some of the reserved padding is used for __u64 fields in the
future.

The lack of future proofing in v1 makes it impossible to, for example,
add the debounce feature that is included in v2.
The future proofing is addressed by providing reserved padding in all
structs for future features.  Specifically, the line request,
config, info, info_changed and event structs receive updated versions,
and the first three new ioctls.

Signed-off-by: Kent Gibson 
---

I haven't added any padding to gpiochip_info, as I haven't seen any calls
for new features for the corresponding ioctl, but I'm open to updating that
as well.

As the majority of the structs and ioctls were being replaced, it seemed
opportune to rework some of the other aspects of the uAPI.

Firstly, I've reworked the flags field throughout.  v1 has three different
flags fields, each with their own separate bit definitions.  In v2 that is
collapsed to one.

I've also merged the handle and event requests into a single request, the
line request, as the two requests were mostly the same, other than the
edge detection provided by event requests.  As a byproduct, the v2 uAPI
allows for multiple lines producing edge events on the same line handle.
This is a new capability as v1 only supports a single line in an event
request.

This means there are now only two types of file handle to be concerned with,
the chip and the line, and it is clearer which ioctls apply to which type
of handle.

There is also some minor renaming of fields for consistency compared to
their v1 counterparts, e.g. offset rather than lineoffset or line_offset,
and consumer rather than consumer_label.

Additionally, v1 GPIOHANDLES_MAX becomes GPIOLINES_MAX in v2 for clarity,
and the gpiohandle_data __u8 array becomes a bitmap gpioline_values.

The v2 uAPI is mostly just a reorganisation of v1, so userspace code,
particularly libgpiod, should easily port to it.

Changes since v1:
 - lower case V1 and V2, except in capitalized names
 - hyphenate 32/64-bit
 - rename bitmap field to bits
 - drop PAD_SIZE consts in favour of hard coded numbers
 - sort includes
 - change config flags to __u64
 - increase padding of gpioline_event
 - relocate GPIOLINE_CHANGED enum into v2 section (is common with v1)
 - rework config to collapse direction, drive, bias and edge enums back
   into flags and add optional attributes that can be associated with a
   subset of the requested lines.

Changes since the RFC:
 - document the constraints on array sizes to maintain 32/64 alignment
 - add sequence numbers to gpioline_event
 - use bitmap for values instead of array of __u8
 - gpioline_info_v2 contains gpioline_config instead of its composite fields
 - provide constants for all array sizes, especially padding
 - renamed "GPIOLINE_FLAG_V2_KERNEL" to "GPIOLINE_FLAG_V2_USED"
 - renamed "default_values" to "values"
 - made gpioline_direction zero based
 - document clock used in gpioline_event timestamp
 - add event_buffer_size to gpioline_request
 - rename debounce to debounce_period
 - rename lines to num_lines
 
 include/uapi/linux/gpio.h | 284 --
 1 file changed, 270 insertions(+), 14 deletions(-)

diff --git a/include/uapi/linux/gpio.h b/include/uapi/linux/gpio.h
index 285cc10355b2..3f6db33014f0 100644
--- a/include/uapi/linux/gpio.h
+++ b/include/uapi/linux/gpio.h
@@ -12,10 +12,13 @@
 #define _UAPI_GPIO_H_
 
 #include 
+#include 
 #include 
 
 /*
  * The maximum size of name and label arrays.
+ *
+ * Must be a multiple of 8 to ensure 32/64-bit alignment of structs.
  */
 #define GPIO_MAX_NAME_SIZE 32
 
@@ -32,6 +35,251 @@ struct gpiochip_info {
__u32 lines;
 };
 
+/*
+ * Maximum number of requested lines.
+ *
+ * Must be a multiple of 8 to ensure 32/64-bit alignment of structs.
+ */
+#define GPIOLINES_MAX 64
+
+/* The number of __u64 required for a bitmap for GPIOLINES_MAX lines */
+#define GPIOLINES_BITMAP_SIZE  __KERNEL_DIV_ROUND_UP(GPIOLINES_MAX, 64)
+
+/*
+ * The maximum number of configuration attributes associated with a line
+ * request.
+ */
+#define GPIOLINE_NUM_ATTRS_MAX 10
+
+/**
+ * enum gpioline_flag_v2 -  gpioline_attribute.flags values
+ */
+enum gpioline_flag_v2 {
+   GPIOLINE_FLAG_V2_USED   = 1UL << 0, /* line is not 
available for request */
+   GPIOLINE_FLAG_V2_ACTIVE_LOW = 1UL << 1,
+   GPIOLINE_FLAG_V2_INPUT  = 1UL << 

[PATCH v2 01/18] gpio: uapi: define GPIO_MAX_NAME_SIZE for array sizes

2020-07-24 Thread Kent Gibson
Replace constant array sizes with a macro constant to clarify the source
of array sizes, provide a place to document any constraints on the size,
and to simplify array sizing in userspace if constructing structs
from their composite fields.

Signed-off-by: Kent Gibson 
---

This change is not terribly important for V1, but in adding V2 more
documentation for the usage of this value is appropriate.
As it is also used with V1 it warrants a separate patch.

 include/uapi/linux/gpio.h | 17 +++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/include/uapi/linux/gpio.h b/include/uapi/linux/gpio.h
index 9c27cecf406f..285cc10355b2 100644
--- a/include/uapi/linux/gpio.h
+++ b/include/uapi/linux/gpio.h
@@ -14,6 +14,11 @@
 #include 
 #include 
 
+/*
+ * The maximum size of name and label arrays.
+ */
+#define GPIO_MAX_NAME_SIZE 32
+
 /**
  * struct gpiochip_info - Information about a certain GPIO chip
  * @name: the Linux kernel name of this GPIO chip
@@ -22,8 +27,8 @@
  * @lines: number of GPIO lines on this chip
  */
 struct gpiochip_info {
-   char name[32];
-   char label[32];
+   char name[GPIO_MAX_NAME_SIZE];
+   char label[GPIO_MAX_NAME_SIZE];
__u32 lines;
 };
 
@@ -52,8 +57,8 @@ struct gpiochip_info {
 struct gpioline_info {
__u32 line_offset;
__u32 flags;
-   char name[32];
-   char consumer[32];
+   char name[GPIO_MAX_NAME_SIZE];
+   char consumer[GPIO_MAX_NAME_SIZE];
 };
 
 /* Maximum number of requested handles */
@@ -123,7 +128,7 @@ struct gpiohandle_request {
__u32 lineoffsets[GPIOHANDLES_MAX];
__u32 flags;
__u8 default_values[GPIOHANDLES_MAX];
-   char consumer_label[32];
+   char consumer_label[GPIO_MAX_NAME_SIZE];
__u32 lines;
int fd;
 };
@@ -182,7 +187,7 @@ struct gpioevent_request {
__u32 lineoffset;
__u32 handleflags;
__u32 eventflags;
-   char consumer_label[32];
+   char consumer_label[GPIO_MAX_NAME_SIZE];
int fd;
 };
 
-- 
2.27.0



[PATCH v2 00/18] gpio: cdev: add uAPI V2

2020-07-24 Thread Kent Gibson
This patchset defines and implements adds a new version of the
GPIO CDEV uAPI to address existing 32/64-bit alignment issues, add
support for debounce, event sequence numbers, and allowing for requested
lines with different configurations.
It provides some future proofing by adding optional configuration fields
and padding reserved for future use.

The series can be partitioned into two sets; the first eleven
contain the V2 uAPI implementation, and the final seven port
the GPIO tools to the V2 uAPI and extend them to use new uAPI features.

The more complicated patches include their own commentary where
appropriate.

Cheers,
Kent.

Changes since v1:
 - split out cleanup patches into a separate series.
 - split implementation patch into a patch for each ioctl or major feature.
 - split tool port patch into a patch per tool.
 - rework uAPI to allow requested lines with different configurations.

Kent Gibson (18):
  gpio: uapi: define GPIO_MAX_NAME_SIZE for array sizes
  gpio: uapi: define uAPI v2
  gpiolib: make cdev a build option
  gpiolib: add build option for CDEV v1 ABI
  gpiolib: cdev: support GPIO_GET_LINE_IOCTL and
GPIOLINE_GET_VALUES_IOCTL
  gpiolib: cdev: support GPIO_GET_LINEINFO_V2_IOCTL and
GPIO_GET_LINEINFO_WATCH_V2_IOCTL
  gpiolib: cdev: support edge detection for uAPI v2
  gpiolib: cdev: support GPIOLINE_SET_CONFIG_IOCTL
  gpiolib: cdev: support GPIOLINE_SET_VALUES_IOCTL
  gpiolib: cdev: support setting debounce
  gpio: uapi: document uAPI v1 as deprecated
  tools: gpio: port lsgpio to v2 uAPI
  tools: gpio: port gpio-watch to v2 uAPI
  tools: gpio: rename nlines to num_lines
  tools: gpio: port gpio-hammer to v2 uAPI
  tools: gpio: port gpio-event-mon to v2 uAPI
  tools: gpio: add debounce support to gpio-event-mon
  tools: gpio: add multi-line monitoring to gpio-event-mon

 drivers/gpio/Kconfig|   28 +-
 drivers/gpio/Makefile   |2 +-
 drivers/gpio/gpiolib-cdev.c | 1296 ++-
 drivers/gpio/gpiolib-cdev.h |   15 +
 drivers/gpio/gpiolib.c  |2 +
 drivers/gpio/gpiolib.h  |6 +
 include/uapi/linux/gpio.h   |  327 -
 tools/gpio/gpio-event-mon.c |  137 ++--
 tools/gpio/gpio-hammer.c|   27 +-
 tools/gpio/gpio-utils.c |  117 ++--
 tools/gpio/gpio-utils.h |   48 +-
 tools/gpio/gpio-watch.c |   10 +-
 tools/gpio/lsgpio.c |  102 ++-
 13 files changed, 1882 insertions(+), 235 deletions(-)


base-commit: 8fc3ed3a474d76cd76dd0a154ea904373e9a5530
-- 
2.27.0



[PATCH 14216/14216] ALSA: usb-audio: This patch for prevent auto wakeup from s3 trig by usb disconnect signal from Lenovo Thinkcentre TI024Gen3 USB-audio.

2020-07-24 Thread penghao
From: "peng...@deepin.com" 

 TI024Gen3 USB-audio is controlled by TI024Gen3,when TI024Gens
 enter sleep mode, USB-audio will disconnect from USB bus port,
 so disabled the /sys/bus/usb/*/power/wakeup Fixesimmediately
 wakup form s3 state

Signed-off-by: peng...@uniontech.com 
Signed-off-by: peng...@deepin.com 
---
 sound/usb/card.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/sound/usb/card.c b/sound/usb/card.c
index 2644a5ae2b75..969c3809e051 100644
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
@@ -640,6 +640,12 @@ static int usb_audio_probe(struct usb_interface *intf,
}
}
dev_set_drvdata(>dev, chip);
+   /*
+* ALSA: usb-audio: Add prevent wakeup from s3 state trig by lenovo
+* ThinkCentre TI024Gen3 USB-audio
+*/
+   if ((usb_id->idVendor == 0x17ef) && (usb_id->idProduct == 0xa012))
+   device_set_wakeup_enable(>dev, 0);
 
/*
 * For devices with more than one control interface, we assume the
@@ -914,3 +920,4 @@ static struct usb_driver usb_audio_driver = {
 };
 
 module_usb_driver(usb_audio_driver);
+
-- 
2.11.0





Re: [PATCH v3 0/3] Add functions to operate USB PHY related clock.

2020-07-24 Thread Zhou Yanjie

Gentle ping.

在 2020/7/1 上午12:38, 周琰杰 (Zhou Yanjie) 写道:

v2->v3:
1.Remove the wrong "WARN()".
2.Remove extra blank line.
3.Fix wrong parameters in recalc_rate/set_rate functions.

周琰杰 (Zhou Yanjie) (3):
   clk: JZ4780: Add functions for enable and disable USB PHY.
   clk: JZ4780: Reformat the code to align it.
   clk: X1000: Add support for calculat REFCLK of USB PHY.

  drivers/clk/ingenic/jz4780-cgu.c | 153 ---
  drivers/clk/ingenic/x1000-cgu.c  |  84 -
  2 files changed, 162 insertions(+), 75 deletions(-)



[PATCH v8 1/5] PCI: Conditionally initialize host bridge native_* members

2020-07-24 Thread sathyanarayanan . kuppuswamy
From: Kuppuswamy Sathyanarayanan 

If CONFIG_PCIEPORTBUS is not enabled in kernel then initialing
struct pci_host_bridge PCIe specific native_* members to "1" is
incorrect. So protect the PCIe specific member initialization
with CONFIG_PCIEPORTBUS.

Signed-off-by: Kuppuswamy Sathyanarayanan 

---
 drivers/pci/probe.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 2f66988cea25..a94b97564ceb 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -588,12 +588,14 @@ static void pci_init_host_bridge(struct pci_host_bridge 
*bridge)
 * may implement its own AER handling and use _OSC to prevent the
 * OS from interfering.
 */
+#ifdef CONFIG_PCIEPORTBUS
bridge->native_aer = 1;
bridge->native_pcie_hotplug = 1;
-   bridge->native_shpc_hotplug = 1;
bridge->native_pme = 1;
bridge->native_ltr = 1;
bridge->native_dpc = 1;
+#endif
+   bridge->native_shpc_hotplug = 1;
 
device_initialize(>dev);
 }
-- 
2.17.1



[PATCH v8 4/5] PCI/portdrv: Remove redundant pci_aer_available() check in DPC enable logic

2020-07-24 Thread sathyanarayanan . kuppuswamy
From: Kuppuswamy Sathyanarayanan 

In DPC service enable logic, check for
services & PCIE_PORT_SERVICE_AER implies pci_aer_available()
is true. So there is no need to explicitly check it again.

Also, passing pcie_ports=dpc-native in kernel command line
implies DPC needs to be enabled in native mode irrespective
of AER ownership status. So checking for pci_aer_available()
without checking for pcie_ports status is incorrect.

Signed-off-by: Kuppuswamy Sathyanarayanan 

---
 drivers/pci/pcie/portdrv_core.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 2c0278f0fdcc..e257a2ca3595 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -252,7 +252,6 @@ static int get_port_device_capability(struct pci_dev *dev)
 * permission to use AER.
 */
if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) &&
-   pci_aer_available() &&
(host->native_dpc || (services & PCIE_PORT_SERVICE_AER)))
services |= PCIE_PORT_SERVICE_DPC;
 
-- 
2.17.1



[PATCH v8 2/5] ACPI/PCI: Ignore _OSC negotiation result if pcie_ports_native is set.

2020-07-24 Thread sathyanarayanan . kuppuswamy
From: Kuppuswamy Sathyanarayanan 

pcie_ports_native is set only if user requests native handling
of PCIe capabilities via pcie_port_setup command line option.
User input takes precedence over _OSC based control negotiation
result. So consider the _OSC negotiated result only if
pcie_ports_native is unset.

Also, since struct pci_host_bridge ->native_* members caches the
ownership status of various PCIe capabilities, use them instead
of distributed checks for pcie_ports_native.

Signed-off-by: Kuppuswamy Sathyanarayanan 

---
 drivers/acpi/pci_root.c   | 61 ++-
 drivers/pci/hotplug/pciehp_core.c |  2 +-
 drivers/pci/pci-acpi.c|  3 --
 drivers/pci/pcie/aer.c|  2 +-
 drivers/pci/pcie/portdrv_core.c   |  9 ++---
 5 files changed, 56 insertions(+), 21 deletions(-)

diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index f90e841c59f5..f8981d4e044d 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -145,6 +145,17 @@ static struct pci_osc_bit_struct pci_osc_control_bit[] = {
{ OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
 };
 
+static char *get_osc_desc(u32 bit)
+{
+   int i = 0;
+
+   for (i = 0; i < ARRAY_SIZE(pci_osc_control_bit); i++)
+   if (bit == pci_osc_control_bit[i].bit)
+   return pci_osc_control_bit[i].desc;
+
+   return NULL;
+}
+
 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
struct pci_osc_bit_struct *table, int size)
 {
@@ -914,18 +925,48 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root 
*root,
goto out_release_info;
 
host_bridge = to_pci_host_bridge(bus->bridge);
-   if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
-   host_bridge->native_pcie_hotplug = 0;
+   if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)) {
+   if (!pcie_ports_native)
+   host_bridge->native_pcie_hotplug = 0;
+   else
+   dev_warn(>dev, "OS overrides %s firmware control",
+   get_osc_desc(OSC_PCI_EXPRESS_NATIVE_HP_CONTROL));
+   }
+
if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
host_bridge->native_shpc_hotplug = 0;
-   if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
-   host_bridge->native_aer = 0;
-   if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
-   host_bridge->native_pme = 0;
-   if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
-   host_bridge->native_ltr = 0;
-   if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
-   host_bridge->native_dpc = 0;
+
+   if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL)) {
+   if (!pcie_ports_native)
+   host_bridge->native_aer = 0;
+   else
+   dev_warn(>dev, "OS overrides %s firmware control",
+   get_osc_desc(OSC_PCI_EXPRESS_AER_CONTROL));
+   }
+
+   if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL)) {
+   if (!pcie_ports_native)
+   host_bridge->native_pme = 0;
+   else
+   dev_warn(>dev, "OS overrides %s firmware control",
+   get_osc_desc(OSC_PCI_EXPRESS_PME_CONTROL));
+   }
+
+   if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL)) {
+   if (!pcie_ports_native)
+   host_bridge->native_ltr = 0;
+   else
+   dev_warn(>dev, "OS overrides %s firmware control",
+   get_osc_desc(OSC_PCI_EXPRESS_LTR_CONTROL));
+   }
+
+   if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL)) {
+   if (!pcie_ports_native)
+   host_bridge->native_dpc = 0;
+   else
+   dev_warn(>dev, "OS overrides %s firmware control",
+   get_osc_desc(OSC_PCI_EXPRESS_DPC_CONTROL));
+   }
 
/*
 * Evaluate the "PCI Boot Configuration" _DSM Function.  If it
diff --git a/drivers/pci/hotplug/pciehp_core.c 
b/drivers/pci/hotplug/pciehp_core.c
index bf779f291f15..5fc999bf6f1b 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -255,7 +255,7 @@ static bool pme_is_native(struct pcie_device *dev)
const struct pci_host_bridge *host;
 
host = pci_find_host_bridge(dev->port->bus);
-   return pcie_ports_native || host->native_pme;
+   return host->native_pme;
 }
 
 static void pciehp_disable_interrupt(struct pcie_device *dev)
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index 7224b1e5f2a8..e09589571a9d 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -800,9 +800,6 @@ bool pciehp_is_native(struct pci_dev *bridge)

[PATCH v8 5/5] PCI/DPC: Move AER/DPC dependency checks out of DPC driver

2020-07-24 Thread sathyanarayanan . kuppuswamy
From: Kuppuswamy Sathyanarayanan 

Currently, AER and DPC Capabilities dependency checks is
distributed between DPC and portdrv service drivers. So move
them out of DPC driver.

Also, since services & PCIE_PORT_SERVICE_AER check already
ensures AER native ownership, no need to add additional
pcie_aer_is_native() check.

Signed-off-by: Kuppuswamy Sathyanarayanan 

---
 drivers/pci/pcie/dpc.c  | 3 ---
 drivers/pci/pcie/portdrv_core.c | 1 +
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index 5b1025a2994d..3efbe43764f3 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -285,9 +285,6 @@ static int dpc_probe(struct pcie_device *dev)
int status;
u16 ctl, cap;
 
-   if (!pcie_aer_is_native(pdev) && !host->native_dpc)
-   return -ENOTSUPP;
-
status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
   dpc_handler, IRQF_SHARED,
   "pcie-dpc", pdev);
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index e257a2ca3595..ffa1d9fc458e 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -252,6 +252,7 @@ static int get_port_device_capability(struct pci_dev *dev)
 * permission to use AER.
 */
if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) &&
+   host->native_dpc &&
(host->native_dpc || (services & PCIE_PORT_SERVICE_AER)))
services |= PCIE_PORT_SERVICE_DPC;
 
-- 
2.17.1



[PATCH v8 3/5] ACPI/PCI: Ignore _OSC DPC negotiation result if pcie_ports_dpc_native is set.

2020-07-24 Thread sathyanarayanan . kuppuswamy
From: Kuppuswamy Sathyanarayanan 

pcie_ports_dpc_native is set only if user requests native handling
of PCIe DPC capability via pcie_port_setup command line option.
User input takes precedence over _OSC based control negotiation
result. So consider the _OSC negotiated result for DPC ownership
only if pcie_ports_dpc_native is unset.

Signed-off-by: Kuppuswamy Sathyanarayanan 

---
 drivers/acpi/pci_root.c | 2 +-
 drivers/pci/pcie/dpc.c  | 3 ++-
 drivers/pci/pcie/portdrv.h  | 2 --
 drivers/pci/pcie/portdrv_core.c | 2 +-
 include/linux/pci.h | 2 ++
 5 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index f8981d4e044d..3942bb42cb93 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -961,7 +961,7 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root 
*root,
}
 
if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL)) {
-   if (!pcie_ports_native)
+   if (!pcie_ports_native && !pcie_ports_dpc_native)
host_bridge->native_dpc = 0;
else
dev_warn(>dev, "OS overrides %s firmware control",
diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
index daa9a4153776..5b1025a2994d 100644
--- a/drivers/pci/pcie/dpc.c
+++ b/drivers/pci/pcie/dpc.c
@@ -280,11 +280,12 @@ void pci_dpc_init(struct pci_dev *pdev)
 static int dpc_probe(struct pcie_device *dev)
 {
struct pci_dev *pdev = dev->port;
+   struct pci_host_bridge *host = pci_find_host_bridge(pdev->bus);
struct device *device = >device;
int status;
u16 ctl, cap;
 
-   if (!pcie_aer_is_native(pdev) && !pcie_ports_dpc_native)
+   if (!pcie_aer_is_native(pdev) && !host->native_dpc)
return -ENOTSUPP;
 
status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h
index af7cf237432a..0ac20feef24e 100644
--- a/drivers/pci/pcie/portdrv.h
+++ b/drivers/pci/pcie/portdrv.h
@@ -25,8 +25,6 @@
 
 #define PCIE_PORT_DEVICE_MAXSERVICES   5
 
-extern bool pcie_ports_dpc_native;
-
 #ifdef CONFIG_PCIEAER
 int pcie_aer_init(void);
 int pcie_aer_is_native(struct pci_dev *dev);
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index ccd5e0ce5605..2c0278f0fdcc 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -253,7 +253,7 @@ static int get_port_device_capability(struct pci_dev *dev)
 */
if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) &&
pci_aer_available() &&
-   (pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER)))
+   (host->native_dpc || (services & PCIE_PORT_SERVICE_AER)))
services |= PCIE_PORT_SERVICE_DPC;
 
if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM ||
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 34c1c4f45288..fe7ce06a4f40 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1556,9 +1556,11 @@ static inline int pci_irqd_intx_xlate(struct irq_domain 
*d,
 #ifdef CONFIG_PCIEPORTBUS
 extern bool pcie_ports_disabled;
 extern bool pcie_ports_native;
+extern bool pcie_ports_dpc_native;
 #else
 #define pcie_ports_disabledtrue
 #define pcie_ports_native  false
+#define pcie_ports_dpc_native  false
 #endif
 
 #define PCIE_LINK_STATE_L0SBIT(0)
-- 
2.17.1



[PATCH v8 0/5] Simplify PCIe native ownership detection logic

2020-07-24 Thread sathyanarayanan . kuppuswamy
From: Kuppuswamy Sathyanarayanan 

Currently, PCIe capabilities ownership status is detected by
verifying the status of pcie_ports_native, pcie_ports_dpc_native
and _OSC negotiated results (cached in  struct pci_host_bridge
->native_* members). But this logic can be simplified, and we can
use only struct pci_host_bridge ->native_* members to detect it. 

This patchset removes the distributed checks for pcie_ports_native,
pcie_ports_dpc_native parameters.

Changes since v7:
 * Fixed "fix array_size.cocci warnings".

Changes since v6:
 * Created new patch for CONFIG_PCIEPORTBUS check in
   pci_init_host_bridge().
 * Added warning message for a case when pcie_ports_native
   overrides _OSC negotiation result.

Changes since v5:
 * Rebased on top of v5.8-rc1

Changes since v4:
 * Changed the patch set title (Original link: 
https://lkml.org/lkml/2020/5/26/1710)
 * Added AER/DPC dependency logic cleanup fixes.
 

Kuppuswamy Sathyanarayanan (5):
  PCI: Conditionally initialize host bridge native_* members
  ACPI/PCI: Ignore _OSC negotiation result if pcie_ports_native is set.
  ACPI/PCI: Ignore _OSC DPC negotiation result if pcie_ports_dpc_native
is set.
  PCI/portdrv: Remove redundant pci_aer_available() check in DPC enable
logic
  PCI/DPC: Move AER/DPC dependency checks out of DPC driver

 drivers/acpi/pci_root.c   | 61 ++-
 drivers/pci/hotplug/pciehp_core.c |  2 +-
 drivers/pci/pci-acpi.c|  3 --
 drivers/pci/pcie/aer.c|  2 +-
 drivers/pci/pcie/dpc.c|  4 +-
 drivers/pci/pcie/portdrv.h|  2 -
 drivers/pci/pcie/portdrv_core.c   | 13 +++
 drivers/pci/probe.c   |  4 +-
 include/linux/pci.h   |  2 +
 9 files changed, 64 insertions(+), 29 deletions(-)

-- 
2.17.1



[PATCH v6 4/5] USB: PHY: JZ4770: Reformat the code to align it.

2020-07-24 Thread Zhou Yanjie
Reformat the code (add one level of indentation before the values),
to align the code in the macro definition section.

Tested-by: 周正 (Zhou Zheng) 
Co-developed-by: 漆鹏振 (Qi Pengzhen) 
Signed-off-by: 漆鹏振 (Qi Pengzhen) 
Signed-off-by: 周琰杰 (Zhou Yanjie) 
---

Notes:
v1->v2:
Add support for the JZ4780 SoC.

v2->v3:
No change.

v3->v4:
No change.

v4->v5:
No change.

v5->v6:
No change.

 drivers/usb/phy/phy-jz4770.c | 74 ++--
 1 file changed, 37 insertions(+), 37 deletions(-)

diff --git a/drivers/usb/phy/phy-jz4770.c b/drivers/usb/phy/phy-jz4770.c
index b1540e059a09..23d38cbc150e 100644
--- a/drivers/usb/phy/phy-jz4770.c
+++ b/drivers/usb/phy/phy-jz4770.c
@@ -15,46 +15,46 @@
 #include 
 
 /* OTGPHY register offsets */
-#define REG_USBPCR_OFFSET  0x00
-#define REG_USBRDT_OFFSET  0x04
-#define REG_USBVBFIL_OFFSET0x08
-#define REG_USBPCR1_OFFSET 0x0c
+#define REG_USBPCR_OFFSET  0x00
+#define REG_USBRDT_OFFSET  0x04
+#define REG_USBVBFIL_OFFSET0x08
+#define REG_USBPCR1_OFFSET 0x0c
 
 /* bits within the USBPCR register */
-#define USBPCR_USB_MODEBIT(31)
-#define USBPCR_AVLD_REGBIT(30)
-#define USBPCR_COMMONONN   BIT(25)
-#define USBPCR_VBUSVLDEXT  BIT(24)
-#define USBPCR_VBUSVLDEXTSEL   BIT(23)
-#define USBPCR_POR BIT(22)
-#define USBPCR_SIDDQ   BIT(21)
-#define USBPCR_OTG_DISABLE BIT(20)
-#define USBPCR_TXPREEMPHTUNE   BIT(6)
+#define USBPCR_USB_MODEBIT(31)
+#define USBPCR_AVLD_REGBIT(30)
+#define USBPCR_COMMONONN   BIT(25)
+#define USBPCR_VBUSVLDEXT  BIT(24)
+#define USBPCR_VBUSVLDEXTSEL   BIT(23)
+#define USBPCR_POR BIT(22)
+#define USBPCR_SIDDQ   BIT(21)
+#define USBPCR_OTG_DISABLE BIT(20)
+#define USBPCR_TXPREEMPHTUNE   BIT(6)
 
 #define USBPCR_IDPULLUP_LSB28
-#define USBPCR_IDPULLUP_MASK   GENMASK(29, USBPCR_IDPULLUP_LSB)
-#define USBPCR_IDPULLUP_ALWAYS (0x2 << USBPCR_IDPULLUP_LSB)
-#define USBPCR_IDPULLUP_SUSPEND(0x1 << USBPCR_IDPULLUP_LSB)
-#define USBPCR_IDPULLUP_OTG(0x0 << USBPCR_IDPULLUP_LSB)
+#define USBPCR_IDPULLUP_MASK   GENMASK(29, USBPCR_IDPULLUP_LSB)
+#define USBPCR_IDPULLUP_ALWAYS (0x2 << USBPCR_IDPULLUP_LSB)
+#define USBPCR_IDPULLUP_SUSPEND(0x1 << USBPCR_IDPULLUP_LSB)
+#define USBPCR_IDPULLUP_OTG(0x0 << USBPCR_IDPULLUP_LSB)
 
-#define USBPCR_COMPDISTUNE_LSB 17
-#define USBPCR_COMPDISTUNE_MASKGENMASK(19, USBPCR_COMPDISTUNE_LSB)
-#define USBPCR_COMPDISTUNE_DFT (0x4 << USBPCR_COMPDISTUNE_LSB)
+#define USBPCR_COMPDISTUNE_LSB 17
+#define USBPCR_COMPDISTUNE_MASKGENMASK(19, 
USBPCR_COMPDISTUNE_LSB)
+#define USBPCR_COMPDISTUNE_DFT (0x4 << USBPCR_COMPDISTUNE_LSB)
 
-#define USBPCR_OTGTUNE_LSB 14
-#define USBPCR_OTGTUNE_MASKGENMASK(16, USBPCR_OTGTUNE_LSB)
-#define USBPCR_OTGTUNE_DFT (0x4 << USBPCR_OTGTUNE_LSB)
+#define USBPCR_OTGTUNE_LSB 14
+#define USBPCR_OTGTUNE_MASKGENMASK(16, USBPCR_OTGTUNE_LSB)
+#define USBPCR_OTGTUNE_DFT (0x4 << USBPCR_OTGTUNE_LSB)
 
 #define USBPCR_SQRXTUNE_LSB11
-#define USBPCR_SQRXTUNE_MASK   GENMASK(13, USBPCR_SQRXTUNE_LSB)
+#define USBPCR_SQRXTUNE_MASK   GENMASK(13, USBPCR_SQRXTUNE_LSB)
 #define USBPCR_SQRXTUNE_DCR_20PCT  (0x7 << USBPCR_SQRXTUNE_LSB)
-#define USBPCR_SQRXTUNE_DFT(0x3 << USBPCR_SQRXTUNE_LSB)
+#define USBPCR_SQRXTUNE_DFT(0x3 << USBPCR_SQRXTUNE_LSB)
 
-#define USBPCR_TXFSLSTUNE_LSB  7
-#define USBPCR_TXFSLSTUNE_MASK GENMASK(10, USBPCR_TXFSLSTUNE_LSB)
+#define USBPCR_TXFSLSTUNE_LSB  7
+#define USBPCR_TXFSLSTUNE_MASK GENMASK(10, USBPCR_TXFSLSTUNE_LSB)
 #define USBPCR_TXFSLSTUNE_DCR_50PPT(0xf << USBPCR_TXFSLSTUNE_LSB)
 #define USBPCR_TXFSLSTUNE_DCR_25PPT(0x7 << USBPCR_TXFSLSTUNE_LSB)
-#define USBPCR_TXFSLSTUNE_DFT  (0x3 << USBPCR_TXFSLSTUNE_LSB)
+#define USBPCR_TXFSLSTUNE_DFT  (0x3 << USBPCR_TXFSLSTUNE_LSB)
 #define USBPCR_TXFSLSTUNE_INC_25PPT(0x1 << USBPCR_TXFSLSTUNE_LSB)
 #define USBPCR_TXFSLSTUNE_INC_50PPT(0x0 << USBPCR_TXFSLSTUNE_LSB)
 
@@ -63,21 +63,21 @@
 #define USBPCR_TXHSXVTUNE_DFT  (0x3 << USBPCR_TXHSXVTUNE_LSB)
 #define USBPCR_TXHSXVTUNE_DCR_15MV (0x1 << USBPCR_TXHSXVTUNE_LSB)
 
-#define USBPCR_TXRISETUNE_LSB  4
-#define USBPCR_TXRISETUNE_MASK GENMASK(5, USBPCR_TXRISETUNE_LSB)
-#define USBPCR_TXRISETUNE_DFT  (0x3 << USBPCR_TXRISETUNE_LSB)
+#define USBPCR_TXRISETUNE_LSB  4
+#define USBPCR_TXRISETUNE_MASK GENMASK(5, USBPCR_TXRISETUNE_LSB)
+#define USBPCR_TXRISETUNE_DFT  (0x3 << USBPCR_TXRISETUNE_LSB)
 
-#define 

[PATCH v6 3/5] USB: PHY: JZ4770: Add support for new Ingenic SoCs.

2020-07-24 Thread Zhou Yanjie
Add support for probing the phy-jz4770 driver on the JZ4780 SoC,
the X1000 SoC and the X1830 SoC from Ingenic.

Tested-by: 周正 (Zhou Zheng) 
Co-developed-by: 漆鹏振 (Qi Pengzhen) 
Signed-off-by: 漆鹏振 (Qi Pengzhen) 
Signed-off-by: 周琰杰 (Zhou Yanjie) 
---

Notes:
v1->v2:
Add bindings for the JZ4780 SoC.

v2->v3:
Use "of_device_get_match_data" instead "of_match_device"
to get version information.

v3->v4:
Fix typos.

v4->v5:
1.Modify the help message, make it more future-proof.
2.Drop the unnecessary comment about hardware reset.
3.Create 'soc_info' structures instead having ID_* as platform data.

v5->v6:
Fix the warning that appears during compilation.
Reported-by: kernel test robot 

 drivers/usb/phy/Kconfig  |   4 +-
 drivers/usb/phy/phy-jz4770.c | 206 ---
 2 files changed, 177 insertions(+), 33 deletions(-)

diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 4b3fa78995cf..ef4787cd3d37 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -185,11 +185,11 @@ config USB_ULPI_VIEWPORT
  controllers with a viewport register (e.g. Chipidea/ARC controllers).
 
 config JZ4770_PHY
-   tristate "Ingenic JZ4770 Transceiver Driver"
+   tristate "Ingenic SoCs Transceiver Driver"
depends on MIPS || COMPILE_TEST
select USB_PHY
help
  This driver provides PHY support for the USB controller found
- on the JZ4770 SoC from Ingenic.
+ on the JZ-series and X-series SoCs from Ingenic.
 
 endmenu
diff --git a/drivers/usb/phy/phy-jz4770.c b/drivers/usb/phy/phy-jz4770.c
index 00209d5469d3..b1540e059a09 100644
--- a/drivers/usb/phy/phy-jz4770.c
+++ b/drivers/usb/phy/phy-jz4770.c
@@ -1,7 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Ingenic JZ4770 USB PHY driver
+ * Ingenic SoCs USB PHY driver
  * Copyright (c) Paul Cercueil 
+ * Copyright (c) 漆鹏振 (Qi Pengzhen) 
+ * Copyright (c) 周琰杰 (Zhou Yanjie) 
  */
 
 #include 
@@ -12,12 +14,13 @@
 #include 
 #include 
 
+/* OTGPHY register offsets */
 #define REG_USBPCR_OFFSET  0x00
 #define REG_USBRDT_OFFSET  0x04
 #define REG_USBVBFIL_OFFSET0x08
 #define REG_USBPCR1_OFFSET 0x0c
 
-/* USBPCR */
+/* bits within the USBPCR register */
 #define USBPCR_USB_MODEBIT(31)
 #define USBPCR_AVLD_REGBIT(30)
 #define USBPCR_COMMONONN   BIT(25)
@@ -44,11 +47,21 @@
 
 #define USBPCR_SQRXTUNE_LSB11
 #define USBPCR_SQRXTUNE_MASK   GENMASK(13, USBPCR_SQRXTUNE_LSB)
+#define USBPCR_SQRXTUNE_DCR_20PCT  (0x7 << USBPCR_SQRXTUNE_LSB)
 #define USBPCR_SQRXTUNE_DFT(0x3 << USBPCR_SQRXTUNE_LSB)
 
 #define USBPCR_TXFSLSTUNE_LSB  7
 #define USBPCR_TXFSLSTUNE_MASK GENMASK(10, USBPCR_TXFSLSTUNE_LSB)
+#define USBPCR_TXFSLSTUNE_DCR_50PPT(0xf << USBPCR_TXFSLSTUNE_LSB)
+#define USBPCR_TXFSLSTUNE_DCR_25PPT(0x7 << USBPCR_TXFSLSTUNE_LSB)
 #define USBPCR_TXFSLSTUNE_DFT  (0x3 << USBPCR_TXFSLSTUNE_LSB)
+#define USBPCR_TXFSLSTUNE_INC_25PPT(0x1 << USBPCR_TXFSLSTUNE_LSB)
+#define USBPCR_TXFSLSTUNE_INC_50PPT(0x0 << USBPCR_TXFSLSTUNE_LSB)
+
+#define USBPCR_TXHSXVTUNE_LSB  4
+#define USBPCR_TXHSXVTUNE_MASK GENMASK(5, USBPCR_TXHSXVTUNE_LSB)
+#define USBPCR_TXHSXVTUNE_DFT  (0x3 << USBPCR_TXHSXVTUNE_LSB)
+#define USBPCR_TXHSXVTUNE_DCR_15MV (0x1 << USBPCR_TXHSXVTUNE_LSB)
 
 #define USBPCR_TXRISETUNE_LSB  4
 #define USBPCR_TXRISETUNE_MASK GENMASK(5, USBPCR_TXRISETUNE_LSB)
@@ -56,14 +69,40 @@
 
 #define USBPCR_TXVREFTUNE_LSB  0
 #define USBPCR_TXVREFTUNE_MASK GENMASK(3, USBPCR_TXVREFTUNE_LSB)
+#define USBPCR_TXVREFTUNE_INC_25PPT(0x7 << USBPCR_TXVREFTUNE_LSB)
 #define USBPCR_TXVREFTUNE_DFT  (0x5 << USBPCR_TXVREFTUNE_LSB)
 
-/* USBRDT */
+/* bits within the USBRDTR register */
+#define USBRDT_UTMI_RSTBIT(27)
+#define USBRDT_HB_MASK BIT(26)
 #define USBRDT_VBFIL_LD_EN BIT(25)
 #define USBRDT_IDDIG_ENBIT(24)
 #define USBRDT_IDDIG_REG   BIT(23)
+#define USBRDT_VBFIL_ENBIT(2)
+
+/* bits within the USBPCR1 register */
+#define USBPCR1_BVLD_REG   BIT(31)
+#define USBPCR1_DPPD   BIT(29)
+#define USBPCR1_DMPD   BIT(28)
+#define USBPCR1_USB_SELBIT(28)
+#define USBPCR1_WORD_IF_16BIT  BIT(19)
+
+enum ingenic_usb_phy_version {
+   ID_JZ4770,
+   ID_JZ4780,
+   ID_X1000,
+   ID_X1830,
+};
+
+struct ingenic_soc_info {
+   enum ingenic_usb_phy_version version;
+
+   void (*usb_phy_init)(struct usb_phy *phy);
+};
 
 struct jz4770_phy {
+   const struct ingenic_soc_info *soc_info;
+
struct usb_phy phy;
struct usb_otg otg;
struct device *dev;
@@ -82,12 +121,18 @@ static inline struct jz4770_phy *phy_to_jz4770_phy(struct 
usb_phy *phy)
return container_of(phy, struct 

[PATCH v6 0/5] Add USB PHY support for new Ingenic SoCs.

2020-07-24 Thread Zhou Yanjie
v5->v6:
1.Fix the warning that appears during compilation.
2.Used the generic PHY framework API to create the PHY,
  and move the driver to driver/phy/ingenic.

周琰杰 (Zhou Yanjie) (5):
  dt-bindings: USB: Add bindings for new Ingenic SoCs.
  USB: PHY: JZ4770: Unify code style and simplify code.
  USB: PHY: JZ4770: Add support for new Ingenic SoCs.
  USB: PHY: JZ4770: Reformat the code to align it.
  USB: PHY: JZ4770: Usethe generic PHY framework.

 .../bindings/usb/ingenic,jz4770-phy.yaml   |   6 +-
 drivers/phy/Kconfig|   1 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/ingenic/Kconfig|  12 +
 drivers/phy/ingenic/Makefile   |   2 +
 drivers/phy/ingenic/phy-ingenic-usb.c  | 403 +
 drivers/usb/phy/Kconfig|   8 -
 drivers/usb/phy/Makefile   |   1 -
 drivers/usb/phy/phy-jz4770.c   | 243 -
 9 files changed, 424 insertions(+), 253 deletions(-)
 create mode 100644 drivers/phy/ingenic/Kconfig
 create mode 100644 drivers/phy/ingenic/Makefile
 create mode 100644 drivers/phy/ingenic/phy-ingenic-usb.c
 delete mode 100644 drivers/usb/phy/phy-jz4770.c

-- 
2.11.0



[PATCH v6 1/5] dt-bindings: USB: Add bindings for new Ingenic SoCs.

2020-07-24 Thread Zhou Yanjie
Add the USB PHY bindings for the JZ4780 SoC, the X1000 SoC and
the X1830 SoC from Ingenic.

Tested-by: 周正 (Zhou Zheng) 
Signed-off-by: 周琰杰 (Zhou Yanjie) 
Acked-by: Rob Herring 
---

Notes:
v1->v2:
Add bindings for the JZ4780 SoC.

v2->v3:
No change.

v3->v4:
No change.

v4->v5:
No change.

v5->v6:
No change.

 Documentation/devicetree/bindings/usb/ingenic,jz4770-phy.yaml | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/ingenic,jz4770-phy.yaml 
b/Documentation/devicetree/bindings/usb/ingenic,jz4770-phy.yaml
index a81b0b1a2226..2d61166ea5cf 100644
--- a/Documentation/devicetree/bindings/usb/ingenic,jz4770-phy.yaml
+++ b/Documentation/devicetree/bindings/usb/ingenic,jz4770-phy.yaml
@@ -4,10 +4,11 @@
 $id: http://devicetree.org/schemas/usb/ingenic,jz4770-phy.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Ingenic JZ4770 USB PHY devicetree bindings
+title: Ingenic SoCs USB PHY devicetree bindings
 
 maintainers:
   - Paul Cercueil 
+  - 周琰杰 (Zhou Yanjie) 
 
 properties:
   $nodename:
@@ -16,6 +17,9 @@ properties:
   compatible:
 enum:
   - ingenic,jz4770-phy
+  - ingenic,jz4780-phy
+  - ingenic,x1000-phy
+  - ingenic,x1830-phy
 
   reg:
 maxItems: 1
-- 
2.11.0



[PATCH v6 2/5] USB: PHY: JZ4770: Unify code style and simplify code.

2020-07-24 Thread Zhou Yanjie
1.Modify the macro definition to unify "#define USBPCR_ n"
  into the "#define USBPCR_ (n << USBPCR__LSB)" style,
  so as to unify the code style in the "jz4770_phy_init()" and
  simplify the code.
2.Remove unused macro definitions to simplify the code.

Tested-by: 周正 (Zhou Zheng) 
Suggested-by: Paul Cercueil 
Signed-off-by: 周琰杰 (Zhou Yanjie) 
---

Notes:
v5:
New patch.

v5->v6:
No change.

 drivers/usb/phy/phy-jz4770.c | 34 +++---
 1 file changed, 11 insertions(+), 23 deletions(-)

diff --git a/drivers/usb/phy/phy-jz4770.c b/drivers/usb/phy/phy-jz4770.c
index 8f62dc2a90ff..00209d5469d3 100644
--- a/drivers/usb/phy/phy-jz4770.c
+++ b/drivers/usb/phy/phy-jz4770.c
@@ -20,8 +20,6 @@
 /* USBPCR */
 #define USBPCR_USB_MODEBIT(31)
 #define USBPCR_AVLD_REGBIT(30)
-#define USBPCR_INCRM   BIT(27)
-#define USBPCR_CLK12_ENBIT(26)
 #define USBPCR_COMMONONN   BIT(25)
 #define USBPCR_VBUSVLDEXT  BIT(24)
 #define USBPCR_VBUSVLDEXTSEL   BIT(23)
@@ -32,45 +30,39 @@
 
 #define USBPCR_IDPULLUP_LSB28
 #define USBPCR_IDPULLUP_MASK   GENMASK(29, USBPCR_IDPULLUP_LSB)
-#define USBPCR_IDPULLUP_ALWAYS (3 << USBPCR_IDPULLUP_LSB)
-#define USBPCR_IDPULLUP_SUSPEND(1 << USBPCR_IDPULLUP_LSB)
-#define USBPCR_IDPULLUP_OTG(0 << USBPCR_IDPULLUP_LSB)
+#define USBPCR_IDPULLUP_ALWAYS (0x2 << USBPCR_IDPULLUP_LSB)
+#define USBPCR_IDPULLUP_SUSPEND(0x1 << USBPCR_IDPULLUP_LSB)
+#define USBPCR_IDPULLUP_OTG(0x0 << USBPCR_IDPULLUP_LSB)
 
 #define USBPCR_COMPDISTUNE_LSB 17
 #define USBPCR_COMPDISTUNE_MASKGENMASK(19, USBPCR_COMPDISTUNE_LSB)
-#define USBPCR_COMPDISTUNE_DFT 4
+#define USBPCR_COMPDISTUNE_DFT (0x4 << USBPCR_COMPDISTUNE_LSB)
 
 #define USBPCR_OTGTUNE_LSB 14
 #define USBPCR_OTGTUNE_MASKGENMASK(16, USBPCR_OTGTUNE_LSB)
-#define USBPCR_OTGTUNE_DFT 4
+#define USBPCR_OTGTUNE_DFT (0x4 << USBPCR_OTGTUNE_LSB)
 
 #define USBPCR_SQRXTUNE_LSB11
 #define USBPCR_SQRXTUNE_MASK   GENMASK(13, USBPCR_SQRXTUNE_LSB)
-#define USBPCR_SQRXTUNE_DFT3
+#define USBPCR_SQRXTUNE_DFT(0x3 << USBPCR_SQRXTUNE_LSB)
 
 #define USBPCR_TXFSLSTUNE_LSB  7
 #define USBPCR_TXFSLSTUNE_MASK GENMASK(10, USBPCR_TXFSLSTUNE_LSB)
-#define USBPCR_TXFSLSTUNE_DFT  3
+#define USBPCR_TXFSLSTUNE_DFT  (0x3 << USBPCR_TXFSLSTUNE_LSB)
 
 #define USBPCR_TXRISETUNE_LSB  4
 #define USBPCR_TXRISETUNE_MASK GENMASK(5, USBPCR_TXRISETUNE_LSB)
-#define USBPCR_TXRISETUNE_DFT  3
+#define USBPCR_TXRISETUNE_DFT  (0x3 << USBPCR_TXRISETUNE_LSB)
 
 #define USBPCR_TXVREFTUNE_LSB  0
 #define USBPCR_TXVREFTUNE_MASK GENMASK(3, USBPCR_TXVREFTUNE_LSB)
-#define USBPCR_TXVREFTUNE_DFT  5
+#define USBPCR_TXVREFTUNE_DFT  (0x5 << USBPCR_TXVREFTUNE_LSB)
 
 /* USBRDT */
 #define USBRDT_VBFIL_LD_EN BIT(25)
 #define USBRDT_IDDIG_ENBIT(24)
 #define USBRDT_IDDIG_REG   BIT(23)
 
-#define USBRDT_USBRDT_LSB  0
-#define USBRDT_USBRDT_MASK GENMASK(22, USBRDT_USBRDT_LSB)
-
-/* USBPCR1 */
-#define USBPCR1_UHC_POWON  BIT(5)
-
 struct jz4770_phy {
struct usb_phy phy;
struct usb_otg otg;
@@ -136,12 +128,8 @@ static int jz4770_phy_init(struct usb_phy *phy)
}
 
reg = USBPCR_AVLD_REG | USBPCR_COMMONONN | USBPCR_IDPULLUP_ALWAYS |
-   (USBPCR_COMPDISTUNE_DFT << USBPCR_COMPDISTUNE_LSB) |
-   (USBPCR_OTGTUNE_DFT << USBPCR_OTGTUNE_LSB) |
-   (USBPCR_SQRXTUNE_DFT << USBPCR_SQRXTUNE_LSB) |
-   (USBPCR_TXFSLSTUNE_DFT << USBPCR_TXFSLSTUNE_LSB) |
-   (USBPCR_TXRISETUNE_DFT << USBPCR_TXRISETUNE_LSB) |
-   (USBPCR_TXVREFTUNE_DFT << USBPCR_TXVREFTUNE_LSB) |
+   USBPCR_COMPDISTUNE_DFT | USBPCR_OTGTUNE_DFT | 
USBPCR_SQRXTUNE_DFT |
+   USBPCR_TXFSLSTUNE_DFT | USBPCR_TXRISETUNE_DFT | 
USBPCR_TXVREFTUNE_DFT |
USBPCR_POR;
writel(reg, priv->base + REG_USBPCR_OFFSET);
 
-- 
2.11.0



Re: [v7, PATCH 6/7] drm/mediatek: add fifo_size into rdma private data

2020-07-24 Thread Chun-Kuang Hu
The primary thing of this patch is to get fifo size from device tree.
So you may modify title to show the primary thing.

Yongqiang Niu  於 2020年7月23日 週四 上午10:12寫道:
>
> the fifo size of rdma in mt8183 is different.
> rdma0 fifo size is 5k
> rdma1 fifo size is 2k

I would like the description to be "Get the fifo size from device tree
because each rdma in the same SoC may have different fifo size."

Regards,
Chun-Kuang.

>
> Signed-off-by: Yongqiang Niu 
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 19 ++-
>  1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c 
> b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index e04319f..794acc5 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -63,6 +63,7 @@ struct mtk_disp_rdma {
> struct mtk_ddp_comp ddp_comp;
> struct drm_crtc *crtc;
> const struct mtk_disp_rdma_data *data;
> +   u32 fifo_size;
>  };
>
>  static inline struct mtk_disp_rdma *comp_to_rdma(struct mtk_ddp_comp *comp)
> @@ -131,12 +132,18 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, 
> unsigned int width,
> unsigned int threshold;
> unsigned int reg;
> struct mtk_disp_rdma *rdma = comp_to_rdma(comp);
> +   u32 rdma_fifo_size;
>
> mtk_ddp_write_mask(cmdq_pkt, width, comp,
>DISP_REG_RDMA_SIZE_CON_0, 0xfff);
> mtk_ddp_write_mask(cmdq_pkt, height, comp,
>DISP_REG_RDMA_SIZE_CON_1, 0xf);
>
> +   if (rdma->fifo_size)
> +   rdma_fifo_size = rdma->fifo_size;
> +   else
> +   rdma_fifo_size = RDMA_FIFO_SIZE(rdma);
> +
> /*
>  * Enable FIFO underflow since DSI and DPI can't be blocked.
>  * Keep the FIFO pseudo size reset default of 8 KiB. Set the
> @@ -145,7 +152,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, 
> unsigned int width,
>  */
> threshold = width * height * vrefresh * 4 * 7 / 100;
> reg = RDMA_FIFO_UNDERFLOW_EN |
> - RDMA_FIFO_PSEUDO_SIZE(RDMA_FIFO_SIZE(rdma)) |
> + RDMA_FIFO_PSEUDO_SIZE(rdma_fifo_size) |
>   RDMA_OUTPUT_VALID_FIFO_THRESHOLD(threshold);
> mtk_ddp_write(cmdq_pkt, reg, comp, DISP_REG_RDMA_FIFO_CON);
>  }
> @@ -291,6 +298,16 @@ static int mtk_disp_rdma_probe(struct platform_device 
> *pdev)
> return comp_id;
> }
>
> +   if (of_find_property(dev->of_node, "mediatek,rdma_fifo_size", )) {
> +   ret = of_property_read_u32(dev->of_node,
> +  "mediatek,rdma_fifo_size",
> +  >fifo_size);
> +   if (ret) {
> +   dev_err(dev, "Failed to get rdma fifo size\n");
> +   return ret;
> +   }
> +   }
> +
> ret = mtk_ddp_comp_init(dev, dev->of_node, >ddp_comp, comp_id,
> _disp_rdma_funcs);
> if (ret) {
> --
> 1.8.1.1.dirty
> ___
> Linux-mediatek mailing list
> linux-media...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek


[PATCH 02/10] crypto: hisilicon/zip - unify naming style for functions and macros

2020-07-24 Thread Yang Shen
1.Add prefix 'HZIP' for some macros
2.Add prefix 'hisi_zip' for some functions

Signed-off-by: Yang Shen 
Reviewed-by: Zhou Wang 
---
 drivers/crypto/hisilicon/zip/zip_main.c | 35 +
 1 file changed, 18 insertions(+), 17 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_main.c 
b/drivers/crypto/hisilicon/zip/zip_main.c
index 445db04..058f744 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -29,18 +29,18 @@
 #define DECOMP3_ENABLE BIT(5)
 #define DECOMP4_ENABLE BIT(6)
 #define DECOMP5_ENABLE BIT(7)
-#define ALL_COMP_DECOMP_EN (COMP0_ENABLE | COMP1_ENABLE |  \
+#define HZIP_ALL_COMP_DECOMP_EN(COMP0_ENABLE | COMP1_ENABLE | \
 DECOMP0_ENABLE | DECOMP1_ENABLE | \
 DECOMP2_ENABLE | DECOMP3_ENABLE | \
 DECOMP4_ENABLE | DECOMP5_ENABLE)
-#define DECOMP_CHECK_ENABLEBIT(16)
+#define HZIP_DECOMP_CHECK_ENABLE   BIT(16)
 #define HZIP_FSM_MAX_CNT   0x301008

 #define HZIP_PORT_ARCA_CHE_0   0x301040
 #define HZIP_PORT_ARCA_CHE_1   0x301044
 #define HZIP_PORT_AWCA_CHE_0   0x301060
 #define HZIP_PORT_AWCA_CHE_1   0x301064
-#define CACHE_ALL_EN   0x
+#define HZIP_CACHE_ALL_EN  0x

 #define HZIP_BD_RUSER_32_630x301110
 #define HZIP_SGL_RUSER_32_63   0x30111c
@@ -82,7 +82,7 @@
 #define HZIP_PF_DEF_Q_BASE 0

 #define HZIP_SOFT_CTRL_CNT_CLR_CE  0x301000
-#define SOFT_CTRL_CNT_CLR_CE_BIT   BIT(0)
+#define HZIP_SOFT_CTRL_CNT_CLR_CE_BIT  BIT(0)
 #define HZIP_SOFT_CTRL_ZIP_CONTROL 0x30100C
 #define HZIP_AXI_SHUTDOWN_ENABLE   BIT(14)
 #define HZIP_WR_PORT   BIT(11)
@@ -264,10 +264,10 @@ static int hisi_zip_set_user_domain_and_cache(struct 
hisi_qm *qm)
writel(PEH_AXUSER_CFG_ENABLE, base + QM_PEH_AXUSER_CFG_ENABLE);

/* cache */
-   writel(CACHE_ALL_EN, base + HZIP_PORT_ARCA_CHE_0);
-   writel(CACHE_ALL_EN, base + HZIP_PORT_ARCA_CHE_1);
-   writel(CACHE_ALL_EN, base + HZIP_PORT_AWCA_CHE_0);
-   writel(CACHE_ALL_EN, base + HZIP_PORT_AWCA_CHE_1);
+   writel(HZIP_CACHE_ALL_EN, base + HZIP_PORT_ARCA_CHE_0);
+   writel(HZIP_CACHE_ALL_EN, base + HZIP_PORT_ARCA_CHE_1);
+   writel(HZIP_CACHE_ALL_EN, base + HZIP_PORT_AWCA_CHE_0);
+   writel(HZIP_CACHE_ALL_EN, base + HZIP_PORT_AWCA_CHE_1);

/* user domain configurations */
writel(AXUSER_BASE, base + HZIP_BD_RUSER_32_63);
@@ -283,7 +283,7 @@ static int hisi_zip_set_user_domain_and_cache(struct 
hisi_qm *qm)
}

/* let's open all compression/decompression cores */
-   writel(DECOMP_CHECK_ENABLE | ALL_COMP_DECOMP_EN,
+   writel(HZIP_DECOMP_CHECK_ENABLE | HZIP_ALL_COMP_DECOMP_EN,
   base + HZIP_CLOCK_GATE_CTRL);

/* enable sqc writeback */
@@ -390,7 +390,7 @@ static u32 clear_enable_read(struct ctrl_debug_file *file)
struct hisi_qm *qm = file_to_qm(file);

return readl(qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE) &
-  SOFT_CTRL_CNT_CLR_CE_BIT;
+HZIP_SOFT_CTRL_CNT_CLR_CE_BIT;
 }

 static int clear_enable_write(struct ctrl_debug_file *file, u32 val)
@@ -402,14 +402,14 @@ static int clear_enable_write(struct ctrl_debug_file 
*file, u32 val)
return -EINVAL;

tmp = (readl(qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE) &
-  ~SOFT_CTRL_CNT_CLR_CE_BIT) | val;
+  ~HZIP_SOFT_CTRL_CNT_CLR_CE_BIT) | val;
writel(tmp, qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE);

return  0;
 }

-static ssize_t ctrl_debug_read(struct file *filp, char __user *buf,
-  size_t count, loff_t *pos)
+static ssize_t hisi_zip_ctrl_debug_read(struct file *filp, char __user *buf,
+   size_t count, loff_t *pos)
 {
struct ctrl_debug_file *file = filp->private_data;
char tbuf[HZIP_BUF_SIZE];
@@ -433,8 +433,9 @@ static ssize_t ctrl_debug_read(struct file *filp, char 
__user *buf,
return simple_read_from_buffer(buf, count, pos, tbuf, ret);
 }

-static ssize_t ctrl_debug_write(struct file *filp, const char __user *buf,
-   size_t count, loff_t *pos)
+static ssize_t hisi_zip_ctrl_debug_write(struct file *filp,
+const char __user *buf,
+size_t count, loff_t *pos)
 {
struct ctrl_debug_file *file = filp->private_data;
char tbuf[HZIP_BUF_SIZE];
@@ -483,8 +484,8 @@ static ssize_t ctrl_debug_write(struct file *filp, const 
char __user *buf,
 static const struct file_operations ctrl_debug_fops = {
.owner = THIS_MODULE,
.open = simple_open,
-   .read = ctrl_debug_read,
-  

[PATCH 08/10] crypto: hisilicon/zip - move some private macros from 'zip.h' to 'zip_crypto.c'

2020-07-24 Thread Yang Shen
Some macros which are defined in 'zip.h' are related to the struct
'hisi_zip_sqe' and are only used in 'zip_crypto.c'. So move them from
'zip.h' to 'zip_crypto.c'.

Signed-off-by: Yang Shen 
Reviewed-by: Zhou Wang 
---
 drivers/crypto/hisilicon/zip/zip.h| 14 --
 drivers/crypto/hisilicon/zip/zip_crypto.c | 14 ++
 2 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip.h 
b/drivers/crypto/hisilicon/zip/zip.h
index 4b3aae8..92397f9 100644
--- a/drivers/crypto/hisilicon/zip/zip.h
+++ b/drivers/crypto/hisilicon/zip/zip.h
@@ -9,20 +9,6 @@
 #include 
 #include "../qm.h"

-/* hisi_zip_sqe dw3 */
-#define HZIP_BD_STATUS_M   GENMASK(7, 0)
-/* hisi_zip_sqe dw7 */
-#define HZIP_IN_SGE_DATA_OFFSET_M  GENMASK(23, 0)
-/* hisi_zip_sqe dw8 */
-#define HZIP_OUT_SGE_DATA_OFFSET_M GENMASK(23, 0)
-/* hisi_zip_sqe dw9 */
-#define HZIP_REQ_TYPE_MGENMASK(7, 0)
-#define HZIP_ALG_TYPE_ZLIB 0x02
-#define HZIP_ALG_TYPE_GZIP 0x03
-#define HZIP_BUF_TYPE_MGENMASK(11, 8)
-#define HZIP_PBUFFER   0x0
-#define HZIP_SGL   0x1
-
 enum hisi_zip_error_type {
/* negative compression */
HZIP_NC_ERR = 0x0d,
diff --git a/drivers/crypto/hisilicon/zip/zip_crypto.c 
b/drivers/crypto/hisilicon/zip/zip_crypto.c
index fdc5bd3..7757e33 100644
--- a/drivers/crypto/hisilicon/zip/zip_crypto.c
+++ b/drivers/crypto/hisilicon/zip/zip_crypto.c
@@ -6,6 +6,20 @@
 #include 
 #include "zip.h"

+/* hisi_zip_sqe dw3 */
+#define HZIP_BD_STATUS_M   GENMASK(7, 0)
+/* hisi_zip_sqe dw7 */
+#define HZIP_IN_SGE_DATA_OFFSET_M  GENMASK(23, 0)
+/* hisi_zip_sqe dw8 */
+#define HZIP_OUT_SGE_DATA_OFFSET_M GENMASK(23, 0)
+/* hisi_zip_sqe dw9 */
+#define HZIP_REQ_TYPE_MGENMASK(7, 0)
+#define HZIP_ALG_TYPE_ZLIB 0x02
+#define HZIP_ALG_TYPE_GZIP 0x03
+#define HZIP_BUF_TYPE_MGENMASK(11, 8)
+#define HZIP_PBUFFER   0x0
+#define HZIP_SGL   0x1
+
 #define HZIP_ZLIB_HEAD_SIZE2
 #define HZIP_GZIP_HEAD_SIZE10

--
2.7.4



[PATCH 03/10] crypto: hisilicon/zip - modify debugfs interface parameters

2020-07-24 Thread Yang Shen
From: Shukun Tan 

Update debugfs interface parameters

Signed-off-by: Shukun Tan 
Signed-off-by: Yang Shen 
Reviewed-by: Zhou Wang 
---
 drivers/crypto/hisilicon/zip/zip_main.c | 55 ++---
 1 file changed, 24 insertions(+), 31 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_main.c 
b/drivers/crypto/hisilicon/zip/zip_main.c
index 058f744..df1a16f 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -156,7 +156,6 @@ struct ctrl_debug_file {
  */
 struct hisi_zip_ctrl {
struct hisi_zip *hisi_zip;
-   struct dentry *debug_root;
struct ctrl_debug_file files[HZIP_DEBUG_FILE_NUM];
 };

@@ -509,10 +508,8 @@ static int zip_debugfs_atomic64_get(void *data, u64 *val)
 DEFINE_DEBUGFS_ATTRIBUTE(zip_atomic64_ops, zip_debugfs_atomic64_get,
 zip_debugfs_atomic64_set, "%llu\n");

-static int hisi_zip_core_debug_init(struct hisi_zip_ctrl *ctrl)
+static int hisi_zip_core_debug_init(struct hisi_qm *qm)
 {
-   struct hisi_zip *hisi_zip = ctrl->hisi_zip;
-   struct hisi_qm *qm = _zip->qm;
struct device *dev = >pdev->dev;
struct debugfs_regset32 *regset;
struct dentry *tmp_d;
@@ -533,7 +530,7 @@ static int hisi_zip_core_debug_init(struct hisi_zip_ctrl 
*ctrl)
regset->nregs = ARRAY_SIZE(hzip_dfx_regs);
regset->base = qm->io_base + core_offsets[i];

-   tmp_d = debugfs_create_dir(buf, ctrl->debug_root);
+   tmp_d = debugfs_create_dir(buf, qm->debug.debug_root);
debugfs_create_regset32("regs", 0444, tmp_d, regset);
}

@@ -552,33 +549,32 @@ static void hisi_zip_dfx_debug_init(struct hisi_qm *qm)
for (i = 0; i < ARRAY_SIZE(zip_dfx_files); i++) {
data = (atomic64_t *)((uintptr_t)dfx + zip_dfx_files[i].offset);
debugfs_create_file(zip_dfx_files[i].name,
-   0644,
-   tmp_dir,
-   data,
-   _atomic64_ops);
+   0644, tmp_dir, data,
+   _atomic64_ops);
}
 }

-static int hisi_zip_ctrl_debug_init(struct hisi_zip_ctrl *ctrl)
+static int hisi_zip_ctrl_debug_init(struct hisi_qm *qm)
 {
+   struct hisi_zip *zip = container_of(qm, struct hisi_zip, qm);
int i;

for (i = HZIP_CURRENT_QM; i < HZIP_DEBUG_FILE_NUM; i++) {
-   spin_lock_init(>files[i].lock);
-   ctrl->files[i].ctrl = ctrl;
-   ctrl->files[i].index = i;
+   spin_lock_init(>ctrl->files[i].lock);
+   zip->ctrl->files[i].ctrl = zip->ctrl;
+   zip->ctrl->files[i].index = i;

debugfs_create_file(ctrl_debug_file_name[i], 0600,
-   ctrl->debug_root, ctrl->files + i,
+   qm->debug.debug_root,
+   zip->ctrl->files + i,
_debug_fops);
}

-   return hisi_zip_core_debug_init(ctrl);
+   return hisi_zip_core_debug_init(qm);
 }

-static int hisi_zip_debugfs_init(struct hisi_zip *hisi_zip)
+static int hisi_zip_debugfs_init(struct hisi_qm *qm)
 {
-   struct hisi_qm *qm = _zip->qm;
struct device *dev = >pdev->dev;
struct dentry *dev_d;
int ret;
@@ -593,8 +589,7 @@ static int hisi_zip_debugfs_init(struct hisi_zip *hisi_zip)
goto failed_to_create;

if (qm->fun_type == QM_HW_PF) {
-   hisi_zip->ctrl->debug_root = dev_d;
-   ret = hisi_zip_ctrl_debug_init(hisi_zip->ctrl);
+   ret = hisi_zip_ctrl_debug_init(qm);
if (ret)
goto failed_to_create;
}
@@ -608,10 +603,8 @@ static int hisi_zip_debugfs_init(struct hisi_zip *hisi_zip)
return ret;
 }

-static void hisi_zip_debug_regs_clear(struct hisi_zip *hisi_zip)
+static void hisi_zip_debug_regs_clear(struct hisi_qm *qm)
 {
-   struct hisi_qm *qm = _zip->qm;
-
writel(0x0, qm->io_base + QM_DFX_MB_CNT_VF);
writel(0x0, qm->io_base + QM_DFX_DB_CNT_VF);
writel(0x0, qm->io_base + HZIP_SOFT_CTRL_CNT_CLR_CE);
@@ -619,14 +612,14 @@ static void hisi_zip_debug_regs_clear(struct hisi_zip 
*hisi_zip)
hisi_qm_debug_regs_clear(qm);
 }

-static void hisi_zip_debugfs_exit(struct hisi_zip *hisi_zip)
+static void hisi_zip_debugfs_exit(struct hisi_qm *qm)
 {
-   struct hisi_qm *qm = _zip->qm;
-
debugfs_remove_recursive(qm->debug.debug_root);

-   if (qm->fun_type == QM_HW_PF)
-   hisi_zip_debug_regs_clear(hisi_zip);
+   if (qm->fun_type == QM_HW_PF) {
+   hisi_zip_debug_regs_clear(qm);
+   qm->debug.curr_qm_qp_num = 0;
+   }
 }

 static void hisi_zip_log_hw_error(struct hisi_qm *qm, u32 err_sts)
@@ -733,7 +726,7 @@ static int hisi_zip_pf_probe_init(struct hisi_zip 

[PATCH 05/10] crypto: hisilicon/zip - use a enum parameter instead of some macros

2020-07-24 Thread Yang Shen
Macros 'QPC_COMP', 'QPC_DECOMP' and 'HZIP_CTX_Q_NUM' are relative and
incremental. So, use an enum instead.

Signed-off-by: Yang Shen 
Reviewed-by: Zhou Wang 
---
 drivers/crypto/hisilicon/zip/zip_crypto.c | 23 +--
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_crypto.c 
b/drivers/crypto/hisilicon/zip/zip_crypto.c
index aba1600..c2ea849 100644
--- a/drivers/crypto/hisilicon/zip/zip_crypto.c
+++ b/drivers/crypto/hisilicon/zip/zip_crypto.c
@@ -19,7 +19,6 @@
 #define GZIP_HEAD_FEXTRA_XLEN  2
 #define GZIP_HEAD_FHCRC_SIZE   2

-#define HZIP_CTX_Q_NUM 2
 #define HZIP_GZIP_HEAD_BUF 256
 #define HZIP_ALG_PRIORITY  300
 #define HZIP_SGL_SGE_NR10
@@ -32,6 +31,12 @@ enum hisi_zip_alg_type {
HZIP_ALG_TYPE_DECOMP = 1,
 };

+enum {
+   HZIP_QPC_COMP,
+   HZIP_QPC_DECOMP,
+   HZIP_CTX_Q_NUM
+};
+
 #define COMP_NAME_TO_TYPE(alg_name)\
(!strcmp((alg_name), "zlib-deflate") ? HZIP_ALG_TYPE_ZLIB : \
 !strcmp((alg_name), "gzip") ? HZIP_ALG_TYPE_GZIP : 0)  \
@@ -71,8 +76,6 @@ struct hisi_zip_qp_ctx {
 };

 struct hisi_zip_ctx {
-#define QPC_COMP   0
-#define QPC_DECOMP 1
struct hisi_zip_qp_ctx qp_ctx[HZIP_CTX_Q_NUM];
 };

@@ -264,11 +267,11 @@ static int hisi_zip_create_req_q(struct hisi_zip_ctx *ctx)
return 0;

 err_free_loop1:
-   kfree(ctx->qp_ctx[QPC_DECOMP].req_q.req_bitmap);
+   kfree(ctx->qp_ctx[HZIP_QPC_DECOMP].req_q.req_bitmap);
 err_free_loop0:
-   kfree(ctx->qp_ctx[QPC_COMP].req_q.q);
+   kfree(ctx->qp_ctx[HZIP_QPC_COMP].req_q.q);
 err_free_bitmap:
-   kfree(ctx->qp_ctx[QPC_COMP].req_q.req_bitmap);
+   kfree(ctx->qp_ctx[HZIP_QPC_COMP].req_q.req_bitmap);
return ret;
 }

@@ -303,8 +306,8 @@ static int hisi_zip_create_sgl_pool(struct hisi_zip_ctx 
*ctx)
return 0;

 err_free_sgl_pool0:
-   hisi_acc_free_sgl_pool(>qp_ctx[QPC_COMP].qp->qm->pdev->dev,
-  ctx->qp_ctx[QPC_COMP].sgl_pool);
+   hisi_acc_free_sgl_pool(>qp_ctx[HZIP_QPC_COMP].qp->qm->pdev->dev,
+  ctx->qp_ctx[HZIP_QPC_COMP].sgl_pool);
return -ENOMEM;
 }

@@ -539,7 +542,7 @@ static int hisi_zip_do_work(struct hisi_zip_req *req,
 static int hisi_zip_acompress(struct acomp_req *acomp_req)
 {
struct hisi_zip_ctx *ctx = crypto_tfm_ctx(acomp_req->base.tfm);
-   struct hisi_zip_qp_ctx *qp_ctx = >qp_ctx[QPC_COMP];
+   struct hisi_zip_qp_ctx *qp_ctx = >qp_ctx[HZIP_QPC_COMP];
struct hisi_zip_req *req;
int head_size;
int ret;
@@ -563,7 +566,7 @@ static int hisi_zip_acompress(struct acomp_req *acomp_req)
 static int hisi_zip_adecompress(struct acomp_req *acomp_req)
 {
struct hisi_zip_ctx *ctx = crypto_tfm_ctx(acomp_req->base.tfm);
-   struct hisi_zip_qp_ctx *qp_ctx = >qp_ctx[QPC_DECOMP];
+   struct hisi_zip_qp_ctx *qp_ctx = >qp_ctx[HZIP_QPC_DECOMP];
struct hisi_zip_req *req;
size_t head_size;
int ret;
--
2.7.4



[PATCH 01/10] crypto: hisilicon/zip - remove some useless parameters

2020-07-24 Thread Yang Shen
1.Remove the macro 'HZIP_VF_NUM'.
2.Remove 'list' of the struct 'hisi_zip'

Signed-off-by: Yang Shen 
Reviewed-by: Zhou Wang 
---
 drivers/crypto/hisilicon/zip/zip.h  | 1 -
 drivers/crypto/hisilicon/zip/zip_main.c | 1 -
 2 files changed, 2 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip.h 
b/drivers/crypto/hisilicon/zip/zip.h
index 4484be1..4b3aae8 100644
--- a/drivers/crypto/hisilicon/zip/zip.h
+++ b/drivers/crypto/hisilicon/zip/zip.h
@@ -39,7 +39,6 @@ struct hisi_zip_ctrl;

 struct hisi_zip {
struct hisi_qm qm;
-   struct list_head list;
struct hisi_zip_ctrl *ctrl;
struct hisi_zip_dfx dfx;
 };
diff --git a/drivers/crypto/hisilicon/zip/zip_main.c 
b/drivers/crypto/hisilicon/zip/zip_main.c
index 7e86b0f..445db04 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -17,7 +17,6 @@
 #define PCI_DEVICE_ID_ZIP_PF   0xa250
 #define PCI_DEVICE_ID_ZIP_VF   0xa251

-#define HZIP_VF_NUM63
 #define HZIP_QUEUE_NUM_V1  4096
 #define HZIP_QUEUE_NUM_V2  1024

--
2.7.4



[PATCH 06/10] crypto: hisilicon/zip - add print for error branch

2020-07-24 Thread Yang Shen
Add print for some error branches.

Signed-off-by: Yang Shen 
Reviewed-by: Zhou Wang 
---
 drivers/crypto/hisilicon/zip/zip_crypto.c | 68 +++
 drivers/crypto/hisilicon/zip/zip_main.c   |  8 ++--
 2 files changed, 56 insertions(+), 20 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_crypto.c 
b/drivers/crypto/hisilicon/zip/zip_crypto.c
index c2ea849..7aa8a55 100644
--- a/drivers/crypto/hisilicon/zip/zip_crypto.c
+++ b/drivers/crypto/hisilicon/zip/zip_crypto.c
@@ -146,7 +146,7 @@ static int hisi_zip_start_qp(struct hisi_qp *qp, struct 
hisi_zip_qp_ctx *ctx,

ret = hisi_qm_start_qp(qp, 0);
if (ret < 0) {
-   dev_err(dev, "start qp failed!\n");
+   dev_err(dev, "Start qp failed (%d)!\n", ret);
return ret;
}

@@ -169,7 +169,7 @@ static int hisi_zip_ctx_init(struct hisi_zip_ctx 
*hisi_zip_ctx, u8 req_type, int

ret = zip_create_qps(qps, HZIP_CTX_Q_NUM, node);
if (ret) {
-   pr_err("Can not create zip qps!\n");
+   pr_err("Can not create zip qps (%d)!\n", ret);
return -ENODEV;
}

@@ -380,19 +380,28 @@ static int hisi_zip_acomp_init(struct crypto_acomp *tfm)
 {
const char *alg_name = crypto_tfm_alg_name(>base);
struct hisi_zip_ctx *ctx = crypto_tfm_ctx(>base);
+   struct device *dev;
int ret;

ret = hisi_zip_ctx_init(ctx, COMP_NAME_TO_TYPE(alg_name), 
tfm->base.node);
-   if (ret)
+   if (ret) {
+   pr_err("Init ctx failed (%d)!\n", ret);
return ret;
+   }
+
+   dev = >qp_ctx[0].qp->qm->pdev->dev;

ret = hisi_zip_create_req_q(ctx);
-   if (ret)
+   if (ret) {
+   dev_err(dev, "Create request queue failed (%d)!\n", ret);
goto err_ctx_exit;
+   }

ret = hisi_zip_create_sgl_pool(ctx);
-   if (ret)
+   if (ret) {
+   dev_err(dev, "Create sgl pool failed (%d)!\n", ret);
goto err_release_req_q;
+   }

hisi_zip_set_acomp_cb(ctx, hisi_zip_acomp_cb);

@@ -422,8 +431,10 @@ static int add_comp_head(struct scatterlist *dst, u8 
req_type)
int ret;

ret = sg_copy_from_buffer(dst, sg_nents(dst), head, head_size);
-   if (ret != head_size)
+   if (ret != head_size) {
+   pr_err("The head size of buffer is wrong (%d)!\n", ret);
return -ENOMEM;
+   }

return head_size;
 }
@@ -445,7 +456,7 @@ static size_t get_comp_head_size(struct scatterlist *src, 
u8 req_type)
case HZIP_ALG_TYPE_GZIP:
return get_gzip_head_size(src);
default:
-   pr_err("request type does not support!\n");
+   pr_err("Request type does not support!\n");
return -EINVAL;
}
 }
@@ -464,7 +475,7 @@ static struct hisi_zip_req *hisi_zip_create_req(struct 
acomp_req *req,
req_id = find_first_zero_bit(req_q->req_bitmap, req_q->size);
if (req_id >= req_q->size) {
write_unlock(_q->req_lock);
-   dev_dbg(_ctx->qp->qm->pdev->dev, "req cache is full!\n");
+   dev_dbg(_ctx->qp->qm->pdev->dev, "Req cache is full!\n");
return ERR_PTR(-EBUSY);
}
set_bit(req_id, req_q->req_bitmap);
@@ -504,14 +515,19 @@ static int hisi_zip_do_work(struct hisi_zip_req *req,

req->hw_src = hisi_acc_sg_buf_map_to_hw_sgl(dev, a_req->src, pool,
req->req_id << 1, );
-   if (IS_ERR(req->hw_src))
+   if (IS_ERR(req->hw_src)) {
+   dev_err(dev, "The src map to hw SGL failed (%ld)!\n",
+   PTR_ERR(req->hw_src));
return PTR_ERR(req->hw_src);
+   }
req->dma_src = input;

req->hw_dst = hisi_acc_sg_buf_map_to_hw_sgl(dev, a_req->dst, pool,
(req->req_id << 1) + 1,
);
if (IS_ERR(req->hw_dst)) {
+   dev_err(dev, "The dst map to hw SGL failed (%ld)!\n",
+   PTR_ERR(req->hw_dst));
ret = PTR_ERR(req->hw_dst);
goto err_unmap_input;
}
@@ -527,6 +543,7 @@ static int hisi_zip_do_work(struct hisi_zip_req *req,
ret = hisi_qp_send(qp, _sqe);
if (ret < 0) {
atomic64_inc(>send_busy_cnt);
+   dev_dbg_ratelimited(dev, "Send task message failed!\n");
goto err_unmap_output;
}

@@ -543,22 +560,32 @@ static int hisi_zip_acompress(struct acomp_req *acomp_req)
 {
struct hisi_zip_ctx *ctx = crypto_tfm_ctx(acomp_req->base.tfm);
struct hisi_zip_qp_ctx *qp_ctx = >qp_ctx[HZIP_QPC_COMP];
+   struct device *dev = _ctx->qp->qm->pdev->dev;
struct hisi_zip_req *req;
int head_size;
int ret;

/* let's output compression head now */

[PATCH 00/10] crypto: hisilicon/zip - misc clean up

2020-07-24 Thread Yang Shen
This patchset make some clean up:
patch 1:remove useless parameters
patch 4:replace 'sprintf' with 'scnprintf'
patch 7:fix static check warning
and the rest patch fix some coding style

This patchset depends on:
https://patchwork.kernel.org/cover/11680181/

Shukun Tan (1):
  crypto: hisilicon/zip - modify debugfs interface parameters

Yang Shen (9):
  crypto: hisilicon/zip - remove some useless parameters
  crypto: hisilicon/zip - unify naming style for functions and macros
  crypto: hisilicon/zip - replace 'sprintf' with 'scnprintf'
  crypto: hisilicon/zip - use a enum parameter instead of some macros
  crypto: hisilicon/zip - add print for error branch
  crypto: hisilicon/zip - fix static check warning
  crypto: hisilicon/zip - move some private macros from 'zip.h' to
'zip_crypto.c'
  crypto: hisilicon/zip - supplement some comments
  crypto: hisilicon/zip - fix some coding styles

 drivers/crypto/hisilicon/zip/zip.h|  15 
 drivers/crypto/hisilicon/zip/zip_crypto.c | 126 -
 drivers/crypto/hisilicon/zip/zip_main.c   | 130 ++
 3 files changed, 148 insertions(+), 123 deletions(-)

--
2.7.4



[PATCH 10/10] crypto: hisilicon/zip - fix some coding styles

2020-07-24 Thread Yang Shen
1.Unified alignment styles
2.Remove unnecessary goto branch
3.Remove address printf

Signed-off-by: Yang Shen 
Reviewed-by: Zhou Wang 
---
 drivers/crypto/hisilicon/zip/zip_crypto.c | 13 ++---
 drivers/crypto/hisilicon/zip/zip_main.c   | 16 
 2 files changed, 10 insertions(+), 19 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_crypto.c 
b/drivers/crypto/hisilicon/zip/zip_crypto.c
index 7757e33..10b7adb 100644
--- a/drivers/crypto/hisilicon/zip/zip_crypto.c
+++ b/drivers/crypto/hisilicon/zip/zip_crypto.c
@@ -38,8 +38,10 @@
 #define HZIP_SGL_SGE_NR10

 static const u8 zlib_head[HZIP_ZLIB_HEAD_SIZE] = {0x78, 0x9c};
-static const u8 gzip_head[HZIP_GZIP_HEAD_SIZE] = {0x1f, 0x8b, 0x08, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x03};
+static const u8 gzip_head[HZIP_GZIP_HEAD_SIZE] = {
+   0x1f, 0x8b, 0x08, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x03
+};
+
 enum hisi_zip_alg_type {
HZIP_ALG_TYPE_COMP = 0,
HZIP_ALG_TYPE_DECOMP = 1,
@@ -359,7 +361,6 @@ static void hisi_zip_acomp_cb(struct hisi_qp *qp, void 
*data)

atomic64_inc(>recv_cnt);
status = sqe->dw3 & HZIP_BD_STATUS_M;
-
if (status != 0 && status != HZIP_NC_ERR) {
dev_err(dev, "%scompress fail in qp%u: %u, output: %u\n",
(qp->alg_type == 0) ? "" : "de", qp->qp_id, status,
@@ -520,8 +521,7 @@ static int hisi_zip_do_work(struct hisi_zip_req *req,
struct hisi_acc_sgl_pool *pool = qp_ctx->sgl_pool;
struct hisi_zip_dfx *dfx = _ctx->zip_dev->dfx;
struct hisi_zip_sqe zip_sqe;
-   dma_addr_t input;
-   dma_addr_t output;
+   dma_addr_t input, output;
int ret;

if (!a_req->src || !a_req->slen || !a_req->dst || !a_req->dlen)
@@ -540,9 +540,8 @@ static int hisi_zip_do_work(struct hisi_zip_req *req,
(req->req_id << 1) + 1,
);
if (IS_ERR(req->hw_dst)) {
-   dev_err(dev, "The dst map to hw SGL failed (%ld)!\n",
-   PTR_ERR(req->hw_dst));
ret = PTR_ERR(req->hw_dst);
+   dev_err(dev, "The dst map to hw SGL failed (%d)!\n", ret);
goto err_unmap_input;
}
req->dma_dst = output;
diff --git a/drivers/crypto/hisilicon/zip/zip_main.c 
b/drivers/crypto/hisilicon/zip/zip_main.c
index 49fad18..8bbae28 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -258,6 +258,7 @@ static int hisi_zip_set_user_domain_and_cache(struct 
hisi_qm *qm)
/* qm cache */
writel(AXI_M_CFG, base + QM_AXI_M_CFG);
writel(AXI_M_CFG_ENABLE, base + QM_AXI_M_CFG_ENABLE);
+
/* disable FLR triggered by BME(bus master enable) */
writel(PEH_AXUSER_CFG, base + QM_PEH_AXUSER_CFG);
writel(PEH_AXUSER_CFG_ENABLE, base + QM_PEH_AXUSER_CFG_ENABLE);
@@ -311,7 +312,7 @@ static void hisi_zip_hw_error_enable(struct hisi_qm *qm)
writel(0x1, qm->io_base + HZIP_CORE_INT_RAS_CE_ENB);
writel(0x0, qm->io_base + HZIP_CORE_INT_RAS_FE_ENB);
writel(HZIP_CORE_INT_RAS_NFE_ENABLE,
-   qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB);
+  qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB);

/* enable ZIP hw error interrupts */
writel(0, qm->io_base + HZIP_CORE_INT_MASK_REG);
@@ -487,7 +488,6 @@ static const struct file_operations ctrl_debug_fops = {
.write = hisi_zip_ctrl_debug_write,
 };

-
 static int zip_debugfs_atomic64_set(void *data, u64 val)
 {
if (val)
@@ -634,7 +634,7 @@ static void hisi_zip_log_hw_error(struct hisi_qm *qm, u32 
err_sts)
while (err->msg) {
if (err->int_msk & err_sts) {
dev_err(dev, "%s [error status=0x%x] found\n",
-err->msg, err->int_msk);
+   err->msg, err->int_msk);

if (err->int_msk & HZIP_CORE_INT_STATUS_M_ECC) {
err_val = readl(qm->io_base +
@@ -642,9 +642,6 @@ static void hisi_zip_log_hw_error(struct hisi_qm *qm, u32 
err_sts)
dev_err(dev, "hisi-zip multi ecc sram 
num=0x%x\n",
((err_val >>
HZIP_SRAM_ECC_ERR_NUM_SHIFT) & 0xFF));
-   dev_err(dev, "hisi-zip multi ecc sram 
addr=0x%x\n",
-   (err_val >>
-   HZIP_SRAM_ECC_ERR_ADDR_SHIFT));
}
}
err++;
@@ -904,15 +901,10 @@ static int __init hisi_zip_init(void)

ret = pci_register_driver(_zip_pci_driver);
if (ret < 0) {
+   hisi_zip_unregister_debugfs();
pr_err("Failed to register pci driver.\n");
-  

[PATCH 07/10] crypto: hisilicon/zip - fix static check warning

2020-07-24 Thread Yang Shen
Fix some code for PClint warning:
Warning - Suspicious Cast

Signed-off-by: Yang Shen 
Reviewed-by: Zhou Wang 
---
 drivers/crypto/hisilicon/zip/zip_crypto.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_crypto.c 
b/drivers/crypto/hisilicon/zip/zip_crypto.c
index 7aa8a55..fdc5bd3 100644
--- a/drivers/crypto/hisilicon/zip/zip_crypto.c
+++ b/drivers/crypto/hisilicon/zip/zip_crypto.c
@@ -16,7 +16,7 @@

 #define GZIP_HEAD_FLG_SHIFT3
 #define GZIP_HEAD_FEXTRA_SHIFT 10
-#define GZIP_HEAD_FEXTRA_XLEN  2
+#define GZIP_HEAD_FEXTRA_XLEN  2UL
 #define GZIP_HEAD_FHCRC_SIZE   2

 #define HZIP_GZIP_HEAD_BUF 256
@@ -51,13 +51,13 @@ enum {

 struct hisi_zip_req {
struct acomp_req *req;
-   int sskip;
-   int dskip;
+   u32 sskip;
+   u32 dskip;
struct hisi_acc_hw_sgl *hw_src;
struct hisi_acc_hw_sgl *hw_dst;
dma_addr_t dma_src;
dma_addr_t dma_dst;
-   int req_id;
+   u16 req_id;
 };

 struct hisi_zip_req_q {
@@ -119,7 +119,7 @@ static void hisi_zip_config_tag(struct hisi_zip_sqe *sqe, 
u32 tag)

 static void hisi_zip_fill_sqe(struct hisi_zip_sqe *sqe, u8 req_type,
  dma_addr_t s_addr, dma_addr_t d_addr, u32 slen,
- u32 dlen, int sskip, int dskip)
+ u32 dlen, u32 sskip, u32 dskip)
 {
memset(sqe, 0, sizeof(struct hisi_zip_sqe));

@@ -573,7 +573,7 @@ static int hisi_zip_acompress(struct acomp_req *acomp_req)
return head_size;
}

-   req = hisi_zip_create_req(acomp_req, qp_ctx, (size_t)head_size, true);
+   req = hisi_zip_create_req(acomp_req, qp_ctx, head_size, true);
if (IS_ERR(req)) {
dev_err_ratelimited(dev, "Create request before compress failed 
(%ld)!\n",
PTR_ERR(req));
--
2.7.4



[PATCH 09/10] crypto: hisilicon/zip - supplement some comments

2020-07-24 Thread Yang Shen
Supplement some comments.

Signed-off-by: Yang Shen 
Reviewed-by: Zhou Wang 
---
 drivers/crypto/hisilicon/zip/zip_main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_main.c 
b/drivers/crypto/hisilicon/zip/zip_main.c
index 7697fa5..49fad18 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -285,7 +285,7 @@ static int hisi_zip_set_user_domain_and_cache(struct 
hisi_qm *qm)
writel(HZIP_DECOMP_CHECK_ENABLE | HZIP_ALL_COMP_DECOMP_EN,
   base + HZIP_CLOCK_GATE_CTRL);

-   /* enable sqc writeback */
+   /* enable sqc,cqc writeback */
writel(SQC_CACHE_ENABLE | CQC_CACHE_ENABLE | SQC_CACHE_WB_ENABLE |
   CQC_CACHE_WB_ENABLE | FIELD_PREP(SQC_CACHE_WB_THRD, 1) |
   FIELD_PREP(CQC_CACHE_WB_THRD, 1), base + QM_CACHE_CTL);
@@ -358,7 +358,7 @@ static int current_qm_write(struct ctrl_debug_file *file, 
u32 val)
if (val > qm->vfs_num)
return -EINVAL;

-   /* Calculate curr_qm_qp_num and store */
+   /* According PF or VF Dev ID to calculation curr_qm_qp_num and store */
if (val == 0) {
qm->debug.curr_qm_qp_num = qm->qp_num;
} else {
--
2.7.4



[PATCH 04/10] crypto: hisilicon/zip - replace 'sprintf' with 'scnprintf'

2020-07-24 Thread Yang Shen
Replace 'sprintf' with 'scnprintf' to avoid overrun.

Signed-off-by: Yang Shen 
Reviewed-by: Zhou Wang 
---
 drivers/crypto/hisilicon/zip/zip_main.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/hisilicon/zip/zip_main.c 
b/drivers/crypto/hisilicon/zip/zip_main.c
index df1a16f..1883d1b 100644
--- a/drivers/crypto/hisilicon/zip/zip_main.c
+++ b/drivers/crypto/hisilicon/zip/zip_main.c
@@ -428,7 +428,7 @@ static ssize_t hisi_zip_ctrl_debug_read(struct file *filp, 
char __user *buf,
return -EINVAL;
}
spin_unlock_irq(>lock);
-   ret = sprintf(tbuf, "%u\n", val);
+   ret = scnprintf(tbuf, HZIP_BUF_SIZE, "%u\n", val);
return simple_read_from_buffer(buf, count, pos, tbuf, ret);
 }

@@ -514,13 +514,16 @@ static int hisi_zip_core_debug_init(struct hisi_qm *qm)
struct debugfs_regset32 *regset;
struct dentry *tmp_d;
char buf[HZIP_BUF_SIZE];
-   int i;
+   int i, ret;

for (i = 0; i < HZIP_CORE_NUM; i++) {
if (i < HZIP_COMP_CORE_NUM)
-   sprintf(buf, "comp_core%d", i);
+   ret = scnprintf(buf, HZIP_BUF_SIZE, "comp_core%d", i);
else
-   sprintf(buf, "decomp_core%d", i - HZIP_COMP_CORE_NUM);
+   ret = scnprintf(buf, HZIP_BUF_SIZE, "decomp_core%d",
+   i - HZIP_COMP_CORE_NUM);
+   if (!ret)
+   return -ENOMEM;

regset = devm_kzalloc(dev, sizeof(*regset), GFP_KERNEL);
if (!regset)
--
2.7.4



Re: [v7, PATCH 7/7] drm/mediatek: add support for mediatek SOC MT8183

2020-07-24 Thread Chun-Kuang Hu
Hi, Yongqiang:

Yongqiang Niu  於 2020年7月25日 週六 上午11:32寫道:
>
> On Sat, 2020-07-25 at 07:24 +0800, Chun-Kuang Hu wrote:
> > Hi Yongqiang:
> >
> > Yongqiang Niu  於 2020年7月23日 週四 上午10:15寫道:
> > >
> > > This patch add support for mediatek SOC MT8183
> > > 1.ovl_2l share driver with ovl
> >
> > I think this is done in [1], [2], [3], this patch just add the support
> > of mt8183-ovl and mt8183-ovl-2l.
> >
> > [1] 
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/mediatek?h=v5.8-rc6=132c6e250ed745443973cada8db17cdbaebdf551
> > [2] 
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/mediatek?h=v5.8-rc6=318462d1a568634ba09263cc730cb0fb1d56c2b3
> > [3] 
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/mediatek?h=v5.8-rc6=57148baac8b78461e394953cfd5317bde8f795ab
> >
> > > 2.rdma1 share drive with rdma0, but fifo size is different
> >
> > I think this is done in [4], this patch just add the support of mt8183-rdma.
> >
> > [4] https://patchwork.kernel.org/patch/11679549/
> >
> > > 3.add mt8183 mutex private data, and mmsys private data
> > > 4.add mt8183 main and external path module for crtc create
> >
> > The fourth item is the mmsys private data in third item, so you need
> > not to repeat it.
> >
>
> i will remove some useless description in next version.
> > >
> > > Signed-off-by: Yongqiang Niu 
> > > ---
> > >  drivers/gpu/drm/mediatek/mtk_disp_ovl.c  | 18 
> > >  drivers/gpu/drm/mediatek/mtk_disp_rdma.c |  6 
> > >  drivers/gpu/drm/mediatek/mtk_drm_ddp.c   | 47 
> > > 
> > >  drivers/gpu/drm/mediatek/mtk_drm_drv.c   | 43 
> > > +
> > >  4 files changed, 114 insertions(+)
> > >
> >
> > [snip]
> >
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c 
> > > b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > > index 014c1bb..60788c1 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > > @@ -15,6 +15,8 @@
> > >
> > >  #define MT2701_DISP_MUTEX0_MOD00x2c
> > >  #define MT2701_DISP_MUTEX0_SOF00x30
> > > +#define MT8183_DISP_MUTEX0_MOD00x30
> > > +#define MT8183_DISP_MUTEX0_SOF00x2c
> > >
> > >  #define DISP_REG_MUTEX_EN(n)   (0x20 + 0x20 * (n))
> > >  #define DISP_REG_MUTEX(n)  (0x24 + 0x20 * (n))
> > > @@ -25,6 +27,18 @@
> > >
> > >  #define INT_MUTEX  BIT(1)
> > >
> > > +#define MT8183_MUTEX_MOD_DISP_RDMA00
> > > +#define MT8183_MUTEX_MOD_DISP_RDMA11
> > > +#define MT8183_MUTEX_MOD_DISP_OVL0 9
> > > +#define MT8183_MUTEX_MOD_DISP_OVL0_2L  10
> > > +#define MT8183_MUTEX_MOD_DISP_OVL1_2L  11
> > > +#define MT8183_MUTEX_MOD_DISP_WDMA012
> > > +#define MT8183_MUTEX_MOD_DISP_COLOR0   13
> > > +#define MT8183_MUTEX_MOD_DISP_CCORR0   14
> > > +#define MT8183_MUTEX_MOD_DISP_AAL0 15
> > > +#define MT8183_MUTEX_MOD_DISP_GAMMA0   16
> > > +#define MT8183_MUTEX_MOD_DISP_DITHER0  17
> > > +
> > >  #define MT8173_MUTEX_MOD_DISP_OVL0 11
> > >  #define MT8173_MUTEX_MOD_DISP_OVL1 12
> > >  #define MT8173_MUTEX_MOD_DISP_RDMA013
> > > @@ -74,6 +88,10 @@
> > >  #define MUTEX_SOF_DSI2 5
> > >  #define MUTEX_SOF_DSI3 6
> > >
> > > +#define MT8183_MUTEX_SOF_DPI0  2
> > > +#define MT8183_MUTEX_EOF_DSI0  (MUTEX_SOF_DSI0 << 6)
> > > +#define MT8183_MUTEX_EOF_DPI0  (MT8183_MUTEX_SOF_DPI0 << 
> > > 6)
> > > +
> > >
> > >  struct mtk_disp_mutex {
> > > int id;
> > > @@ -153,6 +171,20 @@ struct mtk_ddp {
> > > [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
> > >  };
> > >
> > > +static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> > > +   [DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0,
> > > +   [DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0,
> > > +   [DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0,
> > > +   [DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0,
> > > +   [DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0,
> > > +   [DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0,
> > > +   [DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L,
> > > +   [DDP_COMPONENT_OVL_2L1] = MT8183_MUTEX_MOD_DISP_OVL1_2L,
> > > +   [DDP_COMPONENT_RDMA0] = MT8183_MUTEX_MOD_DISP_RDMA0,
> > > +   [DDP_COMPONENT_RDMA1] = MT8183_MUTEX_MOD_DISP_RDMA1,
> > > +   [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,
> > > +};
> > > +
> > >  static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_DSI3 + 1] = {
> > > [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> > > [DDP_MUTEX_SOF_DSI0] = 

[tip:perf/urgent] BUILD SUCCESS fe5ed7ab99c656bd2f5b79b49df0e9ebf2cead8a

2020-07-24 Thread kernel test robot
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git  
perf/urgent
branch HEAD: fe5ed7ab99c656bd2f5b79b49df0e9ebf2cead8a  uprobes: Change 
handle_swbp() to send SIGTRAP with si_code=SI_KERNEL, to fix GDB regression

elapsed time: 722m

configs tested: 98
configs skipped: 1

The following configs have been built successfully.
More configs may be tested in the coming days.

arm defconfig
arm  allyesconfig
arm  allmodconfig
arm   allnoconfig
arm64allyesconfig
arm64   defconfig
arm64allmodconfig
arm64 allnoconfig
i386  allnoconfig
i386 allyesconfig
i386defconfig
i386  debian-10.3
ia64 allmodconfig
ia64defconfig
ia64  allnoconfig
ia64 allyesconfig
m68k allmodconfig
m68k  allnoconfig
m68k   sun3_defconfig
m68kdefconfig
m68k allyesconfig
nios2   defconfig
nios2allyesconfig
openriscdefconfig
c6x  allyesconfig
c6x   allnoconfig
openrisc allyesconfig
nds32   defconfig
nds32 allnoconfig
csky allyesconfig
cskydefconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
h8300allmodconfig
xtensa  defconfig
arc defconfig
arc  allyesconfig
sh   allmodconfig
shallnoconfig
microblazeallnoconfig
mips allyesconfig
mips  allnoconfig
mips allmodconfig
pariscallnoconfig
parisc  defconfig
parisc   allyesconfig
parisc   allmodconfig
powerpc  allyesconfig
powerpc  rhel-kconfig
powerpc  allmodconfig
powerpc   allnoconfig
powerpc defconfig
i386 randconfig-a003-20200725
i386 randconfig-a005-20200725
i386 randconfig-a004-20200725
i386 randconfig-a006-20200725
i386 randconfig-a002-20200725
i386 randconfig-a001-20200725
x86_64   randconfig-a014-20200724
x86_64   randconfig-a016-20200724
x86_64   randconfig-a015-20200724
x86_64   randconfig-a012-20200724
x86_64   randconfig-a013-20200724
x86_64   randconfig-a011-20200724
i386 randconfig-a016-20200725
i386 randconfig-a013-20200725
i386 randconfig-a012-20200725
i386 randconfig-a015-20200725
i386 randconfig-a014-20200725
i386 randconfig-a011-20200725
i386 randconfig-a016-20200724
i386 randconfig-a013-20200724
i386 randconfig-a012-20200724
i386 randconfig-a015-20200724
i386 randconfig-a014-20200724
i386 randconfig-a011-20200724
riscvallyesconfig
riscv allnoconfig
riscv   defconfig
riscvallmodconfig
s390 allyesconfig
s390  allnoconfig
s390 allmodconfig
s390defconfig
sparcallyesconfig
sparc   defconfig
sparc64 defconfig
sparc64   allnoconfig
sparc64  allyesconfig
sparc64  allmodconfig
x86_64rhel-7.6-kselftests
x86_64   rhel-8.3
x86_64  kexec
x86_64   rhel
x86_64lkp
x86_64  fedora-25

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list

[tip:master] BUILD SUCCESS ada8a84a9bb8ed2f17d30fff369c7c191a94bb9e

2020-07-24 Thread kernel test robot
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git  master
branch HEAD: ada8a84a9bb8ed2f17d30fff369c7c191a94bb9e  Merge branch 
'WIP.x86/build'

elapsed time: 722m

configs tested: 80
configs skipped: 1

The following configs have been built successfully.
More configs may be tested in the coming days.

arm defconfig
arm  allyesconfig
arm  allmodconfig
arm   allnoconfig
arm64allyesconfig
arm64   defconfig
arm64allmodconfig
arm64 allnoconfig
i386 allyesconfig
i386defconfig
i386  debian-10.3
i386  allnoconfig
ia64 allmodconfig
ia64defconfig
ia64  allnoconfig
ia64 allyesconfig
m68k allmodconfig
m68k  allnoconfig
m68k   sun3_defconfig
m68kdefconfig
m68k allyesconfig
nios2   defconfig
nios2allyesconfig
openriscdefconfig
c6x  allyesconfig
c6x   allnoconfig
openrisc allyesconfig
nds32   defconfig
nds32 allnoconfig
csky allyesconfig
cskydefconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
h8300allmodconfig
xtensa  defconfig
arc defconfig
arc  allyesconfig
sh   allmodconfig
shallnoconfig
microblazeallnoconfig
mips allyesconfig
mips  allnoconfig
mips allmodconfig
pariscallnoconfig
parisc  defconfig
parisc   allyesconfig
parisc   allmodconfig
powerpc defconfig
powerpc  allyesconfig
powerpc  rhel-kconfig
powerpc  allmodconfig
powerpc   allnoconfig
x86_64   randconfig-a014-20200724
x86_64   randconfig-a016-20200724
x86_64   randconfig-a015-20200724
x86_64   randconfig-a012-20200724
x86_64   randconfig-a013-20200724
x86_64   randconfig-a011-20200724
riscvallyesconfig
riscv allnoconfig
riscv   defconfig
riscvallmodconfig
s390 allyesconfig
s390  allnoconfig
s390 allmodconfig
s390defconfig
sparcallyesconfig
sparc   defconfig
sparc64 defconfig
sparc64   allnoconfig
sparc64  allyesconfig
sparc64  allmodconfig
x86_64rhel-7.6-kselftests
x86_64   rhel-8.3
x86_64  kexec
x86_64   rhel
x86_64lkp
x86_64  fedora-25

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


Re: [v7, PATCH 7/7] drm/mediatek: add support for mediatek SOC MT8183

2020-07-24 Thread Yongqiang Niu
On Thu, 2020-07-23 at 17:40 +0200, Matthias Brugger wrote:
> 
> On 23/07/2020 04:03, Yongqiang Niu wrote:
> > This patch add support for mediatek SOC MT8183
> > 1.ovl_2l share driver with ovl
> > 2.rdma1 share drive with rdma0, but fifo size is different
> > 3.add mt8183 mutex private data, and mmsys private data
> > 4.add mt8183 main and external path module for crtc create
> 
> Please fix your commit message, this is seems to describe what the whole 
> series 
> is doing.

will fix in next version
> 
> Regards,
> Matthias
> 
> > 
> > Signed-off-by: Yongqiang Niu 
> > ---
> >   drivers/gpu/drm/mediatek/mtk_disp_ovl.c  | 18 
> >   drivers/gpu/drm/mediatek/mtk_disp_rdma.c |  6 
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp.c   | 47 
> > 
> >   drivers/gpu/drm/mediatek/mtk_drm_drv.c   | 43 
> > +
> >   4 files changed, 114 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c 
> > b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > index 28651bc..8cf9f3b 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > @@ -430,11 +430,29 @@ static int mtk_disp_ovl_remove(struct platform_device 
> > *pdev)
> > .fmt_rgb565_is_0 = true,
> >   };
> >   
> > +static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = {
> > +   .addr = DISP_REG_OVL_ADDR_MT8173,
> > +   .gmc_bits = 10,
> > +   .layer_nr = 4,
> > +   .fmt_rgb565_is_0 = true,
> > +};
> > +
> > +static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = {
> > +   .addr = DISP_REG_OVL_ADDR_MT8173,
> > +   .gmc_bits = 10,
> > +   .layer_nr = 2,
> > +   .fmt_rgb565_is_0 = true,
> > +};
> > +
> >   static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = {
> > { .compatible = "mediatek,mt2701-disp-ovl",
> >   .data = _ovl_driver_data},
> > { .compatible = "mediatek,mt8173-disp-ovl",
> >   .data = _ovl_driver_data},
> > +   { .compatible = "mediatek,mt8183-disp-ovl",
> > + .data = _ovl_driver_data},
> > +   { .compatible = "mediatek,mt8183-disp-ovl-2l",
> > + .data = _ovl_2l_driver_data},
> > {},
> >   };
> >   MODULE_DEVICE_TABLE(of, mtk_disp_ovl_driver_dt_match);
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c 
> > b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > index 794acc5..51f2a0c 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> > @@ -355,11 +355,17 @@ static int mtk_disp_rdma_remove(struct 
> > platform_device *pdev)
> > .fifo_size = SZ_8K,
> >   };
> >   
> > +static const struct mtk_disp_rdma_data mt8183_rdma_driver_data = {
> > +   .fifo_size = 5 * SZ_1K,
> > +};
> > +
> >   static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = {
> > { .compatible = "mediatek,mt2701-disp-rdma",
> >   .data = _rdma_driver_data},
> > { .compatible = "mediatek,mt8173-disp-rdma",
> >   .data = _rdma_driver_data},
> > +   { .compatible = "mediatek,mt8183-disp-rdma",
> > + .data = _rdma_driver_data},
> > {},
> >   };
> >   MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match);
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c 
> > b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > index 014c1bb..60788c1 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > @@ -15,6 +15,8 @@
> >   
> >   #define MT2701_DISP_MUTEX0_MOD0   0x2c
> >   #define MT2701_DISP_MUTEX0_SOF0   0x30
> > +#define MT8183_DISP_MUTEX0_MOD00x30
> > +#define MT8183_DISP_MUTEX0_SOF00x2c
> >   
> >   #define DISP_REG_MUTEX_EN(n)  (0x20 + 0x20 * (n))
> >   #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
> > @@ -25,6 +27,18 @@
> >   
> >   #define INT_MUTEX BIT(1)
> >   
> > +#define MT8183_MUTEX_MOD_DISP_RDMA00
> > +#define MT8183_MUTEX_MOD_DISP_RDMA11
> > +#define MT8183_MUTEX_MOD_DISP_OVL0 9
> > +#define MT8183_MUTEX_MOD_DISP_OVL0_2L  10
> > +#define MT8183_MUTEX_MOD_DISP_OVL1_2L  11
> > +#define MT8183_MUTEX_MOD_DISP_WDMA012
> > +#define MT8183_MUTEX_MOD_DISP_COLOR0   13
> > +#define MT8183_MUTEX_MOD_DISP_CCORR0   14
> > +#define MT8183_MUTEX_MOD_DISP_AAL0 15
> > +#define MT8183_MUTEX_MOD_DISP_GAMMA0   16
> > +#define MT8183_MUTEX_MOD_DISP_DITHER0  17
> > +
> >   #define MT8173_MUTEX_MOD_DISP_OVL011
> >   #define MT8173_MUTEX_MOD_DISP_OVL112
> >   #define MT8173_MUTEX_MOD_DISP_RDMA0   13
> > @@ -74,6 +88,10 @@
> >   #define MUTEX_SOF_DSI25
> >   #define MUTEX_SOF_DSI36
> >   
> > +#define MT8183_MUTEX_SOF_DPI0  2
> > +#define MT8183_MUTEX_EOF_DSI0  (MUTEX_SOF_DSI0 << 6)
> > 

[tip:timers/core] BUILD SUCCESS 31cd0e119d50cf27ebe214d1a8f7ca36692f13a5

2020-07-24 Thread kernel test robot
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git  
timers/core
branch HEAD: 31cd0e119d50cf27ebe214d1a8f7ca36692f13a5  timers: Recalculate next 
timer interrupt only when necessary

i386-tinyconfig vmlinux size:

=
 TOTAL  TEXT  run_timer_softirq()  calc_wheel_index()   
 
=
 0 00   0  30c66fc30ee7 timer: 
Prevent base->clk from moving backward
+7+50  +5  e2a71bdea816 timer: Fix 
wheel index calculation on last level 
 0 00   0  3d2e83a2a6a0 timers: 
Preserve higher bits of expiration on index calculat 
  +110  +1100+103  1f32cab0db4b timers: Use 
only bucket expiry for base->next_expiry value   
 0 00   0  9a2b764b06c8 timers: 
Move trigger_dyntick_cpu() to enqueue_timer()
 0 00   0  446889721162 timers: Add 
comments about calc_index() ceiling work 
 0 00   0  001ec1b3925d timers: 
Optimize _next_timer_interrupt() level iteration 
  +213  +213 +171   0  dc2a0f1fb2a0 timers: 
Always keep track of next expiry 
 0 00   0  90d52f65f303 timers: 
Reuse next expiry cache after nohz exit  
   +82   +82   +7   0  1f8a4212dc83 timers: 
Expand clk forward logic beyond nohz 
   +22   +22  +22   0  d4f7dae87096 timers: 
Spare timer softirq until next expiry
   -21   -21  -14   0  0975fb565b8b timers: 
Remove must_forward_clk  
+1+10   0  36cd28a4cdd0 timers: 
Lower base clock forwarding threshold
-1 00   0  1b7efaa61549 Merge tag 
'timers-v5.9' of https://git.linaro.org/people/dan 
   +16   +15   +7   0  31cd0e119d50 timers: 
Recalculate next timer interrupt only when necessary 
  +429  +427 +193+108  
dcb7fd82c75e..31cd0e119d50 (ALL COMMITS)  
=

elapsed time: 910m

configs tested: 74
configs skipped: 1

The following configs have been built successfully.
More configs may be tested in the coming days.

arm defconfig
arm  allyesconfig
arm  allmodconfig
arm   allnoconfig
arm64allyesconfig
arm64   defconfig
arm64allmodconfig
arm64 allnoconfig
i386 allyesconfig
i386defconfig
i386  debian-10.3
i386  allnoconfig
ia64 allmodconfig
ia64defconfig
ia64  allnoconfig
ia64 allyesconfig
m68k allmodconfig
m68k  allnoconfig
m68k   sun3_defconfig
m68kdefconfig
m68k allyesconfig
nios2   defconfig
nios2allyesconfig
openriscdefconfig
c6x  allyesconfig
c6x   allnoconfig
openrisc allyesconfig
nds32   defconfig
nds32 allnoconfig
csky allyesconfig
cskydefconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
h8300allmodconfig
xtensa  defconfig
arc defconfig
arc  allyesconfig
sh   allmodconfig
shallnoconfig
microblazeallnoconfig
mips allyesconfig
mips

Re: [v7, PATCH 7/7] drm/mediatek: add support for mediatek SOC MT8183

2020-07-24 Thread Yongqiang Niu
On Sat, 2020-07-25 at 07:24 +0800, Chun-Kuang Hu wrote:
> Hi Yongqiang:
> 
> Yongqiang Niu  於 2020年7月23日 週四 上午10:15寫道:
> >
> > This patch add support for mediatek SOC MT8183
> > 1.ovl_2l share driver with ovl
> 
> I think this is done in [1], [2], [3], this patch just add the support
> of mt8183-ovl and mt8183-ovl-2l.
> 
> [1] 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/mediatek?h=v5.8-rc6=132c6e250ed745443973cada8db17cdbaebdf551
> [2] 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/mediatek?h=v5.8-rc6=318462d1a568634ba09263cc730cb0fb1d56c2b3
> [3] 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/mediatek?h=v5.8-rc6=57148baac8b78461e394953cfd5317bde8f795ab
> 
> > 2.rdma1 share drive with rdma0, but fifo size is different
> 
> I think this is done in [4], this patch just add the support of mt8183-rdma.
> 
> [4] https://patchwork.kernel.org/patch/11679549/
> 
> > 3.add mt8183 mutex private data, and mmsys private data
> > 4.add mt8183 main and external path module for crtc create
> 
> The fourth item is the mmsys private data in third item, so you need
> not to repeat it.
> 

i will remove some useless description in next version.
> >
> > Signed-off-by: Yongqiang Niu 
> > ---
> >  drivers/gpu/drm/mediatek/mtk_disp_ovl.c  | 18 
> >  drivers/gpu/drm/mediatek/mtk_disp_rdma.c |  6 
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp.c   | 47 
> > 
> >  drivers/gpu/drm/mediatek/mtk_drm_drv.c   | 43 +
> >  4 files changed, 114 insertions(+)
> >
> 
> [snip]
> 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c 
> > b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > index 014c1bb..60788c1 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> > @@ -15,6 +15,8 @@
> >
> >  #define MT2701_DISP_MUTEX0_MOD00x2c
> >  #define MT2701_DISP_MUTEX0_SOF00x30
> > +#define MT8183_DISP_MUTEX0_MOD00x30
> > +#define MT8183_DISP_MUTEX0_SOF00x2c
> >
> >  #define DISP_REG_MUTEX_EN(n)   (0x20 + 0x20 * (n))
> >  #define DISP_REG_MUTEX(n)  (0x24 + 0x20 * (n))
> > @@ -25,6 +27,18 @@
> >
> >  #define INT_MUTEX  BIT(1)
> >
> > +#define MT8183_MUTEX_MOD_DISP_RDMA00
> > +#define MT8183_MUTEX_MOD_DISP_RDMA11
> > +#define MT8183_MUTEX_MOD_DISP_OVL0 9
> > +#define MT8183_MUTEX_MOD_DISP_OVL0_2L  10
> > +#define MT8183_MUTEX_MOD_DISP_OVL1_2L  11
> > +#define MT8183_MUTEX_MOD_DISP_WDMA012
> > +#define MT8183_MUTEX_MOD_DISP_COLOR0   13
> > +#define MT8183_MUTEX_MOD_DISP_CCORR0   14
> > +#define MT8183_MUTEX_MOD_DISP_AAL0 15
> > +#define MT8183_MUTEX_MOD_DISP_GAMMA0   16
> > +#define MT8183_MUTEX_MOD_DISP_DITHER0  17
> > +
> >  #define MT8173_MUTEX_MOD_DISP_OVL0 11
> >  #define MT8173_MUTEX_MOD_DISP_OVL1 12
> >  #define MT8173_MUTEX_MOD_DISP_RDMA013
> > @@ -74,6 +88,10 @@
> >  #define MUTEX_SOF_DSI2 5
> >  #define MUTEX_SOF_DSI3 6
> >
> > +#define MT8183_MUTEX_SOF_DPI0  2
> > +#define MT8183_MUTEX_EOF_DSI0  (MUTEX_SOF_DSI0 << 6)
> > +#define MT8183_MUTEX_EOF_DPI0  (MT8183_MUTEX_SOF_DPI0 << 6)
> > +
> >
> >  struct mtk_disp_mutex {
> > int id;
> > @@ -153,6 +171,20 @@ struct mtk_ddp {
> > [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
> >  };
> >
> > +static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> > +   [DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0,
> > +   [DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0,
> > +   [DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0,
> > +   [DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0,
> > +   [DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0,
> > +   [DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0,
> > +   [DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L,
> > +   [DDP_COMPONENT_OVL_2L1] = MT8183_MUTEX_MOD_DISP_OVL1_2L,
> > +   [DDP_COMPONENT_RDMA0] = MT8183_MUTEX_MOD_DISP_RDMA0,
> > +   [DDP_COMPONENT_RDMA1] = MT8183_MUTEX_MOD_DISP_RDMA1,
> > +   [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,
> > +};
> > +
> >  static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_DSI3 + 1] = {
> > [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> > [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> > @@ -163,6 +195,12 @@ struct mtk_ddp {
> > [DDP_MUTEX_SOF_DSI3] = MUTEX_SOF_DSI3,
> >  };
> >
> > +static const unsigned int mt8183_mutex_sof[DDP_MUTEX_SOF_DSI3 + 1] = {
> > +   [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> > +   

[tip:x86/build] BUILD SUCCESS 587af649bcc04eb016822f209a975005c0092151

2020-07-24 Thread kernel test robot
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git  
x86/build
branch HEAD: 587af649bcc04eb016822f209a975005c0092151  x86/build: Move 
max-page-size option to LDFLAGS_vmlinux

elapsed time: 722m

configs tested: 92
configs skipped: 70

The following configs have been built successfully.
More configs may be tested in the coming days.

arm64allyesconfig
arm64   defconfig
arm64allmodconfig
arm64 allnoconfig
arm defconfig
arm  allyesconfig
arm  allmodconfig
arm   allnoconfig
i386  allnoconfig
i386 allyesconfig
i386defconfig
i386  debian-10.3
ia64 allmodconfig
ia64defconfig
ia64  allnoconfig
ia64 allyesconfig
m68k allmodconfig
m68k  allnoconfig
m68k   sun3_defconfig
m68kdefconfig
m68k allyesconfig
nios2   defconfig
nios2allyesconfig
openriscdefconfig
c6x  allyesconfig
c6x   allnoconfig
openrisc allyesconfig
nds32   defconfig
nds32 allnoconfig
csky allyesconfig
cskydefconfig
alpha   defconfig
alphaallyesconfig
xtensa   allyesconfig
h8300allyesconfig
h8300allmodconfig
xtensa  defconfig
mips allyesconfig
mips  allnoconfig
mips allmodconfig
pariscallnoconfig
parisc  defconfig
parisc   allyesconfig
parisc   allmodconfig
powerpc  allyesconfig
powerpc  rhel-kconfig
powerpc  allmodconfig
powerpc   allnoconfig
i386 randconfig-a003-20200725
i386 randconfig-a005-20200725
i386 randconfig-a004-20200725
i386 randconfig-a006-20200725
i386 randconfig-a002-20200725
i386 randconfig-a001-20200725
x86_64   randconfig-a014-20200724
x86_64   randconfig-a016-20200724
x86_64   randconfig-a015-20200724
x86_64   randconfig-a012-20200724
x86_64   randconfig-a013-20200724
x86_64   randconfig-a011-20200724
i386 randconfig-a016-20200725
i386 randconfig-a013-20200725
i386 randconfig-a012-20200725
i386 randconfig-a015-20200725
i386 randconfig-a014-20200725
i386 randconfig-a011-20200725
i386 randconfig-a016-20200724
i386 randconfig-a013-20200724
i386 randconfig-a012-20200724
i386 randconfig-a015-20200724
i386 randconfig-a014-20200724
i386 randconfig-a011-20200724
riscvallyesconfig
riscv allnoconfig
riscv   defconfig
riscvallmodconfig
s390 allyesconfig
s390  allnoconfig
s390 allmodconfig
s390defconfig
sparcallyesconfig
sparc   defconfig
sparc64 defconfig
sparc64   allnoconfig
sparc64  allyesconfig
sparc64  allmodconfig
x86_64rhel-7.6-kselftests
x86_64   rhel-8.3
x86_64  kexec
x86_64   rhel
x86_64lkp
x86_64  fedora-25

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


Re: [v7, PATCH 2/7] mtk-mmsys: add mmsys private data

2020-07-24 Thread Yongqiang Niu
On Thu, 2020-07-23 at 11:32 +0200, Enric Balletbo Serra wrote:
> Hi Yongqiang Niu,
> 
> Thank you for your patch.
> 
> Missatge de Yongqiang Niu  del dia dj., 23
> de jul. 2020 a les 4:05:
> >
> > add mmsys private data
> >
> 
> I think this change requires a better explanation of what you are
> doing. Although I'm really uncomfortable with this change, why you
> need to create a new mt2701-mmsys file?

reason:
1.there will more and more Mediatek Soc upstream, and the display path
connection function mtk_mmsys_ddp_mout_en, mtk_mmsys_ddp_sel_in and
mtk_mmsys_ddp_sout_sel will complicated more and more, 
2. many of the connection are only used in some SoC, and useless for
other SoC and not readable,
3. if we add a new SoC connection, we need check is this affect other
Soc,
> 
> > Feature: drm/mediatek
> 
> Remove this.
next version will remove this
> 
> > Signed-off-by: Yongqiang Niu 
> > ---
> >  drivers/soc/mediatek/Makefile |   1 +
> >  drivers/soc/mediatek/mmsys/Makefile   |   2 +
> >  drivers/soc/mediatek/mmsys/mt2701-mmsys.c | 250 +++
> >  drivers/soc/mediatek/mtk-mmsys.c  | 271 
> > +-
> >  include/linux/soc/mediatek/mtk-mmsys.h|  15 ++
> >  5 files changed, 314 insertions(+), 225 deletions(-)
> >  create mode 100644 drivers/soc/mediatek/mmsys/Makefile
> >  create mode 100644 drivers/soc/mediatek/mmsys/mt2701-mmsys.c
> >
> > diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile
> > index 2afa7b9..b37ac2c 100644
> > --- a/drivers/soc/mediatek/Makefile
> > +++ b/drivers/soc/mediatek/Makefile
> > @@ -3,3 +3,4 @@ obj-$(CONFIG_MTK_CMDQ) += mtk-cmdq-helper.o
> >  obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o
> >  obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o
> >  obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
> > +obj-$(CONFIG_MTK_MMSYS) += mmsys/
> > diff --git a/drivers/soc/mediatek/mmsys/Makefile 
> > b/drivers/soc/mediatek/mmsys/Makefile
> > new file mode 100644
> > index 000..33b0dab
> > --- /dev/null
> > +++ b/drivers/soc/mediatek/mmsys/Makefile
> > @@ -0,0 +1,2 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
> > +obj-y += mt2701-mmsys.o
> > diff --git a/drivers/soc/mediatek/mmsys/mt2701-mmsys.c 
> > b/drivers/soc/mediatek/mmsys/mt2701-mmsys.c
> > new file mode 100644
> > index 000..b8e53b0
> > --- /dev/null
> > +++ b/drivers/soc/mediatek/mmsys/mt2701-mmsys.c
> > @@ -0,0 +1,250 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +//
> > +// Copyright (c) 2020 MediaTek Inc.
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#define DISP_REG_CONFIG_DISP_OVL0_MOUT_EN  0x040
> > +#define DISP_REG_CONFIG_DISP_OVL1_MOUT_EN  0x044
> > +#define DISP_REG_CONFIG_DISP_OD_MOUT_EN0x048
> > +#define DISP_REG_CONFIG_DISP_GAMMA_MOUT_EN 0x04c
> > +#define DISP_REG_CONFIG_DISP_UFOE_MOUT_EN  0x050
> > +#define DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0x084
> > +#define DISP_REG_CONFIG_DISP_COLOR1_SEL_IN 0x088
> > +#define DISP_REG_CONFIG_DSIE_SEL_IN0x0a4
> > +#define DISP_REG_CONFIG_DSIO_SEL_IN0x0a8
> > +#define DISP_REG_CONFIG_DPI_SEL_IN 0x0ac
> > +#define DISP_REG_CONFIG_DISP_RDMA2_SOUT0x0b8
> > +#define DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN 0x0c4
> > +#define DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN 0x0c8
> > +#define DISP_REG_CONFIG_MMSYS_CG_CON0  0x100
> > +
> > +#define DISP_REG_CONFIG_DISP_OVL_MOUT_EN   0x030
> > +#define DISP_REG_CONFIG_OUT_SEL0x04c
> > +#define DISP_REG_CONFIG_DSI_SEL0x050
> > +#define DISP_REG_CONFIG_DPI_SEL0x064
> > +
> > +#define OVL0_MOUT_EN_COLOR00x1
> > +#define OD_MOUT_EN_RDMA0   0x1
> > +#define OD1_MOUT_EN_RDMA1  BIT(16)
> > +#define UFOE_MOUT_EN_DSI0  0x1
> > +#define COLOR0_SEL_IN_OVL0 0x1
> > +#define OVL1_MOUT_EN_COLOR10x1
> > +#define GAMMA_MOUT_EN_RDMA10x1
> > +#define RDMA0_SOUT_DPI00x2
> > +#define RDMA0_SOUT_DPI10x3
> > +#define RDMA0_SOUT_DSI10x1
> > +#define RDMA0_SOUT_DSI20x4
> > +#define RDMA0_SOUT_DSI30x5
> > +#define RDMA1_SOUT_DPI00x2
> > +#define RDMA1_SOUT_DPI10x3
> > +#define RDMA1_SOUT_DSI10x1
> > +#define RDMA1_SOUT_DSI20x4
> > +#define RDMA1_SOUT_DSI30x5
> > +#define RDMA2_SOUT_DPI00x2
> > +#define RDMA2_SOUT_DPI10x3
> > +#define RDMA2_SOUT_DSI10x1
> > +#define RDMA2_SOUT_DSI20x4
> > 

[RFC][PATCH] dma-heap: Add proper kref handling on dma-buf heaps

2020-07-24 Thread John Stultz
Add proper refcounting on the dma_heap structure.
While existing heaps are built-in, we may eventually
have heaps loaded from modules, and we'll need to be
able to properly handle the references to the heaps

Cc: Sumit Semwal 
Cc: Andrew F. Davis 
Cc: Benjamin Gaignard 
Cc: Liam Mark 
Cc: Laura Abbott 
Cc: Brian Starkey 
Cc: linux-me...@vger.kernel.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: John Stultz 
---
 drivers/dma-buf/dma-heap.c | 31 +++
 include/linux/dma-heap.h   |  6 ++
 2 files changed, 33 insertions(+), 4 deletions(-)

diff --git a/drivers/dma-buf/dma-heap.c b/drivers/dma-buf/dma-heap.c
index afd22c9dbdcf..90c3720acc1c 100644
--- a/drivers/dma-buf/dma-heap.c
+++ b/drivers/dma-buf/dma-heap.c
@@ -40,6 +40,8 @@ struct dma_heap {
dev_t heap_devt;
struct list_head list;
struct cdev heap_cdev;
+   int minor;
+   struct kref refcount;
 };
 
 static LIST_HEAD(heap_list);
@@ -190,11 +192,31 @@ void *dma_heap_get_drvdata(struct dma_heap *heap)
return heap->priv;
 }
 
+static void dma_heap_release(struct kref *ref)
+{
+   struct dma_heap *heap = container_of(ref, struct dma_heap, refcount);
+
+   /* Remove heap from the list */
+   mutex_lock(_list_lock);
+   list_del(>list);
+   mutex_unlock(_list_lock);
+
+   device_destroy(dma_heap_class, heap->heap_devt);
+   cdev_del(>heap_cdev);
+   xa_erase(_heap_minors, heap->minor);
+
+   kfree(heap);
+}
+
+void dma_heap_put(struct dma_heap *h)
+{
+   kref_put(>refcount, dma_heap_release);
+}
+
 struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info)
 {
struct dma_heap *heap, *h, *err_ret;
struct device *dev_ret;
-   unsigned int minor;
int ret;
 
if (!exp_info->name || !strcmp(exp_info->name, "")) {
@@ -223,12 +245,13 @@ struct dma_heap *dma_heap_add(const struct 
dma_heap_export_info *exp_info)
if (!heap)
return ERR_PTR(-ENOMEM);
 
+   kref_init(>refcount);
heap->name = exp_info->name;
heap->ops = exp_info->ops;
heap->priv = exp_info->priv;
 
/* Find unused minor number */
-   ret = xa_alloc(_heap_minors, , heap,
+   ret = xa_alloc(_heap_minors, >minor, heap,
   XA_LIMIT(0, NUM_HEAP_MINORS - 1), GFP_KERNEL);
if (ret < 0) {
pr_err("dma_heap: Unable to get minor number for heap\n");
@@ -237,7 +260,7 @@ struct dma_heap *dma_heap_add(const struct 
dma_heap_export_info *exp_info)
}
 
/* Create device */
-   heap->heap_devt = MKDEV(MAJOR(dma_heap_devt), minor);
+   heap->heap_devt = MKDEV(MAJOR(dma_heap_devt), heap->minor);
 
cdev_init(>heap_cdev, _heap_fops);
ret = cdev_add(>heap_cdev, heap->heap_devt, 1);
@@ -267,7 +290,7 @@ struct dma_heap *dma_heap_add(const struct 
dma_heap_export_info *exp_info)
 err2:
cdev_del(>heap_cdev);
 err1:
-   xa_erase(_heap_minors, minor);
+   xa_erase(_heap_minors, heap->minor);
 err0:
kfree(heap);
return err_ret;
diff --git a/include/linux/dma-heap.h b/include/linux/dma-heap.h
index 454e354d1ffb..c1572f29cfac 100644
--- a/include/linux/dma-heap.h
+++ b/include/linux/dma-heap.h
@@ -56,4 +56,10 @@ void *dma_heap_get_drvdata(struct dma_heap *heap);
  */
 struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info);
 
+/**
+ * dma_heap_put - drops a reference to a dmabuf heaps, potentially freeing it
+ * @heap:  heap pointer
+ */
+void dma_heap_put(struct dma_heap *heap);
+
 #endif /* _DMA_HEAPS_H */
-- 
2.17.1



Re: [PATCH] watch_queue: Limit the number of watches a user can hold

2020-07-24 Thread Jarkko Sakkinen
On Fri, Jul 24, 2020 at 11:17:26PM +0100, David Howells wrote:
> Impose a limit on the number of watches that a user can hold so that they
> can't use this mechanism to fill up all the available memory.
> 
> This is done by putting a counter in user_struct that's incremented when a
> watch is allocated and decreased when it is released.  If the number
> exceeds the RLIMIT_NOFILE limit, the watch is rejected with EAGAIN.
> 
> This can be tested by the following means:
> 
>  (1) Create a watch queue and attach it to fd 5 in the program given - in
>  this case, bash:
> 
>   keyctl watch_session /tmp/nlog /tmp/gclog 5 bash
> 
>  (2) In the shell, set the maximum number of files to, say, 99:
> 
>   ulimit -n 99
> 
>  (3) Add 200 keyrings:
> 
>   for ((i=0; i<200; i++)); do keyctl newring a$i @s || break; done
> 
>  (4) Try to watch all of the keyrings:
> 
>   for ((i=0; i<200; i++)); do echo $i; keyctl watch_add 5 %:a$i || break; 
> done
> 
>  This should fail when the number of watches belonging to the user hits
>  99.
> 
>  (5) Remove all the keyrings and all of those watches should go away:
> 
>   for ((i=0; i<200; i++)); do keyctl unlink %:a$i; done
> 
>  (6) Kill off the watch queue by exiting the shell spawned by
>  watch_session.
> 
> Fixes: c73be61cede5 ("pipe: Add general notification queue support")
> Reported-by: Linus Torvalds 
> Signed-off-by: David Howells 
> ---
> 
>  include/linux/sched/user.h |3 +++
>  kernel/watch_queue.c   |8 
>  2 files changed, 11 insertions(+)
> 
> diff --git a/include/linux/sched/user.h b/include/linux/sched/user.h
> index 917d88edb7b9..a8ec3b6093fc 100644
> --- a/include/linux/sched/user.h
> +++ b/include/linux/sched/user.h
> @@ -36,6 +36,9 @@ struct user_struct {
>  defined(CONFIG_NET) || defined(CONFIG_IO_URING)
>   atomic_long_t locked_vm;
>  #endif
> +#ifdef CONFIG_WATCH_QUEUE
> + atomic_t nr_watches;/* The number of watches this user currently 
> has */
> +#endif
>  
>   /* Miscellaneous per-user rate limit */
>   struct ratelimit_state ratelimit;
> diff --git a/kernel/watch_queue.c b/kernel/watch_queue.c
> index f74020f6bd9d..0ef8f65bd2d7 100644
> --- a/kernel/watch_queue.c
> +++ b/kernel/watch_queue.c
> @@ -393,6 +393,7 @@ static void free_watch(struct rcu_head *rcu)
>   struct watch *watch = container_of(rcu, struct watch, rcu);
>  
>   put_watch_queue(rcu_access_pointer(watch->queue));
> + atomic_dec(>cred->user->nr_watches);
>   put_cred(watch->cred);
>  }
>  
> @@ -452,6 +453,13 @@ int add_watch_to_object(struct watch *watch, struct 
> watch_list *wlist)
>   watch->cred = get_current_cred();
>   rcu_assign_pointer(watch->watch_list, wlist);
>  
> + if (atomic_inc_return(>cred->user->nr_watches) >
> + task_rlimit(current, RLIMIT_NOFILE)) {
> + atomic_dec(>cred->user->nr_watches);
> + put_cred(watch->cred);
> + return -EAGAIN;
> + }
> +
>   spin_lock_bh(>lock);
>   kref_get(>usage);
>   kref_get(>usage);
> 
> 

Reviewed-by: Jarkko Sakkinen 

David, BTW, would it be possible to push keyrings to lore.kernel.org?

I don't have an archive for keyrings, which means that I cannot push
this forward.

/Jarkko


Re: [PATCH v5 5/6] kprobes: Use text_alloc() and text_free()]

2020-07-24 Thread Jarkko Sakkinen
On Fri, Jul 24, 2020 at 03:16:08PM +0300, Ard Biesheuvel wrote:
> On Fri, 24 Jul 2020 at 12:27, Ingo Molnar  wrote:
> >
> >
> > * Jarkko Sakkinen  wrote:
> >
> > > Use text_alloc() and text_free() instead of module_alloc() and
> > > module_memfree() when an arch provides them.
> > >
> > > Cc: linux...@kvack.org
> > > Cc: Andi Kleen 
> > > Cc: Masami Hiramatsu 
> > > Cc: Peter Zijlstra 
> > > Signed-off-by: Jarkko Sakkinen 
> > > ---
> > >  kernel/kprobes.c | 9 +
> > >  1 file changed, 9 insertions(+)
> > >
> > > diff --git a/kernel/kprobes.c b/kernel/kprobes.c
> > > index 4e46d96d4e16..611fcda9f6bf 100644
> > > --- a/kernel/kprobes.c
> > > +++ b/kernel/kprobes.c
> > > @@ -40,6 +40,7 @@
> > >  #include 
> > >  #include 
> > >  #include 
> > > +#include 
> > >
> > >  #define KPROBE_HASH_BITS 6
> > >  #define KPROBE_TABLE_SIZE (1 << KPROBE_HASH_BITS)
> > > @@ -111,12 +112,20 @@ enum kprobe_slot_state {
> > >
> > >  void __weak *alloc_insn_page(void)
> > >  {
> > > +#ifdef CONFIG_ARCH_HAS_TEXT_ALLOC
> > > + return text_alloc(PAGE_SIZE);
> > > +#else
> > >   return module_alloc(PAGE_SIZE);
> > > +#endif
> > >  }
> > >
> > >  void __weak free_insn_page(void *page)
> > >  {
> > > +#ifdef CONFIG_ARCH_HAS_TEXT_ALLOC
> > > + text_free(page);
> > > +#else
> > >   module_memfree(page);
> > > +#endif
> > >  }
> >
> > I've read the observations in the other threads, but this #ifdef
> > jungle is silly, it's a de-facto open coded text_alloc() with a
> > module_alloc() fallback...
> >
> 
> Also, as I attempted to explain before, there is no reason to allocate
> kasan shadow for any of these use cases, so cloning module_alloc() to
> implement text_alloc() is not the correct approach even on x86.
> 
> I suppose module_alloc() could be reimplemented in terms of
> text_alloc() in this case, but simply relabelling it like this seems
> inappropriate on all architectures.

I agree with this. Even if there was chance to do a merge of some
kind, it should probably happen over time and accept some redundancy
first.

/Jarkko


Re: [PATCH] drivers/net/wan: lapb: Corrected the usage of skb_cow

2020-07-24 Thread David Miller
From: Xie He 
Date: Fri, 24 Jul 2020 09:33:47 -0700

> This patch fixed 2 issues with the usage of skb_cow in LAPB drivers
> "lapbether" and "hdlc_x25":
> 
> 1) After skb_cow fails, kfree_skb should be called to drop a reference
> to the skb. But in both drivers, kfree_skb is not called.
> 
> 2) skb_cow should be called before skb_push so that is can ensure the
> safety of skb_push. But in "lapbether", it is incorrectly called after
> skb_push.
> 
> More details about these 2 issues:
> 
> 1) The behavior of calling kfree_skb on failure is also the behavior of
> netif_rx, which is called by this function with "return netif_rx(skb);".
> So this function should follow this behavior, too.
> 
> 2) In "lapbether", skb_cow is called after skb_push. This results in 2
> logical issues:
>a) skb_push is not protected by skb_cow;
>b) An extra headroom of 1 byte is ensured after skb_push. This extra
>   headroom has no use in this function. It also has no use in the
>   upper-layer function that this function passes the skb to
>   (x25_lapb_receive_frame in net/x25/x25_dev.c).
> So logically skb_cow should instead be called before skb_push.
> 
> Cc: Eric Dumazet 
> Cc: Martin Schiller 
> Signed-off-by: Xie He 

Applied, thank you.


Re: [PATCH v5 5/6] kprobes: Use text_alloc() and text_free()

2020-07-24 Thread Jarkko Sakkinen
On Fri, Jul 24, 2020 at 11:27:46AM +0200, Ingo Molnar wrote:
> 
> * Jarkko Sakkinen  wrote:
> 
> > Use text_alloc() and text_free() instead of module_alloc() and
> > module_memfree() when an arch provides them.
> > 
> > Cc: linux...@kvack.org
> > Cc: Andi Kleen 
> > Cc: Masami Hiramatsu 
> > Cc: Peter Zijlstra 
> > Signed-off-by: Jarkko Sakkinen 
> > ---
> >  kernel/kprobes.c | 9 +
> >  1 file changed, 9 insertions(+)
> > 
> > diff --git a/kernel/kprobes.c b/kernel/kprobes.c
> > index 4e46d96d4e16..611fcda9f6bf 100644
> > --- a/kernel/kprobes.c
> > +++ b/kernel/kprobes.c
> > @@ -40,6 +40,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  
> >  #define KPROBE_HASH_BITS 6
> >  #define KPROBE_TABLE_SIZE (1 << KPROBE_HASH_BITS)
> > @@ -111,12 +112,20 @@ enum kprobe_slot_state {
> >  
> >  void __weak *alloc_insn_page(void)
> >  {
> > +#ifdef CONFIG_ARCH_HAS_TEXT_ALLOC
> > +   return text_alloc(PAGE_SIZE);
> > +#else
> > return module_alloc(PAGE_SIZE);
> > +#endif
> >  }
> >  
> >  void __weak free_insn_page(void *page)
> >  {
> > +#ifdef CONFIG_ARCH_HAS_TEXT_ALLOC
> > +   text_free(page);
> > +#else
> > module_memfree(page);
> > +#endif
> >  }
> 
> I've read the observations in the other threads, but this #ifdef 
> jungle is silly, it's a de-facto open coded text_alloc() with a 
> module_alloc() fallback...

In the previous version I had:

  
https://lore.kernel.org/lkml/20200717030422.679972-4-jarkko.sakki...@linux.intel.com/

and I had just calls to text_alloc() and text_free() in corresponding
snippet to the above.

I got this feedback from Mike:

  https://lore.kernel.org/lkml/20200718162359.ga2919...@kernel.org/

I'm not still sure that I fully understand this feedback as I don't see
any inherent and obvious difference to the v4. In that version fallbacks
are to module_alloc() and module_memfree() and text_alloc() and
text_memfree() can be overridden by arch.

> Thanks,
> 
>   Ingo

/Jarkko


Re: [v7, PATCH 2/7] mtk-mmsys: add mmsys private data

2020-07-24 Thread Yongqiang Niu
On Sat, 2020-07-25 at 10:11 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
> 
> Yongqiang Niu  於 2020年7月23日 週四 上午10:05寫道:
> >
> > add mmsys private data
> >
> > Feature: drm/mediatek
> > Signed-off-by: Yongqiang Niu 
> > ---
> >  drivers/soc/mediatek/Makefile |   1 +
> >  drivers/soc/mediatek/mmsys/Makefile   |   2 +
> >  drivers/soc/mediatek/mmsys/mt2701-mmsys.c | 250 +++
> >  drivers/soc/mediatek/mtk-mmsys.c  | 271 
> > +-
> >  include/linux/soc/mediatek/mtk-mmsys.h|  15 ++
> >  5 files changed, 314 insertions(+), 225 deletions(-)
> >  create mode 100644 drivers/soc/mediatek/mmsys/Makefile
> >  create mode 100644 drivers/soc/mediatek/mmsys/mt2701-mmsys.c
> >
> > diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile
> > index 2afa7b9..b37ac2c 100644
> > --- a/drivers/soc/mediatek/Makefile
> > +++ b/drivers/soc/mediatek/Makefile
> > @@ -3,3 +3,4 @@ obj-$(CONFIG_MTK_CMDQ) += mtk-cmdq-helper.o
> >  obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o
> >  obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o
> >  obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
> > +obj-$(CONFIG_MTK_MMSYS) += mmsys/
> > diff --git a/drivers/soc/mediatek/mmsys/Makefile 
> > b/drivers/soc/mediatek/mmsys/Makefile
> > new file mode 100644
> > index 000..33b0dab
> > --- /dev/null
> > +++ b/drivers/soc/mediatek/mmsys/Makefile
> > @@ -0,0 +1,2 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
> > +obj-y += mt2701-mmsys.o
> > diff --git a/drivers/soc/mediatek/mmsys/mt2701-mmsys.c 
> > b/drivers/soc/mediatek/mmsys/mt2701-mmsys.c
> > new file mode 100644
> > index 000..b8e53b0
> > --- /dev/null
> > +++ b/drivers/soc/mediatek/mmsys/mt2701-mmsys.c
> > @@ -0,0 +1,250 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +//
> > +// Copyright (c) 2020 MediaTek Inc.
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#define DISP_REG_CONFIG_DISP_OVL0_MOUT_EN  0x040
> > +#define DISP_REG_CONFIG_DISP_OVL1_MOUT_EN  0x044
> > +#define DISP_REG_CONFIG_DISP_OD_MOUT_EN0x048
> > +#define DISP_REG_CONFIG_DISP_GAMMA_MOUT_EN 0x04c
> > +#define DISP_REG_CONFIG_DISP_UFOE_MOUT_EN  0x050
> > +#define DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0x084
> > +#define DISP_REG_CONFIG_DISP_COLOR1_SEL_IN 0x088
> > +#define DISP_REG_CONFIG_DSIE_SEL_IN0x0a4
> > +#define DISP_REG_CONFIG_DSIO_SEL_IN0x0a8
> > +#define DISP_REG_CONFIG_DPI_SEL_IN 0x0ac
> > +#define DISP_REG_CONFIG_DISP_RDMA2_SOUT0x0b8
> > +#define DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN 0x0c4
> > +#define DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN 0x0c8
> > +#define DISP_REG_CONFIG_MMSYS_CG_CON0  0x100
> > +
> > +#define DISP_REG_CONFIG_DISP_OVL_MOUT_EN   0x030
> > +#define DISP_REG_CONFIG_OUT_SEL0x04c
> > +#define DISP_REG_CONFIG_DSI_SEL0x050
> > +#define DISP_REG_CONFIG_DPI_SEL0x064
> > +
> > +#define OVL0_MOUT_EN_COLOR00x1
> > +#define OD_MOUT_EN_RDMA0   0x1
> > +#define OD1_MOUT_EN_RDMA1  BIT(16)
> > +#define UFOE_MOUT_EN_DSI0  0x1
> > +#define COLOR0_SEL_IN_OVL0 0x1
> > +#define OVL1_MOUT_EN_COLOR10x1
> > +#define GAMMA_MOUT_EN_RDMA10x1
> > +#define RDMA0_SOUT_DPI00x2
> > +#define RDMA0_SOUT_DPI10x3
> > +#define RDMA0_SOUT_DSI10x1
> > +#define RDMA0_SOUT_DSI20x4
> > +#define RDMA0_SOUT_DSI30x5
> > +#define RDMA1_SOUT_DPI00x2
> > +#define RDMA1_SOUT_DPI10x3
> > +#define RDMA1_SOUT_DSI10x1
> > +#define RDMA1_SOUT_DSI20x4
> > +#define RDMA1_SOUT_DSI30x5
> > +#define RDMA2_SOUT_DPI00x2
> > +#define RDMA2_SOUT_DPI10x3
> > +#define RDMA2_SOUT_DSI10x1
> > +#define RDMA2_SOUT_DSI20x4
> > +#define RDMA2_SOUT_DSI30x5
> > +#define DPI0_SEL_IN_RDMA1  0x1
> > +#define DPI0_SEL_IN_RDMA2  0x3
> > +#define DPI1_SEL_IN_RDMA1  (0x1 << 8)
> > +#define DPI1_SEL_IN_RDMA2  (0x3 << 8)
> > +#define DSI0_SEL_IN_RDMA1  0x1
> > +#define DSI0_SEL_IN_RDMA2  0x4
> > +#define DSI1_SEL_IN_RDMA1  0x1
> > +#define DSI1_SEL_IN_RDMA2  0x4
> > +#define DSI2_SEL_IN_RDMA1  (0x1 << 16)
> > +#define DSI2_SEL_IN_RDMA2  (0x4 << 16)
> > +#define DSI3_SEL_IN_RDMA1   

Re: [PATCH v5 0/4] Add USB PHY support for new Ingenic SoCs.

2020-07-24 Thread Zhou Yanjie

Hello Felipe,

在 2020/7/23 下午5:19, Felipe Balbi 写道:

周琰杰 (Zhou Yanjie)  writes:


1.separate the adjustments to the code style into
   a separate patch.
2.Modify the help message, make it more future-proof.
3.Drop the unnecessary comment about hardware reset.
4.Create 'soc_info' structures instead having ID_* as platform data.

For v5.10, make sure to move your phy driver to drivers/phy.


Sure, I will move it to drivers/phy in next version.

Thanks and best regards!



Re: [PATCH] drm/vkms: add missing drm_crtc_vblank_put to the get/put pair on flush

2020-07-24 Thread Sidong Yang
On Wed, Jul 22, 2020 at 05:17:05PM +0200, Daniel Vetter wrote:
> On Wed, Jul 22, 2020 at 4:06 PM Melissa Wen  wrote:
> >
> > On 07/22, dan...@ffwll.ch wrote:
> > > On Wed, Jul 22, 2020 at 08:04:11AM -0300, Melissa Wen wrote:
> > > > This patch adds a missing drm_crtc_vblank_put op to the pair
> > > > drm_crtc_vblank_get/put (inc/decrement counter to guarantee vblanks).
> > > >
> > > > It clears the execution of the following kms_cursor_crc subtests:
> > > > 1. pipe-A-cursor-[size,alpha-opaque, NxN-(on-screen, off-screen, 
> > > > sliding,
> > > >random, fast-moving])] - successful when running individually.
> > > > 2. pipe-A-cursor-dpms passes again
> > > > 3. pipe-A-cursor-suspend also passes
> > > >
> > > > The issue was initially tracked in the sequential execution of IGT
> > > > kms_cursor_crc subtest: when running the test sequence or one of its
> > > > subtests twice, the odd execs complete and the pairs get stuck in an
> > > > endless wait. In the IGT code, calling a wait_for_vblank before the 
> > > > start
> > > > of CRC capture prevented the busy-wait. But the problem persisted in the
> > > > pipe-A-cursor-dpms and -suspend subtests.
> > > >
> > > > Checking the history, the pipe-A-cursor-dpms subtest was successful 
> > > > when,
> > > > in vkms_atomic_commit_tail, instead of using the flip_done op, it used
> > > > wait_for_vblanks. Another way to prevent blocking was wait_one_vblank 
> > > > when
> > > > enabling crtc. However, in both cases, pipe-A-cursor-suspend persisted
> > > > blocking in the 2nd start of CRC capture, which may indicate that
> > > > something got stuck in the step of CRC setup. Indeed, wait_one_vblank in
> > > > the crc setup was able to sync things and free all kms_cursor_crc
> > > > subtests.
> > > >
> > > > Tracing and comparing a clean run with a blocked one:
> > > > - in a clean one, vkms_crtc_atomic_flush enables vblanks;
> > > > - when blocked, only in next op, vkms_crtc_atomic_enable, the vblanks
> > > > started. Moreover, a series of vkms_vblank_simulate flow out until
> > > > disabling vblanks.
> > > > Also watching the steps of vkms_crtc_atomic_flush, when the very first
> > > > drm_crtc_vblank_get returned an error, the subtest crashed. On the other
> > > > hand, when vblank_get succeeded, the subtest completed. Finally, 
> > > > checking
> > > > the flush steps: it increases counter to hold a vblank reference (get),
> > > > but there isn't a op to decreased it and release vblanks (put).
> > > >
> > > > Cc: Daniel Vetter 
> > > > Cc: Rodrigo Siqueira 
> > > > Cc: Haneen Mohammed 
> > > > Signed-off-by: Melissa Wen 
> > > > ---
> > > >  drivers/gpu/drm/vkms/vkms_crtc.c | 1 +
> > > >  1 file changed, 1 insertion(+)
> > > >
> > > > diff --git a/drivers/gpu/drm/vkms/vkms_crtc.c 
> > > > b/drivers/gpu/drm/vkms/vkms_crtc.c
> > > > index ac85e17428f8..a99d6b4a92dd 100644
> > > > --- a/drivers/gpu/drm/vkms/vkms_crtc.c
> > > > +++ b/drivers/gpu/drm/vkms/vkms_crtc.c
> > > > @@ -246,6 +246,7 @@ static void vkms_crtc_atomic_flush(struct drm_crtc 
> > > > *crtc,
> > > >
> > > > spin_unlock(>dev->event_lock);
> > > >
> > > > +   drm_crtc_vblank_put(crtc);
> > >
> > > Uh so I reviewed this a bit more carefully now, and I dont think this is
> > > the correct bugfix. From the kerneldoc of drm_crtc_arm_vblank_event():
> > >
> > >  * Caller must hold a vblank reference for the event @e acquired by a
> > >  * drm_crtc_vblank_get(), which will be dropped when the next vblank 
> > > arrives.
> > >
> > > So when we call drm_crtc_arm_vblank_event then the vblank_put gets called
> > > for us. And that's the only case where we successfully acquired a vblank
> > > interrupt reference since on failure of drm_crtc_vblank_get (0 indicates
> > > success for that function, failure negative error number) we directly send
> > > out the event.
> > >
> > > So something else fishy is going on, and now I'm totally confused why this
> > > even happens.
> > >
> > > We also have a pile of WARN_ON checks in drm_crtc_vblank_put to make sure
> > > we don't underflow the refcount, so it's also not that I think (except if
> > > this patch creates more WARNING backtraces).
> > >
> > > But clearly it changes behaviour somehow ... can you try to figure out
> > > what changes? Maybe print out the vblank->refcount at various points in
> > > the driver, and maybe also trace when exactly the fake vkms vblank hrtimer
> > > is enabled/disabled ...
> >
> > :(
> >
> > I can check these, but I also have other suspicions. When I place the
> > drm_crct_vblank_put out of the if (at the end of flush), it not only solve
> > the issue of blocking on kms_cursor_crc, but also the WARN_ON on kms_flip
> > doesn't appear anymore (a total cleanup). Just after:
> >
> > vkms_output->composer_state = to_vkms_crtc_state(crtc->state);
> >
> > looks like there is something stuck around here.
> 
> Hm do you have the full WARNING for this? Maybe this gives me an idea
> what's going wrong.
> 
> > Besides, there is 

Re: [QUESTION] Sharing a `struct page` across multiple `struct address_space` instances

2020-07-24 Thread Matthew Wilcox
On Fri, Jul 24, 2020 at 05:22:21PM -0700, Vito Caputo wrote:
> Prior to looking at the code, conceptually I was envisioning the pages
> in the reflink source inode's address_space would simply get their
> refcounts bumped as they were added to the dest inode's address_space,
> with some CoW flag set to prevent writes.
> 
> But there seems to be a fundamental assumption that a `struct page`
> would only belong to a single `struct address_space` at a time, as it
> has single `mapping` and `index` members for reverse mapping the page
> to its address_space.
> 
> Am I completely lost here or does it really look like a rather
> invasive modification to support this feature?
> 
> I have vague memories of Dave Chinner mentioning work towards sharing
> pages across address spaces in the interests of getting reflink copies
> more competitive with overlayfs in terms of page cache utilization.

It's invasive.  Dave and I have chatted about this in the past.  I've done
no work towards it (... a little busy right now with THPs in the page
cache ...) but I have a design in mind.

The fundamental idea is to use the DAX support to refer to pages which
actually belong to a separate address space.  DAX entries are effectively
PFN entries.  So there would be a clear distinction between "I looked
up a page which actually belongs to this address space" and "I looked
up a page which is shared with a different address space".  My thinking
has been that if files A and B are reflinked, both A and B would see
DAX entries in their respective page caches.  The page would belong to
a third address space which might be the block device's address space,
or maybe there would be an address space per shared fragment (since
files can share fragments that are at different offsets from each other).

There are a lot of details to get right around this approach.
Importantly, there _shouldn't_ be a refcount from each of file A and
B on the page.  Instead the refcount from files A and B should be on
the fragment.  When the fragment's refcount goes to zero, we know there
are no more references to the fragment and all its pages can be freed.

That means that if we reflink B to C, we don't have to walk every page
in the file and increase its refcount again.

So, are you prepared to do a lot of work, or were you thinking this
would be a quick hack?  Because I'm willing to advise on a big project,
but if you're thinking this will be quick, and don't have time for a
big project, it's probably time to stop here.

---

Something that did occur to me while writing this is that if you just want
read-only duplicates of files to work, you could make inode->i_mapping
point to a different address_space instead of >i_data.  There's
probabyl a quick hack solution there.


[PATCH] svc: add missed destroy_workqueue when gb_svc_create fails

2020-07-24 Thread Li Heng
destroy_workqueue() should be called to destroy svc->wq
when gb_svc_create() init resources fails.

Fixes: 8465def499c7 ("staging: greybus: move the greybus core to 
drivers/greybus")
Reported-by: Hulk Robot 
Signed-off-by: Li Heng 
---
 drivers/greybus/svc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/greybus/svc.c b/drivers/greybus/svc.c
index ce7740e..38f858f 100644
--- a/drivers/greybus/svc.c
+++ b/drivers/greybus/svc.c
@@ -1340,6 +1340,7 @@ struct gb_svc *gb_svc_create(struct gb_host_device *hd)
 
 err_put_device:
put_device(>dev);
+   destroy_workqueue(svc->wq);
return NULL;
 }
 
-- 
2.7.4



Re: [PATCH v2 0/3] net: dsa: mv88e6xxx: port mtu support

2020-07-24 Thread David Miller
From: Chris Packham 
Date: Fri, 24 Jul 2020 11:21:19 +1200

> This series connects up the mv88e6xxx switches to the dsa infrastructure for
> configuring the port MTU. The first patch is also a bug fix which might be a
> candiatate for stable.
> 
> I've rebased this series on top of net-next/master to pick up Andrew's change
> for the gigabit switches. Patch 1 and 2 are unchanged (aside from adding
> Andrew's Reviewed-by). Patch 3 is reworked to make use of the existing mtu
> support.

Series applied, thanks Chris.


Re: [PATCH] amdgpu_dm: fix nonblocking atomic commit use-after-free

2020-07-24 Thread Mazin Rezk
On Friday, July 24, 2020 5:19 PM, Paul Menzel  wrote:

> Dear Kees,
>
> Am 24.07.20 um 19:33 schrieb Kees Cook:
>
> > On Fri, Jul 24, 2020 at 09:45:18AM +0200, Paul Menzel wrote:
> >
> > > Am 24.07.20 um 00:32 schrieb Kees Cook:
> > >
> > > > On Thu, Jul 23, 2020 at 09:10:15PM +, Mazin Rezk wrote:
> > > > As Linux 5.8-rc7 is going to be released this Sunday, I wonder, if 
> > > > commit
> > > > 3202fa62f ("slub: relocate freelist pointer to middle of object") 
> > > > should be
> > > > reverted for now to fix the regression for the users according to 
> > > > Linux’ no
> > > > regression policy. Once the AMDGPU/DRM driver issue is fixed, it can be
> > > > reapplied. I know it’s not optimal, but as some testing is going to be
> > > > involved for the fix, I’d argue it’s the best option for the users.
> >
> > Well, the SLUB defense was already released in v5.7, so I'm not sure it
> > really helps for amdgpu_dm users seeing it there too.
>
> In my opinion, it would help, as the stable release could pick up the
> revert, ones it’s in Linus’ master branch.
>
> > There was a fix to disable the async path for this driver that worked
> > around the bug too, yes? That seems like a safer and more focused
> > change that doesn't revert the SLUB defense for all users, and would
> > actually provide a complete, I think, workaround whereas reverting
> > the SLUB change means the race still exists. For example, it would be
> > hit with slab poisoning, etc.
>
> I do not know. If there is such a fix, that would be great. But if you
> do not know, how should a normal user? ;-)
>
> Kind regards,
>
> Paul
>
> Kind regards,
>
> Paul

If we're talking about workarounds now, I suggest simply swapping the base
and context variables in struct dm_atomic_state. By that way, we won't need
to change non-amdgpu parts of the code (e.g. by reverting the SLUB patch).

Prior to 3202fa62f, the freelist pointer was stored in dm_state->base which
was never dereferenced and therefore caused no noticeable issue. After
3202fa62f, the freelist pointer is stored in the middle of the struct (i.e.
dm_state->context).

Swapping the position of the base and context variables in dm_atomic_state
should, in theory, revert this code back to it's pre-5.7 state since the
code would be back to overwriting base instead.

If we decide to use this workaround, I can write the patch and do more
extended tests to confirm it works around the issues.

That said, I haven't seen the async disabling patch. If you could link to
it, I'd be glad to test it out and perhaps we can use that instead.

Thanks,
Mazin Rezk



Re: [PATCH v3 5/6] powerpc/pseries: implement paravirt qspinlocks for SPLPAR

2020-07-24 Thread Waiman Long

On 7/24/20 3:10 PM, Waiman Long wrote:

On 7/24/20 4:16 AM, Will Deacon wrote:

On Thu, Jul 23, 2020 at 08:47:59PM +0200, pet...@infradead.org wrote:

On Thu, Jul 23, 2020 at 02:32:36PM -0400, Waiman Long wrote:
BTW, do you have any comment on my v2 lock holder cpu info 
qspinlock patch?
I will have to update the patch to fix the reported 0-day test 
problem, but

I want to collect other feedback before sending out v3.

I want to say I hate it all, it adds instructions to a path we spend an
aweful lot of time optimizing without really getting anything back for
it.

Will, how do you feel about it?

I can see it potentially being useful for debugging, but I hate the
limitation to 256 CPUs. Even arm64 is hitting that now.


After thinking more about that, I think we can use all the remaining 
bits in the 16-bit locked_pending. Reserving 1 bit for locked and 1 
bit for pending, there are 14 bits left. So as long as NR_CPUS < 16k 
(requirement for 16-bit locked_pending), we can put all possible cpu 
numbers into the lock. We can also just use smp_processor_id() without 
additional percpu data. 


Sorry, that doesn't work. The extra bits in the pending byte won't get 
cleared on unlock. That will have noticeable performance impact. 
Clearing the pending byte on unlock will cause other performance 
problem. So I guess we will have to limit the cpu number in the locked byte.


Regards,
Longman



Re: [PATCH v5 1/6] kprobes: Remove dependency to the module_mutex

2020-07-24 Thread Jarkko Sakkinen
On Fri, Jul 24, 2020 at 11:17:11AM +0200, Ingo Molnar wrote:
> 
> * Jarkko Sakkinen  wrote:
> 
> > --- a/kernel/kprobes.c
> > +++ b/kernel/kprobes.c
> > @@ -564,7 +564,7 @@ static void kprobe_optimizer(struct work_struct *work)
> > cpus_read_lock();
> > mutex_lock(_mutex);
> > /* Lock modules while optimizing kprobes */
> > -   mutex_lock(_mutex);
> > +   lock_modules();
> >  
> > /*
> >  * Step 1: Unoptimize kprobes and collect cleaned (unused and disarmed)
> > @@ -589,7 +589,7 @@ static void kprobe_optimizer(struct work_struct *work)
> > /* Step 4: Free cleaned kprobes after quiesence period */
> > do_free_cleaned_kprobes();
> >  
> > -   mutex_unlock(_mutex);
> > +   unlock_modules();
> > mutex_unlock(_mutex);
> > cpus_read_unlock();
> 
> BTW., it would be nice to expand on the comments above - exactly which 
> parts of the modules code is being serialized against and why?
> 
> We already hold the text_mutex here, which should protect against most 
> kprobes related activities interfering - and it's unclear (to me) 
> which part of the modules code is being serialized with here, and the 
> 'lock modules while optimizing kprobes' comments is unhelpful. :-)
> 
> Thanks,
> 
>   Ingo

AFAIK, only if you need to call find_module(), you ever need to acquire
this mutex. 99% of time it is internally taken care by kernel/module.c.

I cannot make up any obvious reason to acquire it here.

/Jarkko


Re: [PATCH 00/40] Set 5: Penultimate set of SCSI related W=1 warnings

2020-07-24 Thread Martin K. Petersen
On Thu, 23 Jul 2020 13:24:06 +0100, Lee Jones wrote:

> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
> 
> Hopefully this is the penultimate set.
> 
> Lee Jones (40):
>   scsi: lpfc: lpfc_els: Fix some function parameter descriptions
>   scsi: lpfc: lpfc_hbadisc: Fix kerneldoc parameter
> formatting/misnaming/missing issues
>   scsi: ufs: ufs-qcom: Demote nonconformant kerneldoc headers
>   scsi: bnx2i: bnx2i_init: Fix parameter misnaming in function header
>   scsi: ufs: ufs-exynos: Make stubs 'static inline'
>   scsi: ufs: ufs-exynos: Demote seemingly unintentional kerneldoc header
>   scsi: bfa: bfa_port: Staticify local functions
>   scsi: bnx2i: bnx2i_sysfs: Add missing descriptions for 'attr'
> parameter
>   scsi: bfa: bfa_fcpim: Remove set but unused variable 'rp'
>   scsi: bfa: bfa_fcpim: Demote seemingly unintentional kerneldoc header
>   scsi: qedi: qedi_main: Remove 2 set but unused variables
>   scsi: ips: Remove some set but unused variables
>   scsi: ips: Convert strnlen() to memcpy() since result should not be
> NUL terminated
>   scsi: qla4xxx: ql4_83xx: Remove set but unused variable 'status'
>   scsi: lpfc: lpfc_init: Use __printf() format notation
>   scsi: lpfc: lpfc_init: Add and rename a whole bunch of function
> parameter descriptions
>   scsi: qla4xxx: ql4_bsg: Rename function parameter descriptions
>   scsi: lpfc: lpfc_mbox: Fix a bunch of kerneldoc misdemeanours
>   scsi: lpfc: lpfc_nportdisc: Add description for lpfc_release_rpi()'s
> 'ndlpl param
>   scsi: bfa: bfa_ioc: Remove a few unused variables 'pgoff' and 't'
>   scsi: csiostor: csio_hw: Mark known unused variable as __always_unused
>   scsi: csiostor: csio_hw_t5: Remove 2 unused variables
> {mc,edc}_bist_status_rdata_reg
>   scsi: bfa: bfa_ioc: Staticify non-external functions
>   scsi: csiostor: csio_rnode: Add missing description for
> csio_rnode_fwevt_handler()'s 'fwevt' param
>   scsi: bfa: bfa_ioc_ct: Demote non-compliant kerneldoc headers to
> standard comments
>   scsi: mvsas: mv_init: Place 'core_nr' inside correct clause
>   scsi: bfa: bfa_fcs_rport: Remove unused variable 'adisc'
>   scsi: bnx2i: bnx2i_hwi: Fix a whole host of kerneldoc issues
>   scsi: bnx2i: bnx2i_iscsi: Add, remove and edit some function parameter
> descriptions
>   scsi: be2iscsi: be_iscsi: Correct misdocumentation of function param
> 'ep'
>   scsi: qedi: qedi_fw: Remove set but unused variable 'tmp'
>   scsi: esas2r: esas2r: Add braces around the one-line if()
>   scsi: bfa: bfa_ioc: Demote non-kerneldoc headers down to standard
> comment blocks
>   scsi: bfa: bfa_core: Demote seemingly unintentional kerneldoc header
>   scsi: bfa: bfa_svc: Demote seemingly unintentional kerneldoc header
>   scsi: qedi: qedi_main: Demote seemingly unintentional kerneldoc header
>   scsi: qedi: qedi_iscsi: Staticify non-external function
> 'qedi_get_iscsi_error'
>   scsi: bfa: bfa_ioc: Ensure a blank line precedes next function/header
>   scsi: bnx2i: bnx2i_iscsi: Add parameter description and rename another
>   scsi: esas2r: esas2r_log: Demote a few non-conformant kerneldoc
> headers
> 
> [...]

Applied to 5.9/scsi-next, thanks!

[01/40] scsi: lpfc: Fix some function parameter descriptions
https://git.kernel.org/mkp/scsi/c/a0e4a64f8650
[02/40] scsi: lpfc: Fix kerneldoc parameter formatting/misnaming/missing issues
https://git.kernel.org/mkp/scsi/c/e415f2a2acd9
[03/40] scsi: ufs: ufs-qcom: Demote nonconformant kerneldoc headers
https://git.kernel.org/mkp/scsi/c/bc5b681614cc
[04/40] scsi: bnx2i: Fix parameter misnaming in function header
https://git.kernel.org/mkp/scsi/c/b4688a7e01e5
[06/40] scsi: ufs: ufs-exynos: Demote seemingly unintentional kerneldoc header
https://git.kernel.org/mkp/scsi/c/b44cc4a40bd6
[07/40] scsi: bfa: Staticify local functions
https://git.kernel.org/mkp/scsi/c/004a7a79
[08/40] scsi: bnx2i: Add missing descriptions for 'attr' parameter
https://git.kernel.org/mkp/scsi/c/2ad6e0c339d2
[09/40] scsi: bfa: Remove set but unused variable 'rp'
https://git.kernel.org/mkp/scsi/c/70b4de0bb928
[10/40] scsi: bfa: Demote seemingly unintentional kerneldoc header
https://git.kernel.org/mkp/scsi/c/7106de1d8a75
[11/40] scsi: qedi: Remove 2 set but unused variables
https://git.kernel.org/mkp/scsi/c/e4020e0835ed
[12/40] scsi: ips: Remove some set but unused variables
https://git.kernel.org/mkp/scsi/c/ffe1757e45aa
[13/40] scsi: ips: Convert strnlen() to memcpy() since result should not be NUL 
terminated
https://git.kernel.org/mkp/scsi/c/00e245655e75
[14/40] scsi: qla4xxx: Remove set but unused variable 'status'
https://git.kernel.org/mkp/scsi/c/6e3f4f68821b
[15/40] scsi: lpfc: Use __printf() format notation
https://git.kernel.org/mkp/scsi/c/7fa03c77cd54
[16/40] scsi: lpfc: Add and 

Re: [PATCH 00/40] Set 4: Next set of SCSI related W=1 warnings

2020-07-24 Thread Martin K. Petersen
On Tue, 21 Jul 2020 17:41:08 +0100, Lee Jones wrote:

> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
> 
> This brings the total of W=1 SCSI wanings from 1690 in v5.8-rc1 to 817.
> 
> Lee Jones (40):
>   scsi: arcmsr: arcmsr_hba: Remove statement with no effect
>   scsi: aic7xxx: aic79xx_core: Remove a bunch of unused variables
>   scsi: aacraid: sa: Add descriptions for missing parameters
>   scsi: aacraid: rkt: Add missing description for 'dev'
>   scsi: aacraid: nark: Add missing description for 'dev'
>   scsi: aic94xx: aic94xx_dev: Fix a couple of kerneldoc formatting
> issues
>   scsi: aacraid: src: Add descriptions for missing parameters
>   scsi: aic94xx: aic94xx_tmf: Fix kerneldoc formatting issue with 'task'
>   scsi: pm8001: pm8001_sas: Fix strncpy() warning
>   scsi: pm8001: pm8001_sas: Mover function header and supply some
> missing parameter descriptions
>   scsi: pm8001: pm8001_ctl: Add descriptions for unused 'attr' function
> parameters
>   scsi: qla4xxx: ql4_init: Remove set but unused variable 'func_number'
>   scsi: qla4xxx: ql4_init: Check return value of pci_set_mwi()
>   scsi: qla4xxx: ql4_83xx: Move 'qla4_83xx_reg_tbl' from shared header
>   scsi: aic7xxx: aic79xx_core: Remove set but unused variables
> 'targ_info' and 'value'
>   scsi: pm8001: pm8001_hwi: Fix a bunch of kerneldoc issues
>   scsi: pm8001: pm80xx_hwi: Fix some function documentation issues
>   scsi: pm8001: pm8001_hwi: Remove a bunch of set but unused variables
>   scsi: qla4xxx: ql4_nx: Move 'qla4_82xx_reg_tbl' to the only place its
> used
>   scsi: lpfc: lpfc_sli: Remove unused variable 'pg_addr'
>   scsi: qla4xxx: ql4_mbx: Fix-up incorrectly documented parameter
>   scsi: qla4xxx: ql4_iocb: Fix incorrectly named function parameter
>   scsi: lpfc: lpfc_sli: Fix-up around 120 documentation issues
>   scsi: pm8001: pm8001_hwi: Remove unused variable 'value'
>   scsi: pm8001: pm80xx_hwi: Staticify 'pm80xx_pci_mem_copy' and
> 'mpi_set_phy_profile_req'
>   scsi: qla4xxx: ql4_os: Fix some kerneldoc parameter documentation
> issues
>   scsi: qla4xxx: ql4_isr: Repair function documentation headers
>   scsi: lpfc: lpfc_mem: Provide description for lpfc_mem_alloc()'s
> 'align' param
>   scsi: qla4xxx: ql4_init: Document qla4xxx_process_ddb()'s 'conn_err'
>   scsi: lpfc: lpfc_ct: Fix-up formatting/docrot where appropriate
>   scsi: csiostor: csio_init: Fix misnamed function parameter
>   scsi: qla4xxx: ql4_nx: Remove three set but unused variables
>   scsi: qla4xxx: ql4_nx: Supply description for 'code'
>   scsi: csiostor: csio_lnode: Demote kerneldoc that fails to meet the
> criteria
>   scsi: bfa: bfad_bsg: Staticify all local functions
>   scsi: lpfc: lpfc_sli: Ensure variable has the same stipulations as
> code using it
>   scsi: sym53c8xx_2: sym_glue: Add missing description for 'pdev'
>   scsi: sym53c8xx_2: sym_hipd: Ensure variable has the same stipulations
> as code using it
>   scsi: mvsas: mv_init: Move 'core_nr' inside #ifdef and remove unused
> variable 'res_flag'
>   scsi: cxgbi: cxgb3i: cxgb3i: Remove bad documentation and demote
> kerneldoc header
> 
> [...]

Applied to 5.9/scsi-next, thanks!

[01/40] scsi: arcmsr: arcmsr_hba: Remove statement with no effect
https://git.kernel.org/mkp/scsi/c/7c7ef829ad08
[02/40] scsi: aic7xxx: aic79xx_core: Remove a bunch of unused variables
https://git.kernel.org/mkp/scsi/c/84dc1a1d5459
[03/40] scsi: aacraid: Add descriptions for missing parameters
https://git.kernel.org/mkp/scsi/c/baef36891460
[04/40] scsi: aacraid: Add missing description for 'dev'
https://git.kernel.org/mkp/scsi/c/3c4538f80b09
[05/40] scsi: aacraid: Add missing description for 'dev'
https://git.kernel.org/mkp/scsi/c/5d9d46b93d0a
[06/40] scsi: aic94xx: Fix a couple of kerneldoc formatting issues
https://git.kernel.org/mkp/scsi/c/ee37a6e6d2a1
[07/40] scsi: aacraid: Add descriptions for missing parameters
https://git.kernel.org/mkp/scsi/c/a13689118f63
[08/40] scsi: aic94xx: Fix kerneldoc formatting issue with 'task'
https://git.kernel.org/mkp/scsi/c/45c21cec3867
[10/40] scsi: pm8001: Move function header and supply some missing parameter 
descriptions
https://git.kernel.org/mkp/scsi/c/a0cf5ce40d12
[11/40] scsi: pm8001: Add descriptions for unused 'attr' function parameters
https://git.kernel.org/mkp/scsi/c/cd2eebfd4028
[12/40] scsi: qla4xxx: Remove set but unused variable 'func_number'
https://git.kernel.org/mkp/scsi/c/4c2de9c54112
[13/40] scsi: qla4xxx: Check return value of pci_set_mwi()
https://git.kernel.org/mkp/scsi/c/b854460053ec
[14/40] scsi: qla4xxx: Move 'qla4_83xx_reg_tbl' from shared header
https://git.kernel.org/mkp/scsi/c/3ca2c203ed99
[15/40] scsi: aic7xxx: Remove set but unused variables 'targ_info' and 'value'

Re: [PATCH] net: cdc_ncm: USB_NET_CDC_NCM selects USB_NET_CDCETHER

2020-07-24 Thread David Miller
From: t...@redhat.com
Date: Thu, 23 Jul 2020 07:22:10 -0700

> From: Tom Rix 
> 
> A link error
> 
> ld: drivers/net/usb/cdc_ncm.o:
>   undefined reference to `usbnet_cdc_update_filter'
> 
> usbnet_cdc_update_filter is defined in cdc_ether.c
> Building of cdc_ether.o is controlled by USB_NET_CDCETHER
> 
> Building of cdc_ncm.o is controlled by USB_NET_CDC_NCM
> 
> So add a select USB_NET_CDCETHER to USB_NET_CDC_NCM
> 
> Signed-off-by: Tom Rix 

Please indicate the appropriate target tree ('net' or 'net-next') in
your Subject line f.e. "[PATCH net-next] ..."

Please provide an appropriate and properly formatted Fixes: tag.

Thank you.


[PATCH] RDMA/core: fix return error value to negative

2020-07-24 Thread Li Heng
Fixes: 8d9ec9addd6c (IB/core: Add a sgid_attr pointer to struct rdma_ah_attr)
Reported-by: Hulk Robot 
Signed-off-by: Li Heng 
---
 drivers/infiniband/core/verbs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/infiniband/core/verbs.c b/drivers/infiniband/core/verbs.c
index 53d6505c..f369f0a 100644
--- a/drivers/infiniband/core/verbs.c
+++ b/drivers/infiniband/core/verbs.c
@@ -1712,7 +1712,7 @@ static int _ib_modify_qp(struct ib_qp *qp, struct 
ib_qp_attr *attr,
if (!(rdma_protocol_ib(qp->device,
   attr->alt_ah_attr.port_num) &&
  rdma_protocol_ib(qp->device, port))) {
-   ret = EINVAL;
+   ret = -EINVAL;
goto out;
}
}
-- 
2.7.4



Re: [PATCH -next] scsi: lpfc: Add dependency on CPU_FREQ

2020-07-24 Thread Martin K. Petersen
On Tue, 21 Jul 2020 19:30:27 -0700, Guenter Roeck wrote:

> Since commit 317aeb83c92b ("scsi: lpfc: Add blk_io_poll support for
> latency improvment"), the lpfc driver depends on CPUFREQ. Without it,
> builds fail with
> 
> drivers/scsi/lpfc/lpfc_sli.c: In function 'lpfc_init_idle_stat_hb':
> drivers/scsi/lpfc/lpfc_sli.c:7329:26: error:
>   implicit declaration of function 'get_cpu_idle_time'
> 
> [...]

Applied to 5.9/scsi-queue, thanks!

[1/1] scsi: lpfc: Add dependency on CPU_FREQ
  https://git.kernel.org/mkp/scsi/c/e3d2bf6505dd

-- 
Martin K. Petersen  Oracle Linux Engineering


Re: [PATCH] scsi: ppa: Remove superfluous breaks

2020-07-24 Thread Martin K. Petersen
On Tue, 14 Jul 2020 18:59:31 +0800, Yi Wang wrote:

> Remove superfluous breaks, as there is a "return" before them.

Applied to 5.9/scsi-queue, thanks!

[1/1] scsi: ppa: Remove superfluous breaks
  https://git.kernel.org/mkp/scsi/c/6671eebd672c

-- 
Martin K. Petersen  Oracle Linux Engineering


Re: [PATCH v1 0/2] scsi: libsas: An improvement on error handle and tidy-up

2020-07-24 Thread Martin K. Petersen
On Wed, 22 Jul 2020 17:04:01 +0800, Luo Jiaxing wrote:

> This patch introduces an improvement to reduce error handle time and a
> tidy-up, including:
> - postreset() is deleted from sas_sata_ops.
> - Do not perform hard reset and delayed retry on a removed SATA disk. This
> can effectively reduce the error handle duration of hot unplug a SATA disk
> with traffic(reduce about 30s depending on the delay setting of libata).
> 
> [...]

Applied to 5.9/scsi-queue, thanks!

[1/2] scsi: libsas: Remove postreset from sas_sata_ops
  https://git.kernel.org/mkp/scsi/c/3a243c2c3500
[2/2] scsi: libsas: Check link status in ATA prereset()
  https://git.kernel.org/mkp/scsi/c/386533796574

-- 
Martin K. Petersen  Oracle Linux Engineering


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