Re: [PATCH v6 06/18] virt: acrn: Introduce VM management interfaces

2021-01-05 Thread Shuo A Liu

On Tue  5.Jan'21 at 15:03:06 +0100, Greg Kroah-Hartman wrote:

On Tue, Dec 15, 2020 at 06:02:51PM +0800, Shuo A Liu wrote:

On Tue 15.Dec'20 at 11:00:57 +0100, Greg Kroah-Hartman wrote:
> On Tue, Dec 15, 2020 at 05:52:59PM +0800, Shuo A Liu wrote:
> > On Wed  2.Dec'20 at 10:14:29 +0800, Shuo A Liu wrote:
> > > On Tue  1.Dec'20 at 11:09:47 +0100, Greg Kroah-Hartman wrote:
> > > > On Tue, Dec 01, 2020 at 05:38:41PM +0800, shuo.a@intel.com wrote:
> > > > > +  vm_param->reserved0 = 0;
> > > > > +  vm_param->reserved1 = 0;
> > > >
> > > > NO!
> > > >
> > > > This means that userspace can put whatever crud they want in those
> > > > fields, and you will happily zero it out.  Then, when those reserved
> > > > fields are wanted to be used in the future, you will take those values
> > > > from userspace and accept them as a valid value.  But, since userspace
> > > > was sending crud before, now you will take that crud and do something
> > > > with it.
> > > >
> > > > TEST IT to verify that it is zero, that way userspace gets it right the
> > > > first time, and you don't get it wrong later, as you can not change it
> > > > later.
> > >
> > > OK. Thanks for the elaboration. I will test it and return -EINVAL if
> > > it is not zero.
> > >
> >
> > Hi Greg,
> >
> > Would you like to review other patches in this series on this version?
>
> Nope, it's the middle of the merge window, I can't do anything with any
> new patches until after 5.11-rc1 is out.  So I suggest you fix up the
> current issues and send a new patch series once 5.11-rc1 is released.

Got it, thanks!


Did this ever happen?  I don't see a new series anywhere, do you have a
lore.kernel.org link?


Just back to work. :)

Sent new series already. The link is
https://lore.kernel.org/lkml/20210106075055.47226-1-shuo.a@intel.com/

Thanks
shuo


Re: [PATCH 2/2] misc: add support for retimers interfaces on Intel MAX 10 BMC

2021-01-05 Thread Greg KH
On Wed, Jan 06, 2021 at 03:36:07PM +0800, Xu Yilun wrote:
> This driver supports the ethernet retimers (C827) for the Intel PAC
> (Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
> 
> C827 is an Intel(R) Ethernet serdes transceiver chip that supports
> up to 100G transfer. On Intel PAC N3000 there are 2 C827 chips
> managed by the Intel MAX 10 BMC firmware. They are configured in 4 ports
> 10G/25G retimer mode. Host could query their link states and firmware
> version information via retimer interfaces (Shared registers) on Intel
> MAX 10 BMC. The driver creates sysfs interfaces for users to query these
> information.
> 
> Signed-off-by: Xu Yilun 
> ---
>  .../ABI/testing/sysfs-driver-intel-m10-bmc-retimer |  32 +
>  drivers/misc/Kconfig   |  10 ++
>  drivers/misc/Makefile  |   1 +
>  drivers/misc/intel-m10-bmc-retimer.c   | 158 
> +
>  4 files changed, 201 insertions(+)
>  create mode 100644 
> Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-retimer
>  create mode 100644 drivers/misc/intel-m10-bmc-retimer.c
> 
> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-retimer 
> b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-retimer
> new file mode 100644
> index 000..528712a
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-retimer
> @@ -0,0 +1,32 @@
> +What:/sys/bus/platform/devices/n3000bmc-retimer.*.auto/tag
> +Date:Jan 2021
> +KernelVersion:   5.12
> +Contact: Xu Yilun 
> +Description: Read only. Returns the tag of the retimer chip. Now there are 2
> + retimer chips on Intel PAC N3000, they are tagged as
> + 'retimer_A' and 'retimer_B'.
> + Format: "retimer_%c".
> +
> +What:
> /sys/bus/platform/devices/n3000bmc-retimer.*.auto/sbus_version
> +Date:Jan 2021
> +KernelVersion:   5.12
> +Contact: Xu Yilun 
> +Description: Read only. Returns the Transceiver bus firmware version of
> + the retimer chip.
> + Format: "0x%04x".
> +
> +What:
> /sys/bus/platform/devices/n3000bmc-retimer.*.auto/serdes_version
> +Date:Jan 2021
> +KernelVersion:   5.12
> +Contact: Xu Yilun 
> +Description: Read only. Returns the SERDES firmware version of the retimer
> + chip.
> + Format: "0x%04x".
> +
> +What:
> /sys/bus/platform/devices/n3000bmc-retimer.*.auto/link_statusX
> +Date:Jan 2021
> +KernelVersion:   5.12
> +Contact: Xu Yilun 
> +Description: Read only. Returns the status of each line side link. "1" for
> + link up, "0" for link down.
> + Format: "%u".

Who is going to use all of these read-only attributes?

And why isn't this information exported in the "normal" way for network
devices?  Having them as custom sysfs attributes ensures that no
existing tools will work with these at all, right?  Why not do the
standard thing here isntead?

thanks,

greg k-h


[PATCH v4] power/supply: Add ltc4162-l-charger

2021-01-05 Thread Mike Looijmans
Add support for the LTC4162-L Li-Ion battery charger. The driver allows
reading back telemetry and to set some charging options like the input
current limit.

Signed-off-by: Mike Looijmans 
---
v2: Use microohm units instead of milliohm
Add interrupt support using smbalert
Support obtaining cell-count from devicetree
v3: Fix overflows in calculations involving resistor values
v4: Use attr_grp member to register attributes
Report input current/voltage for charger and make battery
voltage and current into sysfs attributes

 drivers/power/supply/Kconfig |   8 +
 drivers/power/supply/Makefile|   1 +
 drivers/power/supply/ltc4162-l-charger.c | 941 +++
 3 files changed, 950 insertions(+)
 create mode 100644 drivers/power/supply/ltc4162-l-charger.c

diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig
index eec646c568b7..23000976cb42 100644
--- a/drivers/power/supply/Kconfig
+++ b/drivers/power/supply/Kconfig
@@ -513,6 +513,14 @@ config CHARGER_LT3651
  Say Y to include support for the Analog Devices (Linear Technology)
  LT3651 battery charger which reports its status via GPIO lines.
 
+config CHARGER_LTC4162L
+   tristate "LTC4162-L charger"
+   depends on I2C
+   select REGMAP_I2C
+   help
+ Say Y to include support for the Analog Devices (Linear Technology)
+ LTC4162-L battery charger connected to I2C.
+
 config CHARGER_MAX14577
tristate "Maxim MAX14577/77836 battery charger driver"
depends on MFD_MAX14577
diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile
index dd4b86318cd9..17b1cf921c44 100644
--- a/drivers/power/supply/Makefile
+++ b/drivers/power/supply/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_CHARGER_LP8788)  += lp8788-charger.o
 obj-$(CONFIG_CHARGER_GPIO) += gpio-charger.o
 obj-$(CONFIG_CHARGER_MANAGER)  += charger-manager.o
 obj-$(CONFIG_CHARGER_LT3651)   += lt3651-charger.o
+obj-$(CONFIG_CHARGER_LTC4162L) += ltc4162-l-charger.o
 obj-$(CONFIG_CHARGER_MAX14577) += max14577_charger.o
 obj-$(CONFIG_CHARGER_DETECTOR_MAX14656)+= max14656_charger_detector.o
 obj-$(CONFIG_CHARGER_MAX77650) += max77650-charger.o
diff --git a/drivers/power/supply/ltc4162-l-charger.c 
b/drivers/power/supply/ltc4162-l-charger.c
new file mode 100644
index ..af97a9a35834
--- /dev/null
+++ b/drivers/power/supply/ltc4162-l-charger.c
@@ -0,0 +1,941 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ *  Driver for Analog Devices (Linear Technology) LTC4162-L charger IC.
+ *  Copyright (C) 2020, Topic Embedded Products
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* Registers (names based on what datasheet uses) */
+#define LTC4162L_EN_LIMIT_ALERTS_REG   0x0D
+#define LTC4162L_EN_CHARGER_STATE_ALERTS_REG   0x0E
+#define LTC4162L_EN_CHARGE_STATUS_ALERTS_REG   0x0F
+#define LTC4162L_CONFIG_BITS_REG   0x14
+#define LTC4162L_IIN_LIMIT_TARGET  0x15
+#define LTC4162L_ARM_SHIP_MODE 0x19
+#define LTC4162L_CHARGE_CURRENT_SETTING0X1A
+#define LTC4162L_VCHARGE_SETTING   0X1B
+#define LTC4162L_C_OVER_X_THRESHOLD0x1C
+#define LTC4162L_MAX_CV_TIME   0X1D
+#define LTC4162L_MAX_CHARGE_TIME   0X1E
+#define LTC4162L_CHARGER_CONFIG_BITS   0x29
+#define LTC4162L_CHARGER_STATE 0x34
+#define LTC4162L_CHARGE_STATUS 0x35
+#define LTC4162L_LIMIT_ALERTS_REG  0x36
+#define LTC4162L_CHARGER_STATE_ALERTS_REG  0x37
+#define LTC4162L_CHARGE_STATUS_ALERTS_REG  0x38
+#define LTC4162L_SYSTEM_STATUS_REG 0x39
+#define LTC4162L_VBAT  0x3A
+#define LTC4162L_VIN   0x3B
+#define LTC4162L_VOUT  0x3C
+#define LTC4162L_IBAT  0x3D
+#define LTC4162L_IIN   0x3E
+#define LTC4162L_DIE_TEMPERATURE   0x3F
+#define LTC4162L_THERMISTOR_VOLTAGE0x40
+#define LTC4162L_BSR   0x41
+#define LTC4162L_JEITA_REGION  0x42
+#define LTC4162L_CHEM_CELLS_REG0x43
+#define LTC4162L_ICHARGE_DAC   0x44
+#define LTC4162L_VCHARGE_DAC   0x45
+#define LTC4162L_IIN_LIMIT_DAC 0x46
+#define LTC4162L_VBAT_FILT 0x47
+#define LTC4162L_INPUT_UNDERVOLTAGE_DAC0x4B
+
+/* Enumeration as in datasheet. Individual bits are mutually exclusive. */
+enum ltc4162l_state {
+   battery_detection = 2048,
+   charger_suspended = 256,
+   precharge = 128,   /* trickle on low bat voltage */
+   cc_cv_charge = 64, /* normal charge */
+   ntc_pause = 32,
+   timer_term = 16,
+   c_over_x_term = 8, /* battery is full */
+   max_charge_time_fault = 4,
+   bat_missing_fault = 2,
+   

[PATCH v7 18/18] sample/acrn: Introduce a sample of HSM ioctl interface usage

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

Launch a simple guest (with several instructions as payload) on ACRN
with demonstration ioctl usage.

Signed-off-by: Shuo Liu 
---
 samples/acrn/Makefile|  12 
 samples/acrn/guest.ld|   9 +++
 samples/acrn/payload.ld  |   9 +++
 samples/acrn/vm-sample.c | 136 +++
 4 files changed, 166 insertions(+)
 create mode 100644 samples/acrn/Makefile
 create mode 100644 samples/acrn/guest.ld
 create mode 100644 samples/acrn/payload.ld
 create mode 100644 samples/acrn/vm-sample.c

diff --git a/samples/acrn/Makefile b/samples/acrn/Makefile
new file mode 100644
index ..c8e3ed9785e9
--- /dev/null
+++ b/samples/acrn/Makefile
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0
+
+.PHONY: vm-sample
+
+vm-sample: vm-sample.o payload.o
+   $(CC) $^ -o $@
+
+payload.o: payload.ld guest16.o
+   $(LD) -T $< -o $@
+
+clean:
+   rm *.o vm-sample
diff --git a/samples/acrn/guest.ld b/samples/acrn/guest.ld
new file mode 100644
index ..5127c682bd22
--- /dev/null
+++ b/samples/acrn/guest.ld
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+OUTPUT_FORMAT(binary)
+SECTIONS
+{
+.start : { *(.start) }
+.text : { *(.text*) }
+.rodata : { *(.rodata) }
+.data : { *(.data) }
+}
diff --git a/samples/acrn/payload.ld b/samples/acrn/payload.ld
new file mode 100644
index ..e8d9a498ad62
--- /dev/null
+++ b/samples/acrn/payload.ld
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+SECTIONS
+{
+.payload16 0 : {
+guest16 = .;
+guest16.o(.text)
+guest16_end = .;
+}
+}
diff --git a/samples/acrn/vm-sample.c b/samples/acrn/vm-sample.c
new file mode 100644
index ..b2dad47a77a0
--- /dev/null
+++ b/samples/acrn/vm-sample.c
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * A sample program to run a User VM on the ACRN hypervisor
+ *
+ * This sample runs in a Service VM, which is a privileged VM of ACRN.
+ * CONFIG_ACRN_HSM need to be enabled in the Service VM.
+ *
+ * Guest VM code in guest16.s will be executed after the VM launched.
+ *
+ * Copyright (C) 2020 Intel Corporation. All rights reserved.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define GUEST_MEMORY_SIZE  (1024*1024)
+void *guest_memory;
+
+extern const unsigned char guest16[], guest16_end[];
+static char io_request_page[4096] __attribute__((aligned(4096)));
+static struct acrn_io_request *io_req_buf = (struct acrn_io_request 
*)io_request_page;
+
+__u16 vcpu_num;
+__u16 vmid;
+/* POST_STANDARD_VM_UUID1, refer to 
https://github.com/projectacrn/acrn-hypervisor/blob/master/hypervisor/include/common/vm_uuids.h
 */
+guid_t vm_uuid = GUID_INIT(0x385479d2, 0xd625, 0xe811, 0x86, 0x4e, 0xcb, 0x7a, 
0x18, 0xb3, 0x46, 0x43);
+
+int hsm_fd;
+int is_running = 1;
+
+void vm_exit(int sig)
+{
+   sig = sig;
+
+   is_running = 0;
+   ioctl(hsm_fd, ACRN_IOCTL_PAUSE_VM, vmid);
+   ioctl(hsm_fd, ACRN_IOCTL_DESTROY_IOREQ_CLIENT, 0);
+}
+
+int main(int argc, char **argv)
+{
+   int vcpu_id, ret;
+   struct acrn_vm_creation create_vm = {0};
+   struct acrn_vm_memmap ram_map = {0};
+   struct acrn_vcpu_regs regs;
+   struct acrn_io_request *io_req;
+   struct acrn_ioreq_notify __attribute__((aligned(8))) notify;
+
+   argc = argc;
+   argv = argv;
+
+   guest_memory = memalign(4096, GUEST_MEMORY_SIZE);
+   if (!guest_memory) {
+   printf("No enough memory!\n");
+   return -1;
+   }
+   hsm_fd = open("/dev/acrn_hsm", O_RDWR|O_CLOEXEC);
+
+   memcpy(_vm.uuid, _uuid, 16);
+   create_vm.ioreq_buf = (__u64)io_req_buf;
+   ret = ioctl(hsm_fd, ACRN_IOCTL_CREATE_VM, _vm);
+   printf("Created VM! [%d]\n", ret);
+   vcpu_num = create_vm.vcpu_num;
+   vmid = create_vm.vmid;
+
+   /* setup guest memory */
+   ram_map.type = ACRN_MEMMAP_RAM;
+   ram_map.vma_base = (__u64)guest_memory;
+   ram_map.len = GUEST_MEMORY_SIZE;
+   ram_map.user_vm_pa = 0;
+   ram_map.attr = ACRN_MEM_ACCESS_RWX;
+   ret = ioctl(hsm_fd, ACRN_IOCTL_SET_MEMSEG, _map);
+   printf("Set up VM memory! [%d]\n", ret);
+
+   memcpy(guest_memory, guest16, guest16_end-guest16);
+
+   /* setup vcpu registers */
+   memset(, 0, sizeof(regs));
+   regs.vcpu_id = 0;
+   regs.vcpu_regs.rip = 0;
+
+   /* CR0_ET | CR0_NE */
+   regs.vcpu_regs.cr0 = 0x30U;
+   regs.vcpu_regs.cs_ar = 0x009FU;
+   regs.vcpu_regs.cs_sel = 0xF000U;
+   regs.vcpu_regs.cs_limit = 0xU;
+   regs.vcpu_regs.cs_base = 0 & 0xUL;
+   regs.vcpu_regs.rip = 0 & 0xUL;
+
+   ret = ioctl(hsm_fd, ACRN_IOCTL_SET_VCPU_REGS, );
+   printf("Set up VM BSP registers! [%d]\n", ret);
+
+   /* create an ioreq client for this VM */
+   ret = ioctl(hsm_fd, 

[PATCH v7 16/18] virt: acrn: Introduce irqfd

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

irqfd is a mechanism to inject a specific interrupt to a User VM using a
decoupled eventfd mechanism.

Vhost is a kernel-level virtio server which uses eventfd for interrupt
injection. To support vhost on ACRN, irqfd is introduced in HSM.

HSM provides ioctls to associate a virtual Message Signaled Interrupt
(MSI) with an eventfd. The corresponding virtual MSI will be injected
into a User VM once the eventfd got signal.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/Makefile   |   2 +-
 drivers/virt/acrn/acrn_drv.h |  10 ++
 drivers/virt/acrn/hsm.c  |   7 ++
 drivers/virt/acrn/irqfd.c| 235 +++
 drivers/virt/acrn/vm.c   |   3 +
 include/uapi/linux/acrn.h|  15 +++
 6 files changed, 271 insertions(+), 1 deletion(-)
 create mode 100644 drivers/virt/acrn/irqfd.c

diff --git a/drivers/virt/acrn/Makefile b/drivers/virt/acrn/Makefile
index 755b583b32ca..08ce641dcfa1 100644
--- a/drivers/virt/acrn/Makefile
+++ b/drivers/virt/acrn/Makefile
@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_ACRN_HSM) := acrn.o
-acrn-y := hsm.o vm.o mm.o ioreq.o ioeventfd.o
+acrn-y := hsm.o vm.o mm.o ioreq.o ioeventfd.o irqfd.o
diff --git a/drivers/virt/acrn/acrn_drv.h b/drivers/virt/acrn/acrn_drv.h
index 74c609cf60ae..be4b5b90277c 100644
--- a/drivers/virt/acrn/acrn_drv.h
+++ b/drivers/virt/acrn/acrn_drv.h
@@ -159,6 +159,9 @@ extern rwlock_t acrn_vm_list_lock;
  * @ioeventfds_lock:   Lock to protect ioeventfds list
  * @ioeventfds:List to link all hsm_ioeventfd
  * @ioeventfd_client:  I/O client for ioeventfds of the VM
+ * @irqfds_lock:   Lock to protect irqfds list
+ * @irqfds:List to link all hsm_irqfd
+ * @irqfd_wq:  Workqueue for irqfd async shutdown
  */
 struct acrn_vm {
struct list_headlist;
@@ -178,6 +181,9 @@ struct acrn_vm {
struct mutexioeventfds_lock;
struct list_headioeventfds;
struct acrn_ioreq_client*ioeventfd_client;
+   struct mutexirqfds_lock;
+   struct list_headirqfds;
+   struct workqueue_struct *irqfd_wq;
 };
 
 struct acrn_vm *acrn_vm_create(struct acrn_vm *vm,
@@ -214,4 +220,8 @@ int acrn_ioeventfd_init(struct acrn_vm *vm);
 int acrn_ioeventfd_config(struct acrn_vm *vm, struct acrn_ioeventfd *args);
 void acrn_ioeventfd_deinit(struct acrn_vm *vm);
 
+int acrn_irqfd_init(struct acrn_vm *vm);
+int acrn_irqfd_config(struct acrn_vm *vm, struct acrn_irqfd *args);
+void acrn_irqfd_deinit(struct acrn_vm *vm);
+
 #endif /* __ACRN_HSM_DRV_H */
diff --git a/drivers/virt/acrn/hsm.c b/drivers/virt/acrn/hsm.c
index 3706378418ea..de118a4347e9 100644
--- a/drivers/virt/acrn/hsm.c
+++ b/drivers/virt/acrn/hsm.c
@@ -115,6 +115,7 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
struct acrn_vm_memmap memmap;
struct acrn_msi_entry *msi;
struct acrn_pcidev *pcidev;
+   struct acrn_irqfd irqfd;
struct page *page;
u64 cstate_cmd;
int i, ret = 0;
@@ -327,6 +328,12 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
 
ret = acrn_ioeventfd_config(vm, );
break;
+   case ACRN_IOCTL_IRQFD:
+   if (copy_from_user(, (void __user *)ioctl_param,
+  sizeof(irqfd)))
+   return -EFAULT;
+   ret = acrn_irqfd_config(vm, );
+   break;
default:
dev_dbg(acrn_dev.this_device, "Unknown IOCTL 0x%x!\n", cmd);
ret = -ENOTTY;
diff --git a/drivers/virt/acrn/irqfd.c b/drivers/virt/acrn/irqfd.c
new file mode 100644
index ..a8766d528e29
--- /dev/null
+++ b/drivers/virt/acrn/irqfd.c
@@ -0,0 +1,235 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ACRN HSM irqfd: use eventfd objects to inject virtual interrupts
+ *
+ * Copyright (C) 2020 Intel Corporation. All rights reserved.
+ *
+ * Authors:
+ * Shuo Liu 
+ * Yakui Zhao 
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "acrn_drv.h"
+
+static LIST_HEAD(acrn_irqfd_clients);
+static DEFINE_MUTEX(acrn_irqfds_mutex);
+
+/**
+ * struct hsm_irqfd - Properties of HSM irqfd
+ * @vm:Associated VM pointer
+ * @wait:  Entry of wait-queue
+ * @shutdown:  Async shutdown work
+ * @eventfd:   Associated eventfd
+ * @list:  Entry within _vm.irqfds of irqfds of a VM
+ * @pt:Structure for select/poll on the associated eventfd
+ * @msi:   MSI data
+ */
+struct hsm_irqfd {
+   struct acrn_vm  *vm;
+   wait_queue_entry_t  wait;
+   struct work_struct  shutdown;
+   struct eventfd_ctx  *eventfd;
+   struct list_head  

[PATCH v7 17/18] virt: acrn: Introduce an interface for Service VM to control vCPU

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

ACRN supports partition mode to achieve real-time requirements. In
partition mode, a CPU core can be dedicated to a vCPU of User VM. The
local APIC of the dedicated CPU core can be passthrough to the User VM.
The Service VM controls the assignment of the CPU cores.

Introduce an interface for the Service VM to remove the control of CPU
core from hypervisor perspective so that the CPU core can be a dedicated
CPU core of User VM.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/hsm.c   | 48 +++
 drivers/virt/acrn/hypercall.h | 14 ++
 2 files changed, 62 insertions(+)

diff --git a/drivers/virt/acrn/hsm.c b/drivers/virt/acrn/hsm.c
index de118a4347e9..765603e1da6c 100644
--- a/drivers/virt/acrn/hsm.c
+++ b/drivers/virt/acrn/hsm.c
@@ -9,6 +9,7 @@
  * Yakui Zhao 
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -351,6 +352,52 @@ static int acrn_dev_release(struct inode *inode, struct 
file *filp)
return 0;
 }
 
+static ssize_t remove_cpu_store(struct device *dev,
+   struct device_attribute *attr,
+   const char *buf, size_t count)
+{
+   u64 cpu, lapicid;
+   int ret;
+
+   if (kstrtoull(buf, 0, ) < 0)
+   return -EINVAL;
+
+   if (cpu >= num_possible_cpus() || cpu == 0 || !cpu_is_hotpluggable(cpu))
+   return -EINVAL;
+
+   if (cpu_online(cpu))
+   remove_cpu(cpu);
+
+   lapicid = cpu_data(cpu).apicid;
+   dev_dbg(dev, "Try to remove cpu %lld with lapicid %lld\n", cpu, 
lapicid);
+   ret = hcall_sos_remove_cpu(lapicid);
+   if (ret < 0) {
+   dev_err(dev, "Failed to remove cpu %lld!\n", cpu);
+   goto fail_remove;
+   }
+
+   return count;
+
+fail_remove:
+   add_cpu(cpu);
+   return ret;
+}
+static DEVICE_ATTR_WO(remove_cpu);
+
+static struct attribute *acrn_attrs[] = {
+   _attr_remove_cpu.attr,
+   NULL
+};
+
+static struct attribute_group acrn_attr_group = {
+   .attrs = acrn_attrs,
+};
+
+static const struct attribute_group *acrn_attr_groups[] = {
+   _attr_group,
+   NULL
+};
+
 static const struct file_operations acrn_fops = {
.owner  = THIS_MODULE,
.open   = acrn_dev_open,
@@ -362,6 +409,7 @@ struct miscdevice acrn_dev = {
.minor  = MISC_DYNAMIC_MINOR,
.name   = "acrn_hsm",
.fops   = _fops,
+   .groups = acrn_attr_groups,
 };
 
 static int __init hsm_init(void)
diff --git a/drivers/virt/acrn/hypercall.h b/drivers/virt/acrn/hypercall.h
index e640632366f0..0cfad05bd1a9 100644
--- a/drivers/virt/acrn/hypercall.h
+++ b/drivers/virt/acrn/hypercall.h
@@ -13,6 +13,9 @@
 
 #define HC_ID 0x80UL
 
+#define HC_ID_GEN_BASE 0x0UL
+#define HC_SOS_REMOVE_CPU  _HC_ID(HC_ID, HC_ID_GEN_BASE + 0x01)
+
 #define HC_ID_VM_BASE  0x10UL
 #define HC_CREATE_VM   _HC_ID(HC_ID, HC_ID_VM_BASE + 0x00)
 #define HC_DESTROY_VM  _HC_ID(HC_ID, HC_ID_VM_BASE + 0x01)
@@ -42,6 +45,17 @@
 #define HC_ID_PM_BASE  0x80UL
 #define HC_PM_GET_CPU_STATE_HC_ID(HC_ID, HC_ID_PM_BASE + 0x00)
 
+/**
+ * hcall_sos_remove_cpu() - Remove a vCPU of Service VM
+ * @cpu: The vCPU to be removed
+ *
+ * Return: 0 on success, <0 on failure
+ */
+static inline long hcall_sos_remove_cpu(u64 cpu)
+{
+   return acrn_hypercall1(HC_SOS_REMOVE_CPU, cpu);
+}
+
 /**
  * hcall_create_vm() - Create a User VM
  * @vminfo:Service VM GPA of info of User VM creation
-- 
2.28.0



Re: [PATCH v2 10/11] perf c2c: Sort on all cache hit for load operations

2021-01-05 Thread Namhyung Kim
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan  wrote:
>
> Except the existed three display options 'tot', 'rmt', 'lcl', this patch
> adds option 'all' so can sort on the all cache hit for load operation.
> This new introduced option can be a choice for profiling cache false
> sharing if the memory event doesn't contain HITM tags.
>
> For displaying with option 'all', the "Shared Data Cache Line Table" and
> "Shared Cache Line Distribution Pareto" both have difference comparing
> to other three display options.
>
> For the "Shared Data Cache Line Table", instead of sorting HITM metrics,
> it sorts with the metrics "tot_ld_hit" and "percent_tot_ld_hit".  If
> without HITM metrics, users can analyze the load hit statistics for all
> cache levels, so the dimensions of total load hit is used to replace
> HITM dimensions.
>
> For Pareto, every single cache line shows the metrics "cl_tot_ld_hit"
> and "cl_tot_ld_miss" instead of "cl_rmt_hitm" and "percent_lcl_hitm",
> and the single cache line view is sorted by metrics "tot_ld_hit".
>
> As result, we can get the 'all' display as follows:
>
>   # perf c2c report -d all --coalesce tid,pid,iaddr,dso --stdio
>
>   [...]
>
>   =
>  Shared Data Cache Line Table
>   =
>   #
>   #--- Cacheline --  Load Hit  Load HitTotal
> TotalTotal   Stores   - Core Load Hit -  - LLC Load Hit 
> --  - RMT Load Hit --  --- Load Dram 
>   # Index Address  Node  PA cnt   Pct Total  records
> Loads   StoresL1Hit   L1Miss   FB   L1   L2LclHit  
> LclHitmRmtHit  RmtHitm   Lcl   Rmt
>   # .  ..    ..      ...  
> ...  ...  ...  ...  ...  ...  ...    
> ...    ...    
>   #
> 0  0x556f25dff100 0189575.73%  4591 7840 
> 4591 3249 2633  616  849 2734   6758  883 
> 00 0 0
> 1  0x556f25dff080 0   113.10%   794  794  
> 794000  164  486   2820   96  
>00 0 0
> 2  0x556f25dff0c0 0   110.01%   607  607  
> 607000  10755   4882  
>00 0 0
>
>   =
> Shared Cache Line Distribution Pareto
>   =
>   #
>   #--  Load Refs --  -- Store Refs --  - Data address 
> -   -- cycles 
> --Total   cpu  Shared
>   #   Num  Hit Miss   L1 Hit  L1 Miss  Offset  Node  PA 
> cnt  Pid TidCode address  rmt hitm  lcl hitm  
> load  records   cnt   Symbol Object   
>Source:Line  Node
>   # .  ...  ...  ...  ...  ..    
> ..  ...  ..  ..      
>   ...    ...  .  
> ...  
>   #
> -
> 0 45910 2633  616  0x556f25dff100
> -
> 20.52%0.00%0.00%0.00% 0x0 0   
> 12807928082:lock_th 0x556f25bfdc1d 0  2200  
> 1276  942 1  [.] read_write_func  false_sharing.exe  
> false_sharing_example.c:146   0
> 19.82%0.00%   38.06%0.00% 0x0 0   
> 12807928082:lock_th 0x556f25bfdc16 0  2190  
> 1130 1912 1  [.] read_write_func  false_sharing.exe  
> false_sharing_example.c:145   0
> 18.25%0.00%   56.63%0.00% 0x0 0   
> 12807928081:lock_th 0x556f25bfdc16 0  2173  
> 1074 2329 1  [.] read_write_func  false_sharing.exe  
> false_sharing_example.c:145   0
> 18.23%0.00%0.00%0.00% 0x0 0   
> 12807928081:lock_th 0x556f25bfdc1d 0  2013  
> 1220  837 1  [.] read_write_func  false_sharing.exe  
> false_sharing_example.c:146   0
>  0.00%0.00%3.11%   59.90% 0x0 0   
> 12807928081:lock_th 0x556f25bfdc28 0 0
>  0  451 1  [.] read_write_func  false_sharing.exe  
> false_sharing_example.c:146   0
> 

Re: [PATCH v6 04/18] x86/acrn: Introduce hypercall interfaces

2021-01-05 Thread Shuo A Liu

On Wed 30.Dec'20 at 18:33:05 +0100, Borislav Petkov wrote:

On Tue, Dec 01, 2020 at 05:38:39PM +0800, shuo.a@intel.com wrote:

From: Shuo Liu 

The Service VM communicates with the hypervisor via conventional
hypercalls. VMCALL instruction is used to make the hypercalls.

ACRN hypercall ABI:
  * Hypercall number is in R8 register.
  * Up to 2 parameters are in RDI and RSI registers.
  * Return value is in RAX register.

Introduce the ACRN hypercall interfaces. Because GCC doesn't support R8
register as direct register constraints, use supported constraint as
input with a explicit MOV to R8 in beginning of asm.

Originally-by: Yakui Zhao 
Signed-off-by: Shuo Liu 
Reviewed-by: Reinette Chatre 
Reviewed-by: Nick Desaulniers 
Cc: Dave Hansen 
Cc: Sean Christopherson 
Cc: Dan Williams 
Cc: Fengwei Yin 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
Cc: Borislav Petkov 
Cc: Arvind Sankar 
Cc: Peter Zijlstra 
Cc: Nick Desaulniers 
Cc: Segher Boessenkool 
---
 arch/x86/include/asm/acrn.h | 54 +
 1 file changed, 54 insertions(+)


The x86 bits in patches 2-4 look ok now, thanks!

Acked-by: Borislav Petkov 


Thanks for review!

Shuo


[PATCH v7 13/18] virt: acrn: Introduce interfaces to query C-states and P-states allowed by hypervisor

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

The C-states and P-states data are used to support CPU power management.
The hypervisor controls C-states and P-states for a User VM.

ACRN userspace need to query the data from the hypervisor to build ACPI
tables for a User VM.

HSM provides ioctls for ACRN userspace to query C-states and P-states
data obtained from the hypervisor.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/hsm.c   | 69 +++
 drivers/virt/acrn/hypercall.h | 12 ++
 include/uapi/linux/acrn.h | 35 ++
 3 files changed, 116 insertions(+)

diff --git a/drivers/virt/acrn/hsm.c b/drivers/virt/acrn/hsm.c
index 761b99722ab6..5ade6ff4f4d1 100644
--- a/drivers/virt/acrn/hsm.c
+++ b/drivers/virt/acrn/hsm.c
@@ -38,6 +38,67 @@ static int acrn_dev_open(struct inode *inode, struct file 
*filp)
return 0;
 }
 
+static int pmcmd_ioctl(u64 cmd, void __user *uptr)
+{
+   struct acrn_pstate_data *px_data;
+   struct acrn_cstate_data *cx_data;
+   u64 *pm_info;
+   int ret = 0;
+
+   switch (cmd & PMCMD_TYPE_MASK) {
+   case ACRN_PMCMD_GET_PX_CNT:
+   case ACRN_PMCMD_GET_CX_CNT:
+   pm_info = kmalloc(sizeof(u64), GFP_KERNEL);
+   if (!pm_info)
+   return -ENOMEM;
+
+   ret = hcall_get_cpu_state(cmd, virt_to_phys(pm_info));
+   if (ret < 0) {
+   kfree(pm_info);
+   break;
+   }
+
+   if (copy_to_user(uptr, pm_info, sizeof(u64)))
+   ret = -EFAULT;
+   kfree(pm_info);
+   break;
+   case ACRN_PMCMD_GET_PX_DATA:
+   px_data = kmalloc(sizeof(*px_data), GFP_KERNEL);
+   if (!px_data)
+   return -ENOMEM;
+
+   ret = hcall_get_cpu_state(cmd, virt_to_phys(px_data));
+   if (ret < 0) {
+   kfree(px_data);
+   break;
+   }
+
+   if (copy_to_user(uptr, px_data, sizeof(*px_data)))
+   ret = -EFAULT;
+   kfree(px_data);
+   break;
+   case ACRN_PMCMD_GET_CX_DATA:
+   cx_data = kmalloc(sizeof(*cx_data), GFP_KERNEL);
+   if (!cx_data)
+   return -ENOMEM;
+
+   ret = hcall_get_cpu_state(cmd, virt_to_phys(cx_data));
+   if (ret < 0) {
+   kfree(cx_data);
+   break;
+   }
+
+   if (copy_to_user(uptr, cx_data, sizeof(*cx_data)))
+   ret = -EFAULT;
+   kfree(cx_data);
+   break;
+   default:
+   break;
+   }
+
+   return ret;
+}
+
 /*
  * HSM relies on hypercall layer of the ACRN hypervisor to do the
  * sanity check against the input parameters.
@@ -54,6 +115,7 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
struct acrn_msi_entry *msi;
struct acrn_pcidev *pcidev;
struct page *page;
+   u64 cstate_cmd;
int i, ret = 0;
 
if (vm->vmid == ACRN_INVALID_VMID && cmd != ACRN_IOCTL_CREATE_VM) {
@@ -250,6 +312,13 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
case ACRN_IOCTL_CLEAR_VM_IOREQ:
acrn_ioreq_request_clear(vm);
break;
+   case ACRN_IOCTL_PM_GET_CPU_STATE:
+   if (copy_from_user(_cmd, (void *)ioctl_param,
+  sizeof(cstate_cmd)))
+   return -EFAULT;
+
+   ret = pmcmd_ioctl(cstate_cmd, (void __user *)ioctl_param);
+   break;
default:
dev_dbg(acrn_dev.this_device, "Unknown IOCTL 0x%x!\n", cmd);
ret = -ENOTTY;
diff --git a/drivers/virt/acrn/hypercall.h b/drivers/virt/acrn/hypercall.h
index a8813397a3fe..e640632366f0 100644
--- a/drivers/virt/acrn/hypercall.h
+++ b/drivers/virt/acrn/hypercall.h
@@ -39,6 +39,9 @@
 #define HC_ASSIGN_PCIDEV   _HC_ID(HC_ID, HC_ID_PCI_BASE + 0x05)
 #define HC_DEASSIGN_PCIDEV _HC_ID(HC_ID, HC_ID_PCI_BASE + 0x06)
 
+#define HC_ID_PM_BASE  0x80UL
+#define HC_PM_GET_CPU_STATE_HC_ID(HC_ID, HC_ID_PM_BASE + 0x00)
+
 /**
  * hcall_create_vm() - Create a User VM
  * @vminfo:Service VM GPA of info of User VM creation
@@ -225,4 +228,13 @@ static inline long hcall_reset_ptdev_intr(u64 vmid, u64 
irq)
return acrn_hypercall2(HC_RESET_PTDEV_INTR, vmid, irq);
 }
 
+/*
+ * hcall_get_cpu_state() - Get P-states and C-states info from the hypervisor
+ * @state: Service VM GPA of buffer of P-states and C-states
+ */
+static inline long hcall_get_cpu_state(u64 cmd, u64 state)
+{
+   return acrn_hypercall2(HC_PM_GET_CPU_STATE, cmd, state);
+}
+
 #endif 

[PATCH v7 15/18] virt: acrn: Introduce ioeventfd

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

ioeventfd is a mechanism to register PIO/MMIO regions to trigger an
eventfd signal when written to by a User VM. ACRN userspace can register
any arbitrary I/O address with a corresponding eventfd and then pass the
eventfd to a specific end-point of interest for handling.

Vhost is a kernel-level virtio server which uses eventfd for signalling.
To support vhost on ACRN, ioeventfd is introduced in HSM.

A new I/O client dedicated to ioeventfd is associated with a User VM
during VM creation. HSM provides ioctls to associate an I/O region with
a eventfd. The I/O client signals a eventfd once its corresponding I/O
region is matched with an I/O request.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/Kconfig |   1 +
 drivers/virt/acrn/Makefile|   2 +-
 drivers/virt/acrn/acrn_drv.h  |  10 ++
 drivers/virt/acrn/hsm.c   |   8 +
 drivers/virt/acrn/ioeventfd.c | 273 ++
 drivers/virt/acrn/vm.c|   2 +
 include/uapi/linux/acrn.h |  29 
 7 files changed, 324 insertions(+), 1 deletion(-)
 create mode 100644 drivers/virt/acrn/ioeventfd.c

diff --git a/drivers/virt/acrn/Kconfig b/drivers/virt/acrn/Kconfig
index 36c80378c30c..3e1a61c9d8d8 100644
--- a/drivers/virt/acrn/Kconfig
+++ b/drivers/virt/acrn/Kconfig
@@ -2,6 +2,7 @@
 config ACRN_HSM
tristate "ACRN Hypervisor Service Module"
depends on ACRN_GUEST
+   select EVENTFD
help
  ACRN Hypervisor Service Module (HSM) is a kernel module which
  communicates with ACRN userspace through ioctls and talks to
diff --git a/drivers/virt/acrn/Makefile b/drivers/virt/acrn/Makefile
index 21721cbf6a80..755b583b32ca 100644
--- a/drivers/virt/acrn/Makefile
+++ b/drivers/virt/acrn/Makefile
@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_ACRN_HSM) := acrn.o
-acrn-y := hsm.o vm.o mm.o ioreq.o
+acrn-y := hsm.o vm.o mm.o ioreq.o ioeventfd.o
diff --git a/drivers/virt/acrn/acrn_drv.h b/drivers/virt/acrn/acrn_drv.h
index 862d195d4774..74c609cf60ae 100644
--- a/drivers/virt/acrn/acrn_drv.h
+++ b/drivers/virt/acrn/acrn_drv.h
@@ -156,6 +156,9 @@ extern rwlock_t acrn_vm_list_lock;
  * @ioreq_page:The page of the I/O request shared 
buffer
  * @pci_conf_addr: Address of a PCI configuration access emulation
  * @monitor_page:  Page of interrupt statistics of User VM
+ * @ioeventfds_lock:   Lock to protect ioeventfds list
+ * @ioeventfds:List to link all hsm_ioeventfd
+ * @ioeventfd_client:  I/O client for ioeventfds of the VM
  */
 struct acrn_vm {
struct list_headlist;
@@ -172,6 +175,9 @@ struct acrn_vm {
struct page *ioreq_page;
u32 pci_conf_addr;
struct page *monitor_page;
+   struct mutexioeventfds_lock;
+   struct list_headioeventfds;
+   struct acrn_ioreq_client*ioeventfd_client;
 };
 
 struct acrn_vm *acrn_vm_create(struct acrn_vm *vm,
@@ -204,4 +210,8 @@ void acrn_ioreq_range_del(struct acrn_ioreq_client *client,
 
 int acrn_msi_inject(struct acrn_vm *vm, u64 msi_addr, u64 msi_data);
 
+int acrn_ioeventfd_init(struct acrn_vm *vm);
+int acrn_ioeventfd_config(struct acrn_vm *vm, struct acrn_ioeventfd *args);
+void acrn_ioeventfd_deinit(struct acrn_vm *vm);
+
 #endif /* __ACRN_HSM_DRV_H */
diff --git a/drivers/virt/acrn/hsm.c b/drivers/virt/acrn/hsm.c
index 5ade6ff4f4d1..3706378418ea 100644
--- a/drivers/virt/acrn/hsm.c
+++ b/drivers/virt/acrn/hsm.c
@@ -111,6 +111,7 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
struct acrn_vcpu_regs *cpu_regs;
struct acrn_ioreq_notify notify;
struct acrn_ptdev_irq *irq_info;
+   struct acrn_ioeventfd ioeventfd;
struct acrn_vm_memmap memmap;
struct acrn_msi_entry *msi;
struct acrn_pcidev *pcidev;
@@ -319,6 +320,13 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
 
ret = pmcmd_ioctl(cstate_cmd, (void __user *)ioctl_param);
break;
+   case ACRN_IOCTL_IOEVENTFD:
+   if (copy_from_user(, (void __user *)ioctl_param,
+  sizeof(ioeventfd)))
+   return -EFAULT;
+
+   ret = acrn_ioeventfd_config(vm, );
+   break;
default:
dev_dbg(acrn_dev.this_device, "Unknown IOCTL 0x%x!\n", cmd);
ret = -ENOTTY;
diff --git a/drivers/virt/acrn/ioeventfd.c b/drivers/virt/acrn/ioeventfd.c
new file mode 100644
index ..ac4037e9f947
--- /dev/null
+++ b/drivers/virt/acrn/ioeventfd.c
@@ -0,0 +1,273 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ACRN HSM eventfd - use eventfd objects to signal expected 

[PATCH v7 12/18] virt: acrn: Introduce interrupt injection interfaces

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

ACRN userspace need to inject virtual interrupts into a User VM in
devices emulation.

HSM needs provide interfaces to do so.

Introduce following interrupt injection interfaces:

ioctl ACRN_IOCTL_SET_IRQLINE:
  Pass data from userspace to the hypervisor, and inform the hypervisor
  to inject a virtual IOAPIC GSI interrupt to a User VM.

ioctl ACRN_IOCTL_INJECT_MSI:
  Pass data struct acrn_msi_entry from userspace to the hypervisor, and
  inform the hypervisor to inject a virtual MSI to a User VM.

ioctl ACRN_IOCTL_VM_INTR_MONITOR:
  Set a 4-Kbyte aligned shared page for statistics information of
  interrupts of a User VM.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/acrn_drv.h  |  4 
 drivers/virt/acrn/hsm.c   | 40 ++
 drivers/virt/acrn/hypercall.h | 41 +++
 drivers/virt/acrn/vm.c| 36 ++
 include/uapi/linux/acrn.h | 17 +++
 5 files changed, 138 insertions(+)

diff --git a/drivers/virt/acrn/acrn_drv.h b/drivers/virt/acrn/acrn_drv.h
index 97a7f31cd681..542448c88026 100644
--- a/drivers/virt/acrn/acrn_drv.h
+++ b/drivers/virt/acrn/acrn_drv.h
@@ -155,6 +155,7 @@ extern rwlock_t acrn_vm_list_lock;
  * @ioreq_buf: I/O request shared buffer
  * @ioreq_page:The page of the I/O request shared 
buffer
  * @pci_conf_addr: Address of a PCI configuration access emulation
+ * @monitor_page:  Page of interrupt statistics of User VM
  */
 struct acrn_vm {
struct list_headlist;
@@ -170,6 +171,7 @@ struct acrn_vm {
struct acrn_io_request_buffer   *ioreq_buf;
struct page *ioreq_page;
u32 pci_conf_addr;
+   struct page *monitor_page;
 };
 
 struct acrn_vm *acrn_vm_create(struct acrn_vm *vm,
@@ -196,4 +198,6 @@ struct acrn_ioreq_client *acrn_ioreq_client_create(struct 
acrn_vm *vm,
   const char *name);
 void acrn_ioreq_client_destroy(struct acrn_ioreq_client *client);
 
+int acrn_msi_inject(struct acrn_vm *vm, u64 msi_addr, u64 msi_data);
+
 #endif /* __ACRN_HSM_DRV_H */
diff --git a/drivers/virt/acrn/hsm.c b/drivers/virt/acrn/hsm.c
index e5676d0ecbbc..761b99722ab6 100644
--- a/drivers/virt/acrn/hsm.c
+++ b/drivers/virt/acrn/hsm.c
@@ -51,7 +51,9 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
struct acrn_ioreq_notify notify;
struct acrn_ptdev_irq *irq_info;
struct acrn_vm_memmap memmap;
+   struct acrn_msi_entry *msi;
struct acrn_pcidev *pcidev;
+   struct page *page;
int i, ret = 0;
 
if (vm->vmid == ACRN_INVALID_VMID && cmd != ACRN_IOCTL_CREATE_VM) {
@@ -185,6 +187,44 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
"Failed to reset intr for ptdev!\n");
kfree(irq_info);
break;
+   case ACRN_IOCTL_SET_IRQLINE:
+   ret = hcall_set_irqline(vm->vmid, ioctl_param);
+   if (ret < 0)
+   dev_dbg(acrn_dev.this_device,
+   "Failed to set interrupt line!\n");
+   break;
+   case ACRN_IOCTL_INJECT_MSI:
+   msi = memdup_user((void __user *)ioctl_param,
+ sizeof(struct acrn_msi_entry));
+   if (IS_ERR(msi))
+   return PTR_ERR(msi);
+
+   ret = hcall_inject_msi(vm->vmid, virt_to_phys(msi));
+   if (ret < 0)
+   dev_dbg(acrn_dev.this_device,
+   "Failed to inject MSI!\n");
+   kfree(msi);
+   break;
+   case ACRN_IOCTL_VM_INTR_MONITOR:
+   ret = pin_user_pages_fast(ioctl_param, 1,
+ FOLL_WRITE | FOLL_LONGTERM, );
+   if (unlikely(ret != 1)) {
+   dev_dbg(acrn_dev.this_device,
+   "Failed to pin intr hdr buffer!\n");
+   return -EFAULT;
+   }
+
+   ret = hcall_vm_intr_monitor(vm->vmid, page_to_phys(page));
+   if (ret < 0) {
+   unpin_user_page(page);
+   dev_dbg(acrn_dev.this_device,
+   "Failed to monitor intr data!\n");
+   return ret;
+   }
+   if (vm->monitor_page)
+   unpin_user_page(vm->monitor_page);
+   vm->monitor_page = page;
+   break;
case ACRN_IOCTL_CREATE_IOREQ_CLIENT:
if (vm->default_client)
return -EEXIST;
diff --git 

[PATCH v7 14/18] virt: acrn: Introduce I/O ranges operation interfaces

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

An I/O request of a User VM, which is constructed by hypervisor, is
distributed by the ACRN Hypervisor Service Module to an I/O client
corresponding to the address range of the I/O request.

I/O client maintains a list of address ranges. Introduce
acrn_ioreq_range_{add,del}() to manage these address ranges.

Signed-off-by: Shuo Liu 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/acrn_drv.h |  4 +++
 drivers/virt/acrn/ioreq.c| 60 
 2 files changed, 64 insertions(+)

diff --git a/drivers/virt/acrn/acrn_drv.h b/drivers/virt/acrn/acrn_drv.h
index 542448c88026..862d195d4774 100644
--- a/drivers/virt/acrn/acrn_drv.h
+++ b/drivers/virt/acrn/acrn_drv.h
@@ -197,6 +197,10 @@ struct acrn_ioreq_client *acrn_ioreq_client_create(struct 
acrn_vm *vm,
   void *data, bool is_default,
   const char *name);
 void acrn_ioreq_client_destroy(struct acrn_ioreq_client *client);
+int acrn_ioreq_range_add(struct acrn_ioreq_client *client,
+u32 type, u64 start, u64 end);
+void acrn_ioreq_range_del(struct acrn_ioreq_client *client,
+ u32 type, u64 start, u64 end);
 
 int acrn_msi_inject(struct acrn_vm *vm, u64 msi_addr, u64 msi_data);
 
diff --git a/drivers/virt/acrn/ioreq.c b/drivers/virt/acrn/ioreq.c
index b469f273e20c..7d391c026437 100644
--- a/drivers/virt/acrn/ioreq.c
+++ b/drivers/virt/acrn/ioreq.c
@@ -101,6 +101,66 @@ int acrn_ioreq_request_default_complete(struct acrn_vm 
*vm, u16 vcpu)
return ret;
 }
 
+/**
+ * acrn_ioreq_range_add() - Add an iorange monitored by an ioreq client
+ * @client:The ioreq client
+ * @type:  Type (ACRN_IOREQ_TYPE_MMIO or ACRN_IOREQ_TYPE_PORTIO)
+ * @start: Start address of iorange
+ * @end:   End address of iorange
+ *
+ * Return: 0 on success, <0 on error
+ */
+int acrn_ioreq_range_add(struct acrn_ioreq_client *client,
+u32 type, u64 start, u64 end)
+{
+   struct acrn_ioreq_range *range;
+
+   if (end < start) {
+   dev_err(acrn_dev.this_device,
+   "Invalid IO range [0x%llx,0x%llx]\n", start, end);
+   return -EINVAL;
+   }
+
+   range = kzalloc(sizeof(*range), GFP_KERNEL);
+   if (!range)
+   return -ENOMEM;
+
+   range->type = type;
+   range->start = start;
+   range->end = end;
+
+   write_lock_bh(>range_lock);
+   list_add(>list, >range_list);
+   write_unlock_bh(>range_lock);
+
+   return 0;
+}
+
+/**
+ * acrn_ioreq_range_del() - Del an iorange monitored by an ioreq client
+ * @client:The ioreq client
+ * @type:  Type (ACRN_IOREQ_TYPE_MMIO or ACRN_IOREQ_TYPE_PORTIO)
+ * @start: Start address of iorange
+ * @end:   End address of iorange
+ */
+void acrn_ioreq_range_del(struct acrn_ioreq_client *client,
+ u32 type, u64 start, u64 end)
+{
+   struct acrn_ioreq_range *range;
+
+   write_lock_bh(>range_lock);
+   list_for_each_entry(range, >range_list, list) {
+   if (type == range->type &&
+   start == range->start &&
+   end == range->end) {
+   list_del(>list);
+   kfree(range);
+   break;
+   }
+   }
+   write_unlock_bh(>range_lock);
+}
+
 /*
  * ioreq_task() is the execution entity of handler thread of an I/O client.
  * The handler callback of the I/O client is called within the handler thread.
-- 
2.28.0



[PATCH v7 11/18] virt: acrn: Introduce interfaces for PCI device passthrough

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

PCI device passthrough enables an OS in a virtual machine to directly
access a PCI device in the host. It promises almost the native
performance, which is required in performance-critical scenarios of
ACRN.

HSM provides the following ioctls:
 - Assign - ACRN_IOCTL_ASSIGN_PCIDEV
   Pass data struct acrn_pcidev from userspace to the hypervisor, and
   inform the hypervisor to assign a PCI device to a User VM.

 - De-assign - ACRN_IOCTL_DEASSIGN_PCIDEV
   Pass data struct acrn_pcidev from userspace to the hypervisor, and
   inform the hypervisor to de-assign a PCI device from a User VM.

 - Set a interrupt of a passthrough device - ACRN_IOCTL_SET_PTDEV_INTR
   Pass data struct acrn_ptdev_irq from userspace to the hypervisor,
   and inform the hypervisor to map a INTx interrupt of passthrough
   device of User VM.

 - Reset passthrough device interrupt - ACRN_IOCTL_RESET_PTDEV_INTR
   Pass data struct acrn_ptdev_irq from userspace to the hypervisor,
   and inform the hypervisor to unmap a INTx interrupt of passthrough
   device of User VM.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/hsm.c   | 50 
 drivers/virt/acrn/hypercall.h | 54 +++
 include/uapi/linux/acrn.h | 61 +++
 3 files changed, 165 insertions(+)

diff --git a/drivers/virt/acrn/hsm.c b/drivers/virt/acrn/hsm.c
index ca1181aa6b0a..e5676d0ecbbc 100644
--- a/drivers/virt/acrn/hsm.c
+++ b/drivers/virt/acrn/hsm.c
@@ -49,7 +49,9 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
struct acrn_vm_creation *vm_param;
struct acrn_vcpu_regs *cpu_regs;
struct acrn_ioreq_notify notify;
+   struct acrn_ptdev_irq *irq_info;
struct acrn_vm_memmap memmap;
+   struct acrn_pcidev *pcidev;
int i, ret = 0;
 
if (vm->vmid == ACRN_INVALID_VMID && cmd != ACRN_IOCTL_CREATE_VM) {
@@ -135,6 +137,54 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
 
ret = acrn_vm_memseg_unmap(vm, );
break;
+   case ACRN_IOCTL_ASSIGN_PCIDEV:
+   pcidev = memdup_user((void __user *)ioctl_param,
+sizeof(struct acrn_pcidev));
+   if (IS_ERR(pcidev))
+   return PTR_ERR(pcidev);
+
+   ret = hcall_assign_pcidev(vm->vmid, virt_to_phys(pcidev));
+   if (ret < 0)
+   dev_dbg(acrn_dev.this_device,
+   "Failed to assign pci device!\n");
+   kfree(pcidev);
+   break;
+   case ACRN_IOCTL_DEASSIGN_PCIDEV:
+   pcidev = memdup_user((void __user *)ioctl_param,
+sizeof(struct acrn_pcidev));
+   if (IS_ERR(pcidev))
+   return PTR_ERR(pcidev);
+
+   ret = hcall_deassign_pcidev(vm->vmid, virt_to_phys(pcidev));
+   if (ret < 0)
+   dev_dbg(acrn_dev.this_device,
+   "Failed to deassign pci device!\n");
+   kfree(pcidev);
+   break;
+   case ACRN_IOCTL_SET_PTDEV_INTR:
+   irq_info = memdup_user((void __user *)ioctl_param,
+  sizeof(struct acrn_ptdev_irq));
+   if (IS_ERR(irq_info))
+   return PTR_ERR(irq_info);
+
+   ret = hcall_set_ptdev_intr(vm->vmid, virt_to_phys(irq_info));
+   if (ret < 0)
+   dev_dbg(acrn_dev.this_device,
+   "Failed to configure intr for ptdev!\n");
+   kfree(irq_info);
+   break;
+   case ACRN_IOCTL_RESET_PTDEV_INTR:
+   irq_info = memdup_user((void __user *)ioctl_param,
+  sizeof(struct acrn_ptdev_irq));
+   if (IS_ERR(irq_info))
+   return PTR_ERR(irq_info);
+
+   ret = hcall_reset_ptdev_intr(vm->vmid, virt_to_phys(irq_info));
+   if (ret < 0)
+   dev_dbg(acrn_dev.this_device,
+   "Failed to reset intr for ptdev!\n");
+   kfree(irq_info);
+   break;
case ACRN_IOCTL_CREATE_IOREQ_CLIENT:
if (vm->default_client)
return -EEXIST;
diff --git a/drivers/virt/acrn/hypercall.h b/drivers/virt/acrn/hypercall.h
index 5eba29e3ed38..f448301832cf 100644
--- a/drivers/virt/acrn/hypercall.h
+++ b/drivers/virt/acrn/hypercall.h
@@ -28,6 +28,12 @@
 #define HC_ID_MEM_BASE 0x40UL
 #define HC_VM_SET_MEMORY_REGIONS   _HC_ID(HC_ID, HC_ID_MEM_BASE + 0x02)
 
+#define HC_ID_PCI_BASE 0x50UL
+#define HC_SET_PTDEV_INTR  _HC_ID(HC_ID, 

[PATCH v7 09/18] virt: acrn: Introduce I/O request management

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

An I/O request of a User VM, which is constructed by the hypervisor, is
distributed by the ACRN Hypervisor Service Module to an I/O client
corresponding to the address range of the I/O request.

For each User VM, there is a shared 4-KByte memory region used for I/O
requests communication between the hypervisor and Service VM. An I/O
request is a 256-byte structure buffer, which is 'struct
acrn_io_request', that is filled by an I/O handler of the hypervisor
when a trapped I/O access happens in a User VM. ACRN userspace in the
Service VM first allocates a 4-KByte page and passes the GPA (Guest
Physical Address) of the buffer to the hypervisor. The buffer is used as
an array of 16 I/O request slots with each I/O request slot being 256
bytes. This array is indexed by vCPU ID.

An I/O client, which is 'struct acrn_ioreq_client', is responsible for
handling User VM I/O requests whose accessed GPA falls in a certain
range. Multiple I/O clients can be associated with each User VM. There
is a special client associated with each User VM, called the default
client, that handles all I/O requests that do not fit into the range of
any other I/O clients. The ACRN userspace acts as the default client for
each User VM.

The state transitions of a ACRN I/O request are as follows.

   FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ...

FREE: this I/O request slot is empty
PENDING: a valid I/O request is pending in this slot
PROCESSING: the I/O request is being processed
COMPLETE: the I/O request has been processed

An I/O request in COMPLETE or FREE state is owned by the hypervisor. HSM
and ACRN userspace are in charge of processing the others.

The processing flow of I/O requests are listed as following:

a) The I/O handler of the hypervisor will fill an I/O request with
   PENDING state when a trapped I/O access happens in a User VM.
b) The hypervisor makes an upcall, which is a notification interrupt, to
   the Service VM.
c) The upcall handler schedules a tasklet to dispatch I/O requests.
d) The tasklet looks for the PENDING I/O requests, assigns them to
   different registered clients based on the address of the I/O accesses,
   updates their state to PROCESSING, and notifies the corresponding
   client to handle.
e) The notified client handles the assigned I/O requests.
f) The HSM updates I/O requests states to COMPLETE and notifies the
   hypervisor of the completion via hypercalls.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/Makefile|   2 +-
 drivers/virt/acrn/acrn_drv.h  |  82 ++
 drivers/virt/acrn/hsm.c   |  34 ++-
 drivers/virt/acrn/hypercall.h |  28 ++
 drivers/virt/acrn/ioreq.c | 509 ++
 drivers/virt/acrn/vm.c|  27 +-
 include/uapi/linux/acrn.h | 134 +
 7 files changed, 806 insertions(+), 10 deletions(-)
 create mode 100644 drivers/virt/acrn/ioreq.c

diff --git a/drivers/virt/acrn/Makefile b/drivers/virt/acrn/Makefile
index 38bc44b6edcd..21721cbf6a80 100644
--- a/drivers/virt/acrn/Makefile
+++ b/drivers/virt/acrn/Makefile
@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_ACRN_HSM) := acrn.o
-acrn-y := hsm.o vm.o mm.o
+acrn-y := hsm.o vm.o mm.o ioreq.o
diff --git a/drivers/virt/acrn/acrn_drv.h b/drivers/virt/acrn/acrn_drv.h
index e47a45280eea..7e89e4944d0f 100644
--- a/drivers/virt/acrn/acrn_drv.h
+++ b/drivers/virt/acrn/acrn_drv.h
@@ -12,10 +12,15 @@
 
 extern struct miscdevice acrn_dev;
 
+#define ACRN_NAME_LEN  16
 #define ACRN_MEM_MAPPING_MAX   256
 
 #define ACRN_MEM_REGION_ADD0
 #define ACRN_MEM_REGION_DEL2
+
+struct acrn_vm;
+struct acrn_ioreq_client;
+
 /**
  * struct vm_memory_region_op - Hypervisor memory operation
  * @type:  Operation type (ACRN_MEM_REGION_*)
@@ -75,9 +80,63 @@ struct vm_memory_mapping {
size_t  size;
 };
 
+/**
+ * struct acrn_ioreq_buffer - Data for setting the ioreq buffer of User VM
+ * @ioreq_buf: The GPA of the IO request shared buffer of a VM
+ *
+ * The parameter for the HC_SET_IOREQ_BUFFER hypercall used to set up
+ * the shared I/O request buffer between Service VM and ACRN hypervisor.
+ */
+struct acrn_ioreq_buffer {
+   u64 ioreq_buf;
+};
+
+struct acrn_ioreq_range {
+   struct list_headlist;
+   u32 type;
+   u64 start;
+   u64 end;
+};
+
+#define ACRN_IOREQ_CLIENT_DESTROYING   0U
+typedefint (*ioreq_handler_t)(struct acrn_ioreq_client *client,
+  struct acrn_io_request *req);
+/**
+ * struct acrn_ioreq_client - Structure of I/O client.
+ * @name:  Client name
+ * @vm:The VM that the client belongs to
+ * @list:  List node for this acrn_ioreq_client
+ * @is_default:If this client is the default one
+ * @flags: Flags 

[PATCH v7 10/18] virt: acrn: Introduce PCI configuration space PIO accesses combiner

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

A User VM can access its virtual PCI configuration spaces via port IO
approach, which has two following steps:
 1) writes address into port 0xCF8
 2) put/get data in/from port 0xCFC

To distribute a complete PCI configuration space access one time, HSM
need to combine such two accesses together.

Combine two paired PIO I/O requests into one PCI I/O request and
continue the I/O request distribution.

Signed-off-by: Shuo Liu 
Reviewed-by: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/acrn_drv.h |  2 +
 drivers/virt/acrn/ioreq.c| 76 
 include/uapi/linux/acrn.h| 15 +++
 3 files changed, 93 insertions(+)

diff --git a/drivers/virt/acrn/acrn_drv.h b/drivers/virt/acrn/acrn_drv.h
index 7e89e4944d0f..97a7f31cd681 100644
--- a/drivers/virt/acrn/acrn_drv.h
+++ b/drivers/virt/acrn/acrn_drv.h
@@ -154,6 +154,7 @@ extern rwlock_t acrn_vm_list_lock;
  * @default_client:The default I/O request client
  * @ioreq_buf: I/O request shared buffer
  * @ioreq_page:The page of the I/O request shared 
buffer
+ * @pci_conf_addr: Address of a PCI configuration access emulation
  */
 struct acrn_vm {
struct list_headlist;
@@ -168,6 +169,7 @@ struct acrn_vm {
struct acrn_ioreq_client*default_client;
struct acrn_io_request_buffer   *ioreq_buf;
struct page *ioreq_page;
+   u32 pci_conf_addr;
 };
 
 struct acrn_vm *acrn_vm_create(struct acrn_vm *vm,
diff --git a/drivers/virt/acrn/ioreq.c b/drivers/virt/acrn/ioreq.c
index ed22b1c4775d..b469f273e20c 100644
--- a/drivers/virt/acrn/ioreq.c
+++ b/drivers/virt/acrn/ioreq.c
@@ -220,6 +220,80 @@ int acrn_ioreq_client_wait(struct acrn_ioreq_client 
*client)
return 0;
 }
 
+static bool is_cfg_addr(struct acrn_io_request *req)
+{
+   return ((req->type == ACRN_IOREQ_TYPE_PORTIO) &&
+   (req->reqs.pio_request.address == 0xcf8));
+}
+
+static bool is_cfg_data(struct acrn_io_request *req)
+{
+   return ((req->type == ACRN_IOREQ_TYPE_PORTIO) &&
+   ((req->reqs.pio_request.address >= 0xcfc) &&
+(req->reqs.pio_request.address < (0xcfc + 4;
+}
+
+/* The low 8-bit of supported pci_reg addr.*/
+#define PCI_LOWREG_MASK  0xFC
+/* The high 4-bit of supported pci_reg addr */
+#define PCI_HIGHREG_MASK 0xF00
+/* Max number of supported functions */
+#define PCI_FUNCMAX7
+/* Max number of supported slots */
+#define PCI_SLOTMAX31
+/* Max number of supported buses */
+#define PCI_BUSMAX 255
+#define CONF1_ENABLE   0x8000UL
+/*
+ * A PCI configuration space access via PIO 0xCF8 and 0xCFC normally has two
+ * following steps:
+ *   1) writes address into 0xCF8 port
+ *   2) accesses data in/from 0xCFC
+ * This function combines such paired PCI configuration space I/O requests into
+ * one ACRN_IOREQ_TYPE_PCICFG type I/O request and continues the processing.
+ */
+static bool handle_cf8cfc(struct acrn_vm *vm,
+ struct acrn_io_request *req, u16 vcpu)
+{
+   int offset, pci_cfg_addr, pci_reg;
+   bool is_handled = false;
+
+   if (is_cfg_addr(req)) {
+   WARN_ON(req->reqs.pio_request.size != 4);
+   if (req->reqs.pio_request.direction == ACRN_IOREQ_DIR_WRITE)
+   vm->pci_conf_addr = req->reqs.pio_request.value;
+   else
+   req->reqs.pio_request.value = vm->pci_conf_addr;
+   is_handled = true;
+   } else if (is_cfg_data(req)) {
+   if (!(vm->pci_conf_addr & CONF1_ENABLE)) {
+   if (req->reqs.pio_request.direction ==
+   ACRN_IOREQ_DIR_READ)
+   req->reqs.pio_request.value = 0x;
+   is_handled = true;
+   } else {
+   offset = req->reqs.pio_request.address - 0xcfc;
+
+   req->type = ACRN_IOREQ_TYPE_PCICFG;
+   pci_cfg_addr = vm->pci_conf_addr;
+   req->reqs.pci_request.bus =
+   (pci_cfg_addr >> 16) & PCI_BUSMAX;
+   req->reqs.pci_request.dev =
+   (pci_cfg_addr >> 11) & PCI_SLOTMAX;
+   req->reqs.pci_request.func =
+   (pci_cfg_addr >> 8) & PCI_FUNCMAX;
+   pci_reg = (pci_cfg_addr & PCI_LOWREG_MASK) +
+  ((pci_cfg_addr >> 16) & PCI_HIGHREG_MASK);
+   req->reqs.pci_request.reg = pci_reg + offset;
+   }
+   }
+
+   if (is_handled)
+   ioreq_complete_request(vm, vcpu, req);
+
+   return is_handled;
+}
+
 static bool in_range(struct acrn_ioreq_range *range,
 struct acrn_io_request *req)
 {

[PATCH v7 08/18] virt: acrn: Introduce EPT mapping management

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

The HSM provides hypervisor services to the ACRN userspace. While
launching a User VM, ACRN userspace needs to allocate memory and request
the ACRN Hypervisor to set up the EPT mapping for the VM.

A mapping cache is introduced for accelerating the translation between
the Service VM kernel virtual address and User VM physical address.

>From the perspective of the hypervisor, the types of GPA of User VM can be
listed as following:
   1) RAM region, which is used by User VM as system ram.
   2) MMIO region, which is recognized by User VM as MMIO. MMIO region is
  used to be utilized for devices emulation.

Generally, User VM RAM regions mapping is set up before VM started and
is released in the User VM destruction. MMIO regions mapping may be set
and unset dynamically during User VM running.

To achieve this, ioctls ACRN_IOCTL_SET_MEMSEG and ACRN_IOCTL_UNSET_MEMSEG
are introduced in HSM.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/Makefile|   2 +-
 drivers/virt/acrn/acrn_drv.h  |  96 ++-
 drivers/virt/acrn/hsm.c   |  15 ++
 drivers/virt/acrn/hypercall.h |  14 ++
 drivers/virt/acrn/mm.c| 306 ++
 drivers/virt/acrn/vm.c|   4 +
 include/uapi/linux/acrn.h |  49 ++
 7 files changed, 476 insertions(+), 10 deletions(-)
 create mode 100644 drivers/virt/acrn/mm.c

diff --git a/drivers/virt/acrn/Makefile b/drivers/virt/acrn/Makefile
index cf8b4ed5e74e..38bc44b6edcd 100644
--- a/drivers/virt/acrn/Makefile
+++ b/drivers/virt/acrn/Makefile
@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_ACRN_HSM) := acrn.o
-acrn-y := hsm.o vm.o
+acrn-y := hsm.o vm.o mm.o
diff --git a/drivers/virt/acrn/acrn_drv.h b/drivers/virt/acrn/acrn_drv.h
index e5aba86cad8c..e47a45280eea 100644
--- a/drivers/virt/acrn/acrn_drv.h
+++ b/drivers/virt/acrn/acrn_drv.h
@@ -12,26 +12,104 @@
 
 extern struct miscdevice acrn_dev;
 
+#define ACRN_MEM_MAPPING_MAX   256
+
+#define ACRN_MEM_REGION_ADD0
+#define ACRN_MEM_REGION_DEL2
+/**
+ * struct vm_memory_region_op - Hypervisor memory operation
+ * @type:  Operation type (ACRN_MEM_REGION_*)
+ * @attr:  Memory attribute (ACRN_MEM_TYPE_* | ACRN_MEM_ACCESS_*)
+ * @user_vm_pa:Physical address of User VM to be mapped.
+ * @service_vm_pa: Physical address of Service VM to be mapped.
+ * @size:  Size of this region.
+ *
+ * Structure containing needed information that is provided to ACRN Hypervisor
+ * to manage the EPT mappings of a single memory region of the User VM. Several
+ *  vm_memory_region_op can be batched to ACRN Hypervisor, see 
+ * vm_memory_region_batch.
+ */
+struct vm_memory_region_op {
+   u32 type;
+   u32 attr;
+   u64 user_vm_pa;
+   u64 service_vm_pa;
+   u64 size;
+};
+
+/**
+ * struct vm_memory_region_batch - A batch of vm_memory_region_op.
+ * @vmid:  A User VM ID.
+ * @reserved:  Reserved.
+ * @regions_num:   The number of vm_memory_region_op.
+ * @regions_gpa:   Physical address of a vm_memory_region_op array.
+ *
+ * HC_VM_SET_MEMORY_REGIONS uses this structure to manage EPT mappings of
+ * multiple memory regions of a User VM. A  vm_memory_region_batch
+ * contains multiple  vm_memory_region_op for batch processing in the
+ * ACRN Hypervisor.
+ */
+struct vm_memory_region_batch {
+   u16 vmid;
+   u16 reserved[3];
+   u32 regions_num;
+   u64 regions_gpa;
+};
+
+/**
+ * struct vm_memory_mapping - Memory map between a User VM and the Service VM
+ * @pages: Pages in Service VM kernel.
+ * @npages:Number of pages.
+ * @service_vm_va: Virtual address in Service VM kernel.
+ * @user_vm_pa:Physical address in User VM.
+ * @size:  Size of this memory region.
+ *
+ * HSM maintains memory mappings between a User VM GPA and the Service VM
+ * kernel VA for accelerating the User VM GPA translation.
+ */
+struct vm_memory_mapping {
+   struct page **pages;
+   int npages;
+   void*service_vm_va;
+   u64 user_vm_pa;
+   size_t  size;
+};
+
 #define ACRN_INVALID_VMID (0xU)
 
 #define ACRN_VM_FLAG_DESTROYED 0U
 /**
  * struct acrn_vm - Properties of ACRN User VM.
- * @list:  Entry within global list of all VMs
- * @vmid:  User VM ID
- * @vcpu_num:  Number of virtual CPUs in the VM
- * @flags: Flags (ACRN_VM_FLAG_*) of the VM. This is VM flag management
- * in HSM which is different from the _vm_creation.vm_flag.
+ * @list:  Entry within global list of all VMs.
+ * @vmid:  User VM ID.
+ * @vcpu_num:  Number of virtual CPUs in the VM.
+ * @flags: Flags 

Re: [PATCH] media: atomisp: ov2722: replace hardcoded function name

2021-01-05 Thread Greg Kroah-Hartman
On Tue, Jan 05, 2021 at 10:29:18PM +0200, Filip Kolev wrote:
> There is a debug message using hardcoded function name instead of the
> __func__ macro. Replace it.
> 
> Report from checkpatch.pl on the file:
> 
> WARNING: Prefer using '"%s...", __func__' to using 'ov2722_remove', this 
> function's name, in a string
> + dev_dbg(>dev, "ov2722_remove...\n");
> 
> Signed-off-by: Filip Kolev 
> ---
>  drivers/staging/media/atomisp/i2c/atomisp-ov2722.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c 
> b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c
> index eecefcd734d0e..21d6bc62d452a 100644
> --- a/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c
> +++ b/drivers/staging/media/atomisp/i2c/atomisp-ov2722.c
> @@ -1175,7 +1175,7 @@ static int ov2722_remove(struct i2c_client *client)
>   struct v4l2_subdev *sd = i2c_get_clientdata(client);
>   struct ov2722_device *dev = to_ov2722_sensor(sd);
>  
> - dev_dbg(>dev, "ov2722_remove...\n");
> + dev_dbg(>dev, "%s...\n", __func__);

dev_dbg() provides the function name already, and this is just a "trace"
call, and ftrace should be used instead, so the whole line should be
removed entirely.

thanks,

greg k-h


[PATCH v7 07/18] virt: acrn: Introduce an ioctl to set vCPU registers state

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

A virtual CPU of User VM has different context due to the different
registers state. ACRN userspace needs to set the virtual CPU
registers state (e.g. giving a initial registers state to a virtual
BSP of a User VM).

HSM provides an ioctl ACRN_IOCTL_SET_VCPU_REGS to do the virtual CPU
registers state setting. The ioctl passes the registers state from ACRN
userspace to the hypervisor directly.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 drivers/virt/acrn/hsm.c   | 21 ++-
 drivers/virt/acrn/hypercall.h | 13 +++
 include/uapi/linux/acrn.h | 69 +++
 3 files changed, 102 insertions(+), 1 deletion(-)

diff --git a/drivers/virt/acrn/hsm.c b/drivers/virt/acrn/hsm.c
index 5fd933471683..2d04ebaa43f8 100644
--- a/drivers/virt/acrn/hsm.c
+++ b/drivers/virt/acrn/hsm.c
@@ -9,6 +9,7 @@
  * Yakui Zhao 
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -46,7 +47,8 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
 {
struct acrn_vm *vm = filp->private_data;
struct acrn_vm_creation *vm_param;
-   int ret = 0;
+   struct acrn_vcpu_regs *cpu_regs;
+   int i, ret = 0;
 
if (vm->vmid == ACRN_INVALID_VMID && cmd != ACRN_IOCTL_CREATE_VM) {
dev_dbg(acrn_dev.this_device,
@@ -100,6 +102,23 @@ static long acrn_dev_ioctl(struct file *filp, unsigned int 
cmd,
case ACRN_IOCTL_DESTROY_VM:
ret = acrn_vm_destroy(vm);
break;
+   case ACRN_IOCTL_SET_VCPU_REGS:
+   cpu_regs = memdup_user((void __user *)ioctl_param,
+  sizeof(struct acrn_vcpu_regs));
+   if (IS_ERR(cpu_regs))
+   return PTR_ERR(cpu_regs);
+
+   for (i = 0; i < ARRAY_SIZE(cpu_regs->reserved); i++)
+   if (cpu_regs->reserved[i])
+   return -EINVAL;
+
+   ret = hcall_set_vcpu_regs(vm->vmid, virt_to_phys(cpu_regs));
+   if (ret < 0)
+   dev_dbg(acrn_dev.this_device,
+   "Failed to set regs state of VM%u!\n",
+   vm->vmid);
+   kfree(cpu_regs);
+   break;
default:
dev_dbg(acrn_dev.this_device, "Unknown IOCTL 0x%x!\n", cmd);
ret = -ENOTTY;
diff --git a/drivers/virt/acrn/hypercall.h b/drivers/virt/acrn/hypercall.h
index 426b66cadb1f..f29cfae08862 100644
--- a/drivers/virt/acrn/hypercall.h
+++ b/drivers/virt/acrn/hypercall.h
@@ -19,6 +19,7 @@
 #define HC_START_VM_HC_ID(HC_ID, HC_ID_VM_BASE + 0x02)
 #define HC_PAUSE_VM_HC_ID(HC_ID, HC_ID_VM_BASE + 0x03)
 #define HC_RESET_VM_HC_ID(HC_ID, HC_ID_VM_BASE + 0x05)
+#define HC_SET_VCPU_REGS   _HC_ID(HC_ID, HC_ID_VM_BASE + 0x06)
 
 /**
  * hcall_create_vm() - Create a User VM
@@ -75,4 +76,16 @@ static inline long hcall_reset_vm(u64 vmid)
return acrn_hypercall1(HC_RESET_VM, vmid);
 }
 
+/**
+ * hcall_set_vcpu_regs() - Set up registers of virtual CPU of a User VM
+ * @vmid:  User VM ID
+ * @regs_state:Service VM GPA of registers state
+ *
+ * Return: 0 on success, <0 on failure
+ */
+static inline long hcall_set_vcpu_regs(u64 vmid, u64 regs_state)
+{
+   return acrn_hypercall2(HC_SET_VCPU_REGS, vmid, regs_state);
+}
+
 #endif /* __ACRN_HSM_HYPERCALL_H */
diff --git a/include/uapi/linux/acrn.h b/include/uapi/linux/acrn.h
index e1608b8a50a2..d5d66b93586e 100644
--- a/include/uapi/linux/acrn.h
+++ b/include/uapi/linux/acrn.h
@@ -35,6 +35,73 @@ struct acrn_vm_creation {
__u64   cpu_affinity;
 };
 
+struct acrn_gp_regs {
+   __le64  rax;
+   __le64  rcx;
+   __le64  rdx;
+   __le64  rbx;
+   __le64  rsp;
+   __le64  rbp;
+   __le64  rsi;
+   __le64  rdi;
+   __le64  r8;
+   __le64  r9;
+   __le64  r10;
+   __le64  r11;
+   __le64  r12;
+   __le64  r13;
+   __le64  r14;
+   __le64  r15;
+};
+
+struct acrn_descriptor_ptr {
+   __le16  limit;
+   __le64  base;
+   __le16  reserved[3];
+} __attribute__ ((__packed__));
+
+struct acrn_regs {
+   struct acrn_gp_regs gprs;
+   struct acrn_descriptor_ptr  gdt;
+   struct acrn_descriptor_ptr  idt;
+
+   __le64  rip;
+   __le64  cs_base;
+   __le64  cr0;
+   __le64  cr4;
+   __le64  cr3;
+   __le64  ia32_efer;
+   __le64  rflags;
+   __le64  reserved_64[4];
+
+   __le32  cs_ar;
+   __le32  cs_limit;
+   __le32

[PATCH v7 05/18] virt: acrn: Introduce ACRN HSM basic driver

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

ACRN Hypervisor Service Module (HSM) is a kernel module in Service VM
which communicates with ACRN userspace through ioctls and talks to ACRN
Hypervisor through hypercalls.

Add a basic HSM driver which allows Service VM userspace to communicate
with ACRN. The following patches will add more ioctls, guest VM memory
mapping caching, I/O request processing, ioeventfd and irqfd into this
module. HSM exports a char device interface (/dev/acrn_hsm) to userspace.

Signed-off-by: Shuo Liu 
Reviewed-by: Reinette Chatre 
Cc: Dave Hansen 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 MAINTAINERS  |  1 +
 drivers/virt/Kconfig |  2 +
 drivers/virt/Makefile|  1 +
 drivers/virt/acrn/Kconfig| 14 ++
 drivers/virt/acrn/Makefile   |  3 ++
 drivers/virt/acrn/acrn_drv.h | 18 
 drivers/virt/acrn/hsm.c  | 87 
 7 files changed, 126 insertions(+)
 create mode 100644 drivers/virt/acrn/Kconfig
 create mode 100644 drivers/virt/acrn/Makefile
 create mode 100644 drivers/virt/acrn/acrn_drv.h
 create mode 100644 drivers/virt/acrn/hsm.c

diff --git a/MAINTAINERS b/MAINTAINERS
index ca190e560dde..f1c481c829cf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -442,6 +442,7 @@ L:  acrn-...@lists.projectacrn.org
 S: Supported
 W: https://projectacrn.org
 F: Documentation/virt/acrn/
+F: drivers/virt/acrn/
 
 AD1889 ALSA SOUND DRIVER
 L: linux-par...@vger.kernel.org
diff --git a/drivers/virt/Kconfig b/drivers/virt/Kconfig
index 80c5f9c16ec1..8061e8ef449f 100644
--- a/drivers/virt/Kconfig
+++ b/drivers/virt/Kconfig
@@ -34,4 +34,6 @@ config FSL_HV_MANAGER
 source "drivers/virt/vboxguest/Kconfig"
 
 source "drivers/virt/nitro_enclaves/Kconfig"
+
+source "drivers/virt/acrn/Kconfig"
 endif
diff --git a/drivers/virt/Makefile b/drivers/virt/Makefile
index f28425ce4b39..3e272ea60cd9 100644
--- a/drivers/virt/Makefile
+++ b/drivers/virt/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_FSL_HV_MANAGER)+= fsl_hypervisor.o
 obj-y  += vboxguest/
 
 obj-$(CONFIG_NITRO_ENCLAVES)   += nitro_enclaves/
+obj-$(CONFIG_ACRN_HSM) += acrn/
diff --git a/drivers/virt/acrn/Kconfig b/drivers/virt/acrn/Kconfig
new file mode 100644
index ..36c80378c30c
--- /dev/null
+++ b/drivers/virt/acrn/Kconfig
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0
+config ACRN_HSM
+   tristate "ACRN Hypervisor Service Module"
+   depends on ACRN_GUEST
+   help
+ ACRN Hypervisor Service Module (HSM) is a kernel module which
+ communicates with ACRN userspace through ioctls and talks to
+ the ACRN Hypervisor through hypercalls. HSM will only run in
+ a privileged management VM, called Service VM, to manage User
+ VMs and do I/O emulation. Not required for simply running
+ under ACRN as a User VM.
+
+ To compile as a module, choose M, the module will be called
+ acrn. If unsure, say N.
diff --git a/drivers/virt/acrn/Makefile b/drivers/virt/acrn/Makefile
new file mode 100644
index ..6920ed798aaf
--- /dev/null
+++ b/drivers/virt/acrn/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_ACRN_HSM) := acrn.o
+acrn-y := hsm.o
diff --git a/drivers/virt/acrn/acrn_drv.h b/drivers/virt/acrn/acrn_drv.h
new file mode 100644
index ..29eedd696327
--- /dev/null
+++ b/drivers/virt/acrn/acrn_drv.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __ACRN_HSM_DRV_H
+#define __ACRN_HSM_DRV_H
+
+#include 
+
+#define ACRN_INVALID_VMID (0xU)
+
+/**
+ * struct acrn_vm - Properties of ACRN User VM.
+ * @vmid:  User VM ID
+ */
+struct acrn_vm {
+   u16 vmid;
+};
+
+#endif /* __ACRN_HSM_DRV_H */
diff --git a/drivers/virt/acrn/hsm.c b/drivers/virt/acrn/hsm.c
new file mode 100644
index ..a8dcb250649d
--- /dev/null
+++ b/drivers/virt/acrn/hsm.c
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ACRN Hypervisor Service Module (HSM)
+ *
+ * Copyright (C) 2020 Intel Corporation. All rights reserved.
+ *
+ * Authors:
+ * Fengwei Yin 
+ * Yakui Zhao 
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include "acrn_drv.h"
+
+/*
+ * When /dev/acrn_hsm is opened, a 'struct acrn_vm' object is created to
+ * represent a VM instance and continues to be associated with the opened file
+ * descriptor. All ioctl operations on this file descriptor will be targeted to
+ * the VM instance. Release of this file descriptor will destroy the object.
+ */
+static int acrn_dev_open(struct inode *inode, struct file *filp)
+{
+   struct acrn_vm *vm;
+
+   vm = kzalloc(sizeof(*vm), GFP_KERNEL);
+   if (!vm)
+   return -ENOMEM;
+
+   vm->vmid = ACRN_INVALID_VMID;
+   filp->private_data = vm;
+   return 0;
+}
+
+static int acrn_dev_release(struct inode *inode, struct file *filp)
+{
+   struct 

[PATCH v7 06/18] virt: acrn: Introduce VM management interfaces

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

The VM management interfaces expose several VM operations to ACRN
userspace via ioctls. For example, creating VM, starting VM, destroying
VM and so on.

The ACRN Hypervisor needs to exchange data with the ACRN userspace
during the VM operations. HSM provides VM operation ioctls to the ACRN
userspace and communicates with the ACRN Hypervisor for VM operations
via hypercalls.

HSM maintains a list of User VM. Each User VM will be bound to an
existing file descriptor of /dev/acrn_hsm. The User VM will be
destroyed when the file descriptor is closed.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 .../userspace-api/ioctl/ioctl-number.rst  |  1 +
 MAINTAINERS   |  1 +
 drivers/virt/acrn/Makefile|  2 +-
 drivers/virt/acrn/acrn_drv.h  | 21 -
 drivers/virt/acrn/hsm.c   | 76 +-
 drivers/virt/acrn/hypercall.h | 78 +++
 drivers/virt/acrn/vm.c| 68 
 include/uapi/linux/acrn.h | 55 +
 8 files changed, 298 insertions(+), 4 deletions(-)
 create mode 100644 drivers/virt/acrn/hypercall.h
 create mode 100644 drivers/virt/acrn/vm.c
 create mode 100644 include/uapi/linux/acrn.h

diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst 
b/Documentation/userspace-api/ioctl/ioctl-number.rst
index a4c75a28c839..0aec83c01368 100644
--- a/Documentation/userspace-api/ioctl/ioctl-number.rst
+++ b/Documentation/userspace-api/ioctl/ioctl-number.rst
@@ -319,6 +319,7 @@ Code  Seq#Include File  
 Comments
 0xA0  alllinux/sdp/sdp.h 
Industrial Device Project
  

 0xA1  0  linux/vtpm_proxy.h  TPM 
Emulator Proxy Driver
+0xA2  alluapi/linux/acrn.h   ACRN 
hypervisor
 0xA3  80-8F  Port ACL  
in development:
  

 0xA3  90-9F  linux/dtlk.h
diff --git a/MAINTAINERS b/MAINTAINERS
index f1c481c829cf..69f3cefed7e5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -443,6 +443,7 @@ S:  Supported
 W: https://projectacrn.org
 F: Documentation/virt/acrn/
 F: drivers/virt/acrn/
+F: include/uapi/linux/acrn.h
 
 AD1889 ALSA SOUND DRIVER
 L: linux-par...@vger.kernel.org
diff --git a/drivers/virt/acrn/Makefile b/drivers/virt/acrn/Makefile
index 6920ed798aaf..cf8b4ed5e74e 100644
--- a/drivers/virt/acrn/Makefile
+++ b/drivers/virt/acrn/Makefile
@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_ACRN_HSM) := acrn.o
-acrn-y := hsm.o
+acrn-y := hsm.o vm.o
diff --git a/drivers/virt/acrn/acrn_drv.h b/drivers/virt/acrn/acrn_drv.h
index 29eedd696327..e5aba86cad8c 100644
--- a/drivers/virt/acrn/acrn_drv.h
+++ b/drivers/virt/acrn/acrn_drv.h
@@ -3,16 +3,35 @@
 #ifndef __ACRN_HSM_DRV_H
 #define __ACRN_HSM_DRV_H
 
+#include 
+#include 
+#include 
 #include 
 
+#include "hypercall.h"
+
+extern struct miscdevice acrn_dev;
+
 #define ACRN_INVALID_VMID (0xU)
 
+#define ACRN_VM_FLAG_DESTROYED 0U
 /**
  * struct acrn_vm - Properties of ACRN User VM.
+ * @list:  Entry within global list of all VMs
  * @vmid:  User VM ID
+ * @vcpu_num:  Number of virtual CPUs in the VM
+ * @flags: Flags (ACRN_VM_FLAG_*) of the VM. This is VM flag management
+ * in HSM which is different from the _vm_creation.vm_flag.
  */
 struct acrn_vm {
-   u16 vmid;
+   struct list_headlist;
+   u16 vmid;
+   int vcpu_num;
+   unsigned long   flags;
 };
 
+struct acrn_vm *acrn_vm_create(struct acrn_vm *vm,
+  struct acrn_vm_creation *vm_param);
+int acrn_vm_destroy(struct acrn_vm *vm);
+
 #endif /* __ACRN_HSM_DRV_H */
diff --git a/drivers/virt/acrn/hsm.c b/drivers/virt/acrn/hsm.c
index a8dcb250649d..5fd933471683 100644
--- a/drivers/virt/acrn/hsm.c
+++ b/drivers/virt/acrn/hsm.c
@@ -9,7 +9,6 @@
  * Yakui Zhao 
  */
 
-#include 
 #include 
 #include 
 #include 
@@ -38,10 +37,82 @@ static int acrn_dev_open(struct inode *inode, struct file 
*filp)
return 0;
 }
 
+/*
+ * HSM relies on hypercall layer of the ACRN hypervisor to do the
+ * sanity check against the input parameters.
+ */
+static long acrn_dev_ioctl(struct file *filp, unsigned int cmd,
+  unsigned long ioctl_param)
+{
+   struct acrn_vm *vm = filp->private_data;
+   struct acrn_vm_creation *vm_param;
+   int ret = 0;
+
+   if (vm->vmid == ACRN_INVALID_VMID && cmd 

[PATCH v7 04/18] x86/acrn: Introduce hypercall interfaces

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

The Service VM communicates with the hypervisor via conventional
hypercalls. VMCALL instruction is used to make the hypercalls.

ACRN hypercall ABI:
  * Hypercall number is in R8 register.
  * Up to 2 parameters are in RDI and RSI registers.
  * Return value is in RAX register.

Introduce the ACRN hypercall interfaces. Because GCC doesn't support R8
register as direct register constraints, use supported constraint as
input with a explicit MOV to R8 in beginning of asm.

Originally-by: Yakui Zhao 
Signed-off-by: Shuo Liu 
Reviewed-by: Reinette Chatre 
Reviewed-by: Nick Desaulniers 
Acked-by: Borislav Petkov 
Cc: Dave Hansen 
Cc: Sean Christopherson 
Cc: Dan Williams 
Cc: Fengwei Yin 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
Cc: Borislav Petkov 
Cc: Arvind Sankar 
Cc: Peter Zijlstra 
Cc: Nick Desaulniers 
Cc: Segher Boessenkool 
---
 arch/x86/include/asm/acrn.h | 54 +
 1 file changed, 54 insertions(+)

diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h
index 127f20672c5d..e003a01b7c67 100644
--- a/arch/x86/include/asm/acrn.h
+++ b/arch/x86/include/asm/acrn.h
@@ -21,4 +21,58 @@ static inline u32 acrn_cpuid_base(void)
return 0;
 }
 
+/*
+ * Hypercalls for ACRN
+ *
+ * - VMCALL instruction is used to implement ACRN hypercalls.
+ * - ACRN hypercall ABI:
+ *   - Hypercall number is passed in R8 register.
+ *   - Up to 2 arguments are passed in RDI, RSI.
+ *   - Return value will be placed in RAX.
+ *
+ * Because GCC doesn't support R8 register as direct register constraints, use
+ * supported constraint as input with a explicit MOV to R8 in beginning of asm.
+ */
+static inline long acrn_hypercall0(unsigned long hcall_id)
+{
+   long result;
+
+   asm volatile("movl %1, %%r8d\n\t"
+"vmcall\n\t"
+: "=a" (result)
+: "g" (hcall_id)
+: "r8", "memory");
+
+   return result;
+}
+
+static inline long acrn_hypercall1(unsigned long hcall_id,
+  unsigned long param1)
+{
+   long result;
+
+   asm volatile("movl %1, %%r8d\n\t"
+"vmcall\n\t"
+: "=a" (result)
+: "g" (hcall_id), "D" (param1)
+: "r8", "memory");
+
+   return result;
+}
+
+static inline long acrn_hypercall2(unsigned long hcall_id,
+  unsigned long param1,
+  unsigned long param2)
+{
+   long result;
+
+   asm volatile("movl %1, %%r8d\n\t"
+"vmcall\n\t"
+: "=a" (result)
+: "g" (hcall_id), "D" (param1), "S" (param2)
+: "r8", "memory");
+
+   return result;
+}
+
 #endif /* _ASM_X86_ACRN_H */
-- 
2.28.0



Re: [PATCH v2 2/2] ARM: dts: add Protonic MVT board

2021-01-05 Thread Oleksij Rempel
Hi Shawn,

On Tue, Jan 05, 2021 at 10:35:17AM +0800, Shawn Guo wrote:
> On Tue, Dec 01, 2020 at 08:41:25AM +0100, Oleksij Rempel wrote:
> > PRTMVT is the reference platform for Protonic industrial touchscreen 
> > terminals.
> > 
> > Signed-off-by: Oleksij Rempel 

> > ---
> > +   gpio-keys {
> > +   compatible = "gpio-keys";
> > +   pinctrl-names = "default";
> > +   pinctrl-0 = <_gpiokeys>;
> > +   autorepeat;
> > +
> > +   power {
> > +   label = "Power Button";
> > +   gpios = < 23 GPIO_ACTIVE_LOW>;
> > +   linux,code = <116>; /* KEY_POWER */
> 
> Why not just using defines?

Uff, I didn't noticed there are existing defines. Thx, done.

> > +   wakeup-source;
> > +   };
> > +

> > +   panel {
> > +   compatible = "kyo,tcg070wvlq", "lg,lb070wv8";
> 
> Why do you need two compatibles for a panel?  The first one seems
> undocumented.

kyo,tcg070wvlq seems to be compatible with lg,lb070wv8. Currently there
is no need for driver modification.
The kyo,tcg070wvlq documentation should be added with the patch:
"dt-bindings: display: simple: Add Kyocera tcg070wvlq panel"
https://lkml.org/lkml/2020/12/7/591

> > +   backlight = <>;
> > +   power-supply = <_3v3>;
> > +   video@5c {
> > +   compatible = "ti,tvp5150";
> > +   reg = <0x5c>;
> > +
> 
> Unnecessary newline.

done

> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +
> > +   port@0 {
> > +   reg = <0>;
> 
> Have a newline between properties and child node.

done

> > +   tvp5150_comp0_in: endpoint {
> > +   remote-endpoint = <_out>;
> > +   };
> > +   };
> > +
> > +   /* Output port 2 is video output pad */
> > +   port@2 {
> > +   reg = <2>;
> > +   tvp5151_to_ipu1_csi0_mux: endpoint {
> > +   remote-endpoint = 
> > <_csi0_mux_from_parallel_sensor>;
> > +   };
> > +   };
> > +   };
> > +
> > +   gpio_pca: gpio@74 {
> > +   #gpio-cells = <2>;
> 
> We usually begin with 'compatible'.  Can you move this line after
> 'gpio-controller' maybe?

done

Regards,
Oleksij

-- 
Pengutronix e.K.   | |
Steuerwalder Str. 21   | http://www.pengutronix.de/  |
31137 Hildesheim, Germany  | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |


[PATCH v7 03/18] x86/acrn: Introduce acrn_cpuid_base() and hypervisor feature bits

2021-01-05 Thread shuo . a . liu
From: Yin Fengwei 

ACRN Hypervisor reports hypervisor features via CPUID leaf 0x4001
which is similar to KVM. A VM can check if it's the privileged VM using
the feature bits. The Service VM is the only privileged VM by design.

Signed-off-by: Yin Fengwei 
Signed-off-by: Shuo Liu 
Reviewed-by: Reinette Chatre 
Acked-by: Borislav Petkov 
Cc: Dave Hansen 
Cc: Sean Christopherson 
Cc: Dan Williams 
Cc: Fengwei Yin 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 arch/x86/include/asm/acrn.h | 16 
 arch/x86/kernel/cpu/acrn.c  |  2 +-
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h
index ff259b69cde7..127f20672c5d 100644
--- a/arch/x86/include/asm/acrn.h
+++ b/arch/x86/include/asm/acrn.h
@@ -2,7 +2,23 @@
 #ifndef _ASM_X86_ACRN_H
 #define _ASM_X86_ACRN_H
 
+/*
+ * This CPUID returns feature bitmaps in EAX.
+ * Guest VM uses this to detect the appropriate feature bit.
+ */
+#defineACRN_CPUID_FEATURES 0x4001
+/* Bit 0 indicates whether guest VM is privileged */
+#defineACRN_FEATURE_PRIVILEGED_VM  BIT(0)
+
 void acrn_setup_intr_handler(void (*handler)(void));
 void acrn_remove_intr_handler(void);
 
+static inline u32 acrn_cpuid_base(void)
+{
+   if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
+   return hypervisor_cpuid_base("ACRNACRNACRN", 0);
+
+   return 0;
+}
+
 #endif /* _ASM_X86_ACRN_H */
diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c
index e0c181781905..23f5f27b5a02 100644
--- a/arch/x86/kernel/cpu/acrn.c
+++ b/arch/x86/kernel/cpu/acrn.c
@@ -21,7 +21,7 @@
 
 static u32 __init acrn_detect(void)
 {
-   return hypervisor_cpuid_base("ACRNACRNACRN", 0);
+   return acrn_cpuid_base();
 }
 
 static void __init acrn_init_platform(void)
-- 
2.28.0



[PATCH v7 02/18] x86/acrn: Introduce acrn_{setup, remove}_intr_handler()

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

The ACRN Hypervisor builds an I/O request when a trapped I/O access
happens in User VM. Then, ACRN Hypervisor issues an upcall by sending
a notification interrupt to the Service VM. HSM in the Service VM needs
to hook the notification interrupt to handle I/O requests.

Notification interrupts from ACRN Hypervisor are already supported and
a, currently uninitialized, callback called.

Export two APIs for HSM to setup/remove its callback.

Originally-by: Yakui Zhao 
Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Acked-by: Borislav Petkov 
Cc: Dave Hansen 
Cc: Sean Christopherson 
Cc: Dan Williams 
Cc: Fengwei Yin 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
---
 arch/x86/include/asm/acrn.h |  8 
 arch/x86/kernel/cpu/acrn.c  | 14 ++
 2 files changed, 22 insertions(+)
 create mode 100644 arch/x86/include/asm/acrn.h

diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h
new file mode 100644
index ..ff259b69cde7
--- /dev/null
+++ b/arch/x86/include/asm/acrn.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_ACRN_H
+#define _ASM_X86_ACRN_H
+
+void acrn_setup_intr_handler(void (*handler)(void));
+void acrn_remove_intr_handler(void);
+
+#endif /* _ASM_X86_ACRN_H */
diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c
index 0b2c03943ac6..e0c181781905 100644
--- a/arch/x86/kernel/cpu/acrn.c
+++ b/arch/x86/kernel/cpu/acrn.c
@@ -10,6 +10,8 @@
  */
 
 #include 
+
+#include 
 #include 
 #include 
 #include 
@@ -55,6 +57,18 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_acrn_hv_callback)
set_irq_regs(old_regs);
 }
 
+void acrn_setup_intr_handler(void (*handler)(void))
+{
+   acrn_intr_handler = handler;
+}
+EXPORT_SYMBOL_GPL(acrn_setup_intr_handler);
+
+void acrn_remove_intr_handler(void)
+{
+   acrn_intr_handler = NULL;
+}
+EXPORT_SYMBOL_GPL(acrn_remove_intr_handler);
+
 const __initconst struct hypervisor_x86 x86_hyper_acrn = {
.name   = "ACRN",
.detect = acrn_detect,
-- 
2.28.0



[PATCH v2] binfmt_elf: Fix fill_prstatus() call in fill_note_info()

2021-01-05 Thread Geert Uytterhoeven
On m68k, which does not define CORE_DUMP_USE_REGSET:

fs/binfmt_elf.c: In function ‘fill_note_info’:
fs/binfmt_elf.c:2040:20: error: passing argument 1 of ‘fill_prstatus’ from 
incompatible pointer type [-Werror=incompatible-pointer-types]
 2040 |  fill_prstatus(info->prstatus, current, siginfo->si_signo);
  |^~
  ||
  |struct elf_prstatus *
fs/binfmt_elf.c:1498:55: note: expected ‘struct elf_prstatus_common *’ but 
argument is of type ‘struct elf_prstatus *’
 1498 | static void fill_prstatus(struct elf_prstatus_common *prstatus,
  |   ^~~~

The fill_prstatus() signature was changed, but one caller was not
updated.

Reported-by: nore...@ellerman.id.au
Fixes: 147d88b334cd5416 ("elf_prstatus: collect the common part (everything 
before pr_reg) into a struct")
Signed-off-by: Geert Uytterhoeven 
---
Compile-tested only.  Feel free to fold into the original commit.

v2:
  - Drop unrelated patches from series.
---
 fs/binfmt_elf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
index 1b678aff3bac93eb..4c1550b13899efd7 100644
--- a/fs/binfmt_elf.c
+++ b/fs/binfmt_elf.c
@@ -2037,7 +2037,7 @@ static int fill_note_info(struct elfhdr *elf, int phdrs,
}
/* now collect the dump for the current */
memset(info->prstatus, 0, sizeof(*info->prstatus));
-   fill_prstatus(info->prstatus, current, siginfo->si_signo);
+   fill_prstatus(>prstatus->common, current, siginfo->si_signo);
elf_core_copy_regs(>prstatus->pr_reg, regs);
 
/* Set up header */
-- 
2.25.1



Re: [PATCH v2] Bluetooth: btrtl: Add null check in setup

2021-01-05 Thread Marcel Holtmann
Hi Abhishek,

> btrtl_dev->ic_info is only available from the controller on cold boot
> (the lmp subversion matches the device model and this is used to look up
> the ic_info). On warm boots (firmware already loaded),
> btrtl_dev->ic_info is null.
> 
> Fixes: 05672a2c14a4 (Bluetooth: btrtl: Enable central-peripheral role)
> Signed-off-by: Abhishek Pandit-Subedi 
> ---
> 
> Changes in v2:
> - Added nullcheck with goto done
> 
> drivers/bluetooth/btrtl.c | 4 
> 1 file changed, 4 insertions(+)

patch has been applied to bluetooth-next tree.

Regards

Marcel



[PATCH v7 01/18] docs: acrn: Introduce ACRN

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

Add documentation on the following aspects of ACRN:

  1) A brief introduction on the architecture of ACRN.
  2) I/O request handling in ACRN.
  3) CPUID functions of ACRN.

To learn more about ACRN, please go to ACRN project website
https://projectacrn.org, or the documentation page
https://projectacrn.github.io/.

Signed-off-by: Shuo Liu 
Reviewed-by: Zhi Wang 
Reviewed-by: Reinette Chatre 
Reviewed-by: Borislav Petkov 
Cc: Dave Hansen 
Cc: Sen Christopherson 
Cc: Dan Williams 
Cc: Fengwei Yin 
Cc: Zhi Wang 
Cc: Zhenyu Wang 
Cc: Yu Wang 
Cc: Reinette Chatre 
Cc: Greg Kroah-Hartman 
Cc: Randy Dunlap 
---
 Documentation/virt/acrn/cpuid.rst| 46 +++
 Documentation/virt/acrn/index.rst| 12 +++
 Documentation/virt/acrn/introduction.rst | 43 +++
 Documentation/virt/acrn/io-request.rst   | 97 
 Documentation/virt/index.rst |  1 +
 MAINTAINERS  |  7 ++
 6 files changed, 206 insertions(+)
 create mode 100644 Documentation/virt/acrn/cpuid.rst
 create mode 100644 Documentation/virt/acrn/index.rst
 create mode 100644 Documentation/virt/acrn/introduction.rst
 create mode 100644 Documentation/virt/acrn/io-request.rst

diff --git a/Documentation/virt/acrn/cpuid.rst 
b/Documentation/virt/acrn/cpuid.rst
new file mode 100644
index ..16727fc412f0
--- /dev/null
+++ b/Documentation/virt/acrn/cpuid.rst
@@ -0,0 +1,46 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+===
+ACRN CPUID bits
+===
+
+A guest VM running on an ACRN hypervisor, can check some of its features using
+CPUID.
+
+ACRN cpuid functions are:
+
+function: 0x4000
+
+returns::
+
+   eax = 0x4010
+   ebx = 0x4e524341
+   ecx = 0x4e524341
+   edx = 0x4e524341
+
+Note that this value in ebx, ecx and edx corresponds to the string
+"ACRNACRNACRN". The value in eax corresponds to the maximum cpuid function
+present in this leaf, and will be updated if more functions are added in the
+future.
+
+function: define ACRN_CPUID_FEATURES (0x4001)
+
+returns::
+
+  ebx, ecx, edx
+  eax = an OR'ed group of (1 << flag)
+
+where ``flag`` is defined as below:
+
+= === 
+flag  value   meaning
+= === 
+ACRN_FEATURE_PRIVILEGED_VM0   guest VM is a privileged VM
+= === 
+
+function: 0x4010
+
+returns::
+
+  ebx, ecx, edx
+  eax = (Virtual) TSC frequency in kHz.
diff --git a/Documentation/virt/acrn/index.rst 
b/Documentation/virt/acrn/index.rst
new file mode 100644
index ..b5f793e73df5
--- /dev/null
+++ b/Documentation/virt/acrn/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+===
+ACRN Hypervisor
+===
+
+.. toctree::
+   :maxdepth: 1
+
+   introduction
+   io-request
+   cpuid
diff --git a/Documentation/virt/acrn/introduction.rst 
b/Documentation/virt/acrn/introduction.rst
new file mode 100644
index ..f8d081bc084d
--- /dev/null
+++ b/Documentation/virt/acrn/introduction.rst
@@ -0,0 +1,43 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+ACRN Hypervisor Introduction
+
+
+The ACRN Hypervisor is a Type 1 hypervisor, running directly on bare-metal
+hardware. It has a privileged management VM, called Service VM, to manage User
+VMs and do I/O emulation.
+
+ACRN userspace is an application running in the Service VM that emulates
+devices for a User VM based on command line configurations. ACRN Hypervisor
+Service Module (HSM) is a kernel module in the Service VM which provides
+hypervisor services to the ACRN userspace.
+
+Below figure shows the architecture.
+
+::
+
+Service VMUser VM
+  ++  |  +--+
+  |+--+|  |  |  |
+  ||ACRN userspace||  |  |  |
+  |+--+|  |  |  |
+  |-ioctl--|  |  |  |   ...
+  |kernel space   +--+ |  |  |  |
+  |   |   HSM| |  |  | Drivers  |
+  |   +--+ |  |  |  |
+  +|---+  |  +--+
+  +-hypercall+
+  | ACRN Hypervisor  |
+  +--+
+  |  Hardware|
+  +--+
+
+ACRN userspace allocates memory for the User VM, configures and initializes the
+devices used by the User 

[PATCH v7 00/18] HSM driver for ACRN hypervisor

2021-01-05 Thread shuo . a . liu
From: Shuo Liu 

ACRN is a Type 1 reference hypervisor stack, running directly on the bare-metal
hardware, and is suitable for a variety of IoT and embedded device solutions.

ACRN implements a hybrid VMM architecture, using a privileged Service VM. The
Service VM manages the system resources (CPU, memory, etc.) and I/O devices of
User VMs. Multiple User VMs are supported, with each of them running Linux,
Android OS or Windows. Both Service VM and User VMs are guest VM.

Below figure shows the architecture.

Service VMUser VM
  ++  |  +--+
  |+--+|  |  |  |
  ||ACRN userspace||  |  |  |
  |+--+|  |  |  |
  |-ioctl--|  |  |  |   ...
  |kernel space   +--+ |  |  |  |
  |   |   HSM| |  |  | Drivers  |
  |   +--+ |  |  |  |
  +|---+  |  +--+
  +-hypercall+
  |   ACRN Hypervisor|
  +--+
  |  Hardware|
  +--+

There is only one Service VM which could run Linux as OS.

In a typical case, the Service VM will be auto started when ACRN Hypervisor is
booted. Then the ACRN userspace (an application running in Service VM) could be
used to start/stop User VMs by communicating with ACRN Hypervisor Service
Module (HSM).

ACRN Hypervisor Service Module (HSM) is a middle layer that allows the ACRN
userspace and Service VM OS kernel to communicate with ACRN Hypervisor
and manage different User VMs. This middle layer provides the following
functionalities,
  - Issues hypercalls to the hypervisor to manage User VMs:
  * VM/vCPU management
  * Memory management
  * Device passthrough
  * Interrupts injection
  - I/O requests handling from User VMs.
  - Exports ioctl through HSM char device.
  - Exports function calls for other kernel modules

ACRN is focused on embedded system. So it doesn't support some features.
E.g.,
  - ACRN doesn't support VM migration.
  - ACRN doesn't support vCPU migration.

This patch set adds the HSM to the Linux kernel.
I also added a simple example to launch a small guest (with several instructions
as payload) on ACRN with demonstration ioctl usage.

The basic ARCN support was merged to upstream already.
https://lore.kernel.org/lkml/1559108037-18813-3-git-send-email-yakui.z...@intel.com/

ChangeLog:
v7:
  - Typo fixed in documentation. (Boris)
  - Verified some reserved fields of ioctls. (Greg)
  - Rebased to v5.11-rc2.

v6:
  - Added the cpuid.rst documentation (Boris)
  - Deleted exported acrn_is_privileged_vm(), user detects feature bits by 
cpuid_eax() directly (Boris)
  - Used 'g' as the hcall_id constrain in hypercall definitions (Boris, Segher)
  - Removed unnecessary reserved fields from structures. Sorted some fields for 
alignment (Greg)
  - Used built-in kernel guid_t types (Greg)
  - Specified the endian of some fields in user/kernel interface structures 
(Greg)
  - Removed the alignment attribute from user/kernel interface structures (Greg)
  - Set reserved fields to zero (Greg)
  - Added a ioctl interface usage sample in the last patch (Greg)
  - Used pin_user_pages*() instead of get_user_pages*().

v5:
  - Corrected typo in documentation.
  - Removed unused pr_fmt().
  - Used supported constraint with a explicit MOV to R8 at beginning of ASM for 
hypercall interface.
  - Used dev_dbg() to replace dev_err() in places which might cause a DoS.
  - Introduced acrn_vm_list_lock as a mutex for friendly review.
  - Changed to use default attribute group list to add attribute files.

v4:
  - Used acrn_dev.this_device directly for dev_*() (Reinette)
  - Removed the odd usage of {get|put}_device() on _dev->this_device (Greg)
  - Removed unused log code. (Greg)
  - Corrected the return error values. (Greg)
  - Mentioned that HSM relies hypervisor for sanity check in acrn_dev_ioctl() 
comments (Greg)

v3:
  - Used {get|put}_device() helpers on _dev->this_device
  - Moved unused code from front patches to later ones.
  - Removed self-defined pr_fmt() and dev_fmt()
  - Provided comments for acrn_vm_list_lock.

v2:
  - Removed API version related code. (Dave)
  - Replaced pr_*() by dev_*(). (Greg)
  - Used -ENOTTY as the error code of unsupported ioctl. (Greg)




Shuo Liu (17):
  docs: acrn: Introduce ACRN
  x86/acrn: Introduce acrn_{setup, remove}_intr_handler()
  x86/acrn: Introduce hypercall interfaces
  virt: acrn: Introduce ACRN HSM basic driver
  virt: acrn: Introduce VM management interfaces
  

Re: [PATCH v1] Bluetooth: hci_qca: Wait for SSR completion during suspend

2021-01-05 Thread Marcel Holtmann
Hi Venkata,

> During SSR after memory dump collection,BT controller will be powered off,
> powered on and then FW will be downloaded.During suspend if BT controller
> is powered off due to SSR then we should wait until SSR is completed and
> then suspend.
> 
> Fixes: 2be43abac5a8 ("Bluetooth: hci_qca: Wait for timeout during suspend")
> Signed-off-by: Venkata Lakshmi Narayana Gubba 
> ---
> drivers/bluetooth/hci_qca.c | 16 +---
> 1 file changed, 9 insertions(+), 7 deletions(-)

patch has been applied to bluetooth-next tree.

Regards

Marcel



Re: [PATCH] Bluetooth: hci_qca: Fix memleak in qca_controller_memdump

2021-01-05 Thread Marcel Holtmann
Hi Dinghao,

> When __le32_to_cpu() fails, qca_memdump should be freed
> just like when vmalloc() fails.
> 
> Fixes: d841502c79e3f ("Bluetooth: hci_qca: Collect controller memory dump 
> during SSR")
> Signed-off-by: Dinghao Liu 
> ---
> drivers/bluetooth/hci_qca.c | 2 ++
> 1 file changed, 2 insertions(+)

patch has been to bluetooth-next tree.

Regards

Marcel



Re: [PATCH] Bluetooth: avoid u128_xor() on potentially misaligned inputs

2021-01-05 Thread Marcel Holtmann
Hi Ard,

> u128_xor() takes pointers to quantities that are assumed to be at least
> 64-bit aligned, which is not guaranteed to be the case in the smp_c1()
> routine. So switch to crypto_xor() instead.
> 
> Signed-off-by: Ard Biesheuvel 
> ---
> net/bluetooth/smp.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)

patch has been applied to bluetooth-next tree.

Regards

Marcel



Re: [PATCH 2/2] Bluetooth: hci_h5: Add support for binding RTL8723DS with device tree

2021-01-05 Thread Marcel Holtmann
Hi John-Eric,

> RTL8723DS could be handled by btrtl-driver, so add ability to bind it
> using device tree.
> 
> Signed-off-by: John-Eric Kamps 
> ---
> drivers/bluetooth/hci_h5.c | 2 ++
> 1 file changed, 2 insertions(+)

patch has been applied to bluetooth-next tree.

Regards

Marcel



[PATCH] binfmt_elf: Fix fill_prstatus() call in fill_note_info()

2021-01-05 Thread Geert Uytterhoeven
On m68k, which does not define CORE_DUMP_USE_REGSET:

fs/binfmt_elf.c: In function ‘fill_note_info’:
fs/binfmt_elf.c:2040:20: error: passing argument 1 of ‘fill_prstatus’ from 
incompatible pointer type [-Werror=incompatible-pointer-types]
 2040 |  fill_prstatus(info->prstatus, current, siginfo->si_signo);
  |^~
  ||
  |struct elf_prstatus *
fs/binfmt_elf.c:1498:55: note: expected ‘struct elf_prstatus_common *’ but 
argument is of type ‘struct elf_prstatus *’
 1498 | static void fill_prstatus(struct elf_prstatus_common *prstatus,
  |   ^~~~

The fill_prstatus() signature was changed, but one caller was not
updated.

Reported-by: nore...@ellerman.id.au
Fixes: 147d88b334cd5416 ("elf_prstatus: collect the common part (everything 
before pr_reg) into a struct")
Signed-off-by: Geert Uytterhoeven 
---
Compile-tested only.  Feel free to fold into the original commit.
---
 fs/binfmt_elf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
index 1b678aff3bac93eb..4c1550b13899efd7 100644
--- a/fs/binfmt_elf.c
+++ b/fs/binfmt_elf.c
@@ -2037,7 +2037,7 @@ static int fill_note_info(struct elfhdr *elf, int phdrs,
}
/* now collect the dump for the current */
memset(info->prstatus, 0, sizeof(*info->prstatus));
-   fill_prstatus(info->prstatus, current, siginfo->si_signo);
+   fill_prstatus(>prstatus->common, current, siginfo->si_signo);
elf_core_copy_regs(>prstatus->pr_reg, regs);
 
/* Set up header */
-- 
2.25.1



Re: [RFC PATCH v3 2/6] swiotlb: Add restricted DMA pool

2021-01-05 Thread Greg KH
On Wed, Jan 06, 2021 at 11:41:20AM +0800, Claire Chang wrote:
> Add the initialization function to create restricted DMA pools from
> matching reserved-memory nodes in the device tree.
> 
> Signed-off-by: Claire Chang 
> ---
>  include/linux/device.h  |   4 ++
>  include/linux/swiotlb.h |   7 +-
>  kernel/dma/Kconfig  |   1 +
>  kernel/dma/swiotlb.c| 144 ++--
>  4 files changed, 131 insertions(+), 25 deletions(-)
> 
> diff --git a/include/linux/device.h b/include/linux/device.h
> index 89bb8b84173e..ca6f71ec8871 100644
> --- a/include/linux/device.h
> +++ b/include/linux/device.h
> @@ -413,6 +413,7 @@ struct dev_links_info {
>   * @dma_pools:   Dma pools (if dma'ble device).
>   * @dma_mem: Internal for coherent mem override.
>   * @cma_area:Contiguous memory area for dma allocations
> + * @dma_io_tlb_mem: Internal for swiotlb io_tlb_mem override.

Why does this have to be added here?  Shouldn't the platform-specific
code handle it instead?

thanks,

greg k-h


Re: [PATCH v2 07/11] perf c2c: Refactor node display macro

2021-01-05 Thread Namhyung Kim
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan  wrote:
>
> The macro DISPLAY_HITM() is used to calculate HITM percentage introduced
> by every node and it's shown for the node info.
>
> This patch refactors the macro, it is renamed it as DISPLAY_METRICS().
> And the parameters is changed for passing the metric's statistic value
> and the sum value, this is flexsible for later's extension, e.g. it's
> easier to be used for metrics which combines multiple fields from
> structure c2c_stats.

Same as the previous one.

Thanks,
Namhyung


>
> Signed-off-by: Leo Yan 
> ---
>  tools/perf/builtin-c2c.c | 17 ++---
>  1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
> index f11c3c84bb2b..50018bfb1089 100644
> --- a/tools/perf/builtin-c2c.c
> +++ b/tools/perf/builtin-c2c.c
> @@ -1324,23 +1324,26 @@ node_entry(struct perf_hpp_fmt *fmt __maybe_unused, 
> struct perf_hpp *hpp,
> ret = scnprintf(hpp->buf, hpp->size, "%2d{%2d ", 
> node, num);
> advance_hpp(hpp, ret);
>
> -   #define DISPLAY_HITM(__h) 
>   \
> -   if (c2c_he->stats.__h> 0) {   
>   \
> +   #define DISPLAY_METRICS(val, sum) 
>   \
> +   { 
>   \
> +   if ((sum) > 0) {  
>   \
> ret = scnprintf(hpp->buf, hpp->size, "%5.1f%% 
> ",\
> -   percent(stats->__h, 
> c2c_he->stats.__h));\
> +   percent((val), (sum)));   
>   \
> } else {  
>   \
> ret = scnprintf(hpp->buf, hpp->size, "%6s ", 
> "n/a");\
> -   }
> +   } 
>   \
> +   }
>
> switch (c2c.display) {
> case DISPLAY_RMT:
> -   DISPLAY_HITM(rmt_hitm);
> +   DISPLAY_METRICS(stats->rmt_hitm, 
> c2c_he->stats.rmt_hitm);
> break;
> case DISPLAY_LCL:
> -   DISPLAY_HITM(lcl_hitm);
> +   DISPLAY_METRICS(stats->lcl_hitm, 
> c2c_he->stats.lcl_hitm);
> break;
> case DISPLAY_TOT:
> -   DISPLAY_HITM(tot_hitm);
> +   DISPLAY_METRICS(stats->tot_hitm, 
> c2c_he->stats.tot_hitm);
> +   break;
> default:
> break;
> }
> --
> 2.17.1
>


Re: [PATCH v2 06/11] perf c2c: Refactor display filter macro

2021-01-05 Thread Namhyung Kim
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan  wrote:
>
> When sort on the respective metrics (lcl_hitm, rmt_hitm, tot_hitm),
> macro FILTER_HITM is to filter out the cache line entries if its
> overhead is less than 1%.
>
> This patch is to refactor macro FILTER_HITM.  It uses more gernal name
> FILTER_DISPLAY to replace the old name; and refines its parameter,
> rather than passing field name for the data structure, it changes to
> pass the cache line's statistic value and the sum value, this is more
> flexsible, e.g. if consider to extend for sorting on all load hits
> which combines multiple fields from structure c2c_stats.

As it doesn't use field names anymore, I think it's better to change it to
a static function.

Thanks,
Namhyung


>
> Signed-off-by: Leo Yan 
> ---
>  tools/perf/builtin-c2c.c | 17 ++---
>  1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
> index 5cd30c083d6c..f11c3c84bb2b 100644
> --- a/tools/perf/builtin-c2c.c
> +++ b/tools/perf/builtin-c2c.c
> @@ -2151,24 +2151,27 @@ static bool he__display(struct hist_entry *he, struct 
> c2c_stats *stats)
>
> c2c_he = container_of(he, struct c2c_hist_entry, he);
>
> -#define FILTER_HITM(__h)   \
> -   if (stats->__h) {   \
> -   ld_dist = ((double)c2c_he->stats.__h / stats->__h); \
> +#define FILTER_DISPLAY(val, sum)   \
> +{  \
> +   if ((sum)) {\
> +   ld_dist = ((double)(val) / (sum));  \
> if (ld_dist < DISPLAY_LINE_LIMIT)   \
> he->filtered = HIST_FILTER__C2C;\
> } else {\
> he->filtered = HIST_FILTER__C2C;\
> -   }
> +   }   \
> +}
>
> switch (c2c.display) {
> case DISPLAY_LCL:
> -   FILTER_HITM(lcl_hitm);
> +   FILTER_DISPLAY(c2c_he->stats.lcl_hitm, stats->lcl_hitm);
> break;
> case DISPLAY_RMT:
> -   FILTER_HITM(rmt_hitm);
> +   FILTER_DISPLAY(c2c_he->stats.rmt_hitm, stats->rmt_hitm);
> break;
> case DISPLAY_TOT:
> -   FILTER_HITM(tot_hitm);
> +   FILTER_DISPLAY(c2c_he->stats.tot_hitm, stats->tot_hitm);
> +   break;
> default:
> break;
> }
> --
> 2.17.1
>


Re: [PATCH v2 04/11] perf c2c: Rename for shared cache line stats

2021-01-05 Thread Namhyung Kim
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan  wrote:
>
> For shared cache line statistics, it relies on HITM.  We can use more
> general naming rather than only binding to HITM, so replace "hitm_stats"
> with "shared_clines_stats" in structure perf_c2c, and rename function
> resort_hitm_cb() to resort_shared_cl_cb().
>
> Signed-off-by: Leo Yan 
> ---
>  tools/perf/builtin-c2c.c | 14 +++---
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
> index 27745340c14a..580c4ead68db 100644
> --- a/tools/perf/builtin-c2c.c
> +++ b/tools/perf/builtin-c2c.c
> @@ -97,8 +97,8 @@ struct perf_c2c {
> bool symbol_full;
> bool stitch_lbr;
>
> -   /* HITM shared clines stats */
> -   struct c2c_statshitm_stats;
> +   /* Shared clines stats */

Please change it to "Shared cache line stats".

Thanks,
Namhyung


> +   struct c2c_statsshared_clines_stats;
> int shared_clines;
>
> int  display;


Re: [PATCH v2 03/11] perf c2c: Add dimensions for load miss

2021-01-05 Thread Namhyung Kim
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan  wrote:
>
> Add dimensions for load miss and its percentage calculation, which is to
> be displayed in the single cache line output.
>
> Signed-off-by: Leo Yan 
> ---
>  tools/perf/builtin-c2c.c | 107 +++
>  1 file changed, 107 insertions(+)
>
> diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
> index 00014e3d81fa..27745340c14a 100644
> --- a/tools/perf/builtin-c2c.c
> +++ b/tools/perf/builtin-c2c.c
> @@ -624,6 +624,10 @@ tot_hitm_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
>  (stats)->rmt_hitm +\
>  (stats)->rmt_hit)
>
> +#define TOT_LD_MISS(stats) \
> +   ((stats)->lcl_dram +\
> +(stats)->rmt_dram)
> +

Is this true always?  I'm not sure if there's a case where stores can go to DRAM
directly.. maybe like a kind of uncached accesses.

Also it can be a static function..

Thanks,
Namhyung


[PATCH 2/2] misc: add support for retimers interfaces on Intel MAX 10 BMC

2021-01-05 Thread Xu Yilun
This driver supports the ethernet retimers (C827) for the Intel PAC
(Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.

C827 is an Intel(R) Ethernet serdes transceiver chip that supports
up to 100G transfer. On Intel PAC N3000 there are 2 C827 chips
managed by the Intel MAX 10 BMC firmware. They are configured in 4 ports
10G/25G retimer mode. Host could query their link states and firmware
version information via retimer interfaces (Shared registers) on Intel
MAX 10 BMC. The driver creates sysfs interfaces for users to query these
information.

Signed-off-by: Xu Yilun 
---
 .../ABI/testing/sysfs-driver-intel-m10-bmc-retimer |  32 +
 drivers/misc/Kconfig   |  10 ++
 drivers/misc/Makefile  |   1 +
 drivers/misc/intel-m10-bmc-retimer.c   | 158 +
 4 files changed, 201 insertions(+)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-retimer
 create mode 100644 drivers/misc/intel-m10-bmc-retimer.c

diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-retimer 
b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-retimer
new file mode 100644
index 000..528712a
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-retimer
@@ -0,0 +1,32 @@
+What:  /sys/bus/platform/devices/n3000bmc-retimer.*.auto/tag
+Date:  Jan 2021
+KernelVersion: 5.12
+Contact:   Xu Yilun 
+Description:   Read only. Returns the tag of the retimer chip. Now there are 2
+   retimer chips on Intel PAC N3000, they are tagged as
+   'retimer_A' and 'retimer_B'.
+   Format: "retimer_%c".
+
+What:  /sys/bus/platform/devices/n3000bmc-retimer.*.auto/sbus_version
+Date:  Jan 2021
+KernelVersion: 5.12
+Contact:   Xu Yilun 
+Description:   Read only. Returns the Transceiver bus firmware version of
+   the retimer chip.
+   Format: "0x%04x".
+
+What:  /sys/bus/platform/devices/n3000bmc-retimer.*.auto/serdes_version
+Date:  Jan 2021
+KernelVersion: 5.12
+Contact:   Xu Yilun 
+Description:   Read only. Returns the SERDES firmware version of the retimer
+   chip.
+   Format: "0x%04x".
+
+What:  /sys/bus/platform/devices/n3000bmc-retimer.*.auto/link_statusX
+Date:  Jan 2021
+KernelVersion: 5.12
+Contact:   Xu Yilun 
+Description:   Read only. Returns the status of each line side link. "1" for
+   link up, "0" for link down.
+   Format: "%u".
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index fafa8b0..7cb9433 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -466,6 +466,16 @@ config HISI_HIKEY_USB
  switching between the dual-role USB-C port and the USB-A host ports
  using only one USB controller.
 
+config INTEL_M10_BMC_RETIMER
+   tristate "Intel(R) MAX 10 BMC ethernet retimer interface support"
+   depends on MFD_INTEL_M10_BMC
+   help
+ This driver supports the ethernet retimer (C827) on Intel(R) MAX 10
+ BMC, which is used by Intel PAC N3000 FPGA based Smart NIC.
+
+ To compile this driver as a module, choose M here: the module will
+ be called intel-m10-bmc-retimer.
+
 source "drivers/misc/c2port/Kconfig"
 source "drivers/misc/eeprom/Kconfig"
 source "drivers/misc/cb710/Kconfig"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index d23231e..67883cf 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -57,3 +57,4 @@ obj-$(CONFIG_HABANA_AI)   += habanalabs/
 obj-$(CONFIG_UACCE)+= uacce/
 obj-$(CONFIG_XILINX_SDFEC) += xilinx_sdfec.o
 obj-$(CONFIG_HISI_HIKEY_USB)   += hisi_hikey_usb.o
+obj-$(CONFIG_INTEL_M10_BMC_RETIMER)+= intel-m10-bmc-retimer.o
diff --git a/drivers/misc/intel-m10-bmc-retimer.c 
b/drivers/misc/intel-m10-bmc-retimer.c
new file mode 100644
index 000..d845342b
--- /dev/null
+++ b/drivers/misc/intel-m10-bmc-retimer.c
@@ -0,0 +1,158 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel Max10 BMC Retimer Interface Driver
+ *
+ * Copyright (C) 2021 Intel Corporation, Inc.
+ *
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define N3000BMC_RETIMER_DEV_NAME "n3000bmc-retimer"
+
+struct m10bmc_retimer {
+   struct device *dev;
+   struct intel_m10bmc *m10bmc;
+   u32 ver_reg;
+   u32 id;
+};
+
+static ssize_t tag_show(struct device *dev, struct device_attribute *attr,
+   char *buf)
+{
+   struct m10bmc_retimer *retimer = dev_get_drvdata(dev);
+
+   return sysfs_emit(buf, "retimer_%c\n", 'A' + retimer->id);
+}
+static DEVICE_ATTR_RO(tag);
+
+static ssize_t sbus_version_show(struct device *dev,
+struct device_attribute *attr, char *buf)
+{
+   struct m10bmc_retimer *retimer = dev_get_drvdata(dev);
+   unsigned int val;
+   int ret;
+
+   ret = 

[PATCH 1/2] mfd: intel-m10-bmc: specify the retimer sub devices

2021-01-05 Thread Xu Yilun
The patch specifies the 2 retimer sub devices and their resources in the
parent driver's mfd_cell. It also adds the register definition of the
retimer sub devices.

There are 2 ethernet retimer chips (C827) connected to the Intel MAX 10
BMC. They are managed by the BMC firmware, and host could query them via
retimer interfaces (shared registers) on the BMC. The 2 retimers have
identical register interfaces in different register addresses or fields,
so it is better we define 2 retimer devices and handle them with the same
driver.

Signed-off-by: Xu Yilun 
---
 drivers/mfd/intel-m10-bmc.c   | 19 ++-
 include/linux/mfd/intel-m10-bmc.h |  7 +++
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
index b84579b..e0a99a0 100644
--- a/drivers/mfd/intel-m10-bmc.c
+++ b/drivers/mfd/intel-m10-bmc.c
@@ -17,9 +17,26 @@ enum m10bmc_type {
M10_N3000,
 };
 
+static struct resource retimer0_resources[] = {
+   {M10BMC_PKVL_A_VER, M10BMC_PKVL_A_VER, "version", IORESOURCE_REG, },
+};
+
+static struct resource retimer1_resources[] = {
+   {M10BMC_PKVL_B_VER, M10BMC_PKVL_B_VER, "version", IORESOURCE_REG, },
+};
+
 static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
{ .name = "n3000bmc-hwmon" },
-   { .name = "n3000bmc-retimer" },
+   {
+   .name = "n3000bmc-retimer",
+   .num_resources = ARRAY_SIZE(retimer0_resources),
+   .resources = retimer0_resources,
+   },
+   {
+   .name = "n3000bmc-retimer",
+   .num_resources = ARRAY_SIZE(retimer1_resources),
+   .resources = retimer1_resources,
+   },
{ .name = "n3000bmc-secure" },
 };
 
diff --git a/include/linux/mfd/intel-m10-bmc.h 
b/include/linux/mfd/intel-m10-bmc.h
index c8ef2f1..d6216f9 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -21,6 +21,13 @@
 #define M10BMC_VER_PCB_INFO_MSKGENMASK(31, 24)
 #define M10BMC_VER_LEGACY_INVALID  0x
 
+/* Retimer related registers, in system register region */
+#define M10BMC_PKVL_LSTATUS0x164
+#define M10BMC_PKVL_A_VER  0x254
+#define M10BMC_PKVL_B_VER  0x258
+#define M10BMC_PKVL_SERDES_VER GENMASK(15, 0)
+#define M10BMC_PKVL_SBUS_VER   GENMASK(31, 16)
+
 /**
  * struct intel_m10bmc - Intel MAX 10 BMC parent driver data structure
  * @dev: this device
-- 
2.7.4



[PATCH 0/2] Add retimer interfaces support for Intel MAX 10 BMC

2021-01-05 Thread Xu Yilun
This patchset supports the ethernet retimers (C827) for the Intel PAC
(Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.

The 2 retimer chips connect to the Intel MAX 10 BMC on the card. They are
managed by the BMC firmware. Host could query their link states and
firmware version information via retimer interfaces (Shared registers) on
the BMC. The driver creates sysfs interfaces for users to query these
information.


Xu Yilun (2):
  mfd: intel-m10-bmc: specify the retimer sub devices
  misc: add support for retimers interfaces on Intel MAX 10 BMC

 .../ABI/testing/sysfs-driver-intel-m10-bmc-retimer |  32 +
 drivers/mfd/intel-m10-bmc.c|  19 ++-
 drivers/misc/Kconfig   |  10 ++
 drivers/misc/Makefile  |   1 +
 drivers/misc/intel-m10-bmc-retimer.c   | 158 +
 include/linux/mfd/intel-m10-bmc.h  |   7 +
 6 files changed, 226 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-retimer
 create mode 100644 drivers/misc/intel-m10-bmc-retimer.c

-- 
2.7.4



Re: [PATCH v2 02/11] perf c2c: Add dimensions for load hit

2021-01-05 Thread Namhyung Kim
On Sun, Dec 13, 2020 at 10:39 PM Leo Yan  wrote:
>
> Add dimensions for load hit and its percentage calculation, which is to
> be displayed in the single cache line output.
>
> Signed-off-by: Leo Yan 
> ---
>  tools/perf/builtin-c2c.c | 71 
>  1 file changed, 71 insertions(+)
>
> diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
> index 3d5a2dc8b4fd..00014e3d81fa 100644
> --- a/tools/perf/builtin-c2c.c
> +++ b/tools/perf/builtin-c2c.c
> @@ -1052,6 +1052,58 @@ percent_lcl_hitm_cmp(struct perf_hpp_fmt *fmt 
> __maybe_unused,
> return per_left - per_right;
>  }
>
> +static double percent_ld_hit(struct c2c_hist_entry *c2c_he)
> +{
> +   struct c2c_hists *hists;
> +   int tot, st;
> +
> +   hists = container_of(c2c_he->he.hists, struct c2c_hists, hists);
> +
> +   st  = TOT_LD_HIT(_he->stats);
> +   tot = TOT_LD_HIT(>stats);
> +
> +   return percent(st, tot);

It's not clear to me what's different than percent_tot_ld_hit().

Thanks,
Namhyung



> +}
> +
> +static int
> +percent_ld_hit_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
> +struct hist_entry *he)
> +{
> +   struct c2c_hist_entry *c2c_he;
> +   int width = c2c_width(fmt, hpp, he->hists);
> +   char buf[10];
> +   double per;
> +
> +   c2c_he = container_of(he, struct c2c_hist_entry, he);
> +   per = percent_ld_hit(c2c_he);
> +   return scnprintf(hpp->buf, hpp->size, "%*s", width, PERC_STR(buf, 
> per));
> +}
> +
> +static int
> +percent_ld_hit_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
> +struct hist_entry *he)
> +{
> +   return percent_color(fmt, hpp, he, percent_ld_hit);
> +}
> +
> +static int64_t
> +percent_ld_hit_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
> +  struct hist_entry *left, struct hist_entry *right)
> +{
> +   struct c2c_hist_entry *c2c_left;
> +   struct c2c_hist_entry *c2c_right;
> +   double per_left;
> +   double per_right;
> +
> +   c2c_left  = container_of(left, struct c2c_hist_entry, he);
> +   c2c_right = container_of(right, struct c2c_hist_entry, he);
> +
> +   per_left  = percent_ld_hit(c2c_left);
> +   per_right = percent_ld_hit(c2c_right);
> +
> +   return per_left - per_right;
> +}
> +
>  static int
>  percent_stores_l1hit_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
>struct hist_entry *he)
> @@ -1417,6 +1469,14 @@ static struct c2c_dimension dim_cl_rmt_hitm = {
> .width  = 7,
>  };
>
> +static struct c2c_dimension dim_cl_tot_ld_hit = {
> +   .header = HEADER_SPAN("--- Load ---", "Hit", 1),
> +   .name   = "cl_tot_ld_hit",
> +   .cmp= tot_ld_hit_cmp,
> +   .entry  = tot_ld_hit_entry,
> +   .width  = 7,
> +};
> +
>  static struct c2c_dimension dim_cl_lcl_hitm = {
> .header = HEADER_SPAN_LOW("Lcl"),
> .name   = "cl_lcl_hitm",
> @@ -1570,6 +1630,15 @@ static struct c2c_dimension dim_percent_tot_ld_hit = {
> .width  = 8,
>  };
>
> +static struct c2c_dimension dim_percent_ld_hit = {
> +   .header = HEADER_SPAN("--  Load Refs --", "Hit", 1),
> +   .name   = "percent_ld_hit",
> +   .cmp= percent_ld_hit_cmp,
> +   .entry  = percent_ld_hit_entry,
> +   .color  = percent_ld_hit_color,
> +   .width  = 7,
> +};
> +
>  static struct c2c_dimension dim_percent_stores_l1hit = {
> .header = HEADER_SPAN("-- Store Refs --", "L1 Hit", 1),
> .name   = "percent_stores_l1hit",
> @@ -1715,6 +1784,7 @@ static struct c2c_dimension *dimensions[] = {
> _rmt_hitm,
> _cl_lcl_hitm,
> _cl_rmt_hitm,
> +   _cl_tot_ld_hit,
> _tot_stores,
> _stores_l1hit,
> _stores_l1miss,
> @@ -1731,6 +1801,7 @@ static struct c2c_dimension *dimensions[] = {
> _percent_hitm,
> _percent_rmt_hitm,
> _percent_lcl_hitm,
> +   _percent_ld_hit,
> _percent_tot_ld_hit,
> _percent_stores_l1hit,
> _percent_stores_l1miss,
> --
> 2.17.1
>


Re: [PATCH v2 01/11] perf c2c: Add dimensions for total load hit

2021-01-05 Thread Namhyung Kim
Hi,

On Sun, Dec 13, 2020 at 10:39 PM Leo Yan  wrote:
>
> Arm SPE trace data doesn't support HITM, but we still want to explore
> "perf c2c" tool to analyze cache false sharing.  If without HITM tag,
> the tool cannot give out accurate result for cache false sharing, a
> candidate solution is to sort the total load operations and connect with
> the threads info, e.g. if multiple threads hit the same cache line for
> many times, this can give out the hint that it's likely to cause cache
> false sharing issue.
>
> Unlike having HITM tag, the proposed solution is not accurate and might
> introduce false positive reporting, but it's a pragmatic approach for
> detecting false sharing if memory event doesn't support HITM.
>
> To sort with the cache line hit, this patch adds dimensions for total
> load hit and the associated percentage calculation.
>
> Signed-off-by: Leo Yan 
> ---
>  tools/perf/builtin-c2c.c | 112 +++
>  1 file changed, 112 insertions(+)
>
> diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
> index c5babeaa3b38..3d5a2dc8b4fd 100644
> --- a/tools/perf/builtin-c2c.c
> +++ b/tools/perf/builtin-c2c.c
> @@ -615,6 +615,47 @@ tot_hitm_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
> return tot_hitm_left - tot_hitm_right;
>  }
>
> +#define TOT_LD_HIT(stats)  \
> +   ((stats)->ld_fbhit +\
> +(stats)->ld_l1hit +\
> +(stats)->ld_l2hit +\
> +(stats)->ld_llchit +   \
> +(stats)->lcl_hitm +\
> +(stats)->rmt_hitm +\
> +(stats)->rmt_hit)

It doesn't need to be a macro, why not use a static inline function?

Thanks,
Namhyung


> +
> +static int tot_ld_hit_entry(struct perf_hpp_fmt *fmt,
> +   struct perf_hpp *hpp,
> +   struct hist_entry *he)
> +{
> +   struct c2c_hist_entry *c2c_he;
> +   int width = c2c_width(fmt, hpp, he->hists);
> +   unsigned int tot_hit;
> +
> +   c2c_he = container_of(he, struct c2c_hist_entry, he);
> +   tot_hit = TOT_LD_HIT(_he->stats);
> +
> +   return scnprintf(hpp->buf, hpp->size, "%*u", width, tot_hit);
> +}
> +
> +static int64_t tot_ld_hit_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
> + struct hist_entry *left,
> + struct hist_entry *right)
> +{
> +   struct c2c_hist_entry *c2c_left;
> +   struct c2c_hist_entry *c2c_right;
> +   uint64_t tot_hit_left;
> +   uint64_t tot_hit_right;
> +
> +   c2c_left  = container_of(left, struct c2c_hist_entry, he);
> +   c2c_right = container_of(right, struct c2c_hist_entry, he);
> +
> +   tot_hit_left  = TOT_LD_HIT(_left->stats);
> +   tot_hit_right = TOT_LD_HIT(_right->stats);
> +
> +   return tot_hit_left - tot_hit_right;
> +}
> +
>  #define STAT_FN_ENTRY(__f) \
>  static int \
>  __f ## _entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,  \
> @@ -860,6 +901,58 @@ percent_hitm_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
> return per_left - per_right;
>  }
>
> +static double percent_tot_ld_hit(struct c2c_hist_entry *c2c_he)
> +{
> +   struct c2c_hists *hists;
> +   int tot = 0, st = 0;
> +
> +   hists = container_of(c2c_he->he.hists, struct c2c_hists, hists);
> +
> +   st  = TOT_LD_HIT(_he->stats);
> +   tot = TOT_LD_HIT(>stats);
> +
> +   return tot ? (double) st * 100 / tot : 0;
> +}
> +
> +static int
> +percent_tot_ld_hit_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
> +struct hist_entry *he)
> +{
> +   struct c2c_hist_entry *c2c_he;
> +   int width = c2c_width(fmt, hpp, he->hists);
> +   char buf[10];
> +   double per;
> +
> +   c2c_he = container_of(he, struct c2c_hist_entry, he);
> +   per = percent_tot_ld_hit(c2c_he);
> +   return scnprintf(hpp->buf, hpp->size, "%*s", width, PERC_STR(buf, 
> per));
> +}
> +
> +static int
> +percent_tot_ld_hit_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
> +struct hist_entry *he)
> +{
> +   return percent_color(fmt, hpp, he, percent_tot_ld_hit);
> +}
> +
> +static int64_t
> +percent_tot_ld_hit_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
> +  struct hist_entry *left, struct hist_entry *right)
> +{
> +   struct c2c_hist_entry *c2c_left;
> +   struct c2c_hist_entry *c2c_right;
> +   double per_left;
> +   double per_right;
> +
> +   c2c_left  = container_of(left, struct c2c_hist_entry, he);
> +   c2c_right = container_of(right, struct c2c_hist_entry, he);
> +
> +   per_left  = percent_tot_ld_hit(c2c_left);
> +   per_right = percent_tot_ld_hit(c2c_right);
> +
> +   return per_left - per_right;
> +}
> +
>  static struct c2c_stats *he_stats(struct hist_entry *he)
>  {
> struct 

Re: [PATCH net] net: lapb: Decrease the refcount of "struct lapb_cb" in lapb_device_event

2021-01-05 Thread Martin Schiller

On 2020-12-31 18:43, Xie He wrote:

In lapb_device_event, lapb_devtostruct is called to get a reference to
an object of "struct lapb_cb". lapb_devtostruct increases the refcount
of the object and returns a pointer to it. However, we didn't decrease
the refcount after we finished using the pointer. This patch fixes this
problem.

Fixes: a4989fa91110 ("net/lapb: support netdev events")
Cc: Martin Schiller 
Signed-off-by: Xie He 
---
 net/lapb/lapb_iface.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/net/lapb/lapb_iface.c b/net/lapb/lapb_iface.c
index 213ea7abc9ab..40961889e9c0 100644
--- a/net/lapb/lapb_iface.c
+++ b/net/lapb/lapb_iface.c
@@ -489,6 +489,7 @@ static int lapb_device_event(struct notifier_block
*this, unsigned long event,
break;
}

+   lapb_put(lapb);
return NOTIFY_DONE;
 }


Well, I guess I missed that one. Thank you!

Acked-by: Martin Schiller 


Re: [PATCH AUTOSEL 5.4 075/130] net/lapb: fix t1 timer handling for LAPB_STATE_0

2021-01-05 Thread Martin Schiller

On 2020-12-24 10:49, Xie He wrote:

On Wed, Dec 23, 2020 at 9:01 AM Xie He  wrote:


I don't think this patch is suitable for stable branches. This patch 
is
part of a patch series that changes the lapb module from "establishing 
the
L2 connection only when needed by L3", to "establishing the L2 
connection
automatically whenever we are able to". This is a behavioral change. 
It

should be seen as a new feature. It is not a bug fix.


Applying this patch without other patches in the same series will also
introduce problems, because this patch relies on part of the changes
in the subsequent patch in the same series to be correct.

Hi Martin,

It's better that we avoid using words like "fix" in non-bug-fix
patches, and make every patch work on its own without subsequent
patches. Otherwise we'll make people confused.


Yes, you are right.


Re: [PATCH V6 08/13] interconnect: mediatek: Add interconnect provider driver

2021-01-05 Thread Henry Chen
On Mon, 2021-01-04 at 20:36 +0200, Georgi Djakov wrote:
> On 12/24/20 08:08, Henry Chen wrote:
> > Introduce Mediatek MT6873/MT8183/MT8192 specific provider driver
> > using the interconnect framework.
> > 
> >   ICC provider ICC Nodes
> >  
> >   -   |CPU |   |--- |VPU |
> >  -   | |-  | 
> > |DRAM |--|DRAM |   | 
> > | |--|scheduler|- |GPU |   |--- |DISP|
> > | |--|(EMI)|   | 
> > | |--| |   -   | 
> >  -   | |- |MMSYS|--|--- |VDEC|
> >   --   | 
> > /|\| 
> >  |change DRAM freq |--- |VENC|
> >   --   | 
> >  |  DVFSR   |  |
> >  |  |  | 
> >   --   |--- |IMG |
> >| 
> >| 
> >|--- |CAM |
> >  
> > 
> > Signed-off-by: Henry Chen 
> > ---
> >   drivers/interconnect/Kconfig|   1 +
> >   drivers/interconnect/Makefile   |   1 +
> >   drivers/interconnect/mediatek/Kconfig   |  13 ++
> >   drivers/interconnect/mediatek/Makefile  |   3 +
> >   drivers/interconnect/mediatek/mtk-emi.c | 330 
> > 
> >   5 files changed, 348 insertions(+)
> >   create mode 100644 drivers/interconnect/mediatek/Kconfig
> >   create mode 100644 drivers/interconnect/mediatek/Makefile
> >   create mode 100644 drivers/interconnect/mediatek/mtk-emi.c
> > 
> > diff --git a/drivers/interconnect/Kconfig b/drivers/interconnect/Kconfig
> > index 5b7204e..e939f5a 100644
> > --- a/drivers/interconnect/Kconfig
> > +++ b/drivers/interconnect/Kconfig
> > @@ -13,5 +13,6 @@ if INTERCONNECT
> >   
> >   source "drivers/interconnect/imx/Kconfig"
> >   source "drivers/interconnect/qcom/Kconfig"
> > +source "drivers/interconnect/mediatek/Kconfig"
> 
> Sort alphabetically please.
Ok
> 
> >   
> >   endif
> > diff --git a/drivers/interconnect/Makefile b/drivers/interconnect/Makefile
> > index d203520..0643a24 100644
> > --- a/drivers/interconnect/Makefile
> > +++ b/drivers/interconnect/Makefile
> > @@ -6,3 +6,4 @@ icc-core-objs   := core.o bulk.o
> >   obj-$(CONFIG_INTERCONNECT)+= icc-core.o
> >   obj-$(CONFIG_INTERCONNECT_IMX)+= imx/
> >   obj-$(CONFIG_INTERCONNECT_QCOM)   += qcom/
> > +obj-$(CONFIG_INTERCONNECT_MTK) += mediatek/
> 
> Ditto.
Ok
> 
> > diff --git a/drivers/interconnect/mediatek/Kconfig 
> > b/drivers/interconnect/mediatek/Kconfig
> > new file mode 100644
> > index 000..972d3bb
> > --- /dev/null
> > +++ b/drivers/interconnect/mediatek/Kconfig
> > @@ -0,0 +1,13 @@
> > +config INTERCONNECT_MTK
> > +   bool "Mediatek Network-on-Chip interconnect drivers"
> > +   depends on ARCH_MEDIATEK
> > +   help
> > + Support for Mediatek's Network-on-Chip interconnect hardware.
> > +
> > +config INTERCONNECT_MTK_EMI
> > +   tristate "Mediatek EMI interconnect driver"
> > +   depends on INTERCONNECT_MTK
> > +   depends on (MTK_DVFSRC && OF)
> 
> Would it be possible to enable COMPILE_TEST?
Do you means change to "depends on (MTK_DVFSRC && OF) || COMPILE_TEST" ?
> 
> > +   help
> > + This is a driver for the Mediatek Network-on-Chip on DVFSRC-based
> > + platforms.
> > diff --git a/drivers/interconnect/mediatek/Makefile 
> > b/drivers/interconnect/mediatek/Makefile
> > new file mode 100644
> > index 000..353842b
> > --- /dev/null
> > +++ b/drivers/interconnect/mediatek/Makefile
> > @@ -0,0 +1,3 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +
> > +obj-$(CONFIG_INTERCONNECT_MTK_EMI) += mtk-emi.o
> > \ No newline at end of file
> > diff --git a/drivers/interconnect/mediatek/mtk-emi.c 
> > b/drivers/interconnect/mediatek/mtk-emi.c
> > new file mode 100644
> > index 000..9670077
> > --- /dev/null
> > +++ b/drivers/interconnect/mediatek/mtk-emi.c
> > @@ -0,0 +1,330 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> 
> Just a reminder that the year should be updated when you re-submit.
OK, thanks for reminding me.
> 
> > + *
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> 
> Nit: Alphanumeric order please.
OK.
> 
> [..]
> > +static int emi_icc_remove(struct platform_device *pdev);
> > +static int emi_icc_probe(struct platform_device *pdev)
> > +{
> > +   const struct of_device_id *match;
> > +   const struct mtk_icc_desc *desc;
> > +   struct device *dev = >dev;
> > +   struct icc_node 

Re: [PATCH v2 10/18] ARM: dts: qcom: sdx55: Add QPIC NAND support

2021-01-05 Thread Manivannan Sadhasivam
On Tue, Jan 05, 2021 at 09:21:02PM +0530, Vinod Koul wrote:
> On 05-01-21, 17:56, Manivannan Sadhasivam wrote:
> > Add qpic_nand node to support QPIC NAND controller on SDX55 platform.
> > Since there is no "aon" clock in SDX55, a dummy clock is provided.
> > 
> > Signed-off-by: Manivannan Sadhasivam 
> > ---
> >  arch/arm/boot/dts/qcom-sdx55.dtsi | 22 ++
> >  1 file changed, 22 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi 
> > b/arch/arm/boot/dts/qcom-sdx55.dtsi
> > index 1b9b990ad0a2..1a6947753972 100644
> > --- a/arch/arm/boot/dts/qcom-sdx55.dtsi
> > +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
> > @@ -41,6 +41,12 @@ pll_test_clk: pll-test-clk {
> > #clock-cells = <0>;
> > clock-frequency = <4>;
> > };
> > +
> > +   nand_clk_dummy: nand-clk-dummy {
> 
> Why dummy..? 

There is no such clock used on this platform but the driver requires it.

> > +   compatible = "fixed-clock";
> > +   #clock-cells = <0>;
> > +   clock-frequency = <32000>;
> 
> Is this sleep clock of platform..?
> 

Always ON (AON) clock.

Thanks,
Mani


Re: [PATCH] rpmsg: glink: add a header file

2021-01-05 Thread kernel test robot
Hi Alex,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.11-rc2 next-20210104]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Alex-Elder/rpmsg-glink-add-a-header-file/20210106-080024
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
e71ba9452f0b5b2e8dc8aa5445198cd9214a6a62
config: x86_64-randconfig-a015-20210106 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
5c951623bc8965fa1e89660f2f5f4a2944e4981a)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# 
https://github.com/0day-ci/linux/commit/333b19e6f90b89d18b94be972c0823959373dad8
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Alex-Elder/rpmsg-glink-add-a-header-file/20210106-080024
git checkout 333b19e6f90b89d18b94be972c0823959373dad8
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> drivers/rpmsg/qcom_glink_ssr.c:65:6: error: redefinition of 
>> 'qcom_glink_ssr_notify'
   void qcom_glink_ssr_notify(const char *ssr_name)
^
   include/linux/rpmsg/qcom_glink.h:27:20: note: previous definition is here
   static inline void qcom_glink_ssr_notify(const char *ssr_name) {}
  ^
   1 error generated.


vim +/qcom_glink_ssr_notify +65 drivers/rpmsg/qcom_glink_ssr.c

5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22  60  
5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22  61  /**
5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22  62   * 
qcom_glink_ssr_notify() - notify GLINK SSR about stopped remoteproc
5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22  63   * 
@ssr_name:  name of the remoteproc that has been stopped
5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22  64   */
5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22 @65  
void qcom_glink_ssr_notify(const char *ssr_name)
5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22  66  {
5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22  67 
blocking_notifier_call_chain(_notifiers, 0, (void *)ssr_name);
5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22  68  }
5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22  69  
EXPORT_SYMBOL_GPL(qcom_glink_ssr_notify);
5d1f2e3c8090c07 drivers/soc/qcom/glink_ssr.c Bjorn Andersson 2020-04-22  70  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip


Re: [PATCH 0/5] Introduce the for_each_set_clump macro

2021-01-05 Thread Bartosz Golaszewski
On Tue, Jan 5, 2021 at 3:38 PM Andy Shevchenko
 wrote:
>
> On Tue, Jan 05, 2021 at 03:19:13PM +0100, Bartosz Golaszewski wrote:
> > On Sun, Dec 27, 2020 at 10:27 PM Linus Walleij  
> > wrote:
> > >
> > > On Sat, Dec 26, 2020 at 7:41 AM Syed Nayyar Waris  
> > > wrote:
> > >
> > > > Since this patchset primarily affects GPIO drivers, would you like
> > > > to pick it up through your GPIO tree?
> > >
> > > Actually Bartosz is handling the GPIO patches for v5.12.
> > > I tried to merge the patch series before but failed for
> > > various reasons.
>
> > My info on this is a bit outdated - didn't Linus Torvalds reject these
> > patches from Andrew Morton's PR? Or am I confusing this series with
> > something else?
>
> Linus T. told that it can be done inside GPIO realm. This version tries
> (badly in my opinion) to achieve that.
>

I'm seeing William and Arnd have some unaddressed issues with patch 1
(with using __builtin_unreachable()).

Admittedly I didn't follow the previous iterations too much so I may
miss some history behind it. Why do the first two patches go into lib
if this is supposed to be gpiolib-only?

Bartosz


Re: [PATCH v2 02/18] ARM: dts: qcom: sdx55: Add reserved memory nodes

2021-01-05 Thread Manivannan Sadhasivam
On Tue, Jan 05, 2021 at 09:42:11PM -0600, Bjorn Andersson wrote:
> On Tue 05 Jan 21:07 CST 2021, Manivannan Sadhasivam wrote:
> 
> > On Tue, Jan 05, 2021 at 12:05:49PM -0600, Bjorn Andersson wrote:
> > > On Tue 05 Jan 06:26 CST 2021, Manivannan Sadhasivam wrote:
> > > 
> > > > From: Vinod Koul 
> > > > 
> > > > This adds reserved memory nodes to the SDX55 dtsi as defined by v8 of
> > > > the memory map
> > > > 
> > > > Signed-off-by: Vinod Koul 
> > > > Signed-off-by: Manivannan Sadhasivam 
> > > > ---
> > > >  arch/arm/boot/dts/qcom-sdx55.dtsi | 67 +++
> > > >  1 file changed, 67 insertions(+)
> > > > 
> > > > diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi 
> > > > b/arch/arm/boot/dts/qcom-sdx55.dtsi
> > > > index 08b4a40338fa..eeb6bf392f93 100644
> > > > --- a/arch/arm/boot/dts/qcom-sdx55.dtsi
> > > > +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
> > > > @@ -60,6 +60,73 @@ psci {
> > > > method = "smc";
> > > > };
> > > >  

[...]

> > > > +   mpss_adsp_mem: memory@9080 {
> > > > +   no-map;
> > > > +   reg = <0x9080 0xf80>;
> > > 
> > > Didn't you say this moved to 0x9c00?
> > > 
> > 
> > That's for an old bootloader which is used in the MTP. But I guess we should
> > always use the latest mem map for the latest bootloader.
> > 
> 
> That reminds me, a number of times we're learned that these are at least
> related to which firmware the individual vendors are shipping on their
> devices. So the peripheral (remoteproc) regions is better to push out to
> the board file.
> 
> I.e. that would (probably) be _debug_mem, _fw_mem and
> _adsp_mem.
> 

Okay.

Thanks,
Mani

> Regards,
> Bjorn


Re: [RFC PATCH v2 2/4] KVM: arm64: GICv4.1: Try to save hw pending state in save_pending_tables

2021-01-05 Thread Shenming Lu
On 2021/1/5 21:47, Marc Zyngier wrote:
> On 2021-01-05 13:02, Shenming Lu wrote:
>> On 2021/1/5 17:13, Marc Zyngier wrote:
>>> On 2021-01-04 08:16, Shenming Lu wrote:
 After pausing all vCPUs and devices capable of interrupting, in order
 to save the information of all interrupts, besides flushing the pending
 states in kvm’s vgic, we also try to flush the states of VLPIs in the
 virtual pending tables into guest RAM, but we need to have GICv4.1 and
 safely unmap the vPEs first.

 Signed-off-by: Shenming Lu 
 ---
  arch/arm64/kvm/vgic/vgic-v3.c | 58 +++
  1 file changed, 52 insertions(+), 6 deletions(-)

 diff --git a/arch/arm64/kvm/vgic/vgic-v3.c b/arch/arm64/kvm/vgic/vgic-v3.c
 index 9cdf39a94a63..a58c94127cb0 100644
 --- a/arch/arm64/kvm/vgic/vgic-v3.c
 +++ b/arch/arm64/kvm/vgic/vgic-v3.c
 @@ -1,6 +1,8 @@
  // SPDX-License-Identifier: GPL-2.0-only

  #include 
 +#include 
 +#include 
  #include 
  #include 
  #include 
 @@ -356,6 +358,38 @@ int vgic_v3_lpi_sync_pending_status(struct kvm
 *kvm, struct vgic_irq *irq)
  return 0;
  }

 +/*
 + * The deactivation of the doorbell interrupt will trigger the
 + * unmapping of the associated vPE.
 + */
 +static void unmap_all_vpes(struct vgic_dist *dist)
 +{
 +    struct irq_desc *desc;
 +    int i;
 +
 +    if (!kvm_vgic_global_state.has_gicv4_1)
 +    return;
 +
 +    for (i = 0; i < dist->its_vm.nr_vpes; i++) {
 +    desc = irq_to_desc(dist->its_vm.vpes[i]->irq);
 +    irq_domain_deactivate_irq(irq_desc_get_irq_data(desc));
 +    }
 +}
 +
 +static void map_all_vpes(struct vgic_dist *dist)
 +{
 +    struct irq_desc *desc;
 +    int i;
 +
 +    if (!kvm_vgic_global_state.has_gicv4_1)
 +    return;
 +
 +    for (i = 0; i < dist->its_vm.nr_vpes; i++) {
 +    desc = irq_to_desc(dist->its_vm.vpes[i]->irq);
 +    irq_domain_activate_irq(irq_desc_get_irq_data(desc), false);
 +    }
 +}
 +
  /**
   * vgic_v3_save_pending_tables - Save the pending tables into guest RAM
   * kvm lock and all vcpu lock must be held
 @@ -365,14 +399,18 @@ int vgic_v3_save_pending_tables(struct kvm *kvm)
  struct vgic_dist *dist = >arch.vgic;
  struct vgic_irq *irq;
  gpa_t last_ptr = ~(gpa_t)0;
 -    int ret;
 +    int ret = 0;
  u8 val;

 +    /* As a preparation for getting any VLPI states. */
 +    unmap_all_vpes(dist);
>>>
>>> What if the VPEs are not mapped yet? Is it possible to snapshot a VM
>>> that has not run at all?
>>
>> What I see in QEMU is that the saving of the pending tables would only be
>> called when stopping the VM and it needs the current VM state to be RUNNING.
> 
> Sure, but that's what QEMU does, and a different userspace could well do
> something different. It looks to me that I should be able to start (or
> even restore) a guest, and snapshot it immediately. Here, I'm pretty
> sure this wouldn't do the right thing (I have the suspicion that the
> doorbells are not allocated, and that we'll end-up with an Oops at unmap
> time, though I haven't investigated it to be sure).
>

If we can't rely on the userspace, could we check whether it is allowed
(at the right time) before the unmapping? Maybe have a look at vmapp_count?
Although I think snapshot a VM that has not been started is almost impossible...

>>>
 +
  list_for_each_entry(irq, >lpi_list_head, lpi_list) {
  int byte_offset, bit_nr;
  struct kvm_vcpu *vcpu;
  gpa_t pendbase, ptr;
  bool stored;
 +    bool is_pending = irq->pending_latch;

  vcpu = irq->target_vcpu;
  if (!vcpu)
 @@ -387,24 +425,32 @@ int vgic_v3_save_pending_tables(struct kvm *kvm)
  if (ptr != last_ptr) {
  ret = kvm_read_guest_lock(kvm, ptr, , 1);
  if (ret)
 -    return ret;
 +    goto out;
  last_ptr = ptr;
  }

  stored = val & (1U << bit_nr);
 -    if (stored == irq->pending_latch)
 +
 +    if (irq->hw)
 +    vgic_v4_get_vlpi_state(irq, _pending);
>>>
>>> You don't check the return value here, so I wonder why the checks
>>> in vgic_v4_get_vlpi_state().
>>
>> Since I have already checked the condition and reported in save_its_tables
>> (patch 4), I just check in get_vlpi_state and don't report again here.
> 
> Sure, but why the checks and the return value then? I'd rather you check all
> the relevant conditions in one place.

Yeah, it seems that the return value is unnecessary, I can change 
vgic_v4_get_vlpi_state()
to be void. And does the check in one place mean that we check all the relevant
conditions at the beginning 

Re: [PATCH] dt-bindings: Add missing array size constraints

2021-01-05 Thread Bartosz Golaszewski
On Tue, Jan 5, 2021 at 12:03 AM Rob Herring  wrote:
>
> DT properties which can have multiple entries need to specify what the
> entries are and define how many entries there can be. In the case of
> only a single entry, just 'maxItems: 1' is sufficient.
>
> Add the missing entry constraints. These were found with a modified
> meta-schema. Unfortunately, there are a few cases where the size
> constraints are not defined such as common bindings, so the meta-schema
> can't be part of the normal checks.
>

[snip!]

>  .../bindings/gpio/gpio-pca95xx.yaml   |  1 +

[snip!]

> diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml 
> b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml
> index f5ee23c2df60..57cdcfd4ff3c 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml
> +++ b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml
> @@ -81,6 +81,7 @@ properties:
>  const: 2
>
>reset-gpios:
> +maxItems: 1
>  description:
>GPIO specification for the RESET input. This is an active low signal to
>the PCA953x.  Not valid for Maxim MAX732x devices.

Acked-by: Bartosz Golaszewski 


[PATCH v2] clk-si5341: Support NVM programming through sysfs

2021-01-05 Thread Mike Looijmans
Export an attribute program_nvm_bank that when read reports the current
bank value. To program the chip's current state into NVM, write the
magic value 0xC7 into this attribute.

This allows the clock chip to be programmed "in system" to reduce boot
time by 300ms and allows the clock to be up and running before the
kernel boots (e.g. for bootloader usage). Some vendors initialize PLLs
only in their bootloader and thus need the clock running at boot.

Signed-off-by: Mike Looijmans 
---
v2: Add description in Documentation/ABI/
Use regmap_read_poll_timeout()
Abort on sysfs_create_group error

 .../ABI/testing/sysfs-devices-clk-si5341  | 24 +++
 drivers/clk/clk-si5341.c  | 68 +++
 2 files changed, 92 insertions(+)
 create mode 100644 Documentation/ABI/testing/sysfs-devices-clk-si5341

diff --git a/Documentation/ABI/testing/sysfs-devices-clk-si5341 
b/Documentation/ABI/testing/sysfs-devices-clk-si5341
new file mode 100644
index ..7243b82a3729
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-devices-clk-si5341
@@ -0,0 +1,24 @@
+What:  /sys/bus/i2c/devices/.../clk-si534*/program_nvm_bank
+Date:  Jan 2021
+KernelVersion: 5.12
+Contact:   Mike Looijmans 
+Description:   Allows programming the NVM memory of the clock chip, so it boots
+   up in the current configuration. This saves boot time (300ms
+   clock initialization) and allows the clock to be available
+   before the kernel boots (e.g. u-boot ethernet clock).
+
+   Write the magic value 0xc7 to this attribute to program the
+   chip's current settings into its NVM storage. This magic value
+   is taken from the datasheet, it's the same value that must be
+   written to the hardware to program it. Programming can only be
+   done twice in the lifetime of the chip.
+
+   Read the value to check the state of the chip. This returns the
+   raw value as read from the hardware. Possible values:
+   0x03: Not programmed
+   0x0f: Programmed once
+   0x3f: Programmed twice, can no longer be programmed
+
+Users: User space applications for embedded boards equipped with one
+   or more Si534x programmable clock devices. Would typically be
+   used at the end of production stages.
diff --git a/drivers/clk/clk-si5341.c b/drivers/clk/clk-si5341.c
index e0446e66fa64..836af718eed0 100644
--- a/drivers/clk/clk-si5341.c
+++ b/drivers/clk/clk-si5341.c
@@ -92,6 +92,9 @@ struct clk_si5341_output_config {
 #define SI5341_PN_BASE 0x0002
 #define SI5341_DEVICE_REV  0x0005
 #define SI5341_STATUS  0x000C
+#define SI5341_ACTIVE_NVM_BANK 0x00E2
+#define SI5341_NVM_WRITE   0x00E3
+#define SI5341_DEVICE_READY0x00FE
 #define SI5341_SOFT_RST0x001C
 #define SI5341_IN_SEL  0x0021
 #define SI5341_XAXB_CFG0x090E
@@ -144,6 +147,9 @@ struct clk_si5341_output_config {
 #define SI5341_OUT_CFG_OE  BIT(1)
 #define SI5341_OUT_CFG_RDIV_FORCE2 BIT(2)
 
+/* Programming NVM, magic value to write to program the NVM */
+#define SI5341_SI5341_NVM_WRITE_COOKIE 0xC7
+
 /* Static configuration (to be moved to firmware) */
 struct si5341_reg_default {
u16 address;
@@ -1199,6 +1205,64 @@ static const struct regmap_config si5341_regmap_config = 
{
.volatile_table = _regmap_volatile,
 };
 
+static ssize_t program_nvm_bank_show(struct device *dev,
+   struct device_attribute *attr, char *buf)
+{
+   struct i2c_client *client = to_i2c_client(dev);
+   struct clk_si5341 *data = i2c_get_clientdata(client);
+   unsigned int regval;
+   int ret;
+
+   ret = regmap_read(data->regmap, SI5341_ACTIVE_NVM_BANK, );
+   if (ret)
+   return ret;
+
+   return sprintf(buf, "%#x\n", regval);
+}
+
+static ssize_t program_nvm_bank_store(struct device *dev,
+   struct device_attribute *attr,
+   const char *buf,
+   size_t count)
+{
+   struct clk_si5341 *data = i2c_get_clientdata(to_i2c_client(dev));
+   int ret;
+   unsigned int value;
+
+   ret = kstrtouint(buf, 0, );
+   if (ret < 0)
+   return ret;
+
+   /* Write the magic value to this attribute to program the NVM */
+   if (value != SI5341_SI5341_NVM_WRITE_COOKIE)
+   return -EINVAL;
+
+   ret = regmap_write(data->regmap, SI5341_NVM_WRITE,
+   SI5341_SI5341_NVM_WRITE_COOKIE);
+   if (ret)
+   return ret;
+
+   /* Wait for SI5341_DEVICE_READY register to become 0x0f */
+   ret = regmap_read_poll_timeout(data->regmap, SI5341_DEVICE_READY, value,
+  value == 0x0f, 0, 30);
+   if (ret)
+   return ret;
+
+   return count;
+}
+
+static DEVICE_ATTR_RW(program_nvm_bank);
+

Re: [PATCH] cpufreq: intel_pstate: Use HWP capabilities in intel_cpufreq_adjust_perf()

2021-01-05 Thread Srinivas Pandruvada
On Tue, 2021-01-05 at 19:20 +0100, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki 
> 
> If turbo P-states cannot be used, either due to the configuration of
> the processor, or because intel_pstate is not allowed to used them,
> the maximum available P-state with HWP enabled corresponds to the
> HWP_CAP.GUARANTEED value which is not static.  It can be adjusted by
> an out-of-band agent or during an Intel Speed Select performance
> level change, so long as it remains less than or equal to
> HWP_CAP.MAX.
> 
> However, if turbo P-states cannot be used,
> intel_cpufreq_adjust_perf()
> always uses pstate.max_pstate (set during the initialization of the
> driver only) as the maximum available P-state, so it may miss a
> change
> of the HWP_CAP.GUARANTEED value.
> 
> Prevent that from happening by modifyig intel_cpufreq_adjust_perf()
> to always read the "guaranteed" and "maximum turbo" performance
> levels from the cached HWP_CAP value.
> 
> Signed-off-by: Rafael J. Wysocki 
Acked-by: Srinivas Pandruvada 

> ---
>  drivers/cpufreq/intel_pstate.c |    5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> Index: linux-pm/drivers/cpufreq/intel_pstate.c
> ===
> --- linux-pm.orig/drivers/cpufreq/intel_pstate.c
> +++ linux-pm/drivers/cpufreq/intel_pstate.c
> @@ -2653,12 +2653,13 @@ static void intel_cpufreq_adjust_perf(un
>   unsigned long capacity)
>  {
> struct cpudata *cpu = all_cpu_data[cpunum];
> +   u64 hwp_cap = READ_ONCE(cpu->hwp_cap_cached);
> int old_pstate = cpu->pstate.current_pstate;
> int cap_pstate, min_pstate, max_pstate, target_pstate;
>  
> update_turbo_state();
> -   cap_pstate = global.turbo_disabled ? cpu->pstate.max_pstate :
> -    cpu-
> >pstate.turbo_pstate;
> +   cap_pstate = global.turbo_disabled ?
> HWP_GUARANTEED_PERF(hwp_cap) :
> +   
> HWP_HIGHEST_PERF(hwp_cap);
>  
> /* Optimization: Avoid unnecessary divisions. */
>  
> 
> 
> 




[PATCH -V8 2/3] NOT kernel/man2/set_mempolicy.2: Add mode flag MPOL_F_NUMA_BALANCING

2021-01-05 Thread Huang Ying
Signed-off-by: "Huang, Ying" 
Cc: "Alejandro Colomar" 
---
 man2/set_mempolicy.2 | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/man2/set_mempolicy.2 b/man2/set_mempolicy.2
index 68011eecb..fa64a1820 100644
--- a/man2/set_mempolicy.2
+++ b/man2/set_mempolicy.2
@@ -113,6 +113,22 @@ A nonempty
 .I nodemask
 specifies node IDs that are relative to the set of
 node IDs allowed by the process's current cpuset.
+.TP
+.BR MPOL_F_NUMA_BALANCING " (since Linux 5.12)"
+When
+.I mode
+is
+.BR MPOL_BIND ,
+enable the kernel NUMA balancing for the task if it is supported by
+the kernel.
+If the flag isn't supported by the kernel, or is used with
+.I mode
+other than
+.BR MPOL_BIND ,
+return \-1 and
+.I errno
+is set to
+.BR EINVAL .
 .PP
 .I nodemask
 points to a bit mask of node IDs that contains up to
@@ -293,6 +309,12 @@ argument specified both
 .B MPOL_F_STATIC_NODES
 and
 .BR MPOL_F_RELATIVE_NODES .
+Or, the
+.B MPOL_F_NUMA_BALANCING
+isn't supported by the kernel, or is used with
+.I mode
+other than
+.BR MPOL_BIND .
 .TP
 .B ENOMEM
 Insufficient kernel memory was available.
-- 
2.29.2



Re: [PATCH RFC cpumask 3/5] cpumask: Add a "none" alias to complement "all"

2021-01-05 Thread Yury Norov
On Tue, Jan 5, 2021 at 4:49 PM  wrote:
>
> From: Paul Gortmaker 
>
> With global support for a CPU list alias of "all", it seems to just make
> sense to also trivially extend support for an opposite "none" specifier.
>
> Signed-off-by: Paul Gortmaker 
> Signed-off-by: Paul E. McKenney 
> ---
>  Documentation/admin-guide/kernel-parameters.rst | 6 ++
>  lib/cpumask.c   | 5 +
>  2 files changed, 11 insertions(+)
>
> diff --git a/Documentation/admin-guide/kernel-parameters.rst 
> b/Documentation/admin-guide/kernel-parameters.rst
> index cdf4e81..7dd1224 100644
> --- a/Documentation/admin-guide/kernel-parameters.rst
> +++ b/Documentation/admin-guide/kernel-parameters.rst
> @@ -76,6 +76,12 @@ is equivalent to "foo_cpus=0-N" -- where "N" is the 
> numerically last CPU on
>  the system, thus avoiding looking up the value in "/sys/devices/system/cpu"
>  in advance on each deployed system.
>
> +foo_cpus=none
> +
> +will provide an empty/cleared cpu mask for the associated boot argument.
> +
> +Note that "all" and "none" are not necessarily valid/sensible input values
> +for each available parameter expecting a CPU list.
>
>  This document may not be entirely up to date and comprehensive. The command
>  "modinfo -p ${modulename}" shows a current list of all parameters of a 
> loadable
> diff --git a/lib/cpumask.c b/lib/cpumask.c
> index 9f8ff72..7fbcab8 100644
> --- a/lib/cpumask.c
> +++ b/lib/cpumask.c
> @@ -110,6 +110,11 @@ int cpulist_parse(const char *buf, struct cpumask *dstp)
> return 0;
> }
>
> +   if (!strcmp(buf, "none")) {
> +   cpumask_clear(dstp);
> +   return 0;
> +   }

Same comment as to the patch 2. Also, what if a user wants to stack ranges
like 'all, 1-3, none'? As far as I understand current implementation,
cpu_parselist
will pass new keywords to bitmap_parselist() which will fail to parse it.

If you think of new extensions as special case keywords which should not be
mixed with traditional region descriptors, I'm OK with that. But it should be
explained in documentation. I think it's better to handle 'all' and 'none' in
bitmap_parse_region().

The parselist() supports partially used groups with the notation like:
0-1023:2/256 ==> 0,1,256,257,512,513,768,769
I think it's worth making sure that new keywords work with groups smoothly,
otherwise mention in documentation that they don't.

> return bitmap_parselist(buf, cpumask_bits(dstp), nr_cpumask_bits);
>  }
>  EXPORT_SYMBOL(cpulist_parse);
> --
> 2.9.5
>


Re: [PATCH] rtc: s5m: use devm_i2c_new_dummy_device()

2021-01-05 Thread Bartosz Golaszewski
On Wed, Jan 6, 2021 at 7:52 AM Bartosz Golaszewski
 wrote:
>
> On Wed, Jan 6, 2021 at 7:47 AM kernel test robot  wrote:
> >
> > Hi Bartosz,
> >
> > I love your patch! Perhaps something to improve:
> >
> > [auto build test WARNING on abelloni/rtc-next]
> > [also build test WARNING on v5.11-rc2 next-20210104]
> > [If your patch is applied to the wrong git tree, kindly drop us a note.
> > And when submitting patch, we suggest to use '--base' as documented in
> > https://git-scm.com/docs/git-format-patch]
> >
> > url:
> > https://github.com/0day-ci/linux/commits/Bartosz-Golaszewski/rtc-s5m-use-devm_i2c_new_dummy_device/20210105-214736
> > base:   https://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git 
> > rtc-next
> > config: x86_64-randconfig-a004-20210105 (attached as .config)
> > compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
> > 5c951623bc8965fa1e89660f2f5f4a2944e4981a)
> > reproduce (this is a W=1 build):
> > wget 
> > https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
> > ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > # install x86_64 cross compiling tool for clang build
> > # apt-get install binutils-x86-64-linux-gnu
> > # 
> > https://github.com/0day-ci/linux/commit/21651184178d1001f3bbc858c9161f1b7fd65321
> > git remote add linux-review https://github.com/0day-ci/linux
> > git fetch --no-tags linux-review 
> > Bartosz-Golaszewski/rtc-s5m-use-devm_i2c_new_dummy_device/20210105-214736
> > git checkout 21651184178d1001f3bbc858c9161f1b7fd65321
> > # save the attached .config to linux build tree
> > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross 
> > ARCH=x86_64
> >
> > If you fix the issue, kindly add following tag as appropriate
> > Reported-by: kernel test robot 
> >
> > All warnings (new ones prefixed by >>):
> >
> > >> drivers/rtc/rtc-s5m.c:773:4: warning: variable 'ret' is uninitialized 
> > >> when used here [-Wuninitialized]
> >ret);
> >^~~
> >include/linux/dev_printk.h:112:32: note: expanded from macro 'dev_err'
> >_dev_err(dev, dev_fmt(fmt), ##__VA_ARGS__)
> >  ^~~
> >drivers/rtc/rtc-s5m.c:719:9: note: initialize the variable 'ret' to 
> > silence this warning
> >int ret, alarm_irq;
> >   ^
> >= 0
> >1 warning generated.
> >
> >
> > vim +/ret +773 drivers/rtc/rtc-s5m.c
> >
>
> This isn't caused by this patch, it seems to be an older bug. I can
> try to fix it while at it.
>
> Bart

-ETOOEARLY actually it's my bad, I'll fix that in v3.

Bartosz


[PATCH -V8 3/3] NOT kernel/numactl: Support to enable Linux kernel NUMA balancing

2021-01-05 Thread Huang Ying
A new API: numa_set_membind_balancing() is added to libnuma.  It is
same as numa_set_membind() except that the Linux kernel NUMA balancing
will be enabled for the task if the feature is supported by the
kernel.

At the same time, a new option: --balancing (-b) is added to numactl.
Which can be used before the --membind/-m memory policy in the command
line.  With it, the Linux kernel NUMA balancing will be enabled for
the process if --membind/-m is used and the feature is supported by
the kernel.

Signed-off-by: "Huang, Ying" 
---
 libnuma.c | 14 ++
 numa.3| 15 +++
 numa.h|  4 
 numactl.8 | 12 
 numactl.c | 17 ++---
 numaif.h  |  3 +++
 versions.ldscript |  8 
 7 files changed, 70 insertions(+), 3 deletions(-)

diff --git a/libnuma.c b/libnuma.c
index 88f479b..f073c50 100644
--- a/libnuma.c
+++ b/libnuma.c
@@ -1064,6 +1064,20 @@ numa_set_membind_v2(struct bitmask *bmp)
 
 make_internal_alias(numa_set_membind_v2);
 
+void
+numa_set_membind_balancing(struct bitmask *bmp)
+{
+   /* MPOL_F_NUMA_BALANCING: ignore if unsupported */
+   if (set_mempolicy(MPOL_BIND | MPOL_F_NUMA_BALANCING,
+ bmp->maskp, bmp->size + 1) < 0) {
+   if (errno == EINVAL) {
+   errno = 0;
+   numa_set_membind_v2(bmp);
+   } else
+   numa_error("set_mempolicy");
+   }
+}
+
 /*
  * copy a bitmask map body to a numa.h nodemask_t structure
  */
diff --git a/numa.3 b/numa.3
index 3e18098..af01c8f 100644
--- a/numa.3
+++ b/numa.3
@@ -80,6 +80,8 @@ numa \- NUMA policy library
 .br
 .BI "void numa_set_membind(struct bitmask *" nodemask );
 .br
+.BI "void numa_set_membind_balancing(struct bitmask *" nodemask );
+.br
 .B struct bitmask *numa_get_membind(void);
 .sp
 .BI "void *numa_alloc_onnode(size_t " size ", int " node );
@@ -538,6 +540,19 @@ that contains nodes other than those in the mask returned 
by
 .IR numa_get_mems_allowed ()
 will result in an error.
 
+.BR numa_set_membind_balancing ()
+sets the memory allocation mask and enable the Linux kernel NUMA
+balancing for the task if the feature is supported by the kernel.
+The task will only allocate memory from the nodes set in
+.IR nodemask .
+Passing an empty
+.I nodemask
+or a
+.I nodemask
+that contains nodes other than those in the mask returned by
+.IR numa_get_mems_allowed ()
+will result in an error.
+
 .BR numa_get_membind ()
 returns the mask of nodes from which memory can currently be allocated.
 If the returned mask is equal to
diff --git a/numa.h b/numa.h
index bd1d676..5d8543a 100644
--- a/numa.h
+++ b/numa.h
@@ -192,6 +192,10 @@ void numa_set_localalloc(void);
 /* Only allocate memory from the nodes set in mask. 0 to turn off */
 void numa_set_membind(struct bitmask *nodemask);
 
+/* Only allocate memory from the nodes set in mask. Optimize page
+   placement with Linux kernel NUMA balancing if possible. 0 to turn off */
+void numa_set_membind_balancing(struct bitmask *bmp);
+
 /* Return current membind */
 struct bitmask *numa_get_membind(void);
 
diff --git a/numactl.8 b/numactl.8
index f3bb22b..7d52688 100644
--- a/numactl.8
+++ b/numactl.8
@@ -25,6 +25,8 @@ numactl \- Control NUMA policy for processes or shared memory
 [
 .B \-\-all
 ] [
+.B \-\-balancing
+] [
 .B \-\-interleave nodes
 ] [
 .B \-\-preferred node 
@@ -168,6 +170,12 @@ but if memory cannot be allocated there fall back to other 
nodes.
 This option takes only a single node number.
 Relative notation may be used.
 .TP
+.B \-\-balancing, \-b
+Enable Linux kernel NUMA balancing for the process if it is supported by 
kernel.
+This should only be used with
+.I \-\-membind, \-m
+only, otherwise ignored.
+.TP
 .B \-\-show, \-s
 Show NUMA policy settings of the current process. 
 .TP
@@ -278,6 +286,10 @@ numactl \-\-cpunodebind=0 \-\-membind=0,1 -- process -l
 Run process as above, but with an option (-l) that would be confused with
 a numactl option.
 
+numactl \-\-cpunodebind=0 \-\-balancing \-\-membind=0,1 process
+Run process on node 0 with memory allocated on node 0 and 1.  Optimize the
+page placement with Linux kernel NUMA balancing mechanism if possible.
+
 numactl \-\-cpunodebind=netdev:eth0 \-\-membind=netdev:eth0 network-server
 Run network-server on the node of network device eth0 with its memory
 also in the same node.
diff --git a/numactl.c b/numactl.c
index df9dbcb..5a9d2df 100644
--- a/numactl.c
+++ b/numactl.c
@@ -45,6 +45,7 @@ struct option opts[] = {
{"membind", 1, 0, 'm'},
{"show", 0, 0, 's' },
{"localalloc", 0,0, 'l'},
+   {"balancing", 0, 0, 'b'},
{"hardware", 0,0,'H' },
 
{"shm", 1, 0, 'S'},
@@ -65,9 +66,10 @@ struct option opts[] = {
 void usage(void)
 {
fprintf(stderr,
-   "usage: numactl [--all | -a] [--interleave= | -i ] 
[--preferred= | -p ]\n"
-   "   [--physcpubind= | 

[PATCH -V8 1/3] numa balancing: Migrate on fault among multiple bound nodes

2021-01-05 Thread Huang Ying
Now, NUMA balancing can only optimize the page placement among the
NUMA nodes if the default memory policy is used.  Because the memory
policy specified explicitly should take precedence.  But this seems
too strict in some situations.  For example, on a system with 4 NUMA
nodes, if the memory of an application is bound to the node 0 and 1,
NUMA balancing can potentially migrate the pages between the node 0
and 1 to reduce cross-node accessing without breaking the explicit
memory binding policy.

So in this patch, we add MPOL_F_NUMA_BALANCING mode flag to
set_mempolicy() when mode is MPOL_BIND.  With the flag specified, NUMA
balancing will be enabled within the thread to optimize the page
placement within the constrains of the specified memory binding
policy.  With the newly added flag, the NUMA balancing control
mechanism becomes,

- sysctl knob numa_balancing can enable/disable the NUMA balancing
  globally.

- even if sysctl numa_balancing is enabled, the NUMA balancing will be
  disabled for the memory areas or applications with the explicit memory
  policy by default.

- MPOL_F_NUMA_BALANCING can be used to enable the NUMA balancing for the
  applications when specifying the explicit memory policy (MPOL_BIND).

Various page placement optimization based on the NUMA balancing can be
done with these flags.  As the first step, in this patch, if the
memory of the application is bound to multiple nodes (MPOL_BIND), and
in the hint page fault handler the accessing node are in the policy
nodemask, the page will be tried to be migrated to the accessing node
to reduce the cross-node accessing.

If the newly added MPOL_F_NUMA_BALANCING flag is specified by an
application on an old kernel version without its support,
set_mempolicy() will return -1 and errno will be set to EINVAL.  The
application can use this behavior to run on both old and new kernel
versions.

And if the MPOL_F_NUMA_BALANCING flag is specified for the mode other
than MPOL_BIND, set_mempolicy() will return -1 and errno will be set
to EINVAL as before.  Because we don't support optimization based on
the NUMA balancing for these modes.

In the previous version of the patch, we tried to reuse MPOL_MF_LAZY
for mbind().  But that flag is tied to MPOL_MF_MOVE.*, so it seems not
a good API/ABI for the purpose of the patch.

And because it's not clear whether it's necessary to enable NUMA
balancing for a specific memory area inside an application, so we only
add the flag at the thread level (set_mempolicy()) instead of the
memory area level (mbind()).  We can do that when it become necessary.

To test the patch, we run a test case as follows on a 4-node machine
with 192 GB memory (48 GB per node).

1. Change pmbench memory accessing benchmark to call set_mempolicy()
   to bind its memory to node 1 and 3 and enable NUMA balancing.  Some
   related code snippets are as follows,

 #include 
 #include 

struct bitmask *bmp;
int ret;

bmp = numa_parse_nodestring("1,3");
ret = set_mempolicy(MPOL_BIND | MPOL_F_NUMA_BALANCING,
bmp->maskp, bmp->size + 1);
/* If MPOL_F_NUMA_BALANCING isn't supported, fall back to MPOL_BIND */
if (ret < 0 && errno == EINVAL)
ret = set_mempolicy(MPOL_BIND, bmp->maskp, bmp->size + 1);
if (ret < 0) {
perror("Failed to call set_mempolicy");
exit(-1);
}

2. Run a memory eater on node 3 to use 40 GB memory before running pmbench.

3. Run pmbench with 64 processes, the working-set size of each process
   is 640 MB, so the total working-set size is 64 * 640 MB = 40 GB.  The
   CPU and the memory (as in step 1.) of all pmbench processes is bound
   to node 1 and 3. So, after CPU usage is balanced, some pmbench
   processes run on the CPUs of the node 3 will access the memory of
   the node 1.

4. After the pmbench processes run for 100 seconds, kill the memory
   eater.  Now it's possible for some pmbench processes to migrate
   their pages from node 1 to node 3 to reduce cross-node accessing.

Test results show that, with the patch, the pages can be migrated from
node 1 to node 3 after killing the memory eater, and the pmbench score
can increase about 17.5%.

Signed-off-by: "Huang, Ying" 
Acked-by: Mel Gorman 
Cc: Andrew Morton 
Cc: Ingo Molnar 
Cc: Rik van Riel 
Cc: Johannes Weiner 
Cc: "Matthew Wilcox (Oracle)" 
Cc: Dave Hansen 
Cc: Andi Kleen 
Cc: Michal Hocko 
Cc: David Rientjes 
Cc: linux-...@vger.kernel.org
---
 include/uapi/linux/mempolicy.h |  4 +++-
 mm/mempolicy.c | 16 
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/include/uapi/linux/mempolicy.h b/include/uapi/linux/mempolicy.h
index 3354774af61e..8948467b3992 100644
--- a/include/uapi/linux/mempolicy.h
+++ b/include/uapi/linux/mempolicy.h
@@ -28,12 +28,14 @@ enum {
 /* Flags for set_mempolicy */
 #define MPOL_F_STATIC_NODES(1 << 15)
 #define MPOL_F_RELATIVE_NODES  (1 << 14)

[PATCH -V8 0/3] numa balancing: Migrate on fault among multiple bound nodes

2021-01-05 Thread Huang Ying
To make it possible to optimize cross-socket memory accessing with
AutoNUMA even if the memory of the application is bound to multiple
NUMA nodes.

Patch [2/3] and [3/3] are NOT kernel patches.  Instead, they are
patches for man-pages and numactl respectively.  They are sent
together to make it easy to review the newly added kernel API.

Changes:

v8:

- Rebased on latest upstream kernel v5.11-rc2

v7:

- Make set_mempolicy() return -1 with errno is set to EINVAL if mode
  isn't MPOL_BIND per Mel's comments.  Revise document accordingly
  too.

v6:

- Rebased on latest upstream kernel v5.10-rc5

- Added some benchmark data and example in patch description of [1/3]

- Rename AutoNUMA to NUMA Balancing

- Add patches to man-pages [2/3] and numactl [3/3]

v5:

- Remove mbind() support, because it's not clear that it's necessary.

v4:

- Use new flags instead of reuse MPOL_MF_LAZY.

v3:

- Rebased on latest upstream (v5.10-rc3)

- Revised the change log.

v2:

- Rebased on latest upstream (v5.10-rc1)

Best Regards,
Huang, Ying


drivers/rtc/rtc-pcf8523.c:35:9: warning: 'REG_OFFSET' macro redefined

2021-01-05 Thread kernel test robot
Hi Thomas,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   e71ba9452f0b5b2e8dc8aa5445198cd9214a6a62
commit: 7fd70c65faacd39628ba5f670be6490010c8132f ARM: irqstat: Get rid of 
duplicated declaration
date:   6 weeks ago
config: arm-randconfig-r033-20210106 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
5c951623bc8965fa1e89660f2f5f4a2944e4981a)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=7fd70c65faacd39628ba5f670be6490010c8132f
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 7fd70c65faacd39628ba5f670be6490010c8132f
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/rtc/rtc-pcf8523.c:35:9: warning: 'REG_OFFSET' macro redefined 
>> [-Wmacro-redefined]
   #define REG_OFFSET   0x0e
   ^
   arch/arm/mach-ixp4xx/include/mach/platform.h:23:9: note: previous definition 
is here
   #define REG_OFFSET  0
   ^
   1 warning generated.


vim +/REG_OFFSET +35 drivers/rtc/rtc-pcf8523.c

f803f0d079ded42 Thierry Reding 2012-12-17  34  
bc3bee025272524 Russell King   2017-09-29 @35  #define REG_OFFSET   0x0e
bc3bee025272524 Russell King   2017-09-29  36  #define REG_OFFSET_MODE BIT(7)
bc3bee025272524 Russell King   2017-09-29  37  

:: The code at line 35 was first introduced by commit
:: bc3bee0252725240ffa62180d387cc245179c549 rtc: pcf8523: add support for 
trimming the RTC oscillator

:: TO: Russell King 
:: CC: Alexandre Belloni 

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip


Re: [PATCH] rtc: s5m: use devm_i2c_new_dummy_device()

2021-01-05 Thread Bartosz Golaszewski
On Wed, Jan 6, 2021 at 7:47 AM kernel test robot  wrote:
>
> Hi Bartosz,
>
> I love your patch! Perhaps something to improve:
>
> [auto build test WARNING on abelloni/rtc-next]
> [also build test WARNING on v5.11-rc2 next-20210104]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url:
> https://github.com/0day-ci/linux/commits/Bartosz-Golaszewski/rtc-s5m-use-devm_i2c_new_dummy_device/20210105-214736
> base:   https://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git 
> rtc-next
> config: x86_64-randconfig-a004-20210105 (attached as .config)
> compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
> 5c951623bc8965fa1e89660f2f5f4a2944e4981a)
> reproduce (this is a W=1 build):
> wget 
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
> ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # install x86_64 cross compiling tool for clang build
> # apt-get install binutils-x86-64-linux-gnu
> # 
> https://github.com/0day-ci/linux/commit/21651184178d1001f3bbc858c9161f1b7fd65321
> git remote add linux-review https://github.com/0day-ci/linux
> git fetch --no-tags linux-review 
> Bartosz-Golaszewski/rtc-s5m-use-devm_i2c_new_dummy_device/20210105-214736
> git checkout 21651184178d1001f3bbc858c9161f1b7fd65321
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot 
>
> All warnings (new ones prefixed by >>):
>
> >> drivers/rtc/rtc-s5m.c:773:4: warning: variable 'ret' is uninitialized when 
> >> used here [-Wuninitialized]
>ret);
>^~~
>include/linux/dev_printk.h:112:32: note: expanded from macro 'dev_err'
>_dev_err(dev, dev_fmt(fmt), ##__VA_ARGS__)
>  ^~~
>drivers/rtc/rtc-s5m.c:719:9: note: initialize the variable 'ret' to 
> silence this warning
>int ret, alarm_irq;
>   ^
>= 0
>1 warning generated.
>
>
> vim +/ret +773 drivers/rtc/rtc-s5m.c
>

This isn't caused by this patch, it seems to be an older bug. I can
try to fix it while at it.

Bart


Re: [PATCH] mm/memcontrol: fix warning in mem_cgroup_page_lruvec()

2021-01-05 Thread Baoquan He
On 01/03/21 at 09:03pm, Hugh Dickins wrote:
> Boot a CONFIG_MEMCG=y kernel with "cgroup_disabled=memory" and you are
> met by a series of warnings from the VM_WARN_ON_ONCE_PAGE(!memcg, page)
> recently added to the inline mem_cgroup_page_lruvec().
> 
> An earlier attempt to place that warning, in mem_cgroup_lruvec(), had
> been careful to do so after weeding out the mem_cgroup_disabled() case;
> but was itself invalid because of the mem_cgroup_lruvec(NULL, pgdat) in
> clear_pgdat_congested() and age_active_anon().
> 
> Warning in mem_cgroup_page_lruvec() was once useful in detecting a KSM
> charge bug, so may be worth keeping: but skip if mem_cgroup_disabled().
> 
> Fixes: 9a1ac2288cf1 ("mm/memcontrol:rewrite mem_cgroup_page_lruvec()")
> Signed-off-by: Hugh Dickins 
> ---
> 
>  include/linux/memcontrol.h |2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> --- 5.11-rc2/include/linux/memcontrol.h   2020-12-27 20:39:36.751923135 
> -0800
> +++ linux/include/linux/memcontrol.h  2021-01-03 19:38:24.822978559 -0800
> @@ -665,7 +665,7 @@ static inline struct lruvec *mem_cgroup_
>  {
>   struct mem_cgroup *memcg = page_memcg(page);
>  
> - VM_WARN_ON_ONCE_PAGE(!memcg, page);
> + VM_WARN_ON_ONCE_PAGE(!memcg && !mem_cgroup_disabled(), page);
>   return mem_cgroup_lruvec(memcg, pgdat);

Thanks for fixing this. We also encountered this issue in kdump kernel
with the mainline 5.10 kernel since 'cgroup_disable=memory' is added.

Reviewed-by: Baoquan He 



[PATCH] Adds a new ioctl32 syscall for backwards compatibility layers

2021-01-05 Thread sonicadvance1
From: Ryan Houdek 

Problem presented:
A backwards compatibility layer that allows running x86-64 and x86
processes inside of an AArch64 process.
  - CPU is emulated
  - Syscall interface is mostly passthrough
  - Some syscalls require patching or emulation depending on behaviour
  - Not viable from the emulator design to use an AArch32 host process

x86-64 and x86 userspace emulator source:
https://github.com/FEX-Emu/FEX
Usage of ioctl32 is currently in a downstream fork. This will be the
first user of the syscall.

Cross documentation:
https://github.com/FEX-Emu/FEX/wiki/32Bit-x86-Woes#ioctl---54

ioctls are opaque from the emulator perspective and the data wants to be
passed through a syscall as unimpeded as possible.
Sadly due to ioctl struct differences between x86 and x86-64, we need a
syscall that exposes the compatibility ioctl handler to userspace in a
64bit process.

This is necessary behaves of the behaviour differences that occur
between an x86 process doing an ioctl and an x86-64 process doing an
ioctl.

Both of which are captured and passed through the AArch64 ioctl space.
This is implementing a new ioctl32 syscall that allows us to pass 32bit
x86 ioctls through to the kernel with zero or minimal manipulation.

The only supported hosts where we care about this currently is AArch64
and x86-64 (For testing purposes).
PPC64LE, MIPS64LE, and RISC-V64 might be interesting to support in the
future; But I don't have any platforms that get anywhere near Cortex-A77
performance in those architectures. Nor do I have the time to bring up
the emulator on them.
x86-64 can get to the compatibility ioctl through the int $0x80 handler.

This does not solve the following problems:
1) compat_alloc_user_space inside ioctl
2) ioctls that check task mode instead of entry point for behaviour
3) ioctls allocating memory
4) struct packing problems between architectures

Workarounds for the problems presented:
1a) Do a stack pivot to the lower 32bits from userspace
  - Forces host 64bit process to have its thread stacks to live in 32bit
  space. Not ideal.
  - Only do a stack pivot on ioctl to save previous 32bit VA space
1b) Teach kernel that compat_alloc_userspace can return a 64bit pointer
  - x86-64 truncates stack from this function
  - AArch64 returns the full stack pointer
  - Only ~29 users. Validating all of them support a 64bit stack is
  trivial?

2a) Any application using these can be checked for compatibility in
userspace and put on a block list.
2b) Fix any ioctls doing broken behaviour based on task mode rather than
ioctl entry point

3a) Userspace consumes all VA space above 32bit. Forcing allocations to
occur in lower 32bits
  - This is the current implementation
3b) Ensure any allocation in the ioctl handles ioctl entrypoint rather
than just allow generic memory allocations in full VA space
  - This is hard to guarantee

4a) Blocklist any application using ioctls that have different struct
packing across the boundary
  - Can happen when struct packing of 32bit x86 application goes down
  the aarch64 compat_ioctl path
  - Userspace is a AArch64 process passing 32bit x86 ioctl structures
  through the compat_ioctl path which is typically for AArch32 processes
  - None currently identified
4b) Work with upstream kernel and userspace projects to evaluate and fix
  - Identify the problem ioctls
  - Implement a new ioctl with more sane struct packing that matches
  cross-arch
  - Implement new ioctl while maintaining backwards compatibility with
  previous ioctl handler
  - Change upstream project to use the new compatibility ioctl
  - ioctl deprecation will be case by case per device and project
4b) Userspace implements a full ioctl emulation layer
  - Parses the full ioctl tree
  - Either passes through ioctls that it doesn't understand or
  transforms ioctls that it knows are trouble
  - Has the downside that it can still run in to edge cases that will
  fail
  - Performance of additional tracking is a concern
  - Prone to failure keeping the kernel ioctl and userspace ioctl
  handling in sync
  - Really want to have it in the kernel space as much as possible

Signed-off-by: Ryan Houdek 
---
 arch/arm64/include/asm/unistd.h |  2 +-
 arch/arm64/include/asm/unistd32.h   |  2 ++
 fs/ioctl.c  | 16 ++--
 include/linux/syscalls.h|  2 ++
 include/uapi/asm-generic/unistd.h   |  9 -
 kernel/sys_ni.c |  3 +++
 tools/include/uapi/asm-generic/unistd.h |  9 -
 7 files changed, 38 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h
index 86a9d7b3eabe..949788f5ba40 100644
--- a/arch/arm64/include/asm/unistd.h
+++ b/arch/arm64/include/asm/unistd.h
@@ -38,7 +38,7 @@
 #define __ARM_NR_compat_set_tls(__ARM_NR_COMPAT_BASE + 5)
 #define __ARM_NR_COMPAT_END(__ARM_NR_COMPAT_BASE + 0x800)
 
-#define __NR_compat_syscalls   

Re: [PATCH] rtc: s5m: use devm_i2c_new_dummy_device()

2021-01-05 Thread kernel test robot
Hi Bartosz,

I love your patch! Perhaps something to improve:

[auto build test WARNING on abelloni/rtc-next]
[also build test WARNING on v5.11-rc2 next-20210104]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Bartosz-Golaszewski/rtc-s5m-use-devm_i2c_new_dummy_device/20210105-214736
base:   https://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git 
rtc-next
config: x86_64-randconfig-a004-20210105 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 
5c951623bc8965fa1e89660f2f5f4a2944e4981a)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# 
https://github.com/0day-ci/linux/commit/21651184178d1001f3bbc858c9161f1b7fd65321
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Bartosz-Golaszewski/rtc-s5m-use-devm_i2c_new_dummy_device/20210105-214736
git checkout 21651184178d1001f3bbc858c9161f1b7fd65321
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/rtc/rtc-s5m.c:773:4: warning: variable 'ret' is uninitialized when 
>> used here [-Wuninitialized]
   ret);
   ^~~
   include/linux/dev_printk.h:112:32: note: expanded from macro 'dev_err'
   _dev_err(dev, dev_fmt(fmt), ##__VA_ARGS__)
 ^~~
   drivers/rtc/rtc-s5m.c:719:9: note: initialize the variable 'ret' to silence 
this warning
   int ret, alarm_irq;
  ^
   = 0
   1 warning generated.


vim +/ret +773 drivers/rtc/rtc-s5m.c

5bccae6ec45870 Sangbeom Kim  2013-11-12  712  
5bccae6ec45870 Sangbeom Kim  2013-11-12  713  static int 
s5m_rtc_probe(struct platform_device *pdev)
5bccae6ec45870 Sangbeom Kim  2013-11-12  714  {
5bccae6ec45870 Sangbeom Kim  2013-11-12  715struct 
sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
5bccae6ec45870 Sangbeom Kim  2013-11-12  716struct 
sec_platform_data *pdata = s5m87xx->pdata;
5bccae6ec45870 Sangbeom Kim  2013-11-12  717struct 
s5m_rtc_info *info;
e349c910e2398c Krzysztof Kozlowski   2014-04-14  718const struct 
regmap_config *regmap_cfg;
a0347f20aaacc9 Krzysztof Kozlowski   2014-06-10  719int ret, 
alarm_irq;
5bccae6ec45870 Sangbeom Kim  2013-11-12  720  
5bccae6ec45870 Sangbeom Kim  2013-11-12  721if (!pdata) {
5bccae6ec45870 Sangbeom Kim  2013-11-12  722
dev_err(pdev->dev.parent, "Platform data not supplied\n");
5bccae6ec45870 Sangbeom Kim  2013-11-12  723return 
-ENODEV;
5bccae6ec45870 Sangbeom Kim  2013-11-12  724}
5bccae6ec45870 Sangbeom Kim  2013-11-12  725  
5bccae6ec45870 Sangbeom Kim  2013-11-12  726info = 
devm_kzalloc(>dev, sizeof(*info), GFP_KERNEL);
5bccae6ec45870 Sangbeom Kim  2013-11-12  727if (!info)
5bccae6ec45870 Sangbeom Kim  2013-11-12  728return 
-ENOMEM;
5bccae6ec45870 Sangbeom Kim  2013-11-12  729  
94f919225890a1 Krzysztof Kozlowski   2015-04-16  730switch 
(platform_get_device_id(pdev)->driver_data) {
a65e5efa7c5faa Alim Akhtar   2015-11-20  731case S2MPS15X:
8ae83b6f76fc74 Krzysztof Kozlowski   2015-12-30  732
regmap_cfg = _rtc_regmap_config;
8ae83b6f76fc74 Krzysztof Kozlowski   2015-12-30  733
info->regs = _rtc_regs;
8ae83b6f76fc74 Krzysztof Kozlowski   2015-12-30  734
alarm_irq = S2MPS14_IRQ_RTCA0;
8ae83b6f76fc74 Krzysztof Kozlowski   2015-12-30  735break;
e349c910e2398c Krzysztof Kozlowski   2014-04-14  736case S2MPS14X:
8ae83b6f76fc74 Krzysztof Kozlowski   2015-12-30  737
regmap_cfg = _rtc_regmap_config;
8ae83b6f76fc74 Krzysztof Kozlowski   2015-12-30  738
info->regs = _rtc_regs;
8ae83b6f76fc74 Krzysztof Kozlowski   2015-12-30  739
alarm_irq = S2MPS14_IRQ_RTCA0;
8ae83b6f76fc74 Krzysztof Kozlowski   2015-12-30  740break;
5281f94ae7f54d Krzysztof Kozlowski   2015-04-16  741case S2MPS13X:
e349c91

[PATCH] rtc: s5m: use devm_i2c_new_dummy_device()

2021-01-05 Thread Bartosz Golaszewski
From: Bartosz Golaszewski 

Use the managed variant of i2c_new_dummy_device() to shrink code and
remove the goto label. We can drop the remove callback now too.

Signed-off-by: Bartosz Golaszewski 
---
 drivers/rtc/rtc-s5m.c | 34 --
 1 file changed, 8 insertions(+), 26 deletions(-)

diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c
index eb9dde4095a9..8d42592bc58e 100644
--- a/drivers/rtc/rtc-s5m.c
+++ b/drivers/rtc/rtc-s5m.c
@@ -760,7 +760,8 @@ static int s5m_rtc_probe(struct platform_device *pdev)
return -ENODEV;
}
 
-   info->i2c = i2c_new_dummy_device(s5m87xx->i2c->adapter, RTC_I2C_ADDR);
+   info->i2c = devm_i2c_new_dummy_device(>dev, s5m87xx->i2c->adapter,
+ RTC_I2C_ADDR);
if (IS_ERR(info->i2c)) {
dev_err(>dev, "Failed to allocate I2C for RTC\n");
return PTR_ERR(info->i2c);
@@ -768,10 +769,9 @@ static int s5m_rtc_probe(struct platform_device *pdev)
 
info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
if (IS_ERR(info->regmap)) {
-   ret = PTR_ERR(info->regmap);
dev_err(>dev, "Failed to allocate RTC register map: %d\n",
-   ret);
-   goto err;
+   ret);
+   return PTR_ERR(info->regmap);
}
 
info->dev = >dev;
@@ -781,10 +781,9 @@ static int s5m_rtc_probe(struct platform_device *pdev)
if (s5m87xx->irq_data) {
info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
if (info->irq <= 0) {
-   ret = -EINVAL;
dev_err(>dev, "Failed to get virtual IRQ %d\n",
alarm_irq);
-   goto err;
+   return -EINVAL;
}
}
 
@@ -797,10 +796,8 @@ static int s5m_rtc_probe(struct platform_device *pdev)
info->rtc_dev = devm_rtc_device_register(>dev, "s5m-rtc",
 _rtc_ops, THIS_MODULE);
 
-   if (IS_ERR(info->rtc_dev)) {
-   ret = PTR_ERR(info->rtc_dev);
-   goto err;
-   }
+   if (IS_ERR(info->rtc_dev))
+   return PTR_ERR(info->rtc_dev);
 
if (!info->irq) {
dev_info(>dev, "Alarm IRQ not available\n");
@@ -813,23 +810,9 @@ static int s5m_rtc_probe(struct platform_device *pdev)
if (ret < 0) {
dev_err(>dev, "Failed to request alarm IRQ: %d: %d\n",
info->irq, ret);
-   goto err;
+   return ret;
}
 
-   return 0;
-
-err:
-   i2c_unregister_device(info->i2c);
-
-   return ret;
-}
-
-static int s5m_rtc_remove(struct platform_device *pdev)
-{
-   struct s5m_rtc_info *info = platform_get_drvdata(pdev);
-
-   i2c_unregister_device(info->i2c);
-
return 0;
 }
 
@@ -874,7 +857,6 @@ static struct platform_driver s5m_rtc_driver = {
.pm = _rtc_pm_ops,
},
.probe  = s5m_rtc_probe,
-   .remove = s5m_rtc_remove,
.id_table   = s5m_rtc_id,
 };
 
-- 
2.29.1



Re: [RFC PATCH 01/12] riscv: Move kernel mapping outside of linear mapping

2021-01-05 Thread Anup Patel
On Wed, Jan 6, 2021 at 12:06 PM Alex Ghiti  wrote:
>
> Hi Anup,
>
> Le 1/5/21 à 6:40 AM, Anup Patel a écrit :
> > On Tue, Jan 5, 2021 at 1:29 AM Alexandre Ghiti  wrote:
> >>
> >> This is a preparatory patch for relocatable kernel and sv48 support.
> >>
> >> The kernel used to be linked at PAGE_OFFSET address therefore we could use
> >> the linear mapping for the kernel mapping. But the relocated kernel base
> >> address will be different from PAGE_OFFSET and since in the linear mapping,
> >> two different virtual addresses cannot point to the same physical address,
> >> the kernel mapping needs to lie outside the linear mapping so that we don't
> >> have to copy it at the same physical offset.
> >>
> >> The kernel mapping is moved to the last 2GB of the address space and then
> >> BPF and modules are also pushed to the same range since they have to lie
> >> close to the kernel inside a 2GB window.
> >>
> >> Note then that KASLR implementation will simply have to move the kernel in
> >> this 2GB range and modify BPF/modules regions accordingly.
> >>
> >> In addition, by moving the kernel to the end of the address space, both
> >> sv39 and sv48 kernels will be exactly the same without needing to be
> >> relocated at runtime.
> >
> > Awesome ! This is a good approach with no performance impact.
> >
> >>
> >> Suggested-by: Arnd Bergmann 
> >> Signed-off-by: Alexandre Ghiti 
> >> ---
> >>   arch/riscv/boot/loader.lds.S |  3 +-
> >>   arch/riscv/include/asm/page.h| 10 -
> >>   arch/riscv/include/asm/pgtable.h | 39 +--
> >>   arch/riscv/kernel/head.S |  3 +-
> >>   arch/riscv/kernel/module.c   |  4 +-
> >>   arch/riscv/kernel/vmlinux.lds.S  |  3 +-
> >>   arch/riscv/mm/init.c | 65 
> >>   arch/riscv/mm/physaddr.c |  2 +-
> >>   8 files changed, 94 insertions(+), 35 deletions(-)
> >>
> >> diff --git a/arch/riscv/boot/loader.lds.S b/arch/riscv/boot/loader.lds.S
> >> index 47a5003c2e28..62d94696a19c 100644
> >> --- a/arch/riscv/boot/loader.lds.S
> >> +++ b/arch/riscv/boot/loader.lds.S
> >> @@ -1,13 +1,14 @@
> >>   /* SPDX-License-Identifier: GPL-2.0 */
> >>
> >>   #include 
> >> +#include 
> >>
> >>   OUTPUT_ARCH(riscv)
> >>   ENTRY(_start)
> >>
> >>   SECTIONS
> >>   {
> >> -   . = PAGE_OFFSET;
> >> +   . = KERNEL_LINK_ADDR;
> >>
> >>  .payload : {
> >>  *(.payload)
> >> diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h
> >> index 2d50f76efe48..98188e315e8d 100644
> >> --- a/arch/riscv/include/asm/page.h
> >> +++ b/arch/riscv/include/asm/page.h
> >> @@ -90,18 +90,26 @@ typedef struct page *pgtable_t;
> >>
> >>   #ifdef CONFIG_MMU
> >>   extern unsigned long va_pa_offset;
> >> +extern unsigned long va_kernel_pa_offset;
> >>   extern unsigned long pfn_base;
> >>   #define ARCH_PFN_OFFSET(pfn_base)
> >>   #else
> >>   #define va_pa_offset   0
> >> +#define va_kernel_pa_offset0
> >>   #define ARCH_PFN_OFFSET(PAGE_OFFSET >> PAGE_SHIFT)
> >>   #endif /* CONFIG_MMU */
> >>
> >>   extern unsigned long max_low_pfn;
> >>   extern unsigned long min_low_pfn;
> >> +extern unsigned long kernel_virt_addr;
> >>
> >>   #define __pa_to_va_nodebug(x)  ((void *)((unsigned long) (x) + 
> >> va_pa_offset))
> >> -#define __va_to_pa_nodebug(x)  ((unsigned long)(x) - va_pa_offset)
> >> +#define linear_mapping_va_to_pa(x) ((unsigned long)(x) - va_pa_offset)
> >> +#define kernel_mapping_va_to_pa(x) \
> >> +   ((unsigned long)(x) - va_kernel_pa_offset)
> >> +#define __va_to_pa_nodebug(x)  \
> >> +   (((x) < KERNEL_LINK_ADDR) ? \
> >> +   linear_mapping_va_to_pa(x) : kernel_mapping_va_to_pa(x))
> >>
> >>   #ifdef CONFIG_DEBUG_VIRTUAL
> >>   extern phys_addr_t __virt_to_phys(unsigned long x);
> >> diff --git a/arch/riscv/include/asm/pgtable.h 
> >> b/arch/riscv/include/asm/pgtable.h
> >> index 183f1f4b2ae6..102b728ca146 100644
> >> --- a/arch/riscv/include/asm/pgtable.h
> >> +++ b/arch/riscv/include/asm/pgtable.h
> >> @@ -11,23 +11,32 @@
> >>
> >>   #include 
> >>
> >> -#ifndef __ASSEMBLY__
> >> -
> >> -/* Page Upper Directory not used in RISC-V */
> >> -#include 
> >> -#include 
> >> -#include 
> >> -#include 
> >> +#ifndef CONFIG_MMU
> >> +#define KERNEL_VIRT_ADDR   PAGE_OFFSET
> >> +#define KERNEL_LINK_ADDR   PAGE_OFFSET
> >> +#else
> >>
> >> -#ifdef CONFIG_MMU
> >> +#define ADDRESS_SPACE_END  (UL(-1))
> >> +/*
> >> + * Leave 2GB for kernel, modules and BPF at the end of the address space
> >> + */
> >> +#define KERNEL_VIRT_ADDR   (ADDRESS_SPACE_END - SZ_2G + 1)
> >> +#define KERNEL_LINK_ADDR   KERNEL_VIRT_ADDR
> >>
> >>   #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
> >>   #define VMALLOC_END  (PAGE_OFFSET - 1)
> >>   #define VMALLOC_START(PAGE_OFFSET - VMALLOC_SIZE)
> >>
> >> +/* KASLR should leave at least 128MB for BPF after the kernel */
> >>   #define 

Re: [RFC PATCH 04/12] riscv: Allow to dynamically define VA_BITS

2021-01-05 Thread Alex Ghiti




Le 1/5/21 à 7:06 AM, Anup Patel a écrit :

On Tue, Jan 5, 2021 at 1:33 AM Alexandre Ghiti  wrote:


With 4-level page table folding at runtime, we don't know at compile time
the size of the virtual address space so we must set VA_BITS dynamically
so that sparsemem reserves the right amount of memory for struct pages.

Signed-off-by: Alexandre Ghiti 
---
  arch/riscv/Kconfig | 10 --
  arch/riscv/include/asm/pgtable.h   | 11 +--
  arch/riscv/include/asm/sparsemem.h |  6 +-
  3 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 44377fd7860e..2979a44103be 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -122,16 +122,6 @@ config ZONE_DMA32
 bool
 default y if 64BIT

-config VA_BITS
-   int
-   default 32 if 32BIT
-   default 39 if 64BIT
-
-config PA_BITS
-   int
-   default 34 if 32BIT
-   default 56 if 64BIT
-
  config PAGE_OFFSET
 hex
 default 0xC000 if 32BIT && MAXPHYSMEM_2GB
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 102b728ca146..c7973bfd65bc 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -43,8 +43,14 @@
   * struct pages to map half the virtual address space. Then
   * position vmemmap directly below the VMALLOC region.
   */
+#ifdef CONFIG_64BIT
+#define VA_BITS39
+#else
+#define VA_BITS32
+#endif
+
  #define VMEMMAP_SHIFT \
-   (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
+   (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
  #define VMEMMAP_SIZE   BIT(VMEMMAP_SHIFT)
  #define VMEMMAP_END(VMALLOC_START - 1)
  #define VMEMMAP_START  (VMALLOC_START - VMEMMAP_SIZE)
@@ -83,6 +89,7 @@
  #endif /* CONFIG_64BIT */

  #ifdef CONFIG_MMU
+
  /* Number of entries in the page global directory */
  #define PTRS_PER_PGD(PAGE_SIZE / sizeof(pgd_t))
  /* Number of entries in the page table */
@@ -453,7 +460,7 @@ static inline int ptep_clear_flush_young(struct 
vm_area_struct *vma,
   * and give the kernel the other (upper) half.
   */
  #ifdef CONFIG_64BIT
-#define KERN_VIRT_START(-(BIT(CONFIG_VA_BITS)) + TASK_SIZE)
+#define KERN_VIRT_START(-(BIT(VA_BITS)) + TASK_SIZE)
  #else
  #define KERN_VIRT_STARTFIXADDR_START
  #endif
diff --git a/arch/riscv/include/asm/sparsemem.h 
b/arch/riscv/include/asm/sparsemem.h
index 45a7018a8118..63acaecc3374 100644
--- a/arch/riscv/include/asm/sparsemem.h
+++ b/arch/riscv/include/asm/sparsemem.h
@@ -4,7 +4,11 @@
  #define _ASM_RISCV_SPARSEMEM_H

  #ifdef CONFIG_SPARSEMEM
-#define MAX_PHYSMEM_BITS   CONFIG_PA_BITS
+#ifdef CONFIG_64BIT
+#define MAX_PHYSMEM_BITS   56
+#else
+#define MAX_PHYSMEM_BITS   34
+#endif /* CONFIG_64BIT */
  #define SECTION_SIZE_BITS  27
  #endif /* CONFIG_SPARSEMEM */

--
2.20.1



Looks good to me.

Reviewed-by: Anup Patel 


Thanks,



Regards,
Anup



Alex


[PATCH] thinkpad_acpi: fix: use scnprintf instead of snprintf.

2021-01-05 Thread YANG LI
The snprintf() function returns the number of characters which would
have been printed if there were enough space, but the scnprintf()
returns the number of characters which were actually printed. If the
buffer is not large enough, then using snprintf() would result in a
read overflow and an information leak. This error was found with the
help of coccicheck.

Signed-off-by: YANG LI 
Reported-by: Abaci 
---
 drivers/platform/x86/thinkpad_acpi.c | 62 ++--
 1 file changed, 31 insertions(+), 31 deletions(-)

diff --git a/drivers/platform/x86/thinkpad_acpi.c 
b/drivers/platform/x86/thinkpad_acpi.c
index e03df28..c29a639 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -1340,7 +1340,7 @@ static ssize_t tpacpi_rfk_sysfs_enable_show(const enum 
tpacpi_rfk_id id,
return status;
}
 
-   return snprintf(buf, PAGE_SIZE, "%d\n",
+   return scnprintf(buf, PAGE_SIZE, "%d\n",
(status == TPACPI_RFK_RADIO_ON) ? 1 : 0);
 }
 
@@ -1433,14 +1433,14 @@ static int tpacpi_rfk_procfs_write(const enum 
tpacpi_rfk_id id, char *buf)
 /* interface_version --- */
 static ssize_t interface_version_show(struct device_driver *drv, char *buf)
 {
-   return snprintf(buf, PAGE_SIZE, "0x%08x\n", TPACPI_SYSFS_VERSION);
+   return scnprintf(buf, PAGE_SIZE, "0x%08x\n", TPACPI_SYSFS_VERSION);
 }
 static DRIVER_ATTR_RO(interface_version);
 
 /* debug_level - */
 static ssize_t debug_level_show(struct device_driver *drv, char *buf)
 {
-   return snprintf(buf, PAGE_SIZE, "0x%04x\n", dbg_level);
+   return scnprintf(buf, PAGE_SIZE, "0x%04x\n", dbg_level);
 }
 
 static ssize_t debug_level_store(struct device_driver *drv, const char *buf,
@@ -1460,7 +1460,7 @@ static ssize_t debug_level_store(struct device_driver 
*drv, const char *buf,
 /* version - */
 static ssize_t version_show(struct device_driver *drv, char *buf)
 {
-   return snprintf(buf, PAGE_SIZE, "%s v%s\n",
+   return scnprintf(buf, PAGE_SIZE, "%s v%s\n",
TPACPI_DESC, TPACPI_VERSION);
 }
 static DRIVER_ATTR_RO(version);
@@ -1472,7 +1472,7 @@ static ssize_t version_show(struct device_driver *drv, 
char *buf)
 /* wlsw_emulstate -- */
 static ssize_t wlsw_emulstate_show(struct device_driver *drv, char *buf)
 {
-   return snprintf(buf, PAGE_SIZE, "%d\n", !!tpacpi_wlsw_emulstate);
+   return scnprintf(buf, PAGE_SIZE, "%d\n", !!tpacpi_wlsw_emulstate);
 }
 
 static ssize_t wlsw_emulstate_store(struct device_driver *drv, const char *buf,
@@ -1495,7 +1495,7 @@ static ssize_t wlsw_emulstate_store(struct device_driver 
*drv, const char *buf,
 /* bluetooth_emulstate - */
 static ssize_t bluetooth_emulstate_show(struct device_driver *drv, char *buf)
 {
-   return snprintf(buf, PAGE_SIZE, "%d\n", !!tpacpi_bluetooth_emulstate);
+   return scnprintf(buf, PAGE_SIZE, "%d\n", !!tpacpi_bluetooth_emulstate);
 }
 
 static ssize_t bluetooth_emulstate_store(struct device_driver *drv,
@@ -1515,7 +1515,7 @@ static ssize_t bluetooth_emulstate_store(struct 
device_driver *drv,
 /* wwan_emulstate - */
 static ssize_t wwan_emulstate_show(struct device_driver *drv, char *buf)
 {
-   return snprintf(buf, PAGE_SIZE, "%d\n", !!tpacpi_wwan_emulstate);
+   return scnprintf(buf, PAGE_SIZE, "%d\n", !!tpacpi_wwan_emulstate);
 }
 
 static ssize_t wwan_emulstate_store(struct device_driver *drv, const char *buf,
@@ -1535,7 +1535,7 @@ static ssize_t wwan_emulstate_store(struct device_driver 
*drv, const char *buf,
 /* uwb_emulstate - */
 static ssize_t uwb_emulstate_show(struct device_driver *drv, char *buf)
 {
-   return snprintf(buf, PAGE_SIZE, "%d\n", !!tpacpi_uwb_emulstate);
+   return scnprintf(buf, PAGE_SIZE, "%d\n", !!tpacpi_uwb_emulstate);
 }
 
 static ssize_t uwb_emulstate_store(struct device_driver *drv, const char *buf,
@@ -2745,7 +2745,7 @@ static ssize_t hotkey_enable_show(struct device *dev,
if (res)
return res;
 
-   return snprintf(buf, PAGE_SIZE, "%d\n", status);
+   return scnprintf(buf, PAGE_SIZE, "%d\n", status);
 }
 
 static ssize_t hotkey_enable_store(struct device *dev,
@@ -2773,7 +2773,7 @@ static ssize_t hotkey_mask_show(struct device *dev,
   struct device_attribute *attr,
   char *buf)
 {
-   return snprintf(buf, PAGE_SIZE, "0x%08x\n", hotkey_user_mask);
+   return scnprintf(buf, PAGE_SIZE, "0x%08x\n", hotkey_user_mask);
 }
 
 static ssize_t hotkey_mask_store(struct device *dev,
@@ -2821,7 +2821,7 @@ static ssize_t hotkey_bios_mask_show(struct 

Re: [RFC PATCH 01/12] riscv: Move kernel mapping outside of linear mapping

2021-01-05 Thread Alex Ghiti

Hi Anup,

Le 1/5/21 à 6:40 AM, Anup Patel a écrit :

On Tue, Jan 5, 2021 at 1:29 AM Alexandre Ghiti  wrote:


This is a preparatory patch for relocatable kernel and sv48 support.

The kernel used to be linked at PAGE_OFFSET address therefore we could use
the linear mapping for the kernel mapping. But the relocated kernel base
address will be different from PAGE_OFFSET and since in the linear mapping,
two different virtual addresses cannot point to the same physical address,
the kernel mapping needs to lie outside the linear mapping so that we don't
have to copy it at the same physical offset.

The kernel mapping is moved to the last 2GB of the address space and then
BPF and modules are also pushed to the same range since they have to lie
close to the kernel inside a 2GB window.

Note then that KASLR implementation will simply have to move the kernel in
this 2GB range and modify BPF/modules regions accordingly.

In addition, by moving the kernel to the end of the address space, both
sv39 and sv48 kernels will be exactly the same without needing to be
relocated at runtime.


Awesome ! This is a good approach with no performance impact.



Suggested-by: Arnd Bergmann 
Signed-off-by: Alexandre Ghiti 
---
  arch/riscv/boot/loader.lds.S |  3 +-
  arch/riscv/include/asm/page.h| 10 -
  arch/riscv/include/asm/pgtable.h | 39 +--
  arch/riscv/kernel/head.S |  3 +-
  arch/riscv/kernel/module.c   |  4 +-
  arch/riscv/kernel/vmlinux.lds.S  |  3 +-
  arch/riscv/mm/init.c | 65 
  arch/riscv/mm/physaddr.c |  2 +-
  8 files changed, 94 insertions(+), 35 deletions(-)

diff --git a/arch/riscv/boot/loader.lds.S b/arch/riscv/boot/loader.lds.S
index 47a5003c2e28..62d94696a19c 100644
--- a/arch/riscv/boot/loader.lds.S
+++ b/arch/riscv/boot/loader.lds.S
@@ -1,13 +1,14 @@
  /* SPDX-License-Identifier: GPL-2.0 */

  #include 
+#include 

  OUTPUT_ARCH(riscv)
  ENTRY(_start)

  SECTIONS
  {
-   . = PAGE_OFFSET;
+   . = KERNEL_LINK_ADDR;

 .payload : {
 *(.payload)
diff --git a/arch/riscv/include/asm/page.h b/arch/riscv/include/asm/page.h
index 2d50f76efe48..98188e315e8d 100644
--- a/arch/riscv/include/asm/page.h
+++ b/arch/riscv/include/asm/page.h
@@ -90,18 +90,26 @@ typedef struct page *pgtable_t;

  #ifdef CONFIG_MMU
  extern unsigned long va_pa_offset;
+extern unsigned long va_kernel_pa_offset;
  extern unsigned long pfn_base;
  #define ARCH_PFN_OFFSET(pfn_base)
  #else
  #define va_pa_offset   0
+#define va_kernel_pa_offset0
  #define ARCH_PFN_OFFSET(PAGE_OFFSET >> PAGE_SHIFT)
  #endif /* CONFIG_MMU */

  extern unsigned long max_low_pfn;
  extern unsigned long min_low_pfn;
+extern unsigned long kernel_virt_addr;

  #define __pa_to_va_nodebug(x)  ((void *)((unsigned long) (x) + va_pa_offset))
-#define __va_to_pa_nodebug(x)  ((unsigned long)(x) - va_pa_offset)
+#define linear_mapping_va_to_pa(x) ((unsigned long)(x) - va_pa_offset)
+#define kernel_mapping_va_to_pa(x) \
+   ((unsigned long)(x) - va_kernel_pa_offset)
+#define __va_to_pa_nodebug(x)  \
+   (((x) < KERNEL_LINK_ADDR) ? \
+   linear_mapping_va_to_pa(x) : kernel_mapping_va_to_pa(x))

  #ifdef CONFIG_DEBUG_VIRTUAL
  extern phys_addr_t __virt_to_phys(unsigned long x);
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 183f1f4b2ae6..102b728ca146 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -11,23 +11,32 @@

  #include 

-#ifndef __ASSEMBLY__
-
-/* Page Upper Directory not used in RISC-V */
-#include 
-#include 
-#include 
-#include 
+#ifndef CONFIG_MMU
+#define KERNEL_VIRT_ADDR   PAGE_OFFSET
+#define KERNEL_LINK_ADDR   PAGE_OFFSET
+#else

-#ifdef CONFIG_MMU
+#define ADDRESS_SPACE_END  (UL(-1))
+/*
+ * Leave 2GB for kernel, modules and BPF at the end of the address space
+ */
+#define KERNEL_VIRT_ADDR   (ADDRESS_SPACE_END - SZ_2G + 1)
+#define KERNEL_LINK_ADDR   KERNEL_VIRT_ADDR

  #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
  #define VMALLOC_END  (PAGE_OFFSET - 1)
  #define VMALLOC_START(PAGE_OFFSET - VMALLOC_SIZE)

+/* KASLR should leave at least 128MB for BPF after the kernel */
  #define BPF_JIT_REGION_SIZE(SZ_128M)
-#define BPF_JIT_REGION_START   (PAGE_OFFSET - BPF_JIT_REGION_SIZE)
-#define BPF_JIT_REGION_END (VMALLOC_END)
+#define BPF_JIT_REGION_START   PFN_ALIGN((unsigned long)&_end)
+#define BPF_JIT_REGION_END (BPF_JIT_REGION_START + BPF_JIT_REGION_SIZE)
+
+/* Modules always live before the kernel */
+#ifdef CONFIG_64BIT
+#define VMALLOC_MODULE_START   (PFN_ALIGN((unsigned long)&_end) - SZ_2G)
+#define VMALLOC_MODULE_END (PFN_ALIGN((unsigned long)&_start))
+#endif


This does not look right or I am missing something.

I think the VMALLOC_MODULE_START should be:
#define VMALLOC_MODULE_START   (PFN_ALIGN((unsigned long)&_start) - 

Re: [PATCH] rtc: s5m: use devm_i2c_new_dummy_device()

2021-01-05 Thread Bartosz Golaszewski
On Tue, Jan 5, 2021 at 5:50 PM Krzysztof Kozlowski  wrote:
>
> On Tue, Jan 05, 2021 at 02:44:24PM +0100, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski 
> >
> > Use the managed variant of i2c_new_dummy_device() to shrink code and
> > remove the goto label.
> >
> > Signed-off-by: Bartosz Golaszewski 
> > ---
> >  drivers/rtc/rtc-s5m.c | 24 
> >  1 file changed, 8 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c
> > index eb9dde4095a9..3432c6213b4c 100644
> > --- a/drivers/rtc/rtc-s5m.c
> > +++ b/drivers/rtc/rtc-s5m.c
> > @@ -760,7 +760,8 @@ static int s5m_rtc_probe(struct platform_device *pdev)
> >   return -ENODEV;
> >   }
> >
> > - info->i2c = i2c_new_dummy_device(s5m87xx->i2c->adapter, RTC_I2C_ADDR);
> > + info->i2c = devm_i2c_new_dummy_device(>dev, 
> > s5m87xx->i2c->adapter,
> > +   RTC_I2C_ADDR);
> >   if (IS_ERR(info->i2c)) {
> >   dev_err(>dev, "Failed to allocate I2C for RTC\n");
> >   return PTR_ERR(info->i2c);
> > @@ -768,10 +769,9 @@ static int s5m_rtc_probe(struct platform_device *pdev)
> >
> >   info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
> >   if (IS_ERR(info->regmap)) {
> > - ret = PTR_ERR(info->regmap);
> >   dev_err(>dev, "Failed to allocate RTC register map: 
> > %d\n",
> > - ret);
> > - goto err;
> > + ret);
> > + return PTR_ERR(info->regmap);
> >   }
> >
> >   info->dev = >dev;
> > @@ -781,10 +781,9 @@ static int s5m_rtc_probe(struct platform_device *pdev)
> >   if (s5m87xx->irq_data) {
> >   info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
> >   if (info->irq <= 0) {
> > - ret = -EINVAL;
> >   dev_err(>dev, "Failed to get virtual IRQ %d\n",
> >   alarm_irq);
> > - goto err;
> > + return -EINVAL;
> >   }
> >   }
> >
> > @@ -797,10 +796,8 @@ static int s5m_rtc_probe(struct platform_device *pdev)
> >   info->rtc_dev = devm_rtc_device_register(>dev, "s5m-rtc",
> >_rtc_ops, THIS_MODULE);
> >
> > - if (IS_ERR(info->rtc_dev)) {
> > - ret = PTR_ERR(info->rtc_dev);
> > - goto err;
> > - }
> > + if (IS_ERR(info->rtc_dev))
> > + return PTR_ERR(info->rtc_dev);
> >
> >   if (!info->irq) {
> >   dev_info(>dev, "Alarm IRQ not available\n");
> > @@ -813,15 +810,10 @@ static int s5m_rtc_probe(struct platform_device *pdev)
> >   if (ret < 0) {
> >   dev_err(>dev, "Failed to request alarm IRQ: %d: %d\n",
> >   info->irq, ret);
> > - goto err;
> > + return ret;
> >   }
> >
> >   return 0;
> > -
> > -err:
> > - i2c_unregister_device(info->i2c);
> > -
> > - return ret;
> >  }
> >
> >  static int s5m_rtc_remove(struct platform_device *pdev)
>
> Unbind should OOPS now.
>

Yes... Yes it should. And it won't in v2. :)

Thanks!
Bart


Re: [PATCH RFC cpumask 2/5] cpumask: Make "all" alias global and not just RCU

2021-01-05 Thread Yury Norov
Hi Paul,

On Tue, Jan 5, 2021 at 4:49 PM  wrote:
>
> From: Paul Gortmaker 
>
> It is probably better that we don't have subsystem specific
> abbreviations or aliases for generic CPU list specifications.
>
> Hence we move the "all" from RCU out to lib/ so that it can be
> used in any instance where CPU lists are being parsed.
>
> Signed-off-by: Paul Gortmaker 
> Signed-off-by: Paul E. McKenney 
> ---
>  Documentation/admin-guide/kernel-parameters.rst |  7 +++
>  Documentation/admin-guide/kernel-parameters.txt |  4 +---
>  kernel/rcu/tree_plugin.h| 13 -
>  lib/cpumask.c   |  6 ++
>  4 files changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/Documentation/admin-guide/kernel-parameters.rst 
> b/Documentation/admin-guide/kernel-parameters.rst
> index 06fb1b4..cdf4e81 100644
> --- a/Documentation/admin-guide/kernel-parameters.rst
> +++ b/Documentation/admin-guide/kernel-parameters.rst
> @@ -68,6 +68,13 @@ For example one can add to the command line following 
> parameter:
>
>  where the final item represents CPUs 100,101,125,126,150,151,...
>
> +The following convenience aliases are also accepted and used:
> +
> +foo_cpus=all
> +
> +is equivalent to "foo_cpus=0-N" -- where "N" is the numerically last CPU on
> +the system, thus avoiding looking up the value in "/sys/devices/system/cpu"
> +in advance on each deployed system.
>
>
>  This document may not be entirely up to date and comprehensive. The command
> diff --git a/Documentation/admin-guide/kernel-parameters.txt 
> b/Documentation/admin-guide/kernel-parameters.txt
> index c722ec1..0f4379b 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -4037,9 +4037,7 @@
> see CONFIG_RAS_CEC help text.
>
> rcu_nocbs=  [KNL]
> -   The argument is a cpu list, as described above,
> -   except that the string "all" can be used to
> -   specify every CPU on the system.
> +   The argument is a cpu list, as described above.
>
> In kernels built with CONFIG_RCU_NOCB_CPU=y, set
> the specified list of CPUs to be no-callback CPUs.
> diff --git a/kernel/rcu/tree_plugin.h b/kernel/rcu/tree_plugin.h
> index 7e291ce..642ebd6 100644
> --- a/kernel/rcu/tree_plugin.h
> +++ b/kernel/rcu/tree_plugin.h
> @@ -1463,20 +1463,15 @@ static void rcu_cleanup_after_idle(void)
>
>  /*
>   * Parse the boot-time rcu_nocb_mask CPU list from the kernel parameters.
> - * The string after the "rcu_nocbs=" is either "all" for all CPUs, or a
> - * comma-separated list of CPUs and/or CPU ranges.  If an invalid list is
> - * given, a warning is emitted and all CPUs are offloaded.
> + * If the list is invalid, a warning is emitted and all CPUs are offloaded.
>   */
>  static int __init rcu_nocb_setup(char *str)
>  {
> alloc_bootmem_cpumask_var(_nocb_mask);
> -   if (!strcasecmp(str, "all"))
> +   if (cpulist_parse(str, rcu_nocb_mask)) {
> +   pr_warn("rcu_nocbs= bad CPU range, all CPUs set\n");
> cpumask_setall(rcu_nocb_mask);
> -   else
> -   if (cpulist_parse(str, rcu_nocb_mask)) {
> -   pr_warn("rcu_nocbs= bad CPU range, all CPUs set\n");
> -   cpumask_setall(rcu_nocb_mask);
> -   }
> +   }
> return 1;
>  }
>  __setup("rcu_nocbs=", rcu_nocb_setup);
> diff --git a/lib/cpumask.c b/lib/cpumask.c
> index 6e6e835..9f8ff72 100644
> --- a/lib/cpumask.c
> +++ b/lib/cpumask.c
> @@ -2,6 +2,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -104,6 +105,11 @@ EXPORT_SYMBOL(cpumask_next_wrap);
>   */
>  int cpulist_parse(const char *buf, struct cpumask *dstp)
>  {
> +   if (!strcmp(buf, "all")) {
> +   cpumask_setall(dstp);
> +   return 0;
> +   }

I like the extensions. Can you move this chunk inside  bitmap_parselist()
to let other users like nodelist_parse() use it?

> return bitmap_parselist(buf, cpumask_bits(dstp), nr_cpumask_bits);
>  }
>  EXPORT_SYMBOL(cpulist_parse);
> --
> 2.9.5
>


Re: [PATCH] docs/zh_CN: add Chinese booting and index file

2021-01-05 Thread Alex Shi



在 2021/1/5 下午5:19, siyant...@loongson.cn 写道:
> From: Yanteng Si 
> 
> This is the Chinese version of booting and index file
> 
> Signed-off-by: Yanteng Si 
> ---
>  .../translations/zh_CN/mips/booting.rst   | 47 +++
>  .../translations/zh_CN/mips/index.rst | 45 ++
>  2 files changed, 92 insertions(+)
>  create mode 100644 Documentation/translations/zh_CN/mips/booting.rst
>  create mode 100644 Documentation/translations/zh_CN/mips/index.rst
> 
> diff --git a/Documentation/translations/zh_CN/mips/booting.rst 
> b/Documentation/translations/zh_CN/mips/booting.rst
> new file mode 100644
> index ..12e0aa76b485
> --- /dev/null
> +++ b/Documentation/translations/zh_CN/mips/booting.rst
> @@ -0,0 +1,47 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +Chinese translated version of Documentation/mips/booting.rst
> +
> +If you have any comment or update to the content, please contact the
> +original document maintainer directly.  However, if you have a problem
> +communicating in English you can also ask the Chinese maintainer for
> +help.  Contact the Chinese maintainer if this translation is outdated
> +or if there is a problem with the translation.
> +
> +Chinese maintainer: Yanteng Si 
> +-
> +Documentation/mips/booting.rst 的中文翻译
> +
> +如果想评论或更新本文的内容,请直接联系原文档的维护者。如果你使用英文
> +交流有困难的话,也可以向中文版维护者求助。如果本翻译更新不及时或者翻
> +译存在问题,请联系中文版维护者。
> +
> +中文版维护者: 司延腾  Yanteng Si 
> +中文版翻译者: 司延腾  Yanteng Si 
> +中文版校译者: 司延腾  Yanteng Si 

Could you like to reuse disclaimer-zh_CN.rst, and the just keep the translator
is fine if all roles are youself.


> +
> +以下为正文
> +-
> +
> +BMIPS设备树引导
> +
> +
> +  一些bootloaders只支持在内核镜像开始地址处的单一入口点。而其它
> +  bootloaders将跳转到ELF的开始地址处。两种方案都被支持的;因为

How about the following changes?

s/被支持/支持/
> +  CONFIG_BOOT_RAW=y and CONFIG_NO_EXCEPT_FILL=y, 所以第一条指令
> +  会立即跳转到kernel_entry()入口处执行。
> +
> +  与arch/arm情况(b)类似,dt感知的引导加载程序需要设置以下寄存器:
> +
> + a0 : 0
> +
> + a1 : 0x
> +
> + a2 : RAM中指向设备树块的物理指针(在chapterII中定义)。
> +  设备树可以位于前512MB物理地址空间(0x -
> +  0x1fff)的任何位置,以64位边界对齐。
> +
> +  legacy bootloaders不会使用这样的约定,并且它们不传入DT块。

s/legacy/传统/

> +  在这种情况下,Linux将通过选中CONFIG_DT_*查找DTB。
> +
> +  这个约定只在32位系统中定义,因为目前没有任何64位的BMIPS实现。

s/这个/以上/

Thanks
Alex

> diff --git a/Documentation/translations/zh_CN/mips/index.rst 
> b/Documentation/translations/zh_CN/mips/index.rst
> new file mode 100644
> index ..244b16b7ef51
> --- /dev/null
> +++ b/Documentation/translations/zh_CN/mips/index.rst
> @@ -0,0 +1,45 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +Chinese translated version of Documentation/mips/index.rst
> +
> +If you have any comment or update to the content, please contact the
> +original document maintainer directly.  However, if you have a problem
> +communicating in English you can also ask the Chinese maintainer for
> +help.  Contact the Chinese maintainer if this translation is outdated
> +or if there is a problem with the translation.
> +
> +Chinese maintainer: Yanteng Si 
> +-
> +Documentation/mips/index.rst 的中文翻译
> +
> +如果想评论或更新本文的内容,请直接联系原文档的维护者。如果你使用英文
> +交流有困难的话,也可以向中文版维护者求助。如果本翻译更新不及时或者翻
> +译存在问题,请联系中文版维护者。
> +
> +中文版维护者: 司延腾  Yanteng Si 
> +中文版翻译者: 司延腾  Yanteng Si 
> +中文版校译者: 司延腾  Yanteng Si 
> +
> +以下为正文
> +-
> +
> +
> +===
> +MIPS特性文档
> +===
> +
> +.. toctree::
> +   :maxdepth: 2
> +   :numbered:
> +
> +   booting
> +   ingenic-tcu
> +
> +   features
> +
> +.. only::  subproject and html
> +
> +   Indices
> +   ===
> +
> +   * :ref:`genindex`
> 


Re: [PATCH v2 -next] dma: idxd: use DEFINE_MUTEX() for mutex lock

2021-01-05 Thread Vinod Koul
On 24-12-20, 21:22, Zheng Yongjun wrote:
> mutex lock can be initialized automatically with DEFINE_MUTEX()
> rather than explicitly calling mutex_init().

Applied, thanks

-- 
~Vinod


Re: [PATCH] dmaengine: at_hdmac: remove platform data header

2021-01-05 Thread Vinod Koul
On 28-12-20, 21:30, Alexandre Belloni wrote:
> linux/platform_data/dma-atmel.h is only used by the at_hdmac driver. Move
> the CFG bits definitions back in at_hdmac_regs.h and the remaining
> definitions in the driver.

Applied, thanks...

>  /* Bitfields in CFG */
> -/* are in at_hdmac.h */
> +#define ATC_PER_MSB(h)   ((0x30U & (h)) >> 4)/* Extract most 
> significant bits of a handshaking identifier */
> +
> +#define  ATC_SRC_PER(h)  (0xFU & (h))/* Channel src rq 
> associated with periph handshaking ifc h */
> +#define  ATC_DST_PER(h)  ((0xFU & (h)) <<  4)/* Channel dst 
> rq associated with periph handshaking ifc h */
> +#define  ATC_SRC_REP (0x1 <<  8) /* Source Replay Mod */
> +#define  ATC_SRC_H2SEL   (0x1 <<  9) /* Source Handshaking 
> Mod */
> +#define  ATC_SRC_H2SEL_SW(0x0 <<  9)
> +#define  ATC_SRC_H2SEL_HW(0x1 <<  9)
> +#define  ATC_SRC_PER_MSB(h)  (ATC_PER_MSB(h) << 10)  /* Channel src 
> rq (most significant bits) */
> +#define  ATC_DST_REP (0x1 << 12) /* Destination Replay 
> Mod */
> +#define  ATC_DST_H2SEL   (0x1 << 13) /* Destination 
> Handshaking Mod */
> +#define  ATC_DST_H2SEL_SW(0x0 << 13)
> +#define  ATC_DST_H2SEL_HW(0x1 << 13)
> +#define  ATC_DST_PER_MSB(h)  (ATC_PER_MSB(h) << 14)  /* Channel dst 
> rq (most significant bits) */
> +#define  ATC_SOD (0x1 << 16) /* Stop On Done */
> +#define  ATC_LOCK_IF (0x1 << 20) /* Interface Lock */
> +#define  ATC_LOCK_B  (0x1 << 21) /* AHB Bus Lock */
> +#define  ATC_LOCK_IF_L   (0x1 << 22) /* Master Interface 
> Arbiter Lock */
> +#define  ATC_LOCK_IF_L_CHUNK (0x0 << 22)
> +#define  ATC_LOCK_IF_L_BUFFER(0x1 << 22)
> +#define  ATC_AHB_PROT_MASK   (0x7 << 24) /* AHB Protection */
> +#define  ATC_FIFOCFG_MASK(0x3 << 28) /* FIFO Request 
> Configuration */
> +#define  ATC_FIFOCFG_LARGESTBURST(0x0 << 28)
> +#define  ATC_FIFOCFG_HALFFIFO(0x1 << 28)
> +#define  ATC_FIFOCFG_ENOUGHSPACE (0x2 << 28)

Make these use BIT() or GENMASK() later..?

-- 
~Vinod


Re: [PATCH v3 05/13] dmaengine: owl: Add compatible for the Actions Semi S500 DMA controller

2021-01-05 Thread Vinod Koul
On 29-12-20, 23:17, Cristian Ciocaltea wrote:
> The DMA controller present on the Actions Semi S500 SoC is compatible
> with the S900 variant, so add it to the list of devices supported by
> the Actions Semi Owl DMA driver. Additionally, order the entries
> alphabetically.

Applied, thanks

-- 
~Vinod


Re: [PATCH v3 04/13] dt-bindings: dma: owl: Add compatible string for Actions Semi S500 SoC

2021-01-05 Thread Vinod Koul
On 29-12-20, 23:17, Cristian Ciocaltea wrote:
> Add a new compatible string corresponding to the DMA controller found
> in the S500 variant of the Actions Semi Owl SoCs family. Additionally,
> order the entries alphabetically.

Applied, thanks

-- 
~Vinod


Re: [PATCH] mm: memcg/slab: optimize objcg stock draining

2021-01-05 Thread Imran Khan




On 6/1/21 3:22 pm, Roman Gushchin wrote:

Imran Khan reported a regression in hackbench results caused by the
commit f2fe7b09a52b ("mm: memcg/slab: charge individual slab objects
instead of pages"). The regression is noticeable in the case of
a consequent allocation of several relatively large slab objects,
e.g. skb's. As soon as the amount of stocked bytes exceeds PAGE_SIZE,
drain_obj_stock() and __memcg_kmem_uncharge() are called, and it leads
to a number of atomic operations in page_counter_uncharge().

The corresponding call graph is below (provided by Imran Khan):
   |__alloc_skb
   ||
   ||__kmalloc_reserve.isra.61
   |||
   |||__kmalloc_node_track_caller
   ||||
   ||||slab_pre_alloc_hook.constprop.88
   ||| obj_cgroup_charge
   |||||
   |||||__memcg_kmem_charge
   ||||||
   ||||||page_counter_try_charge
   |||||
   |||||refill_obj_stock
   ||||||
   ||||||drain_obj_stock.isra.68
   |||||||
   |||||||__memcg_kmem_uncharge
   ||||||||
   ||||||||page_counter_uncharge
   |||||||||
   |||||||||page_counter_cancel
   ||||
   ||||
   ||||__slab_alloc
   |||||
   |||||___slab_alloc
   |||||
   ||||slab_post_alloc_hook

Instead of directly uncharging the accounted kernel memory, it's
possible to refill the generic page-sized per-cpu stock instead.
It's a much faster operation, especially on a default hierarchy.
As a bonus, __memcg_kmem_uncharge_page() will also get faster,
so the freeing of page-sized kernel allocations (e.g. large kmallocs)
will become faster.

A similar change has been done earlier for the socket memory by
the commit 475d0487a2ad ("mm: memcontrol: use per-cpu stocks for
socket memory uncharging").

Signed-off-by: Roman Gushchin 
Reported-by: Imran Khan 


Tested-by: Imran Khan 


---
  mm/memcontrol.c | 4 +---
  1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index 0d74b80fa4de..8148c1df3aff 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -3122,9 +3122,7 @@ void __memcg_kmem_uncharge(struct mem_cgroup *memcg, 
unsigned int nr_pages)
if (!cgroup_subsys_on_dfl(memory_cgrp_subsys))
page_counter_uncharge(>kmem, nr_pages);
  
-	page_counter_uncharge(>memory, nr_pages);

-   if (do_memsw_account())
-   page_counter_uncharge(>memsw, nr_pages);
+   refill_stock(memcg, nr_pages);
  }
  
  /**




Re: [PATCH 05/10] dma: tx49 removal

2021-01-05 Thread Vinod Koul
On 05-01-21, 15:02, Thomas Bogendoerfer wrote:
> Signed-off-by: Thomas Bogendoerfer 

Applied after fixing subsystem name, thanks

-- 
~Vinod


Re: [PATCH 1/1] arm64: make section size configurable for memory hotplug

2021-01-05 Thread Anshuman Khandual
Hi Sudershan,

This patch (and the cover letter) does not copy LAKML even though the
entire change here is arm64 specific. Please do copy all applicable
mailing lists for a given patch.

On 1/6/21 6:58 AM, Sudarshan Rajagopalan wrote:
> Currently on arm64, memory section size is hard-coded to 1GB.
> Make this configurable if memory-hotplug is enabled, to support
> more finer granularity for hotplug-able memory.

Section size has always been decided by the platform. It cannot be a
configurable option because the user would not know the constraints
for memory representation on the platform and besides it also cannot
be trusted.

> 
> Signed-off-by: Sudarshan Rajagopalan 
> ---
>  arch/arm64/Kconfig | 11 +++
>  arch/arm64/include/asm/sparsemem.h |  4 
>  2 files changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 6d232837cbee..34124eee65da 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -294,6 +294,17 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
>  config SMP
>   def_bool y
>  
> +config HOTPLUG_SIZE_BITS
> + int "Memory hotplug block size(29 => 512MB 30 => 1GB)"
> + depends on SPARSEMEM
> + depends on MEMORY_HOTPLUG
> + range 28 30

28 would not work for 64K pages.

> + default 30
> + help
> +  Selects granularity of hotplug memory. Block size for
> +  memory hotplug is represent as a power of 2.
> +  If unsure, stick with default value.
> +
>  config KERNEL_MODE_NEON
>   def_bool y
>  
> diff --git a/arch/arm64/include/asm/sparsemem.h 
> b/arch/arm64/include/asm/sparsemem.h
> index 1f43fcc79738..3d5310f3aad5 100644
> --- a/arch/arm64/include/asm/sparsemem.h
> +++ b/arch/arm64/include/asm/sparsemem.h
> @@ -7,7 +7,11 @@
>  
>  #ifdef CONFIG_SPARSEMEM
>  #define MAX_PHYSMEM_BITS CONFIG_ARM64_PA_BITS
> +#ifndef CONFIG_MEMORY_HOTPLUG
>  #define SECTION_SIZE_BITS30
> +#else
> +#define SECTION_SIZE_BITSCONFIG_HOTPLUG_SIZE_BITS
> +#endif
>  #endif
>  
>  #endif
> 

There was an inconclusive discussion regarding this last month.

https://lore.kernel.org/linux-arm-kernel/20201204014443.43329-1-liwei...@huawei.com/

I have been wondering if this would solve the problem for 4K page size
config which requires PMD mapping for the vmemmap mapping while making
section size bits dependent on max order. But this has not been tested
properly.

diff --git a/arch/arm64/include/asm/sparsemem.h 
b/arch/arm64/include/asm/sparsemem.h
index 1f43fcc79738..fe4353cb1dce 100644
--- a/arch/arm64/include/asm/sparsemem.h
+++ b/arch/arm64/include/asm/sparsemem.h
@@ -7,7 +7,18 @@
 
 #ifdef CONFIG_SPARSEMEM
 #define MAX_PHYSMEM_BITS   CONFIG_ARM64_PA_BITS
-#define SECTION_SIZE_BITS  30
-#endif
+
+#ifdef CONFIG_ARM64_4K_PAGES
+#define SECTION_SIZE_BITS 27
+#else
+#ifdef CONFIG_FORCE_MAX_ZONEORDER
+#define SECTION_SIZE_BITS (CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT)
+#else
+#define SECTION_SIZE_BITS 30
+#endif /* CONFIG_FORCE_MAX_ZONEORDER */
+
+#endif /* CONFIG_ARM64_4K_PAGES */
+
+#endif /* CONFIG_SPARSEMEM*/
 
 #endif


Re: [PATCH v2] net: qrtr: fix null pointer dereference in qrtr_ns_remove

2021-01-05 Thread Qinglang Miao

Hi Markus,

I'd like to take some of your advice in this patch, but I noticed that 
this one has been applied.


Some of your advice would be considered kindly on my future work.

Thanks.

在 2021/1/5 21:14, Markus Elfring 写道:

A null-ptr-deref bug is reported by Hulk Robot like this:


Can it be clearer to use the term “null pointer dereference” for the final 
commit message?
This advice is too detailed for 'null-ptr-deref' is known as a general 
phrase like 'use-after-free' for kernel developer, I think.>



--


I suggest to choose an other character for drawing such a text line.

It's an acceptable advice, thanks.




Fix it by making …


Would you like to replace this wording by the tag “Fixes”?

Sorry, I didn't get your words.

'Fix it by' follows the solution
'Fixes' follows the commit which brought the problem.

In fact, I do considered using 'Fixes' on this one, but it's hard to 
tell which specific commit brought this null pointer dereference.


Will an other imperative wording variant be helpful for this change description?


…

+++ b/net/qrtr/qrtr.c
@@ -1287,13 +1287,19 @@ static int __init qrtr_proto_init(void)

…

+err_sock:
+   sock_unregister(qrtr_family.family);
+err_proto:
+   proto_unregister(_proto);
return rc;
  }


Would it be clearer to use the labels “unregister_sock” and “unregister_proto”?
In fact, The reason I use 'err_sock' rather than 'unregister_sock' is to 
keep same in 'net/qrtr/ns.c'.


I agree with you that “unregister_sock” is better in normal case.


Regards,
Markus
.



Re: [RFC PATCH v2 1/1] platform-msi: Add platform check for subdevice irq domain

2021-01-05 Thread Leon Romanovsky
On Wed, Jan 06, 2021 at 10:27:49AM +0800, Lu Baolu wrote:
> The pci_subdevice_msi_create_irq_domain() should fail if the underlying
> platform is not able to support IMS (Interrupt Message Storage). Otherwise,
> the isolation of interrupt is not guaranteed.
>
> For x86, IMS is only supported on bare metal for now. We could enable it
> in the virtualization environments in the future if interrupt HYPERCALL
> domain is supported or the hardware has the capability of interrupt
> isolation for subdevices.
>
> Suggested-by: Thomas Gleixner 
> Link: 
> https://lore.kernel.org/linux-pci/87pn4nk7nn@nanos.tec.linutronix.de/
> Link: 
> https://lore.kernel.org/linux-pci/877dqrnzr3@nanos.tec.linutronix.de/
> Link: 
> https://lore.kernel.org/linux-pci/877dqqmc2h@nanos.tec.linutronix.de/
> Signed-off-by: Lu Baolu 
> ---
>  arch/x86/pci/common.c   | 47 +
>  drivers/base/platform-msi.c |  8 +++
>  include/linux/msi.h |  1 +
>  3 files changed, 56 insertions(+)
>
>
> Background:
> Learnt from the discussions in this thread:
>
> https://lore.kernel.org/linux-pci/160408357912.912050.17005584526266191420.st...@djiang5-desk3.ch.intel.com/
>
> The device IMS (Interrupt Message Storage) should not be enabled in any
> virtualization environments unless there is a HYPERCALL domain which
> makes the changes in the message store managed by the hypervisor.
>
> As the initial step, we allow the IMS to be enabled only if we are
> running on the bare metal. It's easy to enable IMS in the virtualization
> environments if above preconditions are met in the future.
>
> We ever thought about moving on_bare_metal() to a generic file so that
> it could be well maintained and used. But we need some suggestions about
> where to put it. Your comments are very appreciated.
>
> This patch is only for comments purpose. Please don't merge it. We will
> include it in the Intel IMS implementation later once we reach a
> consensus.
>
> Change log:
> v1->v2:
>  - v1:
>
> https://lore.kernel.org/linux-pci/20201210004624.345282-1-baolu...@linux.intel.com/
>  - Rename probably_on_bare_metal() with on_bare_metal();
>  - Some vendors might use the same name for both bare metal and virtual
>environment. Before we add vendor specific code to distinguish
>between them, let's return false in on_bare_metal(). This won't
>introduce any regression. The only impact is that the coming new
>platform msi feature won't be supported until the vendor specific code
>is provided.
>
> Best regards,
> baolu
>
> diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
> index 3507f456fcd0..963e0401f2b2 100644
> --- a/arch/x86/pci/common.c
> +++ b/arch/x86/pci/common.c
> @@ -724,3 +724,50 @@ struct pci_dev *pci_real_dma_dev(struct pci_dev *dev)
>   return dev;
>  }
>  #endif
> +
> +/*
> + * We want to figure out which context we are running in. But the hardware
> + * does not introduce a reliable way (instruction, CPUID leaf, MSR, whatever)
> + * which can be manipulated by the VMM to let the OS figure out where it 
> runs.
> + * So we go with the below probably on_bare_metal() function as a replacement
> + * for definitely on_bare_metal() to go forward only for the very simple 
> reason
> + * that this is the only option we have.
> + *
> + * People might use the same vendor name for both bare metal and virtual
> + * environment. We can remove those names once we have vendor specific code 
> to
> + * distinguish between them.
> + */
> +static const char * const vmm_vendor_name[] = {
> + "QEMU", "Bochs", "KVM", "Xen", "VMware", "VMW", "VMware Inc.",
> + "innotek GmbH", "Oracle Corporation", "Parallels", "BHYVE",
> + "Microsoft Corporation", "Amazon EC2"
> +};

Maybe it is not concern at all, but this approach will make
forward/backward compatibility without kernel upgrade impossible.

Once QEMU (example) will have needed support, someone will need to remove
the QEMU from this array, rewrite on_bare_metal() because it is not bare
vs. virtual anymore and require kernel upgrade/downgrade every time QEMU
version is switched.

Plus need to update stable@ and distros.

I'm already feeling pain from the fields while they debug such code.

Am I missing it completely?

Thanks


Re: [PATCH] mm: memcg/slab: optimize objcg stock draining

2021-01-05 Thread Shakeel Butt
On Tue, Jan 5, 2021 at 8:22 PM Roman Gushchin  wrote:
>
> Imran Khan reported a regression in hackbench results caused by the
> commit f2fe7b09a52b ("mm: memcg/slab: charge individual slab objects
> instead of pages"). The regression is noticeable in the case of
> a consequent allocation of several relatively large slab objects,
> e.g. skb's. As soon as the amount of stocked bytes exceeds PAGE_SIZE,
> drain_obj_stock() and __memcg_kmem_uncharge() are called, and it leads
> to a number of atomic operations in page_counter_uncharge().
>
> The corresponding call graph is below (provided by Imran Khan):
>   |__alloc_skb
>   ||
>   ||__kmalloc_reserve.isra.61
>   |||
>   |||__kmalloc_node_track_caller
>   ||||
>   ||||slab_pre_alloc_hook.constprop.88
>   ||| obj_cgroup_charge
>   |||||
>   |||||__memcg_kmem_charge
>   ||||||
>   ||||||page_counter_try_charge
>   |||||
>   |||||refill_obj_stock
>   ||||||
>   ||||||drain_obj_stock.isra.68
>   |||||||
>   |||||||__memcg_kmem_uncharge
>   ||||||||
>   ||||||||page_counter_uncharge
>   |||||||||
>   |||||||||page_counter_cancel
>   ||||
>   ||||
>   ||||__slab_alloc
>   |||||
>   |||||___slab_alloc
>   |||||
>   ||||slab_post_alloc_hook
>
> Instead of directly uncharging the accounted kernel memory, it's
> possible to refill the generic page-sized per-cpu stock instead.
> It's a much faster operation, especially on a default hierarchy.
> As a bonus, __memcg_kmem_uncharge_page() will also get faster,
> so the freeing of page-sized kernel allocations (e.g. large kmallocs)
> will become faster.
>
> A similar change has been done earlier for the socket memory by
> the commit 475d0487a2ad ("mm: memcontrol: use per-cpu stocks for
> socket memory uncharging").
>
> Signed-off-by: Roman Gushchin 
> Reported-by: Imran Khan 

I remember seeing this somewhere
https://lore.kernel.org/linux-mm/20190423154405.259178-1-shake...@google.com/

Reviewed-by: Shakeel Butt 


Re: [External] Re: [PATCH 3/6] mm: hugetlb: fix a race between freeing and dissolving the page

2021-01-05 Thread Muchun Song
On Wed, Jan 6, 2021 at 7:22 AM Mike Kravetz  wrote:
>
> On 1/4/21 6:55 PM, Muchun Song wrote:
> > On Tue, Jan 5, 2021 at 8:02 AM Mike Kravetz  wrote:
> >>
> >> On 1/3/21 10:58 PM, Muchun Song wrote:
> >>> There is a race condition between __free_huge_page()
> >>> and dissolve_free_huge_page().
> >>>
> >>> CPU0: CPU1:
> >>>
> >>> // page_count(page) == 1
> >>> put_page(page)
> >>>   __free_huge_page(page)
> >>>   dissolve_free_huge_page(page)
> >>> spin_lock(_lock)
> >>> // PageHuge(page) && !page_count(page)
> >>> update_and_free_page(page)
> >>> // page is freed to the buddy
> >>> spin_unlock(_lock)
> >>> spin_lock(_lock)
> >>> clear_page_huge_active(page)
> >>> enqueue_huge_page(page)
> >>> // It is wrong, the page is already freed
> >>> spin_unlock(_lock)
> >>>
> >>> The race windows is between put_page() and spin_lock() which
> >>> is in the __free_huge_page().
> >>>
> >>> We should make sure that the page is already on the free list
> >>> when it is dissolved.
> >>>
> >>> Fixes: c8721bbbdd36 ("mm: memory-hotplug: enable memory hotplug to handle 
> >>> hugepage")
> >>> Signed-off-by: Muchun Song 
> >>> ---
> >>>  mm/hugetlb.c | 48 
> >>>  1 file changed, 48 insertions(+)
> >>>
> >>> diff --git a/mm/hugetlb.c b/mm/hugetlb.c
> >>> index 1f3bf1710b66..72608008f8b4 100644
> >>> --- a/mm/hugetlb.c
> >>> +++ b/mm/hugetlb.c
> >>> @@ -79,6 +79,21 @@ DEFINE_SPINLOCK(hugetlb_lock);
> >>>  static int num_fault_mutexes;
> >>>  struct mutex *hugetlb_fault_mutex_table cacheline_aligned_in_smp;
> >>>
> >>> +static inline bool PageHugeFreed(struct page *head)
> >>> +{
> >>> + return page_private(head) == -1UL;
> >>
> >> return page_private(head + 4) == -1UL;
> >>
> >>> +}
> >>> +
> >>> +static inline void SetPageHugeFreed(struct page *head)
> >>> +{
> >>> + set_page_private(head + 4, -1UL);
> >>> +}
> >>> +
> >>> +static inline void ClearPageHugeFreed(struct page *head)
> >>> +{
> >>> + set_page_private(head + 4, 0);
> >>> +}
> >>
> >> It is unfortunate that we can not use some existing value like
> >> page_huge_active() to determine if dissolve_free_huge_page() should
> >> proceed with freeing the page to buddy.  If the existing check,
> >>
> >> if (!page_count(page)) {
> >>
> >> was changed to
> >>
> >> if (!page_count(page) && !page_huge_active(page)) {
> >>
> >> the race window would be shrunk.  However, the most straight forward
> >> way to fully close the window is with the approach taken here.
> >
> > I also thought about this fix. But this is not enough. Because
> > we just call put_page to free the HugeTLB page without
> > setting activeness in some place (e.g. error handling
> > routines).
> >
> > If we use page_huge_active, we should set activeness
> > before put_page. But we cannot guarantee this.
>
> Just FYI,
> I went back and explored the option of doing set_page_huge_active
> when a page was put on the active list and clear_page_huge_active
> when put on the free list.  This would be much like what you are
> doing with PageHugeFreed.  Commit bcc54222309c which added page_huge_active
> implied that this was possible.  Then I remembered a race fixed in
> cb6acd01e2e4 that required delaying the call to set_page_huge_active
> in hugetlb_no_page.  So, such a scheme would not work.

Sounds like a tortuous story. :)

>
> Also,
> It seems we could use head[3].mapping for PageHugeFreed ?  Not much
> of an advantage.  It does not add another tail page needed to store
> page metadata.  And, this fits within the already defined
> HUGETLB_CGROUP_MIN_ORDER.

It is fine to me. Will do. Thanks.

> --
> Mike Kravetz


[PATCH 3/6] clk: ast2600: Add eSPI reset bit

2021-01-05 Thread Chia-Wei, Wang
Add bit field definition for the eSPI reset control.

Signed-off-by: Chia-Wei, Wang 
---
 include/dt-bindings/clock/ast2600-clock.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/clock/ast2600-clock.h 
b/include/dt-bindings/clock/ast2600-clock.h
index 62b9520a00fd..964934b1caef 100644
--- a/include/dt-bindings/clock/ast2600-clock.h
+++ b/include/dt-bindings/clock/ast2600-clock.h
@@ -89,6 +89,7 @@
 #define ASPEED_CLK_MAC4RCLK70
 
 /* Only list resets here that are not part of a gate */
+#define ASPEED_RESET_ESPI  57
 #define ASPEED_RESET_ADC   55
 #define ASPEED_RESET_JTAG_MASTER2  54
 #define ASPEED_RESET_I3C_DMA   39
-- 
2.17.1



[PATCH 0/6] arm: aspeed: Add eSPI support

2021-01-05 Thread Chia-Wei, Wang
This patch series add the driver support for the eSPI controller
of Aspeed 6th generation SoCs. This controller is a slave device
communicating with a master over Enhanced Serial Peripheral Interface (eSPI).
It supports all of the 4 eSPI channels, namely peripheral, virtual wire,
out-of-band, and flash, and operates at max frequency of 66MHz.

Chia-Wei, Wang (6):
  dt-bindings: aspeed: Add eSPI controller
  MAINTAINER: Add ASPEED eSPI driver entry
  clk: ast2600: Add eSPI reset bit
  irqchip/aspeed: Add Aspeed eSPI interrupt controller
  soc: aspeed: Add eSPI driver
  ARM: dts: aspeed: Add AST2600 eSPI nodes

 .../devicetree/bindings/soc/aspeed/espi.yaml  | 252 +++
 MAINTAINERS   |  14 +
 arch/arm/boot/dts/aspeed-g6.dtsi  |  57 ++
 drivers/irqchip/Makefile  |   2 +-
 drivers/irqchip/irq-aspeed-espi-ic.c  | 251 +++
 drivers/soc/aspeed/Kconfig|  49 ++
 drivers/soc/aspeed/Makefile   |   5 +
 drivers/soc/aspeed/aspeed-espi-ctrl.c | 197 +
 drivers/soc/aspeed/aspeed-espi-flash.c| 490 
 drivers/soc/aspeed/aspeed-espi-oob.c  | 706 ++
 drivers/soc/aspeed/aspeed-espi-peripheral.c   | 613 +++
 drivers/soc/aspeed/aspeed-espi-vw.c   | 211 ++
 include/dt-bindings/clock/ast2600-clock.h |   1 +
 .../interrupt-controller/aspeed-espi-ic.h |  15 +
 include/soc/aspeed/espi.h | 279 +++
 include/uapi/linux/aspeed-espi.h  | 160 
 16 files changed, 3301 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/soc/aspeed/espi.yaml
 create mode 100644 drivers/irqchip/irq-aspeed-espi-ic.c
 create mode 100644 drivers/soc/aspeed/aspeed-espi-ctrl.c
 create mode 100644 drivers/soc/aspeed/aspeed-espi-flash.c
 create mode 100644 drivers/soc/aspeed/aspeed-espi-oob.c
 create mode 100644 drivers/soc/aspeed/aspeed-espi-peripheral.c
 create mode 100644 drivers/soc/aspeed/aspeed-espi-vw.c
 create mode 100644 include/dt-bindings/interrupt-controller/aspeed-espi-ic.h
 create mode 100644 include/soc/aspeed/espi.h
 create mode 100644 include/uapi/linux/aspeed-espi.h

-- 
2.17.1



[PATCH 6/6] ARM: dts: aspeed: Add AST2600 eSPI nodes

2021-01-05 Thread Chia-Wei, Wang
Add eSPI nodes for the device tree of Aspeed 6th generation SoCs.

Signed-off-by: Chia-Wei, Wang 
---
 arch/arm/boot/dts/aspeed-g6.dtsi | 57 
 1 file changed, 57 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 810b0676ab03..d457baf11e37 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -3,7 +3,9 @@
 
 #include 
 #include 
+#include 
 #include 
+#include 
 
 / {
model = "Aspeed BMC";
@@ -75,6 +77,61 @@
interrupts = ;
};
 
+   espi: espi@1e6ee000 {
+   compatible = "aspeed,ast2600-espi", "simple-mfd", "syscon";
+   reg = <0x1e6ee000 0x1000>;
+
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0x0 0x1e6ee000 0x1000>;
+
+   espi_ic: espi-ic {
+   #interrupt-cells = <1>;
+   compatible = "aspeed,ast2600-espi-ic";
+   interrupts-extended = < GIC_SPI 42 
IRQ_TYPE_LEVEL_HIGH>,
+ < ASPEED_GPIO(W, 7) 
IRQ_TYPE_EDGE_FALLING>;
+   interrupt-controller;
+   status = "disabled";
+   };
+
+   espi_ctrl: espi-ctrl {
+   compatible = "aspeed,ast2600-espi-ctrl";
+   interrupts-extended = <_ic 
ASPEED_ESPI_IC_CTRL_EVENT>,
+ <_ic 
ASPEED_ESPI_IC_CTRL_RESET>;
+   clocks = < ASPEED_CLK_GATE_ESPICLK>;
+   resets = < ASPEED_RESET_ESPI>;
+   status = "disabled";
+   };
+
+   espi_peripheral: espi-peripheral-channel {
+   compatible = "aspeed,ast2600-espi-peripheral";
+   interrupts-extended = <_ic 
ASPEED_ESPI_IC_PERIF_EVENT>,
+ <_ic 
ASPEED_ESPI_IC_CHAN_RESET>;
+   status = "disabled";
+   };
+
+   espi_vw: espi-vw-channel {
+   compatible = "aspeed,ast2600-espi-vw";
+   interrupts-extended = <_ic 
ASPEED_ESPI_IC_VW_EVENT>,
+ <_ic 
ASPEED_ESPI_IC_CHAN_RESET>;
+   status = "disabled";
+   };
+
+   espi_oob: espi-oob-channel {
+   compatible = "aspeed,ast2600-espi-oob";
+   interrupts-extended = <_ic 
ASPEED_ESPI_IC_OOB_EVENT>,
+ <_ic 
ASPEED_ESPI_IC_CHAN_RESET>;
+   status = "disabled";
+   };
+
+   espi_flash: espi-flash-channel {
+   compatible = "aspeed,ast2600-espi-flash";
+   interrupts-extended = <_ic 
ASPEED_ESPI_IC_FLASH_EVENT>,
+ <_ic 
ASPEED_ESPI_IC_CHAN_RESET>;
+   status = "disabled";
+   };
+   };
+
ahb {
compatible = "simple-bus";
#address-cells = <1>;
-- 
2.17.1



[PATCH 5/6] soc: aspeed: Add eSPI driver

2021-01-05 Thread Chia-Wei, Wang
The Aspeed eSPI controller is slave device to communicate with
the master through the Enhanced Serial Peripheral Interface (eSPI).
All of the four eSPI channels, namely peripheral, virtual wire,
out-of-band, and flash are supported.

Signed-off-by: Chia-Wei, Wang 
---
 drivers/soc/aspeed/Kconfig  |  49 ++
 drivers/soc/aspeed/Makefile |   5 +
 drivers/soc/aspeed/aspeed-espi-ctrl.c   | 197 ++
 drivers/soc/aspeed/aspeed-espi-flash.c  | 490 ++
 drivers/soc/aspeed/aspeed-espi-oob.c| 706 
 drivers/soc/aspeed/aspeed-espi-peripheral.c | 613 +
 drivers/soc/aspeed/aspeed-espi-vw.c | 211 ++
 include/uapi/linux/aspeed-espi.h| 160 +
 8 files changed, 2431 insertions(+)
 create mode 100644 drivers/soc/aspeed/aspeed-espi-ctrl.c
 create mode 100644 drivers/soc/aspeed/aspeed-espi-flash.c
 create mode 100644 drivers/soc/aspeed/aspeed-espi-oob.c
 create mode 100644 drivers/soc/aspeed/aspeed-espi-peripheral.c
 create mode 100644 drivers/soc/aspeed/aspeed-espi-vw.c
 create mode 100644 include/uapi/linux/aspeed-espi.h

diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig
index 243ca196e6ad..e4408e97023d 100644
--- a/drivers/soc/aspeed/Kconfig
+++ b/drivers/soc/aspeed/Kconfig
@@ -42,6 +42,55 @@ config ASPEED_SOCINFO
help
  Say yes to support decoding of ASPEED BMC information.
 
+config ASPEED_ESPI
+   tristate "Aspeed eSPI Engine Driver"
+   select REGMAP
+   select MFD_SYSON
+   select ASPEED_ESPI_PERIPHERAL
+   select ASPEED_ESPI_VW
+   select ASPEED_ESPI_OOB
+   select ASPEED_ESPI_FLASH
+   default n
+   help
+ Enable support for the Aspeed eSPI engine. The eSPI engine
+ plays as a slave device in BMC to communicate with the host
+ side master over the eSPI bus interface.
+
+ eSPI and LPC are mutually execulisve features on Aspeed SoC.
+ If not sure, say N.
+
+config ASPEED_ESPI_PERIPHERAL
+   tristate "Aspeed eSPI peripheral channel driver"
+   depends on ASPEED_ESPI
+   help
+ Control Aspeed eSPI peripheral channel driver. The driver
+ also provides an eSPI packet put/get interface to communicate
+ with the eSPI host.
+
+config ASPEED_ESPI_VW
+   tristate "Aspeed eSPI virtual wire channel driver"
+   depends on ASPEED_ESPI
+   help
+ Control Aspeed eSPI virtual wire channel driver. The driver
+ also provides an eSPI packet put/get interface to communicate
+ with the eSPI host.
+
+config ASPEED_ESPI_OOB
+   tristate "Aspeed eSPI out-of-band channel driver"
+   depends on ASPEED_ESPI
+   help
+ Control Aspeed eSPI out-of-band channel driver. The driver
+ also provides an eSPI packet put/get interface to communicat
+ with the eSPI host.
+
+config ASPEED_ESPI_FLASH
+   tristate "Aspeed eSPI flash channel driver"
+   depends on ASPEED_ESPI
+   help
+ Control Aspeed eSPI flash channel driver. The driver
+ also provides an eSPI packet put/get interface to communicat
+ with the eSPI host.
+
 endmenu
 
 endif
diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile
index fcab7192e1a4..ac41ce82bb78 100644
--- a/drivers/soc/aspeed/Makefile
+++ b/drivers/soc/aspeed/Makefile
@@ -3,3 +3,8 @@ obj-$(CONFIG_ASPEED_LPC_CTRL)   += aspeed-lpc-ctrl.o
 obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o
 obj-$(CONFIG_ASPEED_P2A_CTRL)  += aspeed-p2a-ctrl.o
 obj-$(CONFIG_ASPEED_SOCINFO)   += aspeed-socinfo.o
+obj-$(CONFIG_ASPEED_ESPI)  += aspeed-espi-ctrl.o \
+  aspeed-espi-peripheral.o \
+  aspeed-espi-vw.o \
+  aspeed-espi-oob.o \
+  aspeed-espi-flash.o
diff --git a/drivers/soc/aspeed/aspeed-espi-ctrl.c 
b/drivers/soc/aspeed/aspeed-espi-ctrl.c
new file mode 100644
index ..e4329f5f8ed3
--- /dev/null
+++ b/drivers/soc/aspeed/aspeed-espi-ctrl.c
@@ -0,0 +1,197 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2020 Aspeed Technology Inc.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#define DEVICE_NAME "aspeed-espi-ctrl"
+
+struct aspeed_espi_ctrl {
+   struct regmap *map;
+   struct clk *clk;
+   struct reset_control *rst;
+
+   int irq;
+   int irq_reset;
+};
+
+static irqreturn_t aspeed_espi_ctrl_isr(int irq, void *arg)
+{
+   uint32_t sts;
+   struct aspeed_espi_ctrl *espi_ctrl = (struct aspeed_espi_ctrl *)arg;
+
+   regmap_read(espi_ctrl->map, ESPI_INT_STS, );
+
+   if (!(sts & ESPI_INT_STS_HW_RST_DEASSERT))
+   return IRQ_NONE;
+
+   regmap_update_bits(espi_ctrl->map, ESPI_SYSEVT,
+  ESPI_SYSEVT_SLV_BOOT_STS | 

[PATCH 1/6] dt-bindings: aspeed: Add eSPI controller

2021-01-05 Thread Chia-Wei, Wang
Add dt-bindings and the inclusion header for Aspeed eSPI controller.

Signed-off-by: Chia-Wei, Wang 
---
 .../devicetree/bindings/soc/aspeed/espi.yaml  | 252 ++
 .../interrupt-controller/aspeed-espi-ic.h |  15 ++
 2 files changed, 267 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/aspeed/espi.yaml
 create mode 100644 include/dt-bindings/interrupt-controller/aspeed-espi-ic.h

diff --git a/Documentation/devicetree/bindings/soc/aspeed/espi.yaml 
b/Documentation/devicetree/bindings/soc/aspeed/espi.yaml
new file mode 100644
index ..ee92b66fe15b
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/aspeed/espi.yaml
@@ -0,0 +1,252 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# # Copyright (c) 2020 Aspeed Technology Inc.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/aspeed/espi.yaml#;
+$schema: "http://devicetree.org/meta-schemas/core.yaml#;
+
+title: Aspeed eSPI Controller
+
+maintainers:
+  - Chia-Wei Wang 
+  - Ryan Chen 
+
+description:
+  Aspeed eSPI controller implements a slave side eSPI endpoint device
+  supporting the four eSPI channels, namely peripheral, virtual wire,
+  out-of-band, and flash.
+
+properties:
+  compatible:
+items:
+  - enum:
+  - aspeed,ast2600-espi
+  - const: simple-mfd
+  - const: syscon
+
+  reg:
+maxItems: 1
+
+  "#address-cells":
+const: 1
+
+  "#size-cells":
+const: 1
+
+  ranges: true
+
+  espi-ic:
+type: object
+
+properties:
+  compatible:
+const: aspeed,ast2600-espi-ic
+
+  interrupts:
+maxItems: 2
+
+  interrupt-controller: true
+
+  "#interrupt-cells":
+const: 1
+description:
+  The cell is a SW-encoded number for IRQ dispatching to eSPI channels
+
+required:
+  - compatible
+  - interrupts
+  - interrupt-controller
+  - "#interrupt-cells"
+
+  espi-ctrl:
+type: object
+
+properties:
+  compatible:
+const: aspeed,ast2600-espi-ctrl
+
+  interrupts:
+maxItems: 2
+
+  clocks:
+maxItems: 1
+
+  resets:
+maxItems: 1
+
+required:
+  - compatible
+  - interrupts
+  - clocks
+  - resets
+
+  espi-peripheral-channel:
+type: object
+
+properties:
+  compatible:
+const: aspeed,ast2600-espi-peripheral
+
+  interrupts:
+maxItems: 2
+
+  dma-mode:
+type: boolean
+
+  memcyc,map-src-addr:
+$ref: "/schemas/types.yaml#/definitions/uint32"
+description: The host side address to be decoded into the memory cycle 
over eSPI peripheral channel
+
+  memcyc,map-size:
+$ref: "/schemas/types.yaml#/definitions/uint32"
+description: The size of the memory region allocated for the memory 
cycle over eSPI peripheral channel
+minimum: 65536
+
+required:
+  - compatible
+  - interrupts
+  - memcyc,map-src-addr
+  - memcyc,map-size
+
+  espi-vw-channel:
+type: object
+
+properties:
+  compatible:
+const: aspeed,ast2600-espi-vw
+
+  interrupts:
+maxItems: 2
+
+required:
+  - compatible
+  - interrupts
+
+  espi-oob-channel:
+type: object
+
+properties:
+  compatible:
+const: aspeed,ast2600-espi-oob
+
+  interrupts:
+maxItems: 2
+
+  dma-mode:
+type: boolean
+
+  dma-tx-desc-num:
+$ref: "/schemas/types.yaml#/definitions/uint32"
+minimum: 2
+maximum: 1023
+
+  dma-rx-desc-num:
+$ref: "/schemas/types.yaml#/definitions/uint32"
+minimum: 2
+maximum: 1023
+
+required:
+  - compatible
+  - interrupts
+
+  espi-flash-channel:
+type: object
+
+properties:
+  compatible:
+const: aspeed,ast2600-espi-flash
+
+  interrupts:
+maxItems: 2
+
+  dma-mode:
+type: boolean
+
+  safs-mode:
+description: Slave-Attached-Sharing-Flash mode, 0->Mix, 1->SW, 2->HW
+enum: [ 0, 1, 2 ]
+
+required:
+  - compatible
+  - interrupts
+
+required:
+  - compatible
+  - reg
+  - "#address-cells"
+  - "#size-cells"
+  - ranges
+  - espi-ic
+  - espi-ctrl
+  - espi-peripheral-channel
+  - espi-vw-channel
+  - espi-oob-channel
+  - espi-flash-channel
+
+additionalProperties: false
+
+examples:
+  - |
+#include 
+#include 
+#include 
+#include 
+
+espi: espi@1e6ee000 {
+compatible = "aspeed,ast2600-espi", "simple-mfd", "syscon";
+reg = <0x1e6ee000 0x1000>;
+
+#address-cells = <1>;
+#size-cells = <1>;
+ranges = <0x0 0x1e6ee000 0x1000>;
+
+espi_ic: espi-ic {
+#interrupt-cells = <1>;
+compatible = "aspeed,ast2600-espi-ic";
+interrupts-extended = < GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+  < ASPEED_GPIO(W, 7) 
IRQ_TYPE_EDGE_FALLING>;
+interrupt-controller;
+};
+
+espi_ctrl: 

[PATCH 4/6] irqchip/aspeed: Add Aspeed eSPI interrupt controller

2021-01-05 Thread Chia-Wei, Wang
The eSPI interrupt controller acts as a SW IRQ number
decoder to correctly control/dispatch interrupts of
the eSPI peripheral, virtual wire, out-of-band, and
flash channels.

Signed-off-by: Chia-Wei, Wang 
---
 drivers/irqchip/Makefile |   2 +-
 drivers/irqchip/irq-aspeed-espi-ic.c | 251 
 include/soc/aspeed/espi.h| 279 +++
 3 files changed, 531 insertions(+), 1 deletion(-)
 create mode 100644 drivers/irqchip/irq-aspeed-espi-ic.c
 create mode 100644 include/soc/aspeed/espi.h

diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 0ac93bfaec61..56da4a3123f8 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -86,7 +86,7 @@ obj-$(CONFIG_MVEBU_PIC)   += 
irq-mvebu-pic.o
 obj-$(CONFIG_MVEBU_SEI)+= irq-mvebu-sei.o
 obj-$(CONFIG_LS_EXTIRQ)+= irq-ls-extirq.o
 obj-$(CONFIG_LS_SCFG_MSI)  += irq-ls-scfg-msi.o
-obj-$(CONFIG_ARCH_ASPEED)  += irq-aspeed-vic.o irq-aspeed-i2c-ic.o 
irq-aspeed-scu-ic.o
+obj-$(CONFIG_ARCH_ASPEED)  += irq-aspeed-vic.o irq-aspeed-i2c-ic.o 
irq-aspeed-scu-ic.o irq-aspeed-espi-ic.o
 obj-$(CONFIG_STM32_EXTI)   += irq-stm32-exti.o
 obj-$(CONFIG_QCOM_IRQ_COMBINER)+= qcom-irq-combiner.o
 obj-$(CONFIG_IRQ_UNIPHIER_AIDET)   += irq-uniphier-aidet.o
diff --git a/drivers/irqchip/irq-aspeed-espi-ic.c 
b/drivers/irqchip/irq-aspeed-espi-ic.c
new file mode 100644
index ..8a5cc8fe3f0c
--- /dev/null
+++ b/drivers/irqchip/irq-aspeed-espi-ic.c
@@ -0,0 +1,251 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2020 Aspeed Technology Inc.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#define DEVICE_NAME"aspeed-espi-ic"
+#define IRQCHIP_NAME   "eSPI-IC"
+
+#define ESPI_IC_IRQ_NUM7
+
+struct aspeed_espi_ic {
+   struct regmap *map;
+   int irq;
+   int gpio_irq;
+   struct irq_domain *irq_domain;
+};
+
+static void aspeed_espi_ic_gpio_isr(struct irq_desc *desc)
+{
+   unsigned int irq;
+   struct aspeed_espi_ic *espi_ic = irq_desc_get_handler_data(desc);
+   struct irq_chip *chip = irq_desc_get_chip(desc);
+
+   chained_irq_enter(chip, desc);
+
+   irq = irq_find_mapping(espi_ic->irq_domain,
+  ASPEED_ESPI_IC_CTRL_RESET);
+   generic_handle_irq(irq);
+
+   irq = irq_find_mapping(espi_ic->irq_domain,
+  ASPEED_ESPI_IC_CHAN_RESET);
+   generic_handle_irq(irq);
+
+   chained_irq_exit(chip, desc);
+}
+
+static void aspeed_espi_ic_isr(struct irq_desc *desc)
+{
+   unsigned int sts;
+   unsigned int irq;
+   struct aspeed_espi_ic *espi_ic = irq_desc_get_handler_data(desc);
+   struct irq_chip *chip = irq_desc_get_chip(desc);
+
+   chained_irq_enter(chip, desc);
+
+   regmap_read(espi_ic->map, ESPI_INT_STS, );
+
+   if (sts & ESPI_INT_STS_PERIF_BITS) {
+   irq = irq_find_mapping(espi_ic->irq_domain,
+  ASPEED_ESPI_IC_PERIF_EVENT);
+   generic_handle_irq(irq);
+   }
+
+   if (sts & ESPI_INT_STS_VW_BITS) {
+   irq = irq_find_mapping(espi_ic->irq_domain,
+  ASPEED_ESPI_IC_VW_EVENT);
+   generic_handle_irq(irq);
+   }
+
+   if (sts & ESPI_INT_STS_OOB_BITS) {
+   irq = irq_find_mapping(espi_ic->irq_domain,
+  ASPEED_ESPI_IC_OOB_EVENT);
+   generic_handle_irq(irq);
+   }
+
+   if (sts & ESPI_INT_STS_FLASH_BITS) {
+   irq = irq_find_mapping(espi_ic->irq_domain,
+  ASPEED_ESPI_IC_FLASH_EVENT);
+   generic_handle_irq(irq);
+   }
+
+   if (sts & ESPI_INT_STS_HW_RST_DEASSERT) {
+   irq = irq_find_mapping(espi_ic->irq_domain,
+  ASPEED_ESPI_IC_CTRL_EVENT);
+   generic_handle_irq(irq);
+   }
+
+   chained_irq_exit(chip, desc);
+}
+
+static void aspeed_espi_ic_irq_disable(struct irq_data *data)
+{
+   struct aspeed_espi_ic *espi_ic = irq_data_get_irq_chip_data(data);
+
+   switch (data->hwirq) {
+   case ASPEED_ESPI_IC_CTRL_EVENT:
+   regmap_update_bits(espi_ic->map, ESPI_INT_EN,
+  ESPI_INT_EN_HW_RST_DEASSERT,
+  0);
+   break;
+   case ASPEED_ESPI_IC_PERIF_EVENT:
+   regmap_update_bits(espi_ic->map, ESPI_INT_EN,
+  ESPI_INT_EN_PERIF_BITS, 0);
+   break;
+   case ASPEED_ESPI_IC_VW_EVENT:
+   regmap_update_bits(espi_ic->map, ESPI_INT_EN,
+  ESPI_INT_EN_VW_BITS, 0);
+   

[PATCH 2/6] MAINTAINER: Add ASPEED eSPI driver entry

2021-01-05 Thread Chia-Wei, Wang
Add myself and Ryan Chen as maintainer of the Aspeed eSPI
driver and the associated eSPI interrupt controller.
Joel Stanley is also added as the reviewer.

Signed-off-by: Chia-Wei, Wang 
---
 MAINTAINERS | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7c1e45c416b1..d5f9205a5439 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1639,6 +1639,20 @@ F:   drivers/crypto/axis
 F: drivers/mmc/host/usdhi6rol0.c
 F: drivers/pinctrl/pinctrl-artpec*
 
+ARM/ASPEED ESPI DRIVER
+M: Chia-Wei Wang 
+M: Ryan Chen 
+R: Joel Stanley 
+L: linux-asp...@lists.ozlabs.org (moderated for non-subscribers)
+L: open...@lists.ozlabs.org (moderated for non-subscribers)
+S: Maintained
+F: Documentation/devicetree/bindings/soc/aspeed/espi.yaml
+F: drivers/irqchip/irq-aspeed-espi-ic.c
+F: drivers/soc/aspeed/aspeed-espi*
+F: include/dt-bindings/interrupt-controller/aspeed-espi-ic.h
+F: include/soc/aspeed/espi.h
+F: include/uapi/linux/aspeed-espi.h
+
 ARM/ASPEED I2C DRIVER
 M: Brendan Higgins 
 R: Benjamin Herrenschmidt 
-- 
2.17.1



Re: [PATCH -next] soundwire: intel: Use kzalloc for allocating only one thing

2021-01-05 Thread Vinod Koul
On 29-12-20, 21:50, Zheng Yongjun wrote:
> Use kzalloc rather than kcalloc(1,...)
> 
> The semantic patch that makes this change is as follows:
> (http://coccinelle.lip6.fr/)
> 
> // 
> @@
> @@
> 
> - kcalloc(1,
> + kzalloc(
>   ...)
> // 

Applied, thanks

-- 
~Vinod


Re: [PATCH v2 5/9] regmap: sdw: use _no_pm functions in regmap_read/write

2021-01-05 Thread Vinod Koul
HeY Mark,

On 09-12-20, 13:34, Bard Liao wrote:
> sdw_update_slave_status will be invoked when a codec is attached,
> and the codec driver will initialize the codec with regmap functions
> while the codec device is pm_runtime suspended.
> 
> regmap routines currently rely on regular SoundWire IO functions,
> which will call pm_runtime_get_sync()/put_autosuspend.
> 
> This causes a deadlock where the resume routine waits for an
> initialization complete signal that while the initialization complete
> can only be reached when the resume completes.
> 
> The only solution if we allow regmap functions to be used in resume
> operations as well as during codec initialization is to use _no_pm
> routines. The duty of making sure the bus is operational needs to be
> handled above the regmap level.

You okay these going thru sdw tree..?

> 
> Fixes: 7c22ce6e21840 ('regmap: Add SoundWire bus support')
> Signed-off-by: Bard Liao 
> ---
>  drivers/base/regmap/regmap-sdw.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/base/regmap/regmap-sdw.c 
> b/drivers/base/regmap/regmap-sdw.c
> index c92d614b4943..4b8d2d010cab 100644
> --- a/drivers/base/regmap/regmap-sdw.c
> +++ b/drivers/base/regmap/regmap-sdw.c
> @@ -11,7 +11,7 @@ static int regmap_sdw_write(void *context, unsigned int 
> reg, unsigned int val)
>   struct device *dev = context;
>   struct sdw_slave *slave = dev_to_sdw_dev(dev);
>  
> - return sdw_write(slave, reg, val);
> + return sdw_write_no_pm(slave, reg, val);
>  }
>  
>  static int regmap_sdw_read(void *context, unsigned int reg, unsigned int 
> *val)
> @@ -20,7 +20,7 @@ static int regmap_sdw_read(void *context, unsigned int reg, 
> unsigned int *val)
>   struct sdw_slave *slave = dev_to_sdw_dev(dev);
>   int read;
>  
> - read = sdw_read(slave, reg);
> + read = sdw_read_no_pm(slave, reg);
>   if (read < 0)
>   return read;
>  
> -- 
> 2.17.1

-- 
~Vinod


[PATCH v4 0/2] pinctrl: qcom: Add SM8350 pinctrl support

2021-01-05 Thread Vinod Koul
This add binding and driver for TLMM block found in SM8350 SoC

Changes since v2:
 - rename to qcom,sm8350-tlmm along with binding and driver structs
 - fix some nits in binding pointer by Rob

Raghavendra Rao Ananta (1):
  pinctrl: qcom: Add SM8350 pinctrl driver

Vinod Koul (1):
  dt-bindings: pinctrl: qcom: Add SM8350 pinctrl bindings

 .../bindings/pinctrl/qcom,sm8350-tlmm.yaml|  149 ++
 drivers/pinctrl/qcom/Kconfig  |9 +
 drivers/pinctrl/qcom/Makefile |1 +
 drivers/pinctrl/qcom/pinctrl-sm8350.c | 1649 +
 4 files changed, 1808 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml
 create mode 100644 drivers/pinctrl/qcom/pinctrl-sm8350.c

-- 
2.26.2



Re: [PATCH v2] Documentation/dax: Update description of DAX policy changing

2021-01-05 Thread Ira Weiny
On Wed, Jan 06, 2021 at 09:50:00AM +0800, Hao Li wrote:
> After commit 77573fa310d9 ("fs: Kill DCACHE_DONTCACHE dentry even if
> DCACHE_REFERENCED is set"), changes to DAX policy will take effect
> as soon as all references to this file are gone.
> 
> Update the documentation accordingly.
> 
> Signed-off-by: Hao Li 

LGTM

Reviewed-by: Ira Weiny 

> ---
> Changes in v2:
>   * simplify sentences and fix style problems.
> 
>  Documentation/filesystems/dax.txt | 17 +++--
>  1 file changed, 3 insertions(+), 14 deletions(-)
> 
> diff --git a/Documentation/filesystems/dax.txt 
> b/Documentation/filesystems/dax.txt
> index 8fdb78f3c6c9..e03c20564f3a 100644
> --- a/Documentation/filesystems/dax.txt
> +++ b/Documentation/filesystems/dax.txt
> @@ -83,20 +83,9 @@ Summary
> directories.  This has runtime constraints and limitations that are
> described in 6) below.
>  
> - 6. When changing the S_DAX policy via toggling the persistent FS_XFLAG_DAX 
> flag,
> -the change in behaviour for existing regular files may not occur
> -immediately.  If the change must take effect immediately, the 
> administrator
> -needs to:
> -
> -a) stop the application so there are no active references to the data set
> -   the policy change will affect
> -
> -b) evict the data set from kernel caches so it will be re-instantiated 
> when
> -   the application is restarted. This can be achieved by:
> -
> -   i. drop-caches
> -   ii. a filesystem unmount and mount cycle
> -   iii. a system reboot
> + 6. When changing the S_DAX policy via toggling the persistent FS_XFLAG_DAX
> +flag, the change to existing regular files won't take effect until the
> +files are closed by all processes.
>  
>  
>  Details
> -- 
> 2.29.2
> 
> 
> 


Re: [RFC PATCH v2 2/4] KVM: arm64: GICv4.1: Try to save hw pending state in save_pending_tables

2021-01-05 Thread Shenming Lu
On 2021/1/5 19:40, Marc Zyngier wrote:
> On 2021-01-05 09:13, Marc Zyngier wrote:
>> On 2021-01-04 08:16, Shenming Lu wrote:
>>> After pausing all vCPUs and devices capable of interrupting, in order
>>> to save the information of all interrupts, besides flushing the pending
>>> states in kvm’s vgic, we also try to flush the states of VLPIs in the
>>> virtual pending tables into guest RAM, but we need to have GICv4.1 and
>>> safely unmap the vPEs first.
>>>
>>> Signed-off-by: Shenming Lu 
>>> ---
>>>  arch/arm64/kvm/vgic/vgic-v3.c | 58 +++
>>>  1 file changed, 52 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/arch/arm64/kvm/vgic/vgic-v3.c b/arch/arm64/kvm/vgic/vgic-v3.c
>>> index 9cdf39a94a63..a58c94127cb0 100644
>>> --- a/arch/arm64/kvm/vgic/vgic-v3.c
>>> +++ b/arch/arm64/kvm/vgic/vgic-v3.c
>>> @@ -1,6 +1,8 @@
>>>  // SPDX-License-Identifier: GPL-2.0-only
>>>
>>>  #include 
>>> +#include 
>>> +#include 
>>>  #include 
>>>  #include 
>>>  #include 
>>> @@ -356,6 +358,38 @@ int vgic_v3_lpi_sync_pending_status(struct kvm
>>> *kvm, struct vgic_irq *irq)
>>>  return 0;
>>>  }
>>>
>>> +/*
>>> + * The deactivation of the doorbell interrupt will trigger the
>>> + * unmapping of the associated vPE.
>>> + */
>>> +static void unmap_all_vpes(struct vgic_dist *dist)
>>> +{
>>> +    struct irq_desc *desc;
>>> +    int i;
>>> +
>>> +    if (!kvm_vgic_global_state.has_gicv4_1)
>>> +    return;
>>> +
>>> +    for (i = 0; i < dist->its_vm.nr_vpes; i++) {
>>> +    desc = irq_to_desc(dist->its_vm.vpes[i]->irq);
>>> +    irq_domain_deactivate_irq(irq_desc_get_irq_data(desc));
>>> +    }
>>> +}
>>> +
>>> +static void map_all_vpes(struct vgic_dist *dist)
>>> +{
>>> +    struct irq_desc *desc;
>>> +    int i;
>>> +
>>> +    if (!kvm_vgic_global_state.has_gicv4_1)
>>> +    return;
>>> +
>>> +    for (i = 0; i < dist->its_vm.nr_vpes; i++) {
>>> +    desc = irq_to_desc(dist->its_vm.vpes[i]->irq);
>>> +    irq_domain_activate_irq(irq_desc_get_irq_data(desc), false);
>>> +    }
>>> +}
>>> +
>>>  /**
>>>   * vgic_v3_save_pending_tables - Save the pending tables into guest RAM
>>>   * kvm lock and all vcpu lock must be held
>>> @@ -365,14 +399,18 @@ int vgic_v3_save_pending_tables(struct kvm *kvm)
>>>  struct vgic_dist *dist = >arch.vgic;
>>>  struct vgic_irq *irq;
>>>  gpa_t last_ptr = ~(gpa_t)0;
>>> -    int ret;
>>> +    int ret = 0;
>>>  u8 val;
>>>
>>> +    /* As a preparation for getting any VLPI states. */
>>> +    unmap_all_vpes(dist);
>>
>> What if the VPEs are not mapped yet? Is it possible to snapshot a VM
>> that has not run at all?
> 
> More questions: what happens to vSGIs that were mapped to the VPEs?
> Can they safely be restarted? The spec is not saying much on the subject.

Since we have already paused all vCPUs, there would be no more vSGIs generated,
and also no vSGI would be delivered to the vPE. And the unmapping of the
vPE would not affect the (already) stored vSGI states... I think they could
be safely restarted.

> 
> Once the unmap has taken place, it won't be possible to read their state
> via GICR_VSGIRPEND, and only the memory state can be used. This probably
> needs to be tracked as well.

Yes, since we will map the vPEs back, could we assume that the saving of the
vLPI and vSGI states happen serially? In fact that's what QEMU does.

> 
> Thanks,
> 
>     M.


[PATCH v4 1/2] dt-bindings: pinctrl: qcom: Add SM8350 pinctrl bindings

2021-01-05 Thread Vinod Koul
Add device tree binding Documentation details for Qualcomm SM8350
pinctrl driver.

Signed-off-by: Vinod Koul 
---
 .../bindings/pinctrl/qcom,sm8350-tlmm.yaml| 149 ++
 1 file changed, 149 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml 
b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml
new file mode 100644
index ..abdafd25bfc2
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml
@@ -0,0 +1,149 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/qcom,sm8350-tlmm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. SM8350 TLMM block
+
+maintainers:
+  - Vinod Koul 
+
+description: |
+  This binding describes the Top Level Mode Multiplexer block found in the
+  SM8350 platform.
+
+properties:
+  compatible:
+const: qcom,sm8350-tlmm
+
+  reg:
+maxItems: 1
+
+  interrupts:
+maxItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+description: Specifies the PIN numbers and Flags, as defined in
+  include/dt-bindings/interrupt-controller/irq.h
+const: 2
+
+  gpio-controller: true
+
+  '#gpio-cells':
+description: Specifying the pin number and flags, as defined in
+  include/dt-bindings/gpio/gpio.h
+const: 2
+
+  gpio-ranges:
+maxItems: 1
+
+  gpio-reserved-ranges:
+maxItems: 1
+
+#PIN CONFIGURATION NODES
+patternProperties:
+  '-pinmux$':
+type: object
+description:
+  Pinctrl node's client devices use subnodes for desired pin configuration.
+  Client device subnodes use below standard properties.
+$ref: "/schemas/pinctrl/pincfg-node.yaml"
+
+properties:
+  pins:
+description:
+  List of gpio pins affected by the properties specified in this 
subnode.
+items:
+  oneOf:
+- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$"
+- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, 
sdc2_data ]
+minItems: 1
+maxItems: 36
+
+  function:
+description:
+  Specify the alternative function to be configured for the specified
+  pins. Functions are only valid for gpio pins.
+enum: [ atest_char, atest_usb, audio_ref, cam_mclk, cci_async,
+cci_i2c, cci_timer, cmu_rng, coex_uart1, coex_uart2, cri_trng,
+cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,
+ddr_pxi2, ddr_pxi3, dp_hot, dp_lcd, gcc_gp1, gcc_gp2, gcc_gp3,
+gpio, ibi_i3c, jitter_bist, lpass_slimbus, mdp_vsync, 
mdp_vsync0,
+mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s0_data0, mi2s0_data1,
+mi2s0_sck, mi2s0_ws, mi2s1_data0, mi2s1_data1, mi2s1_sck,
+mi2s1_ws, mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws,
+mss_grfc0, mss_grfc1, mss_grfc10, mss_grfc11, mss_grfc12,
+mss_grfc2, mss_grfc3, mss_grfc4, mss_grfc5, mss_grfc6,
+mss_grfc7, mss_grfc8, mss_grfc9, nav_gpio, pa_indicator,
+pcie0_clkreqn, pcie1_clkreqn, phase_flag, pll_bist, pll_clk,
+pri_mi2s, prng_rosc, qdss_cti, qdss_gpio, qlink0_enable,
+qlink0_request, qlink0_wmss, qlink1_enable, qlink1_request,
+qlink1_wmss, qlink2_enable, qlink2_request, qlink2_wmss, qspi0,
+qspi1, qspi2, qspi3, qspi_clk, qspi_cs, qup0, qup1, qup10,
+qup11, qup12, qup13, qup14, qup15, qup16, qup17, qup18, qup19,
+qup2, qup3, qup4, qup5, qup6, qup7, qup8, qup9, qup_l4, qup_l5,
+qup_l6, sd_write, sdc40, sdc41, sdc42, sdc43, sdc4_clk,
+sdc4_cmd, sec_mi2s, tb_trig, tgu_ch0, tgu_ch1, tgu_ch2,
+tgu_ch3, tsense_pwm1, tsense_pwm2, uim0_clk, uim0_data,
+uim0_present, uim0_reset, uim1_clk, uim1_data, uim1_present,
+uim1_reset, usb2phy_ac, usb_phy, vfr_0, vfr_1, vsense_trigger ]
+
+
+  drive-strength:
+enum: [2, 4, 6, 8, 10, 12, 14, 16]
+default: 2
+description:
+  Selects the drive strength for the specified pins, in mA.
+
+  bias-pull-down: true
+
+  bias-pull-up: true
+
+  bias-disable: true
+
+  output-high: true
+
+  output-low: true
+
+required:
+  - pins
+  - function
+
+additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-controller
+  - '#interrupt-cells'
+  - gpio-controller
+  - '#gpio-cells'
+  - gpio-ranges
+
+additionalProperties: false
+
+examples:
+  - |
+#include 
+tlmm: pinctrl@f00 {
+  compatible = "qcom,sm8350-tlmm";
+  reg = <0x0f10 0x30>;
+  interrupts = ;
+  gpio-controller;
+  

arch/arm64/kernel/topology.c:367:22: sparse: sparse: dereference of noderef expression

2021-01-05 Thread kernel test robot
tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
master
head:   e71ba9452f0b5b2e8dc8aa5445198cd9214a6a62
commit: 68c5debcc06d6d24f15dbf978780fc5efc147d5e arm64: implement CPPC FFH 
support using AMUs
date:   8 weeks ago
config: arm64-randconfig-s032-20210106 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-208-g46a52ca4-dirty
# 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=68c5debcc06d6d24f15dbf978780fc5efc147d5e
git remote add linus 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 68c5debcc06d6d24f15dbf978780fc5efc147d5e
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 


"sparse warnings: (new ones prefixed by >>)"
>> arch/arm64/kernel/topology.c:367:22: sparse: sparse: dereference of noderef 
>> expression

vim +367 arch/arm64/kernel/topology.c

   362  
   363  int cpc_read_ffh(int cpu, struct cpc_reg *reg, u64 *val)
   364  {
   365  int ret = -EOPNOTSUPP;
   366  
 > 367  switch ((u64)reg->address) {
   368  case 0x0:
   369  ret = counters_read_on_cpu(cpu, cpu_read_corecnt, val);
   370  break;
   371  case 0x1:
   372  ret = counters_read_on_cpu(cpu, cpu_read_constcnt, val);
   373  break;
   374  }
   375  
   376  if (!ret) {
   377  *val &= GENMASK_ULL(reg->bit_offset + reg->bit_width - 
1,
   378  reg->bit_offset);
   379  *val >>= reg->bit_offset;
   380  }
   381  
   382  return ret;
   383  }
   384  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


.config.gz
Description: application/gzip


[PATCH v4 2/2] pinctrl: qcom: Add SM8350 pinctrl driver

2021-01-05 Thread Vinod Koul
From: Raghavendra Rao Ananta 

This adds pincontrol driver for tlmm block found in SM8350 SoC

Signed-off-by: Raghavendra Rao Ananta 
Signed-off-by: Jeevan Shriram 
[vkoul: rebase and tidy up for upstream]
Signed-off-by: Vinod Koul 
---
 drivers/pinctrl/qcom/Kconfig  |9 +
 drivers/pinctrl/qcom/Makefile |1 +
 drivers/pinctrl/qcom/pinctrl-sm8350.c | 1649 +
 3 files changed, 1659 insertions(+)
 create mode 100644 drivers/pinctrl/qcom/pinctrl-sm8350.c

diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index a003776506d0..8f07f54c027e 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -265,6 +265,15 @@ config PINCTRL_SM8250
  Qualcomm Technologies Inc TLMM block found on the Qualcomm
  Technologies Inc SM8250 platform.
 
+config PINCTRL_SM8350
+   tristate "Qualcomm Technologies Inc SM8350 pin controller driver"
+   depends on GPIOLIB && OF
+   select PINCTRL_MSM
+   help
+ This is the pinctrl, pinmux, pinconf and gpiolib driver for the
+ Qualcomm Technologies Inc TLMM block found on the Qualcomm
+ Technologies Inc SM8350 platform.
+
 config PINCTRL_LPASS_LPI
tristate "Qualcomm Technologies Inc LPASS LPI pin controller driver"
select PINMUX
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
index 91875a3f5ac4..fe0060b87ce5 100644
--- a/drivers/pinctrl/qcom/Makefile
+++ b/drivers/pinctrl/qcom/Makefile
@@ -31,4 +31,5 @@ obj-$(CONFIG_PINCTRL_SDM845) += pinctrl-sdm845.o
 obj-$(CONFIG_PINCTRL_SDX55) += pinctrl-sdx55.o
 obj-$(CONFIG_PINCTRL_SM8150) += pinctrl-sm8150.o
 obj-$(CONFIG_PINCTRL_SM8250) += pinctrl-sm8250.o
+obj-$(CONFIG_PINCTRL_SM8350) += pinctrl-sm8350.o
 obj-$(CONFIG_PINCTRL_LPASS_LPI) += pinctrl-lpass-lpi.o
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8350.c 
b/drivers/pinctrl/qcom/pinctrl-sm8350.c
new file mode 100644
index ..a406ed0ec7d3
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sm8350.c
@@ -0,0 +1,1649 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2020-2021, Linaro Limited
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "pinctrl-msm.h"
+
+#define FUNCTION(fname)\
+   [msm_mux_##fname] = {   \
+   .name = #fname, \
+   .groups = fname##_groups,   \
+   .ngroups = ARRAY_SIZE(fname##_groups),  \
+   }
+
+#define REG_SIZE 0x1000
+
+#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
+   {   \
+   .name = "gpio" #id, \
+   .pins = gpio##id##_pins,\
+   .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
+   .funcs = (int[]){   \
+   msm_mux_gpio, /* gpio mode */   \
+   msm_mux_##f1,   \
+   msm_mux_##f2,   \
+   msm_mux_##f3,   \
+   msm_mux_##f4,   \
+   msm_mux_##f5,   \
+   msm_mux_##f6,   \
+   msm_mux_##f7,   \
+   msm_mux_##f8,   \
+   msm_mux_##f9\
+   },  \
+   .nfuncs = 10,   \
+   .ctl_reg = REG_SIZE * id,   \
+   .io_reg = REG_SIZE * id + 0x4,  \
+   .intr_cfg_reg = REG_SIZE * id + 0x8,\
+   .intr_status_reg = REG_SIZE * id + 0xc, \
+   .intr_target_reg = REG_SIZE * id + 0x8, \
+   .mux_bit = 2,   \
+   .pull_bit = 0,  \
+   .drv_bit = 6,   \
+   .oe_bit = 9,\
+   .in_bit = 0,\
+   .out_bit = 1,   \
+   .intr_enable_bit = 0,   \
+   .intr_status_bit = 0,   \
+   .intr_target_bit = 5,   \
+   .intr_target_kpss_val = 3,  \
+   .intr_raw_status_bit = 4,   \
+   .intr_polarity_bit = 1, \
+   .intr_detection_bit = 2,\
+   .intr_detection_width = 2,  \
+   }
+
+#define SDC_PINGROUP(pg_name, ctl, pull, drv)  \
+   {   \
+   .name = #pg_name,   \
+   .pins = pg_name##_pins, \
+   .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),  \

Re: [PATCH v7 1/5] counter: Internalize sysfs interface code

2021-01-05 Thread William Breathitt Gray
On Wed, Dec 30, 2020 at 05:24:34PM -0600, David Lechner wrote:
> On 12/25/20 6:15 PM, William Breathitt Gray wrote:
> 
> > diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c
> > index a60aee1a1a29..6c058b93dc98 100644
> > --- a/drivers/counter/ti-eqep.c
> > +++ b/drivers/counter/ti-eqep.c
> 
> 
> > -static ssize_t ti_eqep_position_floor_write(struct counter_device *counter,
> > -   struct counter_count *count,
> > -   void *ext_priv, const char *buf,
> > -   size_t len)
> > +static int ti_eqep_position_floor_write(struct counter_device *counter,
> > +   struct counter_count *count, u64 floor)
> >   {
> > struct ti_eqep_cnt *priv = counter->priv;
> > -   int err;
> > -   u32 res;
> >   
> > -   err = kstrtouint(buf, 0, );
> > -   if (err < 0)
> > -   return err;
> > +   if (floor != (u32)floor)
> > +   return -ERANGE;
> >   
> > -   regmap_write(priv->regmap32, QPOSINIT, res);
> > +   regmap_write(priv->regmap32, QPOSINIT, floor);
> >   
> > -   return len;
> > +   return 0;
> >   }
> 
> This will conflict with 2ba7b50893de "counter:ti-eqep: remove floor"
> (in Jonathan's fixes-togreg branch) which removes these functions.

Ack, I'll rebase and remove these changes.

William Breathitt Gray


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