Re: [PATCH v2] ARM: dts: sun5i: Add dts for inet86v_rev2
On Wed, Feb 03, 2021 at 10:21:03AM +0100, Maxime Ripard wrote:
> On Mon, Feb 01, 2021 at 06:18:18PM +0100, agriveaux wrote:
> > On Thu, Jan 28, 2021 at 06:23:29PM +0100, Maxime Ripard wrote:
> > > Hi,
> > Hi,
Hello,
> > >
> > > On Sun, Jan 24, 2021 at 08:39:03PM +0100, Alexandre GRIVEAUX wrote:
> > > > Add Inet 86V Rev 2 support, based upon Inet 86VS.
> > > >
> > > > The Inet 86V use SL1536 touchpanel controller, the Inet 86VS a GSL1680,
> > > > which make them both incompatible.
> > > >
> > > > Missing things:
> > > > - Accelerometer (MXC6225X)
> > > > - Touchpanel (Sitronix SL1536)
> > > > - Nand (29F32G08CBACA)
> > > > - Camera (HCWY0308)
> > > >
> > > > Signed-off-by: Alexandre GRIVEAUX
> > > > ---
> > > > arch/arm/boot/dts/sun5i-a13-inet-86v-rev2.dts | 17 +
> > >
> > > You have to add it to the Makefile
> > >
> > Ok.
> > > > 1 file changed, 17 insertions(+)
> > > > create mode 100644 arch/arm/boot/dts/sun5i-a13-inet-86v-rev2.dts
> > > >
> > > > diff --git a/arch/arm/boot/dts/sun5i-a13-inet-86v-rev2.dts
> > > > b/arch/arm/boot/dts/sun5i-a13-inet-86v-rev2.dts
> > > > new file mode 100644
> > > > index ..581083e932d8
> > > > --- /dev/null
> > > > +++ b/arch/arm/boot/dts/sun5i-a13-inet-86v-rev2.dts
> > > > @@ -0,0 +1,17 @@
> > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > +/*
> > > > + * Copyright 2021 Alexandre Griveaux
> > > > + *
> > > > + * Minimal dts file for the iNet 86V
> > > > + */
> > > > +
> > > > +/dts-v1/;
> > > > +
> > > > +#include "sun5i-a13.dtsi"
> > > > +#include "sun5i-reference-design-tablet.dtsi"
> > > > +
> > > > +/ {
> > > > + model = "iNET 86V Rev 02";
> > > > + compatible = "inet,86v-rev2", "allwinner,sun5i-a13";
> > >
> > > inet should be documented in the vendor prefixes, and that compatible
> > > should be documented in Documentation/devicetree/bindings/arm/sunxi.yaml
> > >
> >
> > I forgot, but should be:
> >
> > - description: iNet-86V Rev 02
> > items:
> > - const: primux,inet86v-rev2
> > - const: allwinner,sun5i-a13
> >
> > > Having the first rev compatible would be good too
> >
> > Unfortunatly, I didn't find inet86v rev1 on FCC website and on
> > linux-sunxi.
> >
> > >
> > > > +
> > > > +};
> > >
> > > But I'm wondering. If there's nothing here to add, why would we need
> > > that DT in the first place?
> > >
> > I prefer to add often instead of bulk adding, and to show there are some
> > board to add missing things like those above.
>
> Yeah, I get that, but the point really is that you're not really adding
> anything here except an empty device tree.
>
> Maxime
In this case, I keep this patch to send it when I have more to add .
Thanks.
[PATCH v2] ARM: dts: sun5i: Add dts for inet86v_rev2
Add Inet 86V Rev 2 support, based upon Inet 86VS.
The Inet 86V use SL1536 touchpanel controller, the Inet 86VS a GSL1680,
which make them both incompatible.
Missing things:
- Accelerometer (MXC6225X)
- Touchpanel (Sitronix SL1536)
- Nand (29F32G08CBACA)
- Camera (HCWY0308)
Signed-off-by: Alexandre GRIVEAUX
---
arch/arm/boot/dts/sun5i-a13-inet-86v-rev2.dts | 17 +
1 file changed, 17 insertions(+)
create mode 100644 arch/arm/boot/dts/sun5i-a13-inet-86v-rev2.dts
diff --git a/arch/arm/boot/dts/sun5i-a13-inet-86v-rev2.dts
b/arch/arm/boot/dts/sun5i-a13-inet-86v-rev2.dts
new file mode 100644
index ..581083e932d8
--- /dev/null
+++ b/arch/arm/boot/dts/sun5i-a13-inet-86v-rev2.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 Alexandre Griveaux
+ *
+ * Minimal dts file for the iNet 86V
+ */
+
+/dts-v1/;
+
+#include "sun5i-a13.dtsi"
+#include "sun5i-reference-design-tablet.dtsi"
+
+/ {
+ model = "iNET 86V Rev 02";
+ compatible = "inet,86v-rev2", "allwinner,sun5i-a13";
+
+};
--
2.20.1
Re: [PATCH] MIPS: CI20: DTS: Correcting IW8103 Wifi binding
Le 06/07/2020 à 13:15, H. Nikolaus Schaller a écrit :
> Hi Alexandre,
>
>> Am 05.07.2020 um 12:32 schrieb agrive...@deutnet.info:
>>
>> From: Alexandre GRIVEAUX
>>
>> Use brcm,bcm4329-fmac instead of brcm,bcm4330-fmac.
>>
>> Signed-off-by: Alexandre GRIVEAUX
>> ---
>> arch/mips/boot/dts/ingenic/ci20.dts | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
>> b/arch/mips/boot/dts/ingenic/ci20.dts
>> index 75f5bfbf2c37..82a1f126b778 100644
>> --- a/arch/mips/boot/dts/ingenic/ci20.dts
>> +++ b/arch/mips/boot/dts/ingenic/ci20.dts
>> @@ -116,8 +116,8 @@
>> pinctrl-0 = <&pins_mmc1>;
>>
>> brcmf: wifi@1 {
>> -/* reg = <4>;*/
>> -compatible = "brcm,bcm4330-fmac";
>> +reg = <1>;
>> +compatible = "brcm,bcm4329-fmac";
>> vcc-supply = <&wlan0_power>;
>> device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
>> shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
> Do you have it working with a v5.8 kernel?
>
> I don't see any activity to detect the module or load firmware.
>
> Does it rely on some other patch?
>
> BR and thanks,
> Nikolaus
>
Hi Nikolaus
At this time the patch have been only "tested" for error will doing make:
make ARCH=mips CROSS_COMPILE=mipsel-linux-gnu- olddefconfig && make
ARCH=mips CROSS_COMPILE=mipsel-linux-gnu- -j8 && make ARCH=mips
CROSS_COMPILE=mipsel-linux-gnu- -j8 uImage
The .config come from creator-ci20 kernel 'config-3.18.3-ci20-1'
Even with the right DT
(Documentation/devicetree/bindings/net/wireless/brcm,bcm43xx-fmac.txt)
it's need some config with brcm enabled I gess.
I need to do some investigation will trying the uImage this week,
unfortunaly kernel developpement is not my main work, it's a hobby.
Thanks.
Re: [PATCH v2 5/5] MIPS: JZ4780: DTS: Add CPU nodes
Hi Paul and other. > Hi Alexandre, > This should probably be something like ingenic,xburst2. JZ4780 is the > SoC. It also should be a documented binding, but I think it would be > worth holding off on the whole thing until we actually get SMP support > merged - just in case we come up with a binding that doesn't actually > work out. > > So I expect I'll just apply patches 1-4 for now. > > Thanks for working on it! I holding the CPU patch at this time for more work later, I would like to upstream some patchs from this repository: https://github.com/MIPS/CI20_linux.git How i can do that and keep the contributors history ? Thanks for the help. Ps: I try to unban my e-mail server from office365...
[PATCH v2 5/5] MIPS: JZ4780: DTS: Add CPU nodes
The JZ4780 have 2 core, adding to DT.
Signed-off-by: Alexandre GRIVEAUX
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index f928329b034b..9c7346724f1f 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -7,6 +7,23 @@
#size-cells = <1>;
compatible = "ingenic,jz4780";
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "ingenic,jz4780";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "ingenic,jz4780";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
cpuintc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
--
2.20.1
[PATCH v2 4/5] MIPS: CI20: DTS: Add Leds
Adding leds and related triggers.
Signed-off-by: Alexandre GRIVEAUX
---
arch/mips/boot/dts/ingenic/ci20.dts | 28
1 file changed, 28 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
b/arch/mips/boot/dts/ingenic/ci20.dts
index c62c36ae94c2..37b93166bf22 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -25,6 +25,34 @@
0x3000 0x3000>;
};
+ leds {
+ compatible = "gpio-leds";
+
+ led0 {
+ label = "ci20:red:led0";
+ gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ };
+
+ led1 {
+ label = "ci20:red:led1";
+ gpios = <&gpc 2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "nand-disk";
+ };
+
+ led2 {
+ label = "ci20:red:led2";
+ gpios = <&gpc 1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "cpu1";
+ };
+
+ led3 {
+ label = "ci20:red:led3";
+ gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "cpu0";
+ };
+ };
+
eth0_power: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "eth0_power";
--
2.20.1
[PATCH v2 2/5] MIPS: CI20: DTS: Add I2C nodes
Adding missing I2C nodes and some peripheral:
- PMU
- RTC
Signed-off-by: Alexandre GRIVEAUX
---
arch/mips/boot/dts/ingenic/ci20.dts | 147
1 file changed, 147 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
b/arch/mips/boot/dts/ingenic/ci20.dts
index 2e9952311ecd..4a77fa30a9cd 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -87,6 +87,123 @@
pinctrl-0 = <&pins_uart4>;
};
+&i2c0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c0>;
+
+ clock-frequency = <40>;
+
+ act8600: act8600@5a {
+ compatible = "active-semi,act8600";
+ reg = <0x5a>;
+ status = "okay";
+
+ regulators {
+ vddcore: SUDCDC1 {
+ regulator-name = "VDDCORE";
+ regulator-min-microvolt = <110>;
+ regulator-max-microvolt = <110>;
+ regulator-always-on;
+ };
+ vddmem: SUDCDC2 {
+ regulator-name = "VDDMEM";
+ regulator-min-microvolt = <150>;
+ regulator-max-microvolt = <150>;
+ regulator-always-on;
+ };
+ vcc_33: SUDCDC3 {
+ regulator-name = "VCC33";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-always-on;
+ };
+ vcc_50: SUDCDC4 {
+ regulator-name = "VCC50";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ };
+ vcc_25: LDO_REG5 {
+ regulator-name = "VCC25";
+ regulator-min-microvolt = <250>;
+ regulator-max-microvolt = <250>;
+ regulator-always-on;
+ };
+ wifi_io: LDO_REG6 {
+ regulator-name = "WIFIIO";
+ regulator-min-microvolt = <250>;
+ regulator-max-microvolt = <250>;
+ regulator-always-on;
+ };
+ vcc_28: LDO_REG7 {
+ regulator-name = "VCC28";
+ regulator-min-microvolt = <280>;
+ regulator-max-microvolt = <280>;
+ regulator-always-on;
+ };
+ vcc_15: LDO_REG8 {
+ regulator-name = "VCC15";
+ regulator-min-microvolt = <150>;
+ regulator-max-microvolt = <150>;
+ regulator-always-on;
+ };
+ vcc_18: LDO_REG9 {
+ regulator-name = "VCC18";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ };
+ vcc_11: LDO_REG10 {
+ regulator-name = "VCC11";
+ regulator-min-microvolt = <110>;
+ regulator-max-microvolt = <110>;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c1>;
+
+};
+
+&i2c2 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c2>;
+
+};
+
+&i2c3 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c3>;
+
+};
+
+&i2c4 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c4>;
+
+ clock-frequency = <40>;
+
+ rtc@51 {
+
[PATCH v2 3/5] MIPS: CI20: DTS: Add IW8103 Wifi + bluetooth
Add IW8103 Wifi + bluetooth module to device tree and related power domain.
Signed-off-by: Alexandre GRIVEAUX
---
arch/mips/boot/dts/ingenic/ci20.dts | 39 +
1 file changed, 39 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
b/arch/mips/boot/dts/ingenic/ci20.dts
index 4a77fa30a9cd..c62c36ae94c2 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -31,6 +31,13 @@
gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
enable-active-high;
};
+
+ wlan0_power: fixedregulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan0_power";
+ gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
};
&ext {
@@ -54,9 +61,18 @@
bus-width = <4>;
max-frequency = <5000>;
+ non-removable;
pinctrl-names = "default";
pinctrl-0 = <&pins_mmc1>;
+
+ brcmf: wifi@1 {
+/* reg = <4>;*/
+ compatible = "brcm,bcm4330-fmac";
+ vcc-supply = <&wlan0_power>;
+ device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
+ };
};
&uart0 {
@@ -73,6 +89,23 @@
pinctrl-0 = <&pins_uart1>;
};
+&uart2 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_uart2>;
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
+ vcc-supply = <&wlan0_power>;
+ device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
+ };
+};
+
&uart3 {
status = "okay";
@@ -314,6 +347,12 @@
bias-disable;
};
+ pins_uart2: uart2 {
+ function = "uart2";
+ groups = "uart2-data", "uart2-hwflow";
+ bias-disable;
+ };
+
pins_uart3: uart3 {
function = "uart3";
groups = "uart3-data", "uart3-hwflow";
--
2.20.1
[PATCH v2 1/5] MIPS: JZ4780: DTS: Add I2C nodes
Add the devicetree nodes for the I2C core of the JZ4780 SoC, disabled
by default.
Signed-off-by: Alexandre GRIVEAUX
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 86 ++
1 file changed, 86 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index c54bd7cfec55..f928329b034b 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -262,6 +262,92 @@
status = "disabled";
};
+ i2c0: i2c@1005 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <0x1005 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <60>;
+
+ clocks = <&cgu JZ4780_CLK_SMB0>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c0_data>;
+
+ status = "disabled";
+ };
+
+ i2c1: i2c@10051000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10051000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <59>;
+
+ clocks = <&cgu JZ4780_CLK_SMB1>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c1_data>;
+
+ status = "disabled";
+ };
+
+ i2c2: i2c@10052000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10052000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <58>;
+
+ clocks = <&cgu JZ4780_CLK_SMB2>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c2_data>;
+
+ status = "disabled";
+ };
+
+ i2c3: i2c@10053000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10053000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <57>;
+
+ clocks = <&cgu JZ4780_CLK_SMB3>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c3_data>;
+
+ status = "disabled";
+ };
+
+ i2c4: i2c@10054000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10054000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <56>;
+
+ clocks = <&cgu JZ4780_CLK_SMB4>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c4_data>;
+
+ status = "disabled";
+ };
+
watchdog: watchdog@10002000 {
compatible = "ingenic,jz4780-watchdog";
reg = <0x10002000 0x10>;
--
2.20.1
[PATCH v2 0/5] MIPS: CI20: DTS: Add nodes to Creator CI20 board
Attemping to make my CI20 more usefull than a paperweight, I add nodes to Devicetree, at this time: - Add I2C node PMU and RTC. - The IW8103 need some work to stay alive because power seem to turn off. - The leds patch lack of correct option in ci20_defconfig. - The Cpu patch isn't usefull without SMP support of jz4780. Alexandre GRIVEAUX (5): MIPS: JZ4780: DTS: Add I2C nodes MIPS: CI20: DTS: Add I2C nodes MIPS: CI20: DTS: Add IW8103 Wifi + bluetooth MIPS: CI20: DTS: Add Leds MIPS: JZ4780: DTS: Add CPU nodes v2 adding previous sended patch: JZ4780: DTS: Add I2C nodes arch/mips/boot/dts/ingenic/ci20.dts| 214 + arch/mips/boot/dts/ingenic/jz4780.dtsi | 103 2 files changed, 317 insertions(+) base-commit: 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c -- 2.20.1
Re: [PATCH 1/4] MIPS: CI20: DTS: Add I2C nodes
Hello, > Hi Alexandre, > > Thank you for the patch! Yet something to improve: > > [auto build test ERROR on linus/master] > [cannot apply to v5.3 next-20190920] > [if your patch is applied to the wrong git tree, please drop us a note to help > improve the system. BTW, we also suggest to use '--base' option to specify the > base tree in git format-patch, please see > https://stackoverflow.com/a/37406982] > > url: > https://github.com/0day-ci/linux/commits/Alexandre-GRIVEAUX/MIPS-CI20-DTS-Add-nodes-to-Creator-CI20-board/20190923-041656 > config: mips-allmodconfig (attached as .config) > compiler: mips-linux-gcc (GCC) 7.4.0 > reproduce: > wget > https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O > ~/bin/make.cross > chmod +x ~/bin/make.cross > # save the attached .config to linux build tree > GCC_VERSION=7.4.0 make.cross ARCH=mips > > If you fix the issue, kindly add following tag > Reported-by: kbuild test robot > > All errors (new ones prefixed by >>): > >>> Error: arch/mips/boot/dts/ingenic/ci20.dts:90.1-6 Label or path i2c0 not >>> found >>> Error: arch/mips/boot/dts/ingenic/ci20.dts:168.1-6 Label or path i2c1 not >>> found >>> Error: arch/mips/boot/dts/ingenic/ci20.dts:176.1-6 Label or path i2c2 not >>> found >>> Error: arch/mips/boot/dts/ingenic/ci20.dts:184.1-6 Label or path i2c3 not >>> found >>> Error: arch/mips/boot/dts/ingenic/ci20.dts:192.1-6 Label or path i2c4 not >>> found >FATAL ERROR: Syntax error parsing input tree > > --- > 0-DAY kernel test infrastructureOpen Source Technology Center > https://lists.01.org/pipermail/kbuild-all Intel Corporation Do I need to add the patch "[PATCHv4] MIPS: JZ4780: DTS: Add I2C nodes" to the begin of this patchset ? Thanks.
[PATCH 4/4] MIPS: JZ4780: DTS: Add CPU nodes
The JZ4780 have 2 core, adding to DT.
Signed-off-by: Alexandre GRIVEAUX
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index f928329b034b..9c7346724f1f 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -7,6 +7,23 @@
#size-cells = <1>;
compatible = "ingenic,jz4780";
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "ingenic,jz4780";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "ingenic,jz4780";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
cpuintc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
--
2.20.1
[PATCH 3/4] MIPS: CI20: DTS: Add Leds
Adding leds and related triggers.
Signed-off-by: Alexandre GRIVEAUX
---
arch/mips/boot/dts/ingenic/ci20.dts | 28
1 file changed, 28 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
b/arch/mips/boot/dts/ingenic/ci20.dts
index c62c36ae94c2..37b93166bf22 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -25,6 +25,34 @@
0x3000 0x3000>;
};
+ leds {
+ compatible = "gpio-leds";
+
+ led0 {
+ label = "ci20:red:led0";
+ gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ };
+
+ led1 {
+ label = "ci20:red:led1";
+ gpios = <&gpc 2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "nand-disk";
+ };
+
+ led2 {
+ label = "ci20:red:led2";
+ gpios = <&gpc 1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "cpu1";
+ };
+
+ led3 {
+ label = "ci20:red:led3";
+ gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "cpu0";
+ };
+ };
+
eth0_power: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "eth0_power";
--
2.20.1
[PATCH 2/4] MIPS: CI20: DTS: Add IW8103 Wifi + bluetooth
Add IW8103 Wifi + bluetooth module to device tree and related power domain.
Signed-off-by: Alexandre GRIVEAUX
---
arch/mips/boot/dts/ingenic/ci20.dts | 39 +
1 file changed, 39 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
b/arch/mips/boot/dts/ingenic/ci20.dts
index 4a77fa30a9cd..c62c36ae94c2 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -31,6 +31,13 @@
gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
enable-active-high;
};
+
+ wlan0_power: fixedregulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "wlan0_power";
+ gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
};
&ext {
@@ -54,9 +61,18 @@
bus-width = <4>;
max-frequency = <5000>;
+ non-removable;
pinctrl-names = "default";
pinctrl-0 = <&pins_mmc1>;
+
+ brcmf: wifi@1 {
+/* reg = <4>;*/
+ compatible = "brcm,bcm4330-fmac";
+ vcc-supply = <&wlan0_power>;
+ device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
+ };
};
&uart0 {
@@ -73,6 +89,23 @@
pinctrl-0 = <&pins_uart1>;
};
+&uart2 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_uart2>;
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
+ vcc-supply = <&wlan0_power>;
+ device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
+ };
+};
+
&uart3 {
status = "okay";
@@ -314,6 +347,12 @@
bias-disable;
};
+ pins_uart2: uart2 {
+ function = "uart2";
+ groups = "uart2-data", "uart2-hwflow";
+ bias-disable;
+ };
+
pins_uart3: uart3 {
function = "uart3";
groups = "uart3-data", "uart3-hwflow";
--
2.20.1
[PATCH 1/4] MIPS: CI20: DTS: Add I2C nodes
Adding missing I2C nodes and some peripheral:
- PMU
- RTC
Signed-off-by: Alexandre GRIVEAUX
---
arch/mips/boot/dts/ingenic/ci20.dts | 147
1 file changed, 147 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
b/arch/mips/boot/dts/ingenic/ci20.dts
index 2e9952311ecd..4a77fa30a9cd 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -87,6 +87,123 @@
pinctrl-0 = <&pins_uart4>;
};
+&i2c0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c0>;
+
+ clock-frequency = <40>;
+
+ act8600: act8600@5a {
+ compatible = "active-semi,act8600";
+ reg = <0x5a>;
+ status = "okay";
+
+ regulators {
+ vddcore: SUDCDC1 {
+ regulator-name = "VDDCORE";
+ regulator-min-microvolt = <110>;
+ regulator-max-microvolt = <110>;
+ regulator-always-on;
+ };
+ vddmem: SUDCDC2 {
+ regulator-name = "VDDMEM";
+ regulator-min-microvolt = <150>;
+ regulator-max-microvolt = <150>;
+ regulator-always-on;
+ };
+ vcc_33: SUDCDC3 {
+ regulator-name = "VCC33";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-always-on;
+ };
+ vcc_50: SUDCDC4 {
+ regulator-name = "VCC50";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ };
+ vcc_25: LDO_REG5 {
+ regulator-name = "VCC25";
+ regulator-min-microvolt = <250>;
+ regulator-max-microvolt = <250>;
+ regulator-always-on;
+ };
+ wifi_io: LDO_REG6 {
+ regulator-name = "WIFIIO";
+ regulator-min-microvolt = <250>;
+ regulator-max-microvolt = <250>;
+ regulator-always-on;
+ };
+ vcc_28: LDO_REG7 {
+ regulator-name = "VCC28";
+ regulator-min-microvolt = <280>;
+ regulator-max-microvolt = <280>;
+ regulator-always-on;
+ };
+ vcc_15: LDO_REG8 {
+ regulator-name = "VCC15";
+ regulator-min-microvolt = <150>;
+ regulator-max-microvolt = <150>;
+ regulator-always-on;
+ };
+ vcc_18: LDO_REG9 {
+ regulator-name = "VCC18";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ };
+ vcc_11: LDO_REG10 {
+ regulator-name = "VCC11";
+ regulator-min-microvolt = <110>;
+ regulator-max-microvolt = <110>;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c1>;
+
+};
+
+&i2c2 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c2>;
+
+};
+
+&i2c3 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c3>;
+
+};
+
+&i2c4 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c4>;
+
+ clock-frequency = <40>;
+
+ rtc@51 {
+
[PATCH 0/4] MIPS: CI20: DTS: Add nodes to Creator CI20 board
Attemping to make my CI20 more usefull than a paperweight, I add nodes to Devicetree, at this time: - The IW8103 need some work to stay alive because power seem to turn off. - The leds patch lack of correct option in ci20_defconfig. - The Cpu patch isn't usefull without SMP support of jz4780. Alexandre GRIVEAUX (4): MIPS: CI20: DTS: Add I2C nodes MIPS: CI20: DTS: Add IW8103 Wifi + bluetooth MIPS: CI20: DTS: Add Leds MIPS: JZ4780: DTS: Add CPU nodes arch/mips/boot/dts/ingenic/ci20.dts| 214 + arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 ++ 2 files changed, 231 insertions(+) base-commit: 4c37310a2e605357cf47b3d357696309f1181b5c -- 2.20.1
[PATCHv4] MIPS: JZ4780: DTS: Add I2C nodes
Add the devicetree nodes for the I2C core of the JZ4780 SoC, disabled
by default.
Signed-off-by: Alexandre GRIVEAUX
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 86 ++
1 file changed, 86 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index b03cdec56de9..a76ecd69bfd0 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -239,6 +239,92 @@
status = "disabled";
};
+ i2c0: i2c@1005 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <0x1005 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <60>;
+
+ clocks = <&cgu JZ4780_CLK_SMB0>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c0_data>;
+
+ status = "disabled";
+ };
+
+ i2c1: i2c@10051000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10051000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <59>;
+
+ clocks = <&cgu JZ4780_CLK_SMB1>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c1_data>;
+
+ status = "disabled";
+ };
+
+ i2c2: i2c@10052000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10052000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <58>;
+
+ clocks = <&cgu JZ4780_CLK_SMB2>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c2_data>;
+
+ status = "disabled";
+ };
+
+ i2c3: i2c@10053000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10053000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <57>;
+
+ clocks = <&cgu JZ4780_CLK_SMB3>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c3_data>;
+
+ status = "disabled";
+ };
+
+ i2c4: i2c@10054000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10054000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <56>;
+
+ clocks = <&cgu JZ4780_CLK_SMB4>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c4_data>;
+
+ status = "disabled";
+ };
+
watchdog: watchdog@10002000 {
compatible = "ingenic,jz4780-watchdog";
reg = <0x10002000 0x10>;
--
2.20.1
[PATCHv3] MIPS: JZ4780: DTS: Add I2C nodes
Add the devicetree nodes for the I2C core of the JZ4780 SoC, disabled
by default.
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 86 ++
1 file changed, 86 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index b03cdec56de9..a76ecd69bfd0 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -239,6 +239,92 @@
status = "disabled";
};
+ i2c0: i2c@1005 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <0x1005 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <60>;
+
+ clocks = <&cgu JZ4780_CLK_SMB0>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c0_data>;
+
+ status = "disabled";
+ };
+
+ i2c1: i2c@10051000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10051000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <59>;
+
+ clocks = <&cgu JZ4780_CLK_SMB1>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c1_data>;
+
+ status = "disabled";
+ };
+
+ i2c2: i2c@10052000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10052000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <58>;
+
+ clocks = <&cgu JZ4780_CLK_SMB2>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c2_data>;
+
+ status = "disabled";
+ };
+
+ i2c3: i2c@10053000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10053000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <57>;
+
+ clocks = <&cgu JZ4780_CLK_SMB3>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c3_data>;
+
+ status = "disabled";
+ };
+
+ i2c4: i2c@10054000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10054000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <56>;
+
+ clocks = <&cgu JZ4780_CLK_SMB4>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c4_data>;
+
+ status = "disabled";
+ };
+
watchdog: watchdog@10002000 {
compatible = "ingenic,jz4780-watchdog";
reg = <0x10002000 0x10>;
--
2.20.1
[PATCH] MIPS: JZ4740: DTS: Add I2C nodes
Add the devicetree nodes for the I2C core of the JZ4780 SoC, disabled
by default.
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 86 ++
1 file changed, 86 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index b03cdec56de9..a76ecd69bfd0 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -239,6 +239,92 @@
status = "disabled";
};
+ i2c0: i2c@1005 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <0x1005 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <60>;
+
+ clocks = <&cgu JZ4780_CLK_SMB0>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c0_data>;
+
+ status = "disabled";
+ };
+
+ i2c1: i2c@10051000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10051000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <59>;
+
+ clocks = <&cgu JZ4780_CLK_SMB1>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c1_data>;
+
+ status = "disabled";
+ };
+
+ i2c2: i2c@10052000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10052000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <58>;
+
+ clocks = <&cgu JZ4780_CLK_SMB2>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c2_data>;
+
+ status = "disabled";
+ };
+
+ i2c3: i2c@10053000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10053000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <57>;
+
+ clocks = <&cgu JZ4780_CLK_SMB3>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c3_data>;
+
+ status = "disabled";
+ };
+
+ i2c4: i2c@10054000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10054000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <56>;
+
+ clocks = <&cgu JZ4780_CLK_SMB4>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c4_data>;
+
+ status = "disabled";
+ };
+
watchdog: watchdog@10002000 {
compatible = "ingenic,jz4780-watchdog";
reg = <0x10002000 0x10>;
--
2.20.1
[PATCHv2] MIPS: JZ4780: DTS: Add I2C nodes Ralf Baechle ,
Add the devicetree nodes for the I2C core of the JZ4780 SoC, disabled
by default.
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 86 ++
1 file changed, 86 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index b03cdec56de9..a76ecd69bfd0 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -239,6 +239,92 @@
status = "disabled";
};
+ i2c0: i2c@1005 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <0x1005 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <60>;
+
+ clocks = <&cgu JZ4780_CLK_SMB0>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c0_data>;
+
+ status = "disabled";
+ };
+
+ i2c1: i2c@10051000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10051000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <59>;
+
+ clocks = <&cgu JZ4780_CLK_SMB1>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c1_data>;
+
+ status = "disabled";
+ };
+
+ i2c2: i2c@10052000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10052000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <58>;
+
+ clocks = <&cgu JZ4780_CLK_SMB2>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c2_data>;
+
+ status = "disabled";
+ };
+
+ i2c3: i2c@10053000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10053000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <57>;
+
+ clocks = <&cgu JZ4780_CLK_SMB3>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c3_data>;
+
+ status = "disabled";
+ };
+
+ i2c4: i2c@10054000 {
+ compatible = "ingenic,jz4780-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10054000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <56>;
+
+ clocks = <&cgu JZ4780_CLK_SMB4>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_i2c4_data>;
+
+ status = "disabled";
+ };
+
watchdog: watchdog@10002000 {
compatible = "ingenic,jz4780-watchdog";
reg = <0x10002000 0x10>;
--
2.20.1
