[PATCH 1/1] net: dsa: b53: Fix for failure when irq is not defined in dt

[Arun Parameswaran]

Fixes the issues with non BCM58XX chips in the b53 driver
failing, when the irq is not specified in the device tree.

Removed the check for BCM58XX in b53_srab_prepare_irq(),
so the 'port->irq' will be set to '-EXIO' if the irq is not
specified in the device tree.

Fixes: 16994374a6fc ("net: dsa: b53: Make SRAB driver manage port interrupts")
Fixes: b2ddc48a81b5 ("net: dsa: b53: Do not fail when IRQ are not initialized")
Signed-off-by: Arun Parameswaran 
---
 drivers/net/dsa/b53/b53_srab.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/net/dsa/b53/b53_srab.c b/drivers/net/dsa/b53/b53_srab.c
index 90f514252987..d9c56a779c08 100644
--- a/drivers/net/dsa/b53/b53_srab.c
+++ b/drivers/net/dsa/b53/b53_srab.c
@@ -511,9 +511,6 @@ static void b53_srab_prepare_irq(struct platform_device 
*pdev)
/* Clear all pending interrupts */
writel(0x, priv->regs + B53_SRAB_INTR);
 
-   if (dev->pdata && dev->pdata->chip_id != BCM58XX_DEVICE_ID)
-   return;
-
for (i = 0; i < B53_N_PORTS; i++) {
port = >port_intrs[i];
 
-- 
2.17.1

[PATCH v3 0/8] Add clock config and pm support to bcm iProc mdio mux

[Arun Parameswaran]

Hi,
The patchset is based on David Miller's "net-next" repo.

The patchset extends the Broadcom iProc mdio mux to add support for
suspend/resume and the ability to configure the internal clock
divider. The patchset also sets the scan control register to
disable external master access.

The base address of the mdio-mux-bcm-iproc is modified to point to the
start of the mdio block's address space, to be able to access all the
mdio's registers. The missing registers are required to configure the
internal clock divider registers in some of the Broadcom SoC's.

Changes from v2:
 - Addressed Andrew's comments:
 - Moved to using devm_mdiobus_alloc. Added this as a separate patch.
 - Changed to reverse christmas tree order for variable declaration in
   the clock patch
 - Addressed Florian's comments:
 - Removed null checks for the clock before calling unprepare in
   both clock and pm patches.
 - Added check for EPROBE_DEFER when fetching the clock in the clock
   patch.
 - The patch to use the devm API has been added before the clock & pm
   patches. This patch is now patch '5' in the series.
 - Added reviewed-by tags to commit messages of patches which remain
   unmodified from v2.
 - Modified PM patch to use platform_get_drvdata() in suspend/resume
   API's, similar to the recent fix that went in for the remove()
   api.

Changes from v1:
 - Addressed Andrew's comments.
   - Reworked the patches to be based on 'net-next'
   - Removed 'fixes' from the commit messages, the changes are related
 to the new features being added.
   - Maintained backward compatibility to older dt-blob's specifying
 base addresse with an offset. The correction is applied in the
 driver and a message is printed to update the dt-blob.
   - Re-worked and re-ordered the last four patches (4-7).
 - Added setting of the scan control register as a new patch
 - Added a call to 'clk_prepare_enable()' in the patch that adds
   the clock config support, removed the debug message when clock
   is not passed.
 - Simplified the pm support patch (removed the array used for the
   save/restore logic).

Thanks

Arun Parameswaran (8):
  dt-bindings: net: Fix Broadcom iProc mdio mux driver base address
  net: phy: Fix the register offsets in Broadcom iProc mdio mux driver
  arm64: dts: Fix the base address of the Broadcom iProc mdio mux
  net: phy: Disable external master access in bcm mdio mux driver
  net: phy: Use devm api for mdio bus allocation in bcm iproc mdio mux
  dt-bindings: net: Add clock handle to Broadcom iProc mdio mux
  net: phy: Add support to configure clock in Broadcom iProc mdio mux
  net: phy: Add pm support to Broadcom iProc mdio mux driver

 .../bindings/net/brcm,mdio-mux-iproc.txt   |   7 +-
 arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi   |   4 +-
 .../arm64/boot/dts/broadcom/stingray/stingray.dtsi |   4 +-
 drivers/net/phy/mdio-mux-bcm-iproc.c   | 111 +++--
 4 files changed, 109 insertions(+), 17 deletions(-)

-- 
1.9.1

[PATCH v3 0/8] Add clock config and pm support to bcm iProc mdio mux

[Arun Parameswaran]

Hi,
The patchset is based on David Miller's "net-next" repo.

The patchset extends the Broadcom iProc mdio mux to add support for
suspend/resume and the ability to configure the internal clock
divider. The patchset also sets the scan control register to
disable external master access.

The base address of the mdio-mux-bcm-iproc is modified to point to the
start of the mdio block's address space, to be able to access all the
mdio's registers. The missing registers are required to configure the
internal clock divider registers in some of the Broadcom SoC's.

Changes from v2:
 - Addressed Andrew's comments:
 - Moved to using devm_mdiobus_alloc. Added this as a separate patch.
 - Changed to reverse christmas tree order for variable declaration in
   the clock patch
 - Addressed Florian's comments:
 - Removed null checks for the clock before calling unprepare in
   both clock and pm patches.
 - Added check for EPROBE_DEFER when fetching the clock in the clock
   patch.
 - The patch to use the devm API has been added before the clock & pm
   patches. This patch is now patch '5' in the series.
 - Added reviewed-by tags to commit messages of patches which remain
   unmodified from v2.
 - Modified PM patch to use platform_get_drvdata() in suspend/resume
   API's, similar to the recent fix that went in for the remove()
   api.

Changes from v1:
 - Addressed Andrew's comments.
   - Reworked the patches to be based on 'net-next'
   - Removed 'fixes' from the commit messages, the changes are related
 to the new features being added.
   - Maintained backward compatibility to older dt-blob's specifying
 base addresse with an offset. The correction is applied in the
 driver and a message is printed to update the dt-blob.
   - Re-worked and re-ordered the last four patches (4-7).
 - Added setting of the scan control register as a new patch
 - Added a call to 'clk_prepare_enable()' in the patch that adds
   the clock config support, removed the debug message when clock
   is not passed.
 - Simplified the pm support patch (removed the array used for the
   save/restore logic).

Thanks

Arun Parameswaran (8):
  dt-bindings: net: Fix Broadcom iProc mdio mux driver base address
  net: phy: Fix the register offsets in Broadcom iProc mdio mux driver
  arm64: dts: Fix the base address of the Broadcom iProc mdio mux
  net: phy: Disable external master access in bcm mdio mux driver
  net: phy: Use devm api for mdio bus allocation in bcm iproc mdio mux
  dt-bindings: net: Add clock handle to Broadcom iProc mdio mux
  net: phy: Add support to configure clock in Broadcom iProc mdio mux
  net: phy: Add pm support to Broadcom iProc mdio mux driver

 .../bindings/net/brcm,mdio-mux-iproc.txt   |   7 +-
 arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi   |   4 +-
 .../arm64/boot/dts/broadcom/stingray/stingray.dtsi |   4 +-
 drivers/net/phy/mdio-mux-bcm-iproc.c   | 111 +++--
 4 files changed, 109 insertions(+), 17 deletions(-)

-- 
1.9.1

Re: [PATCH 1/7] dt-bindings: net: Fix Broadcom iProc mdio mux driver base address

[Arun Parameswaran]

Hi Andrew

On 18-07-26 12:01 PM, Andrew Lunn wrote:
> On Thu, Jul 26, 2018 at 11:36:18AM -0700, Arun Parameswaran wrote:
>> Modify the base address passed to the Broadcom iProc MDIO mux driver
>> to point to the start of the block's register address space.
>>
>> Fixes: ce8d5dbfd64f ("Add DT binding doc for Broadcom MDIO bus multiplexer")
> 
> Hi Arun
> 
> Fixes generally means something explodes, throws an Opps, userspace
> does the wrong thing. Documentation/process/stable-kernel-rules.rst
> says:
> 
>  - It must fix a real bug that bothers people (not a, "This could be a
>problem..." type thing).
> 
> Please explain how this is a real problem and what people it bothers.
> 
It is only relevant when we need to modify the registers which are not
currently accessible.

I will remove the 'fixes' and use the 'net-next' repo for the change
set.

> I also don't see any attempt to keep backwards compatibility with
> older device tree blobs. Is it intentional you will break such old
> blobs?
> 
I will modify the patch to keep backward compatibility like you
suggested in the other patch.

Thanks
Arun

> Thanks
>   Andrew
> 
> 
>> Signed-off-by: Arun Parameswaran 
>> ---
>>  Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt 
>> b/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
>> index dfe287a..dc8aa68 100644
>> --- a/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
>> +++ b/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
>> @@ -18,9 +18,9 @@ at- Documentation/devicetree/bindings/net/mdio-mux.txt
>>  
>>  
>>  for example:
>> -mdio_mux_iproc: mdio-mux@6602023c {
>> +mdio_mux_iproc: mdio-mux@6602 {
>>  compatible = "brcm,mdio-mux-iproc";
>> -reg = <0x6602023c 0x14>;
>> +reg = <0x6602 0x250>;
>>  #address-cells = <1>;
>>  #size-cells = <0>;
>>  
>> -- 
>> 1.9.1
>>

Re: [PATCH 1/7] dt-bindings: net: Fix Broadcom iProc mdio mux driver base address

[Arun Parameswaran]

Hi Andrew

On 18-07-26 12:01 PM, Andrew Lunn wrote:
> On Thu, Jul 26, 2018 at 11:36:18AM -0700, Arun Parameswaran wrote:
>> Modify the base address passed to the Broadcom iProc MDIO mux driver
>> to point to the start of the block's register address space.
>>
>> Fixes: ce8d5dbfd64f ("Add DT binding doc for Broadcom MDIO bus multiplexer")
> 
> Hi Arun
> 
> Fixes generally means something explodes, throws an Opps, userspace
> does the wrong thing. Documentation/process/stable-kernel-rules.rst
> says:
> 
>  - It must fix a real bug that bothers people (not a, "This could be a
>problem..." type thing).
> 
> Please explain how this is a real problem and what people it bothers.
> 
It is only relevant when we need to modify the registers which are not
currently accessible.

I will remove the 'fixes' and use the 'net-next' repo for the change
set.

> I also don't see any attempt to keep backwards compatibility with
> older device tree blobs. Is it intentional you will break such old
> blobs?
> 
I will modify the patch to keep backward compatibility like you
suggested in the other patch.

Thanks
Arun

> Thanks
>   Andrew
> 
> 
>> Signed-off-by: Arun Parameswaran 
>> ---
>>  Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt 
>> b/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
>> index dfe287a..dc8aa68 100644
>> --- a/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
>> +++ b/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
>> @@ -18,9 +18,9 @@ at- Documentation/devicetree/bindings/net/mdio-mux.txt
>>  
>>  
>>  for example:
>> -mdio_mux_iproc: mdio-mux@6602023c {
>> +mdio_mux_iproc: mdio-mux@6602 {
>>  compatible = "brcm,mdio-mux-iproc";
>> -reg = <0x6602023c 0x14>;
>> +reg = <0x6602 0x250>;
>>  #address-cells = <1>;
>>  #size-cells = <0>;
>>  
>> -- 
>> 1.9.1
>>

Re: [PATCH v1 1/1] dt-binding: ptp: Add SoC compatibility strings for dte ptp clock

[Arun Parameswaran]

Hi David,

On 17-07-10 06:44 AM, Rob Herring wrote:
> On Thu, Jul 06, 2017 at 10:37:57AM -0700, Arun Parameswaran wrote:
>> Add SoC specific compatibility strings to the Broadcom DTE
>> based PTP clock binding document.
>>
>> Fixed the document heading and node name.
>>
>> Fixes: 80d6076140b2 ("dt-binding: ptp: add bindings document for dte based 
>> ptp clock")
>> Signed-off-by: Arun Parameswaran <arun.parameswa...@broadcom.com>
>> ---
>>  Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt | 15 +++
>>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> Acked-by: Rob Herring <r...@kernel.org>
>
Will you be picking up this change ?

Thanks
Arun

Re: [PATCH v1 1/1] dt-binding: ptp: Add SoC compatibility strings for dte ptp clock

[Arun Parameswaran]

Hi David,

On 17-07-10 06:44 AM, Rob Herring wrote:
> On Thu, Jul 06, 2017 at 10:37:57AM -0700, Arun Parameswaran wrote:
>> Add SoC specific compatibility strings to the Broadcom DTE
>> based PTP clock binding document.
>>
>> Fixed the document heading and node name.
>>
>> Fixes: 80d6076140b2 ("dt-binding: ptp: add bindings document for dte based 
>> ptp clock")
>> Signed-off-by: Arun Parameswaran 
>> ---
>>  Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt | 15 +++
>>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> Acked-by: Rob Herring 
>
Will you be picking up this change ?

Thanks
Arun

[PATCH v1 1/1] dt-binding: ptp: Add SoC compatibility strings for dte ptp clock

[Arun Parameswaran]

Add SoC specific compatibility strings to the Broadcom DTE
based PTP clock binding document.

Fixed the document heading and node name.

Fixes: 80d6076140b2 ("dt-binding: ptp: add bindings document for dte based ptp 
clock")
Signed-off-by: Arun Parameswaran <arun.parameswa...@broadcom.com>
---
 Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt 
b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
index 07590bc..7c04e22 100644
--- a/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
+++ b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
@@ -1,13 +1,20 @@
-* Broadcom Digital Timing Engine(DTE) based PTP clock driver
+* Broadcom Digital Timing Engine(DTE) based PTP clock
 
 Required properties:
-- compatible: should be "brcm,ptp-dte"
+- compatible: should contain the core compatibility string
+  and the SoC compatibility string. The SoC
+  compatibility string is to handle SoC specific
+  hardware differences.
+  Core compatibility string:
+ "brcm,ptp-dte"
+  SoC compatibility strings:
+ "brcm,iproc-ptp-dte" - for iproc based SoC's
 - reg: address and length of the DTE block's NCO registers
 
 Example:
 
-ptp_dte: ptp_dte@180af650 {
-   compatible = "brcm,ptp-dte";
+ptp: ptp-dte@180af650 {
+   compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte";
reg = <0x180af650 0x10>;
status = "okay";
 };
-- 
1.9.1

[PATCH v1 1/1] dt-binding: ptp: Add SoC compatibility strings for dte ptp clock

[Arun Parameswaran]

Add SoC specific compatibility strings to the Broadcom DTE
based PTP clock binding document.

Fixed the document heading and node name.

Fixes: 80d6076140b2 ("dt-binding: ptp: add bindings document for dte based ptp 
clock")
Signed-off-by: Arun Parameswaran 
---
 Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt 
b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
index 07590bc..7c04e22 100644
--- a/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
+++ b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
@@ -1,13 +1,20 @@
-* Broadcom Digital Timing Engine(DTE) based PTP clock driver
+* Broadcom Digital Timing Engine(DTE) based PTP clock
 
 Required properties:
-- compatible: should be "brcm,ptp-dte"
+- compatible: should contain the core compatibility string
+  and the SoC compatibility string. The SoC
+  compatibility string is to handle SoC specific
+  hardware differences.
+  Core compatibility string:
+ "brcm,ptp-dte"
+  SoC compatibility strings:
+ "brcm,iproc-ptp-dte" - for iproc based SoC's
 - reg: address and length of the DTE block's NCO registers
 
 Example:
 
-ptp_dte: ptp_dte@180af650 {
-   compatible = "brcm,ptp-dte";
+ptp: ptp-dte@180af650 {
+   compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte";
reg = <0x180af650 0x10>;
status = "okay";
 };
-- 
1.9.1

Re: [PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

[Arun Parameswaran]

Hi David, Rob,
I will address all of Rob's comments below.

Since a part of the patch was applied to 'net-next', would you like me to
send a new patch (based on the applied one), or a 'V2' of this patch ?

Thanks
Arun

On 17-06-18 07:04 AM, Rob Herring wrote:
> On Mon, Jun 12, 2017 at 01:26:00PM -0700, Arun Parameswaran wrote:
>> Add device tree binding documentation for the Broadcom DTE
>> PTP clock driver.
>>
>> Signed-off-by: Arun Parameswaran <arun.parameswa...@broadcom.com>
>> ---
>>  Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt | 13 +
>>  1 file changed, 13 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
>>
>> diff --git a/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt 
>> b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
>> new file mode 100644
>> index 000..07590bc
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
>> @@ -0,0 +1,13 @@
>> +* Broadcom Digital Timing Engine(DTE) based PTP clock driver
> 
> Bindings describe h/w, not drivers.
> 
>> +
>> +Required properties:
>> +- compatible: should be "brcm,ptp-dte"
> 
> Looks too generic. You need SoC specific compatible strings.
> 
>> +- reg: address and length of the DTE block's NCO registers
>> +
>> +Example:
>> +
>> +ptp_dte: ptp_dte@180af650 {
> 
> Don't use '_' in node names.
> 
>> +compatible = "brcm,ptp-dte";
>> +reg = <0x180af650 0x10>;
>> +status = "okay";
>> +};
>> -- 
>> 1.9.1
>>

Re: [PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

[Arun Parameswaran]

Hi David, Rob,
I will address all of Rob's comments below.

Since a part of the patch was applied to 'net-next', would you like me to
send a new patch (based on the applied one), or a 'V2' of this patch ?

Thanks
Arun

On 17-06-18 07:04 AM, Rob Herring wrote:
> On Mon, Jun 12, 2017 at 01:26:00PM -0700, Arun Parameswaran wrote:
>> Add device tree binding documentation for the Broadcom DTE
>> PTP clock driver.
>>
>> Signed-off-by: Arun Parameswaran 
>> ---
>>  Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt | 13 +
>>  1 file changed, 13 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
>>
>> diff --git a/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt 
>> b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
>> new file mode 100644
>> index 000..07590bc
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
>> @@ -0,0 +1,13 @@
>> +* Broadcom Digital Timing Engine(DTE) based PTP clock driver
> 
> Bindings describe h/w, not drivers.
> 
>> +
>> +Required properties:
>> +- compatible: should be "brcm,ptp-dte"
> 
> Looks too generic. You need SoC specific compatible strings.
> 
>> +- reg: address and length of the DTE block's NCO registers
>> +
>> +Example:
>> +
>> +ptp_dte: ptp_dte@180af650 {
> 
> Don't use '_' in node names.
> 
>> +compatible = "brcm,ptp-dte";
>> +reg = <0x180af650 0x10>;
>> +status = "okay";
>> +};
>> -- 
>> 1.9.1
>>

Re: [PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

[Arun Parameswaran]

On 17-06-14 11:18 AM, Ray Jui wrote:
> 
> 
> On 6/13/17 10:46 AM, Arun Parameswaran wrote:
>>
>> Hi Richard,
>>
>> On 17-06-12 10:09 PM, Richard Cochran wrote:
>>> On Mon, Jun 12, 2017 at 01:26:00PM -0700, Arun Parameswaran wrote:
>>>> +Example:
>>>> +
>>>> +ptp_dte: ptp_dte@180af650 {
>>>> +  compatible = "brcm,ptp-dte";
>>>> +  reg = <0x180af650 0x10>;
>>>> +  status = "okay";
>>>> +};
>>> This patch set looks okay, as far as it goes, but how does one
>>> actually use the clock?
>>>
>>> How does one connect this node to an Ethernet MAC, for example?
>> In some of the SoC's, the DTE's NCO is synced in hardware with the Ethernet's
>> 1588 Shim NCO (used for time-stamping the packets). We are working on getting
>> all the future SoC's synced this way (for Ethernet).
>>
> 
> So apparently you do not need any phandle based DT binding defined for
> the connection between the Ethernet device node and the PTP device node?
> 
Correct. This driver doesn't need any phandle.

The Ethernet driver, in SoC's where the hardware link is not available,
might need the phandle to this driver.

>> In other scenarios, we use an user-space app to perform the sync based on
>> time-stamps from external hardware sources like the Wi-Fi.
>>> Thanks,
>>> Richard
>>

Re: [PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

[Arun Parameswaran]

On 17-06-14 11:18 AM, Ray Jui wrote:
> 
> 
> On 6/13/17 10:46 AM, Arun Parameswaran wrote:
>>
>> Hi Richard,
>>
>> On 17-06-12 10:09 PM, Richard Cochran wrote:
>>> On Mon, Jun 12, 2017 at 01:26:00PM -0700, Arun Parameswaran wrote:
>>>> +Example:
>>>> +
>>>> +ptp_dte: ptp_dte@180af650 {
>>>> +  compatible = "brcm,ptp-dte";
>>>> +  reg = <0x180af650 0x10>;
>>>> +  status = "okay";
>>>> +};
>>> This patch set looks okay, as far as it goes, but how does one
>>> actually use the clock?
>>>
>>> How does one connect this node to an Ethernet MAC, for example?
>> In some of the SoC's, the DTE's NCO is synced in hardware with the Ethernet's
>> 1588 Shim NCO (used for time-stamping the packets). We are working on getting
>> all the future SoC's synced this way (for Ethernet).
>>
> 
> So apparently you do not need any phandle based DT binding defined for
> the connection between the Ethernet device node and the PTP device node?
> 
Correct. This driver doesn't need any phandle.

The Ethernet driver, in SoC's where the hardware link is not available,
might need the phandle to this driver.

>> In other scenarios, we use an user-space app to perform the sync based on
>> time-stamps from external hardware sources like the Wi-Fi.
>>> Thanks,
>>> Richard
>>

Re: [PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

[Arun Parameswaran]

On 17-06-14 11:18 AM, Ray Jui wrote:
> 
> 
> On 6/13/17 10:46 AM, Arun Parameswaran wrote:
>>
>> Hi Richard,
>>
>> On 17-06-12 10:09 PM, Richard Cochran wrote:
>>> On Mon, Jun 12, 2017 at 01:26:00PM -0700, Arun Parameswaran wrote:
>>>> +Example:
>>>> +
>>>> +ptp_dte: ptp_dte@180af650 {
>>>> +  compatible = "brcm,ptp-dte";
>>>> +  reg = <0x180af650 0x10>;
>>>> +  status = "okay";
>>>> +};
>>> This patch set looks okay, as far as it goes, but how does one
>>> actually use the clock?
>>>
>>> How does one connect this node to an Ethernet MAC, for example?
>> In some of the SoC's, the DTE's NCO is synced in hardware with the Ethernet's
>> 1588 Shim NCO (used for time-stamping the packets). We are working on getting
>> all the future SoC's synced this way (for Ethernet).
>>
> 
> So apparently you do not need any phandle based DT binding defined for
> the connection between the Ethernet device node and the PTP device node?
> 
Correct. This driver doesn't need any phandle.

The Ethernet/Switch driver, in the SoC's where the hardware link is not
available, might need the phandle to this driver.

>> In other scenarios, we use an user-space app to perform the sync based on
>> time-stamps from external hardware sources like the Wi-Fi.
>>> Thanks,
>>> Richard
>>

Re: [PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

[Arun Parameswaran]

On 17-06-14 11:18 AM, Ray Jui wrote:
> 
> 
> On 6/13/17 10:46 AM, Arun Parameswaran wrote:
>>
>> Hi Richard,
>>
>> On 17-06-12 10:09 PM, Richard Cochran wrote:
>>> On Mon, Jun 12, 2017 at 01:26:00PM -0700, Arun Parameswaran wrote:
>>>> +Example:
>>>> +
>>>> +ptp_dte: ptp_dte@180af650 {
>>>> +  compatible = "brcm,ptp-dte";
>>>> +  reg = <0x180af650 0x10>;
>>>> +  status = "okay";
>>>> +};
>>> This patch set looks okay, as far as it goes, but how does one
>>> actually use the clock?
>>>
>>> How does one connect this node to an Ethernet MAC, for example?
>> In some of the SoC's, the DTE's NCO is synced in hardware with the Ethernet's
>> 1588 Shim NCO (used for time-stamping the packets). We are working on getting
>> all the future SoC's synced this way (for Ethernet).
>>
> 
> So apparently you do not need any phandle based DT binding defined for
> the connection between the Ethernet device node and the PTP device node?
> 
Correct. This driver doesn't need any phandle.

The Ethernet/Switch driver, in the SoC's where the hardware link is not
available, might need the phandle to this driver.

>> In other scenarios, we use an user-space app to perform the sync based on
>> time-stamps from external hardware sources like the Wi-Fi.
>>> Thanks,
>>> Richard
>>

Re: [PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

[Arun Parameswaran]

Hi Richard,

On 17-06-12 10:09 PM, Richard Cochran wrote:
> On Mon, Jun 12, 2017 at 01:26:00PM -0700, Arun Parameswaran wrote:
>> +Example:
>> +
>> +ptp_dte: ptp_dte@180af650 {
>> +compatible = "brcm,ptp-dte";
>> +reg = <0x180af650 0x10>;
>> +status = "okay";
>> +};
> This patch set looks okay, as far as it goes, but how does one
> actually use the clock?
>
> How does one connect this node to an Ethernet MAC, for example?
In some of the SoC's, the DTE's NCO is synced in hardware with the Ethernet's
1588 Shim NCO (used for time-stamping the packets). We are working on getting
all the future SoC's synced this way (for Ethernet).

In other scenarios, we use an user-space app to perform the sync based on
time-stamps from external hardware sources like the Wi-Fi.
> Thanks,
> Richard

Re: [PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

[Arun Parameswaran]

Hi Richard,

On 17-06-12 10:09 PM, Richard Cochran wrote:
> On Mon, Jun 12, 2017 at 01:26:00PM -0700, Arun Parameswaran wrote:
>> +Example:
>> +
>> +ptp_dte: ptp_dte@180af650 {
>> +compatible = "brcm,ptp-dte";
>> +reg = <0x180af650 0x10>;
>> +status = "okay";
>> +};
> This patch set looks okay, as far as it goes, but how does one
> actually use the clock?
>
> How does one connect this node to an Ethernet MAC, for example?
In some of the SoC's, the DTE's NCO is synced in hardware with the Ethernet's
1588 Shim NCO (used for time-stamping the packets). We are working on getting
all the future SoC's synced this way (for Ethernet).

In other scenarios, we use an user-space app to perform the sync based on
time-stamps from external hardware sources like the Wi-Fi.
> Thanks,
> Richard

[PATCH v1 2/2] ptp: Add a ptp clock driver for Broadcom DTE

[Arun Parameswaran]

This patch adds a ptp clock driver for the Broadcom SoCs using
the Digital timing Engine (DTE) nco.

Signed-off-by: Arun Parameswaran <arun.parameswa...@broadcom.com>
---
 drivers/ptp/Kconfig   |  16 +++
 drivers/ptp/Makefile  |   1 +
 drivers/ptp/ptp_dte.c | 353 ++
 3 files changed, 370 insertions(+)
 create mode 100644 drivers/ptp/ptp_dte.c

diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig
index 384f661..a21ad10 100644
--- a/drivers/ptp/Kconfig
+++ b/drivers/ptp/Kconfig
@@ -25,6 +25,22 @@ config PTP_1588_CLOCK
  To compile this driver as a module, choose M here: the module
  will be called ptp.
 
+config PTP_1588_CLOCK_DTE
+   tristate "Broadcom DTE as PTP clock"
+   depends on PTP_1588_CLOCK
+   depends on NET && HAS_IOMEM
+   depends on ARCH_BCM_MOBILE || (ARCH_BCM_IPROC && !(ARCH_BCM_NSP || 
ARCH_BCM_5301X)) || COMPILE_TEST
+   default y
+   help
+ This driver adds support for using the Digital timing engine
+ (DTE) in the Broadcom SoC's as a PTP clock.
+
+ The clock can be used in both wired and wireless networks
+ for PTP purposes.
+
+ To compile this driver as a module, choose M here: the module
+ will be called ptp_dte.
+
 config PTP_1588_CLOCK_GIANFAR
tristate "Freescale eTSEC as PTP clock"
depends on GIANFAR
diff --git a/drivers/ptp/Makefile b/drivers/ptp/Makefile
index 5307361..d1f2fb1 100644
--- a/drivers/ptp/Makefile
+++ b/drivers/ptp/Makefile
@@ -4,6 +4,7 @@
 
 ptp-y  := ptp_clock.o ptp_chardev.o ptp_sysfs.o
 obj-$(CONFIG_PTP_1588_CLOCK)   += ptp.o
+obj-$(CONFIG_PTP_1588_CLOCK_DTE)   += ptp_dte.o
 obj-$(CONFIG_PTP_1588_CLOCK_IXP46X)+= ptp_ixp46x.o
 obj-$(CONFIG_PTP_1588_CLOCK_PCH)   += ptp_pch.o
 obj-$(CONFIG_PTP_1588_CLOCK_KVM)   += ptp_kvm.o
diff --git a/drivers/ptp/ptp_dte.c b/drivers/ptp/ptp_dte.c
new file mode 100644
index 000..00145a3
--- /dev/null
+++ b/drivers/ptp/ptp_dte.c
@@ -0,0 +1,353 @@
+/*
+ * Copyright 2017 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DTE_NCO_LOW_TIME_REG   0x00
+#define DTE_NCO_TIME_REG   0x04
+#define DTE_NCO_OVERFLOW_REG   0x08
+#define DTE_NCO_INC_REG0x0c
+
+#define DTE_NCO_SUM2_MASK  0x
+#define DTE_NCO_SUM2_SHIFT 4ULL
+
+#define DTE_NCO_SUM3_MASK  0xff
+#define DTE_NCO_SUM3_SHIFT 36ULL
+#define DTE_NCO_SUM3_WR_SHIFT  8
+
+#define DTE_NCO_TS_WRAP_MASK   0xfff
+#define DTE_NCO_TS_WRAP_LSHIFT 32
+
+#define DTE_NCO_INC_DEFAULT0x8000
+#define DTE_NUM_REGS_TO_RESTORE4
+
+/* Full wrap around is 44bits in ns (~4.887 hrs) */
+#define DTE_WRAP_AROUND_NSEC_SHIFT 44
+
+/* 44 bits NCO */
+#define DTE_NCO_MAX_NS 0xFFF
+
+/* 125MHz with 3.29 reg cfg */
+#define DTE_PPB_ADJ(ppb) (u32)(div64_u64u64)abs(ppb) * BIT(28)) +\
+ 6250ULL), 12500ULL))
+
+/* ptp dte priv structure */
+struct ptp_dte {
+   void __iomem *regs;
+   struct ptp_clock *ptp_clk;
+   struct ptp_clock_info caps;
+   struct device *dev;
+   u32 ts_ovf_last;
+   u32 ts_wrap_cnt;
+   spinlock_t lock;
+   u32 reg_val[DTE_NUM_REGS_TO_RESTORE];
+};
+
+static void dte_write_nco(void __iomem *regs, s64 ns)
+{
+   u32 sum2, sum3;
+
+   sum2 = (u32)((ns >> DTE_NCO_SUM2_SHIFT) & DTE_NCO_SUM2_MASK);
+   /* compensate for ignoring sum1 */
+   if (sum2 != DTE_NCO_SUM2_MASK)
+   sum2++;
+
+   /* to write sum3, bits [15:8] needs to be written */
+   sum3 = (u32)(((ns >> DTE_NCO_SUM3_SHIFT) & DTE_NCO_SUM3_MASK) <<
+DTE_NCO_SUM3_WR_SHIFT);
+
+   writel(0, (regs + DTE_NCO_LOW_TIME_REG));
+   writel(sum2, (regs + DTE_NCO_TIME_REG));
+   writel(sum3, (regs + DTE_NCO_OVERFLOW_REG));
+}
+
+static s64 dte_read_nco(void __iomem *regs)
+{
+   u32 sum2, sum3;
+   s64 ns;
+
+   /*
+* ignoring sum1 (4 bits) gives a 16ns resolution, which
+* works due to the async register read.
+*/
+   sum3 = readl(regs + DTE_NCO_OVERFLOW_REG) & DTE_NCO_SUM3_MASK;
+   sum2 = readl(regs + DTE_NCO_TIME_REG);
+   ns = ((s64)sum3 << DTE_NCO_SUM3_SHIFT) |
+((s64)sum2 << DTE_NCO_SUM2_SHIFT);
+
+   return ns;
+}
+
+static void dte_write_nco_delta(struct ptp_dte *ptp_dte,

[PATCH v1 0/2] Add support for Broadcom DTE based PTP clock

[Arun Parameswaran]

Hi,

This patchset adds support for the DTE based PTP clock for Broadcom SoCs.

The DTE nco based PTP clock can be used in both wired and wireless networks
for precision time-stmaping purposes.

Arun Parameswaran (2):
  dt-binding: ptp: add bindings document for dte based ptp clock
  ptp: Add a ptp clock driver for Broadcom DTE

 .../devicetree/bindings/ptp/brcm,ptp-dte.txt   |  13 +
 drivers/ptp/Kconfig|  16 +
 drivers/ptp/Makefile   |   1 +
 drivers/ptp/ptp_dte.c  | 353 +
 4 files changed, 383 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
 create mode 100644 drivers/ptp/ptp_dte.c

-- 
1.9.1

[PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

[Arun Parameswaran]

Add device tree binding documentation for the Broadcom DTE
PTP clock driver.

Signed-off-by: Arun Parameswaran <arun.parameswa...@broadcom.com>
---
 Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt | 13 +
 1 file changed, 13 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt

diff --git a/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt 
b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
new file mode 100644
index 000..07590bc
--- /dev/null
+++ b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
@@ -0,0 +1,13 @@
+* Broadcom Digital Timing Engine(DTE) based PTP clock driver
+
+Required properties:
+- compatible: should be "brcm,ptp-dte"
+- reg: address and length of the DTE block's NCO registers
+
+Example:
+
+ptp_dte: ptp_dte@180af650 {
+   compatible = "brcm,ptp-dte";
+   reg = <0x180af650 0x10>;
+   status = "okay";
+};
-- 
1.9.1

[PATCH v1 0/2] Add support for Broadcom DTE based PTP clock

[Arun Parameswaran]

Hi,

This patchset adds support for the DTE based PTP clock for Broadcom SoCs.

The DTE nco based PTP clock can be used in both wired and wireless networks
for precision time-stmaping purposes.

Arun Parameswaran (2):
  dt-binding: ptp: add bindings document for dte based ptp clock
  ptp: Add a ptp clock driver for Broadcom DTE

 .../devicetree/bindings/ptp/brcm,ptp-dte.txt   |  13 +
 drivers/ptp/Kconfig|  16 +
 drivers/ptp/Makefile   |   1 +
 drivers/ptp/ptp_dte.c  | 353 +
 4 files changed, 383 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
 create mode 100644 drivers/ptp/ptp_dte.c

-- 
1.9.1

[PATCH v1 1/2] dt-binding: ptp: add bindings document for dte based ptp clock

[Arun Parameswaran]

Add device tree binding documentation for the Broadcom DTE
PTP clock driver.

Signed-off-by: Arun Parameswaran 
---
 Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt | 13 +
 1 file changed, 13 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt

diff --git a/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt 
b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
new file mode 100644
index 000..07590bc
--- /dev/null
+++ b/Documentation/devicetree/bindings/ptp/brcm,ptp-dte.txt
@@ -0,0 +1,13 @@
+* Broadcom Digital Timing Engine(DTE) based PTP clock driver
+
+Required properties:
+- compatible: should be "brcm,ptp-dte"
+- reg: address and length of the DTE block's NCO registers
+
+Example:
+
+ptp_dte: ptp_dte@180af650 {
+   compatible = "brcm,ptp-dte";
+   reg = <0x180af650 0x10>;
+   status = "okay";
+};
-- 
1.9.1

[PATCH v1 2/2] ptp: Add a ptp clock driver for Broadcom DTE

[Arun Parameswaran]

This patch adds a ptp clock driver for the Broadcom SoCs using
the Digital timing Engine (DTE) nco.

Signed-off-by: Arun Parameswaran 
---
 drivers/ptp/Kconfig   |  16 +++
 drivers/ptp/Makefile  |   1 +
 drivers/ptp/ptp_dte.c | 353 ++
 3 files changed, 370 insertions(+)
 create mode 100644 drivers/ptp/ptp_dte.c

diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig
index 384f661..a21ad10 100644
--- a/drivers/ptp/Kconfig
+++ b/drivers/ptp/Kconfig
@@ -25,6 +25,22 @@ config PTP_1588_CLOCK
  To compile this driver as a module, choose M here: the module
  will be called ptp.
 
+config PTP_1588_CLOCK_DTE
+   tristate "Broadcom DTE as PTP clock"
+   depends on PTP_1588_CLOCK
+   depends on NET && HAS_IOMEM
+   depends on ARCH_BCM_MOBILE || (ARCH_BCM_IPROC && !(ARCH_BCM_NSP || 
ARCH_BCM_5301X)) || COMPILE_TEST
+   default y
+   help
+ This driver adds support for using the Digital timing engine
+ (DTE) in the Broadcom SoC's as a PTP clock.
+
+ The clock can be used in both wired and wireless networks
+ for PTP purposes.
+
+ To compile this driver as a module, choose M here: the module
+ will be called ptp_dte.
+
 config PTP_1588_CLOCK_GIANFAR
tristate "Freescale eTSEC as PTP clock"
depends on GIANFAR
diff --git a/drivers/ptp/Makefile b/drivers/ptp/Makefile
index 5307361..d1f2fb1 100644
--- a/drivers/ptp/Makefile
+++ b/drivers/ptp/Makefile
@@ -4,6 +4,7 @@
 
 ptp-y  := ptp_clock.o ptp_chardev.o ptp_sysfs.o
 obj-$(CONFIG_PTP_1588_CLOCK)   += ptp.o
+obj-$(CONFIG_PTP_1588_CLOCK_DTE)   += ptp_dte.o
 obj-$(CONFIG_PTP_1588_CLOCK_IXP46X)+= ptp_ixp46x.o
 obj-$(CONFIG_PTP_1588_CLOCK_PCH)   += ptp_pch.o
 obj-$(CONFIG_PTP_1588_CLOCK_KVM)   += ptp_kvm.o
diff --git a/drivers/ptp/ptp_dte.c b/drivers/ptp/ptp_dte.c
new file mode 100644
index 000..00145a3
--- /dev/null
+++ b/drivers/ptp/ptp_dte.c
@@ -0,0 +1,353 @@
+/*
+ * Copyright 2017 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DTE_NCO_LOW_TIME_REG   0x00
+#define DTE_NCO_TIME_REG   0x04
+#define DTE_NCO_OVERFLOW_REG   0x08
+#define DTE_NCO_INC_REG0x0c
+
+#define DTE_NCO_SUM2_MASK  0x
+#define DTE_NCO_SUM2_SHIFT 4ULL
+
+#define DTE_NCO_SUM3_MASK  0xff
+#define DTE_NCO_SUM3_SHIFT 36ULL
+#define DTE_NCO_SUM3_WR_SHIFT  8
+
+#define DTE_NCO_TS_WRAP_MASK   0xfff
+#define DTE_NCO_TS_WRAP_LSHIFT 32
+
+#define DTE_NCO_INC_DEFAULT0x8000
+#define DTE_NUM_REGS_TO_RESTORE4
+
+/* Full wrap around is 44bits in ns (~4.887 hrs) */
+#define DTE_WRAP_AROUND_NSEC_SHIFT 44
+
+/* 44 bits NCO */
+#define DTE_NCO_MAX_NS 0xFFF
+
+/* 125MHz with 3.29 reg cfg */
+#define DTE_PPB_ADJ(ppb) (u32)(div64_u64u64)abs(ppb) * BIT(28)) +\
+ 6250ULL), 12500ULL))
+
+/* ptp dte priv structure */
+struct ptp_dte {
+   void __iomem *regs;
+   struct ptp_clock *ptp_clk;
+   struct ptp_clock_info caps;
+   struct device *dev;
+   u32 ts_ovf_last;
+   u32 ts_wrap_cnt;
+   spinlock_t lock;
+   u32 reg_val[DTE_NUM_REGS_TO_RESTORE];
+};
+
+static void dte_write_nco(void __iomem *regs, s64 ns)
+{
+   u32 sum2, sum3;
+
+   sum2 = (u32)((ns >> DTE_NCO_SUM2_SHIFT) & DTE_NCO_SUM2_MASK);
+   /* compensate for ignoring sum1 */
+   if (sum2 != DTE_NCO_SUM2_MASK)
+   sum2++;
+
+   /* to write sum3, bits [15:8] needs to be written */
+   sum3 = (u32)(((ns >> DTE_NCO_SUM3_SHIFT) & DTE_NCO_SUM3_MASK) <<
+DTE_NCO_SUM3_WR_SHIFT);
+
+   writel(0, (regs + DTE_NCO_LOW_TIME_REG));
+   writel(sum2, (regs + DTE_NCO_TIME_REG));
+   writel(sum3, (regs + DTE_NCO_OVERFLOW_REG));
+}
+
+static s64 dte_read_nco(void __iomem *regs)
+{
+   u32 sum2, sum3;
+   s64 ns;
+
+   /*
+* ignoring sum1 (4 bits) gives a 16ns resolution, which
+* works due to the async register read.
+*/
+   sum3 = readl(regs + DTE_NCO_OVERFLOW_REG) & DTE_NCO_SUM3_MASK;
+   sum2 = readl(regs + DTE_NCO_TIME_REG);
+   ns = ((s64)sum3 << DTE_NCO_SUM3_SHIFT) |
+((s64)sum2 << DTE_NCO_SUM2_SHIFT);
+
+   return ns;
+}
+
+static void dte_write_nco_delta(struct ptp_dte *ptp_dte, s64 delta)
+{
+   s64 n

Re: [PATCH 1/2] net: dsa: b53: Add compatible strings for the Cygnus-family BCM11360.

[Arun Parameswaran]

On 17-04-24 04:07 PM, Florian Fainelli wrote:
> On 04/24/2017 04:03 PM, Arun Parameswaran wrote:
>> Hi Eric
>>
>> A comment on the Device ID.
>>
>>
>> On 17-04-24 02:50 PM, Eric Anholt wrote:
>>> Cygnus is a small family of SoCs, of which we currently have
>>> devicetree for BCM11360 and BCM58300.  The 11360's B53 is mostly the
>>> same as 58xx, just requiring a tiny bit of setup that was previously
>>> missing.
>>>
>>> Signed-off-by: Eric Anholt <e...@anholt.net>
>>> ---
>>>  Documentation/devicetree/bindings/net/dsa/b53.txt | 3 +++
>>>  drivers/net/dsa/b53/b53_srab.c| 2 ++
>>>  2 files changed, 5 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/net/dsa/b53.txt 
>>> b/Documentation/devicetree/bindings/net/dsa/b53.txt
>>> index d6c6e41648d4..49c93d3c0839 100644
>>> --- a/Documentation/devicetree/bindings/net/dsa/b53.txt
>>> +++ b/Documentation/devicetree/bindings/net/dsa/b53.txt
>>> @@ -29,6 +29,9 @@ Required properties:
>>>"brcm,bcm58625-srab"
>>>"brcm,bcm88312-srab" and the mandatory "brcm,nsp-srab string
>>>  
>>> +  For the BCM11360 SoC, must be:
>>> +  "brcm,bcm11360-srab" and the mandatory "brcm,cygnus-srab string
>>> +
>>>For the BCM63xx/33xx SoCs with an integrated switch, must be one of:
>>>"brcm,bcm3384-switch"
>>>"brcm,bcm6328-switch"
>>> diff --git a/drivers/net/dsa/b53/b53_srab.c b/drivers/net/dsa/b53/b53_srab.c
>>> index 8a62b6a69703..c37ffd1b6833 100644
>>> --- a/drivers/net/dsa/b53/b53_srab.c
>>> +++ b/drivers/net/dsa/b53/b53_srab.c
>>> @@ -364,6 +364,7 @@ static const struct of_device_id b53_srab_of_match[] = {
>>> { .compatible = "brcm,bcm53018-srab" },
>>> { .compatible = "brcm,bcm53019-srab" },
>>> { .compatible = "brcm,bcm5301x-srab" },
>>> +   { .compatible = "brcm,bcm11360-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> { .compatible = "brcm,bcm58522-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> { .compatible = "brcm,bcm58525-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> { .compatible = "brcm,bcm58535-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> @@ -371,6 +372,7 @@ static const struct of_device_id b53_srab_of_match[] = {
>>> { .compatible = "brcm,bcm58623-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> { .compatible = "brcm,bcm58625-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> { .compatible = "brcm,bcm88312-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> +   { .compatible = "brcm,cygnus-srab", .data = (void *)BCM58XX_DEVICE_ID },
>> The device ID should be 0xd300. This is the actual value read from the 
>> switch regs.
>> This also requires an entry in the 'b53_switch_chips' structure in 
>> b53_common.c.
> These are not real ID numbers, these are values that indicate the
> generation of the switch being embedded into the SoC. Within
> b53_common.c we don't have to differentiate a Starfighter 2 embedded in
> BCM11360, NSP, or 7445 or 7278, which is why using 58XX_DEVICE_ID should
> be good enough.
Ok. Thanks.

I was under the impression, that these id's could be used in the 
b53_switch_detect()
API to auto detect the switch. In that API, the switch ID is read from the
Management page register.

>>> { .compatible = "brcm,nsp-srab", .data = (void *)BCM58XX_DEVICE_ID },
>>> { /* sentinel */ },
>>>  };
>> Other wise this patch set looks good.
>>
>> I was testing a similar change (except for the above, which doesn't
>> affect the functionality) to get the switch working and it works.
>>
>> Thanks
>> Arun
>>
>

Re: [PATCH 1/2] net: dsa: b53: Add compatible strings for the Cygnus-family BCM11360.

[Arun Parameswaran]

On 17-04-24 04:07 PM, Florian Fainelli wrote:
> On 04/24/2017 04:03 PM, Arun Parameswaran wrote:
>> Hi Eric
>>
>> A comment on the Device ID.
>>
>>
>> On 17-04-24 02:50 PM, Eric Anholt wrote:
>>> Cygnus is a small family of SoCs, of which we currently have
>>> devicetree for BCM11360 and BCM58300.  The 11360's B53 is mostly the
>>> same as 58xx, just requiring a tiny bit of setup that was previously
>>> missing.
>>>
>>> Signed-off-by: Eric Anholt 
>>> ---
>>>  Documentation/devicetree/bindings/net/dsa/b53.txt | 3 +++
>>>  drivers/net/dsa/b53/b53_srab.c| 2 ++
>>>  2 files changed, 5 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/net/dsa/b53.txt 
>>> b/Documentation/devicetree/bindings/net/dsa/b53.txt
>>> index d6c6e41648d4..49c93d3c0839 100644
>>> --- a/Documentation/devicetree/bindings/net/dsa/b53.txt
>>> +++ b/Documentation/devicetree/bindings/net/dsa/b53.txt
>>> @@ -29,6 +29,9 @@ Required properties:
>>>"brcm,bcm58625-srab"
>>>"brcm,bcm88312-srab" and the mandatory "brcm,nsp-srab string
>>>  
>>> +  For the BCM11360 SoC, must be:
>>> +  "brcm,bcm11360-srab" and the mandatory "brcm,cygnus-srab string
>>> +
>>>For the BCM63xx/33xx SoCs with an integrated switch, must be one of:
>>>"brcm,bcm3384-switch"
>>>"brcm,bcm6328-switch"
>>> diff --git a/drivers/net/dsa/b53/b53_srab.c b/drivers/net/dsa/b53/b53_srab.c
>>> index 8a62b6a69703..c37ffd1b6833 100644
>>> --- a/drivers/net/dsa/b53/b53_srab.c
>>> +++ b/drivers/net/dsa/b53/b53_srab.c
>>> @@ -364,6 +364,7 @@ static const struct of_device_id b53_srab_of_match[] = {
>>> { .compatible = "brcm,bcm53018-srab" },
>>> { .compatible = "brcm,bcm53019-srab" },
>>> { .compatible = "brcm,bcm5301x-srab" },
>>> +   { .compatible = "brcm,bcm11360-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> { .compatible = "brcm,bcm58522-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> { .compatible = "brcm,bcm58525-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> { .compatible = "brcm,bcm58535-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> @@ -371,6 +372,7 @@ static const struct of_device_id b53_srab_of_match[] = {
>>> { .compatible = "brcm,bcm58623-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> { .compatible = "brcm,bcm58625-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> { .compatible = "brcm,bcm88312-srab", .data = (void *)BCM58XX_DEVICE_ID 
>>> },
>>> +   { .compatible = "brcm,cygnus-srab", .data = (void *)BCM58XX_DEVICE_ID },
>> The device ID should be 0xd300. This is the actual value read from the 
>> switch regs.
>> This also requires an entry in the 'b53_switch_chips' structure in 
>> b53_common.c.
> These are not real ID numbers, these are values that indicate the
> generation of the switch being embedded into the SoC. Within
> b53_common.c we don't have to differentiate a Starfighter 2 embedded in
> BCM11360, NSP, or 7445 or 7278, which is why using 58XX_DEVICE_ID should
> be good enough.
Ok. Thanks.

I was under the impression, that these id's could be used in the 
b53_switch_detect()
API to auto detect the switch. In that API, the switch ID is read from the
Management page register.

>>> { .compatible = "brcm,nsp-srab", .data = (void *)BCM58XX_DEVICE_ID },
>>> { /* sentinel */ },
>>>  };
>> Other wise this patch set looks good.
>>
>> I was testing a similar change (except for the above, which doesn't
>> affect the functionality) to get the switch working and it works.
>>
>> Thanks
>> Arun
>>
>

Re: [PATCH 1/2] net: dsa: b53: Add compatible strings for the Cygnus-family BCM11360.

[Arun Parameswaran]

Hi Eric

A comment on the Device ID.


On 17-04-24 02:50 PM, Eric Anholt wrote:
> Cygnus is a small family of SoCs, of which we currently have
> devicetree for BCM11360 and BCM58300.  The 11360's B53 is mostly the
> same as 58xx, just requiring a tiny bit of setup that was previously
> missing.
>
> Signed-off-by: Eric Anholt 
> ---
>  Documentation/devicetree/bindings/net/dsa/b53.txt | 3 +++
>  drivers/net/dsa/b53/b53_srab.c| 2 ++
>  2 files changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/b53.txt 
> b/Documentation/devicetree/bindings/net/dsa/b53.txt
> index d6c6e41648d4..49c93d3c0839 100644
> --- a/Documentation/devicetree/bindings/net/dsa/b53.txt
> +++ b/Documentation/devicetree/bindings/net/dsa/b53.txt
> @@ -29,6 +29,9 @@ Required properties:
>"brcm,bcm58625-srab"
>"brcm,bcm88312-srab" and the mandatory "brcm,nsp-srab string
>  
> +  For the BCM11360 SoC, must be:
> +  "brcm,bcm11360-srab" and the mandatory "brcm,cygnus-srab string
> +
>For the BCM63xx/33xx SoCs with an integrated switch, must be one of:
>"brcm,bcm3384-switch"
>"brcm,bcm6328-switch"
> diff --git a/drivers/net/dsa/b53/b53_srab.c b/drivers/net/dsa/b53/b53_srab.c
> index 8a62b6a69703..c37ffd1b6833 100644
> --- a/drivers/net/dsa/b53/b53_srab.c
> +++ b/drivers/net/dsa/b53/b53_srab.c
> @@ -364,6 +364,7 @@ static const struct of_device_id b53_srab_of_match[] = {
>   { .compatible = "brcm,bcm53018-srab" },
>   { .compatible = "brcm,bcm53019-srab" },
>   { .compatible = "brcm,bcm5301x-srab" },
> + { .compatible = "brcm,bcm11360-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
>   { .compatible = "brcm,bcm58522-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
>   { .compatible = "brcm,bcm58525-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
>   { .compatible = "brcm,bcm58535-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
> @@ -371,6 +372,7 @@ static const struct of_device_id b53_srab_of_match[] = {
>   { .compatible = "brcm,bcm58623-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
>   { .compatible = "brcm,bcm58625-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
>   { .compatible = "brcm,bcm88312-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
> + { .compatible = "brcm,cygnus-srab", .data = (void *)BCM58XX_DEVICE_ID },
The device ID should be 0xd300. This is the actual value read from the switch 
regs.
This also requires an entry in the 'b53_switch_chips' structure in b53_common.c.
>   { .compatible = "brcm,nsp-srab", .data = (void *)BCM58XX_DEVICE_ID },
>   { /* sentinel */ },
>  };
Other wise this patch set looks good.

I was testing a similar change (except for the above, which doesn't
affect the functionality) to get the switch working and it works.

Thanks
Arun

Re: [PATCH 1/2] net: dsa: b53: Add compatible strings for the Cygnus-family BCM11360.

[Arun Parameswaran]

Hi Eric

A comment on the Device ID.


On 17-04-24 02:50 PM, Eric Anholt wrote:
> Cygnus is a small family of SoCs, of which we currently have
> devicetree for BCM11360 and BCM58300.  The 11360's B53 is mostly the
> same as 58xx, just requiring a tiny bit of setup that was previously
> missing.
>
> Signed-off-by: Eric Anholt 
> ---
>  Documentation/devicetree/bindings/net/dsa/b53.txt | 3 +++
>  drivers/net/dsa/b53/b53_srab.c| 2 ++
>  2 files changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/b53.txt 
> b/Documentation/devicetree/bindings/net/dsa/b53.txt
> index d6c6e41648d4..49c93d3c0839 100644
> --- a/Documentation/devicetree/bindings/net/dsa/b53.txt
> +++ b/Documentation/devicetree/bindings/net/dsa/b53.txt
> @@ -29,6 +29,9 @@ Required properties:
>"brcm,bcm58625-srab"
>"brcm,bcm88312-srab" and the mandatory "brcm,nsp-srab string
>  
> +  For the BCM11360 SoC, must be:
> +  "brcm,bcm11360-srab" and the mandatory "brcm,cygnus-srab string
> +
>For the BCM63xx/33xx SoCs with an integrated switch, must be one of:
>"brcm,bcm3384-switch"
>"brcm,bcm6328-switch"
> diff --git a/drivers/net/dsa/b53/b53_srab.c b/drivers/net/dsa/b53/b53_srab.c
> index 8a62b6a69703..c37ffd1b6833 100644
> --- a/drivers/net/dsa/b53/b53_srab.c
> +++ b/drivers/net/dsa/b53/b53_srab.c
> @@ -364,6 +364,7 @@ static const struct of_device_id b53_srab_of_match[] = {
>   { .compatible = "brcm,bcm53018-srab" },
>   { .compatible = "brcm,bcm53019-srab" },
>   { .compatible = "brcm,bcm5301x-srab" },
> + { .compatible = "brcm,bcm11360-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
>   { .compatible = "brcm,bcm58522-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
>   { .compatible = "brcm,bcm58525-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
>   { .compatible = "brcm,bcm58535-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
> @@ -371,6 +372,7 @@ static const struct of_device_id b53_srab_of_match[] = {
>   { .compatible = "brcm,bcm58623-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
>   { .compatible = "brcm,bcm58625-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
>   { .compatible = "brcm,bcm88312-srab", .data = (void *)BCM58XX_DEVICE_ID 
> },
> + { .compatible = "brcm,cygnus-srab", .data = (void *)BCM58XX_DEVICE_ID },
The device ID should be 0xd300. This is the actual value read from the switch 
regs.
This also requires an entry in the 'b53_switch_chips' structure in b53_common.c.
>   { .compatible = "brcm,nsp-srab", .data = (void *)BCM58XX_DEVICE_ID },
>   { /* sentinel */ },
>  };
Other wise this patch set looks good.

I was testing a similar change (except for the above, which doesn't
affect the functionality) to get the switch working and it works.

Thanks
Arun

[PATCH v2 1/1] net: phy: bcm-phy-lib: Fix module license issue

[Arun Parameswaran]

The 'bcm-phy-lib.c', added as a part of the commit
"net: phy: Add Broadcom phy library for common interfaces"
was missing the module license. This was causing an issue
when the library is built as a module; "module license
'unspecified' taints kernel".

This patch fixes the issue by adding the module license,
author and description to the bcm-phy-lib.c file.

Fixes: a1cba5613edf5 ("net: phy: Add Broadcom phy library for
common interfaces")
Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/bcm-phy-lib.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
index dd79ea6..ddb377e 100644
--- a/drivers/net/phy/bcm-phy-lib.c
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 

 #define MII_BCM_CHANNEL_WIDTH 0x2000
@@ -206,3 +207,7 @@ int bcm_phy_enable_eee(struct phy_device *phydev)
return 0;
 }
 EXPORT_SYMBOL_GPL(bcm_phy_enable_eee);
+
+MODULE_DESCRIPTION("Broadcom PHY Library");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Broadcom Corporation");
--
2.6.1

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[PATCH v2 0/1] Fix for module license in Broadcom Phy Library

[Arun Parameswaran]

Hi
This patchset adds the module description, license & author to the
Broadcom Phy Library (drivers/net/phy/bcm-phy-lib.c) introduced by
the commit: a1cba5613edf5 ("net: phy: Add Broadcom phy library for
common interfaces")

Changes from v1:
-Created the patch based on David Miller's 'net-next' Kernel tree

Arun Parameswaran (1):
  net: phy: bcm-phy-lib: Fix module license issue

 drivers/net/phy/bcm-phy-lib.c | 5 +
 1 file changed, 5 insertions(+)

-- 
2.6.1

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Re: [PATCH 1/1] net: phy: bcm-phy-lib: Fix module license issue

[Arun Parameswaran]

On 15-10-14 06:39 PM, David Miller wrote:
> From: Arun Parameswaran 
> Date: Tue, 13 Oct 2015 13:40:12 -0700
>
>> The 'bcm-phy-lib.c', added as a part of the commit
>> "net: phy: Add Broadcom phy library for common interfaces"
>> was missing the module license. This was causing an issue
>> when the library is built as a module; "module license
>> 'unspecified' taints kernel".
>>
>> This patch fixes the issue by adding the module license,
>> author and description to the bcm-phy-lib.c file.
>>
>> Fixes: a1cba5613edf5 ("net: phy: Add Broadcom phy library for common
>> interfaces")
>> Signed-off-by: Arun Parameswaran 
> This patch doesn't apply to my net-next tree at all.

There is a mismatch in the 'git diff' output, for the last 3 lines in
bcm-phy-lib.c

For some reason the patch I created has '@@ -207,3 +208,6 @@', instead of
'@@ -206,3 +207,7 @@', when created from the 'net-next'.

I will send out a patch based on the 'net-next'.

Thanks
Arun


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Re: [PATCH 1/1] net: phy: bcm-phy-lib: Fix module license issue

[Arun Parameswaran]

On 15-10-14 06:39 PM, David Miller wrote:
> From: Arun Parameswaran <ar...@broadcom.com>
> Date: Tue, 13 Oct 2015 13:40:12 -0700
>
>> The 'bcm-phy-lib.c', added as a part of the commit
>> "net: phy: Add Broadcom phy library for common interfaces"
>> was missing the module license. This was causing an issue
>> when the library is built as a module; "module license
>> 'unspecified' taints kernel".
>>
>> This patch fixes the issue by adding the module license,
>> author and description to the bcm-phy-lib.c file.
>>
>> Fixes: a1cba5613edf5 ("net: phy: Add Broadcom phy library for common
>> interfaces")
>> Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
> This patch doesn't apply to my net-next tree at all.

There is a mismatch in the 'git diff' output, for the last 3 lines in
bcm-phy-lib.c

For some reason the patch I created has '@@ -207,3 +208,6 @@', instead of
'@@ -206,3 +207,7 @@', when created from the 'net-next'.

I will send out a patch based on the 'net-next'.

Thanks
Arun


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[PATCH v2 0/1] Fix for module license in Broadcom Phy Library

[Arun Parameswaran]

Hi
This patchset adds the module description, license & author to the
Broadcom Phy Library (drivers/net/phy/bcm-phy-lib.c) introduced by
the commit: a1cba5613edf5 ("net: phy: Add Broadcom phy library for
common interfaces")

Changes from v1:
-Created the patch based on David Miller's 'net-next' Kernel tree

Arun Parameswaran (1):
  net: phy: bcm-phy-lib: Fix module license issue

 drivers/net/phy/bcm-phy-lib.c | 5 +
 1 file changed, 5 insertions(+)

-- 
2.6.1

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[PATCH v2 1/1] net: phy: bcm-phy-lib: Fix module license issue

[Arun Parameswaran]

The 'bcm-phy-lib.c', added as a part of the commit
"net: phy: Add Broadcom phy library for common interfaces"
was missing the module license. This was causing an issue
when the library is built as a module; "module license
'unspecified' taints kernel".

This patch fixes the issue by adding the module license,
author and description to the bcm-phy-lib.c file.

Fixes: a1cba5613edf5 ("net: phy: Add Broadcom phy library for
common interfaces")
Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/bcm-phy-lib.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
index dd79ea6..ddb377e 100644
--- a/drivers/net/phy/bcm-phy-lib.c
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 

 #define MII_BCM_CHANNEL_WIDTH 0x2000
@@ -206,3 +207,7 @@ int bcm_phy_enable_eee(struct phy_device *phydev)
return 0;
 }
 EXPORT_SYMBOL_GPL(bcm_phy_enable_eee);
+
+MODULE_DESCRIPTION("Broadcom PHY Library");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Broadcom Corporation");
--
2.6.1

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[PATCH 1/1] net: phy: bcm-phy-lib: Fix module license issue

[Arun Parameswaran]

The 'bcm-phy-lib.c', added as a part of the commit
"net: phy: Add Broadcom phy library for common interfaces"
was missing the module license. This was causing an issue
when the library is built as a module; "module license
'unspecified' taints kernel".

This patch fixes the issue by adding the module license,
author and description to the bcm-phy-lib.c file.

Fixes: a1cba5613edf5 ("net: phy: Add Broadcom phy library for common
interfaces")
Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/bcm-phy-lib.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
index 13e161e..ddb377e 100644
--- a/drivers/net/phy/bcm-phy-lib.c
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define MII_BCM_CHANNEL_WIDTH 0x2000
@@ -207,3 +208,6 @@ int bcm_phy_enable_eee(struct phy_device *phydev)
 }
 EXPORT_SYMBOL_GPL(bcm_phy_enable_eee);
 
+MODULE_DESCRIPTION("Broadcom PHY Library");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Broadcom Corporation");
-- 
2.6.1

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[PATCH 0/1] Fix for module license in Broadcom Phy Library

[Arun Parameswaran]

Hi
This patchset adds the module description, license & author to the
Broadcom Phy Library (drivers/net/phy/bcm-phy-lib.c) introduced by
the commit: a1cba5613edf5 ("net: phy: Add Broadcom phy library for
common interfaces")

Arun Parameswaran (1):
  net: phy: bcm-phy-lib: Fix module license issue

 drivers/net/phy/bcm-phy-lib.c | 4 
 1 file changed, 4 insertions(+)

-- 
2.6.1

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Re: [lkp] [net] 041de4d656: bcm_phy_lib: module license 'unspecified' taints kernel.

[Arun Parameswaran]

On 15-10-11 11:17 PM, kernel test robot wrote:
> FYI, we noticed the below changes on
>
> git://internal_mailing_list_patch_tree 
> Arun-Parameswaran/Add-support-for-Broadcom-s-iProc-MDIO-and-Cygnus-Ethernet-PHY
> commit 041de4d6564535f639f0d4cec6712b5adf62723f ("net: phy: Add Broadcom phy 
> library for common interfaces")
>
> Found new message as below in kernel log after the commit.
>
> [2.527336] bcm_phy_lib: module license 'unspecified' taints kernel.
> [2.527686] Disabling lock debugging due to kernel taint

Will fix this with a separate patch.

>
> To reproduce:
>
> git clone 
> git://git.kernel.org/pub/scm/linux/kernel/git/wfg/lkp-tests.git
> cd lkp-tests
> bin/lkp install job.yaml  # job file is attached in this email
> bin/lkp run job.yaml
>
>
>
> Thanks,
> Ying Huang

Thanks,

Arun

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Re: [lkp] [net] 041de4d656: bcm_phy_lib: module license 'unspecified' taints kernel.

[Arun Parameswaran]

On 15-10-11 11:17 PM, kernel test robot wrote:
> FYI, we noticed the below changes on
>
> git://internal_mailing_list_patch_tree 
> Arun-Parameswaran/Add-support-for-Broadcom-s-iProc-MDIO-and-Cygnus-Ethernet-PHY
> commit 041de4d6564535f639f0d4cec6712b5adf62723f ("net: phy: Add Broadcom phy 
> library for common interfaces")
>
> Found new message as below in kernel log after the commit.
>
> [2.527336] bcm_phy_lib: module license 'unspecified' taints kernel.
> [2.527686] Disabling lock debugging due to kernel taint

Will fix this with a separate patch.

>
> To reproduce:
>
> git clone 
> git://git.kernel.org/pub/scm/linux/kernel/git/wfg/lkp-tests.git
> cd lkp-tests
> bin/lkp install job.yaml  # job file is attached in this email
> bin/lkp run job.yaml
>
>
>
> Thanks,
> Ying Huang

Thanks,

Arun

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[PATCH 1/1] net: phy: bcm-phy-lib: Fix module license issue

[Arun Parameswaran]

The 'bcm-phy-lib.c', added as a part of the commit
"net: phy: Add Broadcom phy library for common interfaces"
was missing the module license. This was causing an issue
when the library is built as a module; "module license
'unspecified' taints kernel".

This patch fixes the issue by adding the module license,
author and description to the bcm-phy-lib.c file.

Fixes: a1cba5613edf5 ("net: phy: Add Broadcom phy library for common
interfaces")
Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/bcm-phy-lib.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
index 13e161e..ddb377e 100644
--- a/drivers/net/phy/bcm-phy-lib.c
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define MII_BCM_CHANNEL_WIDTH 0x2000
@@ -207,3 +208,6 @@ int bcm_phy_enable_eee(struct phy_device *phydev)
 }
 EXPORT_SYMBOL_GPL(bcm_phy_enable_eee);
 
+MODULE_DESCRIPTION("Broadcom PHY Library");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Broadcom Corporation");
-- 
2.6.1

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[PATCH 0/1] Fix for module license in Broadcom Phy Library

[Arun Parameswaran]

Hi
This patchset adds the module description, license & author to the
Broadcom Phy Library (drivers/net/phy/bcm-phy-lib.c) introduced by
the commit: a1cba5613edf5 ("net: phy: Add Broadcom phy library for
common interfaces")

Arun Parameswaran (1):
  net: phy: bcm-phy-lib: Fix module license issue

 drivers/net/phy/bcm-phy-lib.c | 4 
 1 file changed, 4 insertions(+)

-- 
2.6.1

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[PATCH v3 1/5] dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding

[Arun Parameswaran]

Add device tree binding documentation for the Broadcom iProc MDIO
bus driver.

Signed-off-by: Arun Parameswaran 
---
 .../devicetree/bindings/net/brcm,iproc-mdio.txt| 23 ++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt

diff --git a/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt 
b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
new file mode 100644
index 000..8ba9ed1
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
@@ -0,0 +1,23 @@
+* Broadcom iProc MDIO bus controller
+
+Required properties:
+- compatible: should be "brcm,iproc-mdio"
+- reg: address and length of the register set for the MDIO interface
+- #size-cells: must be 1
+- #address-cells: must be 0
+
+Child nodes of this MDIO bus controller node are standard Ethernet PHY device
+nodes as described in Documentation/devicetree/bindings/net/phy.txt
+
+Example:
+
+mdio@18002000 {
+   compatible = "brcm,iproc-mdio";
+   reg = <0x18002000 0x8>;
+   #size-cells = <1>;
+   #address-cells = <0>;
+
+   enet-gphy@0 {
+   reg = <0>;
+   };
+};
-- 
2.5.2

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[PATCH v3 0/5] Add support for Broadcom's iProc MDIO and Cygnus Ethernet PHY

[Arun Parameswaran]

Hi
This patchset adds support for the iProc MDIO interface and the
Broadcom Cygnus SoC's internal Ethernet PHY.

The internal Ethernet PHY(s) in the Cygnus SoC's are accessed
via the MDIO interface found in most of the iProc based chips.

The patch also consolidates the common API's used by the
Broadcom phys to a common library. Existing Broadcom phy
drivers have been modified to use the common library API's.

This patch series is based on Linux v4.3-rc1 and is avaliable in:
https://github.com/Broadcom/cygnus-linux/tree/cygnus-net-phy-mdio-v3

The Ethernet driver for the iProc family will be submitted soon,
as will the device tree configurations for the different iProc
family SoCs.

Changes from v2:
- Modified drivers/net/phy/Kconfig to modify the BCM_CYGNUS_PHY
  driver to 'depends on MDIO_BCM_IPROC' instead of 'select'.
- Added github branch to the cover letter

Changes from v1:
- Updated device tree documentation for the iProc MDIO driver
  based on Florian's feedback.
- Moved the core register defines from the Cygnus PHY driver to
  'include/linux/brcmphy.h' based on Florian's feedback.
- Created a new patch/commit to modify the bcm7xxx phy driver
  to use the new core register defines.
- Modified the Kconfig entry for the Broadcom PHY library to
  'tristate' instead of 'bool'

Arun Parameswaran (5):
  dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding
  net: phy: Broadcom iProc MDIO bus driver
  net: phy: Add Broadcom phy library for common interfaces
  net: phy: Broadcom Cygnus internal Etherent PHY driver
  net: phy: bcm7xxx: Modified to use global core register defines

 .../devicetree/bindings/net/brcm,iproc-mdio.txt|  23 +++
 drivers/net/phy/Kconfig|  28 +++
 drivers/net/phy/Makefile   |   3 +
 drivers/net/phy/bcm-cygnus.c   | 158 +++
 drivers/net/phy/bcm-phy-lib.c  | 209 
 drivers/net/phy/bcm-phy-lib.h  |  37 
 drivers/net/phy/bcm63xx.c  |  38 +---
 drivers/net/phy/bcm7xxx.c  | 136 +++--
 drivers/net/phy/broadcom.c | 149 +-
 drivers/net/phy/mdio-bcm-iproc.c   | 213 +
 include/linux/brcmphy.h|  29 +--
 11 files changed, 761 insertions(+), 262 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
 create mode 100644 drivers/net/phy/bcm-cygnus.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

-- 
2.5.2

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[PATCH v3 2/5] net: phy: Broadcom iProc MDIO bus driver

[Arun Parameswaran]

This patch adds support for the Broadcom iProc MDIO bus interface.
The MDIO interface can be found in the Broadcom iProc family Soc's.

The MDIO bus is accessed using a combination of command and data
registers. This MDIO driver provides access to the Etherent GPHY's
connected to the MDIO bus.

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/Kconfig  |   9 ++
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/mdio-bcm-iproc.c | 213 +++
 3 files changed, 223 insertions(+)
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index c5ad98a..b57f6c2 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -225,6 +225,15 @@ config MDIO_BCM_UNIMAC
  This hardware can be found in the Broadcom GENET Ethernet MAC
  controllers as well as some Broadcom Ethernet switches such as the
  Starfighter 2 switches.
+
+config MDIO_BCM_IPROC
+   tristate "Broadcom iProc MDIO bus controller"
+   depends on ARCH_BCM_IPROC || COMPILE_TEST
+   depends on HAS_IOMEM && OF_MDIO
+   help
+ This module provides a driver for the MDIO busses found in the
+ Broadcom iProc SoC's.
+
 endif # PHYLIB
 
 config MICREL_KS8995MA
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 87f079c..f4e6eb9 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_MDIO_SUN4I)  += mdio-sun4i.o
 obj-$(CONFIG_MDIO_MOXART)  += mdio-moxart.o
 obj-$(CONFIG_MDIO_BCM_UNIMAC)  += mdio-bcm-unimac.o
 obj-$(CONFIG_MICROCHIP_PHY)+= microchip.o
+obj-$(CONFIG_MDIO_BCM_IPROC)   += mdio-bcm-iproc.o
diff --git a/drivers/net/phy/mdio-bcm-iproc.c b/drivers/net/phy/mdio-bcm-iproc.c
new file mode 100644
index 000..c0b4e65
--- /dev/null
+++ b/drivers/net/phy/mdio-bcm-iproc.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define IPROC_GPHY_MDCDIV0x1a
+
+#define MII_CTRL_OFFSET  0x000
+
+#define MII_CTRL_DIV_SHIFT   0
+#define MII_CTRL_PRE_SHIFT   7
+#define MII_CTRL_BUSY_SHIFT  8
+
+#define MII_DATA_OFFSET  0x004
+#define MII_DATA_MASK0x
+#define MII_DATA_TA_SHIFT16
+#define MII_DATA_TA_VAL  2
+#define MII_DATA_RA_SHIFT18
+#define MII_DATA_PA_SHIFT23
+#define MII_DATA_OP_SHIFT28
+#define MII_DATA_OP_WRITE1
+#define MII_DATA_OP_READ 2
+#define MII_DATA_SB_SHIFT30
+
+struct iproc_mdio_priv {
+   struct mii_bus *mii_bus;
+   void __iomem *base;
+};
+
+static inline int iproc_mdio_wait_for_idle(void __iomem *base)
+{
+   u32 val;
+   unsigned int timeout = 1000; /* loop for 1s */
+
+   do {
+   val = readl(base + MII_CTRL_OFFSET);
+   if ((val & BIT(MII_CTRL_BUSY_SHIFT)) == 0)
+   return 0;
+
+   usleep_range(1000, 2000);
+   } while (timeout--);
+
+   return -ETIMEDOUT;
+}
+
+static inline void iproc_mdio_config_clk(void __iomem *base)
+{
+   u32 val;
+
+   val = (IPROC_GPHY_MDCDIV << MII_CTRL_DIV_SHIFT) |
+ BIT(MII_CTRL_PRE_SHIFT);
+   writel(val, base + MII_CTRL_OFFSET);
+}
+
+static int iproc_mdio_read(struct mii_bus *bus, int phy_id, int reg)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   iproc_mdio_config_clk(priv->base);
+
+   /* Prepare the read operation */
+   cmd = (MII_DATA_TA_VAL << MII_DATA_TA_SHIFT) |
+   (reg << MII_DATA_RA_SHIFT) |
+   (phy_id << MII_DATA_PA_SHIFT) |
+   BIT(MII_DATA_SB_SHIFT) |
+   (MII_DATA_OP_READ << MII_DATA_OP_SHIFT);
+
+   writel(cmd, priv->base + MII_DATA_OFFSET);
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   cmd = readl(priv->base + MII_DATA_OFFSET) & MII_DATA_MASK;
+
+   return cmd;
+}
+
+static int iproc_mdio_write(struct mii_bus *bus, int phy_id,
+   int reg, u16 val)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return

[PATCH v3 3/5] net: phy: Add Broadcom phy library for common interfaces

[Arun Parameswaran]

This patch adds the Broadcom phy library to consolidate common
interfaces shared by Broadcom phy's.

Moved the common interfaces to the 'bcm-phy-lib.c' and updated
the Broadcom PHY drivers to use the new APIs.

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/Kconfig   |   6 ++
 drivers/net/phy/Makefile  |   1 +
 drivers/net/phy/bcm-phy-lib.c | 209 ++
 drivers/net/phy/bcm-phy-lib.h |  37 
 drivers/net/phy/bcm63xx.c |  38 +---
 drivers/net/phy/bcm7xxx.c | 127 ++---
 drivers/net/phy/broadcom.c| 149 +-
 include/linux/brcmphy.h   |  22 +
 8 files changed, 333 insertions(+), 256 deletions(-)
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index b57f6c2..606fdc9 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -69,8 +69,12 @@ config SMSC_PHY
---help---
  Currently supports the LAN83C185, LAN8187 and LAN8700 PHYs
 
+config BCM_NET_PHYLIB
+   tristate
+
 config BROADCOM_PHY
tristate "Drivers for Broadcom PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
@@ -78,11 +82,13 @@ config BROADCOM_PHY
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
+   select BCM_NET_PHYLIB
---help---
  Currently supports the 6348 and 6358 PHYs.
 
 config BCM7XXX_PHY
tristate "Drivers for Broadcom 7xxx SOCs internal PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM7366, BCM7439, BCM7445, and
  40nm and 65nm generation of BCM7xxx Set Top Box SoCs.
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index f4e6eb9..6932475 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_QSEMI_PHY)   += qsemi.o
 obj-$(CONFIG_SMSC_PHY) += smsc.o
 obj-$(CONFIG_TERANETICS_PHY)   += teranetics.o
 obj-$(CONFIG_VITESSE_PHY)  += vitesse.o
+obj-$(CONFIG_BCM_NET_PHYLIB)   += bcm-phy-lib.o
 obj-$(CONFIG_BROADCOM_PHY) += broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
new file mode 100644
index 000..13e161e
--- /dev/null
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+#define MII_BCM_CHANNEL_WIDTH 0x2000
+#define BCM_CL45VEN_EEE_ADV   0x3c
+
+int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
+{
+   int rc;
+
+   rc = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (rc < 0)
+   return rc;
+
+   return phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_exp);
+
+int bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
+{
+   int val;
+
+   val = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (val < 0)
+   return val;
+
+   val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
+
+   /* Restore default value.  It's O.K. if this write fails. */
+   phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
+
+   return val;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_read_exp);
+
+int bcm_phy_write_misc(struct phy_device *phydev,
+  u16 reg, u16 chl, u16 val)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
+   if (rc < 0)
+   return rc;
+
+   tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL);
+   tmp |= MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA;
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, tmp);
+   if (rc < 0)
+   return rc;
+
+   tmp = (chl * MII_BCM_CHANNEL_WIDTH) | reg;
+   rc = bcm_phy_write_exp(phydev, tmp, val);
+
+   return rc;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_misc);
+
+int bcm_phy_read_misc(struct phy_device *phydev,
+ u16 reg, u16 chl)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM54XX_AUXCTL_SHDWSEL_MISC)

[PATCH v3 5/5] net: phy: bcm7xxx: Modified to use global core register defines

[Arun Parameswaran]

Modified the bcm7xxx phy driver to remove local core register
defines and use the common ones from "include/linux/brcmphy.h"

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/bcm7xxx.c | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index efa31a6..03d4809 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -25,7 +25,6 @@
 #define MII_BCM7XXX_100TX_DISC 0x14
 #define MII_BCM7XXX_AUX_MODE   0x1d
 #define  MII_BCM7XX_64CLK_MDIO BIT(12)
-#define MII_BCM7XXX_CORE_BASE1E0x1e
 #define MII_BCM7XXX_TEST   0x1f
 #define  MII_BCM7XXX_SHD_MODE_2BIT(2)
 
@@ -46,8 +45,6 @@
 #define AFE_VDAC_OTHERS_0  MISC_ADDR(0x39, 3)
 #define AFE_HPF_TRIM_OTHERSMISC_ADDR(0x3a, 0)
 
-#define CORE_EXPB0 0xb0
-
 static void r_rc_cal_reset(struct phy_device *phydev)
 {
/* Reset R_CAL/RC_CAL Engine */
@@ -76,7 +73,7 @@ static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device 
*phydev)
bcm_phy_write_misc(phydev, DSP_TAP10, 0x690b);
 
/* Switch to CORE_BASE1E */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0xd);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0xd);
 
r_rc_cal_reset(phydev);
 
@@ -127,7 +124,7 @@ static int bcm7xxx_28nm_d0_afe_config_init(struct 
phy_device *phydev)
bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
 
/* CORE_BASE1E, force trim to overwrite and set I_ext trim to  */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010);
 
/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
bcm_phy_write_misc(phydev, DSP_TAP10, 0x011b);
@@ -155,7 +152,7 @@ static int bcm7xxx_28nm_e0_plus_afe_config_init(struct 
phy_device *phydev)
bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
 
/* CORE_BASE1E, force trim to overwrite and set I_ext trim to  */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010);
 
/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
bcm_phy_write_misc(phydev, DSP_TAP10, 0x011b);
-- 
2.5.2

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[PATCH v3 4/5] net: phy: Broadcom Cygnus internal Etherent PHY driver

[Arun Parameswaran]

Add support for the Broadcom Cygnus SoCs internal PHY's.
The PHYs are 1000M/100M/10M capable with support for 'EEE'
and 'APD' (Auto Power Down).

This driver supports the following Broadcom Cygnus SoCs:
 - BCM583XX (BCM58300, BCM58302, BCM58303, BCM58305)
 - BCM113XX (BCM11300, BCM11320, BCM11350, BCM11360)

The PHY's on these SoC's require some workarounds for
stable operation, both during configuration time and
during suspend/resume. This driver handles the
application of the workarounds.

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/Kconfig  |  13 
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/bcm-cygnus.c | 158 +++
 include/linux/brcmphy.h  |   7 ++
 4 files changed, 179 insertions(+)
 create mode 100644 drivers/net/phy/bcm-cygnus.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 606fdc9..9d097ae 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -79,6 +79,19 @@ config BROADCOM_PHY
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
 
+config BCM_CYGNUS_PHY
+   tristate "Drivers for Broadcom Cygnus SoC internal PHY"
+   depends on ARCH_BCM_CYGNUS || COMPILE_TEST
+   depends on MDIO_BCM_IPROC
+   select BCM_NET_PHYLIB
+   ---help---
+ This PHY driver is for the 1G internal PHYs of the Broadcom
+ Cygnus Family SoC.
+
+ Currently supports internal PHY's used in the BCM11300,
+ BCM11320, BCM11350, BCM11360, BCM58300, BCM58302,
+ BCM58303 & BCM58305 Broadcom Cygnus SoCs.
+
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 6932475..7655d47 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_BROADCOM_PHY)+= broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
 obj-$(CONFIG_BCM87XX_PHY)  += bcm87xx.o
+obj-$(CONFIG_BCM_CYGNUS_PHY)   += bcm-cygnus.o
 obj-$(CONFIG_ICPLUS_PHY)   += icplus.o
 obj-$(CONFIG_REALTEK_PHY)  += realtek.o
 obj-$(CONFIG_LSI_ET1011C_PHY)  += et1011c.o
diff --git a/drivers/net/phy/bcm-cygnus.c b/drivers/net/phy/bcm-cygnus.c
new file mode 100644
index 000..49bbc68
--- /dev/null
+++ b/drivers/net/phy/bcm-cygnus.c
@@ -0,0 +1,158 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* Broadcom Cygnus SoC internal transceivers support. */
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+/* Broadcom Cygnus Phy specific registers */
+#define MII_BCM_CYGNUS_AFE_VDAC_ICTRL_0  0x91E5 /* VDAL Control register */
+
+static int bcm_cygnus_afe_config(struct phy_device *phydev)
+{
+   int rc;
+
+   /* ensure smdspclk is enabled */
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, 0x0c30);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_VDAC_ICTRL_0 bit 7:4 Iq=1100 for 1g 10bt, normal modes */
+   rc = bcm_phy_write_misc(phydev, 0x39, 0x01, 0xA7C8);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_HPF_TRIM_OTHERS bit11=1, short cascode enable for all modes*/
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x00, 0x0803);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_TX_CONFIG_1 bit 7:4 Iq=1100 for test modes */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x01, 0xA740);
+   if (rc < 0)
+   return rc;
+
+   /* AFE TEMPSEN_OTHERS rcal_HT, rcal_LT 1 */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x03, 0x8400);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_FUTURE_RSV bit 2:0 rccal <2:0>=100 */
+   rc = bcm_phy_write_misc(phydev, 0x3B, 0x00, 0x0004);
+   if (rc < 0)
+   return rc;
+
+   /* Adjust bias current trim to overcome digital offSet */
+   rc = phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x02);
+   if (rc < 0)
+   return rc;
+
+   /* make rcal=100, since rdb default is 000 */
+   rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB1, 0x10);
+   if (rc < 0)
+   return rc;
+
+   /* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */
+   rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB0, 0x10);
+   if (rc < 0)
+   return rc;
+
+   /* CORE_EXPB0, Disable Reset R_CAL/RC_CAL Engine */
+   

Re: [PATCH v2 4/5] net: phy: Broadcom Cygnus internal Etherent PHY driver

[Arun Parameswaran]

On 15-09-30 09:04 PM, kbuild test robot wrote:
> Hi Arun,
>
> [auto build test results on v4.3-rc3 -- if it's inappropriate base, please 
> ignore]
>
> config: um-allyesconfig (attached as .config)
> reproduce:
> git checkout 0560b94805aa3bb38439b4f72b776d85d2aac394
> # save the attached .config to linux build tree
> make ARCH=um 
>
> All warnings (new ones prefixed by >>):
>
> warning: (BCM_CYGNUS_PHY) selects MDIO_BCM_IPROC which has unmet direct 
> dependencies (NETDEVICES && PHYLIB && (ARCH_BCM_IPROC || COMPILE_TEST) && 
> HAS_IOMEM && OF_MDIO)

Fixing this warning.
Changing from 'select MDIO_BCM_IPROC' to using 'depends on MDIO_BCM_IPROC' in 
the Cygnus PHY driver.

> ---
> 0-DAY kernel test infrastructureOpen Source Technology Center
> https://lists.01.org/pipermail/kbuild-all   Intel Corporation

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[PATCH v3 3/5] net: phy: Add Broadcom phy library for common interfaces

[Arun Parameswaran]

This patch adds the Broadcom phy library to consolidate common
interfaces shared by Broadcom phy's.

Moved the common interfaces to the 'bcm-phy-lib.c' and updated
the Broadcom PHY drivers to use the new APIs.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/Kconfig   |   6 ++
 drivers/net/phy/Makefile  |   1 +
 drivers/net/phy/bcm-phy-lib.c | 209 ++
 drivers/net/phy/bcm-phy-lib.h |  37 
 drivers/net/phy/bcm63xx.c |  38 +---
 drivers/net/phy/bcm7xxx.c | 127 ++---
 drivers/net/phy/broadcom.c| 149 +-
 include/linux/brcmphy.h   |  22 +
 8 files changed, 333 insertions(+), 256 deletions(-)
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index b57f6c2..606fdc9 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -69,8 +69,12 @@ config SMSC_PHY
---help---
  Currently supports the LAN83C185, LAN8187 and LAN8700 PHYs
 
+config BCM_NET_PHYLIB
+   tristate
+
 config BROADCOM_PHY
tristate "Drivers for Broadcom PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
@@ -78,11 +82,13 @@ config BROADCOM_PHY
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
+   select BCM_NET_PHYLIB
---help---
  Currently supports the 6348 and 6358 PHYs.
 
 config BCM7XXX_PHY
tristate "Drivers for Broadcom 7xxx SOCs internal PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM7366, BCM7439, BCM7445, and
  40nm and 65nm generation of BCM7xxx Set Top Box SoCs.
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index f4e6eb9..6932475 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_QSEMI_PHY)   += qsemi.o
 obj-$(CONFIG_SMSC_PHY) += smsc.o
 obj-$(CONFIG_TERANETICS_PHY)   += teranetics.o
 obj-$(CONFIG_VITESSE_PHY)  += vitesse.o
+obj-$(CONFIG_BCM_NET_PHYLIB)   += bcm-phy-lib.o
 obj-$(CONFIG_BROADCOM_PHY) += broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
new file mode 100644
index 000..13e161e
--- /dev/null
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+#define MII_BCM_CHANNEL_WIDTH 0x2000
+#define BCM_CL45VEN_EEE_ADV   0x3c
+
+int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
+{
+   int rc;
+
+   rc = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (rc < 0)
+   return rc;
+
+   return phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_exp);
+
+int bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
+{
+   int val;
+
+   val = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (val < 0)
+   return val;
+
+   val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
+
+   /* Restore default value.  It's O.K. if this write fails. */
+   phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
+
+   return val;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_read_exp);
+
+int bcm_phy_write_misc(struct phy_device *phydev,
+  u16 reg, u16 chl, u16 val)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
+   if (rc < 0)
+   return rc;
+
+   tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL);
+   tmp |= MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA;
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, tmp);
+   if (rc < 0)
+   return rc;
+
+   tmp = (chl * MII_BCM_CHANNEL_WIDTH) | reg;
+   rc = bcm_phy_write_exp(phydev, tmp, val);
+
+   return rc;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_misc);
+
+int bcm_phy_read_misc(struct phy_device *phydev,
+ u16 reg, u16 chl)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM5

[PATCH v3 2/5] net: phy: Broadcom iProc MDIO bus driver

[Arun Parameswaran]

This patch adds support for the Broadcom iProc MDIO bus interface.
The MDIO interface can be found in the Broadcom iProc family Soc's.

The MDIO bus is accessed using a combination of command and data
registers. This MDIO driver provides access to the Etherent GPHY's
connected to the MDIO bus.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/Kconfig  |   9 ++
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/mdio-bcm-iproc.c | 213 +++
 3 files changed, 223 insertions(+)
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index c5ad98a..b57f6c2 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -225,6 +225,15 @@ config MDIO_BCM_UNIMAC
  This hardware can be found in the Broadcom GENET Ethernet MAC
  controllers as well as some Broadcom Ethernet switches such as the
  Starfighter 2 switches.
+
+config MDIO_BCM_IPROC
+   tristate "Broadcom iProc MDIO bus controller"
+   depends on ARCH_BCM_IPROC || COMPILE_TEST
+   depends on HAS_IOMEM && OF_MDIO
+   help
+ This module provides a driver for the MDIO busses found in the
+ Broadcom iProc SoC's.
+
 endif # PHYLIB
 
 config MICREL_KS8995MA
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 87f079c..f4e6eb9 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_MDIO_SUN4I)  += mdio-sun4i.o
 obj-$(CONFIG_MDIO_MOXART)  += mdio-moxart.o
 obj-$(CONFIG_MDIO_BCM_UNIMAC)  += mdio-bcm-unimac.o
 obj-$(CONFIG_MICROCHIP_PHY)+= microchip.o
+obj-$(CONFIG_MDIO_BCM_IPROC)   += mdio-bcm-iproc.o
diff --git a/drivers/net/phy/mdio-bcm-iproc.c b/drivers/net/phy/mdio-bcm-iproc.c
new file mode 100644
index 000..c0b4e65
--- /dev/null
+++ b/drivers/net/phy/mdio-bcm-iproc.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define IPROC_GPHY_MDCDIV0x1a
+
+#define MII_CTRL_OFFSET  0x000
+
+#define MII_CTRL_DIV_SHIFT   0
+#define MII_CTRL_PRE_SHIFT   7
+#define MII_CTRL_BUSY_SHIFT  8
+
+#define MII_DATA_OFFSET  0x004
+#define MII_DATA_MASK0x
+#define MII_DATA_TA_SHIFT16
+#define MII_DATA_TA_VAL  2
+#define MII_DATA_RA_SHIFT18
+#define MII_DATA_PA_SHIFT23
+#define MII_DATA_OP_SHIFT28
+#define MII_DATA_OP_WRITE1
+#define MII_DATA_OP_READ 2
+#define MII_DATA_SB_SHIFT30
+
+struct iproc_mdio_priv {
+   struct mii_bus *mii_bus;
+   void __iomem *base;
+};
+
+static inline int iproc_mdio_wait_for_idle(void __iomem *base)
+{
+   u32 val;
+   unsigned int timeout = 1000; /* loop for 1s */
+
+   do {
+   val = readl(base + MII_CTRL_OFFSET);
+   if ((val & BIT(MII_CTRL_BUSY_SHIFT)) == 0)
+   return 0;
+
+   usleep_range(1000, 2000);
+   } while (timeout--);
+
+   return -ETIMEDOUT;
+}
+
+static inline void iproc_mdio_config_clk(void __iomem *base)
+{
+   u32 val;
+
+   val = (IPROC_GPHY_MDCDIV << MII_CTRL_DIV_SHIFT) |
+ BIT(MII_CTRL_PRE_SHIFT);
+   writel(val, base + MII_CTRL_OFFSET);
+}
+
+static int iproc_mdio_read(struct mii_bus *bus, int phy_id, int reg)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   iproc_mdio_config_clk(priv->base);
+
+   /* Prepare the read operation */
+   cmd = (MII_DATA_TA_VAL << MII_DATA_TA_SHIFT) |
+   (reg << MII_DATA_RA_SHIFT) |
+   (phy_id << MII_DATA_PA_SHIFT) |
+   BIT(MII_DATA_SB_SHIFT) |
+   (MII_DATA_OP_READ << MII_DATA_OP_SHIFT);
+
+   writel(cmd, priv->base + MII_DATA_OFFSET);
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   cmd = readl(priv->base + MII_DATA_OFFSET) & MII_DATA_MASK;
+
+   return cmd;
+}
+
+static int iproc_mdio_write(struct mii_bus *bus, int phy_id,
+   int reg, u16 val)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (

[PATCH v3 0/5] Add support for Broadcom's iProc MDIO and Cygnus Ethernet PHY

[Arun Parameswaran]

Hi
This patchset adds support for the iProc MDIO interface and the
Broadcom Cygnus SoC's internal Ethernet PHY.

The internal Ethernet PHY(s) in the Cygnus SoC's are accessed
via the MDIO interface found in most of the iProc based chips.

The patch also consolidates the common API's used by the
Broadcom phys to a common library. Existing Broadcom phy
drivers have been modified to use the common library API's.

This patch series is based on Linux v4.3-rc1 and is avaliable in:
https://github.com/Broadcom/cygnus-linux/tree/cygnus-net-phy-mdio-v3

The Ethernet driver for the iProc family will be submitted soon,
as will the device tree configurations for the different iProc
family SoCs.

Changes from v2:
- Modified drivers/net/phy/Kconfig to modify the BCM_CYGNUS_PHY
  driver to 'depends on MDIO_BCM_IPROC' instead of 'select'.
- Added github branch to the cover letter

Changes from v1:
- Updated device tree documentation for the iProc MDIO driver
  based on Florian's feedback.
- Moved the core register defines from the Cygnus PHY driver to
  'include/linux/brcmphy.h' based on Florian's feedback.
- Created a new patch/commit to modify the bcm7xxx phy driver
  to use the new core register defines.
- Modified the Kconfig entry for the Broadcom PHY library to
  'tristate' instead of 'bool'

Arun Parameswaran (5):
  dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding
  net: phy: Broadcom iProc MDIO bus driver
  net: phy: Add Broadcom phy library for common interfaces
  net: phy: Broadcom Cygnus internal Etherent PHY driver
  net: phy: bcm7xxx: Modified to use global core register defines

 .../devicetree/bindings/net/brcm,iproc-mdio.txt|  23 +++
 drivers/net/phy/Kconfig|  28 +++
 drivers/net/phy/Makefile   |   3 +
 drivers/net/phy/bcm-cygnus.c   | 158 +++
 drivers/net/phy/bcm-phy-lib.c  | 209 
 drivers/net/phy/bcm-phy-lib.h  |  37 
 drivers/net/phy/bcm63xx.c  |  38 +---
 drivers/net/phy/bcm7xxx.c  | 136 +++--
 drivers/net/phy/broadcom.c | 149 +-
 drivers/net/phy/mdio-bcm-iproc.c   | 213 +
 include/linux/brcmphy.h|  29 +--
 11 files changed, 761 insertions(+), 262 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
 create mode 100644 drivers/net/phy/bcm-cygnus.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

-- 
2.5.2

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[PATCH v3 1/5] dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding

[Arun Parameswaran]

Add device tree binding documentation for the Broadcom iProc MDIO
bus driver.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 .../devicetree/bindings/net/brcm,iproc-mdio.txt| 23 ++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt

diff --git a/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt 
b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
new file mode 100644
index 000..8ba9ed1
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
@@ -0,0 +1,23 @@
+* Broadcom iProc MDIO bus controller
+
+Required properties:
+- compatible: should be "brcm,iproc-mdio"
+- reg: address and length of the register set for the MDIO interface
+- #size-cells: must be 1
+- #address-cells: must be 0
+
+Child nodes of this MDIO bus controller node are standard Ethernet PHY device
+nodes as described in Documentation/devicetree/bindings/net/phy.txt
+
+Example:
+
+mdio@18002000 {
+   compatible = "brcm,iproc-mdio";
+   reg = <0x18002000 0x8>;
+   #size-cells = <1>;
+   #address-cells = <0>;
+
+   enet-gphy@0 {
+   reg = <0>;
+   };
+};
-- 
2.5.2

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[PATCH v3 4/5] net: phy: Broadcom Cygnus internal Etherent PHY driver

[Arun Parameswaran]

Add support for the Broadcom Cygnus SoCs internal PHY's.
The PHYs are 1000M/100M/10M capable with support for 'EEE'
and 'APD' (Auto Power Down).

This driver supports the following Broadcom Cygnus SoCs:
 - BCM583XX (BCM58300, BCM58302, BCM58303, BCM58305)
 - BCM113XX (BCM11300, BCM11320, BCM11350, BCM11360)

The PHY's on these SoC's require some workarounds for
stable operation, both during configuration time and
during suspend/resume. This driver handles the
application of the workarounds.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/Kconfig  |  13 
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/bcm-cygnus.c | 158 +++
 include/linux/brcmphy.h  |   7 ++
 4 files changed, 179 insertions(+)
 create mode 100644 drivers/net/phy/bcm-cygnus.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 606fdc9..9d097ae 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -79,6 +79,19 @@ config BROADCOM_PHY
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
 
+config BCM_CYGNUS_PHY
+   tristate "Drivers for Broadcom Cygnus SoC internal PHY"
+   depends on ARCH_BCM_CYGNUS || COMPILE_TEST
+   depends on MDIO_BCM_IPROC
+   select BCM_NET_PHYLIB
+   ---help---
+ This PHY driver is for the 1G internal PHYs of the Broadcom
+ Cygnus Family SoC.
+
+ Currently supports internal PHY's used in the BCM11300,
+ BCM11320, BCM11350, BCM11360, BCM58300, BCM58302,
+ BCM58303 & BCM58305 Broadcom Cygnus SoCs.
+
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 6932475..7655d47 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_BROADCOM_PHY)+= broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
 obj-$(CONFIG_BCM87XX_PHY)  += bcm87xx.o
+obj-$(CONFIG_BCM_CYGNUS_PHY)   += bcm-cygnus.o
 obj-$(CONFIG_ICPLUS_PHY)   += icplus.o
 obj-$(CONFIG_REALTEK_PHY)  += realtek.o
 obj-$(CONFIG_LSI_ET1011C_PHY)  += et1011c.o
diff --git a/drivers/net/phy/bcm-cygnus.c b/drivers/net/phy/bcm-cygnus.c
new file mode 100644
index 000..49bbc68
--- /dev/null
+++ b/drivers/net/phy/bcm-cygnus.c
@@ -0,0 +1,158 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* Broadcom Cygnus SoC internal transceivers support. */
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+/* Broadcom Cygnus Phy specific registers */
+#define MII_BCM_CYGNUS_AFE_VDAC_ICTRL_0  0x91E5 /* VDAL Control register */
+
+static int bcm_cygnus_afe_config(struct phy_device *phydev)
+{
+   int rc;
+
+   /* ensure smdspclk is enabled */
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, 0x0c30);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_VDAC_ICTRL_0 bit 7:4 Iq=1100 for 1g 10bt, normal modes */
+   rc = bcm_phy_write_misc(phydev, 0x39, 0x01, 0xA7C8);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_HPF_TRIM_OTHERS bit11=1, short cascode enable for all modes*/
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x00, 0x0803);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_TX_CONFIG_1 bit 7:4 Iq=1100 for test modes */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x01, 0xA740);
+   if (rc < 0)
+   return rc;
+
+   /* AFE TEMPSEN_OTHERS rcal_HT, rcal_LT 1 */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x03, 0x8400);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_FUTURE_RSV bit 2:0 rccal <2:0>=100 */
+   rc = bcm_phy_write_misc(phydev, 0x3B, 0x00, 0x0004);
+   if (rc < 0)
+   return rc;
+
+   /* Adjust bias current trim to overcome digital offSet */
+   rc = phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x02);
+   if (rc < 0)
+   return rc;
+
+   /* make rcal=100, since rdb default is 000 */
+   rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB1, 0x10);
+   if (rc < 0)
+   return rc;
+
+   /* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */
+   rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB0, 0x10);
+   if (rc < 0)
+   return rc;
+
+   /* CORE_EXPB0, Disable Reset R_CA

[PATCH v3 5/5] net: phy: bcm7xxx: Modified to use global core register defines

[Arun Parameswaran]

Modified the bcm7xxx phy driver to remove local core register
defines and use the common ones from "include/linux/brcmphy.h"

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/bcm7xxx.c | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index efa31a6..03d4809 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -25,7 +25,6 @@
 #define MII_BCM7XXX_100TX_DISC 0x14
 #define MII_BCM7XXX_AUX_MODE   0x1d
 #define  MII_BCM7XX_64CLK_MDIO BIT(12)
-#define MII_BCM7XXX_CORE_BASE1E0x1e
 #define MII_BCM7XXX_TEST   0x1f
 #define  MII_BCM7XXX_SHD_MODE_2BIT(2)
 
@@ -46,8 +45,6 @@
 #define AFE_VDAC_OTHERS_0  MISC_ADDR(0x39, 3)
 #define AFE_HPF_TRIM_OTHERSMISC_ADDR(0x3a, 0)
 
-#define CORE_EXPB0 0xb0
-
 static void r_rc_cal_reset(struct phy_device *phydev)
 {
/* Reset R_CAL/RC_CAL Engine */
@@ -76,7 +73,7 @@ static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device 
*phydev)
bcm_phy_write_misc(phydev, DSP_TAP10, 0x690b);
 
/* Switch to CORE_BASE1E */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0xd);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0xd);
 
r_rc_cal_reset(phydev);
 
@@ -127,7 +124,7 @@ static int bcm7xxx_28nm_d0_afe_config_init(struct 
phy_device *phydev)
bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
 
/* CORE_BASE1E, force trim to overwrite and set I_ext trim to  */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010);
 
/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
bcm_phy_write_misc(phydev, DSP_TAP10, 0x011b);
@@ -155,7 +152,7 @@ static int bcm7xxx_28nm_e0_plus_afe_config_init(struct 
phy_device *phydev)
bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
 
/* CORE_BASE1E, force trim to overwrite and set I_ext trim to  */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010);
 
/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
bcm_phy_write_misc(phydev, DSP_TAP10, 0x011b);
-- 
2.5.2

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Re: [PATCH v2 4/5] net: phy: Broadcom Cygnus internal Etherent PHY driver

[Arun Parameswaran]

On 15-09-30 09:04 PM, kbuild test robot wrote:
> Hi Arun,
>
> [auto build test results on v4.3-rc3 -- if it's inappropriate base, please 
> ignore]
>
> config: um-allyesconfig (attached as .config)
> reproduce:
> git checkout 0560b94805aa3bb38439b4f72b776d85d2aac394
> # save the attached .config to linux build tree
> make ARCH=um 
>
> All warnings (new ones prefixed by >>):
>
> warning: (BCM_CYGNUS_PHY) selects MDIO_BCM_IPROC which has unmet direct 
> dependencies (NETDEVICES && PHYLIB && (ARCH_BCM_IPROC || COMPILE_TEST) && 
> HAS_IOMEM && OF_MDIO)

Fixing this warning.
Changing from 'select MDIO_BCM_IPROC' to using 'depends on MDIO_BCM_IPROC' in 
the Cygnus PHY driver.

> ---
> 0-DAY kernel test infrastructureOpen Source Technology Center
> https://lists.01.org/pipermail/kbuild-all   Intel Corporation

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[PATCH v2 2/5] net: phy: Broadcom iProc MDIO bus driver

[Arun Parameswaran]

This patch adds support for the Broadcom iProc MDIO bus interface.
The MDIO interface can be found in the Broadcom iProc family Soc's.

The MDIO bus is accessed using a combination of command and data
registers. This MDIO driver provides access to the Etherent GPHY's
connected to the MDIO bus.

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/Kconfig  |   9 ++
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/mdio-bcm-iproc.c | 213 +++
 3 files changed, 223 insertions(+)
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index c5ad98a..b57f6c2 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -225,6 +225,15 @@ config MDIO_BCM_UNIMAC
  This hardware can be found in the Broadcom GENET Ethernet MAC
  controllers as well as some Broadcom Ethernet switches such as the
  Starfighter 2 switches.
+
+config MDIO_BCM_IPROC
+   tristate "Broadcom iProc MDIO bus controller"
+   depends on ARCH_BCM_IPROC || COMPILE_TEST
+   depends on HAS_IOMEM && OF_MDIO
+   help
+ This module provides a driver for the MDIO busses found in the
+ Broadcom iProc SoC's.
+
 endif # PHYLIB
 
 config MICREL_KS8995MA
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 87f079c..f4e6eb9 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_MDIO_SUN4I)  += mdio-sun4i.o
 obj-$(CONFIG_MDIO_MOXART)  += mdio-moxart.o
 obj-$(CONFIG_MDIO_BCM_UNIMAC)  += mdio-bcm-unimac.o
 obj-$(CONFIG_MICROCHIP_PHY)+= microchip.o
+obj-$(CONFIG_MDIO_BCM_IPROC)   += mdio-bcm-iproc.o
diff --git a/drivers/net/phy/mdio-bcm-iproc.c b/drivers/net/phy/mdio-bcm-iproc.c
new file mode 100644
index 000..c0b4e65
--- /dev/null
+++ b/drivers/net/phy/mdio-bcm-iproc.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define IPROC_GPHY_MDCDIV0x1a
+
+#define MII_CTRL_OFFSET  0x000
+
+#define MII_CTRL_DIV_SHIFT   0
+#define MII_CTRL_PRE_SHIFT   7
+#define MII_CTRL_BUSY_SHIFT  8
+
+#define MII_DATA_OFFSET  0x004
+#define MII_DATA_MASK0x
+#define MII_DATA_TA_SHIFT16
+#define MII_DATA_TA_VAL  2
+#define MII_DATA_RA_SHIFT18
+#define MII_DATA_PA_SHIFT23
+#define MII_DATA_OP_SHIFT28
+#define MII_DATA_OP_WRITE1
+#define MII_DATA_OP_READ 2
+#define MII_DATA_SB_SHIFT30
+
+struct iproc_mdio_priv {
+   struct mii_bus *mii_bus;
+   void __iomem *base;
+};
+
+static inline int iproc_mdio_wait_for_idle(void __iomem *base)
+{
+   u32 val;
+   unsigned int timeout = 1000; /* loop for 1s */
+
+   do {
+   val = readl(base + MII_CTRL_OFFSET);
+   if ((val & BIT(MII_CTRL_BUSY_SHIFT)) == 0)
+   return 0;
+
+   usleep_range(1000, 2000);
+   } while (timeout--);
+
+   return -ETIMEDOUT;
+}
+
+static inline void iproc_mdio_config_clk(void __iomem *base)
+{
+   u32 val;
+
+   val = (IPROC_GPHY_MDCDIV << MII_CTRL_DIV_SHIFT) |
+ BIT(MII_CTRL_PRE_SHIFT);
+   writel(val, base + MII_CTRL_OFFSET);
+}
+
+static int iproc_mdio_read(struct mii_bus *bus, int phy_id, int reg)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   iproc_mdio_config_clk(priv->base);
+
+   /* Prepare the read operation */
+   cmd = (MII_DATA_TA_VAL << MII_DATA_TA_SHIFT) |
+   (reg << MII_DATA_RA_SHIFT) |
+   (phy_id << MII_DATA_PA_SHIFT) |
+   BIT(MII_DATA_SB_SHIFT) |
+   (MII_DATA_OP_READ << MII_DATA_OP_SHIFT);
+
+   writel(cmd, priv->base + MII_DATA_OFFSET);
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   cmd = readl(priv->base + MII_DATA_OFFSET) & MII_DATA_MASK;
+
+   return cmd;
+}
+
+static int iproc_mdio_write(struct mii_bus *bus, int phy_id,
+   int reg, u16 val)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return

[PATCH v2 1/5] dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding

[Arun Parameswaran]

Add device tree binding documentation for the Broadcom iProc MDIO
bus driver.

Signed-off-by: Arun Parameswaran 
---
 .../devicetree/bindings/net/brcm,iproc-mdio.txt| 23 ++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt

diff --git a/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt 
b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
new file mode 100644
index 000..8ba9ed1
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
@@ -0,0 +1,23 @@
+* Broadcom iProc MDIO bus controller
+
+Required properties:
+- compatible: should be "brcm,iproc-mdio"
+- reg: address and length of the register set for the MDIO interface
+- #size-cells: must be 1
+- #address-cells: must be 0
+
+Child nodes of this MDIO bus controller node are standard Ethernet PHY device
+nodes as described in Documentation/devicetree/bindings/net/phy.txt
+
+Example:
+
+mdio@18002000 {
+   compatible = "brcm,iproc-mdio";
+   reg = <0x18002000 0x8>;
+   #size-cells = <1>;
+   #address-cells = <0>;
+
+   enet-gphy@0 {
+   reg = <0>;
+   };
+};
-- 
2.5.2

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[PATCH v2 3/5] net: phy: Add Broadcom phy library for common interfaces

[Arun Parameswaran]

This patch adds the Broadcom phy library to consolidate common
interfaces shared by Broadcom phy's.

Moved the common interfaces to the 'bcm-phy-lib.c' and updated
the Broadcom PHY drivers to use the new APIs.

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/Kconfig   |   6 ++
 drivers/net/phy/Makefile  |   1 +
 drivers/net/phy/bcm-phy-lib.c | 209 ++
 drivers/net/phy/bcm-phy-lib.h |  37 
 drivers/net/phy/bcm63xx.c |  38 +---
 drivers/net/phy/bcm7xxx.c | 127 ++---
 drivers/net/phy/broadcom.c| 149 +-
 include/linux/brcmphy.h   |  22 +
 8 files changed, 333 insertions(+), 256 deletions(-)
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index b57f6c2..606fdc9 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -69,8 +69,12 @@ config SMSC_PHY
---help---
  Currently supports the LAN83C185, LAN8187 and LAN8700 PHYs
 
+config BCM_NET_PHYLIB
+   tristate
+
 config BROADCOM_PHY
tristate "Drivers for Broadcom PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
@@ -78,11 +82,13 @@ config BROADCOM_PHY
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
+   select BCM_NET_PHYLIB
---help---
  Currently supports the 6348 and 6358 PHYs.
 
 config BCM7XXX_PHY
tristate "Drivers for Broadcom 7xxx SOCs internal PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM7366, BCM7439, BCM7445, and
  40nm and 65nm generation of BCM7xxx Set Top Box SoCs.
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index f4e6eb9..6932475 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_QSEMI_PHY)   += qsemi.o
 obj-$(CONFIG_SMSC_PHY) += smsc.o
 obj-$(CONFIG_TERANETICS_PHY)   += teranetics.o
 obj-$(CONFIG_VITESSE_PHY)  += vitesse.o
+obj-$(CONFIG_BCM_NET_PHYLIB)   += bcm-phy-lib.o
 obj-$(CONFIG_BROADCOM_PHY) += broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
new file mode 100644
index 000..13e161e
--- /dev/null
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+#define MII_BCM_CHANNEL_WIDTH 0x2000
+#define BCM_CL45VEN_EEE_ADV   0x3c
+
+int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
+{
+   int rc;
+
+   rc = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (rc < 0)
+   return rc;
+
+   return phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_exp);
+
+int bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
+{
+   int val;
+
+   val = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (val < 0)
+   return val;
+
+   val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
+
+   /* Restore default value.  It's O.K. if this write fails. */
+   phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
+
+   return val;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_read_exp);
+
+int bcm_phy_write_misc(struct phy_device *phydev,
+  u16 reg, u16 chl, u16 val)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
+   if (rc < 0)
+   return rc;
+
+   tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL);
+   tmp |= MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA;
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, tmp);
+   if (rc < 0)
+   return rc;
+
+   tmp = (chl * MII_BCM_CHANNEL_WIDTH) | reg;
+   rc = bcm_phy_write_exp(phydev, tmp, val);
+
+   return rc;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_misc);
+
+int bcm_phy_read_misc(struct phy_device *phydev,
+ u16 reg, u16 chl)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM54XX_AUXCTL_SHDWSEL_MISC)

[PATCH v2 5/5] net: phy: bcm7xxx: Modified to use global core register defines

[Arun Parameswaran]

Modified the bcm7xxx phy driver to remove local core register
defines and use the common ones from "include/linux/brcmphy.h"

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/bcm7xxx.c | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index efa31a6..03d4809 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -25,7 +25,6 @@
 #define MII_BCM7XXX_100TX_DISC 0x14
 #define MII_BCM7XXX_AUX_MODE   0x1d
 #define  MII_BCM7XX_64CLK_MDIO BIT(12)
-#define MII_BCM7XXX_CORE_BASE1E0x1e
 #define MII_BCM7XXX_TEST   0x1f
 #define  MII_BCM7XXX_SHD_MODE_2BIT(2)
 
@@ -46,8 +45,6 @@
 #define AFE_VDAC_OTHERS_0  MISC_ADDR(0x39, 3)
 #define AFE_HPF_TRIM_OTHERSMISC_ADDR(0x3a, 0)
 
-#define CORE_EXPB0 0xb0
-
 static void r_rc_cal_reset(struct phy_device *phydev)
 {
/* Reset R_CAL/RC_CAL Engine */
@@ -76,7 +73,7 @@ static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device 
*phydev)
bcm_phy_write_misc(phydev, DSP_TAP10, 0x690b);
 
/* Switch to CORE_BASE1E */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0xd);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0xd);
 
r_rc_cal_reset(phydev);
 
@@ -127,7 +124,7 @@ static int bcm7xxx_28nm_d0_afe_config_init(struct 
phy_device *phydev)
bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
 
/* CORE_BASE1E, force trim to overwrite and set I_ext trim to  */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010);
 
/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
bcm_phy_write_misc(phydev, DSP_TAP10, 0x011b);
@@ -155,7 +152,7 @@ static int bcm7xxx_28nm_e0_plus_afe_config_init(struct 
phy_device *phydev)
bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
 
/* CORE_BASE1E, force trim to overwrite and set I_ext trim to  */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010);
 
/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
bcm_phy_write_misc(phydev, DSP_TAP10, 0x011b);
-- 
2.5.2

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[PATCH v2 4/5] net: phy: Broadcom Cygnus internal Etherent PHY driver

[Arun Parameswaran]

Add support for the Broadcom Cygnus SoCs internal PHY's.
The PHYs are 1000M/100M/10M capable with support for 'EEE'
and 'APD' (Auto Power Down).

This driver supports the following Broadcom Cygnus SoCs:
 - BCM583XX (BCM58300, BCM58302, BCM58303, BCM58305)
 - BCM113XX (BCM11300, BCM11320, BCM11350, BCM11360)

The PHY's on these SoC's require some workarounds for
stable operation, both during configuration time and
during suspend/resume. This driver handles the
application of the workarounds.

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/Kconfig  |  13 
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/bcm-cygnus.c | 158 +++
 include/linux/brcmphy.h  |   7 ++
 4 files changed, 179 insertions(+)
 create mode 100644 drivers/net/phy/bcm-cygnus.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 606fdc9..571ae38 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -79,6 +79,19 @@ config BROADCOM_PHY
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
 
+config BCM_CYGNUS_PHY
+   tristate "Drivers for Broadcom Cygnus SoC internal PHY"
+   depends on ARCH_BCM_CYGNUS || COMPILE_TEST
+   select BCM_NET_PHYLIB
+   select MDIO_BCM_IPROC
+   ---help---
+ This PHY driver is for the 1G internal PHYs of the Broadcom
+ Cygnus Family SoC.
+
+ Currently supports internal PHY's used in the BCM11300,
+ BCM11320, BCM11350, BCM11360, BCM58300, BCM58302,
+ BCM58303 & BCM58305 Broadcom Cygnus SoCs.
+
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 6932475..7655d47 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_BROADCOM_PHY)+= broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
 obj-$(CONFIG_BCM87XX_PHY)  += bcm87xx.o
+obj-$(CONFIG_BCM_CYGNUS_PHY)   += bcm-cygnus.o
 obj-$(CONFIG_ICPLUS_PHY)   += icplus.o
 obj-$(CONFIG_REALTEK_PHY)  += realtek.o
 obj-$(CONFIG_LSI_ET1011C_PHY)  += et1011c.o
diff --git a/drivers/net/phy/bcm-cygnus.c b/drivers/net/phy/bcm-cygnus.c
new file mode 100644
index 000..49bbc68
--- /dev/null
+++ b/drivers/net/phy/bcm-cygnus.c
@@ -0,0 +1,158 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* Broadcom Cygnus SoC internal transceivers support. */
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+/* Broadcom Cygnus Phy specific registers */
+#define MII_BCM_CYGNUS_AFE_VDAC_ICTRL_0  0x91E5 /* VDAL Control register */
+
+static int bcm_cygnus_afe_config(struct phy_device *phydev)
+{
+   int rc;
+
+   /* ensure smdspclk is enabled */
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, 0x0c30);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_VDAC_ICTRL_0 bit 7:4 Iq=1100 for 1g 10bt, normal modes */
+   rc = bcm_phy_write_misc(phydev, 0x39, 0x01, 0xA7C8);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_HPF_TRIM_OTHERS bit11=1, short cascode enable for all modes*/
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x00, 0x0803);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_TX_CONFIG_1 bit 7:4 Iq=1100 for test modes */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x01, 0xA740);
+   if (rc < 0)
+   return rc;
+
+   /* AFE TEMPSEN_OTHERS rcal_HT, rcal_LT 1 */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x03, 0x8400);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_FUTURE_RSV bit 2:0 rccal <2:0>=100 */
+   rc = bcm_phy_write_misc(phydev, 0x3B, 0x00, 0x0004);
+   if (rc < 0)
+   return rc;
+
+   /* Adjust bias current trim to overcome digital offSet */
+   rc = phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x02);
+   if (rc < 0)
+   return rc;
+
+   /* make rcal=100, since rdb default is 000 */
+   rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB1, 0x10);
+   if (rc < 0)
+   return rc;
+
+   /* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */
+   rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB0, 0x10);
+   if (rc < 0)
+   return rc;
+
+   /* CORE_EXPB0, Disable Reset R_CAL/RC_CAL Engine */
+   rc = bcm_phy_w

[PATCH v2 0/5] Add support for Broadcom's iProc MDIO and Cygnus Ethernet PHY

[Arun Parameswaran]

Hi
This patchset adds support for the iProc MDIO interface and the
Broadcom Cygnus SoC's internal Ethernet PHY.

The internal Ethernet PHY(s) in the Cygnus SoC's are accessed
via the MDIO interface found in most of the iProc based chips.

The patch also consolidates the common API's used by the
Broadcom phys to a common library. Existing Broadcom phy
drivers have been modified to use the common library API's.

The Ethernet driver for the iProc family will be submitted soon,
as will the device tree configurations for the different iProc
family SoCs.

Changes from v1:
- Updated device tree documentation for the iProc MDIO driver
  based on Florian's feedback.
- Moved the core register defines from the Cygnus PHY driver to
  'include/linux/brcmphy.h' based on Florian's feedback.
- Created a new patch/commit to modify the bcm7xxx phy driver
  to use the new core register defines.
- Modified the Kconfig entry for the Broadcom PHY library to
  'tristate' instead of 'bool'

Arun Parameswaran (5):
  dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding
  net: phy: Broadcom iProc MDIO bus driver
  net: phy: Add Broadcom phy library for common interfaces
  net: phy: Broadcom Cygnus internal Etherent PHY driver
  net: phy: bcm7xxx: Modified to use global core register defines

 .../devicetree/bindings/net/brcm,iproc-mdio.txt|  23 +++
 drivers/net/phy/Kconfig|  28 +++
 drivers/net/phy/Makefile   |   3 +
 drivers/net/phy/bcm-cygnus.c   | 158 +++
 drivers/net/phy/bcm-phy-lib.c  | 209 
 drivers/net/phy/bcm-phy-lib.h  |  37 
 drivers/net/phy/bcm63xx.c  |  38 +---
 drivers/net/phy/bcm7xxx.c  | 136 +++--
 drivers/net/phy/broadcom.c | 149 +-
 drivers/net/phy/mdio-bcm-iproc.c   | 213 +
 include/linux/brcmphy.h|  29 +--
 11 files changed, 761 insertions(+), 262 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
 create mode 100644 drivers/net/phy/bcm-cygnus.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

-- 
2.5.2

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Re: [PATCH 1/4] dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding

[Arun Parameswaran]

On 15-09-30 02:36 PM, Florian Fainelli wrote:
> On 30/09/15 13:32, Arun Parameswaran wrote:
>> Add device tree binding documentation for the Broadcom iProc MDIO
>> bus driver.
>>
>> Signed-off-by: Arun Parameswaran 
>> ---
>>  .../devicetree/bindings/net/brcm,iproc-mdio.txt| 23 
>> ++
>>  1 file changed, 23 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
>>
>> diff --git a/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt 
>> b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
>> new file mode 100644
>> index 000..689f97c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
>> @@ -0,0 +1,23 @@
>> +* Broadcom iProc MDIO bus controller
>> +
>> +Required properties:
>> +- compatible: should be "brcm,iproc-mdio"
>> +- reg: address and length of the register set for the MDIO interface
>> +- #size-cells: must be 1
>> +- #address-cells: must be 0
>> +
>> +Child nodes of this MDIO bus controller node are standard Ethernet PHY 
>> device
>> +nodes as described in Documentation/devicetree/bindings/net/phy.txt
>> +
>> +Example:
>> +
>> +mdio@0x18002000 {
> Sorry for not catching this earlier, you might want to drop the leading
> 0x here from your example, other than that:
>
> Reviewed-by: Florian Fainelli 

Will fix this.

Thanks,

Arun

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Re: [PATCH 4/4] net: phy: Broadcom Cygnus internal Etherent PHY driver

[Arun Parameswaran]

On 15-09-30 02:37 PM, Florian Fainelli wrote:
> On 30/09/15 13:32, Arun Parameswaran wrote:
>> Add support for the Broadcom Cygnus SoCs internal PHY's.
>> The PHYs are 1000M/100M/10M capable with support for 'EEE'
>> and 'APD' (Auto Power Down).
>>
>> This driver supports the following Broadcom Cygnus SoCs:
>>  - BCM583XX (BCM58300, BCM58302, BCM58303, BCM58305)
>>  - BCM113XX (BCM11300, BCM11320, BCM11350, BCM11360)
>>
>> The PHY's on these SoC's require some workarounds for
>> stable operation, both during configuration time and
>> during suspend/resume. This driver handles the
>> application of the workarounds.
>>
>> Signed-off-by: Arun Parameswaran 
> Reviewed-by: Florian Fainelli 
>
> Some suggestions if you need to respin this patch series below, sorry
> for not catching that during the internal review:
>
>> +/* Broadcom Cygnus Phy specific registers */
>> +#define MII_BCM_CORE_BASE1E   0x1E /* Core BASE1E register */
>> +#define MII_BCM_EXPB0 0xB0 /* EXPB0 register */
>> +#define MII_BCM_EXPB1 0xB1 /* EXPB1 register */
> These defines could be moved to brcmphy.h for instance, since they are
> shared between all Broadcom PHY drivers AFAICT.

Ok, Will move these and modify the corresponding PHY drivers.

Thanks,
Arun


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[PATCH 0/4] Add support for Broadcom's iProc MDIO and Cygnus Ethernet PHY

[Arun Parameswaran]

Hi
This patchset adds support for the iProc MDIO interface and the
Broadcom Cygnus SoC's internal Ethernet PHY.

The internal Ethernet PHY(s) in the Cygnus SoC's are accessed
via the MDIO interface found in most of the iProc based chips.

The patch also consolidates the common API's used by the
Broadcom phys to a common library. Existing Broadcom phy
drivers have been modified to use the common library API's.

The Ethernet driver for the iProc family will be submitted soon,
as will the device tree configurations for the different iProc
family SoCs.

Arun Parameswaran (4):
  dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding
  net: phy: Broadcom iProc MDIO bus driver
  net: phy: Add Broadcom phy library for common interfaces
  net: phy: Broadcom Cygnus internal Etherent PHY driver

 .../devicetree/bindings/net/brcm,iproc-mdio.txt|  23 +++
 drivers/net/phy/Kconfig|  28 +++
 drivers/net/phy/Makefile   |   3 +
 drivers/net/phy/bcm-cygnus.c   | 162 
 drivers/net/phy/bcm-phy-lib.c  | 209 
 drivers/net/phy/bcm-phy-lib.h  |  37 
 drivers/net/phy/bcm63xx.c  |  38 +---
 drivers/net/phy/bcm7xxx.c  | 127 +++-
 drivers/net/phy/broadcom.c | 149 +-
 drivers/net/phy/mdio-bcm-iproc.c   | 213 +
 include/linux/brcmphy.h|  24 +--
 11 files changed, 757 insertions(+), 256 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
 create mode 100644 drivers/net/phy/bcm-cygnus.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

-- 
2.5.2

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[PATCH 2/4] net: phy: Broadcom iProc MDIO bus driver

[Arun Parameswaran]

This patch adds support for the Broadcom iProc MDIO bus interface.
The MDIO interface can be found in the Broadcom iProc family Soc's.

The MDIO bus is accessed using a combination of command and data
registers. This MDIO driver provides access to the Etherent GPHY's
connected to the MDIO bus.

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/Kconfig  |   9 ++
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/mdio-bcm-iproc.c | 213 +++
 3 files changed, 223 insertions(+)
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index c5ad98a..b57f6c2 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -225,6 +225,15 @@ config MDIO_BCM_UNIMAC
  This hardware can be found in the Broadcom GENET Ethernet MAC
  controllers as well as some Broadcom Ethernet switches such as the
  Starfighter 2 switches.
+
+config MDIO_BCM_IPROC
+   tristate "Broadcom iProc MDIO bus controller"
+   depends on ARCH_BCM_IPROC || COMPILE_TEST
+   depends on HAS_IOMEM && OF_MDIO
+   help
+ This module provides a driver for the MDIO busses found in the
+ Broadcom iProc SoC's.
+
 endif # PHYLIB
 
 config MICREL_KS8995MA
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 87f079c..f4e6eb9 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_MDIO_SUN4I)  += mdio-sun4i.o
 obj-$(CONFIG_MDIO_MOXART)  += mdio-moxart.o
 obj-$(CONFIG_MDIO_BCM_UNIMAC)  += mdio-bcm-unimac.o
 obj-$(CONFIG_MICROCHIP_PHY)+= microchip.o
+obj-$(CONFIG_MDIO_BCM_IPROC)   += mdio-bcm-iproc.o
diff --git a/drivers/net/phy/mdio-bcm-iproc.c b/drivers/net/phy/mdio-bcm-iproc.c
new file mode 100644
index 000..c0b4e65
--- /dev/null
+++ b/drivers/net/phy/mdio-bcm-iproc.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define IPROC_GPHY_MDCDIV0x1a
+
+#define MII_CTRL_OFFSET  0x000
+
+#define MII_CTRL_DIV_SHIFT   0
+#define MII_CTRL_PRE_SHIFT   7
+#define MII_CTRL_BUSY_SHIFT  8
+
+#define MII_DATA_OFFSET  0x004
+#define MII_DATA_MASK0x
+#define MII_DATA_TA_SHIFT16
+#define MII_DATA_TA_VAL  2
+#define MII_DATA_RA_SHIFT18
+#define MII_DATA_PA_SHIFT23
+#define MII_DATA_OP_SHIFT28
+#define MII_DATA_OP_WRITE1
+#define MII_DATA_OP_READ 2
+#define MII_DATA_SB_SHIFT30
+
+struct iproc_mdio_priv {
+   struct mii_bus *mii_bus;
+   void __iomem *base;
+};
+
+static inline int iproc_mdio_wait_for_idle(void __iomem *base)
+{
+   u32 val;
+   unsigned int timeout = 1000; /* loop for 1s */
+
+   do {
+   val = readl(base + MII_CTRL_OFFSET);
+   if ((val & BIT(MII_CTRL_BUSY_SHIFT)) == 0)
+   return 0;
+
+   usleep_range(1000, 2000);
+   } while (timeout--);
+
+   return -ETIMEDOUT;
+}
+
+static inline void iproc_mdio_config_clk(void __iomem *base)
+{
+   u32 val;
+
+   val = (IPROC_GPHY_MDCDIV << MII_CTRL_DIV_SHIFT) |
+ BIT(MII_CTRL_PRE_SHIFT);
+   writel(val, base + MII_CTRL_OFFSET);
+}
+
+static int iproc_mdio_read(struct mii_bus *bus, int phy_id, int reg)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   iproc_mdio_config_clk(priv->base);
+
+   /* Prepare the read operation */
+   cmd = (MII_DATA_TA_VAL << MII_DATA_TA_SHIFT) |
+   (reg << MII_DATA_RA_SHIFT) |
+   (phy_id << MII_DATA_PA_SHIFT) |
+   BIT(MII_DATA_SB_SHIFT) |
+   (MII_DATA_OP_READ << MII_DATA_OP_SHIFT);
+
+   writel(cmd, priv->base + MII_DATA_OFFSET);
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   cmd = readl(priv->base + MII_DATA_OFFSET) & MII_DATA_MASK;
+
+   return cmd;
+}
+
+static int iproc_mdio_write(struct mii_bus *bus, int phy_id,
+   int reg, u16 val)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return

[PATCH 1/4] dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding

[Arun Parameswaran]

Add device tree binding documentation for the Broadcom iProc MDIO
bus driver.

Signed-off-by: Arun Parameswaran 
---
 .../devicetree/bindings/net/brcm,iproc-mdio.txt| 23 ++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt

diff --git a/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt 
b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
new file mode 100644
index 000..689f97c
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
@@ -0,0 +1,23 @@
+* Broadcom iProc MDIO bus controller
+
+Required properties:
+- compatible: should be "brcm,iproc-mdio"
+- reg: address and length of the register set for the MDIO interface
+- #size-cells: must be 1
+- #address-cells: must be 0
+
+Child nodes of this MDIO bus controller node are standard Ethernet PHY device
+nodes as described in Documentation/devicetree/bindings/net/phy.txt
+
+Example:
+
+mdio@0x18002000 {
+   compatible = "brcm,iproc-mdio";
+   reg = <0x18002000 0x8>;
+   #size-cells = <1>;
+   #address-cells = <0>;
+
+   enet-gphy@0 {
+   reg = <0>;
+   };
+};
-- 
2.5.2

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[PATCH 3/4] net: phy: Add Broadcom phy library for common interfaces

[Arun Parameswaran]

This patch adds the Broadcom phy library to consolidate common
interfaces shared by Broadcom phy's.

Moved the common interfaces to the 'bcm-phy-lib.c' and updated
the Broadcom PHY drivers to use the new APIs.

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/Kconfig   |   6 ++
 drivers/net/phy/Makefile  |   1 +
 drivers/net/phy/bcm-phy-lib.c | 209 ++
 drivers/net/phy/bcm-phy-lib.h |  37 
 drivers/net/phy/bcm63xx.c |  38 +---
 drivers/net/phy/bcm7xxx.c | 127 ++---
 drivers/net/phy/broadcom.c| 149 +-
 include/linux/brcmphy.h   |  22 +
 8 files changed, 333 insertions(+), 256 deletions(-)
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index b57f6c2..0c85a01 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -69,8 +69,12 @@ config SMSC_PHY
---help---
  Currently supports the LAN83C185, LAN8187 and LAN8700 PHYs
 
+config BCM_NET_PHYLIB
+   bool
+
 config BROADCOM_PHY
tristate "Drivers for Broadcom PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
@@ -78,11 +82,13 @@ config BROADCOM_PHY
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
+   select BCM_NET_PHYLIB
---help---
  Currently supports the 6348 and 6358 PHYs.
 
 config BCM7XXX_PHY
tristate "Drivers for Broadcom 7xxx SOCs internal PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM7366, BCM7439, BCM7445, and
  40nm and 65nm generation of BCM7xxx Set Top Box SoCs.
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index f4e6eb9..6932475 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_QSEMI_PHY)   += qsemi.o
 obj-$(CONFIG_SMSC_PHY) += smsc.o
 obj-$(CONFIG_TERANETICS_PHY)   += teranetics.o
 obj-$(CONFIG_VITESSE_PHY)  += vitesse.o
+obj-$(CONFIG_BCM_NET_PHYLIB)   += bcm-phy-lib.o
 obj-$(CONFIG_BROADCOM_PHY) += broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
new file mode 100644
index 000..13e161e
--- /dev/null
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+#define MII_BCM_CHANNEL_WIDTH 0x2000
+#define BCM_CL45VEN_EEE_ADV   0x3c
+
+int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
+{
+   int rc;
+
+   rc = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (rc < 0)
+   return rc;
+
+   return phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_exp);
+
+int bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
+{
+   int val;
+
+   val = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (val < 0)
+   return val;
+
+   val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
+
+   /* Restore default value.  It's O.K. if this write fails. */
+   phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
+
+   return val;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_read_exp);
+
+int bcm_phy_write_misc(struct phy_device *phydev,
+  u16 reg, u16 chl, u16 val)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
+   if (rc < 0)
+   return rc;
+
+   tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL);
+   tmp |= MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA;
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, tmp);
+   if (rc < 0)
+   return rc;
+
+   tmp = (chl * MII_BCM_CHANNEL_WIDTH) | reg;
+   rc = bcm_phy_write_exp(phydev, tmp, val);
+
+   return rc;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_misc);
+
+int bcm_phy_read_misc(struct phy_device *phydev,
+ u16 reg, u16 chl)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM54XX_AUXCTL_SHDWSEL_MISC)

[PATCH 4/4] net: phy: Broadcom Cygnus internal Etherent PHY driver

[Arun Parameswaran]

Add support for the Broadcom Cygnus SoCs internal PHY's.
The PHYs are 1000M/100M/10M capable with support for 'EEE'
and 'APD' (Auto Power Down).

This driver supports the following Broadcom Cygnus SoCs:
 - BCM583XX (BCM58300, BCM58302, BCM58303, BCM58305)
 - BCM113XX (BCM11300, BCM11320, BCM11350, BCM11360)

The PHY's on these SoC's require some workarounds for
stable operation, both during configuration time and
during suspend/resume. This driver handles the
application of the workarounds.

Signed-off-by: Arun Parameswaran 
---
 drivers/net/phy/Kconfig  |  13 
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/bcm-cygnus.c | 162 +++
 include/linux/brcmphy.h  |   2 +
 4 files changed, 178 insertions(+)
 create mode 100644 drivers/net/phy/bcm-cygnus.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 0c85a01..da979ec 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -79,6 +79,19 @@ config BROADCOM_PHY
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
 
+config BCM_CYGNUS_PHY
+   tristate "Drivers for Broadcom Cygnus SoC internal PHY"
+   depends on ARCH_BCM_CYGNUS || COMPILE_TEST
+   select BCM_NET_PHYLIB
+   select MDIO_BCM_IPROC
+   ---help---
+ This PHY driver is for the 1G internal PHYs of the Broadcom
+ Cygnus Family SoC.
+
+ Currently supports internal PHY's used in the BCM11300,
+ BCM11320, BCM11350, BCM11360, BCM58300, BCM58302,
+ BCM58303 & BCM58305 Broadcom Cygnus SoCs.
+
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 6932475..7655d47 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_BROADCOM_PHY)+= broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
 obj-$(CONFIG_BCM87XX_PHY)  += bcm87xx.o
+obj-$(CONFIG_BCM_CYGNUS_PHY)   += bcm-cygnus.o
 obj-$(CONFIG_ICPLUS_PHY)   += icplus.o
 obj-$(CONFIG_REALTEK_PHY)  += realtek.o
 obj-$(CONFIG_LSI_ET1011C_PHY)  += et1011c.o
diff --git a/drivers/net/phy/bcm-cygnus.c b/drivers/net/phy/bcm-cygnus.c
new file mode 100644
index 000..28bab20
--- /dev/null
+++ b/drivers/net/phy/bcm-cygnus.c
@@ -0,0 +1,162 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* Broadcom Cygnus SoC internal transceivers support. */
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+/* Broadcom Cygnus Phy specific registers */
+#define MII_BCM_CORE_BASE1E   0x1E /* Core BASE1E register */
+#define MII_BCM_EXPB0 0xB0 /* EXPB0 register */
+#define MII_BCM_EXPB1 0xB1 /* EXPB1 register */
+
+#define MII_BCM_CYGNUS_AFE_VDAC_ICTRL_0  0x91E5 /* VDAL Control register */
+
+static int bcm_cygnus_afe_config(struct phy_device *phydev)
+{
+   int rc;
+
+   /* ensure smdspclk is enabled */
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, 0x0c30);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_VDAC_ICTRL_0 bit 7:4 Iq=1100 for 1g 10bt, normal modes */
+   rc = bcm_phy_write_misc(phydev, 0x39, 0x01, 0xA7C8);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_HPF_TRIM_OTHERS bit11=1, short cascode enable for all modes*/
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x00, 0x0803);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_TX_CONFIG_1 bit 7:4 Iq=1100 for test modes */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x01, 0xA740);
+   if (rc < 0)
+   return rc;
+
+   /* AFE TEMPSEN_OTHERS rcal_HT, rcal_LT 1 */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x03, 0x8400);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_FUTURE_RSV bit 2:0 rccal <2:0>=100 */
+   rc = bcm_phy_write_misc(phydev, 0x3B, 0x00, 0x0004);
+   if (rc < 0)
+   return rc;
+
+   /* Adjust bias current trim to overcome digital offSet */
+   rc = phy_write(phydev, MII_BCM_CORE_BASE1E, 0x02);
+   if (rc < 0)
+   return rc;
+
+   /* make rcal=100, since rdb default is 000 */
+   rc = bcm_phy_write_exp(phydev, MII_BCM_EXPB1, 0x10);
+   if (rc < 0)
+   return rc;
+
+   /* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */
+

[PATCH 4/4] net: phy: Broadcom Cygnus internal Etherent PHY driver

[Arun Parameswaran]

Add support for the Broadcom Cygnus SoCs internal PHY's.
The PHYs are 1000M/100M/10M capable with support for 'EEE'
and 'APD' (Auto Power Down).

This driver supports the following Broadcom Cygnus SoCs:
 - BCM583XX (BCM58300, BCM58302, BCM58303, BCM58305)
 - BCM113XX (BCM11300, BCM11320, BCM11350, BCM11360)

The PHY's on these SoC's require some workarounds for
stable operation, both during configuration time and
during suspend/resume. This driver handles the
application of the workarounds.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/Kconfig  |  13 
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/bcm-cygnus.c | 162 +++
 include/linux/brcmphy.h  |   2 +
 4 files changed, 178 insertions(+)
 create mode 100644 drivers/net/phy/bcm-cygnus.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 0c85a01..da979ec 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -79,6 +79,19 @@ config BROADCOM_PHY
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
 
+config BCM_CYGNUS_PHY
+   tristate "Drivers for Broadcom Cygnus SoC internal PHY"
+   depends on ARCH_BCM_CYGNUS || COMPILE_TEST
+   select BCM_NET_PHYLIB
+   select MDIO_BCM_IPROC
+   ---help---
+ This PHY driver is for the 1G internal PHYs of the Broadcom
+ Cygnus Family SoC.
+
+ Currently supports internal PHY's used in the BCM11300,
+ BCM11320, BCM11350, BCM11360, BCM58300, BCM58302,
+ BCM58303 & BCM58305 Broadcom Cygnus SoCs.
+
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 6932475..7655d47 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_BROADCOM_PHY)+= broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
 obj-$(CONFIG_BCM87XX_PHY)  += bcm87xx.o
+obj-$(CONFIG_BCM_CYGNUS_PHY)   += bcm-cygnus.o
 obj-$(CONFIG_ICPLUS_PHY)   += icplus.o
 obj-$(CONFIG_REALTEK_PHY)  += realtek.o
 obj-$(CONFIG_LSI_ET1011C_PHY)  += et1011c.o
diff --git a/drivers/net/phy/bcm-cygnus.c b/drivers/net/phy/bcm-cygnus.c
new file mode 100644
index 000..28bab20
--- /dev/null
+++ b/drivers/net/phy/bcm-cygnus.c
@@ -0,0 +1,162 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* Broadcom Cygnus SoC internal transceivers support. */
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+/* Broadcom Cygnus Phy specific registers */
+#define MII_BCM_CORE_BASE1E   0x1E /* Core BASE1E register */
+#define MII_BCM_EXPB0 0xB0 /* EXPB0 register */
+#define MII_BCM_EXPB1 0xB1 /* EXPB1 register */
+
+#define MII_BCM_CYGNUS_AFE_VDAC_ICTRL_0  0x91E5 /* VDAL Control register */
+
+static int bcm_cygnus_afe_config(struct phy_device *phydev)
+{
+   int rc;
+
+   /* ensure smdspclk is enabled */
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, 0x0c30);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_VDAC_ICTRL_0 bit 7:4 Iq=1100 for 1g 10bt, normal modes */
+   rc = bcm_phy_write_misc(phydev, 0x39, 0x01, 0xA7C8);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_HPF_TRIM_OTHERS bit11=1, short cascode enable for all modes*/
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x00, 0x0803);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_TX_CONFIG_1 bit 7:4 Iq=1100 for test modes */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x01, 0xA740);
+   if (rc < 0)
+   return rc;
+
+   /* AFE TEMPSEN_OTHERS rcal_HT, rcal_LT 1 */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x03, 0x8400);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_FUTURE_RSV bit 2:0 rccal <2:0>=100 */
+   rc = bcm_phy_write_misc(phydev, 0x3B, 0x00, 0x0004);
+   if (rc < 0)
+   return rc;
+
+   /* Adjust bias current trim to overcome digital offSet */
+   rc = phy_write(phydev, MII_BCM_CORE_BASE1E, 0x02);
+   if (rc < 0)
+   return rc;
+
+   /* make rcal=100, since rdb default is 000 */
+   rc = bcm_phy_write_exp(phydev, MII_BCM_EXPB1, 0x10);
+   if (rc < 0)
+   return rc;
+
+   /* CORE_EXPB0, Reset R

[PATCH 3/4] net: phy: Add Broadcom phy library for common interfaces

[Arun Parameswaran]

This patch adds the Broadcom phy library to consolidate common
interfaces shared by Broadcom phy's.

Moved the common interfaces to the 'bcm-phy-lib.c' and updated
the Broadcom PHY drivers to use the new APIs.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/Kconfig   |   6 ++
 drivers/net/phy/Makefile  |   1 +
 drivers/net/phy/bcm-phy-lib.c | 209 ++
 drivers/net/phy/bcm-phy-lib.h |  37 
 drivers/net/phy/bcm63xx.c |  38 +---
 drivers/net/phy/bcm7xxx.c | 127 ++---
 drivers/net/phy/broadcom.c| 149 +-
 include/linux/brcmphy.h   |  22 +
 8 files changed, 333 insertions(+), 256 deletions(-)
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index b57f6c2..0c85a01 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -69,8 +69,12 @@ config SMSC_PHY
---help---
  Currently supports the LAN83C185, LAN8187 and LAN8700 PHYs
 
+config BCM_NET_PHYLIB
+   bool
+
 config BROADCOM_PHY
tristate "Drivers for Broadcom PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
@@ -78,11 +82,13 @@ config BROADCOM_PHY
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
+   select BCM_NET_PHYLIB
---help---
  Currently supports the 6348 and 6358 PHYs.
 
 config BCM7XXX_PHY
tristate "Drivers for Broadcom 7xxx SOCs internal PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM7366, BCM7439, BCM7445, and
  40nm and 65nm generation of BCM7xxx Set Top Box SoCs.
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index f4e6eb9..6932475 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_QSEMI_PHY)   += qsemi.o
 obj-$(CONFIG_SMSC_PHY) += smsc.o
 obj-$(CONFIG_TERANETICS_PHY)   += teranetics.o
 obj-$(CONFIG_VITESSE_PHY)  += vitesse.o
+obj-$(CONFIG_BCM_NET_PHYLIB)   += bcm-phy-lib.o
 obj-$(CONFIG_BROADCOM_PHY) += broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
new file mode 100644
index 000..13e161e
--- /dev/null
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+#define MII_BCM_CHANNEL_WIDTH 0x2000
+#define BCM_CL45VEN_EEE_ADV   0x3c
+
+int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
+{
+   int rc;
+
+   rc = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (rc < 0)
+   return rc;
+
+   return phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_exp);
+
+int bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
+{
+   int val;
+
+   val = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (val < 0)
+   return val;
+
+   val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
+
+   /* Restore default value.  It's O.K. if this write fails. */
+   phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
+
+   return val;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_read_exp);
+
+int bcm_phy_write_misc(struct phy_device *phydev,
+  u16 reg, u16 chl, u16 val)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
+   if (rc < 0)
+   return rc;
+
+   tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL);
+   tmp |= MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA;
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, tmp);
+   if (rc < 0)
+   return rc;
+
+   tmp = (chl * MII_BCM_CHANNEL_WIDTH) | reg;
+   rc = bcm_phy_write_exp(phydev, tmp, val);
+
+   return rc;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_misc);
+
+int bcm_phy_read_misc(struct phy_device *phydev,
+ u16 reg, u16 chl)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM54XX

[PATCH 0/4] Add support for Broadcom's iProc MDIO and Cygnus Ethernet PHY

[Arun Parameswaran]

Hi
This patchset adds support for the iProc MDIO interface and the
Broadcom Cygnus SoC's internal Ethernet PHY.

The internal Ethernet PHY(s) in the Cygnus SoC's are accessed
via the MDIO interface found in most of the iProc based chips.

The patch also consolidates the common API's used by the
Broadcom phys to a common library. Existing Broadcom phy
drivers have been modified to use the common library API's.

The Ethernet driver for the iProc family will be submitted soon,
as will the device tree configurations for the different iProc
family SoCs.

Arun Parameswaran (4):
  dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding
  net: phy: Broadcom iProc MDIO bus driver
  net: phy: Add Broadcom phy library for common interfaces
  net: phy: Broadcom Cygnus internal Etherent PHY driver

 .../devicetree/bindings/net/brcm,iproc-mdio.txt|  23 +++
 drivers/net/phy/Kconfig|  28 +++
 drivers/net/phy/Makefile   |   3 +
 drivers/net/phy/bcm-cygnus.c   | 162 
 drivers/net/phy/bcm-phy-lib.c  | 209 
 drivers/net/phy/bcm-phy-lib.h  |  37 
 drivers/net/phy/bcm63xx.c  |  38 +---
 drivers/net/phy/bcm7xxx.c  | 127 +++-
 drivers/net/phy/broadcom.c | 149 +-
 drivers/net/phy/mdio-bcm-iproc.c   | 213 +
 include/linux/brcmphy.h|  24 +--
 11 files changed, 757 insertions(+), 256 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
 create mode 100644 drivers/net/phy/bcm-cygnus.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

-- 
2.5.2

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[PATCH 1/4] dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding

[Arun Parameswaran]

Add device tree binding documentation for the Broadcom iProc MDIO
bus driver.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 .../devicetree/bindings/net/brcm,iproc-mdio.txt| 23 ++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt

diff --git a/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt 
b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
new file mode 100644
index 000..689f97c
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
@@ -0,0 +1,23 @@
+* Broadcom iProc MDIO bus controller
+
+Required properties:
+- compatible: should be "brcm,iproc-mdio"
+- reg: address and length of the register set for the MDIO interface
+- #size-cells: must be 1
+- #address-cells: must be 0
+
+Child nodes of this MDIO bus controller node are standard Ethernet PHY device
+nodes as described in Documentation/devicetree/bindings/net/phy.txt
+
+Example:
+
+mdio@0x18002000 {
+   compatible = "brcm,iproc-mdio";
+   reg = <0x18002000 0x8>;
+   #size-cells = <1>;
+   #address-cells = <0>;
+
+   enet-gphy@0 {
+   reg = <0>;
+   };
+};
-- 
2.5.2

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[PATCH 2/4] net: phy: Broadcom iProc MDIO bus driver

[Arun Parameswaran]

This patch adds support for the Broadcom iProc MDIO bus interface.
The MDIO interface can be found in the Broadcom iProc family Soc's.

The MDIO bus is accessed using a combination of command and data
registers. This MDIO driver provides access to the Etherent GPHY's
connected to the MDIO bus.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/Kconfig  |   9 ++
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/mdio-bcm-iproc.c | 213 +++
 3 files changed, 223 insertions(+)
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index c5ad98a..b57f6c2 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -225,6 +225,15 @@ config MDIO_BCM_UNIMAC
  This hardware can be found in the Broadcom GENET Ethernet MAC
  controllers as well as some Broadcom Ethernet switches such as the
  Starfighter 2 switches.
+
+config MDIO_BCM_IPROC
+   tristate "Broadcom iProc MDIO bus controller"
+   depends on ARCH_BCM_IPROC || COMPILE_TEST
+   depends on HAS_IOMEM && OF_MDIO
+   help
+ This module provides a driver for the MDIO busses found in the
+ Broadcom iProc SoC's.
+
 endif # PHYLIB
 
 config MICREL_KS8995MA
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 87f079c..f4e6eb9 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_MDIO_SUN4I)  += mdio-sun4i.o
 obj-$(CONFIG_MDIO_MOXART)  += mdio-moxart.o
 obj-$(CONFIG_MDIO_BCM_UNIMAC)  += mdio-bcm-unimac.o
 obj-$(CONFIG_MICROCHIP_PHY)+= microchip.o
+obj-$(CONFIG_MDIO_BCM_IPROC)   += mdio-bcm-iproc.o
diff --git a/drivers/net/phy/mdio-bcm-iproc.c b/drivers/net/phy/mdio-bcm-iproc.c
new file mode 100644
index 000..c0b4e65
--- /dev/null
+++ b/drivers/net/phy/mdio-bcm-iproc.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define IPROC_GPHY_MDCDIV0x1a
+
+#define MII_CTRL_OFFSET  0x000
+
+#define MII_CTRL_DIV_SHIFT   0
+#define MII_CTRL_PRE_SHIFT   7
+#define MII_CTRL_BUSY_SHIFT  8
+
+#define MII_DATA_OFFSET  0x004
+#define MII_DATA_MASK0x
+#define MII_DATA_TA_SHIFT16
+#define MII_DATA_TA_VAL  2
+#define MII_DATA_RA_SHIFT18
+#define MII_DATA_PA_SHIFT23
+#define MII_DATA_OP_SHIFT28
+#define MII_DATA_OP_WRITE1
+#define MII_DATA_OP_READ 2
+#define MII_DATA_SB_SHIFT30
+
+struct iproc_mdio_priv {
+   struct mii_bus *mii_bus;
+   void __iomem *base;
+};
+
+static inline int iproc_mdio_wait_for_idle(void __iomem *base)
+{
+   u32 val;
+   unsigned int timeout = 1000; /* loop for 1s */
+
+   do {
+   val = readl(base + MII_CTRL_OFFSET);
+   if ((val & BIT(MII_CTRL_BUSY_SHIFT)) == 0)
+   return 0;
+
+   usleep_range(1000, 2000);
+   } while (timeout--);
+
+   return -ETIMEDOUT;
+}
+
+static inline void iproc_mdio_config_clk(void __iomem *base)
+{
+   u32 val;
+
+   val = (IPROC_GPHY_MDCDIV << MII_CTRL_DIV_SHIFT) |
+ BIT(MII_CTRL_PRE_SHIFT);
+   writel(val, base + MII_CTRL_OFFSET);
+}
+
+static int iproc_mdio_read(struct mii_bus *bus, int phy_id, int reg)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   iproc_mdio_config_clk(priv->base);
+
+   /* Prepare the read operation */
+   cmd = (MII_DATA_TA_VAL << MII_DATA_TA_SHIFT) |
+   (reg << MII_DATA_RA_SHIFT) |
+   (phy_id << MII_DATA_PA_SHIFT) |
+   BIT(MII_DATA_SB_SHIFT) |
+   (MII_DATA_OP_READ << MII_DATA_OP_SHIFT);
+
+   writel(cmd, priv->base + MII_DATA_OFFSET);
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   cmd = readl(priv->base + MII_DATA_OFFSET) & MII_DATA_MASK;
+
+   return cmd;
+}
+
+static int iproc_mdio_write(struct mii_bus *bus, int phy_id,
+   int reg, u16 val)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (

Re: [PATCH 4/4] net: phy: Broadcom Cygnus internal Etherent PHY driver

[Arun Parameswaran]

On 15-09-30 02:37 PM, Florian Fainelli wrote:
> On 30/09/15 13:32, Arun Parameswaran wrote:
>> Add support for the Broadcom Cygnus SoCs internal PHY's.
>> The PHYs are 1000M/100M/10M capable with support for 'EEE'
>> and 'APD' (Auto Power Down).
>>
>> This driver supports the following Broadcom Cygnus SoCs:
>>  - BCM583XX (BCM58300, BCM58302, BCM58303, BCM58305)
>>  - BCM113XX (BCM11300, BCM11320, BCM11350, BCM11360)
>>
>> The PHY's on these SoC's require some workarounds for
>> stable operation, both during configuration time and
>> during suspend/resume. This driver handles the
>> application of the workarounds.
>>
>> Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
> Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
>
> Some suggestions if you need to respin this patch series below, sorry
> for not catching that during the internal review:
>
>> +/* Broadcom Cygnus Phy specific registers */
>> +#define MII_BCM_CORE_BASE1E   0x1E /* Core BASE1E register */
>> +#define MII_BCM_EXPB0 0xB0 /* EXPB0 register */
>> +#define MII_BCM_EXPB1 0xB1 /* EXPB1 register */
> These defines could be moved to brcmphy.h for instance, since they are
> shared between all Broadcom PHY drivers AFAICT.

Ok, Will move these and modify the corresponding PHY drivers.

Thanks,
Arun


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Re: [PATCH 1/4] dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding

[Arun Parameswaran]

On 15-09-30 02:36 PM, Florian Fainelli wrote:
> On 30/09/15 13:32, Arun Parameswaran wrote:
>> Add device tree binding documentation for the Broadcom iProc MDIO
>> bus driver.
>>
>> Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
>> ---
>>  .../devicetree/bindings/net/brcm,iproc-mdio.txt| 23 
>> ++
>>  1 file changed, 23 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
>>
>> diff --git a/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt 
>> b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
>> new file mode 100644
>> index 000..689f97c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
>> @@ -0,0 +1,23 @@
>> +* Broadcom iProc MDIO bus controller
>> +
>> +Required properties:
>> +- compatible: should be "brcm,iproc-mdio"
>> +- reg: address and length of the register set for the MDIO interface
>> +- #size-cells: must be 1
>> +- #address-cells: must be 0
>> +
>> +Child nodes of this MDIO bus controller node are standard Ethernet PHY 
>> device
>> +nodes as described in Documentation/devicetree/bindings/net/phy.txt
>> +
>> +Example:
>> +
>> +mdio@0x18002000 {
> Sorry for not catching this earlier, you might want to drop the leading
> 0x here from your example, other than that:
>
> Reviewed-by: Florian Fainelli <f.faine...@gmail.com>

Will fix this.

Thanks,

Arun

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[PATCH v2 3/5] net: phy: Add Broadcom phy library for common interfaces

[Arun Parameswaran]

This patch adds the Broadcom phy library to consolidate common
interfaces shared by Broadcom phy's.

Moved the common interfaces to the 'bcm-phy-lib.c' and updated
the Broadcom PHY drivers to use the new APIs.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/Kconfig   |   6 ++
 drivers/net/phy/Makefile  |   1 +
 drivers/net/phy/bcm-phy-lib.c | 209 ++
 drivers/net/phy/bcm-phy-lib.h |  37 
 drivers/net/phy/bcm63xx.c |  38 +---
 drivers/net/phy/bcm7xxx.c | 127 ++---
 drivers/net/phy/broadcom.c| 149 +-
 include/linux/brcmphy.h   |  22 +
 8 files changed, 333 insertions(+), 256 deletions(-)
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index b57f6c2..606fdc9 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -69,8 +69,12 @@ config SMSC_PHY
---help---
  Currently supports the LAN83C185, LAN8187 and LAN8700 PHYs
 
+config BCM_NET_PHYLIB
+   tristate
+
 config BROADCOM_PHY
tristate "Drivers for Broadcom PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
@@ -78,11 +82,13 @@ config BROADCOM_PHY
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
+   select BCM_NET_PHYLIB
---help---
  Currently supports the 6348 and 6358 PHYs.
 
 config BCM7XXX_PHY
tristate "Drivers for Broadcom 7xxx SOCs internal PHYs"
+   select BCM_NET_PHYLIB
---help---
  Currently supports the BCM7366, BCM7439, BCM7445, and
  40nm and 65nm generation of BCM7xxx Set Top Box SoCs.
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index f4e6eb9..6932475 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_QSEMI_PHY)   += qsemi.o
 obj-$(CONFIG_SMSC_PHY) += smsc.o
 obj-$(CONFIG_TERANETICS_PHY)   += teranetics.o
 obj-$(CONFIG_VITESSE_PHY)  += vitesse.o
+obj-$(CONFIG_BCM_NET_PHYLIB)   += bcm-phy-lib.o
 obj-$(CONFIG_BROADCOM_PHY) += broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c
new file mode 100644
index 000..13e161e
--- /dev/null
+++ b/drivers/net/phy/bcm-phy-lib.c
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+#define MII_BCM_CHANNEL_WIDTH 0x2000
+#define BCM_CL45VEN_EEE_ADV   0x3c
+
+int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
+{
+   int rc;
+
+   rc = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (rc < 0)
+   return rc;
+
+   return phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_exp);
+
+int bcm_phy_read_exp(struct phy_device *phydev, u16 reg)
+{
+   int val;
+
+   val = phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
+   if (val < 0)
+   return val;
+
+   val = phy_read(phydev, MII_BCM54XX_EXP_DATA);
+
+   /* Restore default value.  It's O.K. if this write fails. */
+   phy_write(phydev, MII_BCM54XX_EXP_SEL, 0);
+
+   return val;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_read_exp);
+
+int bcm_phy_write_misc(struct phy_device *phydev,
+  u16 reg, u16 chl, u16 val)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
+   if (rc < 0)
+   return rc;
+
+   tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL);
+   tmp |= MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA;
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, tmp);
+   if (rc < 0)
+   return rc;
+
+   tmp = (chl * MII_BCM_CHANNEL_WIDTH) | reg;
+   rc = bcm_phy_write_exp(phydev, tmp, val);
+
+   return rc;
+}
+EXPORT_SYMBOL_GPL(bcm_phy_write_misc);
+
+int bcm_phy_read_misc(struct phy_device *phydev,
+ u16 reg, u16 chl)
+{
+   int rc;
+   int tmp;
+
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL,
+  MII_BCM5

[PATCH v2 2/5] net: phy: Broadcom iProc MDIO bus driver

[Arun Parameswaran]

This patch adds support for the Broadcom iProc MDIO bus interface.
The MDIO interface can be found in the Broadcom iProc family Soc's.

The MDIO bus is accessed using a combination of command and data
registers. This MDIO driver provides access to the Etherent GPHY's
connected to the MDIO bus.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/Kconfig  |   9 ++
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/mdio-bcm-iproc.c | 213 +++
 3 files changed, 223 insertions(+)
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index c5ad98a..b57f6c2 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -225,6 +225,15 @@ config MDIO_BCM_UNIMAC
  This hardware can be found in the Broadcom GENET Ethernet MAC
  controllers as well as some Broadcom Ethernet switches such as the
  Starfighter 2 switches.
+
+config MDIO_BCM_IPROC
+   tristate "Broadcom iProc MDIO bus controller"
+   depends on ARCH_BCM_IPROC || COMPILE_TEST
+   depends on HAS_IOMEM && OF_MDIO
+   help
+ This module provides a driver for the MDIO busses found in the
+ Broadcom iProc SoC's.
+
 endif # PHYLIB
 
 config MICREL_KS8995MA
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 87f079c..f4e6eb9 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_MDIO_SUN4I)  += mdio-sun4i.o
 obj-$(CONFIG_MDIO_MOXART)  += mdio-moxart.o
 obj-$(CONFIG_MDIO_BCM_UNIMAC)  += mdio-bcm-unimac.o
 obj-$(CONFIG_MICROCHIP_PHY)+= microchip.o
+obj-$(CONFIG_MDIO_BCM_IPROC)   += mdio-bcm-iproc.o
diff --git a/drivers/net/phy/mdio-bcm-iproc.c b/drivers/net/phy/mdio-bcm-iproc.c
new file mode 100644
index 000..c0b4e65
--- /dev/null
+++ b/drivers/net/phy/mdio-bcm-iproc.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define IPROC_GPHY_MDCDIV0x1a
+
+#define MII_CTRL_OFFSET  0x000
+
+#define MII_CTRL_DIV_SHIFT   0
+#define MII_CTRL_PRE_SHIFT   7
+#define MII_CTRL_BUSY_SHIFT  8
+
+#define MII_DATA_OFFSET  0x004
+#define MII_DATA_MASK0x
+#define MII_DATA_TA_SHIFT16
+#define MII_DATA_TA_VAL  2
+#define MII_DATA_RA_SHIFT18
+#define MII_DATA_PA_SHIFT23
+#define MII_DATA_OP_SHIFT28
+#define MII_DATA_OP_WRITE1
+#define MII_DATA_OP_READ 2
+#define MII_DATA_SB_SHIFT30
+
+struct iproc_mdio_priv {
+   struct mii_bus *mii_bus;
+   void __iomem *base;
+};
+
+static inline int iproc_mdio_wait_for_idle(void __iomem *base)
+{
+   u32 val;
+   unsigned int timeout = 1000; /* loop for 1s */
+
+   do {
+   val = readl(base + MII_CTRL_OFFSET);
+   if ((val & BIT(MII_CTRL_BUSY_SHIFT)) == 0)
+   return 0;
+
+   usleep_range(1000, 2000);
+   } while (timeout--);
+
+   return -ETIMEDOUT;
+}
+
+static inline void iproc_mdio_config_clk(void __iomem *base)
+{
+   u32 val;
+
+   val = (IPROC_GPHY_MDCDIV << MII_CTRL_DIV_SHIFT) |
+ BIT(MII_CTRL_PRE_SHIFT);
+   writel(val, base + MII_CTRL_OFFSET);
+}
+
+static int iproc_mdio_read(struct mii_bus *bus, int phy_id, int reg)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   iproc_mdio_config_clk(priv->base);
+
+   /* Prepare the read operation */
+   cmd = (MII_DATA_TA_VAL << MII_DATA_TA_SHIFT) |
+   (reg << MII_DATA_RA_SHIFT) |
+   (phy_id << MII_DATA_PA_SHIFT) |
+   BIT(MII_DATA_SB_SHIFT) |
+   (MII_DATA_OP_READ << MII_DATA_OP_SHIFT);
+
+   writel(cmd, priv->base + MII_DATA_OFFSET);
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (rc)
+   return rc;
+
+   cmd = readl(priv->base + MII_DATA_OFFSET) & MII_DATA_MASK;
+
+   return cmd;
+}
+
+static int iproc_mdio_write(struct mii_bus *bus, int phy_id,
+   int reg, u16 val)
+{
+   struct iproc_mdio_priv *priv = bus->priv;
+   u32 cmd;
+   int rc;
+
+   rc = iproc_mdio_wait_for_idle(priv->base);
+   if (

[PATCH v2 1/5] dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding

[Arun Parameswaran]

Add device tree binding documentation for the Broadcom iProc MDIO
bus driver.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 .../devicetree/bindings/net/brcm,iproc-mdio.txt| 23 ++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt

diff --git a/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt 
b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
new file mode 100644
index 000..8ba9ed1
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
@@ -0,0 +1,23 @@
+* Broadcom iProc MDIO bus controller
+
+Required properties:
+- compatible: should be "brcm,iproc-mdio"
+- reg: address and length of the register set for the MDIO interface
+- #size-cells: must be 1
+- #address-cells: must be 0
+
+Child nodes of this MDIO bus controller node are standard Ethernet PHY device
+nodes as described in Documentation/devicetree/bindings/net/phy.txt
+
+Example:
+
+mdio@18002000 {
+   compatible = "brcm,iproc-mdio";
+   reg = <0x18002000 0x8>;
+   #size-cells = <1>;
+   #address-cells = <0>;
+
+   enet-gphy@0 {
+   reg = <0>;
+   };
+};
-- 
2.5.2

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[PATCH v2 5/5] net: phy: bcm7xxx: Modified to use global core register defines

[Arun Parameswaran]

Modified the bcm7xxx phy driver to remove local core register
defines and use the common ones from "include/linux/brcmphy.h"

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/bcm7xxx.c | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c
index efa31a6..03d4809 100644
--- a/drivers/net/phy/bcm7xxx.c
+++ b/drivers/net/phy/bcm7xxx.c
@@ -25,7 +25,6 @@
 #define MII_BCM7XXX_100TX_DISC 0x14
 #define MII_BCM7XXX_AUX_MODE   0x1d
 #define  MII_BCM7XX_64CLK_MDIO BIT(12)
-#define MII_BCM7XXX_CORE_BASE1E0x1e
 #define MII_BCM7XXX_TEST   0x1f
 #define  MII_BCM7XXX_SHD_MODE_2BIT(2)
 
@@ -46,8 +45,6 @@
 #define AFE_VDAC_OTHERS_0  MISC_ADDR(0x39, 3)
 #define AFE_HPF_TRIM_OTHERSMISC_ADDR(0x3a, 0)
 
-#define CORE_EXPB0 0xb0
-
 static void r_rc_cal_reset(struct phy_device *phydev)
 {
/* Reset R_CAL/RC_CAL Engine */
@@ -76,7 +73,7 @@ static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device 
*phydev)
bcm_phy_write_misc(phydev, DSP_TAP10, 0x690b);
 
/* Switch to CORE_BASE1E */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0xd);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0xd);
 
r_rc_cal_reset(phydev);
 
@@ -127,7 +124,7 @@ static int bcm7xxx_28nm_d0_afe_config_init(struct 
phy_device *phydev)
bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
 
/* CORE_BASE1E, force trim to overwrite and set I_ext trim to  */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010);
 
/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
bcm_phy_write_misc(phydev, DSP_TAP10, 0x011b);
@@ -155,7 +152,7 @@ static int bcm7xxx_28nm_e0_plus_afe_config_init(struct 
phy_device *phydev)
bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3);
 
/* CORE_BASE1E, force trim to overwrite and set I_ext trim to  */
-   phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0x0010);
+   phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010);
 
/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */
bcm_phy_write_misc(phydev, DSP_TAP10, 0x011b);
-- 
2.5.2

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[PATCH v2 4/5] net: phy: Broadcom Cygnus internal Etherent PHY driver

[Arun Parameswaran]

Add support for the Broadcom Cygnus SoCs internal PHY's.
The PHYs are 1000M/100M/10M capable with support for 'EEE'
and 'APD' (Auto Power Down).

This driver supports the following Broadcom Cygnus SoCs:
 - BCM583XX (BCM58300, BCM58302, BCM58303, BCM58305)
 - BCM113XX (BCM11300, BCM11320, BCM11350, BCM11360)

The PHY's on these SoC's require some workarounds for
stable operation, both during configuration time and
during suspend/resume. This driver handles the
application of the workarounds.

Signed-off-by: Arun Parameswaran <ar...@broadcom.com>
---
 drivers/net/phy/Kconfig  |  13 
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/bcm-cygnus.c | 158 +++
 include/linux/brcmphy.h  |   7 ++
 4 files changed, 179 insertions(+)
 create mode 100644 drivers/net/phy/bcm-cygnus.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 606fdc9..571ae38 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -79,6 +79,19 @@ config BROADCOM_PHY
  Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
  BCM5481 and BCM5482 PHYs.
 
+config BCM_CYGNUS_PHY
+   tristate "Drivers for Broadcom Cygnus SoC internal PHY"
+   depends on ARCH_BCM_CYGNUS || COMPILE_TEST
+   select BCM_NET_PHYLIB
+   select MDIO_BCM_IPROC
+   ---help---
+ This PHY driver is for the 1G internal PHYs of the Broadcom
+ Cygnus Family SoC.
+
+ Currently supports internal PHY's used in the BCM11300,
+ BCM11320, BCM11350, BCM11360, BCM58300, BCM58302,
+ BCM58303 & BCM58305 Broadcom Cygnus SoCs.
+
 config BCM63XX_PHY
tristate "Drivers for Broadcom 63xx SOCs internal PHY"
depends on BCM63XX
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 6932475..7655d47 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_BROADCOM_PHY)+= broadcom.o
 obj-$(CONFIG_BCM63XX_PHY)  += bcm63xx.o
 obj-$(CONFIG_BCM7XXX_PHY)  += bcm7xxx.o
 obj-$(CONFIG_BCM87XX_PHY)  += bcm87xx.o
+obj-$(CONFIG_BCM_CYGNUS_PHY)   += bcm-cygnus.o
 obj-$(CONFIG_ICPLUS_PHY)   += icplus.o
 obj-$(CONFIG_REALTEK_PHY)  += realtek.o
 obj-$(CONFIG_LSI_ET1011C_PHY)  += et1011c.o
diff --git a/drivers/net/phy/bcm-cygnus.c b/drivers/net/phy/bcm-cygnus.c
new file mode 100644
index 000..49bbc68
--- /dev/null
+++ b/drivers/net/phy/bcm-cygnus.c
@@ -0,0 +1,158 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* Broadcom Cygnus SoC internal transceivers support. */
+#include "bcm-phy-lib.h"
+#include 
+#include 
+#include 
+#include 
+
+/* Broadcom Cygnus Phy specific registers */
+#define MII_BCM_CYGNUS_AFE_VDAC_ICTRL_0  0x91E5 /* VDAL Control register */
+
+static int bcm_cygnus_afe_config(struct phy_device *phydev)
+{
+   int rc;
+
+   /* ensure smdspclk is enabled */
+   rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, 0x0c30);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_VDAC_ICTRL_0 bit 7:4 Iq=1100 for 1g 10bt, normal modes */
+   rc = bcm_phy_write_misc(phydev, 0x39, 0x01, 0xA7C8);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_HPF_TRIM_OTHERS bit11=1, short cascode enable for all modes*/
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x00, 0x0803);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_TX_CONFIG_1 bit 7:4 Iq=1100 for test modes */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x01, 0xA740);
+   if (rc < 0)
+   return rc;
+
+   /* AFE TEMPSEN_OTHERS rcal_HT, rcal_LT 1 */
+   rc = bcm_phy_write_misc(phydev, 0x3A, 0x03, 0x8400);
+   if (rc < 0)
+   return rc;
+
+   /* AFE_FUTURE_RSV bit 2:0 rccal <2:0>=100 */
+   rc = bcm_phy_write_misc(phydev, 0x3B, 0x00, 0x0004);
+   if (rc < 0)
+   return rc;
+
+   /* Adjust bias current trim to overcome digital offSet */
+   rc = phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x02);
+   if (rc < 0)
+   return rc;
+
+   /* make rcal=100, since rdb default is 000 */
+   rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB1, 0x10);
+   if (rc < 0)
+   return rc;
+
+   /* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */
+   rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB0, 0x10);
+   if (rc < 0)
+   return rc;
+
+   /* CORE_EXPB0, Disable Reset R_CA

[PATCH v2 0/5] Add support for Broadcom's iProc MDIO and Cygnus Ethernet PHY

[Arun Parameswaran]

Hi
This patchset adds support for the iProc MDIO interface and the
Broadcom Cygnus SoC's internal Ethernet PHY.

The internal Ethernet PHY(s) in the Cygnus SoC's are accessed
via the MDIO interface found in most of the iProc based chips.

The patch also consolidates the common API's used by the
Broadcom phys to a common library. Existing Broadcom phy
drivers have been modified to use the common library API's.

The Ethernet driver for the iProc family will be submitted soon,
as will the device tree configurations for the different iProc
family SoCs.

Changes from v1:
- Updated device tree documentation for the iProc MDIO driver
  based on Florian's feedback.
- Moved the core register defines from the Cygnus PHY driver to
  'include/linux/brcmphy.h' based on Florian's feedback.
- Created a new patch/commit to modify the bcm7xxx phy driver
  to use the new core register defines.
- Modified the Kconfig entry for the Broadcom PHY library to
  'tristate' instead of 'bool'

Arun Parameswaran (5):
  dt-bindings: net: Broadcom iProc MDIO bus driver device tree binding
  net: phy: Broadcom iProc MDIO bus driver
  net: phy: Add Broadcom phy library for common interfaces
  net: phy: Broadcom Cygnus internal Etherent PHY driver
  net: phy: bcm7xxx: Modified to use global core register defines

 .../devicetree/bindings/net/brcm,iproc-mdio.txt|  23 +++
 drivers/net/phy/Kconfig|  28 +++
 drivers/net/phy/Makefile   |   3 +
 drivers/net/phy/bcm-cygnus.c   | 158 +++
 drivers/net/phy/bcm-phy-lib.c  | 209 
 drivers/net/phy/bcm-phy-lib.h  |  37 
 drivers/net/phy/bcm63xx.c  |  38 +---
 drivers/net/phy/bcm7xxx.c  | 136 +++--
 drivers/net/phy/broadcom.c | 149 +-
 drivers/net/phy/mdio-bcm-iproc.c   | 213 +
 include/linux/brcmphy.h|  29 +--
 11 files changed, 761 insertions(+), 262 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/brcm,iproc-mdio.txt
 create mode 100644 drivers/net/phy/bcm-cygnus.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.c
 create mode 100644 drivers/net/phy/bcm-phy-lib.h
 create mode 100644 drivers/net/phy/mdio-bcm-iproc.c

-- 
2.5.2

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Re: [PATCH 1/1] net: core: 'ethtool' issue with querying phy settings

[Arun Parameswaran]

On 15-06-01 02:46 PM, David Miller wrote:
> From: Arun Parameswaran 
> Date: Mon, 1 Jun 2015 14:41:43 -0700
> 
>> It would be nice for the 'ethtool' to be flexible to support querying
>> specific PHY irrespective of the net implementation, but that is being
>> discussed in the other thread.
> 
> Please stop arguing about this, it isn't valid.
> 
> Your device is a switch, and therefore needs to be represented properly
> with the proper number of net_device objects.
> 
> Even more importantly, the ethtool API is established and you cannot
> change these semantics without potentially breaking lots of applications
> and libraries out there.
> 
> Your change is reverted, and I will absolutely not entertain any
> attempt to again change the semantics of this ethtool operation.
> 
> Thanks.
> 
I apologize if the patch broke any conventions, it was not my intend. I
understand the implications on other programs that use the interface.

Just so that I don’t make this mistake in the future and to understand this
better, does this mean that the 'phyad' parameter specified in the
'ethtool' command line is ignored ?

Thanks
Arun
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Re: [PATCH 1/1] net: core: 'ethtool' issue with querying phy settings

[Arun Parameswaran]

On 15-06-01 11:05 AM, Ben Hutchings wrote:
> On Sun, 2015-05-31 at 17:19 -0700, David Miller wrote:
>> From: Ben Hutchings 
>> Date: Sun, 31 May 2015 20:54:06 +0100
>>
>>> On Fri, 2015-05-22 at 16:15 -0400, David Miller wrote:
>>>> From: Arun Parameswaran 
>>>> Date: Wed, 20 May 2015 14:35:30 -0700
>>>>
>>>>> When trying to configure the settings for PHY1, using commands
>>>>> like 'ethtool -s eth0 phyad 1 speed 100', the 'ethtool' seems to
>>>>> modify other settings apart from the speed of the PHY1, in the
>>>>> above case.
>>>>>
>>>>> The ethtool seems to query the settings for PHY0, and use this
>>>>> as the base to apply the new settings to the PHY1. This is
>>>>> causing the other settings of the PHY 1 to be wrongly
>>>>> configured.
>>>>>
>>>>> The issue is caused by the '_ethtool_get_settings()' API, which
>>>>> gets called because of the 'ETHTOOL_GSET' command, is clearing
>>>>> the 'cmd' pointer (of type 'struct ethtool_cmd') by calling
>>>>> memset. This clears all the parameters (if any) passed for the
>>>>> 'ETHTOOL_GSET' cmd. So the driver's callback is always invoked
>>>>> with 'cmd->phy_address' as '0'.
>>>>>
>>>>> The '_ethtool_get_settings()' is called from other files in the
>>>>> 'net/core'. So the fix is applied to the 'ethtool_get_settings()'
>>>>> which is only called in the context of the 'ethtool'.
>>>>>
>>>>> Signed-off-by: Arun Parameswaran 
>>>>> Reviewed-by: Ray Jui 
>>>>> Reviewed-by: Scott Branden 
>>>>
>>>> Applied and queued up for -stable, thanks.
>>>
>>> Please revert this.  This is an incompatible API change, not a bug fix.
>>> The established semantics are that 'phyad' is filled in by the driver;
>>> it is not a parameter to the ETHTOOL_GSET command.
>>
>> But then how in the world can the user specify specific PHY ADs for
>> a device that will respond to more than one?
> 
> ETHTOOL_SSET sets the current PHY address and ETHTOOL_GSET gets it.
> 
> If multiple PHYs need to be configured for a single link then the driver
> should configure them all at the same time rather than making it the
> administrator's problem.
> 
> What we can't support with the current API are:
> - multiple physical links behind a single net device (different
>   configuration possible for each link)
> - multiple PHYs are needed for a single link, and the driver can't
>   automatically decide which to use (multiple addresses to set)
> 
> Ben.
> 
The patch doesn't affect the current functionality except that the
programs/'ethtool' using the interface needs to ensure the command
structure integrity.

Kernel should transport the data to and from the driver and let the
programs/ethtool handle the data/command. It is better if the Kernel
doesn't manipulate the command/data being requested/passed, in this
case it is the hard-coding of PHY id (by the memset). This adds
flexibility to the interface.

This patch along with the change suggested in the 'ethtool' app
(separate patch set sent for the app), provides the flexibility to be
able to query/set a specific PHY irrespective of the driver design.

In our SoC, we have one MAC connected to multiple PHYs with an internal
switch in between.
We have only one net device as we can have only one MAC address and this
better reflects the hardware state.

It would be nice for the 'ethtool' to be flexible to support querying
specific PHY irrespective of the net implementation, but that is being
discussed in the other thread.


Thanks
Arun
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Re: [PATCH 1/1] net: core: 'ethtool' issue with querying phy settings

[Arun Parameswaran]

On 15-06-01 11:05 AM, Ben Hutchings wrote:
 On Sun, 2015-05-31 at 17:19 -0700, David Miller wrote:
 From: Ben Hutchings b...@decadent.org.uk
 Date: Sun, 31 May 2015 20:54:06 +0100

 On Fri, 2015-05-22 at 16:15 -0400, David Miller wrote:
 From: Arun Parameswaran apara...@broadcom.com
 Date: Wed, 20 May 2015 14:35:30 -0700

 When trying to configure the settings for PHY1, using commands
 like 'ethtool -s eth0 phyad 1 speed 100', the 'ethtool' seems to
 modify other settings apart from the speed of the PHY1, in the
 above case.

 The ethtool seems to query the settings for PHY0, and use this
 as the base to apply the new settings to the PHY1. This is
 causing the other settings of the PHY 1 to be wrongly
 configured.

 The issue is caused by the '_ethtool_get_settings()' API, which
 gets called because of the 'ETHTOOL_GSET' command, is clearing
 the 'cmd' pointer (of type 'struct ethtool_cmd') by calling
 memset. This clears all the parameters (if any) passed for the
 'ETHTOOL_GSET' cmd. So the driver's callback is always invoked
 with 'cmd-phy_address' as '0'.

 The '_ethtool_get_settings()' is called from other files in the
 'net/core'. So the fix is applied to the 'ethtool_get_settings()'
 which is only called in the context of the 'ethtool'.

 Signed-off-by: Arun Parameswaran apara...@broadcom.com
 Reviewed-by: Ray Jui r...@broadcom.com
 Reviewed-by: Scott Branden sbran...@broadcom.com

 Applied and queued up for -stable, thanks.

 Please revert this.  This is an incompatible API change, not a bug fix.
 The established semantics are that 'phyad' is filled in by the driver;
 it is not a parameter to the ETHTOOL_GSET command.

 But then how in the world can the user specify specific PHY ADs for
 a device that will respond to more than one?
 
 ETHTOOL_SSET sets the current PHY address and ETHTOOL_GSET gets it.
 
 If multiple PHYs need to be configured for a single link then the driver
 should configure them all at the same time rather than making it the
 administrator's problem.
 
 What we can't support with the current API are:
 - multiple physical links behind a single net device (different
   configuration possible for each link)
 - multiple PHYs are needed for a single link, and the driver can't
   automatically decide which to use (multiple addresses to set)
 
 Ben.
 
The patch doesn't affect the current functionality except that the
programs/'ethtool' using the interface needs to ensure the command
structure integrity.

Kernel should transport the data to and from the driver and let the
programs/ethtool handle the data/command. It is better if the Kernel
doesn't manipulate the command/data being requested/passed, in this
case it is the hard-coding of PHY id (by the memset). This adds
flexibility to the interface.

This patch along with the change suggested in the 'ethtool' app
(separate patch set sent for the app), provides the flexibility to be
able to query/set a specific PHY irrespective of the driver design.

In our SoC, we have one MAC connected to multiple PHYs with an internal
switch in between.
We have only one net device as we can have only one MAC address and this
better reflects the hardware state.

It would be nice for the 'ethtool' to be flexible to support querying
specific PHY irrespective of the net implementation, but that is being
discussed in the other thread.


Thanks
Arun
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Please read the FAQ at  http://www.tux.org/lkml/

Re: [PATCH 1/1] net: core: 'ethtool' issue with querying phy settings

[Arun Parameswaran]

On 15-06-01 02:46 PM, David Miller wrote:
 From: Arun Parameswaran apara...@broadcom.com
 Date: Mon, 1 Jun 2015 14:41:43 -0700
 
 It would be nice for the 'ethtool' to be flexible to support querying
 specific PHY irrespective of the net implementation, but that is being
 discussed in the other thread.
 
 Please stop arguing about this, it isn't valid.
 
 Your device is a switch, and therefore needs to be represented properly
 with the proper number of net_device objects.
 
 Even more importantly, the ethtool API is established and you cannot
 change these semantics without potentially breaking lots of applications
 and libraries out there.
 
 Your change is reverted, and I will absolutely not entertain any
 attempt to again change the semantics of this ethtool operation.
 
 Thanks.
 
I apologize if the patch broke any conventions, it was not my intend. I
understand the implications on other programs that use the interface.

Just so that I don’t make this mistake in the future and to understand this
better, does this mean that the 'phyad' parameter specified in the
'ethtool' command line is ignored ?

Thanks
Arun
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[PATCH 1/1] net: core: 'ethtool' issue with querying phy settings

[Arun Parameswaran]

When trying to configure the settings for PHY1, using commands
like 'ethtool -s eth0 phyad 1 speed 100', the 'ethtool' seems to
modify other settings apart from the speed of the PHY1, in the
above case.

The ethtool seems to query the settings for PHY0, and use this
as the base to apply the new settings to the PHY1. This is
causing the other settings of the PHY 1 to be wrongly
configured.

The issue is caused by the '_ethtool_get_settings()' API, which
gets called because of the 'ETHTOOL_GSET' command, is clearing
the 'cmd' pointer (of type 'struct ethtool_cmd') by calling
memset. This clears all the parameters (if any) passed for the
'ETHTOOL_GSET' cmd. So the driver's callback is always invoked
with 'cmd->phy_address' as '0'.

The '_ethtool_get_settings()' is called from other files in the
'net/core'. So the fix is applied to the 'ethtool_get_settings()'
which is only called in the context of the 'ethtool'.

Signed-off-by: Arun Parameswaran 
Reviewed-by: Ray Jui 
Reviewed-by: Scott Branden 
---
 net/core/ethtool.c |   10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/net/core/ethtool.c b/net/core/ethtool.c
index 1d00b89..1347e11 100644
--- a/net/core/ethtool.c
+++ b/net/core/ethtool.c
@@ -359,7 +359,15 @@ static int ethtool_get_settings(struct net_device *dev, 
void __user *useraddr)
int err;
struct ethtool_cmd cmd;
 
-   err = __ethtool_get_settings(dev, );
+   if (!dev->ethtool_ops->get_settings)
+   return -EOPNOTSUPP;
+
+   if (copy_from_user(, useraddr, sizeof(cmd)))
+   return -EFAULT;
+
+   cmd.cmd = ETHTOOL_GSET;
+
+   err = dev->ethtool_ops->get_settings(dev, );
if (err < 0)
return err;
 
-- 
1.7.9.5

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[PATCH 0/1] Fix an issue with 'ethtool' configuring PHYs

[Arun Parameswaran]

Hi,

This patch fixes an issue while using the 'ethtool' to query/set PHY's
configurations. The 'ethtool' interface in the Kernel seem to always
query settings for PHY0, irrespective of the PHY specified, while
issuing the 'ethtool' command.

For example when issueing 'ethtool -s eth0 phyad 1 speed 100' command
to set the speed of PHY1's speed, the current software would first
retrieve PHY0 settings, then apply the request settings (in this case
'speed') on top. It then uses this (PHY0's config with new speed)
settings to update the PHY1, which now ends up with partial
configurations of PHY0 and the new speed.

This patch series is based on Linux v4.1-rc4 and is available in:
https://github.com/Broadcom/cygnus-linux/tree/net-core-ethtool-fix-v1

Arun Parameswaran (1):
  SWMAPYVR-4339 net: core: 'ethtool' issue with querying phy settings

 net/core/ethtool.c |   10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

-- 
1.7.9.5

--
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Please read the FAQ at  http://www.tux.org/lkml/

[PATCH 0/1] Fix an issue with 'ethtool' configuring PHYs

[Arun Parameswaran]

Hi,

This patch fixes an issue while using the 'ethtool' to query/set PHY's
configurations. The 'ethtool' interface in the Kernel seem to always
query settings for PHY0, irrespective of the PHY specified, while
issuing the 'ethtool' command.

For example when issueing 'ethtool -s eth0 phyad 1 speed 100' command
to set the speed of PHY1's speed, the current software would first
retrieve PHY0 settings, then apply the request settings (in this case
'speed') on top. It then uses this (PHY0's config with new speed)
settings to update the PHY1, which now ends up with partial
configurations of PHY0 and the new speed.

This patch series is based on Linux v4.1-rc4 and is available in:
https://github.com/Broadcom/cygnus-linux/tree/net-core-ethtool-fix-v1

Arun Parameswaran (1):
  SWMAPYVR-4339 net: core: 'ethtool' issue with querying phy settings

 net/core/ethtool.c |   10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

-- 
1.7.9.5

--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
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Please read the FAQ at  http://www.tux.org/lkml/

[PATCH 1/1] net: core: 'ethtool' issue with querying phy settings

[Arun Parameswaran]

When trying to configure the settings for PHY1, using commands
like 'ethtool -s eth0 phyad 1 speed 100', the 'ethtool' seems to
modify other settings apart from the speed of the PHY1, in the
above case.

The ethtool seems to query the settings for PHY0, and use this
as the base to apply the new settings to the PHY1. This is
causing the other settings of the PHY 1 to be wrongly
configured.

The issue is caused by the '_ethtool_get_settings()' API, which
gets called because of the 'ETHTOOL_GSET' command, is clearing
the 'cmd' pointer (of type 'struct ethtool_cmd') by calling
memset. This clears all the parameters (if any) passed for the
'ETHTOOL_GSET' cmd. So the driver's callback is always invoked
with 'cmd-phy_address' as '0'.

The '_ethtool_get_settings()' is called from other files in the
'net/core'. So the fix is applied to the 'ethtool_get_settings()'
which is only called in the context of the 'ethtool'.

Signed-off-by: Arun Parameswaran apara...@broadcom.com
Reviewed-by: Ray Jui r...@broadcom.com
Reviewed-by: Scott Branden sbran...@broadcom.com
---
 net/core/ethtool.c |   10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/net/core/ethtool.c b/net/core/ethtool.c
index 1d00b89..1347e11 100644
--- a/net/core/ethtool.c
+++ b/net/core/ethtool.c
@@ -359,7 +359,15 @@ static int ethtool_get_settings(struct net_device *dev, 
void __user *useraddr)
int err;
struct ethtool_cmd cmd;
 
-   err = __ethtool_get_settings(dev, cmd);
+   if (!dev-ethtool_ops-get_settings)
+   return -EOPNOTSUPP;
+
+   if (copy_from_user(cmd, useraddr, sizeof(cmd)))
+   return -EFAULT;
+
+   cmd.cmd = ETHTOOL_GSET;
+
+   err = dev-ethtool_ops-get_settings(dev, cmd);
if (err  0)
return err;
 
-- 
1.7.9.5

--
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